java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memsetNonZero3_false-valid-deref-write.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-2f49842 [2018-01-21 08:45:12,674 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-21 08:45:12,675 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-21 08:45:12,691 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-21 08:45:12,691 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-21 08:45:12,692 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-21 08:45:12,693 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-21 08:45:12,695 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-21 08:45:12,697 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-21 08:45:12,698 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-21 08:45:12,699 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-21 08:45:12,699 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-21 08:45:12,700 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-21 08:45:12,701 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-21 08:45:12,702 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-21 08:45:12,704 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-21 08:45:12,707 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-21 08:45:12,709 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-21 08:45:12,710 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-21 08:45:12,711 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-21 08:45:12,713 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-21 08:45:12,714 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-21 08:45:12,714 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-21 08:45:12,715 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-21 08:45:12,716 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-21 08:45:12,717 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-21 08:45:12,717 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-21 08:45:12,718 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-21 08:45:12,718 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-21 08:45:12,719 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-21 08:45:12,719 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-21 08:45:12,720 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf [2018-01-21 08:45:12,728 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-21 08:45:12,728 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-21 08:45:12,729 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-21 08:45:12,729 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-21 08:45:12,729 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-21 08:45:12,730 INFO L133 SettingsManager]: * Weq Fattening=true [2018-01-21 08:45:12,730 INFO L133 SettingsManager]: * Flatten before fatten=true [2018-01-21 08:45:12,730 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-21 08:45:12,730 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-21 08:45:12,730 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-21 08:45:12,730 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-21 08:45:12,731 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-21 08:45:12,731 INFO L133 SettingsManager]: * Check allocation purity=true [2018-01-21 08:45:12,731 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-21 08:45:12,731 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-21 08:45:12,731 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-21 08:45:12,731 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-01-21 08:45:12,731 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-21 08:45:12,732 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-01-21 08:45:12,732 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-21 08:45:12,732 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-01-21 08:45:12,732 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-01-21 08:45:12,732 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-21 08:45:12,733 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-21 08:45:12,733 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-21 08:45:12,733 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-21 08:45:12,733 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-21 08:45:12,733 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 08:45:12,733 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-21 08:45:12,734 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-21 08:45:12,734 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-21 08:45:12,734 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-21 08:45:12,734 INFO L133 SettingsManager]: * Stop after first violation was found=false [2018-01-21 08:45:12,734 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-21 08:45:12,734 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-21 08:45:12,734 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-21 08:45:12,734 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-21 08:45:12,734 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-21 08:45:12,735 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-21 08:45:12,735 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-21 08:45:12,768 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-21 08:45:12,778 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-21 08:45:12,781 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-21 08:45:12,782 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-21 08:45:12,783 INFO L276 PluginConnector]: CDTParser initialized [2018-01-21 08:45:12,783 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memsetNonZero3_false-valid-deref-write.c [2018-01-21 08:45:12,935 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-21 08:45:12,940 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-21 08:45:12,940 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-21 08:45:12,940 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-21 08:45:12,946 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-21 08:45:12,947 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 08:45:12" (1/1) ... [2018-01-21 08:45:12,949 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@2c111afb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:45:12, skipping insertion in model container [2018-01-21 08:45:12,950 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 08:45:12" (1/1) ... [2018-01-21 08:45:12,963 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 08:45:12,978 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 08:45:13,085 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 08:45:13,099 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 08:45:13,104 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:45:13 WrapperNode [2018-01-21 08:45:13,104 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-21 08:45:13,105 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-21 08:45:13,105 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-21 08:45:13,105 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-21 08:45:13,116 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:45:13" (1/1) ... [2018-01-21 08:45:13,116 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:45:13" (1/1) ... [2018-01-21 08:45:13,124 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:45:13" (1/1) ... [2018-01-21 08:45:13,124 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:45:13" (1/1) ... [2018-01-21 08:45:13,127 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:45:13" (1/1) ... [2018-01-21 08:45:13,130 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:45:13" (1/1) ... [2018-01-21 08:45:13,132 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:45:13" (1/1) ... [2018-01-21 08:45:13,133 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-21 08:45:13,134 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-21 08:45:13,134 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-21 08:45:13,134 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-21 08:45:13,135 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:45:13" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 08:45:13,178 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-21 08:45:13,179 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-21 08:45:13,179 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-21 08:45:13,179 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-21 08:45:13,179 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-21 08:45:13,179 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-21 08:45:13,179 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-21 08:45:13,180 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-21 08:45:13,180 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-21 08:45:13,180 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-21 08:45:13,180 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-21 08:45:13,180 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-21 08:45:13,309 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-21 08:45:13,310 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 08:45:13 BoogieIcfgContainer [2018-01-21 08:45:13,310 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-21 08:45:13,310 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-21 08:45:13,310 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-21 08:45:13,312 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-21 08:45:13,312 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 21.01 08:45:12" (1/3) ... [2018-01-21 08:45:13,313 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@140fe26b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 08:45:13, skipping insertion in model container [2018-01-21 08:45:13,313 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:45:13" (2/3) ... [2018-01-21 08:45:13,313 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@140fe26b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 08:45:13, skipping insertion in model container [2018-01-21 08:45:13,314 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 08:45:13" (3/3) ... [2018-01-21 08:45:13,315 INFO L105 eAbstractionObserver]: Analyzing ICFG memsetNonZero3_false-valid-deref-write.c [2018-01-21 08:45:13,321 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-21 08:45:13,326 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-01-21 08:45:13,367 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 08:45:13,368 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 08:45:13,368 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 08:45:13,368 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 08:45:13,368 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 08:45:13,368 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 08:45:13,368 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 08:45:13,368 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.initErr0EnsuresViolation======== [2018-01-21 08:45:13,369 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 08:45:13,384 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states. [2018-01-21 08:45:13,388 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-01-21 08:45:13,389 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:13,389 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-01-21 08:45:13,389 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.initErr0EnsuresViolation]=== [2018-01-21 08:45:13,393 INFO L82 PathProgramCache]: Analyzing trace with hash 51896, now seen corresponding path program 1 times [2018-01-21 08:45:13,395 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:13,443 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:13,443 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:13,443 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:13,443 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:13,472 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 08:45:13,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 08:45:13,493 INFO L381 BasicCegarLoop]: Counterexample might be feasible [2018-01-21 08:45:13,498 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-21 08:45:13,503 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 08:45:13,503 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 08:45:13,504 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 08:45:13,504 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 08:45:13,504 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 08:45:13,504 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 08:45:13,504 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 08:45:13,504 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.startErr0EnsuresViolation======== [2018-01-21 08:45:13,504 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 08:45:13,505 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states. [2018-01-21 08:45:13,506 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-01-21 08:45:13,506 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:13,506 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:13,506 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:13,506 INFO L82 PathProgramCache]: Analyzing trace with hash 126067280, now seen corresponding path program 1 times [2018-01-21 08:45:13,506 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:13,507 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:13,507 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:13,508 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:13,508 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:13,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:13,537 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:13,621 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:13,623 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 08:45:13,623 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-21 08:45:13,623 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 08:45:13,625 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-21 08:45:13,636 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-21 08:45:13,636 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-21 08:45:13,638 INFO L87 Difference]: Start difference. First operand 22 states. Second operand 4 states. [2018-01-21 08:45:13,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:13,731 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-01-21 08:45:13,731 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-21 08:45:13,732 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18 [2018-01-21 08:45:13,733 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:13,742 INFO L225 Difference]: With dead ends: 34 [2018-01-21 08:45:13,742 INFO L226 Difference]: Without dead ends: 20 [2018-01-21 08:45:13,746 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-21 08:45:13,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-01-21 08:45:13,837 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-01-21 08:45:13,838 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-01-21 08:45:13,839 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2018-01-21 08:45:13,840 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 18 [2018-01-21 08:45:13,840 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:13,840 INFO L432 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2018-01-21 08:45:13,840 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-21 08:45:13,840 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-01-21 08:45:13,841 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-21 08:45:13,841 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:13,841 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:13,841 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:13,841 INFO L82 PathProgramCache]: Analyzing trace with hash 763300235, now seen corresponding path program 1 times [2018-01-21 08:45:13,841 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:13,842 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:13,842 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:13,842 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:13,843 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:13,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:13,856 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:13,919 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:13,920 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:13,920 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:13,920 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 20 with the following transitions: [2018-01-21 08:45:13,922 INFO L201 CegarAbsIntRunner]: [0], [1], [3], [7], [9], [10], [14], [15], [16], [18], [19], [20], [21], [23], [24], [25], [26], [27], [28] [2018-01-21 08:45:13,965 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-21 08:45:13,966 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-21 08:45:14,855 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-21 08:45:14,857 INFO L268 AbstractInterpreter]: Visited 19 different actions 23 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 15 variables. [2018-01-21 08:45:14,870 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-21 08:45:14,870 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:14,871 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:14,883 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:14,883 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:45:14,912 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:14,917 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:14,941 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:14,941 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:15,087 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:15,122 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:15,122 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:15,127 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:15,127 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:45:15,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:15,153 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:15,158 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:15,159 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:15,251 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:15,253 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:15,253 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-21 08:45:15,253 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:15,254 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-21 08:45:15,254 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-21 08:45:15,255 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-01-21 08:45:15,255 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand 6 states. [2018-01-21 08:45:15,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:15,283 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-01-21 08:45:15,283 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-21 08:45:15,284 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-01-21 08:45:15,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:15,285 INFO L225 Difference]: With dead ends: 30 [2018-01-21 08:45:15,285 INFO L226 Difference]: Without dead ends: 21 [2018-01-21 08:45:15,286 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 80 GetRequests, 70 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-01-21 08:45:15,287 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2018-01-21 08:45:15,289 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-01-21 08:45:15,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-01-21 08:45:15,290 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-01-21 08:45:15,291 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 19 [2018-01-21 08:45:15,291 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:15,291 INFO L432 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-01-21 08:45:15,291 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-21 08:45:15,292 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-01-21 08:45:15,292 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-01-21 08:45:15,292 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:15,292 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:15,293 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:15,293 INFO L82 PathProgramCache]: Analyzing trace with hash -957314640, now seen corresponding path program 2 times [2018-01-21 08:45:15,293 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:15,294 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:15,294 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:15,294 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:15,295 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:15,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:15,309 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:15,374 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:15,375 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:15,375 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:15,375 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:15,375 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:15,375 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:15,375 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:15,391 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:45:15,391 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:15,403 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:15,405 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:15,406 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:15,408 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:15,421 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:15,422 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:15,551 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:15,572 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:15,572 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:15,582 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:45:15,582 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:15,607 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:15,618 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:15,627 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:15,631 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:15,638 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:15,638 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:15,745 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:15,747 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:15,748 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-21 08:45:15,748 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:15,748 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-21 08:45:15,749 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-21 08:45:15,749 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-01-21 08:45:15,749 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 7 states. [2018-01-21 08:45:15,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:15,784 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-01-21 08:45:15,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-21 08:45:15,784 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 20 [2018-01-21 08:45:15,785 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:15,785 INFO L225 Difference]: With dead ends: 31 [2018-01-21 08:45:15,785 INFO L226 Difference]: Without dead ends: 22 [2018-01-21 08:45:15,786 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 73 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=77, Unknown=0, NotChecked=0, Total=132 [2018-01-21 08:45:15,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-01-21 08:45:15,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-01-21 08:45:15,789 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-01-21 08:45:15,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2018-01-21 08:45:15,790 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 20 [2018-01-21 08:45:15,790 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:15,790 INFO L432 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2018-01-21 08:45:15,790 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-21 08:45:15,790 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-01-21 08:45:15,791 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-21 08:45:15,791 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:15,791 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:15,792 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:15,792 INFO L82 PathProgramCache]: Analyzing trace with hash 1538199083, now seen corresponding path program 3 times [2018-01-21 08:45:15,792 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:15,793 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:15,793 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:15,793 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:15,793 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:15,804 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:15,805 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:15,873 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:15,873 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:15,873 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:15,873 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:15,873 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:15,873 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:15,874 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:15,886 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:45:15,886 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:45:15,903 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:15,906 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:15,908 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:15,908 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:15,910 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:15,923 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:15,923 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:16,123 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:16,143 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:16,151 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:16,154 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:45:16,154 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:45:16,166 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:16,173 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:16,181 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:16,186 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:16,189 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:16,192 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:16,193 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:16,234 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:16,236 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:16,236 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-21 08:45:16,236 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:16,237 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-21 08:45:16,237 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-21 08:45:16,237 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-21 08:45:16,238 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 8 states. [2018-01-21 08:45:16,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:16,268 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2018-01-21 08:45:16,269 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-21 08:45:16,269 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 21 [2018-01-21 08:45:16,269 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:16,270 INFO L225 Difference]: With dead ends: 32 [2018-01-21 08:45:16,270 INFO L226 Difference]: Without dead ends: 23 [2018-01-21 08:45:16,270 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 76 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=77, Invalid=105, Unknown=0, NotChecked=0, Total=182 [2018-01-21 08:45:16,270 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-01-21 08:45:16,273 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-01-21 08:45:16,273 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-01-21 08:45:16,274 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 23 transitions. [2018-01-21 08:45:16,274 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 23 transitions. Word has length 21 [2018-01-21 08:45:16,274 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:16,274 INFO L432 AbstractCegarLoop]: Abstraction has 23 states and 23 transitions. [2018-01-21 08:45:16,274 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-21 08:45:16,274 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 23 transitions. [2018-01-21 08:45:16,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-21 08:45:16,275 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:16,275 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:16,275 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:16,275 INFO L82 PathProgramCache]: Analyzing trace with hash 1589713168, now seen corresponding path program 4 times [2018-01-21 08:45:16,275 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:16,276 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:16,276 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:16,276 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:16,276 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:16,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:16,285 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:16,336 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:16,336 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:16,336 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:16,337 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:16,337 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:16,337 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:16,337 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:16,342 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:45:16,342 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:45:16,358 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:16,360 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:16,383 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:16,383 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:16,514 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:16,534 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:16,534 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:16,537 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:45:16,537 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:45:16,559 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:16,561 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:16,565 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:16,565 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:16,617 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:16,619 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:16,619 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-21 08:45:16,619 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:16,620 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-21 08:45:16,620 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-21 08:45:16,620 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-21 08:45:16,621 INFO L87 Difference]: Start difference. First operand 23 states and 23 transitions. Second operand 9 states. [2018-01-21 08:45:16,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:16,664 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 08:45:16,664 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-21 08:45:16,664 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 22 [2018-01-21 08:45:16,664 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:16,665 INFO L225 Difference]: With dead ends: 33 [2018-01-21 08:45:16,665 INFO L226 Difference]: Without dead ends: 24 [2018-01-21 08:45:16,665 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 79 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=103, Invalid=137, Unknown=0, NotChecked=0, Total=240 [2018-01-21 08:45:16,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-01-21 08:45:16,668 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-01-21 08:45:16,669 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-01-21 08:45:16,669 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-01-21 08:45:16,669 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 22 [2018-01-21 08:45:16,670 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:16,670 INFO L432 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-01-21 08:45:16,670 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-21 08:45:16,670 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-01-21 08:45:16,671 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-21 08:45:16,671 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:16,671 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:16,671 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:16,671 INFO L82 PathProgramCache]: Analyzing trace with hash -1108317493, now seen corresponding path program 5 times [2018-01-21 08:45:16,671 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:16,672 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:16,672 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:16,672 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:16,673 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:16,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:16,684 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:16,740 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:16,740 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:16,740 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:16,741 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:16,741 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:16,741 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:16,741 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:16,751 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:45:16,751 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:16,757 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:16,758 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:16,759 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:16,766 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:16,767 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:16,769 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:16,791 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:16,791 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:16,913 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:16,933 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:16,934 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:16,936 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:45:16,937 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:16,941 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:16,943 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:16,946 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:16,957 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:16,964 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:16,967 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:16,971 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:16,971 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:17,031 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:17,033 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:17,033 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-21 08:45:17,034 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:17,034 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-21 08:45:17,034 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-21 08:45:17,034 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-21 08:45:17,035 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 10 states. [2018-01-21 08:45:17,068 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:17,069 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-01-21 08:45:17,069 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-21 08:45:17,069 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 23 [2018-01-21 08:45:17,069 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:17,069 INFO L225 Difference]: With dead ends: 34 [2018-01-21 08:45:17,069 INFO L226 Difference]: Without dead ends: 25 [2018-01-21 08:45:17,070 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 82 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=133, Invalid=173, Unknown=0, NotChecked=0, Total=306 [2018-01-21 08:45:17,070 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-01-21 08:45:17,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-01-21 08:45:17,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-01-21 08:45:17,072 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 25 transitions. [2018-01-21 08:45:17,073 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 25 transitions. Word has length 23 [2018-01-21 08:45:17,073 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:17,073 INFO L432 AbstractCegarLoop]: Abstraction has 25 states and 25 transitions. [2018-01-21 08:45:17,073 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-21 08:45:17,073 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 25 transitions. [2018-01-21 08:45:17,073 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-21 08:45:17,073 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:17,073 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:17,074 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:17,074 INFO L82 PathProgramCache]: Analyzing trace with hash 1152077936, now seen corresponding path program 6 times [2018-01-21 08:45:17,074 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:17,074 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:17,075 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:17,075 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:17,075 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:17,085 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:17,085 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:17,191 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:17,191 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:17,191 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:17,191 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:17,191 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:17,191 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:17,191 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:17,197 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:45:17,197 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:45:17,207 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:17,209 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:17,210 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:17,211 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:17,212 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:17,214 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:17,224 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:17,224 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:17,370 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:17,391 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:17,392 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:17,395 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:45:17,395 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:45:17,416 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:17,423 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:17,432 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:17,440 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:17,446 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:17,449 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:17,457 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:17,457 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:17,520 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:17,522 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:17,522 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-21 08:45:17,522 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:17,523 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-21 08:45:17,523 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-21 08:45:17,523 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-21 08:45:17,524 INFO L87 Difference]: Start difference. First operand 25 states and 25 transitions. Second operand 11 states. [2018-01-21 08:45:17,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:17,546 INFO L93 Difference]: Finished difference Result 35 states and 35 transitions. [2018-01-21 08:45:17,546 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-21 08:45:17,546 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 24 [2018-01-21 08:45:17,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:17,547 INFO L225 Difference]: With dead ends: 35 [2018-01-21 08:45:17,547 INFO L226 Difference]: Without dead ends: 26 [2018-01-21 08:45:17,547 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 85 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=167, Invalid=213, Unknown=0, NotChecked=0, Total=380 [2018-01-21 08:45:17,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-01-21 08:45:17,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-01-21 08:45:17,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-01-21 08:45:17,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 26 transitions. [2018-01-21 08:45:17,551 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 26 transitions. Word has length 24 [2018-01-21 08:45:17,551 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:17,551 INFO L432 AbstractCegarLoop]: Abstraction has 26 states and 26 transitions. [2018-01-21 08:45:17,551 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-21 08:45:17,552 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-01-21 08:45:17,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-21 08:45:17,552 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:17,552 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:17,552 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:17,553 INFO L82 PathProgramCache]: Analyzing trace with hash -1790107797, now seen corresponding path program 7 times [2018-01-21 08:45:17,553 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:17,553 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:17,554 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:17,554 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:17,554 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:17,563 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:17,564 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:17,702 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:17,702 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:17,702 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:17,702 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:17,702 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:17,702 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:17,702 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:17,710 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:17,710 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:45:17,720 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:17,722 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:17,732 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:17,733 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:17,951 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:17,981 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:17,981 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:17,984 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:17,984 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:45:18,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:18,004 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:18,010 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:18,010 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:18,075 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:18,076 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:18,076 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 21 [2018-01-21 08:45:18,076 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:18,077 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-21 08:45:18,077 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-21 08:45:18,077 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=228, Unknown=0, NotChecked=0, Total=420 [2018-01-21 08:45:18,077 INFO L87 Difference]: Start difference. First operand 26 states and 26 transitions. Second operand 12 states. [2018-01-21 08:45:18,101 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:18,102 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-01-21 08:45:18,102 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-21 08:45:18,102 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 25 [2018-01-21 08:45:18,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:18,103 INFO L225 Difference]: With dead ends: 36 [2018-01-21 08:45:18,103 INFO L226 Difference]: Without dead ends: 27 [2018-01-21 08:45:18,103 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 88 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=205, Invalid=257, Unknown=0, NotChecked=0, Total=462 [2018-01-21 08:45:18,104 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-01-21 08:45:18,106 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-01-21 08:45:18,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-01-21 08:45:18,107 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 27 transitions. [2018-01-21 08:45:18,107 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 27 transitions. Word has length 25 [2018-01-21 08:45:18,108 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:18,108 INFO L432 AbstractCegarLoop]: Abstraction has 27 states and 27 transitions. [2018-01-21 08:45:18,108 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-21 08:45:18,108 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-01-21 08:45:18,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-21 08:45:18,109 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:18,109 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:18,109 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:18,109 INFO L82 PathProgramCache]: Analyzing trace with hash 1491414992, now seen corresponding path program 8 times [2018-01-21 08:45:18,109 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:18,110 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:18,110 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:18,110 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:18,110 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:18,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:18,120 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:18,212 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:18,212 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:18,212 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:18,212 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:18,212 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:18,212 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:18,212 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:18,223 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:45:18,223 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:18,232 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:18,235 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:18,236 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:18,238 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:18,246 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:18,246 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:18,472 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:18,503 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:18,503 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:18,506 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:45:18,507 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:18,519 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:18,532 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:18,543 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:18,547 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:18,553 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:18,553 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:18,641 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:18,645 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:18,645 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 23 [2018-01-21 08:45:18,645 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:18,646 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-21 08:45:18,646 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-21 08:45:18,646 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=233, Invalid=273, Unknown=0, NotChecked=0, Total=506 [2018-01-21 08:45:18,646 INFO L87 Difference]: Start difference. First operand 27 states and 27 transitions. Second operand 13 states. [2018-01-21 08:45:18,678 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:18,678 INFO L93 Difference]: Finished difference Result 37 states and 37 transitions. [2018-01-21 08:45:18,679 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-21 08:45:18,679 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 26 [2018-01-21 08:45:18,679 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:18,680 INFO L225 Difference]: With dead ends: 37 [2018-01-21 08:45:18,680 INFO L226 Difference]: Without dead ends: 28 [2018-01-21 08:45:18,680 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 91 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=247, Invalid=305, Unknown=0, NotChecked=0, Total=552 [2018-01-21 08:45:18,680 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-01-21 08:45:18,683 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-01-21 08:45:18,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-01-21 08:45:18,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 28 transitions. [2018-01-21 08:45:18,684 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 28 transitions. Word has length 26 [2018-01-21 08:45:18,684 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:18,685 INFO L432 AbstractCegarLoop]: Abstraction has 28 states and 28 transitions. [2018-01-21 08:45:18,685 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-21 08:45:18,685 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-01-21 08:45:18,685 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-21 08:45:18,685 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:18,686 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:18,686 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:18,686 INFO L82 PathProgramCache]: Analyzing trace with hash 139406347, now seen corresponding path program 9 times [2018-01-21 08:45:18,686 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:18,687 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:18,687 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:18,687 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:18,687 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:18,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:18,695 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:18,776 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:18,776 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:18,776 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:18,777 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:18,777 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:18,777 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:18,777 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:18,782 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:45:18,782 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:45:18,791 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:18,793 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:18,794 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:18,795 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:18,796 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:18,798 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:18,798 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:18,799 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:18,817 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:18,817 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:19,092 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:19,112 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:19,112 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:19,114 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:45:19,115 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:45:19,124 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:19,131 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:19,139 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:19,147 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:19,155 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:19,164 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:19,170 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:19,173 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:19,177 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:19,177 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:19,245 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:19,246 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:19,246 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 25 [2018-01-21 08:45:19,246 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:19,247 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-21 08:45:19,247 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-21 08:45:19,247 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=278, Invalid=322, Unknown=0, NotChecked=0, Total=600 [2018-01-21 08:45:19,247 INFO L87 Difference]: Start difference. First operand 28 states and 28 transitions. Second operand 14 states. [2018-01-21 08:45:19,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:19,281 INFO L93 Difference]: Finished difference Result 38 states and 38 transitions. [2018-01-21 08:45:19,282 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-21 08:45:19,282 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 27 [2018-01-21 08:45:19,282 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:19,283 INFO L225 Difference]: With dead ends: 38 [2018-01-21 08:45:19,283 INFO L226 Difference]: Without dead ends: 29 [2018-01-21 08:45:19,283 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 94 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=293, Invalid=357, Unknown=0, NotChecked=0, Total=650 [2018-01-21 08:45:19,283 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-01-21 08:45:19,286 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-01-21 08:45:19,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-01-21 08:45:19,286 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 29 transitions. [2018-01-21 08:45:19,286 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 29 transitions. Word has length 27 [2018-01-21 08:45:19,286 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:19,287 INFO L432 AbstractCegarLoop]: Abstraction has 29 states and 29 transitions. [2018-01-21 08:45:19,287 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-21 08:45:19,287 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2018-01-21 08:45:19,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-21 08:45:19,287 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:19,288 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:19,288 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:19,288 INFO L82 PathProgramCache]: Analyzing trace with hash 1176811312, now seen corresponding path program 10 times [2018-01-21 08:45:19,288 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:19,289 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:19,289 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:19,289 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:19,289 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:19,295 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:19,296 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:19,401 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:19,401 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:19,401 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:19,401 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:19,401 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:19,402 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:19,402 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:19,406 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:45:19,407 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:45:19,417 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:19,418 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:19,426 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:19,426 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:19,700 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:19,719 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:19,720 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:19,722 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:45:19,722 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:45:19,748 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:19,751 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:19,756 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:19,756 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:19,834 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:19,836 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:19,836 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 27 [2018-01-21 08:45:19,836 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:19,836 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-21 08:45:19,836 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-21 08:45:19,837 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=327, Invalid=375, Unknown=0, NotChecked=0, Total=702 [2018-01-21 08:45:19,837 INFO L87 Difference]: Start difference. First operand 29 states and 29 transitions. Second operand 15 states. [2018-01-21 08:45:19,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:19,874 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-01-21 08:45:19,874 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-21 08:45:19,874 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 28 [2018-01-21 08:45:19,875 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:19,875 INFO L225 Difference]: With dead ends: 39 [2018-01-21 08:45:19,875 INFO L226 Difference]: Without dead ends: 30 [2018-01-21 08:45:19,875 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 125 GetRequests, 97 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=343, Invalid=413, Unknown=0, NotChecked=0, Total=756 [2018-01-21 08:45:19,876 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-01-21 08:45:19,877 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-01-21 08:45:19,878 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-01-21 08:45:19,878 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 30 transitions. [2018-01-21 08:45:19,878 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 30 transitions. Word has length 28 [2018-01-21 08:45:19,878 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:19,878 INFO L432 AbstractCegarLoop]: Abstraction has 30 states and 30 transitions. [2018-01-21 08:45:19,878 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-21 08:45:19,878 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-01-21 08:45:19,879 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-21 08:45:19,879 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:19,879 INFO L322 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:19,879 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:19,879 INFO L82 PathProgramCache]: Analyzing trace with hash -1023373141, now seen corresponding path program 11 times [2018-01-21 08:45:19,879 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:19,880 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:19,880 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:19,880 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:19,880 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:19,887 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:19,888 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:19,974 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:19,975 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:19,975 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:19,975 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:19,975 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:19,975 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:19,975 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:19,980 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:45:19,980 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:19,984 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:19,985 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:19,986 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:19,987 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:19,987 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:19,988 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:19,992 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:19,993 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:19,994 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:20,002 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:20,002 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:20,274 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:20,294 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:20,294 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:20,297 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:45:20,297 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:20,301 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:20,302 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:20,306 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:20,309 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:20,313 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:20,317 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:20,328 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:20,335 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:20,339 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:20,344 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:20,344 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:20,430 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:20,432 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:20,432 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 29 [2018-01-21 08:45:20,432 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:20,432 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-21 08:45:20,433 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-21 08:45:20,433 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=380, Invalid=432, Unknown=0, NotChecked=0, Total=812 [2018-01-21 08:45:20,433 INFO L87 Difference]: Start difference. First operand 30 states and 30 transitions. Second operand 16 states. [2018-01-21 08:45:20,487 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:20,487 INFO L93 Difference]: Finished difference Result 40 states and 40 transitions. [2018-01-21 08:45:20,488 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-21 08:45:20,488 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 29 [2018-01-21 08:45:20,488 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:20,489 INFO L225 Difference]: With dead ends: 40 [2018-01-21 08:45:20,489 INFO L226 Difference]: Without dead ends: 31 [2018-01-21 08:45:20,489 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 130 GetRequests, 100 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=397, Invalid=473, Unknown=0, NotChecked=0, Total=870 [2018-01-21 08:45:20,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2018-01-21 08:45:20,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2018-01-21 08:45:20,493 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-01-21 08:45:20,493 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 31 transitions. [2018-01-21 08:45:20,493 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 31 transitions. Word has length 29 [2018-01-21 08:45:20,494 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:20,494 INFO L432 AbstractCegarLoop]: Abstraction has 31 states and 31 transitions. [2018-01-21 08:45:20,494 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-21 08:45:20,494 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 31 transitions. [2018-01-21 08:45:20,495 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-21 08:45:20,495 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:20,495 INFO L322 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:20,495 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:20,495 INFO L82 PathProgramCache]: Analyzing trace with hash -509614448, now seen corresponding path program 12 times [2018-01-21 08:45:20,496 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:20,496 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:20,496 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:20,497 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:20,497 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:20,504 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:20,505 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:20,604 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:20,604 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:20,605 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:20,605 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:20,605 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:20,605 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:20,605 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:20,610 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:45:20,610 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:45:20,618 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:20,620 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:20,621 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:20,622 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:20,623 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:20,624 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:20,625 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:20,625 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:20,626 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:20,636 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:20,636 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:20,971 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:20,990 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:20,991 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:20,993 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:45:20,993 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:45:21,003 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:21,010 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:21,017 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:21,025 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:21,034 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:21,043 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:21,052 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:21,058 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:21,061 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:21,065 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:21,066 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:21,155 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:21,196 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:21,196 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 31 [2018-01-21 08:45:21,196 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:21,197 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-21 08:45:21,197 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-21 08:45:21,197 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=437, Invalid=493, Unknown=0, NotChecked=0, Total=930 [2018-01-21 08:45:21,197 INFO L87 Difference]: Start difference. First operand 31 states and 31 transitions. Second operand 17 states. [2018-01-21 08:45:21,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:21,221 INFO L93 Difference]: Finished difference Result 41 states and 41 transitions. [2018-01-21 08:45:21,222 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-21 08:45:21,222 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 30 [2018-01-21 08:45:21,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:21,222 INFO L225 Difference]: With dead ends: 41 [2018-01-21 08:45:21,223 INFO L226 Difference]: Without dead ends: 32 [2018-01-21 08:45:21,223 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 103 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=455, Invalid=537, Unknown=0, NotChecked=0, Total=992 [2018-01-21 08:45:21,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-01-21 08:45:21,225 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2018-01-21 08:45:21,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-01-21 08:45:21,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 32 transitions. [2018-01-21 08:45:21,225 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 32 transitions. Word has length 30 [2018-01-21 08:45:21,226 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:21,226 INFO L432 AbstractCegarLoop]: Abstraction has 32 states and 32 transitions. [2018-01-21 08:45:21,226 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-21 08:45:21,226 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2018-01-21 08:45:21,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-21 08:45:21,226 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:21,226 INFO L322 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:21,226 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:21,226 INFO L82 PathProgramCache]: Analyzing trace with hash -1762964149, now seen corresponding path program 13 times [2018-01-21 08:45:21,227 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:21,227 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:21,227 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:21,227 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:21,227 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:21,234 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:21,235 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:21,332 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:21,332 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:21,332 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:21,332 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:21,332 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:21,332 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:21,332 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:21,337 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:21,337 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:45:21,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:21,348 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:21,357 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:21,358 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:21,718 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:21,742 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:21,742 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:21,745 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:21,745 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:45:21,766 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:21,769 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:21,774 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:21,774 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:21,919 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:21,920 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:21,920 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 33 [2018-01-21 08:45:21,920 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:21,921 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-21 08:45:21,921 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-21 08:45:21,921 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=498, Invalid=558, Unknown=0, NotChecked=0, Total=1056 [2018-01-21 08:45:21,921 INFO L87 Difference]: Start difference. First operand 32 states and 32 transitions. Second operand 18 states. [2018-01-21 08:45:21,948 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:21,948 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-01-21 08:45:21,949 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-21 08:45:21,949 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 31 [2018-01-21 08:45:21,949 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:21,950 INFO L225 Difference]: With dead ends: 42 [2018-01-21 08:45:21,950 INFO L226 Difference]: Without dead ends: 33 [2018-01-21 08:45:21,950 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 140 GetRequests, 106 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=517, Invalid=605, Unknown=0, NotChecked=0, Total=1122 [2018-01-21 08:45:21,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-01-21 08:45:21,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2018-01-21 08:45:21,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-01-21 08:45:21,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 33 transitions. [2018-01-21 08:45:21,954 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 33 transitions. Word has length 31 [2018-01-21 08:45:21,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:21,954 INFO L432 AbstractCegarLoop]: Abstraction has 33 states and 33 transitions. [2018-01-21 08:45:21,954 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-21 08:45:21,955 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-01-21 08:45:21,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-21 08:45:21,955 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:21,955 INFO L322 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:21,955 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:21,955 INFO L82 PathProgramCache]: Analyzing trace with hash -1962099216, now seen corresponding path program 14 times [2018-01-21 08:45:21,955 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:21,956 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:21,956 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:21,956 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:21,956 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:21,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:21,964 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:22,108 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:22,108 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:22,108 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:22,108 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:22,109 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:22,109 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:22,109 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:22,122 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:45:22,123 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:22,134 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:22,140 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:22,142 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:22,143 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:22,157 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:22,157 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:22,574 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:22,607 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:22,608 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:22,611 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:45:22,611 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:22,623 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:22,633 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:22,643 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:22,646 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:22,652 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:22,652 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:22,817 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:22,818 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:22,818 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 35 [2018-01-21 08:45:22,819 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:22,819 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-21 08:45:22,819 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-21 08:45:22,820 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=563, Invalid=627, Unknown=0, NotChecked=0, Total=1190 [2018-01-21 08:45:22,820 INFO L87 Difference]: Start difference. First operand 33 states and 33 transitions. Second operand 19 states. [2018-01-21 08:45:22,864 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:22,865 INFO L93 Difference]: Finished difference Result 43 states and 43 transitions. [2018-01-21 08:45:22,865 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-21 08:45:22,865 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 32 [2018-01-21 08:45:22,866 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:22,866 INFO L225 Difference]: With dead ends: 43 [2018-01-21 08:45:22,866 INFO L226 Difference]: Without dead ends: 34 [2018-01-21 08:45:22,867 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 145 GetRequests, 109 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 87 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=583, Invalid=677, Unknown=0, NotChecked=0, Total=1260 [2018-01-21 08:45:22,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-01-21 08:45:22,870 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-01-21 08:45:22,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-01-21 08:45:22,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2018-01-21 08:45:22,871 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 32 [2018-01-21 08:45:22,871 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:22,871 INFO L432 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2018-01-21 08:45:22,871 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-21 08:45:22,871 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-01-21 08:45:22,872 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-21 08:45:22,872 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:22,872 INFO L322 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:22,872 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:22,872 INFO L82 PathProgramCache]: Analyzing trace with hash 454648299, now seen corresponding path program 15 times [2018-01-21 08:45:22,873 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:22,873 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:22,873 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:22,874 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:22,874 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:22,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:22,882 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:23,228 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:23,229 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:23,229 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:23,229 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:23,229 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:23,229 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:23,229 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:23,242 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:45:23,242 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:45:23,252 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:23,255 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:23,257 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:23,258 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:23,260 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:23,262 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:23,263 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:23,265 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:23,267 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:23,268 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:23,270 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:23,287 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:23,288 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:24,068 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:24,100 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:24,101 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:24,104 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:45:24,104 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:45:24,117 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:24,127 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:24,139 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:24,148 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:24,158 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:24,168 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:24,178 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:24,189 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:24,200 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:24,208 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:24,211 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:24,215 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:24,216 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:24,335 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:24,337 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:24,337 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 37 [2018-01-21 08:45:24,337 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:24,337 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-21 08:45:24,337 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-21 08:45:24,338 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=632, Invalid=700, Unknown=0, NotChecked=0, Total=1332 [2018-01-21 08:45:24,338 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand 20 states. [2018-01-21 08:45:24,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:24,370 INFO L93 Difference]: Finished difference Result 44 states and 44 transitions. [2018-01-21 08:45:24,370 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-21 08:45:24,370 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 33 [2018-01-21 08:45:24,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:24,371 INFO L225 Difference]: With dead ends: 44 [2018-01-21 08:45:24,371 INFO L226 Difference]: Without dead ends: 35 [2018-01-21 08:45:24,372 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 112 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=653, Invalid=753, Unknown=0, NotChecked=0, Total=1406 [2018-01-21 08:45:24,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-01-21 08:45:24,375 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 35. [2018-01-21 08:45:24,375 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-01-21 08:45:24,376 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 35 transitions. [2018-01-21 08:45:24,376 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 35 transitions. Word has length 33 [2018-01-21 08:45:24,376 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:24,376 INFO L432 AbstractCegarLoop]: Abstraction has 35 states and 35 transitions. [2018-01-21 08:45:24,376 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-21 08:45:24,376 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 35 transitions. [2018-01-21 08:45:24,377 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-21 08:45:24,377 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:24,377 INFO L322 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:24,377 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:24,377 INFO L82 PathProgramCache]: Analyzing trace with hash -1935590064, now seen corresponding path program 16 times [2018-01-21 08:45:24,378 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:24,378 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:24,378 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:24,379 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:24,379 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:24,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:24,387 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:24,638 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:24,638 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:24,638 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:24,638 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:24,639 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:24,639 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:24,639 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:24,646 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:45:24,646 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:45:24,660 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:24,662 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:24,680 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:24,680 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:25,261 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:25,282 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:25,283 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:25,286 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:45:25,286 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:45:25,316 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:25,319 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:25,324 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:25,324 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:25,468 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:25,469 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:25,469 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 39 [2018-01-21 08:45:25,469 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:25,469 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-21 08:45:25,469 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-21 08:45:25,470 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=705, Invalid=777, Unknown=0, NotChecked=0, Total=1482 [2018-01-21 08:45:25,470 INFO L87 Difference]: Start difference. First operand 35 states and 35 transitions. Second operand 21 states. [2018-01-21 08:45:25,509 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:25,509 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-01-21 08:45:25,511 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-21 08:45:25,511 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 34 [2018-01-21 08:45:25,511 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:25,512 INFO L225 Difference]: With dead ends: 45 [2018-01-21 08:45:25,512 INFO L226 Difference]: Without dead ends: 36 [2018-01-21 08:45:25,513 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 115 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=727, Invalid=833, Unknown=0, NotChecked=0, Total=1560 [2018-01-21 08:45:25,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-01-21 08:45:25,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-01-21 08:45:25,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-01-21 08:45:25,516 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-01-21 08:45:25,516 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 34 [2018-01-21 08:45:25,516 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:25,517 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-01-21 08:45:25,517 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-21 08:45:25,517 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-01-21 08:45:25,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-21 08:45:25,518 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:25,518 INFO L322 BasicCegarLoop]: trace histogram [17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:25,518 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:25,518 INFO L82 PathProgramCache]: Analyzing trace with hash 1276432011, now seen corresponding path program 17 times [2018-01-21 08:45:25,518 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:25,519 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:25,519 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:25,519 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:25,519 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:25,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:25,525 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:25,697 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:25,698 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:25,698 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:25,698 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:25,698 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:25,698 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:25,698 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:25,704 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:45:25,704 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:25,709 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:25,710 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:25,711 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:25,711 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:25,712 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:25,713 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:25,714 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:25,715 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:25,715 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:25,720 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:25,721 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:25,722 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:25,730 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:25,730 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:26,256 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:26,276 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:26,276 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:26,279 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:45:26,279 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:26,283 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:26,285 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:26,288 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:26,292 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:26,296 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:26,300 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:26,305 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:26,310 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:26,315 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:26,327 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:26,336 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:26,339 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:26,343 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:26,343 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:26,475 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:26,476 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:26,476 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 41 [2018-01-21 08:45:26,476 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:26,476 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-21 08:45:26,476 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-21 08:45:26,477 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=782, Invalid=858, Unknown=0, NotChecked=0, Total=1640 [2018-01-21 08:45:26,477 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 22 states. [2018-01-21 08:45:26,511 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:26,511 INFO L93 Difference]: Finished difference Result 46 states and 46 transitions. [2018-01-21 08:45:26,511 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-21 08:45:26,511 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 35 [2018-01-21 08:45:26,511 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:26,512 INFO L225 Difference]: With dead ends: 46 [2018-01-21 08:45:26,512 INFO L226 Difference]: Without dead ends: 37 [2018-01-21 08:45:26,512 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 160 GetRequests, 118 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=805, Invalid=917, Unknown=0, NotChecked=0, Total=1722 [2018-01-21 08:45:26,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-01-21 08:45:26,515 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 37. [2018-01-21 08:45:26,515 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-01-21 08:45:26,515 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 37 transitions. [2018-01-21 08:45:26,515 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 37 transitions. Word has length 35 [2018-01-21 08:45:26,515 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:26,515 INFO L432 AbstractCegarLoop]: Abstraction has 37 states and 37 transitions. [2018-01-21 08:45:26,515 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-21 08:45:26,516 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 37 transitions. [2018-01-21 08:45:26,516 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-21 08:45:26,516 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:26,516 INFO L322 BasicCegarLoop]: trace histogram [18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:26,516 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:26,516 INFO L82 PathProgramCache]: Analyzing trace with hash 2064868528, now seen corresponding path program 18 times [2018-01-21 08:45:26,516 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:26,517 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:26,517 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:26,517 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:26,517 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:26,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:26,525 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:26,733 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:26,733 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:26,733 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:26,733 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:26,734 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:26,734 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:26,734 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:26,740 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:45:26,740 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:45:26,750 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:26,764 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:26,765 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:26,779 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:26,780 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:26,794 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:26,808 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:26,822 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:26,823 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:26,824 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:26,825 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:26,827 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:26,837 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:26,837 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:27,393 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:27,412 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:27,413 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:27,415 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:45:27,416 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:45:27,426 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:27,433 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:27,441 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:27,449 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:27,458 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:27,467 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:27,477 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:27,487 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:27,497 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:27,508 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:27,517 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:27,520 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:27,525 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:27,525 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:27,666 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:27,667 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:27,667 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 43 [2018-01-21 08:45:27,667 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:27,667 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-21 08:45:27,668 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-21 08:45:27,668 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=863, Invalid=943, Unknown=0, NotChecked=0, Total=1806 [2018-01-21 08:45:27,668 INFO L87 Difference]: Start difference. First operand 37 states and 37 transitions. Second operand 23 states. [2018-01-21 08:45:27,699 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:27,700 INFO L93 Difference]: Finished difference Result 47 states and 47 transitions. [2018-01-21 08:45:27,700 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-21 08:45:27,700 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 36 [2018-01-21 08:45:27,700 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:27,700 INFO L225 Difference]: With dead ends: 47 [2018-01-21 08:45:27,701 INFO L226 Difference]: Without dead ends: 38 [2018-01-21 08:45:27,701 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 121 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=887, Invalid=1005, Unknown=0, NotChecked=0, Total=1892 [2018-01-21 08:45:27,701 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2018-01-21 08:45:27,703 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2018-01-21 08:45:27,703 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-01-21 08:45:27,704 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 38 transitions. [2018-01-21 08:45:27,704 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 38 transitions. Word has length 36 [2018-01-21 08:45:27,704 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:27,704 INFO L432 AbstractCegarLoop]: Abstraction has 38 states and 38 transitions. [2018-01-21 08:45:27,704 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-21 08:45:27,704 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-01-21 08:45:27,705 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-21 08:45:27,705 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:27,705 INFO L322 BasicCegarLoop]: trace histogram [19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:27,705 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:27,705 INFO L82 PathProgramCache]: Analyzing trace with hash 736596779, now seen corresponding path program 19 times [2018-01-21 08:45:27,705 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:27,706 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:27,706 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:27,706 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:27,706 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:27,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:27,712 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:27,900 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:27,901 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:27,901 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:27,901 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:27,901 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:27,901 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:27,901 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:27,906 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:27,906 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:45:27,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:27,919 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:27,927 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:27,927 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:28,537 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:28,556 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:28,556 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:28,559 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:28,559 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:45:28,585 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:28,588 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:28,593 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:28,593 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:28,743 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:28,744 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:28,744 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 45 [2018-01-21 08:45:28,744 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:28,744 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-21 08:45:28,744 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-21 08:45:28,745 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=948, Invalid=1032, Unknown=0, NotChecked=0, Total=1980 [2018-01-21 08:45:28,745 INFO L87 Difference]: Start difference. First operand 38 states and 38 transitions. Second operand 24 states. [2018-01-21 08:45:28,792 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:28,792 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-01-21 08:45:28,792 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-21 08:45:28,792 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 37 [2018-01-21 08:45:28,793 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:28,793 INFO L225 Difference]: With dead ends: 48 [2018-01-21 08:45:28,793 INFO L226 Difference]: Without dead ends: 39 [2018-01-21 08:45:28,794 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 170 GetRequests, 124 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=973, Invalid=1097, Unknown=0, NotChecked=0, Total=2070 [2018-01-21 08:45:28,794 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-01-21 08:45:28,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-01-21 08:45:28,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-01-21 08:45:28,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 39 transitions. [2018-01-21 08:45:28,796 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 39 transitions. Word has length 37 [2018-01-21 08:45:28,796 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:28,796 INFO L432 AbstractCegarLoop]: Abstraction has 39 states and 39 transitions. [2018-01-21 08:45:28,796 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-21 08:45:28,796 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-01-21 08:45:28,802 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-21 08:45:28,803 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:28,803 INFO L322 BasicCegarLoop]: trace histogram [20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:28,803 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:28,803 INFO L82 PathProgramCache]: Analyzing trace with hash -1785121776, now seen corresponding path program 20 times [2018-01-21 08:45:28,803 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:28,804 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:28,804 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:28,804 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:28,804 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:28,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:28,809 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:28,997 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:28,997 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:28,997 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:28,997 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:28,997 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:28,997 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:28,998 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:29,002 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:45:29,002 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:29,009 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:29,014 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:29,015 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:29,016 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:29,024 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:29,024 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:29,693 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:29,712 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:29,712 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:29,715 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:45:29,715 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:29,725 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:29,737 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:29,747 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:29,750 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:29,756 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:29,756 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:29,919 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:29,920 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:29,920 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 47 [2018-01-21 08:45:29,920 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:29,920 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-21 08:45:29,920 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-21 08:45:29,921 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1037, Invalid=1125, Unknown=0, NotChecked=0, Total=2162 [2018-01-21 08:45:29,921 INFO L87 Difference]: Start difference. First operand 39 states and 39 transitions. Second operand 25 states. [2018-01-21 08:45:29,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:29,966 INFO L93 Difference]: Finished difference Result 49 states and 49 transitions. [2018-01-21 08:45:29,966 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-21 08:45:29,966 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 38 [2018-01-21 08:45:29,966 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:29,966 INFO L225 Difference]: With dead ends: 49 [2018-01-21 08:45:29,966 INFO L226 Difference]: Without dead ends: 40 [2018-01-21 08:45:29,967 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 127 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 123 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1063, Invalid=1193, Unknown=0, NotChecked=0, Total=2256 [2018-01-21 08:45:29,967 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-01-21 08:45:29,969 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2018-01-21 08:45:29,969 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-01-21 08:45:29,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 40 transitions. [2018-01-21 08:45:29,969 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 40 transitions. Word has length 38 [2018-01-21 08:45:29,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:29,969 INFO L432 AbstractCegarLoop]: Abstraction has 40 states and 40 transitions. [2018-01-21 08:45:29,970 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-21 08:45:29,970 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 40 transitions. [2018-01-21 08:45:29,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-21 08:45:29,970 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:29,970 INFO L322 BasicCegarLoop]: trace histogram [21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:29,970 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:29,970 INFO L82 PathProgramCache]: Analyzing trace with hash 1645981643, now seen corresponding path program 21 times [2018-01-21 08:45:29,970 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:29,971 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:29,971 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:29,971 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:29,971 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:29,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:29,978 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:30,179 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:30,179 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:30,179 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:30,179 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:30,179 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:30,179 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:30,180 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:30,184 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:45:30,184 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:45:30,192 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:30,194 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:30,195 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:30,196 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:30,197 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:30,198 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:30,199 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:30,200 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:30,201 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:30,202 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:30,203 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:30,204 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:30,205 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:30,206 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:30,215 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:30,215 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:30,927 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:30,947 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:30,947 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:30,956 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:45:30,956 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:45:30,966 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:30,972 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:30,980 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:30,988 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:30,997 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:31,006 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:31,015 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:31,025 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:31,035 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:31,046 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:31,057 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:31,068 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:31,077 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:31,080 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:31,085 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:31,085 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:31,247 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:31,248 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:31,249 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 49 [2018-01-21 08:45:31,249 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:31,249 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-21 08:45:31,249 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-21 08:45:31,250 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1130, Invalid=1222, Unknown=0, NotChecked=0, Total=2352 [2018-01-21 08:45:31,250 INFO L87 Difference]: Start difference. First operand 40 states and 40 transitions. Second operand 26 states. [2018-01-21 08:45:31,280 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:31,280 INFO L93 Difference]: Finished difference Result 50 states and 50 transitions. [2018-01-21 08:45:31,281 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-21 08:45:31,281 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 39 [2018-01-21 08:45:31,281 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:31,281 INFO L225 Difference]: With dead ends: 50 [2018-01-21 08:45:31,281 INFO L226 Difference]: Without dead ends: 41 [2018-01-21 08:45:31,282 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 180 GetRequests, 130 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 129 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1157, Invalid=1293, Unknown=0, NotChecked=0, Total=2450 [2018-01-21 08:45:31,282 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-01-21 08:45:31,284 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. [2018-01-21 08:45:31,284 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-01-21 08:45:31,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 41 transitions. [2018-01-21 08:45:31,285 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 41 transitions. Word has length 39 [2018-01-21 08:45:31,285 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:31,285 INFO L432 AbstractCegarLoop]: Abstraction has 41 states and 41 transitions. [2018-01-21 08:45:31,285 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-21 08:45:31,285 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 41 transitions. [2018-01-21 08:45:31,285 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-21 08:45:31,285 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:31,285 INFO L322 BasicCegarLoop]: trace histogram [22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:31,285 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:31,286 INFO L82 PathProgramCache]: Analyzing trace with hash 636005232, now seen corresponding path program 22 times [2018-01-21 08:45:31,286 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:31,286 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:31,286 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:31,286 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:31,286 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:31,292 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:31,292 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:31,492 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:31,492 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:31,492 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:31,492 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:31,492 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:31,492 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:31,492 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:31,498 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:45:31,498 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:45:31,511 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:31,512 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:31,521 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:31,521 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:32,317 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:32,336 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:32,337 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:32,339 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:45:32,339 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:45:32,374 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:32,377 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:32,382 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:32,382 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:32,558 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:32,559 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:32,559 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 51 [2018-01-21 08:45:32,559 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:32,559 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-21 08:45:32,560 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-21 08:45:32,560 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1227, Invalid=1323, Unknown=0, NotChecked=0, Total=2550 [2018-01-21 08:45:32,560 INFO L87 Difference]: Start difference. First operand 41 states and 41 transitions. Second operand 27 states. [2018-01-21 08:45:32,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:32,595 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-01-21 08:45:32,595 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-21 08:45:32,596 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 40 [2018-01-21 08:45:32,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:32,596 INFO L225 Difference]: With dead ends: 51 [2018-01-21 08:45:32,596 INFO L226 Difference]: Without dead ends: 42 [2018-01-21 08:45:32,597 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 185 GetRequests, 133 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 135 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1255, Invalid=1397, Unknown=0, NotChecked=0, Total=2652 [2018-01-21 08:45:32,597 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-01-21 08:45:32,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2018-01-21 08:45:32,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-01-21 08:45:32,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 42 transitions. [2018-01-21 08:45:32,599 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 42 transitions. Word has length 40 [2018-01-21 08:45:32,599 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:32,599 INFO L432 AbstractCegarLoop]: Abstraction has 42 states and 42 transitions. [2018-01-21 08:45:32,600 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-21 08:45:32,600 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-01-21 08:45:32,600 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-21 08:45:32,600 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:32,600 INFO L322 BasicCegarLoop]: trace histogram [23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:32,600 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:32,600 INFO L82 PathProgramCache]: Analyzing trace with hash -608492437, now seen corresponding path program 23 times [2018-01-21 08:45:32,601 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:32,601 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:32,601 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:32,601 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:32,601 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:32,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:32,609 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:32,844 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:32,845 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:32,845 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:32,845 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:32,845 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:32,845 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:32,845 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:32,850 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:45:32,850 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:32,854 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:32,855 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:32,856 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:32,857 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:32,857 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:32,858 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:32,859 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:32,860 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:32,861 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:32,861 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:32,862 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:32,863 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:32,868 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:32,869 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:32,871 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:32,879 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:32,879 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:33,709 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:33,728 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:33,728 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:33,731 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:45:33,731 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:33,735 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:33,737 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:33,740 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:33,746 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:33,751 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:33,756 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:33,760 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:33,765 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:33,771 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:33,777 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:33,783 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:33,790 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:33,802 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:33,812 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:33,815 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:33,824 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:33,824 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:34,049 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:34,049 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:34,050 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 53 [2018-01-21 08:45:34,050 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:34,050 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-21 08:45:34,050 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-21 08:45:34,051 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1328, Invalid=1428, Unknown=0, NotChecked=0, Total=2756 [2018-01-21 08:45:34,051 INFO L87 Difference]: Start difference. First operand 42 states and 42 transitions. Second operand 28 states. [2018-01-21 08:45:34,080 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:34,080 INFO L93 Difference]: Finished difference Result 52 states and 52 transitions. [2018-01-21 08:45:34,080 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-21 08:45:34,081 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 41 [2018-01-21 08:45:34,081 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:34,081 INFO L225 Difference]: With dead ends: 52 [2018-01-21 08:45:34,081 INFO L226 Difference]: Without dead ends: 43 [2018-01-21 08:45:34,082 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 190 GetRequests, 136 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 141 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1357, Invalid=1505, Unknown=0, NotChecked=0, Total=2862 [2018-01-21 08:45:34,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-01-21 08:45:34,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2018-01-21 08:45:34,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-01-21 08:45:34,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 43 transitions. [2018-01-21 08:45:34,085 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 43 transitions. Word has length 41 [2018-01-21 08:45:34,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:34,085 INFO L432 AbstractCegarLoop]: Abstraction has 43 states and 43 transitions. [2018-01-21 08:45:34,085 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-21 08:45:34,085 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 43 transitions. [2018-01-21 08:45:34,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-21 08:45:34,086 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:34,086 INFO L322 BasicCegarLoop]: trace histogram [24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:34,086 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:34,086 INFO L82 PathProgramCache]: Analyzing trace with hash -533214512, now seen corresponding path program 24 times [2018-01-21 08:45:34,086 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:34,086 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:34,087 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:34,087 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:34,087 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:34,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:34,093 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:34,320 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:34,320 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:34,320 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:34,320 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:34,320 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:34,320 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:34,320 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:34,326 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:45:34,326 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:45:34,333 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:34,335 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:34,336 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:34,337 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:34,338 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:34,339 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:34,340 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:34,341 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:34,342 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:34,343 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:34,344 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:34,345 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:34,346 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:34,347 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:34,348 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:34,358 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:34,358 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:35,251 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:35,280 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:35,280 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:35,283 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:45:35,283 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:45:35,294 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:35,301 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:35,309 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:35,317 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:35,325 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:35,334 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:35,344 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:35,354 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:35,364 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:35,375 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:35,386 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:35,398 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:35,411 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:35,420 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:35,423 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:35,428 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:35,429 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:35,645 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:35,646 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:35,647 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 55 [2018-01-21 08:45:35,647 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:35,647 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-21 08:45:35,648 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-21 08:45:35,648 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1433, Invalid=1537, Unknown=0, NotChecked=0, Total=2970 [2018-01-21 08:45:35,649 INFO L87 Difference]: Start difference. First operand 43 states and 43 transitions. Second operand 29 states. [2018-01-21 08:45:35,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:35,683 INFO L93 Difference]: Finished difference Result 53 states and 53 transitions. [2018-01-21 08:45:35,683 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-21 08:45:35,683 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 42 [2018-01-21 08:45:35,683 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:35,683 INFO L225 Difference]: With dead ends: 53 [2018-01-21 08:45:35,683 INFO L226 Difference]: Without dead ends: 44 [2018-01-21 08:45:35,684 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 195 GetRequests, 139 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 147 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1463, Invalid=1617, Unknown=0, NotChecked=0, Total=3080 [2018-01-21 08:45:35,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-01-21 08:45:35,687 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-01-21 08:45:35,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-01-21 08:45:35,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 44 transitions. [2018-01-21 08:45:35,687 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 44 transitions. Word has length 42 [2018-01-21 08:45:35,687 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:35,687 INFO L432 AbstractCegarLoop]: Abstraction has 44 states and 44 transitions. [2018-01-21 08:45:35,687 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-21 08:45:35,687 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 44 transitions. [2018-01-21 08:45:35,688 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-21 08:45:35,688 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:35,688 INFO L322 BasicCegarLoop]: trace histogram [25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:35,688 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:35,688 INFO L82 PathProgramCache]: Analyzing trace with hash 1800401163, now seen corresponding path program 25 times [2018-01-21 08:45:35,688 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:35,689 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:35,689 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:35,689 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:35,689 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:35,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:35,697 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:36,011 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:36,011 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:36,011 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:36,011 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:36,011 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:36,011 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:36,012 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:36,016 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:36,016 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:45:36,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:36,030 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:36,039 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:36,039 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:37,006 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:37,026 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:37,026 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:37,033 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:37,033 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:45:37,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:37,063 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:37,069 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:37,069 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:37,274 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:37,275 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:37,275 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 57 [2018-01-21 08:45:37,275 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:37,275 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-21 08:45:37,276 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-21 08:45:37,277 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1542, Invalid=1650, Unknown=0, NotChecked=0, Total=3192 [2018-01-21 08:45:37,277 INFO L87 Difference]: Start difference. First operand 44 states and 44 transitions. Second operand 30 states. [2018-01-21 08:45:37,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:37,313 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2018-01-21 08:45:37,314 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-21 08:45:37,314 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 43 [2018-01-21 08:45:37,314 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:37,314 INFO L225 Difference]: With dead ends: 54 [2018-01-21 08:45:37,314 INFO L226 Difference]: Without dead ends: 45 [2018-01-21 08:45:37,315 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 200 GetRequests, 142 SyntacticMatches, 2 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 153 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1573, Invalid=1733, Unknown=0, NotChecked=0, Total=3306 [2018-01-21 08:45:37,315 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-01-21 08:45:37,317 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-01-21 08:45:37,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-01-21 08:45:37,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 45 transitions. [2018-01-21 08:45:37,317 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 45 transitions. Word has length 43 [2018-01-21 08:45:37,318 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:37,318 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 45 transitions. [2018-01-21 08:45:37,318 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-21 08:45:37,318 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 45 transitions. [2018-01-21 08:45:37,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-21 08:45:37,318 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:37,318 INFO L322 BasicCegarLoop]: trace histogram [26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:37,318 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:37,318 INFO L82 PathProgramCache]: Analyzing trace with hash 1128043056, now seen corresponding path program 26 times [2018-01-21 08:45:37,318 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:37,319 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:37,319 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:37,319 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:37,319 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:37,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:37,326 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:37,615 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:37,615 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:37,615 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:37,615 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:37,615 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:37,615 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:37,615 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:37,621 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:45:37,621 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:37,627 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:37,633 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:37,634 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:37,636 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:37,645 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:37,645 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:38,670 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:38,690 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:38,690 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:38,693 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:45:38,693 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:38,703 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:38,718 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:38,730 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:38,733 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:38,739 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:38,739 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:38,952 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:38,953 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:38,953 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 59 [2018-01-21 08:45:38,953 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:38,954 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-01-21 08:45:38,954 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-01-21 08:45:38,954 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1655, Invalid=1767, Unknown=0, NotChecked=0, Total=3422 [2018-01-21 08:45:38,954 INFO L87 Difference]: Start difference. First operand 45 states and 45 transitions. Second operand 31 states. [2018-01-21 08:45:39,012 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:39,012 INFO L93 Difference]: Finished difference Result 55 states and 55 transitions. [2018-01-21 08:45:39,012 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-01-21 08:45:39,012 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 44 [2018-01-21 08:45:39,013 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:39,013 INFO L225 Difference]: With dead ends: 55 [2018-01-21 08:45:39,013 INFO L226 Difference]: Without dead ends: 46 [2018-01-21 08:45:39,014 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 205 GetRequests, 145 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 159 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1687, Invalid=1853, Unknown=0, NotChecked=0, Total=3540 [2018-01-21 08:45:39,014 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-01-21 08:45:39,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2018-01-21 08:45:39,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-01-21 08:45:39,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 46 transitions. [2018-01-21 08:45:39,017 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 46 transitions. Word has length 44 [2018-01-21 08:45:39,018 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:39,018 INFO L432 AbstractCegarLoop]: Abstraction has 46 states and 46 transitions. [2018-01-21 08:45:39,018 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-01-21 08:45:39,018 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 46 transitions. [2018-01-21 08:45:39,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-21 08:45:39,018 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:39,019 INFO L322 BasicCegarLoop]: trace histogram [27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:39,019 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:39,019 INFO L82 PathProgramCache]: Analyzing trace with hash 1759778219, now seen corresponding path program 27 times [2018-01-21 08:45:39,019 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:39,020 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:39,020 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:39,020 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:39,020 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:39,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:39,029 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:39,319 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:39,319 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:39,319 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:39,320 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:39,320 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:39,320 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:39,320 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:39,325 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:45:39,325 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:45:39,332 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:39,333 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:39,334 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:39,335 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:39,336 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:39,337 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:39,338 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:39,340 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:39,341 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:39,342 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:39,343 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:39,344 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:39,346 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:39,347 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:39,348 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:39,348 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:39,350 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:39,359 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:39,359 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:40,442 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:40,462 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:40,462 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:40,465 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:45:40,466 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:45:40,476 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:40,483 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:40,491 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:40,500 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:40,509 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:40,518 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:40,528 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:40,538 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:40,549 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:40,561 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:40,573 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:40,585 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:40,598 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:40,611 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:40,625 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:40,634 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:40,638 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:40,644 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:40,644 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:40,887 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:40,888 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:40,888 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 61 [2018-01-21 08:45:40,888 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:40,888 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-21 08:45:40,889 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-21 08:45:40,889 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1772, Invalid=1888, Unknown=0, NotChecked=0, Total=3660 [2018-01-21 08:45:40,889 INFO L87 Difference]: Start difference. First operand 46 states and 46 transitions. Second operand 32 states. [2018-01-21 08:45:40,962 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:40,962 INFO L93 Difference]: Finished difference Result 56 states and 56 transitions. [2018-01-21 08:45:40,962 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-21 08:45:40,963 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 45 [2018-01-21 08:45:40,963 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:40,963 INFO L225 Difference]: With dead ends: 56 [2018-01-21 08:45:40,963 INFO L226 Difference]: Without dead ends: 47 [2018-01-21 08:45:40,963 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 210 GetRequests, 148 SyntacticMatches, 2 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 165 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1805, Invalid=1977, Unknown=0, NotChecked=0, Total=3782 [2018-01-21 08:45:40,964 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-01-21 08:45:40,965 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2018-01-21 08:45:40,965 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-01-21 08:45:40,966 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 47 transitions. [2018-01-21 08:45:40,966 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 47 transitions. Word has length 45 [2018-01-21 08:45:40,966 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:40,966 INFO L432 AbstractCegarLoop]: Abstraction has 47 states and 47 transitions. [2018-01-21 08:45:40,966 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-21 08:45:40,966 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 47 transitions. [2018-01-21 08:45:40,966 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-21 08:45:40,966 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:40,966 INFO L322 BasicCegarLoop]: trace histogram [28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:40,967 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:40,967 INFO L82 PathProgramCache]: Analyzing trace with hash -131268208, now seen corresponding path program 28 times [2018-01-21 08:45:40,967 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:40,967 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:40,967 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:40,967 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:40,968 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:40,974 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:40,975 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:41,285 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:41,285 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:41,285 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:41,286 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:41,286 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:41,286 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:41,286 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:41,291 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:45:41,291 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:45:41,306 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:41,308 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:41,317 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:41,317 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:42,479 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:42,499 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:42,499 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:42,502 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:45:42,502 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:45:42,541 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:42,545 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:42,551 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:42,551 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:42,788 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:42,789 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:42,789 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32, 32, 32] total 63 [2018-01-21 08:45:42,789 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:42,789 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-01-21 08:45:42,790 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-01-21 08:45:42,790 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1893, Invalid=2013, Unknown=0, NotChecked=0, Total=3906 [2018-01-21 08:45:42,790 INFO L87 Difference]: Start difference. First operand 47 states and 47 transitions. Second operand 33 states. [2018-01-21 08:45:42,851 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:42,851 INFO L93 Difference]: Finished difference Result 57 states and 57 transitions. [2018-01-21 08:45:42,851 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-21 08:45:42,851 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 46 [2018-01-21 08:45:42,852 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:42,852 INFO L225 Difference]: With dead ends: 57 [2018-01-21 08:45:42,852 INFO L226 Difference]: Without dead ends: 48 [2018-01-21 08:45:42,852 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 215 GetRequests, 151 SyntacticMatches, 2 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 171 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=1927, Invalid=2105, Unknown=0, NotChecked=0, Total=4032 [2018-01-21 08:45:42,853 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-01-21 08:45:42,855 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-01-21 08:45:42,855 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-21 08:45:42,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-01-21 08:45:42,855 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 46 [2018-01-21 08:45:42,855 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:42,855 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-01-21 08:45:42,855 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-01-21 08:45:42,855 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-01-21 08:45:42,856 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-21 08:45:42,856 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:42,856 INFO L322 BasicCegarLoop]: trace histogram [29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:42,856 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:42,856 INFO L82 PathProgramCache]: Analyzing trace with hash 1375834699, now seen corresponding path program 29 times [2018-01-21 08:45:42,856 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:42,857 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:42,857 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:42,857 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:42,857 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:42,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:42,866 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:43,224 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:43,225 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:43,225 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:43,225 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:43,225 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:43,225 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:43,225 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:43,231 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:45:43,231 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:43,235 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:43,236 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:43,237 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:43,238 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:43,238 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:43,239 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:43,240 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:43,241 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:43,242 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:43,243 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:43,244 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:43,245 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:43,246 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:43,246 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:43,247 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:43,252 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:43,253 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:43,255 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:43,264 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:43,265 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:44,524 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:44,544 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:44,544 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:44,547 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:45:44,547 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:44,552 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:44,554 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:44,557 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:44,561 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:44,565 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:44,569 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:44,573 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:44,578 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:44,584 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:44,590 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:44,596 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:44,603 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:44,610 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:44,617 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:44,625 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:44,638 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:44,649 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:44,653 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:44,659 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:44,659 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:44,914 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:44,915 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:44,915 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 33] total 65 [2018-01-21 08:45:44,915 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:44,916 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-01-21 08:45:44,916 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-01-21 08:45:44,916 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2018, Invalid=2142, Unknown=0, NotChecked=0, Total=4160 [2018-01-21 08:45:44,916 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 34 states. [2018-01-21 08:45:44,960 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:44,960 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2018-01-21 08:45:44,960 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-21 08:45:44,960 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 47 [2018-01-21 08:45:44,961 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:44,961 INFO L225 Difference]: With dead ends: 58 [2018-01-21 08:45:44,961 INFO L226 Difference]: Without dead ends: 49 [2018-01-21 08:45:44,962 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 220 GetRequests, 154 SyntacticMatches, 2 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 177 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=2053, Invalid=2237, Unknown=0, NotChecked=0, Total=4290 [2018-01-21 08:45:44,962 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-01-21 08:45:44,963 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2018-01-21 08:45:44,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-01-21 08:45:44,964 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 49 transitions. [2018-01-21 08:45:44,964 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 49 transitions. Word has length 47 [2018-01-21 08:45:44,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:44,964 INFO L432 AbstractCegarLoop]: Abstraction has 49 states and 49 transitions. [2018-01-21 08:45:44,964 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-01-21 08:45:44,964 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 49 transitions. [2018-01-21 08:45:44,965 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-21 08:45:44,965 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:44,965 INFO L322 BasicCegarLoop]: trace histogram [30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:44,965 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:44,965 INFO L82 PathProgramCache]: Analyzing trace with hash 851384560, now seen corresponding path program 30 times [2018-01-21 08:45:44,965 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:44,966 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:44,966 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:44,966 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:44,966 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:44,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:44,973 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:45,531 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:45,532 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:45,532 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:45,532 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:45,532 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:45,532 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:45,532 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:45,537 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:45:45,537 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:45:45,543 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:45,545 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:45,546 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:45,547 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:45,548 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:45,549 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:45,550 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:45,551 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:45,552 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:45,553 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:45,554 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:45,556 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:45,557 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:45,558 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:45,559 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:45,560 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:45,561 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:45,562 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:45,572 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:45,572 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:46,909 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:46,929 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:46,929 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:46,932 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:45:46,932 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:45:46,942 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:46,949 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:46,957 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:46,965 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:46,974 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:46,983 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:46,993 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:47,003 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:47,013 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:47,024 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:47,035 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:47,046 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:47,058 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:47,071 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:47,084 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:47,097 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:47,107 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:47,111 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:47,117 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:47,117 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:47,445 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:47,446 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:47,477 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 34] total 67 [2018-01-21 08:45:47,477 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:47,477 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-01-21 08:45:47,477 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-01-21 08:45:47,478 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2147, Invalid=2275, Unknown=0, NotChecked=0, Total=4422 [2018-01-21 08:45:47,478 INFO L87 Difference]: Start difference. First operand 49 states and 49 transitions. Second operand 35 states. [2018-01-21 08:45:47,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:47,547 INFO L93 Difference]: Finished difference Result 59 states and 59 transitions. [2018-01-21 08:45:47,547 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-21 08:45:47,547 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 48 [2018-01-21 08:45:47,547 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:47,548 INFO L225 Difference]: With dead ends: 59 [2018-01-21 08:45:47,548 INFO L226 Difference]: Without dead ends: 50 [2018-01-21 08:45:47,548 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 225 GetRequests, 157 SyntacticMatches, 2 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 183 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2183, Invalid=2373, Unknown=0, NotChecked=0, Total=4556 [2018-01-21 08:45:47,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-01-21 08:45:47,550 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2018-01-21 08:45:47,550 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-01-21 08:45:47,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 50 transitions. [2018-01-21 08:45:47,550 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 50 transitions. Word has length 48 [2018-01-21 08:45:47,550 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:47,550 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 50 transitions. [2018-01-21 08:45:47,550 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-01-21 08:45:47,550 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 50 transitions. [2018-01-21 08:45:47,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-01-21 08:45:47,551 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:47,551 INFO L322 BasicCegarLoop]: trace histogram [31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:47,551 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:47,551 INFO L82 PathProgramCache]: Analyzing trace with hash 1773299435, now seen corresponding path program 31 times [2018-01-21 08:45:47,551 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:47,552 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:47,552 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:47,552 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:47,552 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:47,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:47,558 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:48,132 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:48,132 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:48,132 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:48,133 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:48,133 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:48,133 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:48,133 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:48,138 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:48,138 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:45:48,151 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:48,153 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:48,163 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:48,163 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:49,512 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:49,530 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:49,530 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:49,533 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:49,533 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:45:49,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:49,572 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:49,579 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:49,579 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:49,853 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:49,854 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:49,854 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 69 [2018-01-21 08:45:49,854 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:49,854 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-21 08:45:49,855 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-21 08:45:49,855 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2280, Invalid=2412, Unknown=0, NotChecked=0, Total=4692 [2018-01-21 08:45:49,855 INFO L87 Difference]: Start difference. First operand 50 states and 50 transitions. Second operand 36 states. [2018-01-21 08:45:49,900 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:49,901 INFO L93 Difference]: Finished difference Result 60 states and 60 transitions. [2018-01-21 08:45:49,901 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-21 08:45:49,901 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 49 [2018-01-21 08:45:49,901 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:49,901 INFO L225 Difference]: With dead ends: 60 [2018-01-21 08:45:49,901 INFO L226 Difference]: Without dead ends: 51 [2018-01-21 08:45:49,902 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 230 GetRequests, 160 SyntacticMatches, 2 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 189 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=2317, Invalid=2513, Unknown=0, NotChecked=0, Total=4830 [2018-01-21 08:45:49,902 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-01-21 08:45:49,904 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2018-01-21 08:45:49,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-01-21 08:45:49,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 51 transitions. [2018-01-21 08:45:49,905 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 51 transitions. Word has length 49 [2018-01-21 08:45:49,905 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:49,905 INFO L432 AbstractCegarLoop]: Abstraction has 51 states and 51 transitions. [2018-01-21 08:45:49,906 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-21 08:45:49,906 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 51 transitions. [2018-01-21 08:45:49,906 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-21 08:45:49,906 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:49,906 INFO L322 BasicCegarLoop]: trace histogram [32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:49,906 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:49,907 INFO L82 PathProgramCache]: Analyzing trace with hash 287889488, now seen corresponding path program 32 times [2018-01-21 08:45:49,907 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:49,907 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:49,907 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:49,908 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:49,908 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:49,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:49,916 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:50,282 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:50,282 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:50,282 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:50,282 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:50,283 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:50,283 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:50,283 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:50,288 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:45:50,288 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:50,295 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:50,302 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:50,304 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:50,306 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:50,315 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:50,316 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:51,794 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:51,814 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:51,814 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:51,817 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:45:51,817 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:51,828 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:51,844 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:51,859 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:51,863 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:51,870 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:51,870 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:52,164 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:52,166 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:52,166 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 36, 36, 36] total 71 [2018-01-21 08:45:52,166 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:52,166 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-01-21 08:45:52,166 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-01-21 08:45:52,167 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2417, Invalid=2553, Unknown=0, NotChecked=0, Total=4970 [2018-01-21 08:45:52,167 INFO L87 Difference]: Start difference. First operand 51 states and 51 transitions. Second operand 37 states. [2018-01-21 08:45:52,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:52,226 INFO L93 Difference]: Finished difference Result 61 states and 61 transitions. [2018-01-21 08:45:52,226 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-01-21 08:45:52,226 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 50 [2018-01-21 08:45:52,227 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:52,227 INFO L225 Difference]: With dead ends: 61 [2018-01-21 08:45:52,227 INFO L226 Difference]: Without dead ends: 52 [2018-01-21 08:45:52,228 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 235 GetRequests, 163 SyntacticMatches, 2 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 195 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2455, Invalid=2657, Unknown=0, NotChecked=0, Total=5112 [2018-01-21 08:45:52,228 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-01-21 08:45:52,230 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-01-21 08:45:52,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-01-21 08:45:52,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 52 transitions. [2018-01-21 08:45:52,231 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 52 transitions. Word has length 50 [2018-01-21 08:45:52,231 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:52,231 INFO L432 AbstractCegarLoop]: Abstraction has 52 states and 52 transitions. [2018-01-21 08:45:52,231 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-01-21 08:45:52,232 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 52 transitions. [2018-01-21 08:45:52,232 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-21 08:45:52,232 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:52,232 INFO L322 BasicCegarLoop]: trace histogram [33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:52,232 INFO L371 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:52,233 INFO L82 PathProgramCache]: Analyzing trace with hash 1484821387, now seen corresponding path program 33 times [2018-01-21 08:45:52,233 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:52,233 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:52,234 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:52,234 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:52,234 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:52,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:52,243 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:52,685 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:52,685 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:52,685 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:52,686 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:52,686 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:52,686 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:52,686 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:52,690 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:45:52,691 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:45:52,698 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:52,700 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:52,701 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:52,702 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:52,703 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:52,705 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:52,706 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:52,707 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:52,708 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:52,709 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:52,710 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:52,712 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:52,713 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:52,714 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:52,715 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:52,716 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:52,718 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:52,719 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:52,719 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:52,721 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:52,730 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:52,730 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:54,319 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:54,342 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:54,342 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:54,344 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:45:54,345 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:45:54,356 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:54,362 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:54,371 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:54,380 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:54,389 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:54,399 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:54,409 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:54,420 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:54,432 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:54,443 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:54,455 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:54,469 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:54,482 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:54,495 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:54,509 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:54,524 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:54,540 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:54,556 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:54,568 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:54,572 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:54,579 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:54,579 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:54,891 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:54,892 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:54,892 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 73 [2018-01-21 08:45:54,892 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:54,892 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-21 08:45:54,893 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-21 08:45:54,893 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2558, Invalid=2698, Unknown=0, NotChecked=0, Total=5256 [2018-01-21 08:45:54,893 INFO L87 Difference]: Start difference. First operand 52 states and 52 transitions. Second operand 38 states. [2018-01-21 08:45:54,931 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:54,931 INFO L93 Difference]: Finished difference Result 62 states and 62 transitions. [2018-01-21 08:45:54,931 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-01-21 08:45:54,931 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 51 [2018-01-21 08:45:54,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:54,931 INFO L225 Difference]: With dead ends: 62 [2018-01-21 08:45:54,932 INFO L226 Difference]: Without dead ends: 53 [2018-01-21 08:45:54,932 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 240 GetRequests, 166 SyntacticMatches, 2 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 201 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=2597, Invalid=2805, Unknown=0, NotChecked=0, Total=5402 [2018-01-21 08:45:54,932 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-01-21 08:45:54,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-01-21 08:45:54,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-01-21 08:45:54,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 53 transitions. [2018-01-21 08:45:54,935 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 53 transitions. Word has length 51 [2018-01-21 08:45:54,935 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:54,935 INFO L432 AbstractCegarLoop]: Abstraction has 53 states and 53 transitions. [2018-01-21 08:45:54,935 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-21 08:45:54,935 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 53 transitions. [2018-01-21 08:45:54,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-21 08:45:54,936 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:54,936 INFO L322 BasicCegarLoop]: trace histogram [34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:54,936 INFO L371 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:54,936 INFO L82 PathProgramCache]: Analyzing trace with hash -64995408, now seen corresponding path program 34 times [2018-01-21 08:45:54,936 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:54,937 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:54,937 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:54,937 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:54,937 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:54,944 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:54,945 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:55,485 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:55,486 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:55,486 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:55,486 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:55,486 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:55,486 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:55,486 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:55,493 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:45:55,493 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:45:55,514 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:55,516 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:55,529 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:55,530 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:57,264 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:57,284 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:57,284 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:57,287 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:45:57,287 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:45:57,333 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:57,337 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:57,348 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:57,348 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:57,678 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:57,679 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:57,710 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 75 [2018-01-21 08:45:57,711 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:57,711 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-01-21 08:45:57,711 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-01-21 08:45:57,711 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2703, Invalid=2847, Unknown=0, NotChecked=0, Total=5550 [2018-01-21 08:45:57,711 INFO L87 Difference]: Start difference. First operand 53 states and 53 transitions. Second operand 39 states. [2018-01-21 08:45:57,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:57,769 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-01-21 08:45:57,769 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-01-21 08:45:57,769 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 52 [2018-01-21 08:45:57,769 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:57,770 INFO L225 Difference]: With dead ends: 63 [2018-01-21 08:45:57,770 INFO L226 Difference]: Without dead ends: 54 [2018-01-21 08:45:57,770 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 245 GetRequests, 169 SyntacticMatches, 2 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 207 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=2743, Invalid=2957, Unknown=0, NotChecked=0, Total=5700 [2018-01-21 08:45:57,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-01-21 08:45:57,772 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-01-21 08:45:57,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-01-21 08:45:57,772 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 54 transitions. [2018-01-21 08:45:57,772 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 54 transitions. Word has length 52 [2018-01-21 08:45:57,772 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:57,772 INFO L432 AbstractCegarLoop]: Abstraction has 54 states and 54 transitions. [2018-01-21 08:45:57,772 INFO L433 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-01-21 08:45:57,773 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 54 transitions. [2018-01-21 08:45:57,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-01-21 08:45:57,773 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:57,773 INFO L322 BasicCegarLoop]: trace histogram [35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:57,773 INFO L371 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:57,773 INFO L82 PathProgramCache]: Analyzing trace with hash -864675797, now seen corresponding path program 35 times [2018-01-21 08:45:57,773 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:57,774 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:57,774 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:57,774 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:57,774 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:57,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:57,783 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:58,242 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:58,243 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:58,243 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:58,243 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:58,243 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:58,243 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:58,243 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:58,248 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:45:58,248 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:58,253 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:58,254 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:58,255 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:58,255 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:58,256 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:58,257 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:58,258 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:58,259 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:58,259 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:58,260 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:58,261 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:58,262 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:58,263 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:58,264 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:58,265 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:58,266 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:58,267 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:58,268 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:58,272 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:58,273 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:58,275 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:58,285 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:58,285 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:00,004 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:00,024 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:00,024 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:00,026 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:46:00,027 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:00,031 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:00,033 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:00,036 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:00,040 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:00,043 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:00,048 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:00,053 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:00,058 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:00,064 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:00,070 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:00,077 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:00,088 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:00,097 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:00,105 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:00,114 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:00,123 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:00,133 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:00,142 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:00,158 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:00,170 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:00,173 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:00,181 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:00,181 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:00,510 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:00,511 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:00,512 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39, 39, 39, 39] total 77 [2018-01-21 08:46:00,512 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:00,512 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-21 08:46:00,512 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-21 08:46:00,512 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2852, Invalid=3000, Unknown=0, NotChecked=0, Total=5852 [2018-01-21 08:46:00,513 INFO L87 Difference]: Start difference. First operand 54 states and 54 transitions. Second operand 40 states. [2018-01-21 08:46:00,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:00,565 INFO L93 Difference]: Finished difference Result 64 states and 64 transitions. [2018-01-21 08:46:00,565 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-01-21 08:46:00,565 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 53 [2018-01-21 08:46:00,565 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:00,566 INFO L225 Difference]: With dead ends: 64 [2018-01-21 08:46:00,566 INFO L226 Difference]: Without dead ends: 55 [2018-01-21 08:46:00,567 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 250 GetRequests, 172 SyntacticMatches, 2 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 213 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=2893, Invalid=3113, Unknown=0, NotChecked=0, Total=6006 [2018-01-21 08:46:00,567 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-01-21 08:46:00,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2018-01-21 08:46:00,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-01-21 08:46:00,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 55 transitions. [2018-01-21 08:46:00,570 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 55 transitions. Word has length 53 [2018-01-21 08:46:00,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:00,570 INFO L432 AbstractCegarLoop]: Abstraction has 55 states and 55 transitions. [2018-01-21 08:46:00,570 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-21 08:46:00,571 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 55 transitions. [2018-01-21 08:46:00,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-01-21 08:46:00,571 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:00,571 INFO L322 BasicCegarLoop]: trace histogram [36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:00,571 INFO L371 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:00,572 INFO L82 PathProgramCache]: Analyzing trace with hash 115035920, now seen corresponding path program 36 times [2018-01-21 08:46:00,572 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:00,572 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:00,572 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:00,572 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:00,572 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:00,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:00,582 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:01,042 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:01,042 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:01,042 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:01,042 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:01,043 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:01,043 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:01,043 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:01,047 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:46:01,047 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:46:01,054 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:01,056 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:01,057 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:01,058 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:01,059 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:01,060 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:01,061 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:01,062 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:01,063 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:01,064 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:01,065 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:01,067 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:01,068 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:01,069 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:01,070 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:01,071 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:01,072 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:01,074 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:01,075 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:01,076 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:01,077 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:01,087 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:01,087 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:02,897 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:02,917 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:02,930 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:02,933 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:46:02,933 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:46:02,944 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:02,951 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:02,959 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:02,968 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:02,977 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:02,987 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:02,997 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:03,008 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:03,019 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:03,030 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:03,041 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:03,052 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:03,064 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:03,076 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:03,088 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:03,102 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:03,116 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:03,131 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:03,145 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:03,157 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:03,161 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:03,168 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:03,168 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:03,510 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:03,511 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:03,511 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40, 40, 40, 40] total 79 [2018-01-21 08:46:03,512 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:03,512 INFO L409 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-01-21 08:46:03,512 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-01-21 08:46:03,512 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3005, Invalid=3157, Unknown=0, NotChecked=0, Total=6162 [2018-01-21 08:46:03,512 INFO L87 Difference]: Start difference. First operand 55 states and 55 transitions. Second operand 41 states. [2018-01-21 08:46:03,555 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:03,556 INFO L93 Difference]: Finished difference Result 65 states and 65 transitions. [2018-01-21 08:46:03,556 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-01-21 08:46:03,556 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 54 [2018-01-21 08:46:03,556 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:03,556 INFO L225 Difference]: With dead ends: 65 [2018-01-21 08:46:03,556 INFO L226 Difference]: Without dead ends: 56 [2018-01-21 08:46:03,557 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 255 GetRequests, 175 SyntacticMatches, 2 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 219 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=3047, Invalid=3273, Unknown=0, NotChecked=0, Total=6320 [2018-01-21 08:46:03,557 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2018-01-21 08:46:03,558 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 56. [2018-01-21 08:46:03,559 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-01-21 08:46:03,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 56 transitions. [2018-01-21 08:46:03,559 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 56 transitions. Word has length 54 [2018-01-21 08:46:03,559 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:03,559 INFO L432 AbstractCegarLoop]: Abstraction has 56 states and 56 transitions. [2018-01-21 08:46:03,559 INFO L433 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-01-21 08:46:03,559 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 56 transitions. [2018-01-21 08:46:03,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-01-21 08:46:03,560 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:03,560 INFO L322 BasicCegarLoop]: trace histogram [37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:03,560 INFO L371 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:03,560 INFO L82 PathProgramCache]: Analyzing trace with hash 421328075, now seen corresponding path program 37 times [2018-01-21 08:46:03,560 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:03,560 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:03,561 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:03,561 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:03,561 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:03,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:03,569 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:04,081 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:04,081 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:04,081 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:04,081 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:04,081 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:04,081 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:04,081 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:04,086 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:04,086 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:46:04,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:04,104 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:04,115 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:04,115 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:06,031 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:06,051 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:06,051 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 75 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:06,054 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:06,054 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:46:06,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:06,093 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:06,100 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:06,100 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:06,456 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:06,457 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:06,457 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41, 41, 41, 41] total 81 [2018-01-21 08:46:06,457 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:06,457 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-01-21 08:46:06,457 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-01-21 08:46:06,458 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3162, Invalid=3318, Unknown=0, NotChecked=0, Total=6480 [2018-01-21 08:46:06,458 INFO L87 Difference]: Start difference. First operand 56 states and 56 transitions. Second operand 42 states. [2018-01-21 08:46:06,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:06,513 INFO L93 Difference]: Finished difference Result 66 states and 66 transitions. [2018-01-21 08:46:06,514 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-01-21 08:46:06,514 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 55 [2018-01-21 08:46:06,514 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:06,514 INFO L225 Difference]: With dead ends: 66 [2018-01-21 08:46:06,514 INFO L226 Difference]: Without dead ends: 57 [2018-01-21 08:46:06,515 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 260 GetRequests, 178 SyntacticMatches, 2 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 225 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=3205, Invalid=3437, Unknown=0, NotChecked=0, Total=6642 [2018-01-21 08:46:06,515 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-01-21 08:46:06,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 57. [2018-01-21 08:46:06,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-01-21 08:46:06,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 57 transitions. [2018-01-21 08:46:06,517 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 57 transitions. Word has length 55 [2018-01-21 08:46:06,517 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:06,517 INFO L432 AbstractCegarLoop]: Abstraction has 57 states and 57 transitions. [2018-01-21 08:46:06,517 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-01-21 08:46:06,517 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 57 transitions. [2018-01-21 08:46:06,517 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-21 08:46:06,517 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:06,518 INFO L322 BasicCegarLoop]: trace histogram [38, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:06,518 INFO L371 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:06,518 INFO L82 PathProgramCache]: Analyzing trace with hash 1326450288, now seen corresponding path program 38 times [2018-01-21 08:46:06,518 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:06,518 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:06,518 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:06,518 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:06,519 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:06,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:06,528 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:07,159 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:07,159 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:07,159 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:07,159 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:07,159 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:07,159 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:07,159 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:07,164 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:46:07,164 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:07,172 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:07,179 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:07,181 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:07,183 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:07,193 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:07,193 INFO L314 TraceCheckSpWp]: Computing backward predicates... Received shutdown request... [2018-01-21 08:46:07,874 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-21 08:46:07,874 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 08:46:07,876 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 08:46:07,876 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 08:46:07,876 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 08:46:07,876 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 08:46:07,876 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 08:46:07,876 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 08:46:07,876 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 08:46:07,876 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == mainErr0EnsuresViolation======== [2018-01-21 08:46:07,876 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 08:46:07,877 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states. [2018-01-21 08:46:07,877 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 08:46:07,878 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 21.01 08:46:07 BoogieIcfgContainer [2018-01-21 08:46:07,878 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-21 08:46:07,878 INFO L168 Benchmark]: Toolchain (without parser) took 54942.42 ms. Allocated memory was 304.6 MB in the beginning and 815.3 MB in the end (delta: 510.7 MB). Free memory was 263.9 MB in the beginning and 543.6 MB in the end (delta: -279.7 MB). Peak memory consumption was 231.0 MB. Max. memory is 5.3 GB. [2018-01-21 08:46:07,879 INFO L168 Benchmark]: CDTParser took 0.11 ms. Allocated memory is still 304.6 MB. Free memory is still 268.9 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-21 08:46:07,879 INFO L168 Benchmark]: CACSL2BoogieTranslator took 164.31 ms. Allocated memory is still 304.6 MB. Free memory was 262.9 MB in the beginning and 255.8 MB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 5.3 GB. [2018-01-21 08:46:07,879 INFO L168 Benchmark]: Boogie Preprocessor took 28.28 ms. Allocated memory is still 304.6 MB. Free memory was 255.8 MB in the beginning and 253.8 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-21 08:46:07,879 INFO L168 Benchmark]: RCFGBuilder took 176.14 ms. Allocated memory is still 304.6 MB. Free memory was 253.8 MB in the beginning and 242.2 MB in the end (delta: 11.6 MB). Peak memory consumption was 11.6 MB. Max. memory is 5.3 GB. [2018-01-21 08:46:07,880 INFO L168 Benchmark]: TraceAbstraction took 54567.52 ms. Allocated memory was 304.6 MB in the beginning and 815.3 MB in the end (delta: 510.7 MB). Free memory was 241.2 MB in the beginning and 543.6 MB in the end (delta: -302.4 MB). Peak memory consumption was 208.2 MB. Max. memory is 5.3 GB. [2018-01-21 08:46:07,881 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.11 ms. Allocated memory is still 304.6 MB. Free memory is still 268.9 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 164.31 ms. Allocated memory is still 304.6 MB. Free memory was 262.9 MB in the beginning and 255.8 MB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 28.28 ms. Allocated memory is still 304.6 MB. Free memory was 255.8 MB in the beginning and 253.8 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 176.14 ms. Allocated memory is still 304.6 MB. Free memory was 253.8 MB in the beginning and 242.2 MB in the end (delta: 11.6 MB). Peak memory consumption was 11.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 54567.52 ms. Allocated memory was 304.6 MB in the beginning and 815.3 MB in the end (delta: 510.7 MB). Free memory was 241.2 MB in the beginning and 543.6 MB in the end (delta: -302.4 MB). Peak memory consumption was 208.2 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 18 LocStat_MAX_WEQGRAPH_SIZE : 2 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 126 LocStat_NO_SUPPORTING_DISEQUALITIES : 29 LocStat_NO_DISJUNCTIONS : -36 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 25 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 35 TransStat_NO_SUPPORTING_DISEQUALITIES : 5 TransStat_NO_DISJUNCTIONS : 25 TransStat_MAX_NO_DISJUNCTIONS : 1 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.225363 RENAME_VARIABLES(MILLISECONDS) : 0.078158 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.170018 PROJECTAWAY(MILLISECONDS) : 0.086215 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.105087 DISJOIN(MILLISECONDS) : 0.000000 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.117480 ADD_EQUALITY(MILLISECONDS) : 0.043258 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.014209 #CONJOIN_DISJUNCTIVE : 34 #RENAME_VARIABLES : 64 #UNFREEZE : 0 #CONJOIN : 64 #PROJECTAWAY : 66 #ADD_WEAK_EQUALITY : 4 #DISJOIN : 0 #RENAME_VARIABLES_DISJUNCTIVE : 64 #ADD_EQUALITY : 35 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1]: not all allocated memory was freed not all allocated memory was freed We found a FailurePath: - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.initErr0EnsuresViolation CFG has 4 procedures, 22 locations, 3 error locations. UNSAFE Result, 0.1s OverallTime, 1 OverallIterations, 1 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=22occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 3 NumberOfCodeBlocks, 3 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1). Cancelled while BasicCegarLoop was analyzing trace of length 57 with TraceHistMax 38, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 51 known predicates. - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.startErr0EnsuresViolation CFG has 4 procedures, 22 locations, 3 error locations. TIMEOUT Result, 54.3s OverallTime, 39 OverallIterations, 38 TraceHistogramMax, 1.7s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 649 SDtfs, 76 SDslu, 9191 SDs, 0 SdLazy, 1487 SolverSat, 53 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.7s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 6295 GetRequests, 4590 SyntacticMatches, 74 SemanticMatches, 1631 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4328 ImplicationChecksByTransitivity, 30.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=57occurred in iteration=38, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.9s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 38 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 3.2s SatisfiabilityAnalysisTime, 45.0s InterpolantComputationTime, 4125 NumberOfCodeBlocks, 4125 NumberOfCodeBlocksAsserted, 502 NumberOfCheckSat, 6677 ConstructedInterpolants, 0 QuantifiedInterpolants, 961429 SizeOfPredicates, 74 NumberOfNonLiveVariables, 9028 ConjunctsInSsa, 1628 ConjunctsInUnsatCore, 186 InterpolantComputations, 1 PerfectInterpolantSequences, 0/45695 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 25]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 25). Cancelled while IsEmpty was searching accepting run (input had 22 states). - StatisticsResult: Ultimate Automizer benchmark data for error location: mainErr0EnsuresViolation CFG has 4 procedures, 22 locations, 3 error locations. TIMEOUT Result, 0.0s OverallTime, 0 OverallIterations, 0 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=22occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero3_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-21_08-46-07-889.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero3_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-21_08-46-07-889.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero3_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-21_08-46-07-889.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero3_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-21_08-46-07-889.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero3_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-1-2018-01-21_08-46-07-889.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero3_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-2-2018-01-21_08-46-07-889.csv Completed graceful shutdown