java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memsetNonZero_false-valid-deref-write.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-2f49842 [2018-01-21 08:45:51,470 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-21 08:45:51,471 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-21 08:45:51,486 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-21 08:45:51,487 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-21 08:45:51,488 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-21 08:45:51,489 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-21 08:45:51,491 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-21 08:45:51,493 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-21 08:45:51,493 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-21 08:45:51,494 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-21 08:45:51,495 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-21 08:45:51,496 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-21 08:45:51,497 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-21 08:45:51,498 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-21 08:45:51,500 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-21 08:45:51,503 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-21 08:45:51,505 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-21 08:45:51,506 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-21 08:45:51,507 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-21 08:45:51,510 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-21 08:45:51,510 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-21 08:45:51,510 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-21 08:45:51,511 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-21 08:45:51,512 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-21 08:45:51,513 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-21 08:45:51,514 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-21 08:45:51,514 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-21 08:45:51,514 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-21 08:45:51,515 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-21 08:45:51,515 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-21 08:45:51,516 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf [2018-01-21 08:45:51,524 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-21 08:45:51,524 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-21 08:45:51,525 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-21 08:45:51,525 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-21 08:45:51,525 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-21 08:45:51,526 INFO L133 SettingsManager]: * Weq Fattening=true [2018-01-21 08:45:51,526 INFO L133 SettingsManager]: * Flatten before fatten=true [2018-01-21 08:45:51,526 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-21 08:45:51,526 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-21 08:45:51,526 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-21 08:45:51,526 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-21 08:45:51,527 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-21 08:45:51,527 INFO L133 SettingsManager]: * Check allocation purity=true [2018-01-21 08:45:51,527 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-21 08:45:51,527 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-21 08:45:51,527 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-21 08:45:51,527 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-01-21 08:45:51,527 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-21 08:45:51,527 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-01-21 08:45:51,528 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-21 08:45:51,528 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-01-21 08:45:51,528 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-01-21 08:45:51,528 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-21 08:45:51,528 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-21 08:45:51,529 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-21 08:45:51,529 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-21 08:45:51,529 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-21 08:45:51,529 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 08:45:51,529 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-21 08:45:51,529 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-21 08:45:51,529 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-21 08:45:51,530 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-21 08:45:51,530 INFO L133 SettingsManager]: * Stop after first violation was found=false [2018-01-21 08:45:51,530 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-21 08:45:51,530 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-21 08:45:51,530 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-21 08:45:51,530 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-21 08:45:51,530 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-21 08:45:51,531 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-21 08:45:51,531 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-21 08:45:51,564 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-21 08:45:51,575 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-21 08:45:51,579 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-21 08:45:51,580 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-21 08:45:51,580 INFO L276 PluginConnector]: CDTParser initialized [2018-01-21 08:45:51,581 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memsetNonZero_false-valid-deref-write.c [2018-01-21 08:45:51,702 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-21 08:45:51,706 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-21 08:45:51,707 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-21 08:45:51,707 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-21 08:45:51,712 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-21 08:45:51,713 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 08:45:51" (1/1) ... [2018-01-21 08:45:51,716 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6ebb80cb and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:45:51, skipping insertion in model container [2018-01-21 08:45:51,716 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 08:45:51" (1/1) ... [2018-01-21 08:45:51,729 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 08:45:51,743 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 08:45:51,852 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 08:45:51,868 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 08:45:51,873 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:45:51 WrapperNode [2018-01-21 08:45:51,873 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-21 08:45:51,874 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-21 08:45:51,874 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-21 08:45:51,874 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-21 08:45:51,886 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:45:51" (1/1) ... [2018-01-21 08:45:51,887 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:45:51" (1/1) ... [2018-01-21 08:45:51,895 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:45:51" (1/1) ... [2018-01-21 08:45:51,895 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:45:51" (1/1) ... [2018-01-21 08:45:51,898 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:45:51" (1/1) ... [2018-01-21 08:45:51,901 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:45:51" (1/1) ... [2018-01-21 08:45:51,902 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:45:51" (1/1) ... [2018-01-21 08:45:51,904 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-21 08:45:51,904 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-21 08:45:51,905 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-21 08:45:51,905 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-21 08:45:51,906 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:45:51" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 08:45:51,952 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-21 08:45:51,953 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-21 08:45:51,953 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-21 08:45:51,953 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-21 08:45:51,953 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-21 08:45:51,953 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-21 08:45:51,953 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-21 08:45:51,954 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-21 08:45:51,954 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-21 08:45:51,954 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-21 08:45:51,954 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-21 08:45:51,954 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-21 08:45:52,069 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-21 08:45:52,069 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 08:45:52 BoogieIcfgContainer [2018-01-21 08:45:52,070 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-21 08:45:52,070 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-21 08:45:52,070 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-21 08:45:52,072 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-21 08:45:52,072 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 21.01 08:45:51" (1/3) ... [2018-01-21 08:45:52,073 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6e6ece3d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 08:45:52, skipping insertion in model container [2018-01-21 08:45:52,073 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:45:51" (2/3) ... [2018-01-21 08:45:52,073 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6e6ece3d and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 08:45:52, skipping insertion in model container [2018-01-21 08:45:52,074 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 08:45:52" (3/3) ... [2018-01-21 08:45:52,076 INFO L105 eAbstractionObserver]: Analyzing ICFG memsetNonZero_false-valid-deref-write.c [2018-01-21 08:45:52,083 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-21 08:45:52,089 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-01-21 08:45:52,123 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 08:45:52,123 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 08:45:52,123 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 08:45:52,123 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 08:45:52,123 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 08:45:52,123 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 08:45:52,123 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 08:45:52,123 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.initErr0EnsuresViolation======== [2018-01-21 08:45:52,124 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 08:45:52,139 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 08:45:52,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-01-21 08:45:52,144 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:52,145 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-01-21 08:45:52,145 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.initErr0EnsuresViolation]=== [2018-01-21 08:45:52,149 INFO L82 PathProgramCache]: Analyzing trace with hash 50935, now seen corresponding path program 1 times [2018-01-21 08:45:52,151 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:52,193 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:52,193 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:52,193 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:52,193 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:52,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 08:45:52,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 08:45:52,247 INFO L381 BasicCegarLoop]: Counterexample might be feasible [2018-01-21 08:45:52,254 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-21 08:45:52,260 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 08:45:52,260 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 08:45:52,261 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 08:45:52,261 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 08:45:52,261 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 08:45:52,261 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 08:45:52,261 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 08:45:52,261 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.startErr0EnsuresViolation======== [2018-01-21 08:45:52,262 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 08:45:52,263 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 08:45:52,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-21 08:45:52,264 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:52,264 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:52,264 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:52,265 INFO L82 PathProgramCache]: Analyzing trace with hash 457189328, now seen corresponding path program 1 times [2018-01-21 08:45:52,265 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:52,266 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:52,266 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:52,266 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:52,267 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:52,293 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:52,300 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:52,380 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:52,382 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 08:45:52,382 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-21 08:45:52,383 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 08:45:52,385 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-21 08:45:52,402 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-21 08:45:52,403 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-21 08:45:52,406 INFO L87 Difference]: Start difference. First operand 21 states. Second operand 4 states. [2018-01-21 08:45:52,476 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:52,476 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 08:45:52,519 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-21 08:45:52,521 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 17 [2018-01-21 08:45:52,521 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:52,529 INFO L225 Difference]: With dead ends: 33 [2018-01-21 08:45:52,530 INFO L226 Difference]: Without dead ends: 19 [2018-01-21 08:45:52,532 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-21 08:45:52,608 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-01-21 08:45:52,619 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2018-01-21 08:45:52,620 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-01-21 08:45:52,621 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 19 transitions. [2018-01-21 08:45:52,622 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 19 transitions. Word has length 17 [2018-01-21 08:45:52,622 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:52,622 INFO L432 AbstractCegarLoop]: Abstraction has 19 states and 19 transitions. [2018-01-21 08:45:52,623 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-21 08:45:52,623 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 19 transitions. [2018-01-21 08:45:52,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-01-21 08:45:52,623 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:52,623 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:52,623 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:52,624 INFO L82 PathProgramCache]: Analyzing trace with hash -114007861, now seen corresponding path program 1 times [2018-01-21 08:45:52,624 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:52,625 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:52,625 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:52,625 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:52,625 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:52,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:52,636 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:52,700 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:52,700 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:52,700 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:52,701 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 19 with the following transitions: [2018-01-21 08:45:52,703 INFO L201 CegarAbsIntRunner]: [0], [1], [3], [7], [9], [10], [14], [15], [17], [18], [19], [20], [22], [23], [24], [25], [26], [27] [2018-01-21 08:45:52,745 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-21 08:45:52,745 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-21 08:45:53,558 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-21 08:45:53,560 INFO L268 AbstractInterpreter]: Visited 18 different actions 22 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 15 variables. [2018-01-21 08:45:53,585 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-21 08:45:53,585 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:53,586 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:53,599 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:53,599 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:45:53,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:53,628 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:53,660 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:53,660 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:53,874 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:53,907 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:53,907 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:53,911 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:53,911 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:45:53,938 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:53,941 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:53,945 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:53,945 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:54,008 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:54,010 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:54,010 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-21 08:45:54,010 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:54,011 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-21 08:45:54,011 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-21 08:45:54,012 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-01-21 08:45:54,012 INFO L87 Difference]: Start difference. First operand 19 states and 19 transitions. Second operand 6 states. [2018-01-21 08:45:54,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:54,031 INFO L93 Difference]: Finished difference Result 29 states and 29 transitions. [2018-01-21 08:45:54,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-21 08:45:54,031 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 18 [2018-01-21 08:45:54,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:54,032 INFO L225 Difference]: With dead ends: 29 [2018-01-21 08:45:54,032 INFO L226 Difference]: Without dead ends: 20 [2018-01-21 08:45:54,033 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 66 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-01-21 08:45:54,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-01-21 08:45:54,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-01-21 08:45:54,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-01-21 08:45:54,036 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2018-01-21 08:45:54,036 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 18 [2018-01-21 08:45:54,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:54,037 INFO L432 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2018-01-21 08:45:54,037 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-21 08:45:54,037 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-01-21 08:45:54,037 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-21 08:45:54,038 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:54,038 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:54,038 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:54,038 INFO L82 PathProgramCache]: Analyzing trace with hash -641251536, now seen corresponding path program 2 times [2018-01-21 08:45:54,038 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:54,039 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:54,040 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:54,040 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:54,040 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:54,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:54,054 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:54,097 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:54,097 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:54,098 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:54,098 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:54,098 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:54,098 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:54,098 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:54,104 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:45:54,105 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:54,118 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:54,132 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:54,133 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:54,135 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:54,147 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:54,148 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:54,301 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:54,334 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:54,334 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:54,338 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:45:54,338 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:54,356 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:54,366 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:54,374 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:54,379 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:54,383 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:54,384 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:54,460 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:54,466 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:54,467 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-21 08:45:54,467 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:54,467 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-21 08:45:54,467 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-21 08:45:54,468 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-01-21 08:45:54,468 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand 7 states. [2018-01-21 08:45:54,493 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:54,493 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-01-21 08:45:54,494 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-21 08:45:54,494 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-01-21 08:45:54,495 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:54,495 INFO L225 Difference]: With dead ends: 30 [2018-01-21 08:45:54,496 INFO L226 Difference]: Without dead ends: 21 [2018-01-21 08:45:54,496 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 69 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=77, Unknown=0, NotChecked=0, Total=132 [2018-01-21 08:45:54,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2018-01-21 08:45:54,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-01-21 08:45:54,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-01-21 08:45:54,500 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-01-21 08:45:54,500 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 19 [2018-01-21 08:45:54,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:54,500 INFO L432 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-01-21 08:45:54,500 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-21 08:45:54,500 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-01-21 08:45:54,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-01-21 08:45:54,501 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:54,501 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:54,501 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:54,501 INFO L82 PathProgramCache]: Analyzing trace with hash 194063723, now seen corresponding path program 3 times [2018-01-21 08:45:54,501 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:54,502 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:54,502 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:54,502 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:54,502 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:54,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:54,511 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:54,560 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:54,560 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:54,561 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:54,561 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:54,561 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:54,561 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:54,561 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:54,573 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:45:54,574 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:45:54,584 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:54,587 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:54,589 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:54,595 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:54,597 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:54,609 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:54,610 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:54,703 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:54,723 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:54,723 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:54,727 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:45:54,727 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:45:54,738 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:54,744 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:54,752 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:54,757 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:54,760 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:54,765 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:54,765 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:54,816 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:54,817 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:54,817 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-21 08:45:54,817 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:54,818 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-21 08:45:54,818 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-21 08:45:54,818 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-21 08:45:54,818 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 8 states. [2018-01-21 08:45:54,838 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:54,838 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-01-21 08:45:54,839 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-21 08:45:54,839 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 20 [2018-01-21 08:45:54,840 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:54,840 INFO L225 Difference]: With dead ends: 31 [2018-01-21 08:45:54,840 INFO L226 Difference]: Without dead ends: 22 [2018-01-21 08:45:54,841 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 72 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=77, Invalid=105, Unknown=0, NotChecked=0, Total=182 [2018-01-21 08:45:54,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-01-21 08:45:54,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-01-21 08:45:54,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-01-21 08:45:54,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2018-01-21 08:45:54,845 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 20 [2018-01-21 08:45:54,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:54,845 INFO L432 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2018-01-21 08:45:54,845 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-21 08:45:54,845 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-01-21 08:45:54,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-21 08:45:54,846 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:54,846 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:54,846 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:54,846 INFO L82 PathProgramCache]: Analyzing trace with hash 319032976, now seen corresponding path program 4 times [2018-01-21 08:45:54,847 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:54,847 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:54,848 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:54,848 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:54,848 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:54,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:54,860 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:54,903 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:54,904 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:54,904 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:54,904 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:54,904 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:54,904 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:54,904 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:54,910 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:45:54,910 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:45:54,920 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:54,922 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:54,932 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:54,932 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:55,046 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:55,067 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:55,067 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:55,070 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:45:55,071 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:45:55,093 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:55,096 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:55,101 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:55,101 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:55,167 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:55,168 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:55,168 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-21 08:45:55,168 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:55,169 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-21 08:45:55,169 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-21 08:45:55,169 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-21 08:45:55,169 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 9 states. [2018-01-21 08:45:55,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:55,195 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2018-01-21 08:45:55,196 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-21 08:45:55,196 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 21 [2018-01-21 08:45:55,197 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:55,197 INFO L225 Difference]: With dead ends: 32 [2018-01-21 08:45:55,197 INFO L226 Difference]: Without dead ends: 23 [2018-01-21 08:45:55,198 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 75 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=103, Invalid=137, Unknown=0, NotChecked=0, Total=240 [2018-01-21 08:45:55,198 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-01-21 08:45:55,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-01-21 08:45:55,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-01-21 08:45:55,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 23 transitions. [2018-01-21 08:45:55,208 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 23 transitions. Word has length 21 [2018-01-21 08:45:55,208 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:55,208 INFO L432 AbstractCegarLoop]: Abstraction has 23 states and 23 transitions. [2018-01-21 08:45:55,208 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-21 08:45:55,208 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 23 transitions. [2018-01-21 08:45:55,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-21 08:45:55,209 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:55,209 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:55,209 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:55,209 INFO L82 PathProgramCache]: Analyzing trace with hash -101887477, now seen corresponding path program 5 times [2018-01-21 08:45:55,210 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:55,211 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:55,211 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:55,211 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:55,211 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:55,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:55,224 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:55,309 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:55,309 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:55,309 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:55,309 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:55,309 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:55,309 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:55,310 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:55,317 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:45:55,318 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:55,323 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:55,324 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:55,325 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:55,330 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:55,331 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:55,333 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:55,357 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:55,357 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:55,496 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:55,518 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:55,518 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:55,521 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:45:55,521 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:55,525 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:55,526 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:55,530 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:55,540 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:55,546 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:55,550 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:55,554 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:55,554 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:55,606 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:55,608 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:55,609 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-21 08:45:55,609 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:55,609 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-21 08:45:55,610 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-21 08:45:55,610 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-21 08:45:55,610 INFO L87 Difference]: Start difference. First operand 23 states and 23 transitions. Second operand 10 states. [2018-01-21 08:45:55,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:55,640 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 08:45:55,640 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-21 08:45:55,641 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 22 [2018-01-21 08:45:55,641 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:55,641 INFO L225 Difference]: With dead ends: 33 [2018-01-21 08:45:55,641 INFO L226 Difference]: Without dead ends: 24 [2018-01-21 08:45:55,642 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 78 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=133, Invalid=173, Unknown=0, NotChecked=0, Total=306 [2018-01-21 08:45:55,642 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-01-21 08:45:55,644 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-01-21 08:45:55,644 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-01-21 08:45:55,644 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-01-21 08:45:55,644 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 22 [2018-01-21 08:45:55,645 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:55,645 INFO L432 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-01-21 08:45:55,645 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-21 08:45:55,645 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-01-21 08:45:55,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-21 08:45:55,645 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:55,645 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:55,645 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:55,646 INFO L82 PathProgramCache]: Analyzing trace with hash -265519632, now seen corresponding path program 6 times [2018-01-21 08:45:55,646 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:55,646 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:55,646 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:55,647 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:55,647 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:55,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:55,658 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:55,709 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:55,709 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:55,710 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:55,710 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:55,710 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:55,710 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:55,710 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:55,715 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:45:55,715 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:45:55,722 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:55,724 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:55,725 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:55,726 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:55,726 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:55,727 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:55,738 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:55,739 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:55,938 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:55,959 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:55,959 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:55,962 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:45:55,962 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:45:55,971 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:55,978 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:55,986 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:55,995 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:56,001 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:56,004 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:56,010 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:56,010 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:56,079 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:56,080 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:56,081 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-21 08:45:56,081 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:56,081 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-21 08:45:56,081 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-21 08:45:56,081 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-21 08:45:56,081 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 11 states. [2018-01-21 08:45:56,173 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:56,173 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-01-21 08:45:56,174 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-21 08:45:56,174 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 23 [2018-01-21 08:45:56,174 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:56,174 INFO L225 Difference]: With dead ends: 34 [2018-01-21 08:45:56,174 INFO L226 Difference]: Without dead ends: 25 [2018-01-21 08:45:56,175 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 81 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=167, Invalid=213, Unknown=0, NotChecked=0, Total=380 [2018-01-21 08:45:56,175 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-01-21 08:45:56,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-01-21 08:45:56,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-01-21 08:45:56,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 25 transitions. [2018-01-21 08:45:56,177 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 25 transitions. Word has length 23 [2018-01-21 08:45:56,178 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:56,178 INFO L432 AbstractCegarLoop]: Abstraction has 25 states and 25 transitions. [2018-01-21 08:45:56,178 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-21 08:45:56,178 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 25 transitions. [2018-01-21 08:45:56,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-21 08:45:56,178 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:56,178 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:56,178 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:56,179 INFO L82 PathProgramCache]: Analyzing trace with hash -1043149141, now seen corresponding path program 7 times [2018-01-21 08:45:56,179 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:56,179 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:56,179 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:56,180 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:56,180 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:56,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:56,191 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:56,275 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:56,275 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:56,275 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:56,275 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:56,276 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:56,276 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:56,276 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:56,292 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:56,292 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:45:56,307 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:56,309 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:56,322 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:56,323 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:56,496 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:56,529 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:56,529 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:56,534 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:56,535 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:45:56,551 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:56,554 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:56,558 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:56,558 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:56,615 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:56,616 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:56,617 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 21 [2018-01-21 08:45:56,617 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:56,617 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-21 08:45:56,617 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-21 08:45:56,617 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=228, Unknown=0, NotChecked=0, Total=420 [2018-01-21 08:45:56,617 INFO L87 Difference]: Start difference. First operand 25 states and 25 transitions. Second operand 12 states. [2018-01-21 08:45:56,637 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:56,637 INFO L93 Difference]: Finished difference Result 35 states and 35 transitions. [2018-01-21 08:45:56,638 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-21 08:45:56,638 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 24 [2018-01-21 08:45:56,638 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:56,638 INFO L225 Difference]: With dead ends: 35 [2018-01-21 08:45:56,638 INFO L226 Difference]: Without dead ends: 26 [2018-01-21 08:45:56,639 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 84 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=205, Invalid=257, Unknown=0, NotChecked=0, Total=462 [2018-01-21 08:45:56,639 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-01-21 08:45:56,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-01-21 08:45:56,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-01-21 08:45:56,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 26 transitions. [2018-01-21 08:45:56,641 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 26 transitions. Word has length 24 [2018-01-21 08:45:56,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:56,642 INFO L432 AbstractCegarLoop]: Abstraction has 26 states and 26 transitions. [2018-01-21 08:45:56,642 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-21 08:45:56,642 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-01-21 08:45:56,642 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-21 08:45:56,642 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:56,642 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:56,642 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:56,643 INFO L82 PathProgramCache]: Analyzing trace with hash 620139856, now seen corresponding path program 8 times [2018-01-21 08:45:56,643 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:56,643 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:56,643 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:45:56,643 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:56,643 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:56,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:56,652 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:56,729 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:56,730 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:56,730 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:56,730 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:56,730 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:56,730 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:56,730 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:56,735 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:45:56,735 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:56,741 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:56,744 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:56,745 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:56,746 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:56,754 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:56,754 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:56,937 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:56,957 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:56,957 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:56,960 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:45:56,960 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:56,970 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:56,978 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:56,985 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:56,988 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:56,992 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:56,992 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:57,081 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:57,083 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:57,083 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 23 [2018-01-21 08:45:57,083 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:57,083 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-21 08:45:57,083 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-21 08:45:57,084 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=233, Invalid=273, Unknown=0, NotChecked=0, Total=506 [2018-01-21 08:45:57,084 INFO L87 Difference]: Start difference. First operand 26 states and 26 transitions. Second operand 13 states. [2018-01-21 08:45:57,130 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:57,130 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-01-21 08:45:57,130 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-21 08:45:57,130 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 25 [2018-01-21 08:45:57,130 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:57,131 INFO L225 Difference]: With dead ends: 36 [2018-01-21 08:45:57,131 INFO L226 Difference]: Without dead ends: 27 [2018-01-21 08:45:57,131 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 87 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=247, Invalid=305, Unknown=0, NotChecked=0, Total=552 [2018-01-21 08:45:57,132 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-01-21 08:45:57,135 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-01-21 08:45:57,135 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-01-21 08:45:57,136 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 27 transitions. [2018-01-21 08:45:57,136 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 27 transitions. Word has length 25 [2018-01-21 08:45:57,136 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:57,136 INFO L432 AbstractCegarLoop]: Abstraction has 27 states and 27 transitions. [2018-01-21 08:45:57,136 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-21 08:45:57,137 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-01-21 08:45:57,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-21 08:45:57,137 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:57,138 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:57,138 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:57,138 INFO L82 PathProgramCache]: Analyzing trace with hash 642491211, now seen corresponding path program 9 times [2018-01-21 08:45:57,138 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:57,139 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:57,139 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:57,139 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:57,139 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:57,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:57,150 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:57,260 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:57,261 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:57,261 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:57,261 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:57,261 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:57,261 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:57,261 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:57,270 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:45:57,270 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:45:57,279 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:57,282 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:57,290 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:57,294 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:57,298 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:57,301 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:57,305 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:57,306 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:57,327 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:57,327 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:57,723 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:57,743 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:57,743 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:57,746 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:45:57,746 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:45:57,757 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:57,767 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:57,779 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:57,790 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:57,799 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:57,808 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:45:57,815 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:57,818 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:57,823 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:57,823 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:57,916 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:57,918 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:57,918 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 25 [2018-01-21 08:45:57,918 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:57,919 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-21 08:45:57,919 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-21 08:45:57,919 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=278, Invalid=322, Unknown=0, NotChecked=0, Total=600 [2018-01-21 08:45:57,919 INFO L87 Difference]: Start difference. First operand 27 states and 27 transitions. Second operand 14 states. [2018-01-21 08:45:57,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:57,965 INFO L93 Difference]: Finished difference Result 37 states and 37 transitions. [2018-01-21 08:45:57,965 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-21 08:45:57,965 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 26 [2018-01-21 08:45:57,966 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:57,966 INFO L225 Difference]: With dead ends: 37 [2018-01-21 08:45:57,966 INFO L226 Difference]: Without dead ends: 28 [2018-01-21 08:45:57,967 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 90 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=293, Invalid=357, Unknown=0, NotChecked=0, Total=650 [2018-01-21 08:45:57,967 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-01-21 08:45:57,970 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-01-21 08:45:57,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-01-21 08:45:57,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 28 transitions. [2018-01-21 08:45:57,970 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 28 transitions. Word has length 26 [2018-01-21 08:45:57,971 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:57,971 INFO L432 AbstractCegarLoop]: Abstraction has 28 states and 28 transitions. [2018-01-21 08:45:57,971 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-21 08:45:57,971 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-01-21 08:45:57,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-21 08:45:57,972 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:57,972 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:57,972 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:57,972 INFO L82 PathProgramCache]: Analyzing trace with hash 1335383216, now seen corresponding path program 10 times [2018-01-21 08:45:57,972 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:57,973 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:57,973 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:57,973 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:57,973 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:57,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:57,982 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:58,090 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:58,090 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:58,090 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:58,090 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:58,090 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:58,090 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:58,090 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:58,098 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:45:58,098 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:45:58,110 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:58,112 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:58,122 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:58,122 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:58,477 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:58,497 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:58,498 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:58,501 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:45:58,501 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:45:58,539 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:58,542 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:58,547 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:58,547 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:58,656 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:58,657 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:58,657 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 27 [2018-01-21 08:45:58,657 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:58,658 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-21 08:45:58,658 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-21 08:45:58,658 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=327, Invalid=375, Unknown=0, NotChecked=0, Total=702 [2018-01-21 08:45:58,658 INFO L87 Difference]: Start difference. First operand 28 states and 28 transitions. Second operand 15 states. [2018-01-21 08:45:58,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:58,686 INFO L93 Difference]: Finished difference Result 38 states and 38 transitions. [2018-01-21 08:45:58,687 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-21 08:45:58,687 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 27 [2018-01-21 08:45:58,687 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:58,688 INFO L225 Difference]: With dead ends: 38 [2018-01-21 08:45:58,688 INFO L226 Difference]: Without dead ends: 29 [2018-01-21 08:45:58,688 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 93 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=343, Invalid=413, Unknown=0, NotChecked=0, Total=756 [2018-01-21 08:45:58,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-01-21 08:45:58,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-01-21 08:45:58,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-01-21 08:45:58,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 29 transitions. [2018-01-21 08:45:58,692 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 29 transitions. Word has length 27 [2018-01-21 08:45:58,692 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:58,692 INFO L432 AbstractCegarLoop]: Abstraction has 29 states and 29 transitions. [2018-01-21 08:45:58,692 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-21 08:45:58,692 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2018-01-21 08:45:58,693 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-21 08:45:58,693 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:58,693 INFO L322 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:58,693 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:58,693 INFO L82 PathProgramCache]: Analyzing trace with hash 1340198891, now seen corresponding path program 11 times [2018-01-21 08:45:58,693 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:58,694 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:58,694 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:58,694 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:58,694 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:58,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:58,703 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:58,845 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:58,845 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:58,846 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:58,846 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:58,846 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:58,846 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:58,846 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:58,854 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:45:58,854 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:58,858 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:58,859 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:58,860 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:58,861 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:58,862 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:58,863 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:58,867 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:58,868 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:58,870 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:58,877 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:58,877 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:59,185 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:59,205 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:59,205 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:59,208 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:45:59,208 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:45:59,212 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:59,213 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:59,217 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:59,220 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:59,224 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:59,229 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:59,240 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:45:59,253 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:59,257 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:59,264 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:59,264 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:59,364 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:59,366 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:45:59,366 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 29 [2018-01-21 08:45:59,366 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:45:59,366 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-21 08:45:59,366 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-21 08:45:59,367 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=380, Invalid=432, Unknown=0, NotChecked=0, Total=812 [2018-01-21 08:45:59,367 INFO L87 Difference]: Start difference. First operand 29 states and 29 transitions. Second operand 16 states. [2018-01-21 08:45:59,402 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:45:59,402 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-01-21 08:45:59,402 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-21 08:45:59,403 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 28 [2018-01-21 08:45:59,403 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:45:59,403 INFO L225 Difference]: With dead ends: 39 [2018-01-21 08:45:59,403 INFO L226 Difference]: Without dead ends: 30 [2018-01-21 08:45:59,404 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 96 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=397, Invalid=473, Unknown=0, NotChecked=0, Total=870 [2018-01-21 08:45:59,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-01-21 08:45:59,407 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-01-21 08:45:59,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-01-21 08:45:59,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 30 transitions. [2018-01-21 08:45:59,408 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 30 transitions. Word has length 28 [2018-01-21 08:45:59,408 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:45:59,408 INFO L432 AbstractCegarLoop]: Abstraction has 30 states and 30 transitions. [2018-01-21 08:45:59,409 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-21 08:45:59,409 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-01-21 08:45:59,409 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-21 08:45:59,410 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:45:59,410 INFO L322 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:45:59,410 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:45:59,410 INFO L82 PathProgramCache]: Analyzing trace with hash 1489484816, now seen corresponding path program 12 times [2018-01-21 08:45:59,410 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:45:59,411 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:59,411 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:45:59,411 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:45:59,411 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:45:59,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:45:59,420 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:45:59,537 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:59,537 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:59,537 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:45:59,538 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:45:59,538 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:45:59,538 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:59,538 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:45:59,543 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:45:59,543 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:45:59,549 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:59,551 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:59,552 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:59,553 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:59,554 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:59,555 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:59,556 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:59,556 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:59,557 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:59,564 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:59,564 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:45:59,868 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:59,887 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:45:59,888 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:45:59,890 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:45:59,890 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:45:59,899 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:59,906 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:59,914 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:59,922 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:59,930 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:59,939 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:59,948 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:45:59,955 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:45:59,958 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:45:59,963 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:45:59,963 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:00,055 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:00,057 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:00,057 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 31 [2018-01-21 08:46:00,057 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:00,057 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-21 08:46:00,057 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-21 08:46:00,058 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=437, Invalid=493, Unknown=0, NotChecked=0, Total=930 [2018-01-21 08:46:00,058 INFO L87 Difference]: Start difference. First operand 30 states and 30 transitions. Second operand 17 states. [2018-01-21 08:46:00,081 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:00,081 INFO L93 Difference]: Finished difference Result 40 states and 40 transitions. [2018-01-21 08:46:00,081 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-21 08:46:00,081 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 29 [2018-01-21 08:46:00,081 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:00,082 INFO L225 Difference]: With dead ends: 40 [2018-01-21 08:46:00,082 INFO L226 Difference]: Without dead ends: 31 [2018-01-21 08:46:00,082 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 99 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=455, Invalid=537, Unknown=0, NotChecked=0, Total=992 [2018-01-21 08:46:00,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2018-01-21 08:46:00,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2018-01-21 08:46:00,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-01-21 08:46:00,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 31 transitions. [2018-01-21 08:46:00,085 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 31 transitions. Word has length 29 [2018-01-21 08:46:00,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:00,085 INFO L432 AbstractCegarLoop]: Abstraction has 31 states and 31 transitions. [2018-01-21 08:46:00,085 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-21 08:46:00,085 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 31 transitions. [2018-01-21 08:46:00,085 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-21 08:46:00,085 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:00,085 INFO L322 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:00,085 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:00,086 INFO L82 PathProgramCache]: Analyzing trace with hash 1822381195, now seen corresponding path program 13 times [2018-01-21 08:46:00,086 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:00,086 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:00,086 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:00,086 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:00,086 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:00,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:00,094 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:00,187 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:00,188 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:00,188 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:00,188 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:00,188 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:00,188 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:00,188 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:00,193 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:00,193 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:46:00,202 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:00,203 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:00,211 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:00,211 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:00,578 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:00,604 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:00,604 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:00,607 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:00,607 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:46:00,626 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:00,629 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:00,634 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:00,634 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:00,746 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:00,748 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:00,748 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 33 [2018-01-21 08:46:00,748 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:00,748 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-21 08:46:00,749 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-21 08:46:00,749 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=498, Invalid=558, Unknown=0, NotChecked=0, Total=1056 [2018-01-21 08:46:00,749 INFO L87 Difference]: Start difference. First operand 31 states and 31 transitions. Second operand 18 states. [2018-01-21 08:46:00,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:00,779 INFO L93 Difference]: Finished difference Result 41 states and 41 transitions. [2018-01-21 08:46:00,779 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-21 08:46:00,779 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 30 [2018-01-21 08:46:00,779 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:00,780 INFO L225 Difference]: With dead ends: 41 [2018-01-21 08:46:00,780 INFO L226 Difference]: Without dead ends: 32 [2018-01-21 08:46:00,780 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 102 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=517, Invalid=605, Unknown=0, NotChecked=0, Total=1122 [2018-01-21 08:46:00,781 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-01-21 08:46:00,782 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2018-01-21 08:46:00,782 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-01-21 08:46:00,783 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 32 transitions. [2018-01-21 08:46:00,783 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 32 transitions. Word has length 30 [2018-01-21 08:46:00,783 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:00,783 INFO L432 AbstractCegarLoop]: Abstraction has 32 states and 32 transitions. [2018-01-21 08:46:00,783 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-21 08:46:00,783 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2018-01-21 08:46:00,783 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-21 08:46:00,783 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:00,783 INFO L322 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:00,784 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:00,784 INFO L82 PathProgramCache]: Analyzing trace with hash -742732944, now seen corresponding path program 14 times [2018-01-21 08:46:00,784 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:00,784 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:00,784 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:00,784 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:00,785 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:00,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:00,790 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:00,936 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:00,936 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:00,936 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:00,936 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:00,937 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:00,937 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:00,937 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2018-01-21 08:46:00,947 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:46:00,948 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:00,957 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:00,965 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:00,966 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:00,967 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:00,975 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:00,975 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:01,352 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:01,385 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:01,385 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:01,388 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:46:01,388 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:01,399 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:01,413 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:01,427 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:01,430 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:01,437 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:01,437 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:01,576 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:01,578 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:01,578 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 35 [2018-01-21 08:46:01,578 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:01,578 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-21 08:46:01,578 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-21 08:46:01,578 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=563, Invalid=627, Unknown=0, NotChecked=0, Total=1190 [2018-01-21 08:46:01,579 INFO L87 Difference]: Start difference. First operand 32 states and 32 transitions. Second operand 19 states. [2018-01-21 08:46:01,744 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:01,744 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-01-21 08:46:01,745 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-21 08:46:01,745 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 31 [2018-01-21 08:46:01,746 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:01,746 INFO L225 Difference]: With dead ends: 42 [2018-01-21 08:46:01,746 INFO L226 Difference]: Without dead ends: 33 [2018-01-21 08:46:01,747 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 105 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 87 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=583, Invalid=677, Unknown=0, NotChecked=0, Total=1260 [2018-01-21 08:46:01,747 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-01-21 08:46:01,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2018-01-21 08:46:01,750 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-01-21 08:46:01,751 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 33 transitions. [2018-01-21 08:46:01,751 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 33 transitions. Word has length 31 [2018-01-21 08:46:01,751 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:01,751 INFO L432 AbstractCegarLoop]: Abstraction has 33 states and 33 transitions. [2018-01-21 08:46:01,751 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-21 08:46:01,752 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-01-21 08:46:01,752 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-21 08:46:01,752 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:01,752 INFO L322 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:01,752 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:01,753 INFO L82 PathProgramCache]: Analyzing trace with hash 1343107371, now seen corresponding path program 15 times [2018-01-21 08:46:01,753 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:01,753 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:01,753 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:01,754 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:01,754 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:01,759 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:01,760 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:01,933 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:01,933 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:01,933 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:01,933 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:01,933 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:01,934 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:01,934 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:01,943 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:46:01,943 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:46:01,951 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:01,952 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:01,953 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:01,955 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:01,956 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:01,957 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:01,958 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:01,959 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:01,960 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:01,961 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:01,962 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:01,972 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:01,972 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:02,987 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:03,008 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:03,008 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:03,011 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:46:03,011 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:46:03,021 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:03,027 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:03,035 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:03,042 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:03,050 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:03,059 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:03,067 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:03,077 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:03,086 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:03,093 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:03,096 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:03,100 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:03,101 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:03,217 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:03,218 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:03,218 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 37 [2018-01-21 08:46:03,218 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:03,219 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-21 08:46:03,219 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-21 08:46:03,219 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=632, Invalid=700, Unknown=0, NotChecked=0, Total=1332 [2018-01-21 08:46:03,219 INFO L87 Difference]: Start difference. First operand 33 states and 33 transitions. Second operand 20 states. [2018-01-21 08:46:03,247 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:03,247 INFO L93 Difference]: Finished difference Result 43 states and 43 transitions. [2018-01-21 08:46:03,247 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-21 08:46:03,247 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 32 [2018-01-21 08:46:03,248 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:03,248 INFO L225 Difference]: With dead ends: 43 [2018-01-21 08:46:03,248 INFO L226 Difference]: Without dead ends: 34 [2018-01-21 08:46:03,248 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 108 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=653, Invalid=753, Unknown=0, NotChecked=0, Total=1406 [2018-01-21 08:46:03,248 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-01-21 08:46:03,251 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-01-21 08:46:03,251 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-01-21 08:46:03,252 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2018-01-21 08:46:03,252 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 32 [2018-01-21 08:46:03,252 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:03,252 INFO L432 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2018-01-21 08:46:03,252 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-21 08:46:03,252 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-01-21 08:46:03,252 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-21 08:46:03,253 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:03,253 INFO L322 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:03,253 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:03,253 INFO L82 PathProgramCache]: Analyzing trace with hash 1579647696, now seen corresponding path program 16 times [2018-01-21 08:46:03,253 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:03,253 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:03,253 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:03,254 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:03,254 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:03,260 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:03,261 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:03,404 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:03,404 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:03,404 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:03,404 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:03,404 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:03,404 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:03,404 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:03,412 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:46:03,412 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:46:03,425 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:03,427 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:03,440 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:03,440 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:04,047 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:04,067 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:04,067 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:04,070 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:46:04,070 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:46:04,099 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:04,101 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:04,106 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:04,106 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:04,231 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:04,232 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:04,232 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 39 [2018-01-21 08:46:04,232 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:04,233 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-21 08:46:04,233 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-21 08:46:04,233 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=705, Invalid=777, Unknown=0, NotChecked=0, Total=1482 [2018-01-21 08:46:04,233 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand 21 states. [2018-01-21 08:46:04,273 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:04,273 INFO L93 Difference]: Finished difference Result 44 states and 44 transitions. [2018-01-21 08:46:04,273 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-21 08:46:04,273 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 33 [2018-01-21 08:46:04,274 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:04,274 INFO L225 Difference]: With dead ends: 44 [2018-01-21 08:46:04,274 INFO L226 Difference]: Without dead ends: 35 [2018-01-21 08:46:04,275 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 111 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=727, Invalid=833, Unknown=0, NotChecked=0, Total=1560 [2018-01-21 08:46:04,275 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-01-21 08:46:04,277 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 35. [2018-01-21 08:46:04,277 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-01-21 08:46:04,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 35 transitions. [2018-01-21 08:46:04,278 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 35 transitions. Word has length 33 [2018-01-21 08:46:04,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:04,278 INFO L432 AbstractCegarLoop]: Abstraction has 35 states and 35 transitions. [2018-01-21 08:46:04,278 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-21 08:46:04,278 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 35 transitions. [2018-01-21 08:46:04,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-21 08:46:04,279 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:04,279 INFO L322 BasicCegarLoop]: trace histogram [17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:04,279 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:04,279 INFO L82 PathProgramCache]: Analyzing trace with hash 322463179, now seen corresponding path program 17 times [2018-01-21 08:46:04,279 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:04,280 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:04,280 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:04,280 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:04,280 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:04,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:04,287 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:04,460 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:04,461 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:04,461 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:04,461 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:04,461 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:04,461 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:04,461 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:04,466 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:46:04,466 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:04,469 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:04,470 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:04,471 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:04,472 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:04,473 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:04,473 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:04,474 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:04,475 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:04,476 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:04,480 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:04,481 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:04,482 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:04,489 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:04,489 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:04,970 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:04,990 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:04,990 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:04,993 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:46:04,993 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:04,997 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:04,998 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:05,002 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:05,005 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:05,009 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:05,013 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:05,018 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:05,022 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:05,028 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:05,038 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:05,046 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:05,049 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:05,054 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:05,054 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:05,217 WARN L143 SmtUtils]: Spent 102ms on a formula simplification that was a NOOP. DAG size: 59 [2018-01-21 08:46:05,263 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:05,264 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:05,265 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 41 [2018-01-21 08:46:05,265 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:05,265 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-21 08:46:05,265 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-21 08:46:05,266 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=782, Invalid=858, Unknown=0, NotChecked=0, Total=1640 [2018-01-21 08:46:05,266 INFO L87 Difference]: Start difference. First operand 35 states and 35 transitions. Second operand 22 states. [2018-01-21 08:46:05,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:05,299 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-01-21 08:46:05,299 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-21 08:46:05,299 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 34 [2018-01-21 08:46:05,300 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:05,300 INFO L225 Difference]: With dead ends: 45 [2018-01-21 08:46:05,300 INFO L226 Difference]: Without dead ends: 36 [2018-01-21 08:46:05,300 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 114 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=805, Invalid=917, Unknown=0, NotChecked=0, Total=1722 [2018-01-21 08:46:05,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-01-21 08:46:05,302 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-01-21 08:46:05,303 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-01-21 08:46:05,303 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-01-21 08:46:05,303 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 34 [2018-01-21 08:46:05,303 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:05,303 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-01-21 08:46:05,303 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-21 08:46:05,303 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-01-21 08:46:05,304 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-21 08:46:05,304 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:05,304 INFO L322 BasicCegarLoop]: trace histogram [18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:05,304 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:05,304 INFO L82 PathProgramCache]: Analyzing trace with hash 4448816, now seen corresponding path program 18 times [2018-01-21 08:46:05,304 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:05,305 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:05,305 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:05,305 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:05,305 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:05,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:05,311 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:05,498 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:05,498 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:05,498 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:05,498 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:05,498 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:05,498 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:05,498 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:05,505 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:46:05,505 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:46:05,512 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:05,516 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:05,517 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:05,518 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:05,519 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:05,520 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:05,521 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:05,522 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:05,523 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:05,524 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:05,524 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:05,526 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:05,533 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:05,533 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:06,115 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:06,135 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:06,135 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:06,138 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:46:06,138 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:46:06,146 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:06,153 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:06,160 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:06,168 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:06,177 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:06,185 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:06,195 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:06,204 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:06,214 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:06,225 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:06,233 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:06,236 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:06,240 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:06,241 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:06,378 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:06,379 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:06,379 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 43 [2018-01-21 08:46:06,379 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:06,379 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-21 08:46:06,379 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-21 08:46:06,380 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=863, Invalid=943, Unknown=0, NotChecked=0, Total=1806 [2018-01-21 08:46:06,380 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 23 states. [2018-01-21 08:46:06,408 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:06,408 INFO L93 Difference]: Finished difference Result 46 states and 46 transitions. [2018-01-21 08:46:06,408 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-21 08:46:06,408 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 35 [2018-01-21 08:46:06,408 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:06,409 INFO L225 Difference]: With dead ends: 46 [2018-01-21 08:46:06,409 INFO L226 Difference]: Without dead ends: 37 [2018-01-21 08:46:06,409 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 117 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=887, Invalid=1005, Unknown=0, NotChecked=0, Total=1892 [2018-01-21 08:46:06,409 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-01-21 08:46:06,411 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 37. [2018-01-21 08:46:06,411 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-01-21 08:46:06,412 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 37 transitions. [2018-01-21 08:46:06,412 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 37 transitions. Word has length 35 [2018-01-21 08:46:06,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:06,412 INFO L432 AbstractCegarLoop]: Abstraction has 37 states and 37 transitions. [2018-01-21 08:46:06,412 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-21 08:46:06,412 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 37 transitions. [2018-01-21 08:46:06,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-21 08:46:06,413 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:06,413 INFO L322 BasicCegarLoop]: trace histogram [19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:06,413 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:06,413 INFO L82 PathProgramCache]: Analyzing trace with hash -1264061845, now seen corresponding path program 19 times [2018-01-21 08:46:06,413 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:06,413 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:06,414 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:06,414 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:06,414 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:06,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:06,420 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:06,677 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:06,677 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:06,678 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:06,678 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:06,678 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:06,678 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:06,678 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:06,688 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:06,688 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:46:06,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:06,703 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:06,713 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:06,714 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:07,327 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:07,346 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:07,346 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:07,349 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:07,349 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:46:07,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:07,374 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:07,379 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:07,380 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:07,522 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:07,523 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:07,523 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 45 [2018-01-21 08:46:07,523 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:07,523 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-21 08:46:07,523 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-21 08:46:07,524 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=948, Invalid=1032, Unknown=0, NotChecked=0, Total=1980 [2018-01-21 08:46:07,524 INFO L87 Difference]: Start difference. First operand 37 states and 37 transitions. Second operand 24 states. [2018-01-21 08:46:07,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:07,570 INFO L93 Difference]: Finished difference Result 47 states and 47 transitions. [2018-01-21 08:46:07,570 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-21 08:46:07,570 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 36 [2018-01-21 08:46:07,570 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:07,570 INFO L225 Difference]: With dead ends: 47 [2018-01-21 08:46:07,570 INFO L226 Difference]: Without dead ends: 38 [2018-01-21 08:46:07,571 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 166 GetRequests, 120 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=973, Invalid=1097, Unknown=0, NotChecked=0, Total=2070 [2018-01-21 08:46:07,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2018-01-21 08:46:07,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2018-01-21 08:46:07,573 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-01-21 08:46:07,573 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 38 transitions. [2018-01-21 08:46:07,573 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 38 transitions. Word has length 36 [2018-01-21 08:46:07,573 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:07,573 INFO L432 AbstractCegarLoop]: Abstraction has 38 states and 38 transitions. [2018-01-21 08:46:07,573 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-21 08:46:07,573 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-01-21 08:46:07,574 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-21 08:46:07,574 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:07,574 INFO L322 BasicCegarLoop]: trace histogram [20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:07,574 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:07,574 INFO L82 PathProgramCache]: Analyzing trace with hash -1933186672, now seen corresponding path program 20 times [2018-01-21 08:46:07,574 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:07,575 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:07,575 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:07,575 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:07,575 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:07,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:07,581 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:07,812 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:07,812 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:07,813 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:07,813 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:07,813 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:07,813 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:07,813 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:07,818 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:46:07,818 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:07,824 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:07,829 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:07,831 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:07,832 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:07,841 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:07,841 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:08,442 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:08,460 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:08,460 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:08,463 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:46:08,463 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:08,473 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:08,484 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:08,493 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:08,496 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:08,501 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:08,501 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:08,640 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:08,642 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:08,642 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 47 [2018-01-21 08:46:08,642 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:08,642 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-21 08:46:08,642 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-21 08:46:08,643 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1037, Invalid=1125, Unknown=0, NotChecked=0, Total=2162 [2018-01-21 08:46:08,643 INFO L87 Difference]: Start difference. First operand 38 states and 38 transitions. Second operand 25 states. [2018-01-21 08:46:08,670 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:08,670 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-01-21 08:46:08,670 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-21 08:46:08,670 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 37 [2018-01-21 08:46:08,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:08,671 INFO L225 Difference]: With dead ends: 48 [2018-01-21 08:46:08,671 INFO L226 Difference]: Without dead ends: 39 [2018-01-21 08:46:08,671 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 123 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 123 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1063, Invalid=1193, Unknown=0, NotChecked=0, Total=2256 [2018-01-21 08:46:08,671 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-01-21 08:46:08,673 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-01-21 08:46:08,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-01-21 08:46:08,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 39 transitions. [2018-01-21 08:46:08,673 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 39 transitions. Word has length 37 [2018-01-21 08:46:08,673 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:08,673 INFO L432 AbstractCegarLoop]: Abstraction has 39 states and 39 transitions. [2018-01-21 08:46:08,674 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-21 08:46:08,674 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-01-21 08:46:08,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-21 08:46:08,674 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:08,674 INFO L322 BasicCegarLoop]: trace histogram [21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:08,674 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:08,674 INFO L82 PathProgramCache]: Analyzing trace with hash -1201219829, now seen corresponding path program 21 times [2018-01-21 08:46:08,674 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:08,675 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:08,675 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:08,675 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:08,675 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:08,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:08,681 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:08,857 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:08,857 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:08,857 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:08,857 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:08,857 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:08,857 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:08,858 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:08,862 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:46:08,862 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:46:08,869 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:08,871 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:08,872 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:08,874 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:08,875 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:08,876 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:08,878 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:08,879 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:08,880 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:08,882 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:08,883 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:08,884 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:08,885 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:08,886 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:08,894 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:08,895 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:09,576 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:09,596 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:09,596 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:09,599 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:46:09,600 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:46:09,611 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:09,617 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:09,625 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:09,633 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:09,642 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:09,650 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:09,660 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:09,670 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:09,680 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:09,691 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:09,703 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:09,714 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:09,723 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:09,726 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:09,731 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:09,732 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:09,888 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:09,889 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:09,889 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 49 [2018-01-21 08:46:09,889 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:09,889 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-21 08:46:09,890 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-21 08:46:09,890 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1130, Invalid=1222, Unknown=0, NotChecked=0, Total=2352 [2018-01-21 08:46:09,890 INFO L87 Difference]: Start difference. First operand 39 states and 39 transitions. Second operand 26 states. [2018-01-21 08:46:09,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:09,922 INFO L93 Difference]: Finished difference Result 49 states and 49 transitions. [2018-01-21 08:46:09,922 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-21 08:46:09,923 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 38 [2018-01-21 08:46:09,923 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:09,923 INFO L225 Difference]: With dead ends: 49 [2018-01-21 08:46:09,923 INFO L226 Difference]: Without dead ends: 40 [2018-01-21 08:46:09,924 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 126 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 129 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1157, Invalid=1293, Unknown=0, NotChecked=0, Total=2450 [2018-01-21 08:46:09,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-01-21 08:46:09,927 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2018-01-21 08:46:09,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-01-21 08:46:09,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 40 transitions. [2018-01-21 08:46:09,927 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 40 transitions. Word has length 38 [2018-01-21 08:46:09,927 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:09,927 INFO L432 AbstractCegarLoop]: Abstraction has 40 states and 40 transitions. [2018-01-21 08:46:09,928 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-21 08:46:09,928 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 40 transitions. [2018-01-21 08:46:09,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-21 08:46:09,928 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:09,928 INFO L322 BasicCegarLoop]: trace histogram [22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:09,928 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:09,928 INFO L82 PathProgramCache]: Analyzing trace with hash 14915824, now seen corresponding path program 22 times [2018-01-21 08:46:09,928 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:09,929 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:09,929 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:09,929 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:09,929 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:09,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:09,935 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:10,114 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:10,114 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:10,114 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:10,114 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:10,114 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:10,114 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:10,115 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:10,119 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:46:10,119 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:46:10,132 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:10,133 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:10,142 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:10,142 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:10,920 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:10,940 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:10,940 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:10,943 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:46:10,943 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:46:10,976 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:10,980 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:10,985 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:10,985 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:11,153 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:11,154 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:11,154 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 51 [2018-01-21 08:46:11,155 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:11,155 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-21 08:46:11,155 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-21 08:46:11,155 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1227, Invalid=1323, Unknown=0, NotChecked=0, Total=2550 [2018-01-21 08:46:11,156 INFO L87 Difference]: Start difference. First operand 40 states and 40 transitions. Second operand 27 states. [2018-01-21 08:46:11,208 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:11,208 INFO L93 Difference]: Finished difference Result 50 states and 50 transitions. [2018-01-21 08:46:11,208 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-21 08:46:11,208 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 39 [2018-01-21 08:46:11,209 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:11,209 INFO L225 Difference]: With dead ends: 50 [2018-01-21 08:46:11,209 INFO L226 Difference]: Without dead ends: 41 [2018-01-21 08:46:11,210 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 181 GetRequests, 129 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 135 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1255, Invalid=1397, Unknown=0, NotChecked=0, Total=2652 [2018-01-21 08:46:11,210 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-01-21 08:46:11,212 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. [2018-01-21 08:46:11,212 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-01-21 08:46:11,213 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 41 transitions. [2018-01-21 08:46:11,213 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 41 transitions. Word has length 39 [2018-01-21 08:46:11,213 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:11,213 INFO L432 AbstractCegarLoop]: Abstraction has 41 states and 41 transitions. [2018-01-21 08:46:11,213 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-21 08:46:11,213 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 41 transitions. [2018-01-21 08:46:11,213 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-21 08:46:11,213 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:11,213 INFO L322 BasicCegarLoop]: trace histogram [23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:11,214 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:11,214 INFO L82 PathProgramCache]: Analyzing trace with hash -939584597, now seen corresponding path program 23 times [2018-01-21 08:46:11,214 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:11,214 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:11,214 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:11,214 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:11,214 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:11,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:11,221 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:11,430 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:11,430 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:11,430 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:11,431 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:11,431 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:11,431 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:11,431 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:11,436 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:46:11,436 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:11,440 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:11,441 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:11,442 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:11,443 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:11,444 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:11,444 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:11,445 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:11,446 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:11,447 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:11,448 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:11,449 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:11,450 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:11,454 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:11,455 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:11,457 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:11,465 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:11,465 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:12,257 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:12,278 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:12,278 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:12,281 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:46:12,281 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:12,285 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:12,287 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:12,290 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:12,294 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:12,298 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:12,303 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:12,307 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:12,313 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:12,318 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:12,324 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:12,331 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:12,338 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:12,350 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:12,360 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:12,363 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:12,371 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:12,371 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:12,555 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:12,557 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:12,557 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 53 [2018-01-21 08:46:12,557 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:12,557 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-21 08:46:12,557 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-21 08:46:12,558 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1328, Invalid=1428, Unknown=0, NotChecked=0, Total=2756 [2018-01-21 08:46:12,558 INFO L87 Difference]: Start difference. First operand 41 states and 41 transitions. Second operand 28 states. [2018-01-21 08:46:12,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:12,605 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-01-21 08:46:12,606 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-21 08:46:12,606 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 40 [2018-01-21 08:46:12,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:12,606 INFO L225 Difference]: With dead ends: 51 [2018-01-21 08:46:12,606 INFO L226 Difference]: Without dead ends: 42 [2018-01-21 08:46:12,607 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 132 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 141 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1357, Invalid=1505, Unknown=0, NotChecked=0, Total=2862 [2018-01-21 08:46:12,607 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-01-21 08:46:12,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2018-01-21 08:46:12,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-01-21 08:46:12,609 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 42 transitions. [2018-01-21 08:46:12,609 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 42 transitions. Word has length 40 [2018-01-21 08:46:12,610 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:12,610 INFO L432 AbstractCegarLoop]: Abstraction has 42 states and 42 transitions. [2018-01-21 08:46:12,610 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-21 08:46:12,610 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-01-21 08:46:12,610 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-21 08:46:12,610 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:12,611 INFO L322 BasicCegarLoop]: trace histogram [24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:12,611 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:12,611 INFO L82 PathProgramCache]: Analyzing trace with hash -464326576, now seen corresponding path program 24 times [2018-01-21 08:46:12,611 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:12,611 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:12,611 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:12,612 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:12,612 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:12,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:12,618 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:12,886 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:12,886 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:12,886 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:12,886 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:12,886 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:12,886 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:12,887 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:12,891 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:46:12,892 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:46:12,898 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:12,900 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:12,901 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:12,902 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:12,903 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:12,904 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:12,905 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:12,907 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:12,908 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:12,909 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:12,910 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:12,911 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:12,912 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:12,913 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:12,914 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:12,924 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:12,925 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:13,778 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:13,808 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:13,808 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:13,811 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:46:13,811 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:46:13,821 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:13,828 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:13,836 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:13,844 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:13,853 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:13,862 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:13,871 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:13,881 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:13,892 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:13,903 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:13,914 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:13,925 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:13,937 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:13,946 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:13,950 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:13,955 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:13,955 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:14,147 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:14,149 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:14,149 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 55 [2018-01-21 08:46:14,149 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:14,149 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-21 08:46:14,150 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-21 08:46:14,150 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1433, Invalid=1537, Unknown=0, NotChecked=0, Total=2970 [2018-01-21 08:46:14,150 INFO L87 Difference]: Start difference. First operand 42 states and 42 transitions. Second operand 29 states. [2018-01-21 08:46:14,209 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:14,210 INFO L93 Difference]: Finished difference Result 52 states and 52 transitions. [2018-01-21 08:46:14,210 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-21 08:46:14,210 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 41 [2018-01-21 08:46:14,210 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:14,210 INFO L225 Difference]: With dead ends: 52 [2018-01-21 08:46:14,210 INFO L226 Difference]: Without dead ends: 43 [2018-01-21 08:46:14,211 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 135 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 147 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1463, Invalid=1617, Unknown=0, NotChecked=0, Total=3080 [2018-01-21 08:46:14,211 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-01-21 08:46:14,214 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2018-01-21 08:46:14,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-01-21 08:46:14,215 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 43 transitions. [2018-01-21 08:46:14,215 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 43 transitions. Word has length 41 [2018-01-21 08:46:14,215 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:14,215 INFO L432 AbstractCegarLoop]: Abstraction has 43 states and 43 transitions. [2018-01-21 08:46:14,215 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-21 08:46:14,216 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 43 transitions. [2018-01-21 08:46:14,216 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-21 08:46:14,216 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:14,216 INFO L322 BasicCegarLoop]: trace histogram [25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:14,216 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:14,217 INFO L82 PathProgramCache]: Analyzing trace with hash 1383770187, now seen corresponding path program 25 times [2018-01-21 08:46:14,217 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:14,217 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:14,217 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:14,218 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:14,218 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:14,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:14,226 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:14,493 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:14,493 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:14,494 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:14,494 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:14,494 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:14,494 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:14,494 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:14,499 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:14,499 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:46:14,511 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:14,513 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:14,522 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:14,522 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:15,471 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:15,492 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:15,492 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:15,495 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:15,495 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:46:15,521 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:15,525 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:15,535 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:15,535 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:15,769 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:15,770 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:15,770 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 57 [2018-01-21 08:46:15,771 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:15,771 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-21 08:46:15,771 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-21 08:46:15,772 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1542, Invalid=1650, Unknown=0, NotChecked=0, Total=3192 [2018-01-21 08:46:15,772 INFO L87 Difference]: Start difference. First operand 43 states and 43 transitions. Second operand 30 states. [2018-01-21 08:46:15,821 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:15,821 INFO L93 Difference]: Finished difference Result 53 states and 53 transitions. [2018-01-21 08:46:15,822 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-21 08:46:15,822 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 42 [2018-01-21 08:46:15,822 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:15,822 INFO L225 Difference]: With dead ends: 53 [2018-01-21 08:46:15,822 INFO L226 Difference]: Without dead ends: 44 [2018-01-21 08:46:15,823 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 196 GetRequests, 138 SyntacticMatches, 2 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 153 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1573, Invalid=1733, Unknown=0, NotChecked=0, Total=3306 [2018-01-21 08:46:15,823 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-01-21 08:46:15,825 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-01-21 08:46:15,825 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-01-21 08:46:15,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 44 transitions. [2018-01-21 08:46:15,826 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 44 transitions. Word has length 42 [2018-01-21 08:46:15,826 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:15,826 INFO L432 AbstractCegarLoop]: Abstraction has 44 states and 44 transitions. [2018-01-21 08:46:15,826 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-21 08:46:15,826 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 44 transitions. [2018-01-21 08:46:15,826 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-21 08:46:15,826 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:15,826 INFO L322 BasicCegarLoop]: trace histogram [26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:15,826 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:15,827 INFO L82 PathProgramCache]: Analyzing trace with hash -1454772304, now seen corresponding path program 26 times [2018-01-21 08:46:15,827 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:15,827 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:15,827 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:15,827 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:15,827 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:15,835 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:15,836 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:16,095 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:16,095 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:16,095 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:16,095 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:16,095 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:16,096 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:16,096 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:16,101 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:46:16,101 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:16,108 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:16,113 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:16,114 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:16,116 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:16,125 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:16,126 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:17,095 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:17,115 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:17,115 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:17,118 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:46:17,118 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:17,127 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:17,140 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:17,152 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:17,156 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:17,162 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:17,162 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:17,378 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:17,379 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:17,379 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 59 [2018-01-21 08:46:17,380 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:17,380 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-01-21 08:46:17,380 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-01-21 08:46:17,381 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1655, Invalid=1767, Unknown=0, NotChecked=0, Total=3422 [2018-01-21 08:46:17,381 INFO L87 Difference]: Start difference. First operand 44 states and 44 transitions. Second operand 31 states. [2018-01-21 08:46:17,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:17,423 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2018-01-21 08:46:17,424 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-01-21 08:46:17,424 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 43 [2018-01-21 08:46:17,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:17,424 INFO L225 Difference]: With dead ends: 54 [2018-01-21 08:46:17,424 INFO L226 Difference]: Without dead ends: 45 [2018-01-21 08:46:17,425 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 201 GetRequests, 141 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 159 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1687, Invalid=1853, Unknown=0, NotChecked=0, Total=3540 [2018-01-21 08:46:17,425 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-01-21 08:46:17,426 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-01-21 08:46:17,426 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-01-21 08:46:17,427 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 45 transitions. [2018-01-21 08:46:17,427 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 45 transitions. Word has length 43 [2018-01-21 08:46:17,427 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:17,427 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 45 transitions. [2018-01-21 08:46:17,427 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-01-21 08:46:17,427 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 45 transitions. [2018-01-21 08:46:17,427 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-21 08:46:17,427 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:17,428 INFO L322 BasicCegarLoop]: trace histogram [27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:17,428 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:17,428 INFO L82 PathProgramCache]: Analyzing trace with hash 744723691, now seen corresponding path program 27 times [2018-01-21 08:46:17,428 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:17,428 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:17,428 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:17,428 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:17,429 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:17,436 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:17,437 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:17,700 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:17,700 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:17,700 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:17,700 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:17,700 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:17,701 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:17,701 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:17,705 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:46:17,705 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:46:17,713 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:17,714 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:17,715 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:17,717 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:17,718 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:17,719 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:17,720 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:17,721 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:17,722 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:17,723 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:17,724 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:17,725 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:17,726 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:17,727 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:17,728 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:17,729 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:17,730 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:17,739 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:17,739 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:18,761 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:18,781 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:18,781 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:18,784 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:46:18,784 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:46:18,799 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:18,806 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:18,813 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:18,821 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:18,829 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:18,838 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:18,848 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:18,858 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:18,868 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:18,879 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:18,890 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:18,902 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:18,913 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:18,926 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:18,938 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:18,948 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:18,951 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:18,957 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:18,957 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:19,169 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:19,170 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:19,170 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 61 [2018-01-21 08:46:19,170 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:19,171 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-21 08:46:19,171 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-21 08:46:19,171 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1772, Invalid=1888, Unknown=0, NotChecked=0, Total=3660 [2018-01-21 08:46:19,171 INFO L87 Difference]: Start difference. First operand 45 states and 45 transitions. Second operand 32 states. [2018-01-21 08:46:19,216 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:19,216 INFO L93 Difference]: Finished difference Result 55 states and 55 transitions. [2018-01-21 08:46:19,217 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-21 08:46:19,217 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 44 [2018-01-21 08:46:19,217 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:19,217 INFO L225 Difference]: With dead ends: 55 [2018-01-21 08:46:19,217 INFO L226 Difference]: Without dead ends: 46 [2018-01-21 08:46:19,218 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 144 SyntacticMatches, 2 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 165 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1805, Invalid=1977, Unknown=0, NotChecked=0, Total=3782 [2018-01-21 08:46:19,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-01-21 08:46:19,220 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2018-01-21 08:46:19,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-01-21 08:46:19,221 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 46 transitions. [2018-01-21 08:46:19,221 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 46 transitions. Word has length 44 [2018-01-21 08:46:19,221 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:19,221 INFO L432 AbstractCegarLoop]: Abstraction has 46 states and 46 transitions. [2018-01-21 08:46:19,221 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-21 08:46:19,222 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 46 transitions. [2018-01-21 08:46:19,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-21 08:46:19,222 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:19,222 INFO L322 BasicCegarLoop]: trace histogram [28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:19,222 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:19,222 INFO L82 PathProgramCache]: Analyzing trace with hash 209622800, now seen corresponding path program 28 times [2018-01-21 08:46:19,223 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:19,223 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:19,223 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:19,224 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:19,224 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:19,232 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:19,233 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:19,550 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:19,550 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:19,550 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:19,550 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:19,550 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:19,550 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:19,551 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:19,556 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:46:19,556 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:46:19,571 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:19,572 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:19,581 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:19,581 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:20,681 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:20,701 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:20,701 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:20,704 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:46:20,704 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:46:20,743 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:20,746 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:20,753 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:20,753 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:20,981 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:20,982 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:20,982 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32, 32, 32] total 63 [2018-01-21 08:46:20,982 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:20,982 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-01-21 08:46:20,983 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-01-21 08:46:20,983 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1893, Invalid=2013, Unknown=0, NotChecked=0, Total=3906 [2018-01-21 08:46:20,983 INFO L87 Difference]: Start difference. First operand 46 states and 46 transitions. Second operand 33 states. [2018-01-21 08:46:21,037 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:21,038 INFO L93 Difference]: Finished difference Result 56 states and 56 transitions. [2018-01-21 08:46:21,038 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-21 08:46:21,038 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 45 [2018-01-21 08:46:21,038 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:21,038 INFO L225 Difference]: With dead ends: 56 [2018-01-21 08:46:21,038 INFO L226 Difference]: Without dead ends: 47 [2018-01-21 08:46:21,039 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 211 GetRequests, 147 SyntacticMatches, 2 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 171 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1927, Invalid=2105, Unknown=0, NotChecked=0, Total=4032 [2018-01-21 08:46:21,039 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-01-21 08:46:21,040 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2018-01-21 08:46:21,040 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-01-21 08:46:21,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 47 transitions. [2018-01-21 08:46:21,041 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 47 transitions. Word has length 45 [2018-01-21 08:46:21,041 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:21,041 INFO L432 AbstractCegarLoop]: Abstraction has 47 states and 47 transitions. [2018-01-21 08:46:21,041 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-01-21 08:46:21,041 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 47 transitions. [2018-01-21 08:46:21,041 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-21 08:46:21,041 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:21,042 INFO L322 BasicCegarLoop]: trace histogram [29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:21,042 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:21,042 INFO L82 PathProgramCache]: Analyzing trace with hash 801364363, now seen corresponding path program 29 times [2018-01-21 08:46:21,042 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:21,042 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:21,042 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:21,042 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:21,043 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:21,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:21,051 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:21,335 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:21,336 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:21,336 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:21,336 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:21,336 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:21,336 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:21,336 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:21,347 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:46:21,347 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:21,351 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:21,352 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:21,352 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:21,353 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:21,354 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:21,355 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:21,355 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:21,356 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:21,357 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:21,358 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:21,359 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:21,360 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:21,361 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:21,362 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:21,363 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:21,366 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:21,367 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:21,369 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:21,378 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:21,378 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:22,548 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:22,568 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:22,568 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:22,571 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:46:22,571 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:22,577 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:22,579 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:22,584 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:22,589 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:22,596 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:22,602 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:22,610 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:22,618 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:22,627 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:22,637 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:22,647 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:22,658 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:22,670 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:22,682 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:22,696 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:22,712 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:22,723 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:22,727 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:22,734 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:22,734 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:23,008 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:23,009 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:23,009 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 33] total 65 [2018-01-21 08:46:23,009 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:23,009 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-01-21 08:46:23,009 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-01-21 08:46:23,010 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2018, Invalid=2142, Unknown=0, NotChecked=0, Total=4160 [2018-01-21 08:46:23,010 INFO L87 Difference]: Start difference. First operand 47 states and 47 transitions. Second operand 34 states. [2018-01-21 08:46:23,049 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:23,050 INFO L93 Difference]: Finished difference Result 57 states and 57 transitions. [2018-01-21 08:46:23,050 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-21 08:46:23,050 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 46 [2018-01-21 08:46:23,050 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:23,050 INFO L225 Difference]: With dead ends: 57 [2018-01-21 08:46:23,050 INFO L226 Difference]: Without dead ends: 48 [2018-01-21 08:46:23,051 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 216 GetRequests, 150 SyntacticMatches, 2 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 177 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=2053, Invalid=2237, Unknown=0, NotChecked=0, Total=4290 [2018-01-21 08:46:23,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-01-21 08:46:23,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-01-21 08:46:23,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-21 08:46:23,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-01-21 08:46:23,053 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 46 [2018-01-21 08:46:23,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:23,053 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-01-21 08:46:23,053 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-01-21 08:46:23,054 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-01-21 08:46:23,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-21 08:46:23,054 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:23,054 INFO L322 BasicCegarLoop]: trace histogram [30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:23,054 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:23,054 INFO L82 PathProgramCache]: Analyzing trace with hash 1965483632, now seen corresponding path program 30 times [2018-01-21 08:46:23,054 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:23,055 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:23,055 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:23,055 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:23,055 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:23,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:23,062 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:23,496 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:23,497 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:23,497 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:23,497 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:23,497 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:23,497 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:23,497 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:23,502 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:46:23,502 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:46:23,508 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:23,510 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:23,511 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:23,512 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:23,513 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:23,514 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:23,515 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:23,516 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:23,517 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:23,554 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:23,555 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:23,557 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:23,558 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:23,559 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:23,560 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:23,562 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:23,562 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:23,564 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:23,573 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:23,574 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:24,814 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:24,834 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:24,834 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:24,837 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:46:24,837 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:46:24,846 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:24,853 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:24,860 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:24,869 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:24,877 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:24,885 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:24,895 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:24,904 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:24,915 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:24,926 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:24,937 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:24,949 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:24,961 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:24,974 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:24,988 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:25,002 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:25,012 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:25,016 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:25,022 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:25,023 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:25,314 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:25,316 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:25,316 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 34] total 67 [2018-01-21 08:46:25,316 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:25,316 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-01-21 08:46:25,316 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-01-21 08:46:25,317 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2147, Invalid=2275, Unknown=0, NotChecked=0, Total=4422 [2018-01-21 08:46:25,317 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 35 states. [2018-01-21 08:46:25,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:25,357 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2018-01-21 08:46:25,357 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-21 08:46:25,357 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 47 [2018-01-21 08:46:25,357 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:25,357 INFO L225 Difference]: With dead ends: 58 [2018-01-21 08:46:25,357 INFO L226 Difference]: Without dead ends: 49 [2018-01-21 08:46:25,358 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 221 GetRequests, 153 SyntacticMatches, 2 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 183 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=2183, Invalid=2373, Unknown=0, NotChecked=0, Total=4556 [2018-01-21 08:46:25,358 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-01-21 08:46:25,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2018-01-21 08:46:25,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-01-21 08:46:25,360 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 49 transitions. [2018-01-21 08:46:25,360 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 49 transitions. Word has length 47 [2018-01-21 08:46:25,360 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:25,360 INFO L432 AbstractCegarLoop]: Abstraction has 49 states and 49 transitions. [2018-01-21 08:46:25,360 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-01-21 08:46:25,360 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 49 transitions. [2018-01-21 08:46:25,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-21 08:46:25,361 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:25,361 INFO L322 BasicCegarLoop]: trace histogram [31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:25,361 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:25,361 INFO L82 PathProgramCache]: Analyzing trace with hash -601524693, now seen corresponding path program 31 times [2018-01-21 08:46:25,361 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:25,362 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:25,362 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:25,362 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:25,362 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:25,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:25,371 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:25,781 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:25,781 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:25,781 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:25,781 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:25,781 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:25,781 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:25,781 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:25,791 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:25,791 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:46:25,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:25,809 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:25,827 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:25,827 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:25,946 WARN L143 SmtUtils]: Spent 118ms on a formula simplification that was a NOOP. DAG size: 101 [2018-01-21 08:46:26,048 WARN L143 SmtUtils]: Spent 100ms on a formula simplification that was a NOOP. DAG size: 101 [2018-01-21 08:46:27,327 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:27,347 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:27,347 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:27,350 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:27,350 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:46:27,379 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:27,383 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:27,389 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:27,389 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:27,645 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:27,646 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:27,646 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 69 [2018-01-21 08:46:27,647 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:27,647 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-21 08:46:27,647 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-21 08:46:27,647 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2280, Invalid=2412, Unknown=0, NotChecked=0, Total=4692 [2018-01-21 08:46:27,647 INFO L87 Difference]: Start difference. First operand 49 states and 49 transitions. Second operand 36 states. [2018-01-21 08:46:27,705 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:27,706 INFO L93 Difference]: Finished difference Result 59 states and 59 transitions. [2018-01-21 08:46:27,706 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-21 08:46:27,706 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 48 [2018-01-21 08:46:27,706 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:27,707 INFO L225 Difference]: With dead ends: 59 [2018-01-21 08:46:27,707 INFO L226 Difference]: Without dead ends: 50 [2018-01-21 08:46:27,707 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 226 GetRequests, 156 SyntacticMatches, 2 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 189 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2317, Invalid=2513, Unknown=0, NotChecked=0, Total=4830 [2018-01-21 08:46:27,708 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-01-21 08:46:27,710 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2018-01-21 08:46:27,710 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-01-21 08:46:27,711 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 50 transitions. [2018-01-21 08:46:27,711 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 50 transitions. Word has length 48 [2018-01-21 08:46:27,711 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:27,711 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 50 transitions. [2018-01-21 08:46:27,711 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-21 08:46:27,711 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 50 transitions. [2018-01-21 08:46:27,711 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-01-21 08:46:27,711 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:27,712 INFO L322 BasicCegarLoop]: trace histogram [32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:27,712 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:27,712 INFO L82 PathProgramCache]: Analyzing trace with hash 1425595856, now seen corresponding path program 32 times [2018-01-21 08:46:27,712 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:27,712 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:27,712 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:27,712 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:27,713 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:27,722 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:27,722 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:28,172 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:28,173 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:28,173 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:28,173 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:28,173 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:28,173 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:28,173 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:28,178 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:46:28,178 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:28,184 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:28,191 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:28,192 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:28,194 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:28,203 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:28,203 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:29,583 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:29,602 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:29,602 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:29,605 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:46:29,605 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:29,615 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:29,630 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:29,643 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:29,647 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:29,654 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:29,654 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:29,920 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:29,921 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:29,921 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 36, 36, 36] total 71 [2018-01-21 08:46:29,921 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:29,921 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-01-21 08:46:29,922 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-01-21 08:46:29,922 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2417, Invalid=2553, Unknown=0, NotChecked=0, Total=4970 [2018-01-21 08:46:29,922 INFO L87 Difference]: Start difference. First operand 50 states and 50 transitions. Second operand 37 states. [2018-01-21 08:46:29,980 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:29,981 INFO L93 Difference]: Finished difference Result 60 states and 60 transitions. [2018-01-21 08:46:29,981 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-01-21 08:46:29,981 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 49 [2018-01-21 08:46:29,981 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:29,981 INFO L225 Difference]: With dead ends: 60 [2018-01-21 08:46:29,981 INFO L226 Difference]: Without dead ends: 51 [2018-01-21 08:46:29,982 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 231 GetRequests, 159 SyntacticMatches, 2 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 195 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2455, Invalid=2657, Unknown=0, NotChecked=0, Total=5112 [2018-01-21 08:46:29,982 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-01-21 08:46:29,984 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2018-01-21 08:46:29,984 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-01-21 08:46:29,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 51 transitions. [2018-01-21 08:46:29,985 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 51 transitions. Word has length 49 [2018-01-21 08:46:29,985 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:29,985 INFO L432 AbstractCegarLoop]: Abstraction has 51 states and 51 transitions. [2018-01-21 08:46:29,985 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-01-21 08:46:29,985 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 51 transitions. [2018-01-21 08:46:29,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-21 08:46:29,985 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:29,985 INFO L322 BasicCegarLoop]: trace histogram [33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:29,985 INFO L371 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:29,986 INFO L82 PathProgramCache]: Analyzing trace with hash -158176565, now seen corresponding path program 33 times [2018-01-21 08:46:29,986 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:29,986 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:29,986 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:29,986 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:29,986 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:29,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:29,992 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:30,439 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:30,440 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:30,440 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:30,440 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:30,440 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:30,440 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:30,440 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:30,444 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:46:30,445 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:46:30,451 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:30,453 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:30,454 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:30,455 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:30,456 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:30,457 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:30,458 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:30,459 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:30,460 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:30,461 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:30,462 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:30,463 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:30,464 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:30,466 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:30,467 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:30,468 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:30,469 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:30,470 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:30,471 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:30,472 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:30,488 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:30,488 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:31,932 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:31,952 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:31,952 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:31,955 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:46:31,955 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:46:31,964 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:31,971 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:31,978 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:31,986 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:31,994 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:32,003 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:32,014 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:32,024 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:32,034 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:32,046 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:32,057 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:32,068 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:32,080 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:32,092 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:32,105 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:32,118 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:32,132 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:32,146 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:32,156 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:32,160 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:32,167 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:32,167 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:32,457 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:32,458 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:32,458 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 73 [2018-01-21 08:46:32,458 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:32,458 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-21 08:46:32,459 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-21 08:46:32,459 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2558, Invalid=2698, Unknown=0, NotChecked=0, Total=5256 [2018-01-21 08:46:32,459 INFO L87 Difference]: Start difference. First operand 51 states and 51 transitions. Second operand 38 states. [2018-01-21 08:46:32,504 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:32,505 INFO L93 Difference]: Finished difference Result 61 states and 61 transitions. [2018-01-21 08:46:32,505 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-01-21 08:46:32,505 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 50 [2018-01-21 08:46:32,505 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:32,505 INFO L225 Difference]: With dead ends: 61 [2018-01-21 08:46:32,505 INFO L226 Difference]: Without dead ends: 52 [2018-01-21 08:46:32,506 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 236 GetRequests, 162 SyntacticMatches, 2 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 201 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2597, Invalid=2805, Unknown=0, NotChecked=0, Total=5402 [2018-01-21 08:46:32,506 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-01-21 08:46:32,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-01-21 08:46:32,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-01-21 08:46:32,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 52 transitions. [2018-01-21 08:46:32,508 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 52 transitions. Word has length 50 [2018-01-21 08:46:32,508 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:32,508 INFO L432 AbstractCegarLoop]: Abstraction has 52 states and 52 transitions. [2018-01-21 08:46:32,508 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-21 08:46:32,508 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 52 transitions. [2018-01-21 08:46:32,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-21 08:46:32,508 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:32,508 INFO L322 BasicCegarLoop]: trace histogram [34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:32,508 INFO L371 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:32,509 INFO L82 PathProgramCache]: Analyzing trace with hash -2010481360, now seen corresponding path program 34 times [2018-01-21 08:46:32,509 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:32,509 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:32,509 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:32,509 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:32,509 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:32,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:32,515 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:32,899 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:32,900 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:32,900 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:32,900 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:32,900 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:32,900 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:32,900 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:32,905 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:46:32,905 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:46:32,920 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:32,922 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:32,932 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:32,932 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:34,464 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:34,485 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:34,485 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:34,488 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:46:34,488 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:46:34,531 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:34,535 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:34,541 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:34,542 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:34,839 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:34,840 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:34,840 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 75 [2018-01-21 08:46:34,840 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:34,841 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-01-21 08:46:34,841 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-01-21 08:46:34,841 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2703, Invalid=2847, Unknown=0, NotChecked=0, Total=5550 [2018-01-21 08:46:34,841 INFO L87 Difference]: Start difference. First operand 52 states and 52 transitions. Second operand 39 states. [2018-01-21 08:46:34,901 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:34,902 INFO L93 Difference]: Finished difference Result 62 states and 62 transitions. [2018-01-21 08:46:34,902 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-01-21 08:46:34,902 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 51 [2018-01-21 08:46:34,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:34,902 INFO L225 Difference]: With dead ends: 62 [2018-01-21 08:46:34,902 INFO L226 Difference]: Without dead ends: 53 [2018-01-21 08:46:34,903 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 241 GetRequests, 165 SyntacticMatches, 2 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 207 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=2743, Invalid=2957, Unknown=0, NotChecked=0, Total=5700 [2018-01-21 08:46:34,903 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-01-21 08:46:34,905 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-01-21 08:46:34,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-01-21 08:46:34,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 53 transitions. [2018-01-21 08:46:34,906 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 53 transitions. Word has length 51 [2018-01-21 08:46:34,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:34,906 INFO L432 AbstractCegarLoop]: Abstraction has 53 states and 53 transitions. [2018-01-21 08:46:34,907 INFO L433 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-01-21 08:46:34,907 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 53 transitions. [2018-01-21 08:46:34,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-21 08:46:34,907 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:34,907 INFO L322 BasicCegarLoop]: trace histogram [35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:34,907 INFO L371 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:34,908 INFO L82 PathProgramCache]: Analyzing trace with hash 697612139, now seen corresponding path program 35 times [2018-01-21 08:46:34,908 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:34,908 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:34,908 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:34,908 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:34,909 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:34,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:34,917 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:35,414 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:35,414 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:35,414 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:35,414 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:35,415 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:35,415 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:35,415 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:35,421 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:46:35,421 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:35,425 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:35,426 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:35,426 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:35,427 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:35,428 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:35,429 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:35,430 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:35,430 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:35,431 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:35,432 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:35,433 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:35,434 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:35,434 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:35,435 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:35,436 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:35,437 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:35,438 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:35,439 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:35,443 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:35,444 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:35,446 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:35,456 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:35,457 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:37,066 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:37,086 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:37,086 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:37,088 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:46:37,089 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:37,093 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:37,094 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:37,098 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:37,101 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:37,105 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:37,109 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:37,114 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:37,119 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:37,125 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:37,131 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:37,137 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:37,143 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:37,150 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:37,158 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:37,166 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:37,174 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:37,183 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:37,192 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:37,207 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:37,218 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:37,222 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:37,229 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:37,229 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:37,549 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:37,550 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:37,550 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39, 39, 39, 39] total 77 [2018-01-21 08:46:37,550 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:37,550 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-21 08:46:37,550 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-21 08:46:37,550 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2852, Invalid=3000, Unknown=0, NotChecked=0, Total=5852 [2018-01-21 08:46:37,550 INFO L87 Difference]: Start difference. First operand 53 states and 53 transitions. Second operand 40 states. [2018-01-21 08:46:37,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:37,592 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-01-21 08:46:37,592 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-01-21 08:46:37,592 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 52 [2018-01-21 08:46:37,593 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:37,593 INFO L225 Difference]: With dead ends: 63 [2018-01-21 08:46:37,593 INFO L226 Difference]: Without dead ends: 54 [2018-01-21 08:46:37,594 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 246 GetRequests, 168 SyntacticMatches, 2 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 213 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=2893, Invalid=3113, Unknown=0, NotChecked=0, Total=6006 [2018-01-21 08:46:37,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-01-21 08:46:37,596 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-01-21 08:46:37,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-01-21 08:46:37,596 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 54 transitions. [2018-01-21 08:46:37,596 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 54 transitions. Word has length 52 [2018-01-21 08:46:37,597 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:37,597 INFO L432 AbstractCegarLoop]: Abstraction has 54 states and 54 transitions. [2018-01-21 08:46:37,597 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-21 08:46:37,597 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 54 transitions. [2018-01-21 08:46:37,597 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-01-21 08:46:37,597 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:37,597 INFO L322 BasicCegarLoop]: trace histogram [36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:37,597 INFO L371 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:37,598 INFO L82 PathProgramCache]: Analyzing trace with hash -1250835312, now seen corresponding path program 36 times [2018-01-21 08:46:37,598 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:37,598 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:37,599 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:37,599 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:37,599 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:37,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:37,608 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:38,042 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:38,042 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:38,043 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:38,043 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:38,043 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:38,043 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:38,043 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:38,047 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:46:38,048 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:46:38,054 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:38,056 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:38,057 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:38,058 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:38,059 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:38,060 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:38,061 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:38,062 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:38,063 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:38,065 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:38,066 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:38,067 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:38,068 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:38,070 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:38,071 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:38,072 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:38,073 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:38,075 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:38,076 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:38,077 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:38,078 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:38,088 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:38,088 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:39,782 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:39,801 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:39,801 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:39,804 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:46:39,804 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:46:39,816 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:39,826 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:39,837 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:39,845 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:39,853 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:39,862 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:39,872 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:39,881 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:39,891 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:39,902 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:39,913 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:39,924 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:39,936 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:39,949 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:39,962 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:39,975 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:39,988 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:40,002 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:40,017 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:40,028 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:40,032 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:40,040 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:40,040 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:40,364 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:40,365 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:40,365 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40, 40, 40, 40] total 79 [2018-01-21 08:46:40,365 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:40,365 INFO L409 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-01-21 08:46:40,366 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-01-21 08:46:40,366 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3005, Invalid=3157, Unknown=0, NotChecked=0, Total=6162 [2018-01-21 08:46:40,366 INFO L87 Difference]: Start difference. First operand 54 states and 54 transitions. Second operand 41 states. [2018-01-21 08:46:40,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:40,418 INFO L93 Difference]: Finished difference Result 64 states and 64 transitions. [2018-01-21 08:46:40,418 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-01-21 08:46:40,418 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 53 [2018-01-21 08:46:40,418 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:40,419 INFO L225 Difference]: With dead ends: 64 [2018-01-21 08:46:40,419 INFO L226 Difference]: Without dead ends: 55 [2018-01-21 08:46:40,419 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 251 GetRequests, 171 SyntacticMatches, 2 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 219 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=3047, Invalid=3273, Unknown=0, NotChecked=0, Total=6320 [2018-01-21 08:46:40,420 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-01-21 08:46:40,421 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2018-01-21 08:46:40,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-01-21 08:46:40,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 55 transitions. [2018-01-21 08:46:40,422 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 55 transitions. Word has length 53 [2018-01-21 08:46:40,422 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:40,422 INFO L432 AbstractCegarLoop]: Abstraction has 55 states and 55 transitions. [2018-01-21 08:46:40,422 INFO L433 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-01-21 08:46:40,422 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 55 transitions. [2018-01-21 08:46:40,422 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-01-21 08:46:40,422 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:40,422 INFO L322 BasicCegarLoop]: trace histogram [37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:40,422 INFO L371 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:40,423 INFO L82 PathProgramCache]: Analyzing trace with hash -1523164149, now seen corresponding path program 37 times [2018-01-21 08:46:40,423 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:40,423 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:40,423 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:40,423 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:40,423 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:40,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:40,432 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:40,907 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:40,907 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:40,907 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:40,907 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:40,907 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:40,907 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:40,908 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:40,913 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:40,913 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:46:40,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:40,931 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:40,942 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:40,942 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:42,725 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:42,744 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:42,744 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 75 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:42,747 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:42,747 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:46:42,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:42,782 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:42,790 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:42,790 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:43,122 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:43,123 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:43,123 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41, 41, 41, 41] total 81 [2018-01-21 08:46:43,123 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:43,124 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-01-21 08:46:43,124 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-01-21 08:46:43,124 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3162, Invalid=3318, Unknown=0, NotChecked=0, Total=6480 [2018-01-21 08:46:43,124 INFO L87 Difference]: Start difference. First operand 55 states and 55 transitions. Second operand 42 states. [2018-01-21 08:46:43,174 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:43,175 INFO L93 Difference]: Finished difference Result 65 states and 65 transitions. [2018-01-21 08:46:43,175 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-01-21 08:46:43,175 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 54 [2018-01-21 08:46:43,175 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:43,175 INFO L225 Difference]: With dead ends: 65 [2018-01-21 08:46:43,175 INFO L226 Difference]: Without dead ends: 56 [2018-01-21 08:46:43,176 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 256 GetRequests, 174 SyntacticMatches, 2 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 225 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=3205, Invalid=3437, Unknown=0, NotChecked=0, Total=6642 [2018-01-21 08:46:43,176 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2018-01-21 08:46:43,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 56. [2018-01-21 08:46:43,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-01-21 08:46:43,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 56 transitions. [2018-01-21 08:46:43,178 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 56 transitions. Word has length 54 [2018-01-21 08:46:43,178 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:43,178 INFO L432 AbstractCegarLoop]: Abstraction has 56 states and 56 transitions. [2018-01-21 08:46:43,178 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-01-21 08:46:43,178 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 56 transitions. [2018-01-21 08:46:43,179 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-01-21 08:46:43,179 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:43,179 INFO L322 BasicCegarLoop]: trace histogram [38, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:43,179 INFO L371 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:43,179 INFO L82 PathProgramCache]: Analyzing trace with hash -1375423504, now seen corresponding path program 38 times [2018-01-21 08:46:43,179 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:43,179 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:43,180 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:43,180 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:43,180 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:43,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:43,189 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:43,743 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:43,743 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:43,743 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:43,743 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:43,744 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:43,744 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:43,744 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:43,748 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:46:43,749 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:43,757 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:43,764 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:43,766 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:43,767 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:43,777 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:43,777 INFO L314 TraceCheckSpWp]: Computing backward predicates... Received shutdown request... [2018-01-21 08:46:44,848 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-21 08:46:44,849 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 08:46:44,851 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 08:46:44,851 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 08:46:44,851 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 08:46:44,851 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 08:46:44,851 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 08:46:44,851 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 08:46:44,851 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 08:46:44,852 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == mainErr0EnsuresViolation======== [2018-01-21 08:46:44,852 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 08:46:44,852 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 08:46:44,852 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 08:46:44,853 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 21.01 08:46:44 BoogieIcfgContainer [2018-01-21 08:46:44,853 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-21 08:46:44,854 INFO L168 Benchmark]: Toolchain (without parser) took 53151.69 ms. Allocated memory was 306.2 MB in the beginning and 830.5 MB in the end (delta: 524.3 MB). Free memory was 265.5 MB in the beginning and 411.1 MB in the end (delta: -145.6 MB). Peak memory consumption was 378.7 MB. Max. memory is 5.3 GB. [2018-01-21 08:46:44,855 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 306.2 MB. Free memory is still 270.5 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-21 08:46:44,855 INFO L168 Benchmark]: CACSL2BoogieTranslator took 167.04 ms. Allocated memory is still 306.2 MB. Free memory was 264.5 MB in the beginning and 257.5 MB in the end (delta: 7.0 MB). Peak memory consumption was 7.0 MB. Max. memory is 5.3 GB. [2018-01-21 08:46:44,855 INFO L168 Benchmark]: Boogie Preprocessor took 29.70 ms. Allocated memory is still 306.2 MB. Free memory was 257.5 MB in the beginning and 255.5 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-21 08:46:44,855 INFO L168 Benchmark]: RCFGBuilder took 165.28 ms. Allocated memory is still 306.2 MB. Free memory was 255.5 MB in the beginning and 243.9 MB in the end (delta: 11.6 MB). Peak memory consumption was 11.6 MB. Max. memory is 5.3 GB. [2018-01-21 08:46:44,856 INFO L168 Benchmark]: TraceAbstraction took 52783.08 ms. Allocated memory was 306.2 MB in the beginning and 830.5 MB in the end (delta: 524.3 MB). Free memory was 242.9 MB in the beginning and 411.1 MB in the end (delta: -168.2 MB). Peak memory consumption was 356.1 MB. Max. memory is 5.3 GB. [2018-01-21 08:46:44,857 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 306.2 MB. Free memory is still 270.5 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 167.04 ms. Allocated memory is still 306.2 MB. Free memory was 264.5 MB in the beginning and 257.5 MB in the end (delta: 7.0 MB). Peak memory consumption was 7.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 29.70 ms. Allocated memory is still 306.2 MB. Free memory was 257.5 MB in the beginning and 255.5 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 165.28 ms. Allocated memory is still 306.2 MB. Free memory was 255.5 MB in the beginning and 243.9 MB in the end (delta: 11.6 MB). Peak memory consumption was 11.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 52783.08 ms. Allocated memory was 306.2 MB in the beginning and 830.5 MB in the end (delta: 524.3 MB). Free memory was 242.9 MB in the beginning and 411.1 MB in the end (delta: -168.2 MB). Peak memory consumption was 356.1 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 17 LocStat_MAX_WEQGRAPH_SIZE : 2 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 102 LocStat_NO_SUPPORTING_DISEQUALITIES : 23 LocStat_NO_DISJUNCTIONS : -34 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 24 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 33 TransStat_NO_SUPPORTING_DISEQUALITIES : 5 TransStat_NO_DISJUNCTIONS : 24 TransStat_MAX_NO_DISJUNCTIONS : 1 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.226288 RENAME_VARIABLES(MILLISECONDS) : 0.100693 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.168747 PROJECTAWAY(MILLISECONDS) : 0.120491 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.242261 DISJOIN(MILLISECONDS) : 0.000000 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.138107 ADD_EQUALITY(MILLISECONDS) : 0.034514 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.014289 #CONJOIN_DISJUNCTIVE : 32 #RENAME_VARIABLES : 62 #UNFREEZE : 0 #CONJOIN : 62 #PROJECTAWAY : 64 #ADD_WEAK_EQUALITY : 4 #DISJOIN : 0 #RENAME_VARIABLES_DISJUNCTIVE : 62 #ADD_EQUALITY : 33 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1]: not all allocated memory was freed not all allocated memory was freed We found a FailurePath: - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.initErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. UNSAFE Result, 0.1s OverallTime, 1 OverallIterations, 1 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 3 NumberOfCodeBlocks, 3 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1). Cancelled while BasicCegarLoop was analyzing trace of length 56 with TraceHistMax 38, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 63 known predicates. - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.startErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 52.5s OverallTime, 39 OverallIterations, 38 TraceHistogramMax, 1.8s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 611 SDtfs, 76 SDslu, 10221 SDs, 0 SdLazy, 1585 SolverSat, 47 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 6147 GetRequests, 4442 SyntacticMatches, 74 SemanticMatches, 1631 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4328 ImplicationChecksByTransitivity, 29.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=56occurred in iteration=38, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.8s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 38 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 3.1s SatisfiabilityAnalysisTime, 43.0s InterpolantComputationTime, 4013 NumberOfCodeBlocks, 4013 NumberOfCodeBlocksAsserted, 502 NumberOfCheckSat, 6491 ConstructedInterpolants, 0 QuantifiedInterpolants, 931383 SizeOfPredicates, 74 NumberOfNonLiveVariables, 8732 ConjunctsInSsa, 1628 ConjunctsInUnsatCore, 186 InterpolantComputations, 1 PerfectInterpolantSequences, 0/45695 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 25]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 25). Cancelled while IsEmpty was searching accepting run (input had 21 states). - StatisticsResult: Ultimate Automizer benchmark data for error location: mainErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 0.0s OverallTime, 0 OverallIterations, 0 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-21_08-46-44-868.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-21_08-46-44-868.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-21_08-46-44-868.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-21_08-46-44-868.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-1-2018-01-21_08-46-44-868.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-2-2018-01-21_08-46-44-868.csv Completed graceful shutdown