java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memset_false-valid-deref-write.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-2f49842 [2018-01-21 08:46:10,376 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-21 08:46:10,378 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-21 08:46:10,391 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-21 08:46:10,391 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-21 08:46:10,392 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-21 08:46:10,393 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-21 08:46:10,395 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-21 08:46:10,397 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-21 08:46:10,397 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-21 08:46:10,398 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-21 08:46:10,398 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-21 08:46:10,398 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-21 08:46:10,400 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-21 08:46:10,401 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-21 08:46:10,403 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-21 08:46:10,405 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-21 08:46:10,407 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-21 08:46:10,408 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-21 08:46:10,410 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-21 08:46:10,412 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-21 08:46:10,412 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-21 08:46:10,413 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-21 08:46:10,414 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-21 08:46:10,414 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-21 08:46:10,416 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-21 08:46:10,416 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-21 08:46:10,417 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-21 08:46:10,417 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-21 08:46:10,417 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-21 08:46:10,418 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-21 08:46:10,418 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf [2018-01-21 08:46:10,428 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-21 08:46:10,428 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-21 08:46:10,429 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-21 08:46:10,429 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-21 08:46:10,429 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-21 08:46:10,430 INFO L133 SettingsManager]: * Weq Fattening=true [2018-01-21 08:46:10,430 INFO L133 SettingsManager]: * Flatten before fatten=true [2018-01-21 08:46:10,430 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-21 08:46:10,430 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-21 08:46:10,431 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-21 08:46:10,431 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-21 08:46:10,431 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-21 08:46:10,432 INFO L133 SettingsManager]: * Check allocation purity=true [2018-01-21 08:46:10,432 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-21 08:46:10,432 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-21 08:46:10,432 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-21 08:46:10,432 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-01-21 08:46:10,433 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-21 08:46:10,433 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-01-21 08:46:10,433 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-21 08:46:10,433 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-01-21 08:46:10,433 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-01-21 08:46:10,434 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-21 08:46:10,434 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-21 08:46:10,434 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-21 08:46:10,434 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-21 08:46:10,434 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-21 08:46:10,435 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 08:46:10,435 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-21 08:46:10,435 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-21 08:46:10,435 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-21 08:46:10,435 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-21 08:46:10,436 INFO L133 SettingsManager]: * Stop after first violation was found=false [2018-01-21 08:46:10,436 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-21 08:46:10,436 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-21 08:46:10,436 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-21 08:46:10,436 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-21 08:46:10,437 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-21 08:46:10,437 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-21 08:46:10,438 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-21 08:46:10,473 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-21 08:46:10,486 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-21 08:46:10,490 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-21 08:46:10,491 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-21 08:46:10,492 INFO L276 PluginConnector]: CDTParser initialized [2018-01-21 08:46:10,493 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memset_false-valid-deref-write.c [2018-01-21 08:46:10,629 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-21 08:46:10,633 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-21 08:46:10,634 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-21 08:46:10,634 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-21 08:46:10,639 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-21 08:46:10,640 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 08:46:10" (1/1) ... [2018-01-21 08:46:10,643 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@8d55d51 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:46:10, skipping insertion in model container [2018-01-21 08:46:10,643 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 08:46:10" (1/1) ... [2018-01-21 08:46:10,657 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 08:46:10,671 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 08:46:10,783 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 08:46:10,799 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 08:46:10,804 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:46:10 WrapperNode [2018-01-21 08:46:10,804 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-21 08:46:10,805 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-21 08:46:10,805 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-21 08:46:10,805 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-21 08:46:10,816 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:46:10" (1/1) ... [2018-01-21 08:46:10,816 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:46:10" (1/1) ... [2018-01-21 08:46:10,824 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:46:10" (1/1) ... [2018-01-21 08:46:10,824 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:46:10" (1/1) ... [2018-01-21 08:46:10,826 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:46:10" (1/1) ... [2018-01-21 08:46:10,830 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:46:10" (1/1) ... [2018-01-21 08:46:10,831 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:46:10" (1/1) ... [2018-01-21 08:46:10,832 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-21 08:46:10,833 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-21 08:46:10,833 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-21 08:46:10,833 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-21 08:46:10,834 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:46:10" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 08:46:10,878 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-21 08:46:10,878 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-21 08:46:10,879 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-21 08:46:10,879 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-21 08:46:10,879 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-21 08:46:10,879 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-21 08:46:10,879 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-21 08:46:10,879 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-21 08:46:10,879 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-21 08:46:10,880 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-21 08:46:10,880 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-21 08:46:10,880 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-21 08:46:11,002 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-21 08:46:11,003 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 08:46:11 BoogieIcfgContainer [2018-01-21 08:46:11,003 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-21 08:46:11,004 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-21 08:46:11,005 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-21 08:46:11,007 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-21 08:46:11,007 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 21.01 08:46:10" (1/3) ... [2018-01-21 08:46:11,009 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7f78c4fd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 08:46:11, skipping insertion in model container [2018-01-21 08:46:11,009 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 08:46:10" (2/3) ... [2018-01-21 08:46:11,009 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7f78c4fd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 08:46:11, skipping insertion in model container [2018-01-21 08:46:11,010 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 08:46:11" (3/3) ... [2018-01-21 08:46:11,012 INFO L105 eAbstractionObserver]: Analyzing ICFG memset_false-valid-deref-write.c [2018-01-21 08:46:11,021 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-21 08:46:11,030 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-01-21 08:46:11,074 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 08:46:11,074 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 08:46:11,074 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 08:46:11,074 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 08:46:11,074 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 08:46:11,074 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 08:46:11,075 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 08:46:11,075 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.initErr0EnsuresViolation======== [2018-01-21 08:46:11,075 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 08:46:11,090 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 08:46:11,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-01-21 08:46:11,094 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:11,095 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-01-21 08:46:11,095 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.initErr0EnsuresViolation]=== [2018-01-21 08:46:11,100 INFO L82 PathProgramCache]: Analyzing trace with hash 50935, now seen corresponding path program 1 times [2018-01-21 08:46:11,103 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:11,157 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:11,157 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:11,157 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:11,158 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:11,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 08:46:11,191 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 08:46:11,207 INFO L381 BasicCegarLoop]: Counterexample might be feasible [2018-01-21 08:46:11,213 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-21 08:46:11,220 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 08:46:11,220 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 08:46:11,220 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 08:46:11,220 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 08:46:11,220 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 08:46:11,220 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 08:46:11,221 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 08:46:11,221 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.startErr0EnsuresViolation======== [2018-01-21 08:46:11,221 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 08:46:11,222 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 08:46:11,222 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-21 08:46:11,222 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:11,222 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:11,223 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:11,223 INFO L82 PathProgramCache]: Analyzing trace with hash 457189328, now seen corresponding path program 1 times [2018-01-21 08:46:11,223 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:11,224 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:11,224 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:11,224 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:11,224 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:11,252 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:11,259 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:11,334 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:11,336 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 08:46:11,336 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-21 08:46:11,336 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 08:46:11,338 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-21 08:46:11,348 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-21 08:46:11,349 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-21 08:46:11,350 INFO L87 Difference]: Start difference. First operand 21 states. Second operand 4 states. [2018-01-21 08:46:11,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:11,420 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 08:46:11,420 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-21 08:46:11,421 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 17 [2018-01-21 08:46:11,422 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:11,429 INFO L225 Difference]: With dead ends: 33 [2018-01-21 08:46:11,429 INFO L226 Difference]: Without dead ends: 19 [2018-01-21 08:46:11,490 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-21 08:46:11,503 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-01-21 08:46:11,515 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2018-01-21 08:46:11,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-01-21 08:46:11,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 19 transitions. [2018-01-21 08:46:11,518 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 19 transitions. Word has length 17 [2018-01-21 08:46:11,519 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:11,519 INFO L432 AbstractCegarLoop]: Abstraction has 19 states and 19 transitions. [2018-01-21 08:46:11,519 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-21 08:46:11,519 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 19 transitions. [2018-01-21 08:46:11,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-01-21 08:46:11,519 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:11,519 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:11,520 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:11,520 INFO L82 PathProgramCache]: Analyzing trace with hash -114007861, now seen corresponding path program 1 times [2018-01-21 08:46:11,520 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:11,521 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:11,521 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:11,521 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:11,521 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:11,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:11,538 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:11,592 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:11,592 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:11,592 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:11,593 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 19 with the following transitions: [2018-01-21 08:46:11,596 INFO L201 CegarAbsIntRunner]: [0], [1], [3], [7], [9], [10], [14], [15], [17], [18], [19], [20], [22], [23], [24], [25], [26], [27] [2018-01-21 08:46:11,640 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-21 08:46:11,640 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-21 08:46:12,270 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-21 08:46:12,272 INFO L268 AbstractInterpreter]: Visited 18 different actions 22 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 15 variables. [2018-01-21 08:46:12,282 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-21 08:46:12,282 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:12,282 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:12,310 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:12,311 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:46:12,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:12,340 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:12,406 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:12,407 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:12,631 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:12,654 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:12,654 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:12,660 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:12,661 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:46:12,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:12,697 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:12,702 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:12,702 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:12,772 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:12,773 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:12,774 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-21 08:46:12,774 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:12,775 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-21 08:46:12,775 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-21 08:46:12,775 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-01-21 08:46:12,775 INFO L87 Difference]: Start difference. First operand 19 states and 19 transitions. Second operand 6 states. [2018-01-21 08:46:12,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:12,817 INFO L93 Difference]: Finished difference Result 29 states and 29 transitions. [2018-01-21 08:46:12,817 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-21 08:46:12,818 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 18 [2018-01-21 08:46:12,818 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:12,818 INFO L225 Difference]: With dead ends: 29 [2018-01-21 08:46:12,819 INFO L226 Difference]: Without dead ends: 20 [2018-01-21 08:46:12,820 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 66 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-01-21 08:46:12,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-01-21 08:46:12,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-01-21 08:46:12,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-01-21 08:46:12,823 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2018-01-21 08:46:12,823 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 18 [2018-01-21 08:46:12,823 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:12,824 INFO L432 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2018-01-21 08:46:12,824 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-21 08:46:12,824 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-01-21 08:46:12,824 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-21 08:46:12,824 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:12,825 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:12,825 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:12,825 INFO L82 PathProgramCache]: Analyzing trace with hash -641251536, now seen corresponding path program 2 times [2018-01-21 08:46:12,825 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:12,826 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:12,826 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:12,826 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:12,827 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:12,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:12,839 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:12,903 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:12,903 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:12,903 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:12,903 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:12,903 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:12,904 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:12,904 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:12,913 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:46:12,913 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:12,928 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:12,934 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:12,939 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:12,941 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:12,988 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:12,988 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:13,176 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:13,196 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:13,197 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:13,200 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:46:13,200 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:13,212 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:13,220 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:13,226 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:13,229 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:13,233 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:13,234 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:13,320 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:13,325 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:13,325 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-21 08:46:13,325 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:13,326 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-21 08:46:13,326 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-21 08:46:13,326 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-01-21 08:46:13,327 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand 7 states. [2018-01-21 08:46:13,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:13,365 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-01-21 08:46:13,366 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-21 08:46:13,366 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-01-21 08:46:13,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:13,366 INFO L225 Difference]: With dead ends: 30 [2018-01-21 08:46:13,366 INFO L226 Difference]: Without dead ends: 21 [2018-01-21 08:46:13,367 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 69 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=77, Unknown=0, NotChecked=0, Total=132 [2018-01-21 08:46:13,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2018-01-21 08:46:13,369 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-01-21 08:46:13,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-01-21 08:46:13,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-01-21 08:46:13,370 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 19 [2018-01-21 08:46:13,371 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:13,371 INFO L432 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-01-21 08:46:13,371 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-21 08:46:13,371 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-01-21 08:46:13,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-01-21 08:46:13,372 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:13,374 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:13,374 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:13,375 INFO L82 PathProgramCache]: Analyzing trace with hash 194063723, now seen corresponding path program 3 times [2018-01-21 08:46:13,375 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:13,376 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:13,376 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:13,376 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:13,376 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:13,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:13,394 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:13,449 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:13,449 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:13,449 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:13,450 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:13,450 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:13,450 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:13,450 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:13,459 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:46:13,460 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:46:13,470 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:13,472 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:13,474 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:13,474 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:13,476 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:13,492 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:13,492 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:13,594 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:13,614 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:13,614 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:13,617 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:46:13,617 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:46:13,627 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:13,634 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:13,641 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:13,646 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:13,649 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:13,654 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:13,654 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:13,719 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:13,720 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:13,720 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-21 08:46:13,720 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:13,721 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-21 08:46:13,721 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-21 08:46:13,721 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-21 08:46:13,721 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 8 states. [2018-01-21 08:46:13,750 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:13,751 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-01-21 08:46:13,751 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-21 08:46:13,751 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 20 [2018-01-21 08:46:13,751 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:13,751 INFO L225 Difference]: With dead ends: 31 [2018-01-21 08:46:13,752 INFO L226 Difference]: Without dead ends: 22 [2018-01-21 08:46:13,752 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 72 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=77, Invalid=105, Unknown=0, NotChecked=0, Total=182 [2018-01-21 08:46:13,752 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-01-21 08:46:13,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-01-21 08:46:13,754 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-01-21 08:46:13,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2018-01-21 08:46:13,754 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 20 [2018-01-21 08:46:13,754 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:13,755 INFO L432 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2018-01-21 08:46:13,755 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-21 08:46:13,755 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-01-21 08:46:13,755 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-21 08:46:13,755 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:13,755 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:13,755 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:13,755 INFO L82 PathProgramCache]: Analyzing trace with hash 319032976, now seen corresponding path program 4 times [2018-01-21 08:46:13,756 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:13,756 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:13,756 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:13,756 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:13,756 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:13,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:13,765 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:13,803 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:13,804 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:13,804 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:13,804 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:13,804 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:13,804 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:13,804 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:13,810 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:46:13,810 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:46:13,820 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:13,821 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:13,829 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:13,830 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:13,938 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:13,958 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:13,958 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:13,961 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:46:13,961 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:46:13,983 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:13,986 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:13,990 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:13,991 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:14,040 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:14,041 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:14,041 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-21 08:46:14,042 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:14,042 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-21 08:46:14,042 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-21 08:46:14,042 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-21 08:46:14,042 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 9 states. [2018-01-21 08:46:14,065 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:14,065 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2018-01-21 08:46:14,065 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-21 08:46:14,065 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 21 [2018-01-21 08:46:14,066 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:14,066 INFO L225 Difference]: With dead ends: 32 [2018-01-21 08:46:14,066 INFO L226 Difference]: Without dead ends: 23 [2018-01-21 08:46:14,067 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 75 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=103, Invalid=137, Unknown=0, NotChecked=0, Total=240 [2018-01-21 08:46:14,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-01-21 08:46:14,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-01-21 08:46:14,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-01-21 08:46:14,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 23 transitions. [2018-01-21 08:46:14,075 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 23 transitions. Word has length 21 [2018-01-21 08:46:14,076 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:14,076 INFO L432 AbstractCegarLoop]: Abstraction has 23 states and 23 transitions. [2018-01-21 08:46:14,076 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-21 08:46:14,076 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 23 transitions. [2018-01-21 08:46:14,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-21 08:46:14,076 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:14,076 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:14,076 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:14,077 INFO L82 PathProgramCache]: Analyzing trace with hash -101887477, now seen corresponding path program 5 times [2018-01-21 08:46:14,077 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:14,077 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:14,077 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:14,078 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:14,078 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:14,087 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:14,088 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:14,151 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:14,151 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:14,151 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:14,151 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:14,151 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:14,151 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:14,152 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:14,162 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:46:14,162 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:14,167 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:14,172 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:14,173 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:14,177 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:14,178 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:14,180 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:14,190 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:14,191 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:14,346 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:14,367 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:14,367 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:14,370 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:46:14,370 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:14,374 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:14,375 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:14,379 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:14,388 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:14,394 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:14,397 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:14,401 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:14,401 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:14,451 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:14,453 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:14,453 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-21 08:46:14,453 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:14,453 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-21 08:46:14,453 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-21 08:46:14,453 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-21 08:46:14,453 INFO L87 Difference]: Start difference. First operand 23 states and 23 transitions. Second operand 10 states. [2018-01-21 08:46:14,480 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:14,481 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 08:46:14,481 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-21 08:46:14,481 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 22 [2018-01-21 08:46:14,481 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:14,482 INFO L225 Difference]: With dead ends: 33 [2018-01-21 08:46:14,482 INFO L226 Difference]: Without dead ends: 24 [2018-01-21 08:46:14,483 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 78 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=133, Invalid=173, Unknown=0, NotChecked=0, Total=306 [2018-01-21 08:46:14,483 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-01-21 08:46:14,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-01-21 08:46:14,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-01-21 08:46:14,486 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-01-21 08:46:14,486 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 22 [2018-01-21 08:46:14,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:14,487 INFO L432 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-01-21 08:46:14,487 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-21 08:46:14,487 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-01-21 08:46:14,487 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-21 08:46:14,487 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:14,488 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:14,488 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:14,488 INFO L82 PathProgramCache]: Analyzing trace with hash -265519632, now seen corresponding path program 6 times [2018-01-21 08:46:14,488 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:14,489 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:14,489 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:14,489 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:14,489 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:14,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:14,499 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:14,567 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:14,568 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:14,568 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:14,568 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:14,568 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:14,568 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:14,568 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:14,573 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:46:14,573 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:46:14,581 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:14,582 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:14,584 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:14,585 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:14,585 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:14,587 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:14,596 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:14,596 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:14,751 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:14,771 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:14,772 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:14,775 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:46:14,775 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:46:14,786 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:14,793 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:14,801 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:14,809 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:14,815 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:14,819 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:14,825 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:14,825 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:14,931 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:14,933 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:14,933 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-21 08:46:14,933 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:14,934 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-21 08:46:14,934 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-21 08:46:14,934 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-21 08:46:14,935 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 11 states. [2018-01-21 08:46:14,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:14,979 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-01-21 08:46:14,979 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-21 08:46:14,980 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 23 [2018-01-21 08:46:14,980 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:14,980 INFO L225 Difference]: With dead ends: 34 [2018-01-21 08:46:14,980 INFO L226 Difference]: Without dead ends: 25 [2018-01-21 08:46:14,981 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 81 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=167, Invalid=213, Unknown=0, NotChecked=0, Total=380 [2018-01-21 08:46:14,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-01-21 08:46:14,984 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-01-21 08:46:14,984 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-01-21 08:46:14,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 25 transitions. [2018-01-21 08:46:14,985 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 25 transitions. Word has length 23 [2018-01-21 08:46:14,985 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:14,985 INFO L432 AbstractCegarLoop]: Abstraction has 25 states and 25 transitions. [2018-01-21 08:46:14,985 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-21 08:46:14,985 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 25 transitions. [2018-01-21 08:46:14,986 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-21 08:46:14,986 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:14,986 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:14,986 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:14,986 INFO L82 PathProgramCache]: Analyzing trace with hash -1043149141, now seen corresponding path program 7 times [2018-01-21 08:46:14,986 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:14,987 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:14,987 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:14,987 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:14,987 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:14,995 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:14,996 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:15,135 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:15,135 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:15,135 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:15,135 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:15,135 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:15,135 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:15,136 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:15,154 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:15,155 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:46:15,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:15,167 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:15,199 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:15,199 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:15,506 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:15,541 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:15,541 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:15,547 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:15,547 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:46:15,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:15,572 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:15,577 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:15,577 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:15,660 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:15,662 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:15,662 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 21 [2018-01-21 08:46:15,662 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:15,662 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-21 08:46:15,662 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-21 08:46:15,662 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=228, Unknown=0, NotChecked=0, Total=420 [2018-01-21 08:46:15,663 INFO L87 Difference]: Start difference. First operand 25 states and 25 transitions. Second operand 12 states. [2018-01-21 08:46:15,682 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:15,682 INFO L93 Difference]: Finished difference Result 35 states and 35 transitions. [2018-01-21 08:46:15,683 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-21 08:46:15,683 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 24 [2018-01-21 08:46:15,683 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:15,683 INFO L225 Difference]: With dead ends: 35 [2018-01-21 08:46:15,683 INFO L226 Difference]: Without dead ends: 26 [2018-01-21 08:46:15,684 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 84 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=205, Invalid=257, Unknown=0, NotChecked=0, Total=462 [2018-01-21 08:46:15,684 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-01-21 08:46:15,686 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-01-21 08:46:15,686 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-01-21 08:46:15,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 26 transitions. [2018-01-21 08:46:15,687 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 26 transitions. Word has length 24 [2018-01-21 08:46:15,687 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:15,687 INFO L432 AbstractCegarLoop]: Abstraction has 26 states and 26 transitions. [2018-01-21 08:46:15,687 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-21 08:46:15,687 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-01-21 08:46:15,687 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-21 08:46:15,687 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:15,688 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:15,688 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:15,688 INFO L82 PathProgramCache]: Analyzing trace with hash 620139856, now seen corresponding path program 8 times [2018-01-21 08:46:15,688 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:15,688 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:15,689 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:15,689 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:15,689 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:15,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:15,697 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:15,773 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:15,773 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:15,774 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:15,774 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:15,774 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:15,774 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:15,774 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:15,782 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:46:15,782 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:15,790 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:15,795 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:15,796 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:15,797 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:15,828 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:15,829 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:16,020 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:16,039 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:16,040 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:16,042 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:46:16,043 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:16,051 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:16,059 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:16,066 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:16,069 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:16,073 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:16,073 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:16,158 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:16,160 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:16,160 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 23 [2018-01-21 08:46:16,160 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:16,160 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-21 08:46:16,161 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-21 08:46:16,161 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=233, Invalid=273, Unknown=0, NotChecked=0, Total=506 [2018-01-21 08:46:16,161 INFO L87 Difference]: Start difference. First operand 26 states and 26 transitions. Second operand 13 states. [2018-01-21 08:46:16,192 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:16,193 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-01-21 08:46:16,193 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-21 08:46:16,193 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 25 [2018-01-21 08:46:16,193 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:16,194 INFO L225 Difference]: With dead ends: 36 [2018-01-21 08:46:16,194 INFO L226 Difference]: Without dead ends: 27 [2018-01-21 08:46:16,194 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 87 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=247, Invalid=305, Unknown=0, NotChecked=0, Total=552 [2018-01-21 08:46:16,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-01-21 08:46:16,197 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-01-21 08:46:16,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-01-21 08:46:16,198 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 27 transitions. [2018-01-21 08:46:16,199 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 27 transitions. Word has length 25 [2018-01-21 08:46:16,199 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:16,199 INFO L432 AbstractCegarLoop]: Abstraction has 27 states and 27 transitions. [2018-01-21 08:46:16,199 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-21 08:46:16,199 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-01-21 08:46:16,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-21 08:46:16,200 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:16,200 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:16,200 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:16,200 INFO L82 PathProgramCache]: Analyzing trace with hash 642491211, now seen corresponding path program 9 times [2018-01-21 08:46:16,200 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:16,201 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:16,201 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:16,201 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:16,201 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:16,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:16,209 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:16,334 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:16,335 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:16,335 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:16,335 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:16,335 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:16,335 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:16,335 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:16,345 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:46:16,345 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:46:16,353 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:16,359 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:16,367 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:16,381 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:16,392 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:16,393 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:16,394 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:16,395 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:16,413 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:16,413 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:16,750 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:16,770 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:16,770 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:16,773 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:46:16,773 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:46:16,782 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:16,788 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:16,796 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:16,804 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:16,812 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:16,821 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:16,827 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:16,830 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:16,834 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:16,834 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:16,901 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:16,902 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:16,902 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 25 [2018-01-21 08:46:16,902 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:16,903 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-21 08:46:16,903 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-21 08:46:16,903 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=278, Invalid=322, Unknown=0, NotChecked=0, Total=600 [2018-01-21 08:46:16,903 INFO L87 Difference]: Start difference. First operand 27 states and 27 transitions. Second operand 14 states. [2018-01-21 08:46:16,925 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:16,925 INFO L93 Difference]: Finished difference Result 37 states and 37 transitions. [2018-01-21 08:46:16,925 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-21 08:46:16,925 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 26 [2018-01-21 08:46:16,926 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:16,926 INFO L225 Difference]: With dead ends: 37 [2018-01-21 08:46:16,926 INFO L226 Difference]: Without dead ends: 28 [2018-01-21 08:46:16,927 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 90 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=293, Invalid=357, Unknown=0, NotChecked=0, Total=650 [2018-01-21 08:46:16,927 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-01-21 08:46:16,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-01-21 08:46:16,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-01-21 08:46:16,929 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 28 transitions. [2018-01-21 08:46:16,930 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 28 transitions. Word has length 26 [2018-01-21 08:46:16,930 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:16,930 INFO L432 AbstractCegarLoop]: Abstraction has 28 states and 28 transitions. [2018-01-21 08:46:16,930 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-21 08:46:16,930 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-01-21 08:46:16,931 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-21 08:46:16,931 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:16,931 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:16,931 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:16,931 INFO L82 PathProgramCache]: Analyzing trace with hash 1335383216, now seen corresponding path program 10 times [2018-01-21 08:46:16,931 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:16,932 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:16,932 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:16,932 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:16,933 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:16,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:16,941 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:17,027 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:17,027 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:17,027 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:17,027 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:17,028 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:17,028 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:17,028 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:17,037 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:46:17,037 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:46:17,048 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:17,049 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:17,057 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:17,057 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:17,316 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:17,336 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:17,336 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:17,339 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:46:17,339 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:46:17,366 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:17,369 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:17,375 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:17,375 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:17,466 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:17,467 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:17,467 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 27 [2018-01-21 08:46:17,467 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:17,468 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-21 08:46:17,468 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-21 08:46:17,468 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=327, Invalid=375, Unknown=0, NotChecked=0, Total=702 [2018-01-21 08:46:17,468 INFO L87 Difference]: Start difference. First operand 28 states and 28 transitions. Second operand 15 states. [2018-01-21 08:46:17,494 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:17,494 INFO L93 Difference]: Finished difference Result 38 states and 38 transitions. [2018-01-21 08:46:17,494 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-21 08:46:17,494 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 27 [2018-01-21 08:46:17,495 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:17,495 INFO L225 Difference]: With dead ends: 38 [2018-01-21 08:46:17,495 INFO L226 Difference]: Without dead ends: 29 [2018-01-21 08:46:17,496 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 93 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=343, Invalid=413, Unknown=0, NotChecked=0, Total=756 [2018-01-21 08:46:17,496 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-01-21 08:46:17,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-01-21 08:46:17,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-01-21 08:46:17,500 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 29 transitions. [2018-01-21 08:46:17,500 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 29 transitions. Word has length 27 [2018-01-21 08:46:17,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:17,500 INFO L432 AbstractCegarLoop]: Abstraction has 29 states and 29 transitions. [2018-01-21 08:46:17,500 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-21 08:46:17,500 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2018-01-21 08:46:17,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-21 08:46:17,501 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:17,501 INFO L322 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:17,501 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:17,502 INFO L82 PathProgramCache]: Analyzing trace with hash 1340198891, now seen corresponding path program 11 times [2018-01-21 08:46:17,502 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:17,502 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:17,503 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:17,503 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:17,503 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:17,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:17,511 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:17,605 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:17,605 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:17,605 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:17,605 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:17,605 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:17,606 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:17,606 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:17,610 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:46:17,611 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:17,614 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:17,614 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:17,615 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:17,616 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:17,617 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:17,617 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:17,621 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:17,622 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:17,623 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:17,630 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:17,630 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:17,893 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:17,913 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:17,913 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:17,916 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:46:17,916 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:17,920 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:17,921 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:17,924 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:17,928 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:17,932 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:17,936 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:17,946 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:17,953 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:17,956 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:17,961 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:17,961 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:18,043 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:18,045 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:18,045 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 29 [2018-01-21 08:46:18,045 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:18,045 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-21 08:46:18,045 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-21 08:46:18,046 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=380, Invalid=432, Unknown=0, NotChecked=0, Total=812 [2018-01-21 08:46:18,046 INFO L87 Difference]: Start difference. First operand 29 states and 29 transitions. Second operand 16 states. [2018-01-21 08:46:18,076 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:18,077 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-01-21 08:46:18,077 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-21 08:46:18,077 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 28 [2018-01-21 08:46:18,077 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:18,078 INFO L225 Difference]: With dead ends: 39 [2018-01-21 08:46:18,078 INFO L226 Difference]: Without dead ends: 30 [2018-01-21 08:46:18,078 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 96 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=397, Invalid=473, Unknown=0, NotChecked=0, Total=870 [2018-01-21 08:46:18,078 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-01-21 08:46:18,080 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-01-21 08:46:18,080 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-01-21 08:46:18,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 30 transitions. [2018-01-21 08:46:18,080 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 30 transitions. Word has length 28 [2018-01-21 08:46:18,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:18,081 INFO L432 AbstractCegarLoop]: Abstraction has 30 states and 30 transitions. [2018-01-21 08:46:18,081 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-21 08:46:18,081 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-01-21 08:46:18,081 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-21 08:46:18,081 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:18,081 INFO L322 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:18,081 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:18,081 INFO L82 PathProgramCache]: Analyzing trace with hash 1489484816, now seen corresponding path program 12 times [2018-01-21 08:46:18,082 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:18,082 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:18,082 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:18,082 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:18,082 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:18,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:18,091 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:18,185 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:18,185 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:18,185 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:18,185 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:18,185 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:18,185 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:18,186 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:18,190 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:46:18,190 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:46:18,197 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:18,199 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:18,200 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:18,202 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:18,203 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:18,204 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:18,205 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:18,205 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:18,206 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:18,214 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:18,214 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:18,516 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:18,536 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:18,536 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:18,539 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:46:18,539 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:46:18,548 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:18,554 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:18,563 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:18,575 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:18,588 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:18,597 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:18,607 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:18,614 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:18,617 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:18,621 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:18,621 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:18,718 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:18,719 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:18,719 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 31 [2018-01-21 08:46:18,719 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:18,720 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-21 08:46:18,720 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-21 08:46:18,720 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=437, Invalid=493, Unknown=0, NotChecked=0, Total=930 [2018-01-21 08:46:18,720 INFO L87 Difference]: Start difference. First operand 30 states and 30 transitions. Second operand 17 states. [2018-01-21 08:46:18,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:18,742 INFO L93 Difference]: Finished difference Result 40 states and 40 transitions. [2018-01-21 08:46:18,742 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-21 08:46:18,742 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 29 [2018-01-21 08:46:18,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:18,743 INFO L225 Difference]: With dead ends: 40 [2018-01-21 08:46:18,743 INFO L226 Difference]: Without dead ends: 31 [2018-01-21 08:46:18,744 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 99 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=455, Invalid=537, Unknown=0, NotChecked=0, Total=992 [2018-01-21 08:46:18,744 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2018-01-21 08:46:18,746 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2018-01-21 08:46:18,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-01-21 08:46:18,747 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 31 transitions. [2018-01-21 08:46:18,747 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 31 transitions. Word has length 29 [2018-01-21 08:46:18,748 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:18,748 INFO L432 AbstractCegarLoop]: Abstraction has 31 states and 31 transitions. [2018-01-21 08:46:18,748 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-21 08:46:18,748 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 31 transitions. [2018-01-21 08:46:18,748 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-21 08:46:18,748 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:18,748 INFO L322 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:18,748 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:18,749 INFO L82 PathProgramCache]: Analyzing trace with hash 1822381195, now seen corresponding path program 13 times [2018-01-21 08:46:18,749 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:18,749 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:18,749 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:18,749 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:18,749 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:18,756 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:18,757 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:18,855 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:18,855 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:18,855 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:18,855 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:18,856 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:18,856 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:18,856 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:18,862 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:18,862 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:46:18,872 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:18,873 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:18,880 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:18,881 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:19,224 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:19,245 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:19,245 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:19,248 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:19,248 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:46:19,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:19,271 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:19,277 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:19,277 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:19,399 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:19,400 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:19,400 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 33 [2018-01-21 08:46:19,400 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:19,400 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-21 08:46:19,400 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-21 08:46:19,401 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=498, Invalid=558, Unknown=0, NotChecked=0, Total=1056 [2018-01-21 08:46:19,401 INFO L87 Difference]: Start difference. First operand 31 states and 31 transitions. Second operand 18 states. [2018-01-21 08:46:19,462 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:19,462 INFO L93 Difference]: Finished difference Result 41 states and 41 transitions. [2018-01-21 08:46:19,462 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-21 08:46:19,462 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 30 [2018-01-21 08:46:19,463 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:19,463 INFO L225 Difference]: With dead ends: 41 [2018-01-21 08:46:19,463 INFO L226 Difference]: Without dead ends: 32 [2018-01-21 08:46:19,463 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 102 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=517, Invalid=605, Unknown=0, NotChecked=0, Total=1122 [2018-01-21 08:46:19,464 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-01-21 08:46:19,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2018-01-21 08:46:19,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-01-21 08:46:19,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 32 transitions. [2018-01-21 08:46:19,466 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 32 transitions. Word has length 30 [2018-01-21 08:46:19,466 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:19,466 INFO L432 AbstractCegarLoop]: Abstraction has 32 states and 32 transitions. [2018-01-21 08:46:19,466 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-21 08:46:19,466 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2018-01-21 08:46:19,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-21 08:46:19,466 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:19,467 INFO L322 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:19,467 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:19,467 INFO L82 PathProgramCache]: Analyzing trace with hash -742732944, now seen corresponding path program 14 times [2018-01-21 08:46:19,467 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:19,467 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:19,467 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:19,468 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:19,468 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:19,473 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:19,474 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:19,597 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:19,598 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:19,598 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:19,598 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:19,598 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:19,598 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:19,598 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:19,621 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:46:19,622 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:19,629 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:19,640 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:19,645 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:19,647 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:19,677 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:19,678 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:20,075 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:20,106 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:20,106 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:20,109 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:46:20,109 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:20,120 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:20,134 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:20,143 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:20,146 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:20,151 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:20,152 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:20,280 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:20,281 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:20,281 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 35 [2018-01-21 08:46:20,281 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:20,282 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-21 08:46:20,282 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-21 08:46:20,282 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=563, Invalid=627, Unknown=0, NotChecked=0, Total=1190 [2018-01-21 08:46:20,282 INFO L87 Difference]: Start difference. First operand 32 states and 32 transitions. Second operand 19 states. [2018-01-21 08:46:20,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:20,451 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-01-21 08:46:20,453 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-21 08:46:20,453 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 31 [2018-01-21 08:46:20,454 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:20,454 INFO L225 Difference]: With dead ends: 42 [2018-01-21 08:46:20,454 INFO L226 Difference]: Without dead ends: 33 [2018-01-21 08:46:20,455 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 105 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 87 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=583, Invalid=677, Unknown=0, NotChecked=0, Total=1260 [2018-01-21 08:46:20,455 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-01-21 08:46:20,458 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2018-01-21 08:46:20,458 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-01-21 08:46:20,458 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 33 transitions. [2018-01-21 08:46:20,459 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 33 transitions. Word has length 31 [2018-01-21 08:46:20,459 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:20,459 INFO L432 AbstractCegarLoop]: Abstraction has 33 states and 33 transitions. [2018-01-21 08:46:20,459 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-21 08:46:20,459 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-01-21 08:46:20,460 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-21 08:46:20,460 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:20,460 INFO L322 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:20,460 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:20,460 INFO L82 PathProgramCache]: Analyzing trace with hash 1343107371, now seen corresponding path program 15 times [2018-01-21 08:46:20,460 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:20,461 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:20,461 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:20,461 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:20,461 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:20,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:20,469 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:20,625 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:20,625 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:20,626 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:20,626 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:20,626 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:20,626 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:20,626 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:20,633 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:46:20,633 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:46:20,640 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:20,642 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:20,644 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:20,646 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:20,647 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:20,648 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:20,650 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:20,651 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:20,652 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:20,653 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:20,654 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:20,667 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:20,667 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:21,643 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:21,675 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:21,675 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:21,684 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:46:21,684 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:46:21,694 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:21,701 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:21,709 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:21,717 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:21,726 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:21,736 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:21,746 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:21,756 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:21,767 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:21,775 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:21,778 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:21,790 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:21,791 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:21,927 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:21,928 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:21,928 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 37 [2018-01-21 08:46:21,929 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:21,929 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-21 08:46:21,929 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-21 08:46:21,929 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=632, Invalid=700, Unknown=0, NotChecked=0, Total=1332 [2018-01-21 08:46:21,930 INFO L87 Difference]: Start difference. First operand 33 states and 33 transitions. Second operand 20 states. [2018-01-21 08:46:21,965 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:21,965 INFO L93 Difference]: Finished difference Result 43 states and 43 transitions. [2018-01-21 08:46:21,965 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-21 08:46:21,965 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 32 [2018-01-21 08:46:21,966 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:21,966 INFO L225 Difference]: With dead ends: 43 [2018-01-21 08:46:21,966 INFO L226 Difference]: Without dead ends: 34 [2018-01-21 08:46:21,966 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 108 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=653, Invalid=753, Unknown=0, NotChecked=0, Total=1406 [2018-01-21 08:46:21,967 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-01-21 08:46:21,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-01-21 08:46:21,969 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-01-21 08:46:21,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2018-01-21 08:46:21,969 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 32 [2018-01-21 08:46:21,969 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:21,969 INFO L432 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2018-01-21 08:46:21,969 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-21 08:46:21,969 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-01-21 08:46:21,970 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-21 08:46:21,970 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:21,970 INFO L322 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:21,970 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:21,970 INFO L82 PathProgramCache]: Analyzing trace with hash 1579647696, now seen corresponding path program 16 times [2018-01-21 08:46:21,970 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:21,971 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:21,971 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:21,971 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:21,971 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:21,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:21,978 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:22,109 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:22,110 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:22,110 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:22,110 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:22,110 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:22,110 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:22,110 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:22,117 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:46:22,117 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:46:22,130 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:22,131 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:22,155 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:22,155 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:23,134 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:23,164 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:23,165 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:23,168 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:46:23,168 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:46:23,200 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:23,204 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:23,209 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:23,210 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:23,363 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:23,364 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:23,364 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 39 [2018-01-21 08:46:23,364 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:23,365 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-21 08:46:23,365 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-21 08:46:23,365 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=705, Invalid=777, Unknown=0, NotChecked=0, Total=1482 [2018-01-21 08:46:23,365 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand 21 states. [2018-01-21 08:46:23,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:23,406 INFO L93 Difference]: Finished difference Result 44 states and 44 transitions. [2018-01-21 08:46:23,406 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-21 08:46:23,406 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 33 [2018-01-21 08:46:23,407 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:23,407 INFO L225 Difference]: With dead ends: 44 [2018-01-21 08:46:23,407 INFO L226 Difference]: Without dead ends: 35 [2018-01-21 08:46:23,408 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 111 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=727, Invalid=833, Unknown=0, NotChecked=0, Total=1560 [2018-01-21 08:46:23,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-01-21 08:46:23,410 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 35. [2018-01-21 08:46:23,410 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-01-21 08:46:23,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 35 transitions. [2018-01-21 08:46:23,411 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 35 transitions. Word has length 33 [2018-01-21 08:46:23,411 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:23,411 INFO L432 AbstractCegarLoop]: Abstraction has 35 states and 35 transitions. [2018-01-21 08:46:23,411 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-21 08:46:23,412 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 35 transitions. [2018-01-21 08:46:23,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-21 08:46:23,412 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:23,412 INFO L322 BasicCegarLoop]: trace histogram [17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:23,412 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:23,413 INFO L82 PathProgramCache]: Analyzing trace with hash 322463179, now seen corresponding path program 17 times [2018-01-21 08:46:23,413 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:23,413 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:23,414 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:23,414 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:23,414 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:23,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:23,420 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:23,624 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:23,624 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:23,624 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:23,624 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:23,624 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:23,624 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:23,624 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:23,630 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:46:23,630 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:23,634 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:23,642 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:23,643 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:23,643 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:23,644 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:23,645 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:23,646 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:23,647 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:23,648 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:23,653 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:23,654 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:23,655 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:23,663 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:23,663 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:24,181 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:24,201 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:24,201 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:24,204 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:46:24,204 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:24,208 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:24,209 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:24,213 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:24,216 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:24,220 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:24,224 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:24,229 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:24,234 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:24,239 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:24,249 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:24,258 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:24,261 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:24,266 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:24,266 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:24,433 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:24,434 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:24,434 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 41 [2018-01-21 08:46:24,434 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:24,435 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-21 08:46:24,435 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-21 08:46:24,435 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=782, Invalid=858, Unknown=0, NotChecked=0, Total=1640 [2018-01-21 08:46:24,435 INFO L87 Difference]: Start difference. First operand 35 states and 35 transitions. Second operand 22 states. [2018-01-21 08:46:24,477 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:24,478 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-01-21 08:46:24,478 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-21 08:46:24,478 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 34 [2018-01-21 08:46:24,478 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:24,478 INFO L225 Difference]: With dead ends: 45 [2018-01-21 08:46:24,478 INFO L226 Difference]: Without dead ends: 36 [2018-01-21 08:46:24,479 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 114 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=805, Invalid=917, Unknown=0, NotChecked=0, Total=1722 [2018-01-21 08:46:24,479 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-01-21 08:46:24,482 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-01-21 08:46:24,482 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-01-21 08:46:24,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-01-21 08:46:24,482 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 34 [2018-01-21 08:46:24,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:24,483 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-01-21 08:46:24,483 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-21 08:46:24,483 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-01-21 08:46:24,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-21 08:46:24,483 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:24,483 INFO L322 BasicCegarLoop]: trace histogram [18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:24,483 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:24,484 INFO L82 PathProgramCache]: Analyzing trace with hash 4448816, now seen corresponding path program 18 times [2018-01-21 08:46:24,484 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:24,484 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:24,484 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:24,484 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:24,484 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:24,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:24,492 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:24,836 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:24,836 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:24,836 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:24,837 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:24,837 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:24,837 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:24,837 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:24,841 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:46:24,842 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:46:24,848 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:24,852 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:24,853 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:24,854 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:24,855 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:24,856 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:24,857 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:24,858 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:24,859 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:24,860 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:24,861 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:24,862 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:24,870 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:24,870 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:25,475 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:25,495 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:25,495 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:25,498 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:46:25,498 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:46:25,508 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:25,514 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:25,522 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:25,530 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:25,538 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:25,547 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:25,557 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:25,567 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:25,577 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:25,588 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:25,596 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:25,599 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:25,604 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:25,604 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:25,759 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:25,760 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:25,760 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 43 [2018-01-21 08:46:25,760 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:25,760 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-21 08:46:25,760 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-21 08:46:25,761 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=863, Invalid=943, Unknown=0, NotChecked=0, Total=1806 [2018-01-21 08:46:25,761 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 23 states. [2018-01-21 08:46:25,808 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:25,809 INFO L93 Difference]: Finished difference Result 46 states and 46 transitions. [2018-01-21 08:46:25,809 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-21 08:46:25,809 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 35 [2018-01-21 08:46:25,809 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:25,809 INFO L225 Difference]: With dead ends: 46 [2018-01-21 08:46:25,810 INFO L226 Difference]: Without dead ends: 37 [2018-01-21 08:46:25,810 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 117 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=887, Invalid=1005, Unknown=0, NotChecked=0, Total=1892 [2018-01-21 08:46:25,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-01-21 08:46:25,813 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 37. [2018-01-21 08:46:25,813 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-01-21 08:46:25,813 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 37 transitions. [2018-01-21 08:46:25,813 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 37 transitions. Word has length 35 [2018-01-21 08:46:25,813 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:25,814 INFO L432 AbstractCegarLoop]: Abstraction has 37 states and 37 transitions. [2018-01-21 08:46:25,814 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-21 08:46:25,814 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 37 transitions. [2018-01-21 08:46:25,814 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-21 08:46:25,814 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:25,814 INFO L322 BasicCegarLoop]: trace histogram [19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:25,814 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:25,814 INFO L82 PathProgramCache]: Analyzing trace with hash -1264061845, now seen corresponding path program 19 times [2018-01-21 08:46:25,815 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:25,815 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:25,815 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:25,815 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:25,815 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:25,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:25,823 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:26,072 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:26,072 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:26,073 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:26,073 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:26,073 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:26,073 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:26,073 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:26,078 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:26,078 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:46:26,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:26,090 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:26,098 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:26,099 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:26,698 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:26,722 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:26,722 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:26,725 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:26,725 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:46:26,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:26,752 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:26,758 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:26,758 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:26,898 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:26,899 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:26,899 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 45 [2018-01-21 08:46:26,899 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:26,899 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-21 08:46:26,899 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-21 08:46:26,900 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=948, Invalid=1032, Unknown=0, NotChecked=0, Total=1980 [2018-01-21 08:46:26,900 INFO L87 Difference]: Start difference. First operand 37 states and 37 transitions. Second operand 24 states. [2018-01-21 08:46:26,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:26,942 INFO L93 Difference]: Finished difference Result 47 states and 47 transitions. [2018-01-21 08:46:26,942 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-21 08:46:26,942 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 36 [2018-01-21 08:46:26,943 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:26,943 INFO L225 Difference]: With dead ends: 47 [2018-01-21 08:46:26,943 INFO L226 Difference]: Without dead ends: 38 [2018-01-21 08:46:26,943 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 166 GetRequests, 120 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=973, Invalid=1097, Unknown=0, NotChecked=0, Total=2070 [2018-01-21 08:46:26,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2018-01-21 08:46:26,945 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2018-01-21 08:46:26,945 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-01-21 08:46:26,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 38 transitions. [2018-01-21 08:46:26,946 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 38 transitions. Word has length 36 [2018-01-21 08:46:26,946 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:26,946 INFO L432 AbstractCegarLoop]: Abstraction has 38 states and 38 transitions. [2018-01-21 08:46:26,946 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-21 08:46:26,946 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-01-21 08:46:26,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-21 08:46:26,947 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:26,947 INFO L322 BasicCegarLoop]: trace histogram [20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:26,947 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:26,947 INFO L82 PathProgramCache]: Analyzing trace with hash -1933186672, now seen corresponding path program 20 times [2018-01-21 08:46:26,947 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:26,947 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:26,947 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:26,948 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:26,948 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:26,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:26,955 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:27,121 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:27,122 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:27,122 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:27,122 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:27,122 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:27,122 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:27,122 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:27,127 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:46:27,127 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:27,133 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:27,138 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:27,139 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:27,141 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:27,150 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:27,150 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:27,791 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:27,812 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:27,812 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:27,815 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:46:27,815 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:27,825 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:27,837 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:27,847 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:27,851 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:27,857 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:27,857 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:28,010 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:28,011 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:28,011 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 47 [2018-01-21 08:46:28,011 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:28,011 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-21 08:46:28,011 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-21 08:46:28,012 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1037, Invalid=1125, Unknown=0, NotChecked=0, Total=2162 [2018-01-21 08:46:28,012 INFO L87 Difference]: Start difference. First operand 38 states and 38 transitions. Second operand 25 states. [2018-01-21 08:46:28,049 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:28,050 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-01-21 08:46:28,050 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-21 08:46:28,050 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 37 [2018-01-21 08:46:28,050 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:28,050 INFO L225 Difference]: With dead ends: 48 [2018-01-21 08:46:28,050 INFO L226 Difference]: Without dead ends: 39 [2018-01-21 08:46:28,051 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 123 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 123 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1063, Invalid=1193, Unknown=0, NotChecked=0, Total=2256 [2018-01-21 08:46:28,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-01-21 08:46:28,052 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-01-21 08:46:28,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-01-21 08:46:28,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 39 transitions. [2018-01-21 08:46:28,053 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 39 transitions. Word has length 37 [2018-01-21 08:46:28,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:28,053 INFO L432 AbstractCegarLoop]: Abstraction has 39 states and 39 transitions. [2018-01-21 08:46:28,053 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-21 08:46:28,053 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-01-21 08:46:28,054 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-21 08:46:28,054 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:28,054 INFO L322 BasicCegarLoop]: trace histogram [21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:28,054 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:28,054 INFO L82 PathProgramCache]: Analyzing trace with hash -1201219829, now seen corresponding path program 21 times [2018-01-21 08:46:28,054 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:28,055 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:28,055 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:28,055 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:28,055 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:28,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:28,063 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:28,247 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:28,248 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:28,248 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:28,248 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:28,248 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:28,248 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:28,248 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:28,253 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:46:28,253 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:46:28,260 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:28,261 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:28,262 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:28,264 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:28,265 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:28,266 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:28,267 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:28,268 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:28,269 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:28,271 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:28,272 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:28,274 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:28,274 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:28,276 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:28,289 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:28,289 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:28,976 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:28,995 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:28,996 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:28,999 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:46:28,999 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:46:29,008 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:29,014 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:29,022 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:29,030 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:29,039 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:29,048 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:29,057 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:29,066 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:29,076 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:29,087 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:29,097 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:29,108 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:29,116 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:29,120 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:29,125 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:29,125 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:29,283 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:29,284 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:29,284 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 49 [2018-01-21 08:46:29,284 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:29,285 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-21 08:46:29,285 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-21 08:46:29,285 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1130, Invalid=1222, Unknown=0, NotChecked=0, Total=2352 [2018-01-21 08:46:29,286 INFO L87 Difference]: Start difference. First operand 39 states and 39 transitions. Second operand 26 states. [2018-01-21 08:46:29,321 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:29,321 INFO L93 Difference]: Finished difference Result 49 states and 49 transitions. [2018-01-21 08:46:29,322 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-21 08:46:29,322 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 38 [2018-01-21 08:46:29,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:29,322 INFO L225 Difference]: With dead ends: 49 [2018-01-21 08:46:29,322 INFO L226 Difference]: Without dead ends: 40 [2018-01-21 08:46:29,323 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 126 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 129 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1157, Invalid=1293, Unknown=0, NotChecked=0, Total=2450 [2018-01-21 08:46:29,324 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-01-21 08:46:29,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2018-01-21 08:46:29,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-01-21 08:46:29,326 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 40 transitions. [2018-01-21 08:46:29,326 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 40 transitions. Word has length 38 [2018-01-21 08:46:29,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:29,327 INFO L432 AbstractCegarLoop]: Abstraction has 40 states and 40 transitions. [2018-01-21 08:46:29,327 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-21 08:46:29,327 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 40 transitions. [2018-01-21 08:46:29,327 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-21 08:46:29,327 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:29,327 INFO L322 BasicCegarLoop]: trace histogram [22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:29,327 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:29,327 INFO L82 PathProgramCache]: Analyzing trace with hash 14915824, now seen corresponding path program 22 times [2018-01-21 08:46:29,328 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:29,328 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:29,328 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:29,328 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:29,328 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:29,333 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:29,334 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:29,516 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:29,516 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:29,516 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:29,516 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:29,516 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:29,516 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:29,517 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:29,521 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:46:29,521 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:46:29,534 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:29,536 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:29,544 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:29,544 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:30,331 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:30,350 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:30,350 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:30,353 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:46:30,353 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:46:30,387 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:30,390 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:30,395 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:30,395 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:30,569 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:30,570 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:30,570 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 51 [2018-01-21 08:46:30,570 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:30,570 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-21 08:46:30,571 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-21 08:46:30,571 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1227, Invalid=1323, Unknown=0, NotChecked=0, Total=2550 [2018-01-21 08:46:30,571 INFO L87 Difference]: Start difference. First operand 40 states and 40 transitions. Second operand 27 states. [2018-01-21 08:46:30,606 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:30,606 INFO L93 Difference]: Finished difference Result 50 states and 50 transitions. [2018-01-21 08:46:30,606 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-21 08:46:30,607 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 39 [2018-01-21 08:46:30,607 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:30,607 INFO L225 Difference]: With dead ends: 50 [2018-01-21 08:46:30,607 INFO L226 Difference]: Without dead ends: 41 [2018-01-21 08:46:30,608 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 181 GetRequests, 129 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 135 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1255, Invalid=1397, Unknown=0, NotChecked=0, Total=2652 [2018-01-21 08:46:30,608 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-01-21 08:46:30,610 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. [2018-01-21 08:46:30,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-01-21 08:46:30,610 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 41 transitions. [2018-01-21 08:46:30,610 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 41 transitions. Word has length 39 [2018-01-21 08:46:30,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:30,611 INFO L432 AbstractCegarLoop]: Abstraction has 41 states and 41 transitions. [2018-01-21 08:46:30,611 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-21 08:46:30,611 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 41 transitions. [2018-01-21 08:46:30,611 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-21 08:46:30,611 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:30,611 INFO L322 BasicCegarLoop]: trace histogram [23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:30,612 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:30,612 INFO L82 PathProgramCache]: Analyzing trace with hash -939584597, now seen corresponding path program 23 times [2018-01-21 08:46:30,612 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:30,612 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:30,612 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:30,612 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:30,612 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:30,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:30,618 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:30,822 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:30,822 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:30,822 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:30,823 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:30,823 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:30,823 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:30,823 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:30,827 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:46:30,827 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:30,831 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:30,838 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:30,839 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:30,840 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:30,840 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:30,841 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:30,842 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:30,843 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:30,843 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:30,844 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:30,845 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:30,846 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:30,849 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:30,850 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:30,852 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:30,860 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:30,860 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:31,643 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:31,662 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:31,662 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:31,665 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:46:31,665 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:31,670 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:31,671 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:31,674 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:31,678 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:31,682 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:31,686 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:31,690 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:31,695 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:31,700 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:31,706 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:31,712 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:31,719 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:31,731 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:31,740 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:31,743 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:31,751 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:31,751 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:31,957 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:31,957 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:31,958 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 53 [2018-01-21 08:46:31,958 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:31,958 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-21 08:46:31,958 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-21 08:46:31,959 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1328, Invalid=1428, Unknown=0, NotChecked=0, Total=2756 [2018-01-21 08:46:31,959 INFO L87 Difference]: Start difference. First operand 41 states and 41 transitions. Second operand 28 states. [2018-01-21 08:46:31,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:31,992 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-01-21 08:46:31,992 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-21 08:46:31,993 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 40 [2018-01-21 08:46:31,993 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:31,993 INFO L225 Difference]: With dead ends: 51 [2018-01-21 08:46:31,993 INFO L226 Difference]: Without dead ends: 42 [2018-01-21 08:46:31,995 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 132 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 141 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1357, Invalid=1505, Unknown=0, NotChecked=0, Total=2862 [2018-01-21 08:46:31,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-01-21 08:46:31,997 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2018-01-21 08:46:31,997 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-01-21 08:46:31,998 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 42 transitions. [2018-01-21 08:46:31,998 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 42 transitions. Word has length 40 [2018-01-21 08:46:31,998 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:31,998 INFO L432 AbstractCegarLoop]: Abstraction has 42 states and 42 transitions. [2018-01-21 08:46:31,999 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-21 08:46:31,999 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-01-21 08:46:31,999 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-21 08:46:31,999 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:31,999 INFO L322 BasicCegarLoop]: trace histogram [24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:31,999 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:32,000 INFO L82 PathProgramCache]: Analyzing trace with hash -464326576, now seen corresponding path program 24 times [2018-01-21 08:46:32,000 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:32,000 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:32,001 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:32,001 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:32,001 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:32,014 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:32,015 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:32,217 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:32,218 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:32,218 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:32,218 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:32,218 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:32,218 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:32,218 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:32,223 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:46:32,223 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:46:32,230 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:32,232 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:32,233 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:32,234 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:32,235 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:32,236 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:32,237 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:32,238 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:32,239 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:32,240 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:32,241 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:32,242 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:32,243 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:32,243 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:32,245 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:32,253 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:32,253 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:33,106 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:33,126 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:33,126 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:33,129 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:46:33,129 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:46:33,139 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:33,145 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:33,152 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:33,160 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:33,168 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:33,177 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:33,186 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:33,196 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:33,206 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:33,216 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:33,227 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:33,238 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:33,250 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:33,259 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:33,262 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:33,268 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:33,268 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:33,475 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:33,476 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:33,476 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 55 [2018-01-21 08:46:33,476 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:33,476 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-21 08:46:33,476 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-21 08:46:33,477 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1433, Invalid=1537, Unknown=0, NotChecked=0, Total=2970 [2018-01-21 08:46:33,477 INFO L87 Difference]: Start difference. First operand 42 states and 42 transitions. Second operand 29 states. [2018-01-21 08:46:33,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:33,519 INFO L93 Difference]: Finished difference Result 52 states and 52 transitions. [2018-01-21 08:46:33,519 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-21 08:46:33,519 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 41 [2018-01-21 08:46:33,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:33,519 INFO L225 Difference]: With dead ends: 52 [2018-01-21 08:46:33,519 INFO L226 Difference]: Without dead ends: 43 [2018-01-21 08:46:33,520 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 135 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 147 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1463, Invalid=1617, Unknown=0, NotChecked=0, Total=3080 [2018-01-21 08:46:33,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-01-21 08:46:33,522 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2018-01-21 08:46:33,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-01-21 08:46:33,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 43 transitions. [2018-01-21 08:46:33,523 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 43 transitions. Word has length 41 [2018-01-21 08:46:33,523 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:33,523 INFO L432 AbstractCegarLoop]: Abstraction has 43 states and 43 transitions. [2018-01-21 08:46:33,523 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-21 08:46:33,523 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 43 transitions. [2018-01-21 08:46:33,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-21 08:46:33,524 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:33,524 INFO L322 BasicCegarLoop]: trace histogram [25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:33,524 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:33,524 INFO L82 PathProgramCache]: Analyzing trace with hash 1383770187, now seen corresponding path program 25 times [2018-01-21 08:46:33,524 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:33,525 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:33,525 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:33,525 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:33,525 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:33,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:33,533 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:33,770 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:33,770 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:33,770 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:33,770 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:33,770 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:33,770 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:33,771 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:33,775 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:33,775 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:46:33,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:33,788 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:33,797 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:33,797 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:34,720 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:34,739 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:34,739 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:34,742 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:34,742 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:46:34,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:34,770 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:34,776 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:34,776 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:34,970 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:34,971 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:34,972 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 57 [2018-01-21 08:46:34,972 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:34,972 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-21 08:46:34,972 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-21 08:46:34,973 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1542, Invalid=1650, Unknown=0, NotChecked=0, Total=3192 [2018-01-21 08:46:34,973 INFO L87 Difference]: Start difference. First operand 43 states and 43 transitions. Second operand 30 states. [2018-01-21 08:46:35,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:35,011 INFO L93 Difference]: Finished difference Result 53 states and 53 transitions. [2018-01-21 08:46:35,011 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-21 08:46:35,012 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 42 [2018-01-21 08:46:35,012 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:35,012 INFO L225 Difference]: With dead ends: 53 [2018-01-21 08:46:35,012 INFO L226 Difference]: Without dead ends: 44 [2018-01-21 08:46:35,013 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 196 GetRequests, 138 SyntacticMatches, 2 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 153 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1573, Invalid=1733, Unknown=0, NotChecked=0, Total=3306 [2018-01-21 08:46:35,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-01-21 08:46:35,014 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-01-21 08:46:35,014 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-01-21 08:46:35,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 44 transitions. [2018-01-21 08:46:35,015 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 44 transitions. Word has length 42 [2018-01-21 08:46:35,015 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:35,015 INFO L432 AbstractCegarLoop]: Abstraction has 44 states and 44 transitions. [2018-01-21 08:46:35,015 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-21 08:46:35,015 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 44 transitions. [2018-01-21 08:46:35,015 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-21 08:46:35,016 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:35,016 INFO L322 BasicCegarLoop]: trace histogram [26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:35,016 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:35,016 INFO L82 PathProgramCache]: Analyzing trace with hash -1454772304, now seen corresponding path program 26 times [2018-01-21 08:46:35,016 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:35,016 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:35,016 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:35,017 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:35,017 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:35,023 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:35,024 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:35,309 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:35,309 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:35,310 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:35,310 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:35,310 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:35,310 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:35,310 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:35,316 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:46:35,316 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:35,322 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:35,327 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:35,328 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:35,330 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:35,339 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:35,339 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:36,313 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:36,333 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:36,333 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:36,336 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:46:36,336 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:36,344 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:36,357 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:36,369 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:36,372 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:36,379 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:36,379 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:36,605 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:36,606 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:36,606 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 59 [2018-01-21 08:46:36,606 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:36,607 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-01-21 08:46:36,607 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-01-21 08:46:36,608 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1655, Invalid=1767, Unknown=0, NotChecked=0, Total=3422 [2018-01-21 08:46:36,608 INFO L87 Difference]: Start difference. First operand 44 states and 44 transitions. Second operand 31 states. [2018-01-21 08:46:36,644 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:36,645 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2018-01-21 08:46:36,645 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-01-21 08:46:36,645 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 43 [2018-01-21 08:46:36,645 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:36,646 INFO L225 Difference]: With dead ends: 54 [2018-01-21 08:46:36,646 INFO L226 Difference]: Without dead ends: 45 [2018-01-21 08:46:36,646 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 201 GetRequests, 141 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 159 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1687, Invalid=1853, Unknown=0, NotChecked=0, Total=3540 [2018-01-21 08:46:36,647 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-01-21 08:46:36,649 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-01-21 08:46:36,649 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-01-21 08:46:36,650 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 45 transitions. [2018-01-21 08:46:36,650 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 45 transitions. Word has length 43 [2018-01-21 08:46:36,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:36,650 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 45 transitions. [2018-01-21 08:46:36,650 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-01-21 08:46:36,650 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 45 transitions. [2018-01-21 08:46:36,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-21 08:46:36,651 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:36,651 INFO L322 BasicCegarLoop]: trace histogram [27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:36,651 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:36,651 INFO L82 PathProgramCache]: Analyzing trace with hash 744723691, now seen corresponding path program 27 times [2018-01-21 08:46:36,651 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:36,652 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:36,652 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:36,652 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:36,653 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:36,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:36,661 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:36,977 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:36,977 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:36,977 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:36,977 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:36,977 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:36,977 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:36,978 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:36,982 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:46:36,982 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:46:36,989 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:36,990 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:36,991 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:36,992 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:36,993 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:36,994 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:36,995 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:36,996 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:36,997 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:36,998 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:36,999 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:37,001 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:37,002 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:37,003 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:37,004 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:37,004 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:37,006 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:37,015 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:37,015 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:38,046 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:38,066 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:38,066 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:38,069 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:46:38,069 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:46:38,080 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:38,088 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:38,095 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:38,103 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:38,111 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:38,119 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:38,128 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:38,138 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:38,147 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:38,158 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:38,169 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:38,181 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:38,192 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:38,205 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:38,217 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:38,226 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:38,230 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:38,236 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:38,236 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:38,450 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:38,451 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:38,451 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 61 [2018-01-21 08:46:38,451 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:38,451 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-21 08:46:38,451 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-21 08:46:38,452 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1772, Invalid=1888, Unknown=0, NotChecked=0, Total=3660 [2018-01-21 08:46:38,452 INFO L87 Difference]: Start difference. First operand 45 states and 45 transitions. Second operand 32 states. [2018-01-21 08:46:38,496 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:38,496 INFO L93 Difference]: Finished difference Result 55 states and 55 transitions. [2018-01-21 08:46:38,496 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-21 08:46:38,496 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 44 [2018-01-21 08:46:38,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:38,496 INFO L225 Difference]: With dead ends: 55 [2018-01-21 08:46:38,496 INFO L226 Difference]: Without dead ends: 46 [2018-01-21 08:46:38,497 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 144 SyntacticMatches, 2 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 165 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1805, Invalid=1977, Unknown=0, NotChecked=0, Total=3782 [2018-01-21 08:46:38,497 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-01-21 08:46:38,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2018-01-21 08:46:38,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-01-21 08:46:38,500 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 46 transitions. [2018-01-21 08:46:38,500 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 46 transitions. Word has length 44 [2018-01-21 08:46:38,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:38,500 INFO L432 AbstractCegarLoop]: Abstraction has 46 states and 46 transitions. [2018-01-21 08:46:38,500 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-21 08:46:38,500 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 46 transitions. [2018-01-21 08:46:38,500 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-21 08:46:38,500 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:38,501 INFO L322 BasicCegarLoop]: trace histogram [28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:38,501 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:38,501 INFO L82 PathProgramCache]: Analyzing trace with hash 209622800, now seen corresponding path program 28 times [2018-01-21 08:46:38,501 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:38,501 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:38,501 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:38,502 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:38,502 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:38,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:38,508 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:38,875 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:38,875 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:38,875 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:38,876 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:38,876 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:38,876 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:38,876 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:38,882 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:46:38,883 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:46:38,897 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:38,898 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:38,907 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:38,908 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:40,005 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:40,025 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:40,026 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:40,028 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:46:40,029 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:46:40,067 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:40,070 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:40,076 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:40,076 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:40,299 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:40,300 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:40,300 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32, 32, 32] total 63 [2018-01-21 08:46:40,300 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:40,300 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-01-21 08:46:40,300 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-01-21 08:46:40,301 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1893, Invalid=2013, Unknown=0, NotChecked=0, Total=3906 [2018-01-21 08:46:40,301 INFO L87 Difference]: Start difference. First operand 46 states and 46 transitions. Second operand 33 states. [2018-01-21 08:46:40,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:40,356 INFO L93 Difference]: Finished difference Result 56 states and 56 transitions. [2018-01-21 08:46:40,356 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-21 08:46:40,356 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 45 [2018-01-21 08:46:40,356 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:40,356 INFO L225 Difference]: With dead ends: 56 [2018-01-21 08:46:40,357 INFO L226 Difference]: Without dead ends: 47 [2018-01-21 08:46:40,357 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 211 GetRequests, 147 SyntacticMatches, 2 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 171 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=1927, Invalid=2105, Unknown=0, NotChecked=0, Total=4032 [2018-01-21 08:46:40,357 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-01-21 08:46:40,359 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2018-01-21 08:46:40,359 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-01-21 08:46:40,359 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 47 transitions. [2018-01-21 08:46:40,359 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 47 transitions. Word has length 45 [2018-01-21 08:46:40,359 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:40,359 INFO L432 AbstractCegarLoop]: Abstraction has 47 states and 47 transitions. [2018-01-21 08:46:40,359 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-01-21 08:46:40,359 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 47 transitions. [2018-01-21 08:46:40,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-21 08:46:40,360 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:40,360 INFO L322 BasicCegarLoop]: trace histogram [29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:40,360 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:40,360 INFO L82 PathProgramCache]: Analyzing trace with hash 801364363, now seen corresponding path program 29 times [2018-01-21 08:46:40,360 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:40,361 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:40,361 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:40,361 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:40,361 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:40,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:40,369 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:40,691 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:40,691 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:40,692 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:40,692 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:40,692 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:40,692 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:40,692 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:40,697 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:46:40,697 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:40,701 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:40,702 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:40,703 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:40,704 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:40,704 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:40,705 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:40,706 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:40,707 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:40,708 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:40,708 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:40,709 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:40,710 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:40,711 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:40,712 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:40,713 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:40,716 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:40,718 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:40,719 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:40,728 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:40,729 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:41,903 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:41,922 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:41,922 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:41,926 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:46:41,926 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:41,931 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:41,933 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:41,939 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:41,944 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:41,950 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:41,957 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:41,965 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:41,973 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:41,982 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:41,991 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:42,000 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:42,007 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:42,015 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:42,023 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:42,032 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:42,046 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:42,057 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:42,062 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:42,071 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:42,071 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:42,358 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:42,359 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:42,359 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 33] total 65 [2018-01-21 08:46:42,359 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:42,360 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-01-21 08:46:42,360 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-01-21 08:46:42,360 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2018, Invalid=2142, Unknown=0, NotChecked=0, Total=4160 [2018-01-21 08:46:42,360 INFO L87 Difference]: Start difference. First operand 47 states and 47 transitions. Second operand 34 states. [2018-01-21 08:46:42,405 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:42,405 INFO L93 Difference]: Finished difference Result 57 states and 57 transitions. [2018-01-21 08:46:42,406 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-21 08:46:42,406 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 46 [2018-01-21 08:46:42,406 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:42,406 INFO L225 Difference]: With dead ends: 57 [2018-01-21 08:46:42,406 INFO L226 Difference]: Without dead ends: 48 [2018-01-21 08:46:42,407 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 216 GetRequests, 150 SyntacticMatches, 2 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 177 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=2053, Invalid=2237, Unknown=0, NotChecked=0, Total=4290 [2018-01-21 08:46:42,407 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-01-21 08:46:42,408 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-01-21 08:46:42,408 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-21 08:46:42,409 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-01-21 08:46:42,409 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 46 [2018-01-21 08:46:42,409 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:42,409 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-01-21 08:46:42,409 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-01-21 08:46:42,409 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-01-21 08:46:42,409 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-21 08:46:42,410 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:42,410 INFO L322 BasicCegarLoop]: trace histogram [30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:42,410 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:42,410 INFO L82 PathProgramCache]: Analyzing trace with hash 1965483632, now seen corresponding path program 30 times [2018-01-21 08:46:42,410 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:42,410 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:42,410 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:42,411 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:42,411 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:42,418 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:42,418 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:42,778 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:42,778 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:42,778 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:42,778 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:42,778 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:42,778 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:42,778 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:42,783 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:46:42,783 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:46:42,789 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:42,791 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:42,792 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:42,793 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:42,794 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:42,795 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:42,796 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:42,797 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:42,798 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:42,799 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:42,800 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:42,801 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:42,802 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:42,803 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:42,805 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:42,806 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:42,806 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:42,808 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:42,817 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:42,817 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:44,059 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:44,078 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:44,079 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:44,082 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:46:44,082 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:46:44,092 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:44,099 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:44,106 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:44,114 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:44,123 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:44,132 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:44,141 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:44,151 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:44,161 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:44,172 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:44,183 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:44,194 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:44,207 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:44,219 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:44,232 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:44,246 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:44,256 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:44,260 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:44,266 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:44,266 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:44,528 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:44,529 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:44,530 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 34] total 67 [2018-01-21 08:46:44,530 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:44,530 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-01-21 08:46:44,531 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-01-21 08:46:44,531 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2147, Invalid=2275, Unknown=0, NotChecked=0, Total=4422 [2018-01-21 08:46:44,531 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 35 states. [2018-01-21 08:46:44,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:44,580 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2018-01-21 08:46:44,580 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-21 08:46:44,581 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 47 [2018-01-21 08:46:44,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:44,581 INFO L225 Difference]: With dead ends: 58 [2018-01-21 08:46:44,581 INFO L226 Difference]: Without dead ends: 49 [2018-01-21 08:46:44,581 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 221 GetRequests, 153 SyntacticMatches, 2 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 183 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=2183, Invalid=2373, Unknown=0, NotChecked=0, Total=4556 [2018-01-21 08:46:44,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-01-21 08:46:44,583 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2018-01-21 08:46:44,583 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-01-21 08:46:44,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 49 transitions. [2018-01-21 08:46:44,583 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 49 transitions. Word has length 47 [2018-01-21 08:46:44,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:44,584 INFO L432 AbstractCegarLoop]: Abstraction has 49 states and 49 transitions. [2018-01-21 08:46:44,584 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-01-21 08:46:44,584 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 49 transitions. [2018-01-21 08:46:44,584 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-21 08:46:44,584 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:44,584 INFO L322 BasicCegarLoop]: trace histogram [31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:44,584 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:44,585 INFO L82 PathProgramCache]: Analyzing trace with hash -601524693, now seen corresponding path program 31 times [2018-01-21 08:46:44,585 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:44,585 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:44,586 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:44,586 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:44,586 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:44,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:44,595 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:44,925 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:44,925 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:44,925 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:44,926 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:44,926 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:44,926 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:44,926 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:44,931 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:44,931 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:46:44,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:44,945 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:44,960 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:44,960 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:46,382 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:46,402 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:46,402 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:46,405 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:46,405 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:46:46,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:46,437 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:46,443 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:46,444 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:46,707 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:46,708 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:46,708 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 69 [2018-01-21 08:46:46,708 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:46,708 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-21 08:46:46,709 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-21 08:46:46,709 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2280, Invalid=2412, Unknown=0, NotChecked=0, Total=4692 [2018-01-21 08:46:46,709 INFO L87 Difference]: Start difference. First operand 49 states and 49 transitions. Second operand 36 states. [2018-01-21 08:46:46,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:46,755 INFO L93 Difference]: Finished difference Result 59 states and 59 transitions. [2018-01-21 08:46:46,756 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-21 08:46:46,756 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 48 [2018-01-21 08:46:46,756 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:46,756 INFO L225 Difference]: With dead ends: 59 [2018-01-21 08:46:46,756 INFO L226 Difference]: Without dead ends: 50 [2018-01-21 08:46:46,757 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 226 GetRequests, 156 SyntacticMatches, 2 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 189 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=2317, Invalid=2513, Unknown=0, NotChecked=0, Total=4830 [2018-01-21 08:46:46,758 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-01-21 08:46:46,760 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2018-01-21 08:46:46,760 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-01-21 08:46:46,760 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 50 transitions. [2018-01-21 08:46:46,761 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 50 transitions. Word has length 48 [2018-01-21 08:46:46,761 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:46,761 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 50 transitions. [2018-01-21 08:46:46,761 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-21 08:46:46,761 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 50 transitions. [2018-01-21 08:46:46,761 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-01-21 08:46:46,761 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:46,761 INFO L322 BasicCegarLoop]: trace histogram [32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:46,761 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:46,762 INFO L82 PathProgramCache]: Analyzing trace with hash 1425595856, now seen corresponding path program 32 times [2018-01-21 08:46:46,762 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:46,762 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:46,762 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:46:46,762 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:46,762 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:46,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:46,772 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:47,159 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:47,160 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:47,160 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:47,160 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:47,160 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:47,160 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:47,160 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:47,165 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:46:47,165 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:47,172 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:47,178 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:47,180 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:47,182 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:47,192 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:47,192 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:48,592 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:48,612 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:48,612 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:48,615 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:46:48,616 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:48,625 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:48,640 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:48,654 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:48,663 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:48,670 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:48,670 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:48,954 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:48,955 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:48,955 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 36, 36, 36] total 71 [2018-01-21 08:46:48,955 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:48,955 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-01-21 08:46:48,956 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-01-21 08:46:48,956 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2417, Invalid=2553, Unknown=0, NotChecked=0, Total=4970 [2018-01-21 08:46:48,956 INFO L87 Difference]: Start difference. First operand 50 states and 50 transitions. Second operand 37 states. [2018-01-21 08:46:49,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:49,013 INFO L93 Difference]: Finished difference Result 60 states and 60 transitions. [2018-01-21 08:46:49,014 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-01-21 08:46:49,014 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 49 [2018-01-21 08:46:49,014 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:49,014 INFO L225 Difference]: With dead ends: 60 [2018-01-21 08:46:49,014 INFO L226 Difference]: Without dead ends: 51 [2018-01-21 08:46:49,015 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 231 GetRequests, 159 SyntacticMatches, 2 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 195 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2455, Invalid=2657, Unknown=0, NotChecked=0, Total=5112 [2018-01-21 08:46:49,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-01-21 08:46:49,016 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2018-01-21 08:46:49,016 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-01-21 08:46:49,017 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 51 transitions. [2018-01-21 08:46:49,017 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 51 transitions. Word has length 49 [2018-01-21 08:46:49,017 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:49,017 INFO L432 AbstractCegarLoop]: Abstraction has 51 states and 51 transitions. [2018-01-21 08:46:49,017 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-01-21 08:46:49,017 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 51 transitions. [2018-01-21 08:46:49,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-21 08:46:49,018 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:49,018 INFO L322 BasicCegarLoop]: trace histogram [33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:49,018 INFO L371 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:49,018 INFO L82 PathProgramCache]: Analyzing trace with hash -158176565, now seen corresponding path program 33 times [2018-01-21 08:46:49,018 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:49,019 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:49,019 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:49,019 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:49,019 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:49,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:49,026 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:49,432 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:49,432 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:49,432 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:49,432 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:49,432 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:49,433 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:49,433 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:49,437 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:46:49,438 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:46:49,444 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:49,446 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:49,447 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:49,448 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:49,449 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:49,451 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:49,452 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:49,453 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:49,454 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:49,455 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:49,456 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:49,458 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:49,459 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:49,460 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:49,461 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:49,463 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:49,464 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:49,465 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:49,466 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:49,467 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:49,478 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:49,479 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:50,972 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:50,993 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:50,993 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:50,996 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 08:46:50,996 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 08:46:51,006 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:51,013 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:51,021 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:51,029 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:51,038 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:51,047 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:51,057 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:51,067 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:51,078 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:51,089 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:51,101 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:51,113 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:51,126 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:51,138 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:51,152 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:51,166 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:51,181 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:51,195 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 08:46:51,206 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:51,210 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:51,217 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:51,217 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:51,523 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:51,525 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:51,525 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 73 [2018-01-21 08:46:51,525 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:51,525 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-21 08:46:51,525 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-21 08:46:51,526 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2558, Invalid=2698, Unknown=0, NotChecked=0, Total=5256 [2018-01-21 08:46:51,526 INFO L87 Difference]: Start difference. First operand 51 states and 51 transitions. Second operand 38 states. [2018-01-21 08:46:51,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:51,575 INFO L93 Difference]: Finished difference Result 61 states and 61 transitions. [2018-01-21 08:46:51,575 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-01-21 08:46:51,575 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 50 [2018-01-21 08:46:51,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:51,575 INFO L225 Difference]: With dead ends: 61 [2018-01-21 08:46:51,575 INFO L226 Difference]: Without dead ends: 52 [2018-01-21 08:46:51,576 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 236 GetRequests, 162 SyntacticMatches, 2 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 201 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2597, Invalid=2805, Unknown=0, NotChecked=0, Total=5402 [2018-01-21 08:46:51,576 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-01-21 08:46:51,577 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-01-21 08:46:51,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-01-21 08:46:51,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 52 transitions. [2018-01-21 08:46:51,578 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 52 transitions. Word has length 50 [2018-01-21 08:46:51,578 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:51,578 INFO L432 AbstractCegarLoop]: Abstraction has 52 states and 52 transitions. [2018-01-21 08:46:51,578 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-21 08:46:51,578 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 52 transitions. [2018-01-21 08:46:51,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-21 08:46:51,579 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:51,579 INFO L322 BasicCegarLoop]: trace histogram [34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:51,579 INFO L371 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:51,579 INFO L82 PathProgramCache]: Analyzing trace with hash -2010481360, now seen corresponding path program 34 times [2018-01-21 08:46:51,579 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:51,580 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:51,580 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:51,580 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:51,580 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:51,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:51,586 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:52,179 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:52,180 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:52,180 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:52,180 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:52,180 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:52,180 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:52,180 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:52,189 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:46:52,190 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:46:52,210 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:52,212 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:52,223 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:52,223 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:53,827 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:53,848 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:53,848 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:53,852 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 08:46:53,852 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 08:46:53,894 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:53,898 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:53,905 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:53,905 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:54,214 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:54,215 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:54,215 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 75 [2018-01-21 08:46:54,215 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:54,216 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-01-21 08:46:54,216 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-01-21 08:46:54,216 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2703, Invalid=2847, Unknown=0, NotChecked=0, Total=5550 [2018-01-21 08:46:54,216 INFO L87 Difference]: Start difference. First operand 52 states and 52 transitions. Second operand 39 states. [2018-01-21 08:46:54,271 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:54,271 INFO L93 Difference]: Finished difference Result 62 states and 62 transitions. [2018-01-21 08:46:54,272 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-01-21 08:46:54,272 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 51 [2018-01-21 08:46:54,272 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:54,272 INFO L225 Difference]: With dead ends: 62 [2018-01-21 08:46:54,272 INFO L226 Difference]: Without dead ends: 53 [2018-01-21 08:46:54,273 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 241 GetRequests, 165 SyntacticMatches, 2 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 207 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=2743, Invalid=2957, Unknown=0, NotChecked=0, Total=5700 [2018-01-21 08:46:54,273 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-01-21 08:46:54,274 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-01-21 08:46:54,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-01-21 08:46:54,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 53 transitions. [2018-01-21 08:46:54,275 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 53 transitions. Word has length 51 [2018-01-21 08:46:54,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:54,275 INFO L432 AbstractCegarLoop]: Abstraction has 53 states and 53 transitions. [2018-01-21 08:46:54,275 INFO L433 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-01-21 08:46:54,275 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 53 transitions. [2018-01-21 08:46:54,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-21 08:46:54,276 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:54,276 INFO L322 BasicCegarLoop]: trace histogram [35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:54,276 INFO L371 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:54,276 INFO L82 PathProgramCache]: Analyzing trace with hash 697612139, now seen corresponding path program 35 times [2018-01-21 08:46:54,276 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:54,277 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:54,277 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:54,277 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:54,277 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:54,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:54,284 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:55,074 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:55,074 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:55,113 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:55,113 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:55,113 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:55,113 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:55,113 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:55,118 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:46:55,118 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:55,123 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:55,124 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:55,125 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:55,125 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:55,126 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:55,127 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:55,128 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:55,129 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:55,130 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:55,130 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:55,131 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:55,132 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:55,133 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:55,134 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:55,135 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:55,136 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:55,137 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:55,138 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:55,142 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:55,143 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:55,145 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:55,160 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:55,160 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:56,807 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:56,827 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:56,827 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:56,830 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 08:46:56,830 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:46:56,835 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:56,837 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:56,840 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:56,844 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:56,848 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:56,852 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:56,857 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:56,862 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:56,868 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:56,874 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:56,881 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:56,888 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:56,896 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:56,904 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:56,913 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:56,922 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:56,932 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:56,942 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:56,957 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:46:56,969 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:56,973 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:56,979 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:56,980 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:57,290 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:57,291 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:46:57,291 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39, 39, 39, 39] total 77 [2018-01-21 08:46:57,291 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:46:57,291 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-21 08:46:57,291 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-21 08:46:57,292 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2852, Invalid=3000, Unknown=0, NotChecked=0, Total=5852 [2018-01-21 08:46:57,292 INFO L87 Difference]: Start difference. First operand 53 states and 53 transitions. Second operand 40 states. [2018-01-21 08:46:57,336 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:46:57,336 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-01-21 08:46:57,336 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-01-21 08:46:57,336 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 52 [2018-01-21 08:46:57,337 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:46:57,337 INFO L225 Difference]: With dead ends: 63 [2018-01-21 08:46:57,337 INFO L226 Difference]: Without dead ends: 54 [2018-01-21 08:46:57,338 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 246 GetRequests, 168 SyntacticMatches, 2 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 213 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=2893, Invalid=3113, Unknown=0, NotChecked=0, Total=6006 [2018-01-21 08:46:57,338 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-01-21 08:46:57,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-01-21 08:46:57,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-01-21 08:46:57,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 54 transitions. [2018-01-21 08:46:57,341 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 54 transitions. Word has length 52 [2018-01-21 08:46:57,341 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:46:57,341 INFO L432 AbstractCegarLoop]: Abstraction has 54 states and 54 transitions. [2018-01-21 08:46:57,341 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-21 08:46:57,341 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 54 transitions. [2018-01-21 08:46:57,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-01-21 08:46:57,342 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:46:57,342 INFO L322 BasicCegarLoop]: trace histogram [36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:46:57,342 INFO L371 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:46:57,342 INFO L82 PathProgramCache]: Analyzing trace with hash -1250835312, now seen corresponding path program 36 times [2018-01-21 08:46:57,342 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:46:57,343 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:57,343 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:46:57,343 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:46:57,343 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:46:57,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:46:57,352 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:46:57,751 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:57,751 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:57,751 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:46:57,751 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:46:57,751 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:46:57,751 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:57,751 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:46:57,756 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:46:57,756 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:46:57,762 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:57,764 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:57,765 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:57,766 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:57,767 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:57,768 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:57,769 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:57,770 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:57,771 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:57,772 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:57,773 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:57,774 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:57,775 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:57,776 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:57,778 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:57,779 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:57,780 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:57,781 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:57,783 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:57,783 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:57,785 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:57,795 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:57,795 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:46:59,469 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:59,489 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:46:59,489 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:46:59,492 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 08:46:59,492 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 08:46:59,504 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:59,514 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:59,526 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:59,536 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:59,544 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:59,554 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:59,563 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:59,573 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:59,583 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:59,594 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:59,605 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:59,616 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:59,628 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:59,642 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:59,655 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:59,669 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:59,682 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:59,696 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:59,711 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 08:46:59,723 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:46:59,727 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:46:59,735 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:46:59,735 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:47:00,051 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:47:00,052 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:47:00,052 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40, 40, 40, 40] total 79 [2018-01-21 08:47:00,052 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:47:00,053 INFO L409 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-01-21 08:47:00,053 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-01-21 08:47:00,053 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3005, Invalid=3157, Unknown=0, NotChecked=0, Total=6162 [2018-01-21 08:47:00,053 INFO L87 Difference]: Start difference. First operand 54 states and 54 transitions. Second operand 41 states. [2018-01-21 08:47:00,098 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:47:00,098 INFO L93 Difference]: Finished difference Result 64 states and 64 transitions. [2018-01-21 08:47:00,132 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-01-21 08:47:00,132 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 53 [2018-01-21 08:47:00,132 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:47:00,132 INFO L225 Difference]: With dead ends: 64 [2018-01-21 08:47:00,133 INFO L226 Difference]: Without dead ends: 55 [2018-01-21 08:47:00,133 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 251 GetRequests, 171 SyntacticMatches, 2 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 219 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=3047, Invalid=3273, Unknown=0, NotChecked=0, Total=6320 [2018-01-21 08:47:00,133 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-01-21 08:47:00,135 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2018-01-21 08:47:00,135 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-01-21 08:47:00,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 55 transitions. [2018-01-21 08:47:00,135 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 55 transitions. Word has length 53 [2018-01-21 08:47:00,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:47:00,135 INFO L432 AbstractCegarLoop]: Abstraction has 55 states and 55 transitions. [2018-01-21 08:47:00,135 INFO L433 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-01-21 08:47:00,136 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 55 transitions. [2018-01-21 08:47:00,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-01-21 08:47:00,136 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:47:00,136 INFO L322 BasicCegarLoop]: trace histogram [37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:47:00,136 INFO L371 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:47:00,136 INFO L82 PathProgramCache]: Analyzing trace with hash -1523164149, now seen corresponding path program 37 times [2018-01-21 08:47:00,136 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:47:00,137 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:47:00,137 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 08:47:00,137 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:47:00,137 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:47:00,143 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:47:00,144 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:47:00,572 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:47:00,572 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:47:00,572 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:47:00,572 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:47:00,572 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:47:00,573 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:47:00,573 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:47:00,579 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:47:00,580 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:47:00,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:47:00,600 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:47:00,611 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:47:00,611 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:47:02,376 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:47:02,396 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:47:02,396 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 75 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 08:47:02,400 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:47:02,400 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 08:47:02,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:47:02,435 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:47:02,442 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:47:02,443 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 08:47:02,791 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:47:02,792 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 08:47:02,792 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41, 41, 41, 41] total 81 [2018-01-21 08:47:02,792 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 08:47:02,792 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-01-21 08:47:02,792 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-01-21 08:47:02,792 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3162, Invalid=3318, Unknown=0, NotChecked=0, Total=6480 [2018-01-21 08:47:02,793 INFO L87 Difference]: Start difference. First operand 55 states and 55 transitions. Second operand 42 states. [2018-01-21 08:47:02,843 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 08:47:02,844 INFO L93 Difference]: Finished difference Result 65 states and 65 transitions. [2018-01-21 08:47:02,844 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-01-21 08:47:02,844 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 54 [2018-01-21 08:47:02,844 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 08:47:02,844 INFO L225 Difference]: With dead ends: 65 [2018-01-21 08:47:02,844 INFO L226 Difference]: Without dead ends: 56 [2018-01-21 08:47:02,845 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 256 GetRequests, 174 SyntacticMatches, 2 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 225 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=3205, Invalid=3437, Unknown=0, NotChecked=0, Total=6642 [2018-01-21 08:47:02,845 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2018-01-21 08:47:02,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 56. [2018-01-21 08:47:02,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-01-21 08:47:02,847 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 56 transitions. [2018-01-21 08:47:02,847 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 56 transitions. Word has length 54 [2018-01-21 08:47:02,847 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 08:47:02,847 INFO L432 AbstractCegarLoop]: Abstraction has 56 states and 56 transitions. [2018-01-21 08:47:02,847 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-01-21 08:47:02,847 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 56 transitions. [2018-01-21 08:47:02,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-01-21 08:47:02,847 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 08:47:02,848 INFO L322 BasicCegarLoop]: trace histogram [38, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 08:47:02,848 INFO L371 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 08:47:02,848 INFO L82 PathProgramCache]: Analyzing trace with hash -1375423504, now seen corresponding path program 38 times [2018-01-21 08:47:02,848 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 08:47:02,848 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:47:02,848 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 08:47:02,848 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 08:47:02,849 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 08:47:02,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 08:47:02,857 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 08:47:03,356 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:47:03,356 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:47:03,356 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 08:47:03,356 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 08:47:03,357 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 08:47:03,357 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 08:47:03,357 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 08:47:03,361 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 08:47:03,361 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 08:47:03,369 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:47:03,376 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 08:47:03,378 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 08:47:03,380 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 08:47:03,390 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 08:47:03,390 INFO L314 TraceCheckSpWp]: Computing backward predicates... Received shutdown request... [2018-01-21 08:47:04,524 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-21 08:47:04,524 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 08:47:04,526 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 08:47:04,526 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 08:47:04,526 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 08:47:04,526 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 08:47:04,526 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 08:47:04,526 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 08:47:04,526 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 08:47:04,527 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == mainErr0EnsuresViolation======== [2018-01-21 08:47:04,527 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 08:47:04,527 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 08:47:04,527 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 08:47:04,528 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 21.01 08:47:04 BoogieIcfgContainer [2018-01-21 08:47:04,528 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-21 08:47:04,529 INFO L168 Benchmark]: Toolchain (without parser) took 53900.08 ms. Allocated memory was 305.7 MB in the beginning and 828.4 MB in the end (delta: 522.7 MB). Free memory was 265.0 MB in the beginning and 612.9 MB in the end (delta: -347.9 MB). Peak memory consumption was 174.8 MB. Max. memory is 5.3 GB. [2018-01-21 08:47:04,530 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 305.7 MB. Free memory is still 270.0 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-21 08:47:04,530 INFO L168 Benchmark]: CACSL2BoogieTranslator took 170.91 ms. Allocated memory is still 305.7 MB. Free memory was 264.0 MB in the beginning and 257.0 MB in the end (delta: 7.0 MB). Peak memory consumption was 7.0 MB. Max. memory is 5.3 GB. [2018-01-21 08:47:04,530 INFO L168 Benchmark]: Boogie Preprocessor took 27.30 ms. Allocated memory is still 305.7 MB. Free memory was 257.0 MB in the beginning and 255.0 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-21 08:47:04,531 INFO L168 Benchmark]: RCFGBuilder took 170.88 ms. Allocated memory is still 305.7 MB. Free memory was 255.0 MB in the beginning and 243.4 MB in the end (delta: 11.6 MB). Peak memory consumption was 11.6 MB. Max. memory is 5.3 GB. [2018-01-21 08:47:04,531 INFO L168 Benchmark]: TraceAbstraction took 53524.07 ms. Allocated memory was 305.7 MB in the beginning and 828.4 MB in the end (delta: 522.7 MB). Free memory was 242.4 MB in the beginning and 612.9 MB in the end (delta: -370.5 MB). Peak memory consumption was 152.2 MB. Max. memory is 5.3 GB. [2018-01-21 08:47:04,532 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 305.7 MB. Free memory is still 270.0 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 170.91 ms. Allocated memory is still 305.7 MB. Free memory was 264.0 MB in the beginning and 257.0 MB in the end (delta: 7.0 MB). Peak memory consumption was 7.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 27.30 ms. Allocated memory is still 305.7 MB. Free memory was 257.0 MB in the beginning and 255.0 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 170.88 ms. Allocated memory is still 305.7 MB. Free memory was 255.0 MB in the beginning and 243.4 MB in the end (delta: 11.6 MB). Peak memory consumption was 11.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 53524.07 ms. Allocated memory was 305.7 MB in the beginning and 828.4 MB in the end (delta: 522.7 MB). Free memory was 242.4 MB in the beginning and 612.9 MB in the end (delta: -370.5 MB). Peak memory consumption was 152.2 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 17 LocStat_MAX_WEQGRAPH_SIZE : 2 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 102 LocStat_NO_SUPPORTING_DISEQUALITIES : 23 LocStat_NO_DISJUNCTIONS : -34 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 24 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 33 TransStat_NO_SUPPORTING_DISEQUALITIES : 5 TransStat_NO_DISJUNCTIONS : 24 TransStat_MAX_NO_DISJUNCTIONS : 1 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.202988 RENAME_VARIABLES(MILLISECONDS) : 0.096620 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.150420 PROJECTAWAY(MILLISECONDS) : 0.110791 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.186718 DISJOIN(MILLISECONDS) : 0.000000 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.135363 ADD_EQUALITY(MILLISECONDS) : 0.035033 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.015079 #CONJOIN_DISJUNCTIVE : 32 #RENAME_VARIABLES : 62 #UNFREEZE : 0 #CONJOIN : 62 #PROJECTAWAY : 64 #ADD_WEAK_EQUALITY : 4 #DISJOIN : 0 #RENAME_VARIABLES_DISJUNCTIVE : 62 #ADD_EQUALITY : 33 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1]: not all allocated memory was freed not all allocated memory was freed We found a FailurePath: - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.initErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. UNSAFE Result, 0.1s OverallTime, 1 OverallIterations, 1 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 3 NumberOfCodeBlocks, 3 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1). Cancelled while BasicCegarLoop was analyzing trace of length 56 with TraceHistMax 38, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 65 known predicates. - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.startErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 53.3s OverallTime, 39 OverallIterations, 38 TraceHistogramMax, 1.8s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 611 SDtfs, 76 SDslu, 10221 SDs, 0 SdLazy, 1585 SolverSat, 47 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 6147 GetRequests, 4442 SyntacticMatches, 74 SemanticMatches, 1631 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4328 ImplicationChecksByTransitivity, 29.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=56occurred in iteration=38, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.6s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 38 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 3.1s SatisfiabilityAnalysisTime, 44.0s InterpolantComputationTime, 4013 NumberOfCodeBlocks, 4013 NumberOfCodeBlocksAsserted, 502 NumberOfCheckSat, 6491 ConstructedInterpolants, 0 QuantifiedInterpolants, 931383 SizeOfPredicates, 74 NumberOfNonLiveVariables, 8732 ConjunctsInSsa, 1628 ConjunctsInUnsatCore, 186 InterpolantComputations, 1 PerfectInterpolantSequences, 0/45695 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 25]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 25). Cancelled while IsEmpty was searching accepting run (input had 21 states). - StatisticsResult: Ultimate Automizer benchmark data for error location: mainErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 0.0s OverallTime, 0 OverallIterations, 0 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-21_08-47-04-539.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-21_08-47-04-539.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-21_08-47-04-539.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-21_08-47-04-539.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-1-2018-01-21_08-47-04-539.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-2-2018-01-21_08-47-04-539.csv Completed graceful shutdown