java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memset2_true-valid-memsafety_true-termination.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-2f49842 [2018-01-21 10:36:26,207 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-21 10:36:26,209 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-21 10:36:26,224 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-21 10:36:26,225 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-21 10:36:26,226 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-21 10:36:26,227 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-21 10:36:26,228 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-21 10:36:26,231 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-21 10:36:26,231 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-21 10:36:26,232 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-21 10:36:26,232 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-21 10:36:26,233 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-21 10:36:26,235 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-21 10:36:26,235 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-21 10:36:26,238 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-21 10:36:26,240 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-21 10:36:26,242 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-21 10:36:26,243 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-21 10:36:26,244 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-21 10:36:26,247 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-01-21 10:36:26,251 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-21 10:36:26,252 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-21 10:36:26,252 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf [2018-01-21 10:36:26,261 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-21 10:36:26,262 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-21 10:36:26,262 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-21 10:36:26,262 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-21 10:36:26,263 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-21 10:36:26,263 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-21 10:36:26,263 INFO L133 SettingsManager]: * Precise comparison operator=true [2018-01-21 10:36:26,263 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-21 10:36:26,264 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-21 10:36:26,264 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-21 10:36:26,264 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-21 10:36:26,264 INFO L133 SettingsManager]: * Check allocation purity=true [2018-01-21 10:36:26,264 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-21 10:36:26,265 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-21 10:36:26,265 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-21 10:36:26,265 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-01-21 10:36:26,265 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-21 10:36:26,265 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-01-21 10:36:26,265 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-21 10:36:26,266 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-01-21 10:36:26,266 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-01-21 10:36:26,266 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-21 10:36:26,266 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-21 10:36:26,266 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-21 10:36:26,267 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-21 10:36:26,267 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-21 10:36:26,267 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 10:36:26,267 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-21 10:36:26,267 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-21 10:36:26,268 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-21 10:36:26,268 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-21 10:36:26,268 INFO L133 SettingsManager]: * Stop after first violation was found=false [2018-01-21 10:36:26,268 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-21 10:36:26,268 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-21 10:36:26,268 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-21 10:36:26,269 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-21 10:36:26,269 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-21 10:36:26,270 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-21 10:36:26,270 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-21 10:36:26,302 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-21 10:36:26,314 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-21 10:36:26,318 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-21 10:36:26,320 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-21 10:36:26,321 INFO L276 PluginConnector]: CDTParser initialized [2018-01-21 10:36:26,322 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memset2_true-valid-memsafety_true-termination.c [2018-01-21 10:36:26,460 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-21 10:36:26,465 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-21 10:36:26,465 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-21 10:36:26,466 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-21 10:36:26,470 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-21 10:36:26,471 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 10:36:26" (1/1) ... [2018-01-21 10:36:26,474 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@47d05f2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:36:26, skipping insertion in model container [2018-01-21 10:36:26,474 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 10:36:26" (1/1) ... [2018-01-21 10:36:26,487 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 10:36:26,500 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 10:36:26,607 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 10:36:26,622 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 10:36:26,627 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:36:26 WrapperNode [2018-01-21 10:36:26,627 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-21 10:36:26,628 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-21 10:36:26,628 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-21 10:36:26,628 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-21 10:36:26,640 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:36:26" (1/1) ... [2018-01-21 10:36:26,640 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:36:26" (1/1) ... [2018-01-21 10:36:26,648 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:36:26" (1/1) ... [2018-01-21 10:36:26,648 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:36:26" (1/1) ... [2018-01-21 10:36:26,651 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:36:26" (1/1) ... [2018-01-21 10:36:26,654 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:36:26" (1/1) ... [2018-01-21 10:36:26,654 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:36:26" (1/1) ... [2018-01-21 10:36:26,656 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-21 10:36:26,657 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-21 10:36:26,657 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-21 10:36:26,657 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-21 10:36:26,658 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:36:26" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 10:36:26,709 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-21 10:36:26,709 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-21 10:36:26,710 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-21 10:36:26,710 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-21 10:36:26,710 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-21 10:36:26,710 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-21 10:36:26,710 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-21 10:36:26,710 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-21 10:36:26,710 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-21 10:36:26,710 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-21 10:36:26,710 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-21 10:36:26,711 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-21 10:36:26,828 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-21 10:36:26,829 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 10:36:26 BoogieIcfgContainer [2018-01-21 10:36:26,829 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-21 10:36:26,830 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-21 10:36:26,830 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-21 10:36:26,832 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-21 10:36:26,832 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 21.01 10:36:26" (1/3) ... [2018-01-21 10:36:26,833 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@145e9556 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 10:36:26, skipping insertion in model container [2018-01-21 10:36:26,833 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:36:26" (2/3) ... [2018-01-21 10:36:26,833 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@145e9556 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 10:36:26, skipping insertion in model container [2018-01-21 10:36:26,833 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 10:36:26" (3/3) ... [2018-01-21 10:36:26,835 INFO L105 eAbstractionObserver]: Analyzing ICFG memset2_true-valid-memsafety_true-termination.c [2018-01-21 10:36:26,842 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-21 10:36:26,848 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-01-21 10:36:26,886 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 10:36:26,886 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 10:36:26,887 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 10:36:26,887 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 10:36:26,887 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 10:36:26,887 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 10:36:26,887 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 10:36:26,887 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.initErr0EnsuresViolation======== [2018-01-21 10:36:26,888 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 10:36:26,909 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 10:36:26,917 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-01-21 10:36:26,917 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:26,918 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-01-21 10:36:26,919 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.initErr0EnsuresViolation]=== [2018-01-21 10:36:26,924 INFO L82 PathProgramCache]: Analyzing trace with hash 50935, now seen corresponding path program 1 times [2018-01-21 10:36:26,927 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:26,982 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:26,982 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:26,983 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:26,983 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:27,015 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 10:36:27,022 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 10:36:27,039 INFO L381 BasicCegarLoop]: Counterexample might be feasible [2018-01-21 10:36:27,044 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-21 10:36:27,051 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 10:36:27,051 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 10:36:27,051 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 10:36:27,051 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 10:36:27,051 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 10:36:27,051 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 10:36:27,051 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 10:36:27,051 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.startErr0EnsuresViolation======== [2018-01-21 10:36:27,052 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 10:36:27,053 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 10:36:27,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-21 10:36:27,053 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:27,053 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:27,053 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:27,054 INFO L82 PathProgramCache]: Analyzing trace with hash 457189328, now seen corresponding path program 1 times [2018-01-21 10:36:27,054 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:27,055 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:27,055 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:27,055 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:27,055 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:27,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:27,083 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:27,169 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:27,171 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 10:36:27,171 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-21 10:36:27,172 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 10:36:27,174 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-21 10:36:27,188 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-21 10:36:27,189 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-21 10:36:27,191 INFO L87 Difference]: Start difference. First operand 21 states. Second operand 4 states. [2018-01-21 10:36:27,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:27,243 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 10:36:27,244 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-21 10:36:27,246 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 17 [2018-01-21 10:36:27,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:27,257 INFO L225 Difference]: With dead ends: 33 [2018-01-21 10:36:27,257 INFO L226 Difference]: Without dead ends: 19 [2018-01-21 10:36:27,323 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-21 10:36:27,341 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-01-21 10:36:27,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2018-01-21 10:36:27,354 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-01-21 10:36:27,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 19 transitions. [2018-01-21 10:36:27,356 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 19 transitions. Word has length 17 [2018-01-21 10:36:27,357 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:27,357 INFO L432 AbstractCegarLoop]: Abstraction has 19 states and 19 transitions. [2018-01-21 10:36:27,357 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-21 10:36:27,357 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 19 transitions. [2018-01-21 10:36:27,358 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-01-21 10:36:27,358 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:27,358 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:27,359 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:27,359 INFO L82 PathProgramCache]: Analyzing trace with hash -114007861, now seen corresponding path program 1 times [2018-01-21 10:36:27,359 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:27,360 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:27,360 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:27,361 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:27,361 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:27,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:27,377 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:27,451 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:27,451 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:27,451 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:27,452 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 19 with the following transitions: [2018-01-21 10:36:27,454 INFO L201 CegarAbsIntRunner]: [0], [1], [3], [7], [9], [10], [14], [15], [17], [18], [19], [20], [22], [23], [24], [25], [26], [27] [2018-01-21 10:36:27,499 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-21 10:36:27,500 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-21 10:36:27,761 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-21 10:36:27,763 INFO L268 AbstractInterpreter]: Visited 18 different actions 22 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 15 variables. [2018-01-21 10:36:27,778 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-21 10:36:27,778 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:27,778 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:27,803 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:27,803 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:36:27,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:27,836 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:27,911 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:27,911 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:28,053 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:28,079 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:28,079 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:28,084 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:28,084 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:36:28,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:28,109 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:28,115 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:28,115 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:28,238 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:28,241 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:28,242 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 11 [2018-01-21 10:36:28,242 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:28,243 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-21 10:36:28,243 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-21 10:36:28,244 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-01-21 10:36:28,244 INFO L87 Difference]: Start difference. First operand 19 states and 19 transitions. Second operand 8 states. [2018-01-21 10:36:28,269 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:28,270 INFO L93 Difference]: Finished difference Result 29 states and 29 transitions. [2018-01-21 10:36:28,270 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-21 10:36:28,270 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 18 [2018-01-21 10:36:28,271 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:28,271 INFO L225 Difference]: With dead ends: 29 [2018-01-21 10:36:28,271 INFO L226 Difference]: Without dead ends: 20 [2018-01-21 10:36:28,273 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 64 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=81, Unknown=0, NotChecked=0, Total=132 [2018-01-21 10:36:28,273 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-01-21 10:36:28,276 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-01-21 10:36:28,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-01-21 10:36:28,277 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2018-01-21 10:36:28,277 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 18 [2018-01-21 10:36:28,277 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:28,277 INFO L432 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2018-01-21 10:36:28,277 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-21 10:36:28,277 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-01-21 10:36:28,278 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-21 10:36:28,278 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:28,278 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:28,278 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:28,278 INFO L82 PathProgramCache]: Analyzing trace with hash -641251536, now seen corresponding path program 2 times [2018-01-21 10:36:28,279 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:28,279 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:28,280 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:28,280 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:28,280 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:28,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:28,295 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:28,360 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:28,360 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:28,360 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:28,360 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:28,361 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:28,361 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:28,361 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:28,374 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:36:28,374 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:28,391 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:28,394 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:28,395 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:28,397 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:28,449 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:28,449 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:28,595 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:28,617 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:28,617 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:28,620 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:36:28,621 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:28,637 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:28,649 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:28,658 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:28,663 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:28,668 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:28,669 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:28,759 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:28,760 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:28,761 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 14 [2018-01-21 10:36:28,761 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:28,761 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-21 10:36:28,762 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-21 10:36:28,762 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=113, Unknown=0, NotChecked=0, Total=182 [2018-01-21 10:36:28,762 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand 10 states. [2018-01-21 10:36:28,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:28,813 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-01-21 10:36:28,814 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-21 10:36:28,814 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 19 [2018-01-21 10:36:28,815 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:28,815 INFO L225 Difference]: With dead ends: 30 [2018-01-21 10:36:28,815 INFO L226 Difference]: Without dead ends: 21 [2018-01-21 10:36:28,816 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 66 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=80, Invalid=130, Unknown=0, NotChecked=0, Total=210 [2018-01-21 10:36:28,816 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2018-01-21 10:36:28,819 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-01-21 10:36:28,819 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-01-21 10:36:28,820 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-01-21 10:36:28,820 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 19 [2018-01-21 10:36:28,820 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:28,820 INFO L432 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-01-21 10:36:28,821 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-21 10:36:28,821 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-01-21 10:36:28,821 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-01-21 10:36:28,821 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:28,822 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:28,822 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:28,822 INFO L82 PathProgramCache]: Analyzing trace with hash 194063723, now seen corresponding path program 3 times [2018-01-21 10:36:28,822 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:28,823 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:28,823 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:28,823 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:28,824 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:28,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:28,837 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:28,885 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:28,885 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:28,885 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:28,886 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:28,886 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:28,886 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:28,886 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:28,891 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:36:28,892 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:36:28,899 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:28,902 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:28,903 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:28,904 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:28,906 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:28,935 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:28,935 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:29,058 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:29,078 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:29,078 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:29,082 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:36:29,082 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:36:29,093 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:29,100 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:29,109 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:29,114 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:29,117 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:29,121 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:29,121 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:29,159 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:29,160 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:29,160 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 17 [2018-01-21 10:36:29,160 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:29,160 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-21 10:36:29,161 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-21 10:36:29,161 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=102, Invalid=170, Unknown=0, NotChecked=0, Total=272 [2018-01-21 10:36:29,161 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 12 states. [2018-01-21 10:36:29,181 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:29,181 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-01-21 10:36:29,181 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-21 10:36:29,181 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 20 [2018-01-21 10:36:29,182 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:29,182 INFO L225 Difference]: With dead ends: 31 [2018-01-21 10:36:29,182 INFO L226 Difference]: Without dead ends: 22 [2018-01-21 10:36:29,182 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 68 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 79 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=115, Invalid=191, Unknown=0, NotChecked=0, Total=306 [2018-01-21 10:36:29,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-01-21 10:36:29,184 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-01-21 10:36:29,184 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-01-21 10:36:29,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2018-01-21 10:36:29,185 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 20 [2018-01-21 10:36:29,185 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:29,185 INFO L432 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2018-01-21 10:36:29,185 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-21 10:36:29,185 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-01-21 10:36:29,186 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-21 10:36:29,186 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:29,186 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:29,186 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:29,186 INFO L82 PathProgramCache]: Analyzing trace with hash 319032976, now seen corresponding path program 4 times [2018-01-21 10:36:29,186 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:29,187 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:29,187 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:29,187 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:29,188 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:29,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:29,200 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:29,257 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:29,257 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:29,257 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:29,258 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:29,258 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:29,258 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:29,258 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:29,270 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:36:29,270 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:36:29,283 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:29,284 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:29,318 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:29,318 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:29,437 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:29,458 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:29,458 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:29,461 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:36:29,461 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:36:29,483 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:29,486 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:29,492 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:29,492 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:29,542 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:29,547 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:29,547 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 20 [2018-01-21 10:36:29,547 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:29,547 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-21 10:36:29,548 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-21 10:36:29,548 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=239, Unknown=0, NotChecked=0, Total=380 [2018-01-21 10:36:29,548 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 14 states. [2018-01-21 10:36:29,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:29,580 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2018-01-21 10:36:29,580 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-21 10:36:29,580 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 21 [2018-01-21 10:36:29,580 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:29,581 INFO L225 Difference]: With dead ends: 32 [2018-01-21 10:36:29,581 INFO L226 Difference]: Without dead ends: 23 [2018-01-21 10:36:29,581 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 70 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 122 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=156, Invalid=264, Unknown=0, NotChecked=0, Total=420 [2018-01-21 10:36:29,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-01-21 10:36:29,584 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-01-21 10:36:29,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-01-21 10:36:29,584 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 23 transitions. [2018-01-21 10:36:29,585 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 23 transitions. Word has length 21 [2018-01-21 10:36:29,585 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:29,585 INFO L432 AbstractCegarLoop]: Abstraction has 23 states and 23 transitions. [2018-01-21 10:36:29,585 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-21 10:36:29,585 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 23 transitions. [2018-01-21 10:36:29,585 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-21 10:36:29,585 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:29,586 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:29,586 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:29,586 INFO L82 PathProgramCache]: Analyzing trace with hash -101887477, now seen corresponding path program 5 times [2018-01-21 10:36:29,586 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:29,587 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:29,587 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:29,587 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:29,587 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:29,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:29,598 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:29,678 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:29,678 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:29,678 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:29,679 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:29,679 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:29,679 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:29,679 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:29,684 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:36:29,684 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:29,689 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:29,690 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:29,691 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:29,695 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:29,696 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:29,698 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:29,738 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:29,738 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:29,967 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:29,988 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:29,988 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:29,991 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:36:29,991 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:29,995 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:29,996 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:30,000 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:30,010 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:30,016 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:30,020 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:30,025 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:30,025 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:30,080 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:30,082 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:30,082 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 23 [2018-01-21 10:36:30,082 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:30,083 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-21 10:36:30,083 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-21 10:36:30,083 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=186, Invalid=320, Unknown=0, NotChecked=0, Total=506 [2018-01-21 10:36:30,083 INFO L87 Difference]: Start difference. First operand 23 states and 23 transitions. Second operand 16 states. [2018-01-21 10:36:30,112 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:30,113 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 10:36:30,113 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-21 10:36:30,113 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 22 [2018-01-21 10:36:30,113 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:30,114 INFO L225 Difference]: With dead ends: 33 [2018-01-21 10:36:30,114 INFO L226 Difference]: Without dead ends: 24 [2018-01-21 10:36:30,115 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 72 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 173 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=203, Invalid=349, Unknown=0, NotChecked=0, Total=552 [2018-01-21 10:36:30,115 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-01-21 10:36:30,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-01-21 10:36:30,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-01-21 10:36:30,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-01-21 10:36:30,118 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 22 [2018-01-21 10:36:30,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:30,118 INFO L432 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-01-21 10:36:30,118 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-21 10:36:30,118 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-01-21 10:36:30,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-21 10:36:30,119 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:30,119 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:30,119 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:30,119 INFO L82 PathProgramCache]: Analyzing trace with hash -265519632, now seen corresponding path program 6 times [2018-01-21 10:36:30,119 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:30,120 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:30,120 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:30,120 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:30,120 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:30,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:30,132 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:30,202 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:30,202 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:30,203 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:30,203 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:30,203 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:30,203 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:30,203 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:30,208 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:36:30,208 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:36:30,216 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:30,218 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:30,219 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:30,221 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:30,221 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:30,223 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:30,266 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:30,267 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:30,417 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:30,437 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:30,437 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:30,440 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:36:30,440 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:36:30,450 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:30,457 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:30,465 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:30,474 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:30,481 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:30,485 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:30,492 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:30,492 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:30,579 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:30,581 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:30,581 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 26 [2018-01-21 10:36:30,581 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:30,582 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-21 10:36:30,582 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-21 10:36:30,583 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=237, Invalid=413, Unknown=0, NotChecked=0, Total=650 [2018-01-21 10:36:30,583 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 18 states. [2018-01-21 10:36:30,622 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:30,623 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-01-21 10:36:30,626 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-21 10:36:30,626 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 23 [2018-01-21 10:36:30,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:30,627 INFO L225 Difference]: With dead ends: 34 [2018-01-21 10:36:30,627 INFO L226 Difference]: Without dead ends: 25 [2018-01-21 10:36:30,627 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 74 SyntacticMatches, 2 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 232 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=256, Invalid=446, Unknown=0, NotChecked=0, Total=702 [2018-01-21 10:36:30,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-01-21 10:36:30,630 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-01-21 10:36:30,630 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-01-21 10:36:30,631 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 25 transitions. [2018-01-21 10:36:30,631 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 25 transitions. Word has length 23 [2018-01-21 10:36:30,631 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:30,631 INFO L432 AbstractCegarLoop]: Abstraction has 25 states and 25 transitions. [2018-01-21 10:36:30,632 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-21 10:36:30,632 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 25 transitions. [2018-01-21 10:36:30,632 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-21 10:36:30,632 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:30,632 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:30,633 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:30,633 INFO L82 PathProgramCache]: Analyzing trace with hash -1043149141, now seen corresponding path program 7 times [2018-01-21 10:36:30,633 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:30,634 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:30,634 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:30,634 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:30,634 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:30,645 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:30,646 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:30,740 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:30,740 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:30,740 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:30,740 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:30,741 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:30,741 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:30,741 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:30,746 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:30,746 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:36:30,755 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:30,757 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:30,804 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:30,804 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:30,972 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:30,992 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:30,992 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:30,995 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:30,995 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:36:31,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:31,015 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:31,020 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:31,020 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:31,074 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:31,075 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:31,075 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 29 [2018-01-21 10:36:31,075 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:31,075 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-21 10:36:31,076 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-21 10:36:31,076 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=294, Invalid=518, Unknown=0, NotChecked=0, Total=812 [2018-01-21 10:36:31,076 INFO L87 Difference]: Start difference. First operand 25 states and 25 transitions. Second operand 20 states. [2018-01-21 10:36:31,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:31,112 INFO L93 Difference]: Finished difference Result 35 states and 35 transitions. [2018-01-21 10:36:31,112 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-21 10:36:31,112 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 24 [2018-01-21 10:36:31,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:31,112 INFO L225 Difference]: With dead ends: 35 [2018-01-21 10:36:31,113 INFO L226 Difference]: Without dead ends: 26 [2018-01-21 10:36:31,113 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 76 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 299 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=315, Invalid=555, Unknown=0, NotChecked=0, Total=870 [2018-01-21 10:36:31,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-01-21 10:36:31,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-01-21 10:36:31,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-01-21 10:36:31,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 26 transitions. [2018-01-21 10:36:31,116 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 26 transitions. Word has length 24 [2018-01-21 10:36:31,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:31,116 INFO L432 AbstractCegarLoop]: Abstraction has 26 states and 26 transitions. [2018-01-21 10:36:31,116 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-21 10:36:31,116 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-01-21 10:36:31,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-21 10:36:31,117 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:31,117 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:31,117 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:31,117 INFO L82 PathProgramCache]: Analyzing trace with hash 620139856, now seen corresponding path program 8 times [2018-01-21 10:36:31,117 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:31,118 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:31,118 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:31,118 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:31,118 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:31,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:31,128 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:31,257 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:31,257 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:31,258 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:31,258 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:31,258 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:31,258 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:31,258 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:31,265 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:36:31,265 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:31,273 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:31,279 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:31,288 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:31,290 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:31,379 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:31,379 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:31,604 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:31,624 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:31,624 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:31,627 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:36:31,627 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:31,636 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:31,644 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:31,651 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:31,654 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:31,658 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:31,658 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:31,742 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:31,744 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:31,745 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 32 [2018-01-21 10:36:31,745 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:31,745 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-21 10:36:31,745 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-21 10:36:31,746 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=357, Invalid=635, Unknown=0, NotChecked=0, Total=992 [2018-01-21 10:36:31,746 INFO L87 Difference]: Start difference. First operand 26 states and 26 transitions. Second operand 22 states. [2018-01-21 10:36:31,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:31,783 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-01-21 10:36:31,783 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-21 10:36:31,784 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 25 [2018-01-21 10:36:31,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:31,784 INFO L225 Difference]: With dead ends: 36 [2018-01-21 10:36:31,785 INFO L226 Difference]: Without dead ends: 27 [2018-01-21 10:36:31,785 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 78 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 374 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=380, Invalid=676, Unknown=0, NotChecked=0, Total=1056 [2018-01-21 10:36:31,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-01-21 10:36:31,788 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-01-21 10:36:31,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-01-21 10:36:31,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 27 transitions. [2018-01-21 10:36:31,789 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 27 transitions. Word has length 25 [2018-01-21 10:36:31,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:31,789 INFO L432 AbstractCegarLoop]: Abstraction has 27 states and 27 transitions. [2018-01-21 10:36:31,790 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-21 10:36:31,790 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-01-21 10:36:31,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-21 10:36:31,790 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:31,791 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:31,791 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:31,791 INFO L82 PathProgramCache]: Analyzing trace with hash 642491211, now seen corresponding path program 9 times [2018-01-21 10:36:31,791 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:31,792 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:31,792 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:31,792 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:31,792 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:31,800 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:31,801 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:31,886 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:31,886 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:31,886 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:31,886 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:31,886 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:31,886 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:31,886 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:31,895 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:36:31,895 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:36:31,903 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:31,905 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:31,906 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:31,907 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:31,908 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:31,909 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:31,910 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:31,911 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:32,001 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:32,001 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:32,239 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:32,259 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:32,259 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:32,262 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:36:32,262 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:36:32,272 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:32,279 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:32,287 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:32,295 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:32,304 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:32,314 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:32,320 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:32,323 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:32,328 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:32,329 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:32,405 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:32,406 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:32,406 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 35 [2018-01-21 10:36:32,406 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:32,406 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-21 10:36:32,406 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-21 10:36:32,407 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=426, Invalid=764, Unknown=0, NotChecked=0, Total=1190 [2018-01-21 10:36:32,407 INFO L87 Difference]: Start difference. First operand 27 states and 27 transitions. Second operand 24 states. [2018-01-21 10:36:32,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:32,445 INFO L93 Difference]: Finished difference Result 37 states and 37 transitions. [2018-01-21 10:36:32,445 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-21 10:36:32,446 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 26 [2018-01-21 10:36:32,446 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:32,446 INFO L225 Difference]: With dead ends: 37 [2018-01-21 10:36:32,446 INFO L226 Difference]: Without dead ends: 28 [2018-01-21 10:36:32,447 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 80 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 457 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=451, Invalid=809, Unknown=0, NotChecked=0, Total=1260 [2018-01-21 10:36:32,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-01-21 10:36:32,450 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-01-21 10:36:32,450 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-01-21 10:36:32,450 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 28 transitions. [2018-01-21 10:36:32,451 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 28 transitions. Word has length 26 [2018-01-21 10:36:32,451 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:32,451 INFO L432 AbstractCegarLoop]: Abstraction has 28 states and 28 transitions. [2018-01-21 10:36:32,451 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-21 10:36:32,451 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-01-21 10:36:32,452 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-21 10:36:32,452 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:32,452 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:32,452 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:32,452 INFO L82 PathProgramCache]: Analyzing trace with hash 1335383216, now seen corresponding path program 10 times [2018-01-21 10:36:32,452 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:32,453 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:32,453 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:32,453 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:32,453 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:32,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:32,462 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:32,561 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:32,561 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:32,561 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:32,561 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:32,562 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:32,562 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:32,562 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:32,567 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:36:32,567 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:36:32,577 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:32,579 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:32,682 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:32,682 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:32,918 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:32,938 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:32,939 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:32,941 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:36:32,942 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:36:32,967 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:32,970 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:32,976 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:32,976 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:33,051 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:33,053 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:33,053 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 38 [2018-01-21 10:36:33,053 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:33,053 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-21 10:36:33,054 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-21 10:36:33,054 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=501, Invalid=905, Unknown=0, NotChecked=0, Total=1406 [2018-01-21 10:36:33,054 INFO L87 Difference]: Start difference. First operand 28 states and 28 transitions. Second operand 26 states. [2018-01-21 10:36:33,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:33,092 INFO L93 Difference]: Finished difference Result 38 states and 38 transitions. [2018-01-21 10:36:33,092 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-21 10:36:33,092 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 27 [2018-01-21 10:36:33,092 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:33,093 INFO L225 Difference]: With dead ends: 38 [2018-01-21 10:36:33,093 INFO L226 Difference]: Without dead ends: 29 [2018-01-21 10:36:33,094 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 82 SyntacticMatches, 2 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 548 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=528, Invalid=954, Unknown=0, NotChecked=0, Total=1482 [2018-01-21 10:36:33,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-01-21 10:36:33,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-01-21 10:36:33,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-01-21 10:36:33,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 29 transitions. [2018-01-21 10:36:33,098 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 29 transitions. Word has length 27 [2018-01-21 10:36:33,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:33,098 INFO L432 AbstractCegarLoop]: Abstraction has 29 states and 29 transitions. [2018-01-21 10:36:33,098 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-21 10:36:33,098 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2018-01-21 10:36:33,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-21 10:36:33,099 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:33,099 INFO L322 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:33,099 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:33,099 INFO L82 PathProgramCache]: Analyzing trace with hash 1340198891, now seen corresponding path program 11 times [2018-01-21 10:36:33,099 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:33,100 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:33,100 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:33,100 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:33,100 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:33,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:33,110 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:33,219 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:33,219 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:33,219 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:33,220 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:33,220 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:33,220 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:33,220 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:33,225 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:36:33,225 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:33,229 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:33,229 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:33,230 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:33,231 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:33,232 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:33,232 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:33,236 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:33,237 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:33,239 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:33,314 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:33,314 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:33,579 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:33,600 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:33,600 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:33,603 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:36:33,603 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:33,607 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:33,609 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:33,612 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:33,618 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:33,624 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:33,630 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:33,644 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:33,656 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:33,659 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:33,664 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:33,664 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:33,781 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:33,782 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:33,782 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 41 [2018-01-21 10:36:33,782 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:33,783 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-21 10:36:33,783 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-21 10:36:33,783 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=582, Invalid=1058, Unknown=0, NotChecked=0, Total=1640 [2018-01-21 10:36:33,783 INFO L87 Difference]: Start difference. First operand 29 states and 29 transitions. Second operand 28 states. [2018-01-21 10:36:33,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:33,841 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-01-21 10:36:33,841 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-21 10:36:33,841 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 28 [2018-01-21 10:36:33,842 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:33,842 INFO L225 Difference]: With dead ends: 39 [2018-01-21 10:36:33,842 INFO L226 Difference]: Without dead ends: 30 [2018-01-21 10:36:33,843 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 84 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 647 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=611, Invalid=1111, Unknown=0, NotChecked=0, Total=1722 [2018-01-21 10:36:33,843 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-01-21 10:36:33,845 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-01-21 10:36:33,845 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-01-21 10:36:33,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 30 transitions. [2018-01-21 10:36:33,846 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 30 transitions. Word has length 28 [2018-01-21 10:36:33,846 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:33,846 INFO L432 AbstractCegarLoop]: Abstraction has 30 states and 30 transitions. [2018-01-21 10:36:33,846 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-21 10:36:33,846 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-01-21 10:36:33,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-21 10:36:33,847 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:33,847 INFO L322 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:33,847 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:33,847 INFO L82 PathProgramCache]: Analyzing trace with hash 1489484816, now seen corresponding path program 12 times [2018-01-21 10:36:33,848 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:33,848 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:33,849 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:33,849 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:33,849 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:33,858 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:33,858 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:33,996 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:33,996 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:33,996 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:33,996 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:33,996 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:33,997 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:33,997 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:34,010 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:36:34,010 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:36:34,017 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:34,019 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:34,020 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:34,022 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:34,023 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:34,024 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:34,025 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:34,026 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:34,027 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:34,153 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:34,153 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:34,579 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:34,613 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:34,613 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:34,619 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:36:34,619 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:36:34,630 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:34,640 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:34,651 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:34,664 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:34,674 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:34,683 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:34,693 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:34,700 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:34,703 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:34,707 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:34,707 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:34,826 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:34,828 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:34,828 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 44 [2018-01-21 10:36:34,828 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:34,829 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-21 10:36:34,829 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-21 10:36:34,830 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=669, Invalid=1223, Unknown=0, NotChecked=0, Total=1892 [2018-01-21 10:36:34,830 INFO L87 Difference]: Start difference. First operand 30 states and 30 transitions. Second operand 30 states. [2018-01-21 10:36:34,880 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:34,881 INFO L93 Difference]: Finished difference Result 40 states and 40 transitions. [2018-01-21 10:36:34,881 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-21 10:36:34,881 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 29 [2018-01-21 10:36:34,881 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:34,882 INFO L225 Difference]: With dead ends: 40 [2018-01-21 10:36:34,882 INFO L226 Difference]: Without dead ends: 31 [2018-01-21 10:36:34,883 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 86 SyntacticMatches, 2 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 754 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=700, Invalid=1280, Unknown=0, NotChecked=0, Total=1980 [2018-01-21 10:36:34,883 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2018-01-21 10:36:34,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2018-01-21 10:36:34,886 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-01-21 10:36:34,886 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 31 transitions. [2018-01-21 10:36:34,886 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 31 transitions. Word has length 29 [2018-01-21 10:36:34,887 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:34,887 INFO L432 AbstractCegarLoop]: Abstraction has 31 states and 31 transitions. [2018-01-21 10:36:34,887 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-21 10:36:34,887 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 31 transitions. [2018-01-21 10:36:34,887 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-21 10:36:34,888 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:34,888 INFO L322 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:34,888 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:34,888 INFO L82 PathProgramCache]: Analyzing trace with hash 1822381195, now seen corresponding path program 13 times [2018-01-21 10:36:34,888 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:34,889 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:34,889 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:34,889 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:34,889 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:34,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:34,897 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:35,220 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:35,220 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:35,220 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:35,220 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:35,221 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:35,221 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:35,221 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:35,229 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:35,229 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:36:35,240 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:35,242 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:35,337 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:35,338 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:35,733 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:35,754 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:35,754 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:35,757 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:35,757 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:36:35,780 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:35,783 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:35,787 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:35,788 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:35,894 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:35,895 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:35,895 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 47 [2018-01-21 10:36:35,895 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:35,895 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-21 10:36:35,896 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-21 10:36:35,896 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=762, Invalid=1400, Unknown=0, NotChecked=0, Total=2162 [2018-01-21 10:36:35,897 INFO L87 Difference]: Start difference. First operand 31 states and 31 transitions. Second operand 32 states. [2018-01-21 10:36:35,956 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:35,957 INFO L93 Difference]: Finished difference Result 41 states and 41 transitions. [2018-01-21 10:36:35,957 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-21 10:36:35,957 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 30 [2018-01-21 10:36:35,957 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:35,958 INFO L225 Difference]: With dead ends: 41 [2018-01-21 10:36:35,958 INFO L226 Difference]: Without dead ends: 32 [2018-01-21 10:36:35,958 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 88 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 869 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=795, Invalid=1461, Unknown=0, NotChecked=0, Total=2256 [2018-01-21 10:36:35,958 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-01-21 10:36:35,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2018-01-21 10:36:35,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-01-21 10:36:35,961 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 32 transitions. [2018-01-21 10:36:35,961 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 32 transitions. Word has length 30 [2018-01-21 10:36:35,961 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:35,961 INFO L432 AbstractCegarLoop]: Abstraction has 32 states and 32 transitions. [2018-01-21 10:36:35,961 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-21 10:36:35,961 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2018-01-21 10:36:35,961 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-21 10:36:35,962 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:35,962 INFO L322 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:35,962 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:35,962 INFO L82 PathProgramCache]: Analyzing trace with hash -742732944, now seen corresponding path program 14 times [2018-01-21 10:36:35,962 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:35,962 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:35,963 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:35,963 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:35,963 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:35,969 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:35,970 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:36,128 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:36,129 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:36,129 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:36,129 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:36,129 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:36,129 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:36,129 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:36,141 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:36:36,141 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:36,151 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:36,157 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:36,158 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:36,160 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:36,300 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:36,300 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:36,758 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:36,778 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:36,778 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:36,781 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:36:36,782 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:36,790 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:36,800 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:36,809 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:36,812 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:36,817 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:36,817 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:36,917 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:36,918 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:36,918 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 50 [2018-01-21 10:36:36,918 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:36,919 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-01-21 10:36:36,919 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-01-21 10:36:36,919 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=861, Invalid=1589, Unknown=0, NotChecked=0, Total=2450 [2018-01-21 10:36:36,920 INFO L87 Difference]: Start difference. First operand 32 states and 32 transitions. Second operand 34 states. [2018-01-21 10:36:37,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:37,012 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-01-21 10:36:37,014 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-21 10:36:37,014 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 31 [2018-01-21 10:36:37,014 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:37,015 INFO L225 Difference]: With dead ends: 42 [2018-01-21 10:36:37,015 INFO L226 Difference]: Without dead ends: 33 [2018-01-21 10:36:37,016 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 90 SyntacticMatches, 2 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 992 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=896, Invalid=1654, Unknown=0, NotChecked=0, Total=2550 [2018-01-21 10:36:37,016 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-01-21 10:36:37,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2018-01-21 10:36:37,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-01-21 10:36:37,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 33 transitions. [2018-01-21 10:36:37,020 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 33 transitions. Word has length 31 [2018-01-21 10:36:37,020 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:37,020 INFO L432 AbstractCegarLoop]: Abstraction has 33 states and 33 transitions. [2018-01-21 10:36:37,021 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-01-21 10:36:37,021 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-01-21 10:36:37,021 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-21 10:36:37,021 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:37,022 INFO L322 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:37,022 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:37,022 INFO L82 PathProgramCache]: Analyzing trace with hash 1343107371, now seen corresponding path program 15 times [2018-01-21 10:36:37,022 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:37,023 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:37,023 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:37,023 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:37,023 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:37,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:37,030 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:37,199 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:37,199 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:37,200 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:37,200 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:37,200 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:37,200 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:37,200 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:37,208 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:36:37,208 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:36:37,215 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:37,217 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:37,219 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:37,220 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:37,221 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:37,223 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:37,224 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:37,226 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:37,227 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:37,227 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:37,229 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:37,354 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:37,354 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:37,885 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:37,918 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:37,918 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:37,921 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:36:37,922 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:36:37,933 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:37,940 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:37,948 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:37,957 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:37,966 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:37,975 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:37,985 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:37,996 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:38,007 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:38,015 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:38,018 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:38,024 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:38,024 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:38,187 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:38,189 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:38,189 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 53 [2018-01-21 10:36:38,189 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:38,190 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-21 10:36:38,190 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-21 10:36:38,191 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=966, Invalid=1790, Unknown=0, NotChecked=0, Total=2756 [2018-01-21 10:36:38,191 INFO L87 Difference]: Start difference. First operand 33 states and 33 transitions. Second operand 36 states. [2018-01-21 10:36:38,251 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:38,251 INFO L93 Difference]: Finished difference Result 43 states and 43 transitions. [2018-01-21 10:36:38,251 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-21 10:36:38,251 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 32 [2018-01-21 10:36:38,252 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:38,252 INFO L225 Difference]: With dead ends: 43 [2018-01-21 10:36:38,252 INFO L226 Difference]: Without dead ends: 34 [2018-01-21 10:36:38,253 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 92 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1123 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1003, Invalid=1859, Unknown=0, NotChecked=0, Total=2862 [2018-01-21 10:36:38,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-01-21 10:36:38,255 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-01-21 10:36:38,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-01-21 10:36:38,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2018-01-21 10:36:38,256 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 32 [2018-01-21 10:36:38,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:38,256 INFO L432 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2018-01-21 10:36:38,257 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-21 10:36:38,257 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-01-21 10:36:38,257 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-21 10:36:38,257 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:38,258 INFO L322 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:38,258 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:38,258 INFO L82 PathProgramCache]: Analyzing trace with hash 1579647696, now seen corresponding path program 16 times [2018-01-21 10:36:38,258 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:38,259 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:38,259 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:38,259 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:38,259 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:38,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:38,266 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:38,543 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:38,543 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:38,544 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:38,544 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:38,544 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:38,544 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:38,544 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:38,548 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:36:38,549 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:36:38,561 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:38,562 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:38,683 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:38,683 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:39,137 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:39,158 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:39,158 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:39,161 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:36:39,161 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:36:39,190 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:39,193 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:39,198 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:39,198 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:39,315 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:39,316 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:39,316 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 56 [2018-01-21 10:36:39,316 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:39,316 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-21 10:36:39,316 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-21 10:36:39,317 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1077, Invalid=2003, Unknown=0, NotChecked=0, Total=3080 [2018-01-21 10:36:39,317 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand 38 states. [2018-01-21 10:36:39,403 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:39,403 INFO L93 Difference]: Finished difference Result 44 states and 44 transitions. [2018-01-21 10:36:39,403 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-21 10:36:39,403 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 33 [2018-01-21 10:36:39,404 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:39,404 INFO L225 Difference]: With dead ends: 44 [2018-01-21 10:36:39,404 INFO L226 Difference]: Without dead ends: 35 [2018-01-21 10:36:39,405 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 94 SyntacticMatches, 2 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1262 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1116, Invalid=2076, Unknown=0, NotChecked=0, Total=3192 [2018-01-21 10:36:39,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-01-21 10:36:39,407 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 35. [2018-01-21 10:36:39,407 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-01-21 10:36:39,408 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 35 transitions. [2018-01-21 10:36:39,408 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 35 transitions. Word has length 33 [2018-01-21 10:36:39,408 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:39,408 INFO L432 AbstractCegarLoop]: Abstraction has 35 states and 35 transitions. [2018-01-21 10:36:39,408 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-21 10:36:39,408 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 35 transitions. [2018-01-21 10:36:39,409 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-21 10:36:39,409 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:39,409 INFO L322 BasicCegarLoop]: trace histogram [17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:39,409 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:39,409 INFO L82 PathProgramCache]: Analyzing trace with hash 322463179, now seen corresponding path program 17 times [2018-01-21 10:36:39,410 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:39,410 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:39,410 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:39,410 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:39,411 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:39,419 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:39,419 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:39,736 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:39,736 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:39,736 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:39,736 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:39,736 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:39,736 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:39,736 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:39,742 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:36:39,742 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:39,746 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:39,747 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:39,748 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:39,749 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:39,750 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:39,751 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:39,752 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:39,753 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:39,754 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:39,758 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:39,759 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:39,761 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:39,934 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:39,934 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:40,496 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:40,516 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:40,516 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:40,519 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:36:40,519 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:40,523 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:40,524 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:40,528 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:40,532 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:40,536 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:40,541 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:40,546 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:40,551 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:40,557 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:40,568 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:40,577 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:40,580 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:40,585 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:40,585 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:40,716 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:40,717 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:40,717 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 59 [2018-01-21 10:36:40,717 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:40,718 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-21 10:36:40,718 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-21 10:36:40,718 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1194, Invalid=2228, Unknown=0, NotChecked=0, Total=3422 [2018-01-21 10:36:40,719 INFO L87 Difference]: Start difference. First operand 35 states and 35 transitions. Second operand 40 states. [2018-01-21 10:36:40,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:40,764 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-01-21 10:36:40,764 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-21 10:36:40,764 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 34 [2018-01-21 10:36:40,764 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:40,765 INFO L225 Difference]: With dead ends: 45 [2018-01-21 10:36:40,765 INFO L226 Difference]: Without dead ends: 36 [2018-01-21 10:36:40,766 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 96 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1409 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1235, Invalid=2305, Unknown=0, NotChecked=0, Total=3540 [2018-01-21 10:36:40,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-01-21 10:36:40,768 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-01-21 10:36:40,768 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-01-21 10:36:40,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-01-21 10:36:40,768 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 34 [2018-01-21 10:36:40,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:40,768 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-01-21 10:36:40,768 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-21 10:36:40,769 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-01-21 10:36:40,769 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-21 10:36:40,769 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:40,769 INFO L322 BasicCegarLoop]: trace histogram [18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:40,769 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:40,769 INFO L82 PathProgramCache]: Analyzing trace with hash 4448816, now seen corresponding path program 18 times [2018-01-21 10:36:40,770 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:40,770 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:40,770 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:40,770 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:40,771 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:40,779 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:40,779 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:40,997 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:40,997 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:40,997 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:40,997 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:40,997 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:40,997 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:40,997 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:41,002 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:36:41,002 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:36:41,009 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:41,011 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:41,012 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:41,013 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:41,014 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:41,015 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:41,016 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:41,017 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:41,018 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:41,019 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:41,019 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:41,021 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:41,176 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:41,176 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:41,356 WARN L143 SmtUtils]: Spent 119ms on a formula simplification that was a NOOP. DAG size: 62 [2018-01-21 10:36:41,806 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:41,826 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:41,826 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:41,829 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:36:41,829 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:36:41,838 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:41,844 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:41,852 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:41,860 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:41,868 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:41,877 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:41,886 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:41,896 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:41,907 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:41,918 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:41,926 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:41,929 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:41,934 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:41,934 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:42,064 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:42,065 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:42,065 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 62 [2018-01-21 10:36:42,065 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:42,066 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-01-21 10:36:42,066 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-01-21 10:36:42,067 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1317, Invalid=2465, Unknown=0, NotChecked=0, Total=3782 [2018-01-21 10:36:42,067 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 42 states. [2018-01-21 10:36:42,114 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:42,114 INFO L93 Difference]: Finished difference Result 46 states and 46 transitions. [2018-01-21 10:36:42,114 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-21 10:36:42,114 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 35 [2018-01-21 10:36:42,115 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:42,115 INFO L225 Difference]: With dead ends: 46 [2018-01-21 10:36:42,115 INFO L226 Difference]: Without dead ends: 37 [2018-01-21 10:36:42,116 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 98 SyntacticMatches, 2 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1564 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1360, Invalid=2546, Unknown=0, NotChecked=0, Total=3906 [2018-01-21 10:36:42,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-01-21 10:36:42,120 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 37. [2018-01-21 10:36:42,120 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-01-21 10:36:42,121 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 37 transitions. [2018-01-21 10:36:42,121 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 37 transitions. Word has length 35 [2018-01-21 10:36:42,121 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:42,121 INFO L432 AbstractCegarLoop]: Abstraction has 37 states and 37 transitions. [2018-01-21 10:36:42,121 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-01-21 10:36:42,121 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 37 transitions. [2018-01-21 10:36:42,122 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-21 10:36:42,122 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:42,122 INFO L322 BasicCegarLoop]: trace histogram [19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:42,122 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:42,122 INFO L82 PathProgramCache]: Analyzing trace with hash -1264061845, now seen corresponding path program 19 times [2018-01-21 10:36:42,123 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:42,123 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:42,123 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:42,124 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:42,124 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:42,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:42,132 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:42,387 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:42,388 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:42,388 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:42,388 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:42,388 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:42,388 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:42,388 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:42,393 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:42,393 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:36:42,405 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:42,406 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:42,566 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:42,566 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:43,165 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:43,184 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:43,184 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:43,187 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:43,187 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:36:43,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:43,212 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:43,218 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:43,218 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:43,366 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:43,367 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:43,367 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 65 [2018-01-21 10:36:43,367 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:43,367 INFO L409 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-01-21 10:36:43,367 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-01-21 10:36:43,368 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1446, Invalid=2714, Unknown=0, NotChecked=0, Total=4160 [2018-01-21 10:36:43,368 INFO L87 Difference]: Start difference. First operand 37 states and 37 transitions. Second operand 44 states. [2018-01-21 10:36:43,427 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:43,427 INFO L93 Difference]: Finished difference Result 47 states and 47 transitions. [2018-01-21 10:36:43,427 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-21 10:36:43,427 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 36 [2018-01-21 10:36:43,427 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:43,428 INFO L225 Difference]: With dead ends: 47 [2018-01-21 10:36:43,428 INFO L226 Difference]: Without dead ends: 38 [2018-01-21 10:36:43,428 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 166 GetRequests, 100 SyntacticMatches, 2 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1727 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1491, Invalid=2799, Unknown=0, NotChecked=0, Total=4290 [2018-01-21 10:36:43,428 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2018-01-21 10:36:43,430 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2018-01-21 10:36:43,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-01-21 10:36:43,431 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 38 transitions. [2018-01-21 10:36:43,431 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 38 transitions. Word has length 36 [2018-01-21 10:36:43,431 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:43,431 INFO L432 AbstractCegarLoop]: Abstraction has 38 states and 38 transitions. [2018-01-21 10:36:43,431 INFO L433 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-01-21 10:36:43,431 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-01-21 10:36:43,432 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-21 10:36:43,432 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:43,432 INFO L322 BasicCegarLoop]: trace histogram [20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:43,432 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:43,432 INFO L82 PathProgramCache]: Analyzing trace with hash -1933186672, now seen corresponding path program 20 times [2018-01-21 10:36:43,432 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:43,433 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:43,433 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:43,433 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:43,433 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:43,441 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:43,441 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:43,668 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:43,668 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:43,668 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:43,668 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:43,668 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:43,668 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:43,668 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:43,673 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:36:43,673 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:43,681 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:43,688 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:43,690 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:43,692 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:43,871 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:43,871 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:44,511 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:44,531 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:44,531 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:44,534 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:36:44,534 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:44,543 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:44,554 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:44,564 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:44,567 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:44,572 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:44,572 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:44,713 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:44,714 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:44,714 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 68 [2018-01-21 10:36:44,715 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:44,715 INFO L409 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-01-21 10:36:44,715 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-01-21 10:36:44,716 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1583, Invalid=2973, Unknown=0, NotChecked=0, Total=4556 [2018-01-21 10:36:44,716 INFO L87 Difference]: Start difference. First operand 38 states and 38 transitions. Second operand 46 states. [2018-01-21 10:36:44,757 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:44,758 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-01-21 10:36:44,758 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-21 10:36:44,758 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 37 [2018-01-21 10:36:44,758 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:44,758 INFO L225 Difference]: With dead ends: 48 [2018-01-21 10:36:44,759 INFO L226 Difference]: Without dead ends: 39 [2018-01-21 10:36:44,759 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 102 SyntacticMatches, 2 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1916 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1630, Invalid=3062, Unknown=0, NotChecked=0, Total=4692 [2018-01-21 10:36:44,759 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-01-21 10:36:44,761 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-01-21 10:36:44,761 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-01-21 10:36:44,761 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 39 transitions. [2018-01-21 10:36:44,762 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 39 transitions. Word has length 37 [2018-01-21 10:36:44,762 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:44,762 INFO L432 AbstractCegarLoop]: Abstraction has 39 states and 39 transitions. [2018-01-21 10:36:44,762 INFO L433 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-01-21 10:36:44,762 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-01-21 10:36:44,762 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-21 10:36:44,762 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:44,762 INFO L322 BasicCegarLoop]: trace histogram [21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:44,762 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:44,763 INFO L82 PathProgramCache]: Analyzing trace with hash -1201219829, now seen corresponding path program 21 times [2018-01-21 10:36:44,763 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:44,763 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:44,763 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:44,763 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:44,763 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:44,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:44,772 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:44,995 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:44,996 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:44,996 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:44,996 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:44,996 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:44,996 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:44,996 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:45,002 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:36:45,002 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:36:45,008 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:45,009 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:45,010 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:45,011 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:45,012 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:45,013 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:45,014 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:45,015 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:45,016 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:45,017 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:45,018 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:45,019 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:45,020 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:45,021 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:45,202 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:45,202 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:45,870 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:45,890 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:45,890 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:45,893 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:36:45,893 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:36:45,902 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:45,908 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:45,915 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:45,923 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:45,931 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:45,940 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:45,949 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:45,958 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:45,969 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:45,979 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:45,990 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:46,002 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:46,010 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:46,014 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:46,019 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:46,019 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:46,181 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:46,182 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:46,182 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 71 [2018-01-21 10:36:46,182 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:46,182 INFO L409 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-01-21 10:36:46,183 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-01-21 10:36:46,183 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1726, Invalid=3244, Unknown=0, NotChecked=0, Total=4970 [2018-01-21 10:36:46,183 INFO L87 Difference]: Start difference. First operand 39 states and 39 transitions. Second operand 48 states. [2018-01-21 10:36:46,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:46,235 INFO L93 Difference]: Finished difference Result 49 states and 49 transitions. [2018-01-21 10:36:46,235 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-21 10:36:46,235 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 38 [2018-01-21 10:36:46,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:46,235 INFO L225 Difference]: With dead ends: 49 [2018-01-21 10:36:46,235 INFO L226 Difference]: Without dead ends: 40 [2018-01-21 10:36:46,236 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 104 SyntacticMatches, 2 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2136 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1775, Invalid=3337, Unknown=0, NotChecked=0, Total=5112 [2018-01-21 10:36:46,236 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-01-21 10:36:46,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2018-01-21 10:36:46,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-01-21 10:36:46,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 40 transitions. [2018-01-21 10:36:46,240 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 40 transitions. Word has length 38 [2018-01-21 10:36:46,240 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:46,240 INFO L432 AbstractCegarLoop]: Abstraction has 40 states and 40 transitions. [2018-01-21 10:36:46,240 INFO L433 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-01-21 10:36:46,240 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 40 transitions. [2018-01-21 10:36:46,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-21 10:36:46,240 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:46,240 INFO L322 BasicCegarLoop]: trace histogram [22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:46,241 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:46,241 INFO L82 PathProgramCache]: Analyzing trace with hash 14915824, now seen corresponding path program 22 times [2018-01-21 10:36:46,241 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:46,241 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:46,241 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:46,241 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:46,241 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:46,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:46,248 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:46,500 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:46,500 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:46,500 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:46,501 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:46,501 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:46,501 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:46,501 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:46,508 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:36:46,508 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:36:46,520 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:46,521 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:46,721 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:46,722 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:47,425 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:47,445 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:47,445 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:47,448 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:36:47,448 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:36:47,482 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:47,485 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:47,492 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:47,492 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:47,701 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:47,702 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:47,702 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 74 [2018-01-21 10:36:47,702 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:47,702 INFO L409 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-01-21 10:36:47,702 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-01-21 10:36:47,703 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1875, Invalid=3527, Unknown=0, NotChecked=0, Total=5402 [2018-01-21 10:36:47,703 INFO L87 Difference]: Start difference. First operand 40 states and 40 transitions. Second operand 50 states. [2018-01-21 10:36:47,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:47,769 INFO L93 Difference]: Finished difference Result 50 states and 50 transitions. [2018-01-21 10:36:47,770 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-21 10:36:47,770 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 39 [2018-01-21 10:36:47,770 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:47,770 INFO L225 Difference]: With dead ends: 50 [2018-01-21 10:36:47,770 INFO L226 Difference]: Without dead ends: 41 [2018-01-21 10:36:47,771 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 181 GetRequests, 106 SyntacticMatches, 2 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2368 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1926, Invalid=3624, Unknown=0, NotChecked=0, Total=5550 [2018-01-21 10:36:47,771 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-01-21 10:36:47,774 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. [2018-01-21 10:36:47,774 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-01-21 10:36:47,775 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 41 transitions. [2018-01-21 10:36:47,775 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 41 transitions. Word has length 39 [2018-01-21 10:36:47,775 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:47,775 INFO L432 AbstractCegarLoop]: Abstraction has 41 states and 41 transitions. [2018-01-21 10:36:47,775 INFO L433 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-01-21 10:36:47,776 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 41 transitions. [2018-01-21 10:36:47,776 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-21 10:36:47,776 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:47,776 INFO L322 BasicCegarLoop]: trace histogram [23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:47,777 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:47,777 INFO L82 PathProgramCache]: Analyzing trace with hash -939584597, now seen corresponding path program 23 times [2018-01-21 10:36:47,777 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:47,777 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:47,778 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:47,778 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:47,778 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:47,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:47,785 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:48,032 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:48,032 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:48,032 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:48,032 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:48,032 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:48,032 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:48,032 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:48,037 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:36:48,037 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:48,041 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:48,042 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:48,042 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:48,043 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:48,044 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:48,044 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:48,045 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:48,046 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:48,047 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:48,048 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:48,048 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:48,049 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:48,053 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:48,054 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:48,055 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:48,263 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:48,263 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:49,012 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:49,032 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:49,032 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:49,035 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:36:49,035 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:49,040 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:49,041 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:49,044 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:49,048 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:49,052 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:49,056 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:49,061 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:49,066 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:49,071 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:49,077 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:49,083 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:49,090 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:49,102 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:49,112 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:49,115 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:49,120 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:49,120 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:49,306 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:49,307 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:49,307 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 77 [2018-01-21 10:36:49,307 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:49,307 INFO L409 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-01-21 10:36:49,307 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-01-21 10:36:49,308 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2030, Invalid=3822, Unknown=0, NotChecked=0, Total=5852 [2018-01-21 10:36:49,308 INFO L87 Difference]: Start difference. First operand 41 states and 41 transitions. Second operand 52 states. [2018-01-21 10:36:49,407 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:49,408 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-01-21 10:36:49,408 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-21 10:36:49,408 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 40 [2018-01-21 10:36:49,408 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:49,408 INFO L225 Difference]: With dead ends: 51 [2018-01-21 10:36:49,408 INFO L226 Difference]: Without dead ends: 42 [2018-01-21 10:36:49,409 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 108 SyntacticMatches, 2 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2612 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=2083, Invalid=3923, Unknown=0, NotChecked=0, Total=6006 [2018-01-21 10:36:49,409 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-01-21 10:36:49,412 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2018-01-21 10:36:49,412 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-01-21 10:36:49,413 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 42 transitions. [2018-01-21 10:36:49,413 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 42 transitions. Word has length 40 [2018-01-21 10:36:49,413 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:49,413 INFO L432 AbstractCegarLoop]: Abstraction has 42 states and 42 transitions. [2018-01-21 10:36:49,413 INFO L433 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-01-21 10:36:49,413 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-01-21 10:36:49,414 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-21 10:36:49,414 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:49,414 INFO L322 BasicCegarLoop]: trace histogram [24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:49,414 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:49,414 INFO L82 PathProgramCache]: Analyzing trace with hash -464326576, now seen corresponding path program 24 times [2018-01-21 10:36:49,414 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:49,415 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:49,415 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:49,415 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:49,415 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:49,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:49,425 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:49,694 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:49,694 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:49,694 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:49,694 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:49,694 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:49,695 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:49,695 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:49,699 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:36:49,700 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:36:49,706 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:49,707 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:49,708 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:49,709 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:49,710 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:49,711 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:49,712 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:49,713 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:49,714 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:49,715 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:49,716 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:49,717 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:49,718 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:49,719 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:49,720 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:49,951 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:49,951 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:50,729 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:50,749 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:50,749 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:50,752 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:36:50,752 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:36:50,761 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:50,768 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:50,776 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:50,784 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:50,791 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:50,800 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:50,810 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:50,819 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:50,829 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:50,839 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:50,850 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:50,862 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:50,874 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:50,883 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:50,886 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:50,892 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:50,892 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:51,093 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:51,094 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:51,094 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 80 [2018-01-21 10:36:51,095 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:51,095 INFO L409 AbstractCegarLoop]: Interpolant automaton has 54 states [2018-01-21 10:36:51,095 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2018-01-21 10:36:51,096 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2191, Invalid=4129, Unknown=0, NotChecked=0, Total=6320 [2018-01-21 10:36:51,096 INFO L87 Difference]: Start difference. First operand 42 states and 42 transitions. Second operand 54 states. [2018-01-21 10:36:51,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:51,193 INFO L93 Difference]: Finished difference Result 52 states and 52 transitions. [2018-01-21 10:36:51,194 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-21 10:36:51,194 INFO L78 Accepts]: Start accepts. Automaton has 54 states. Word has length 41 [2018-01-21 10:36:51,194 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:51,194 INFO L225 Difference]: With dead ends: 52 [2018-01-21 10:36:51,194 INFO L226 Difference]: Without dead ends: 43 [2018-01-21 10:36:51,195 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 110 SyntacticMatches, 2 SemanticMatches, 79 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2868 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=2246, Invalid=4234, Unknown=0, NotChecked=0, Total=6480 [2018-01-21 10:36:51,195 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-01-21 10:36:51,198 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2018-01-21 10:36:51,198 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-01-21 10:36:51,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 43 transitions. [2018-01-21 10:36:51,199 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 43 transitions. Word has length 41 [2018-01-21 10:36:51,199 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:51,199 INFO L432 AbstractCegarLoop]: Abstraction has 43 states and 43 transitions. [2018-01-21 10:36:51,199 INFO L433 AbstractCegarLoop]: Interpolant automaton has 54 states. [2018-01-21 10:36:51,199 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 43 transitions. [2018-01-21 10:36:51,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-21 10:36:51,200 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:51,200 INFO L322 BasicCegarLoop]: trace histogram [25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:51,200 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:51,200 INFO L82 PathProgramCache]: Analyzing trace with hash 1383770187, now seen corresponding path program 25 times [2018-01-21 10:36:51,201 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:51,201 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:51,201 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:51,202 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:51,202 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:51,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:51,213 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:51,540 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:51,540 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:51,540 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:51,541 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:51,541 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:51,541 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:51,541 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:51,545 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:51,546 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:36:51,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:51,559 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:51,800 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:51,800 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:52,632 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:52,651 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:52,651 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:52,654 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:52,654 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:36:52,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:52,683 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:52,692 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:52,692 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:52,891 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:52,892 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:52,892 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 83 [2018-01-21 10:36:52,892 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:52,892 INFO L409 AbstractCegarLoop]: Interpolant automaton has 56 states [2018-01-21 10:36:52,893 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2018-01-21 10:36:52,893 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2358, Invalid=4448, Unknown=0, NotChecked=0, Total=6806 [2018-01-21 10:36:52,893 INFO L87 Difference]: Start difference. First operand 43 states and 43 transitions. Second operand 56 states. [2018-01-21 10:36:52,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:52,966 INFO L93 Difference]: Finished difference Result 53 states and 53 transitions. [2018-01-21 10:36:52,967 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-21 10:36:52,967 INFO L78 Accepts]: Start accepts. Automaton has 56 states. Word has length 42 [2018-01-21 10:36:52,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:52,967 INFO L225 Difference]: With dead ends: 53 [2018-01-21 10:36:52,967 INFO L226 Difference]: Without dead ends: 44 [2018-01-21 10:36:52,968 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 196 GetRequests, 112 SyntacticMatches, 2 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3136 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=2415, Invalid=4557, Unknown=0, NotChecked=0, Total=6972 [2018-01-21 10:36:52,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-01-21 10:36:52,970 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-01-21 10:36:52,970 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-01-21 10:36:52,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 44 transitions. [2018-01-21 10:36:52,970 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 44 transitions. Word has length 42 [2018-01-21 10:36:52,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:52,971 INFO L432 AbstractCegarLoop]: Abstraction has 44 states and 44 transitions. [2018-01-21 10:36:52,971 INFO L433 AbstractCegarLoop]: Interpolant automaton has 56 states. [2018-01-21 10:36:52,971 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 44 transitions. [2018-01-21 10:36:52,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-21 10:36:52,971 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:52,971 INFO L322 BasicCegarLoop]: trace histogram [26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:52,971 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:52,971 INFO L82 PathProgramCache]: Analyzing trace with hash -1454772304, now seen corresponding path program 26 times [2018-01-21 10:36:52,971 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:52,972 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:52,972 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:52,972 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:52,972 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:52,981 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:52,982 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:53,409 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:53,409 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:53,409 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:53,409 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:53,409 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:53,409 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:53,409 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:53,420 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:36:53,420 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:53,428 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:53,435 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:53,437 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:53,438 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:53,815 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:53,815 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:54,681 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:54,700 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:54,700 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:54,703 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:36:54,703 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:54,713 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:54,726 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:54,737 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:54,741 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:54,746 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:54,747 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:54,956 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:54,957 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:54,957 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 86 [2018-01-21 10:36:54,957 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:54,957 INFO L409 AbstractCegarLoop]: Interpolant automaton has 58 states [2018-01-21 10:36:54,958 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2018-01-21 10:36:54,958 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2531, Invalid=4779, Unknown=0, NotChecked=0, Total=7310 [2018-01-21 10:36:54,958 INFO L87 Difference]: Start difference. First operand 44 states and 44 transitions. Second operand 58 states. [2018-01-21 10:36:55,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:55,041 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2018-01-21 10:36:55,041 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-01-21 10:36:55,041 INFO L78 Accepts]: Start accepts. Automaton has 58 states. Word has length 43 [2018-01-21 10:36:55,042 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:55,042 INFO L225 Difference]: With dead ends: 54 [2018-01-21 10:36:55,042 INFO L226 Difference]: Without dead ends: 45 [2018-01-21 10:36:55,042 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 201 GetRequests, 114 SyntacticMatches, 2 SemanticMatches, 85 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3416 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2590, Invalid=4892, Unknown=0, NotChecked=0, Total=7482 [2018-01-21 10:36:55,043 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-01-21 10:36:55,044 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-01-21 10:36:55,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-01-21 10:36:55,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 45 transitions. [2018-01-21 10:36:55,045 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 45 transitions. Word has length 43 [2018-01-21 10:36:55,045 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:55,045 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 45 transitions. [2018-01-21 10:36:55,045 INFO L433 AbstractCegarLoop]: Interpolant automaton has 58 states. [2018-01-21 10:36:55,045 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 45 transitions. [2018-01-21 10:36:55,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-21 10:36:55,045 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:55,045 INFO L322 BasicCegarLoop]: trace histogram [27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:55,045 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:55,046 INFO L82 PathProgramCache]: Analyzing trace with hash 744723691, now seen corresponding path program 27 times [2018-01-21 10:36:55,046 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:55,046 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:55,046 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:55,046 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:55,046 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:55,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:55,053 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:55,427 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:55,428 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:55,428 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:55,428 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:55,428 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:55,428 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:55,428 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:55,433 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:36:55,433 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:36:55,439 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:55,441 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:55,442 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:55,443 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:55,444 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:55,445 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:55,446 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:55,447 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:55,448 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:55,449 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:55,450 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:55,451 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:55,452 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:55,454 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:55,455 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:55,455 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:55,456 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:55,745 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:55,745 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:56,664 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:56,683 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:56,683 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:56,686 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:36:56,687 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:36:56,697 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:56,703 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:56,711 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:56,719 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:56,727 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:56,736 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:56,745 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:56,755 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:56,765 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:56,777 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:56,788 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:56,800 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:56,811 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:56,824 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:56,836 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:56,846 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:56,849 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:56,855 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:56,855 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:57,072 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:57,073 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:57,073 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 89 [2018-01-21 10:36:57,073 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:57,073 INFO L409 AbstractCegarLoop]: Interpolant automaton has 60 states [2018-01-21 10:36:57,074 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2018-01-21 10:36:57,074 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2710, Invalid=5122, Unknown=0, NotChecked=0, Total=7832 [2018-01-21 10:36:57,074 INFO L87 Difference]: Start difference. First operand 45 states and 45 transitions. Second operand 60 states. [2018-01-21 10:36:57,131 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:57,131 INFO L93 Difference]: Finished difference Result 55 states and 55 transitions. [2018-01-21 10:36:57,131 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-21 10:36:57,131 INFO L78 Accepts]: Start accepts. Automaton has 60 states. Word has length 44 [2018-01-21 10:36:57,131 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:57,132 INFO L225 Difference]: With dead ends: 55 [2018-01-21 10:36:57,132 INFO L226 Difference]: Without dead ends: 46 [2018-01-21 10:36:57,132 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 116 SyntacticMatches, 2 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3708 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=2771, Invalid=5239, Unknown=0, NotChecked=0, Total=8010 [2018-01-21 10:36:57,132 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-01-21 10:36:57,134 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2018-01-21 10:36:57,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-01-21 10:36:57,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 46 transitions. [2018-01-21 10:36:57,135 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 46 transitions. Word has length 44 [2018-01-21 10:36:57,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:57,135 INFO L432 AbstractCegarLoop]: Abstraction has 46 states and 46 transitions. [2018-01-21 10:36:57,135 INFO L433 AbstractCegarLoop]: Interpolant automaton has 60 states. [2018-01-21 10:36:57,135 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 46 transitions. [2018-01-21 10:36:57,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-21 10:36:57,135 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:57,135 INFO L322 BasicCegarLoop]: trace histogram [28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:57,135 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:57,136 INFO L82 PathProgramCache]: Analyzing trace with hash 209622800, now seen corresponding path program 28 times [2018-01-21 10:36:57,136 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:57,136 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:57,136 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:57,137 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:57,137 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:57,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:57,148 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:57,498 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:57,498 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:57,498 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:57,499 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:57,499 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:57,499 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:57,499 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:57,507 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:36:57,507 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:36:57,521 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:57,523 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:57,820 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:57,820 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:58,782 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:58,801 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:58,801 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:58,805 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:36:58,805 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:36:58,845 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:58,848 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:58,854 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:58,855 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:59,081 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:59,082 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:59,082 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32, 32, 32] total 92 [2018-01-21 10:36:59,082 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:59,082 INFO L409 AbstractCegarLoop]: Interpolant automaton has 62 states [2018-01-21 10:36:59,082 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2018-01-21 10:36:59,083 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2895, Invalid=5477, Unknown=0, NotChecked=0, Total=8372 [2018-01-21 10:36:59,083 INFO L87 Difference]: Start difference. First operand 46 states and 46 transitions. Second operand 62 states. [2018-01-21 10:36:59,145 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:59,145 INFO L93 Difference]: Finished difference Result 56 states and 56 transitions. [2018-01-21 10:36:59,145 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-21 10:36:59,145 INFO L78 Accepts]: Start accepts. Automaton has 62 states. Word has length 45 [2018-01-21 10:36:59,145 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:59,145 INFO L225 Difference]: With dead ends: 56 [2018-01-21 10:36:59,145 INFO L226 Difference]: Without dead ends: 47 [2018-01-21 10:36:59,146 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 211 GetRequests, 118 SyntacticMatches, 2 SemanticMatches, 91 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4012 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=2958, Invalid=5598, Unknown=0, NotChecked=0, Total=8556 [2018-01-21 10:36:59,146 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-01-21 10:36:59,148 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2018-01-21 10:36:59,148 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-01-21 10:36:59,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 47 transitions. [2018-01-21 10:36:59,148 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 47 transitions. Word has length 45 [2018-01-21 10:36:59,149 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:59,149 INFO L432 AbstractCegarLoop]: Abstraction has 47 states and 47 transitions. [2018-01-21 10:36:59,149 INFO L433 AbstractCegarLoop]: Interpolant automaton has 62 states. [2018-01-21 10:36:59,149 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 47 transitions. [2018-01-21 10:36:59,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-21 10:36:59,149 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:59,149 INFO L322 BasicCegarLoop]: trace histogram [29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:59,149 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:59,149 INFO L82 PathProgramCache]: Analyzing trace with hash 801364363, now seen corresponding path program 29 times [2018-01-21 10:36:59,149 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:59,150 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:59,150 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:59,150 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:59,150 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:59,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:59,161 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:59,528 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:59,528 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:59,528 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:59,528 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:59,528 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:59,528 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:59,528 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:59,533 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:36:59,533 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:59,537 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:59,537 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:59,538 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:59,539 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:59,540 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:59,540 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:59,541 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:59,542 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:59,543 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:59,543 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:59,544 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:59,545 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:59,546 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:59,547 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:59,548 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:59,551 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:59,552 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:59,554 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:59,861 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:59,861 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:00,867 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:00,887 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:00,905 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:00,908 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:37:00,908 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:00,914 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:00,915 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:00,919 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:00,922 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:00,927 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:00,931 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:00,936 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:00,942 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:00,948 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:00,954 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:00,961 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:00,968 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:00,976 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:00,984 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:00,993 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:01,007 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:01,019 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:01,023 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:01,029 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:01,029 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:01,296 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:01,297 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:01,297 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 33] total 95 [2018-01-21 10:37:01,297 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:01,297 INFO L409 AbstractCegarLoop]: Interpolant automaton has 64 states [2018-01-21 10:37:01,297 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2018-01-21 10:37:01,298 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3086, Invalid=5844, Unknown=0, NotChecked=0, Total=8930 [2018-01-21 10:37:01,298 INFO L87 Difference]: Start difference. First operand 47 states and 47 transitions. Second operand 64 states. [2018-01-21 10:37:01,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:01,367 INFO L93 Difference]: Finished difference Result 57 states and 57 transitions. [2018-01-21 10:37:01,367 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-21 10:37:01,368 INFO L78 Accepts]: Start accepts. Automaton has 64 states. Word has length 46 [2018-01-21 10:37:01,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:01,368 INFO L225 Difference]: With dead ends: 57 [2018-01-21 10:37:01,368 INFO L226 Difference]: Without dead ends: 48 [2018-01-21 10:37:01,369 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 216 GetRequests, 120 SyntacticMatches, 2 SemanticMatches, 94 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4328 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=3151, Invalid=5969, Unknown=0, NotChecked=0, Total=9120 [2018-01-21 10:37:01,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-01-21 10:37:01,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-01-21 10:37:01,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-21 10:37:01,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-01-21 10:37:01,371 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 46 [2018-01-21 10:37:01,371 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:01,371 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-01-21 10:37:01,371 INFO L433 AbstractCegarLoop]: Interpolant automaton has 64 states. [2018-01-21 10:37:01,371 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-01-21 10:37:01,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-21 10:37:01,372 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:01,372 INFO L322 BasicCegarLoop]: trace histogram [30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:01,372 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:01,372 INFO L82 PathProgramCache]: Analyzing trace with hash 1965483632, now seen corresponding path program 30 times [2018-01-21 10:37:01,372 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:01,373 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:01,373 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:01,373 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:01,373 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:01,380 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:01,381 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:01,771 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:01,771 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:01,771 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:01,771 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:01,771 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:01,771 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:01,771 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:01,776 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:37:01,776 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:37:01,782 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:01,784 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:01,785 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:01,786 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:01,787 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:01,788 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:01,789 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:01,790 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:01,791 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:01,792 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:01,793 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:01,794 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:01,795 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:01,796 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:01,797 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:01,799 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:01,799 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:01,801 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:02,124 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:02,124 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:03,187 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:03,206 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:03,207 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:03,209 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:37:03,209 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:37:03,218 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:03,225 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:03,233 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:03,241 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:03,249 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:03,257 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:03,266 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:03,276 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:03,286 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:03,296 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:03,307 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:03,318 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:03,330 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:03,342 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:03,355 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:03,368 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:03,378 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:03,381 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:03,388 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:03,388 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:03,656 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:03,657 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:03,658 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 34] total 98 [2018-01-21 10:37:03,658 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:03,658 INFO L409 AbstractCegarLoop]: Interpolant automaton has 66 states [2018-01-21 10:37:03,658 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 66 interpolants. [2018-01-21 10:37:03,658 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3283, Invalid=6223, Unknown=0, NotChecked=0, Total=9506 [2018-01-21 10:37:03,659 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 66 states. [2018-01-21 10:37:03,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:03,715 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2018-01-21 10:37:03,716 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-21 10:37:03,716 INFO L78 Accepts]: Start accepts. Automaton has 66 states. Word has length 47 [2018-01-21 10:37:03,716 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:03,716 INFO L225 Difference]: With dead ends: 58 [2018-01-21 10:37:03,716 INFO L226 Difference]: Without dead ends: 49 [2018-01-21 10:37:03,717 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 221 GetRequests, 122 SyntacticMatches, 2 SemanticMatches, 97 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4656 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=3350, Invalid=6352, Unknown=0, NotChecked=0, Total=9702 [2018-01-21 10:37:03,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-01-21 10:37:03,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2018-01-21 10:37:03,718 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-01-21 10:37:03,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 49 transitions. [2018-01-21 10:37:03,719 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 49 transitions. Word has length 47 [2018-01-21 10:37:03,719 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:03,719 INFO L432 AbstractCegarLoop]: Abstraction has 49 states and 49 transitions. [2018-01-21 10:37:03,719 INFO L433 AbstractCegarLoop]: Interpolant automaton has 66 states. [2018-01-21 10:37:03,719 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 49 transitions. [2018-01-21 10:37:03,719 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-21 10:37:03,719 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:03,719 INFO L322 BasicCegarLoop]: trace histogram [31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:03,719 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:03,720 INFO L82 PathProgramCache]: Analyzing trace with hash -601524693, now seen corresponding path program 31 times [2018-01-21 10:37:03,720 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:03,720 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:03,720 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:03,720 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:03,720 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:03,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:03,728 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:04,130 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:04,130 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:04,130 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:04,130 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:04,130 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:04,130 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:04,130 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:04,137 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:37:04,138 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:37:04,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:04,152 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:04,755 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:04,755 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:05,880 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:05,900 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:05,900 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:05,903 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:37:05,903 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:37:05,934 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:05,938 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:05,944 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:05,944 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:06,206 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:06,207 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:06,207 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 101 [2018-01-21 10:37:06,207 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:06,208 INFO L409 AbstractCegarLoop]: Interpolant automaton has 68 states [2018-01-21 10:37:06,208 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2018-01-21 10:37:06,208 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3486, Invalid=6614, Unknown=0, NotChecked=0, Total=10100 [2018-01-21 10:37:06,208 INFO L87 Difference]: Start difference. First operand 49 states and 49 transitions. Second operand 68 states. [2018-01-21 10:37:06,286 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:06,286 INFO L93 Difference]: Finished difference Result 59 states and 59 transitions. [2018-01-21 10:37:06,286 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-21 10:37:06,287 INFO L78 Accepts]: Start accepts. Automaton has 68 states. Word has length 48 [2018-01-21 10:37:06,287 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:06,287 INFO L225 Difference]: With dead ends: 59 [2018-01-21 10:37:06,287 INFO L226 Difference]: Without dead ends: 50 [2018-01-21 10:37:06,288 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 226 GetRequests, 124 SyntacticMatches, 2 SemanticMatches, 100 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4996 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=3555, Invalid=6747, Unknown=0, NotChecked=0, Total=10302 [2018-01-21 10:37:06,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-01-21 10:37:06,289 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2018-01-21 10:37:06,289 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-01-21 10:37:06,290 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 50 transitions. [2018-01-21 10:37:06,290 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 50 transitions. Word has length 48 [2018-01-21 10:37:06,290 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:06,290 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 50 transitions. [2018-01-21 10:37:06,290 INFO L433 AbstractCegarLoop]: Interpolant automaton has 68 states. [2018-01-21 10:37:06,290 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 50 transitions. [2018-01-21 10:37:06,290 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-01-21 10:37:06,290 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:06,291 INFO L322 BasicCegarLoop]: trace histogram [32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:06,291 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:06,291 INFO L82 PathProgramCache]: Analyzing trace with hash 1425595856, now seen corresponding path program 32 times [2018-01-21 10:37:06,291 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:06,292 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:06,292 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:37:06,292 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:06,292 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:06,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:06,305 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:06,818 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:06,818 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:06,819 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:06,819 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:06,819 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:06,819 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:06,819 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:06,824 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:37:06,824 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:06,831 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:06,837 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:06,838 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:06,840 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:07,204 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:07,204 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:08,367 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:08,386 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:08,387 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:08,389 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:37:08,390 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:08,399 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:08,413 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:08,426 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:08,430 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:08,436 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:08,436 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:08,709 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:08,710 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:08,710 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 36, 36, 36] total 104 [2018-01-21 10:37:08,710 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:08,710 INFO L409 AbstractCegarLoop]: Interpolant automaton has 70 states [2018-01-21 10:37:08,711 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants. [2018-01-21 10:37:08,711 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3695, Invalid=7017, Unknown=0, NotChecked=0, Total=10712 [2018-01-21 10:37:08,711 INFO L87 Difference]: Start difference. First operand 50 states and 50 transitions. Second operand 70 states. [2018-01-21 10:37:08,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:08,856 INFO L93 Difference]: Finished difference Result 60 states and 60 transitions. [2018-01-21 10:37:08,856 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-01-21 10:37:08,856 INFO L78 Accepts]: Start accepts. Automaton has 70 states. Word has length 49 [2018-01-21 10:37:08,857 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:08,857 INFO L225 Difference]: With dead ends: 60 [2018-01-21 10:37:08,857 INFO L226 Difference]: Without dead ends: 51 [2018-01-21 10:37:08,858 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 231 GetRequests, 126 SyntacticMatches, 2 SemanticMatches, 103 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5348 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=3766, Invalid=7154, Unknown=0, NotChecked=0, Total=10920 [2018-01-21 10:37:08,858 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-01-21 10:37:08,859 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2018-01-21 10:37:08,860 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-01-21 10:37:08,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 51 transitions. [2018-01-21 10:37:08,860 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 51 transitions. Word has length 49 [2018-01-21 10:37:08,860 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:08,860 INFO L432 AbstractCegarLoop]: Abstraction has 51 states and 51 transitions. [2018-01-21 10:37:08,861 INFO L433 AbstractCegarLoop]: Interpolant automaton has 70 states. [2018-01-21 10:37:08,861 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 51 transitions. [2018-01-21 10:37:08,861 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-21 10:37:08,861 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:08,861 INFO L322 BasicCegarLoop]: trace histogram [33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:08,861 INFO L371 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:08,861 INFO L82 PathProgramCache]: Analyzing trace with hash -158176565, now seen corresponding path program 33 times [2018-01-21 10:37:08,861 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:08,862 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:08,862 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:08,862 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:08,862 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:08,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:08,871 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:09,374 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:09,374 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:09,374 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:09,375 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:09,375 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:09,375 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:09,375 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:09,381 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:37:09,381 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:37:09,388 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:09,390 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:09,390 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:09,391 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:09,392 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:09,393 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:09,394 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:09,395 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:09,396 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:09,398 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:09,399 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:09,400 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:09,401 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:09,402 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:09,404 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:09,405 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:09,406 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:09,407 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:09,408 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:09,409 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:09,792 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:09,792 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:11,005 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:11,024 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:11,025 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:11,027 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:37:11,027 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:37:11,036 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:11,042 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:11,050 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:11,058 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:11,066 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:11,074 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:11,084 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:11,093 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:11,104 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:11,114 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:11,125 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:11,137 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:11,149 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:11,161 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:11,174 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:11,188 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:11,201 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:11,215 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:11,225 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:11,229 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:11,236 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:11,236 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:11,525 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:11,526 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:11,526 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 107 [2018-01-21 10:37:11,526 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:11,527 INFO L409 AbstractCegarLoop]: Interpolant automaton has 72 states [2018-01-21 10:37:11,527 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 72 interpolants. [2018-01-21 10:37:11,527 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3910, Invalid=7432, Unknown=0, NotChecked=0, Total=11342 [2018-01-21 10:37:11,527 INFO L87 Difference]: Start difference. First operand 51 states and 51 transitions. Second operand 72 states. [2018-01-21 10:37:11,595 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:11,596 INFO L93 Difference]: Finished difference Result 61 states and 61 transitions. [2018-01-21 10:37:11,596 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-01-21 10:37:11,596 INFO L78 Accepts]: Start accepts. Automaton has 72 states. Word has length 50 [2018-01-21 10:37:11,596 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:11,596 INFO L225 Difference]: With dead ends: 61 [2018-01-21 10:37:11,596 INFO L226 Difference]: Without dead ends: 52 [2018-01-21 10:37:11,597 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 236 GetRequests, 128 SyntacticMatches, 2 SemanticMatches, 106 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5712 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=3983, Invalid=7573, Unknown=0, NotChecked=0, Total=11556 [2018-01-21 10:37:11,597 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-01-21 10:37:11,598 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-01-21 10:37:11,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-01-21 10:37:11,599 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 52 transitions. [2018-01-21 10:37:11,599 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 52 transitions. Word has length 50 [2018-01-21 10:37:11,599 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:11,599 INFO L432 AbstractCegarLoop]: Abstraction has 52 states and 52 transitions. [2018-01-21 10:37:11,599 INFO L433 AbstractCegarLoop]: Interpolant automaton has 72 states. [2018-01-21 10:37:11,599 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 52 transitions. [2018-01-21 10:37:11,600 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-21 10:37:11,600 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:11,600 INFO L322 BasicCegarLoop]: trace histogram [34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:11,600 INFO L371 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:11,600 INFO L82 PathProgramCache]: Analyzing trace with hash -2010481360, now seen corresponding path program 34 times [2018-01-21 10:37:11,600 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:11,600 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:11,601 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:11,601 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:11,601 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:11,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:11,609 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:12,158 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:12,158 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:12,158 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:12,158 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:12,158 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:12,158 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:12,158 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:12,163 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:37:12,163 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:37:12,179 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:12,181 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:12,579 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:12,579 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:13,837 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:13,856 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:13,856 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:13,859 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:37:13,859 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:37:13,902 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:13,905 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:13,912 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:13,912 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:14,213 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:14,214 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:14,214 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 110 [2018-01-21 10:37:14,214 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:14,214 INFO L409 AbstractCegarLoop]: Interpolant automaton has 74 states [2018-01-21 10:37:14,215 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 74 interpolants. [2018-01-21 10:37:14,215 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4131, Invalid=7859, Unknown=0, NotChecked=0, Total=11990 [2018-01-21 10:37:14,215 INFO L87 Difference]: Start difference. First operand 52 states and 52 transitions. Second operand 74 states. [2018-01-21 10:37:14,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:14,382 INFO L93 Difference]: Finished difference Result 62 states and 62 transitions. [2018-01-21 10:37:14,382 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-01-21 10:37:14,382 INFO L78 Accepts]: Start accepts. Automaton has 74 states. Word has length 51 [2018-01-21 10:37:14,383 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:14,383 INFO L225 Difference]: With dead ends: 62 [2018-01-21 10:37:14,383 INFO L226 Difference]: Without dead ends: 53 [2018-01-21 10:37:14,384 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 241 GetRequests, 130 SyntacticMatches, 2 SemanticMatches, 109 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6088 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=4206, Invalid=8004, Unknown=0, NotChecked=0, Total=12210 [2018-01-21 10:37:14,384 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-01-21 10:37:14,385 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-01-21 10:37:14,385 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-01-21 10:37:14,386 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 53 transitions. [2018-01-21 10:37:14,386 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 53 transitions. Word has length 51 [2018-01-21 10:37:14,386 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:14,386 INFO L432 AbstractCegarLoop]: Abstraction has 53 states and 53 transitions. [2018-01-21 10:37:14,386 INFO L433 AbstractCegarLoop]: Interpolant automaton has 74 states. [2018-01-21 10:37:14,386 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 53 transitions. [2018-01-21 10:37:14,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-21 10:37:14,386 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:14,386 INFO L322 BasicCegarLoop]: trace histogram [35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:14,387 INFO L371 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:14,387 INFO L82 PathProgramCache]: Analyzing trace with hash 697612139, now seen corresponding path program 35 times [2018-01-21 10:37:14,387 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:14,387 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:14,387 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:14,388 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:14,388 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:14,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:14,398 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:15,082 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:15,082 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:15,082 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:15,082 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:15,082 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:15,082 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:15,082 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:15,092 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:37:15,092 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:15,097 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:15,098 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:15,099 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:15,100 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:15,101 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:15,102 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:15,103 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:15,104 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:15,105 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:15,106 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:15,107 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:15,108 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:15,110 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:15,111 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:15,112 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:15,114 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:15,115 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:15,116 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:15,120 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:15,122 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:15,124 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:15,572 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:15,572 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:16,887 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:16,906 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:16,906 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:16,909 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:37:16,909 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:16,914 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:16,916 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:16,919 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:16,922 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:16,926 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:16,930 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:16,935 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:16,940 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:16,945 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:16,951 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:16,957 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:16,964 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:16,971 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:16,978 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:16,987 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:16,995 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:17,004 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:17,014 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:17,028 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:17,040 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:17,043 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:17,050 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:17,050 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:17,361 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:17,362 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:17,363 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39, 39, 39, 39] total 113 [2018-01-21 10:37:17,363 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:17,363 INFO L409 AbstractCegarLoop]: Interpolant automaton has 76 states [2018-01-21 10:37:17,363 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 76 interpolants. [2018-01-21 10:37:17,364 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4358, Invalid=8298, Unknown=0, NotChecked=0, Total=12656 [2018-01-21 10:37:17,364 INFO L87 Difference]: Start difference. First operand 53 states and 53 transitions. Second operand 76 states. [2018-01-21 10:37:17,439 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:17,439 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-01-21 10:37:17,439 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-01-21 10:37:17,439 INFO L78 Accepts]: Start accepts. Automaton has 76 states. Word has length 52 [2018-01-21 10:37:17,440 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:17,440 INFO L225 Difference]: With dead ends: 63 [2018-01-21 10:37:17,440 INFO L226 Difference]: Without dead ends: 54 [2018-01-21 10:37:17,441 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 246 GetRequests, 132 SyntacticMatches, 2 SemanticMatches, 112 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6476 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=4435, Invalid=8447, Unknown=0, NotChecked=0, Total=12882 [2018-01-21 10:37:17,441 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-01-21 10:37:17,442 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-01-21 10:37:17,442 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-01-21 10:37:17,443 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 54 transitions. [2018-01-21 10:37:17,443 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 54 transitions. Word has length 52 [2018-01-21 10:37:17,443 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:17,443 INFO L432 AbstractCegarLoop]: Abstraction has 54 states and 54 transitions. [2018-01-21 10:37:17,443 INFO L433 AbstractCegarLoop]: Interpolant automaton has 76 states. [2018-01-21 10:37:17,443 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 54 transitions. [2018-01-21 10:37:17,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-01-21 10:37:17,444 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:17,444 INFO L322 BasicCegarLoop]: trace histogram [36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:17,444 INFO L371 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:17,444 INFO L82 PathProgramCache]: Analyzing trace with hash -1250835312, now seen corresponding path program 36 times [2018-01-21 10:37:17,444 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:17,444 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:17,445 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:17,445 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:17,445 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:17,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:17,454 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:18,016 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:18,017 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:18,017 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:18,017 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:18,017 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:18,017 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:18,017 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:18,022 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:37:18,022 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:37:18,028 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:18,030 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:18,031 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:18,032 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:18,033 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:18,034 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:18,035 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:18,036 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:18,037 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:18,038 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:18,039 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:18,040 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:18,041 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:18,042 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:18,043 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:18,044 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:18,045 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:18,047 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:18,048 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:18,048 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:18,050 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:18,492 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:18,492 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:19,862 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:19,882 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:19,882 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:19,885 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:37:19,885 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:37:19,896 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:19,903 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:19,911 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:19,919 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:19,927 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:19,936 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:19,946 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:19,956 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:19,966 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:19,976 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:19,987 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:19,998 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:20,010 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:20,029 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:20,041 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:20,055 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:20,068 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:20,082 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:20,097 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:20,108 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:20,112 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:20,119 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:20,119 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:20,435 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:20,436 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:20,436 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40, 40, 40, 40] total 116 [2018-01-21 10:37:20,436 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:20,437 INFO L409 AbstractCegarLoop]: Interpolant automaton has 78 states [2018-01-21 10:37:20,437 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 78 interpolants. [2018-01-21 10:37:20,437 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4591, Invalid=8749, Unknown=0, NotChecked=0, Total=13340 [2018-01-21 10:37:20,437 INFO L87 Difference]: Start difference. First operand 54 states and 54 transitions. Second operand 78 states. [2018-01-21 10:37:20,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:20,515 INFO L93 Difference]: Finished difference Result 64 states and 64 transitions. [2018-01-21 10:37:20,515 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-01-21 10:37:20,515 INFO L78 Accepts]: Start accepts. Automaton has 78 states. Word has length 53 [2018-01-21 10:37:20,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:20,516 INFO L225 Difference]: With dead ends: 64 [2018-01-21 10:37:20,516 INFO L226 Difference]: Without dead ends: 55 [2018-01-21 10:37:20,517 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 251 GetRequests, 134 SyntacticMatches, 2 SemanticMatches, 115 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6876 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=4670, Invalid=8902, Unknown=0, NotChecked=0, Total=13572 [2018-01-21 10:37:20,517 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-01-21 10:37:20,518 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2018-01-21 10:37:20,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-01-21 10:37:20,519 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 55 transitions. [2018-01-21 10:37:20,519 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 55 transitions. Word has length 53 [2018-01-21 10:37:20,519 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:20,519 INFO L432 AbstractCegarLoop]: Abstraction has 55 states and 55 transitions. [2018-01-21 10:37:20,519 INFO L433 AbstractCegarLoop]: Interpolant automaton has 78 states. [2018-01-21 10:37:20,519 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 55 transitions. [2018-01-21 10:37:20,520 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-01-21 10:37:20,520 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:20,520 INFO L322 BasicCegarLoop]: trace histogram [37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:20,520 INFO L371 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:20,520 INFO L82 PathProgramCache]: Analyzing trace with hash -1523164149, now seen corresponding path program 37 times [2018-01-21 10:37:20,520 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:20,521 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:20,521 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:20,521 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:20,521 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:20,530 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:20,530 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:21,079 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:21,080 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:21,107 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:21,107 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:21,107 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:21,107 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:21,107 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:21,113 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:37:21,113 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:37:21,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:21,133 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:21,613 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:21,613 INFO L314 TraceCheckSpWp]: Computing backward predicates... Received shutdown request... [2018-01-21 10:37:22,222 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-21 10:37:22,222 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 10:37:22,224 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 10:37:22,224 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 10:37:22,224 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 10:37:22,224 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 10:37:22,224 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 10:37:22,224 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 10:37:22,224 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 10:37:22,224 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == mainErr0EnsuresViolation======== [2018-01-21 10:37:22,225 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 10:37:22,225 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 10:37:22,225 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 10:37:22,226 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 21.01 10:37:22 BoogieIcfgContainer [2018-01-21 10:37:22,226 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-21 10:37:22,226 INFO L168 Benchmark]: Toolchain (without parser) took 55766.08 ms. Allocated memory was 305.1 MB in the beginning and 833.6 MB in the end (delta: 528.5 MB). Free memory was 264.4 MB in the beginning and 487.2 MB in the end (delta: -222.8 MB). Peak memory consumption was 305.7 MB. Max. memory is 5.3 GB. [2018-01-21 10:37:22,227 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 305.1 MB. Free memory is still 269.4 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-21 10:37:22,227 INFO L168 Benchmark]: CACSL2BoogieTranslator took 162.24 ms. Allocated memory is still 305.1 MB. Free memory was 263.4 MB in the beginning and 256.3 MB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 5.3 GB. [2018-01-21 10:37:22,227 INFO L168 Benchmark]: Boogie Preprocessor took 28.35 ms. Allocated memory is still 305.1 MB. Free memory was 256.3 MB in the beginning and 254.3 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-21 10:37:22,228 INFO L168 Benchmark]: RCFGBuilder took 172.29 ms. Allocated memory is still 305.1 MB. Free memory was 254.3 MB in the beginning and 242.7 MB in the end (delta: 11.6 MB). Peak memory consumption was 11.6 MB. Max. memory is 5.3 GB. [2018-01-21 10:37:22,228 INFO L168 Benchmark]: TraceAbstraction took 55396.19 ms. Allocated memory was 305.1 MB in the beginning and 833.6 MB in the end (delta: 528.5 MB). Free memory was 242.7 MB in the beginning and 487.2 MB in the end (delta: -244.5 MB). Peak memory consumption was 284.0 MB. Max. memory is 5.3 GB. [2018-01-21 10:37:22,229 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 305.1 MB. Free memory is still 269.4 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 162.24 ms. Allocated memory is still 305.1 MB. Free memory was 263.4 MB in the beginning and 256.3 MB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 28.35 ms. Allocated memory is still 305.1 MB. Free memory was 256.3 MB in the beginning and 254.3 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 172.29 ms. Allocated memory is still 305.1 MB. Free memory was 254.3 MB in the beginning and 242.7 MB in the end (delta: 11.6 MB). Peak memory consumption was 11.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 55396.19 ms. Allocated memory was 305.1 MB in the beginning and 833.6 MB in the end (delta: 528.5 MB). Free memory was 242.7 MB in the beginning and 487.2 MB in the end (delta: -244.5 MB). Peak memory consumption was 284.0 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 17 LocStat_MAX_WEQGRAPH_SIZE : 2 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 102 LocStat_NO_SUPPORTING_DISEQUALITIES : 23 LocStat_NO_DISJUNCTIONS : -34 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 24 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 33 TransStat_NO_SUPPORTING_DISEQUALITIES : 5 TransStat_NO_DISJUNCTIONS : 24 TransStat_MAX_NO_DISJUNCTIONS : 1 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.254300 RENAME_VARIABLES(MILLISECONDS) : 0.115494 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.207015 PROJECTAWAY(MILLISECONDS) : 0.094385 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.198535 DISJOIN(MILLISECONDS) : 0.000000 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.149098 ADD_EQUALITY(MILLISECONDS) : 0.052509 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.011654 #CONJOIN_DISJUNCTIVE : 32 #RENAME_VARIABLES : 62 #UNFREEZE : 0 #CONJOIN : 62 #PROJECTAWAY : 64 #ADD_WEAK_EQUALITY : 4 #DISJOIN : 0 #RENAME_VARIABLES_DISJUNCTIVE : 62 #ADD_EQUALITY : 33 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1]: not all allocated memory was freed not all allocated memory was freed We found a FailurePath: - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.initErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. UNSAFE Result, 0.1s OverallTime, 1 OverallIterations, 1 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 3 NumberOfCodeBlocks, 3 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1). Cancelled while BasicCegarLoop was analyzing trace of length 55 with TraceHistMax 37, while TraceCheckSpWp was constructing backward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 8. - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.startErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 55.1s OverallTime, 38 OverallIterations, 37 TraceHistogramMax, 2.5s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 595 SDtfs, 117 SDslu, 12907 SDs, 0 SdLazy, 2847 SolverSat, 135 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 5891 GetRequests, 3566 SyntacticMatches, 72 SemanticMatches, 2253 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 83344 ImplicationChecksByTransitivity, 32.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=55occurred in iteration=37, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.3s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 37 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 3.0s SatisfiabilityAnalysisTime, 45.7s InterpolantComputationTime, 3851 NumberOfCodeBlocks, 3851 NumberOfCodeBlocksAsserted, 499 NumberOfCheckSat, 6226 ConstructedInterpolants, 0 QuantifiedInterpolants, 1009008 SizeOfPredicates, 72 NumberOfNonLiveVariables, 8388 ConjunctsInSsa, 1548 ConjunctsInUnsatCore, 181 InterpolantComputations, 1 PerfectInterpolantSequences, 0/42180 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 20]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 20). Cancelled while IsEmpty was searching accepting run (input had 21 states). - StatisticsResult: Ultimate Automizer benchmark data for error location: mainErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 0.0s OverallTime, 0 OverallIterations, 0 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-21_10-37-22-240.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-21_10-37-22-240.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-21_10-37-22-240.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-21_10-37-22-240.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-1-2018-01-21_10-37-22-240.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-2-2018-01-21_10-37-22-240.csv Completed graceful shutdown