java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memset3_true-valid-memsafety_true-termination.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-2f49842 [2018-01-21 10:36:27,776 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-21 10:36:27,778 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-21 10:36:27,793 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-21 10:36:27,793 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-21 10:36:27,794 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-21 10:36:27,795 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-21 10:36:27,796 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-21 10:36:27,798 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-21 10:36:27,798 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-21 10:36:27,799 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-21 10:36:27,800 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-21 10:36:27,801 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-21 10:36:27,802 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-21 10:36:27,803 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-21 10:36:27,806 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-21 10:36:27,808 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-21 10:36:27,810 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-21 10:36:27,811 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-21 10:36:27,813 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-21 10:36:27,815 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-01-21 10:36:27,820 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-21 10:36:27,821 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-21 10:36:27,821 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf [2018-01-21 10:36:27,831 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-21 10:36:27,832 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-21 10:36:27,832 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-21 10:36:27,833 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-21 10:36:27,833 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-21 10:36:27,833 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-21 10:36:27,833 INFO L133 SettingsManager]: * Precise comparison operator=true [2018-01-21 10:36:27,833 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-21 10:36:27,834 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-21 10:36:27,834 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-21 10:36:27,835 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-21 10:36:27,835 INFO L133 SettingsManager]: * Check allocation purity=true [2018-01-21 10:36:27,835 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-21 10:36:27,835 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-21 10:36:27,835 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-21 10:36:27,836 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-01-21 10:36:27,836 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-21 10:36:27,836 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-01-21 10:36:27,836 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-21 10:36:27,836 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-01-21 10:36:27,836 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-01-21 10:36:27,837 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-21 10:36:27,837 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-21 10:36:27,837 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-21 10:36:27,837 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-21 10:36:27,837 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-21 10:36:27,838 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 10:36:27,838 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-21 10:36:27,838 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-21 10:36:27,838 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-21 10:36:27,838 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-21 10:36:27,839 INFO L133 SettingsManager]: * Stop after first violation was found=false [2018-01-21 10:36:27,839 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-21 10:36:27,839 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-21 10:36:27,839 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-21 10:36:27,839 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-21 10:36:27,839 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-21 10:36:27,840 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-21 10:36:27,841 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-21 10:36:27,877 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-21 10:36:27,890 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-21 10:36:27,894 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-21 10:36:27,896 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-21 10:36:27,897 INFO L276 PluginConnector]: CDTParser initialized [2018-01-21 10:36:27,898 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memset3_true-valid-memsafety_true-termination.c [2018-01-21 10:36:28,001 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-21 10:36:28,004 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-21 10:36:28,005 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-21 10:36:28,005 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-21 10:36:28,011 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-21 10:36:28,012 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 10:36:27" (1/1) ... [2018-01-21 10:36:28,015 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@45bc08e8 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:36:28, skipping insertion in model container [2018-01-21 10:36:28,015 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 10:36:27" (1/1) ... [2018-01-21 10:36:28,030 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 10:36:28,047 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 10:36:28,160 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 10:36:28,175 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 10:36:28,180 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:36:28 WrapperNode [2018-01-21 10:36:28,180 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-21 10:36:28,181 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-21 10:36:28,181 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-21 10:36:28,181 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-21 10:36:28,195 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:36:28" (1/1) ... [2018-01-21 10:36:28,195 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:36:28" (1/1) ... [2018-01-21 10:36:28,203 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:36:28" (1/1) ... [2018-01-21 10:36:28,204 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:36:28" (1/1) ... [2018-01-21 10:36:28,206 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:36:28" (1/1) ... [2018-01-21 10:36:28,208 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:36:28" (1/1) ... [2018-01-21 10:36:28,209 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:36:28" (1/1) ... [2018-01-21 10:36:28,210 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-21 10:36:28,211 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-21 10:36:28,211 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-21 10:36:28,211 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-21 10:36:28,212 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:36:28" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 10:36:28,264 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-21 10:36:28,264 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-21 10:36:28,264 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-21 10:36:28,265 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-21 10:36:28,265 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-21 10:36:28,265 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-21 10:36:28,265 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-21 10:36:28,265 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-21 10:36:28,265 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-21 10:36:28,265 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-21 10:36:28,265 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-21 10:36:28,266 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-21 10:36:28,402 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-21 10:36:28,402 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 10:36:28 BoogieIcfgContainer [2018-01-21 10:36:28,403 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-21 10:36:28,403 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-21 10:36:28,403 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-21 10:36:28,405 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-21 10:36:28,405 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 21.01 10:36:27" (1/3) ... [2018-01-21 10:36:28,406 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7a784f0c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 10:36:28, skipping insertion in model container [2018-01-21 10:36:28,407 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:36:28" (2/3) ... [2018-01-21 10:36:28,407 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7a784f0c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 10:36:28, skipping insertion in model container [2018-01-21 10:36:28,407 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 10:36:28" (3/3) ... [2018-01-21 10:36:28,409 INFO L105 eAbstractionObserver]: Analyzing ICFG memset3_true-valid-memsafety_true-termination.c [2018-01-21 10:36:28,417 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-21 10:36:28,423 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-01-21 10:36:28,464 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 10:36:28,464 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 10:36:28,464 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 10:36:28,464 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 10:36:28,464 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 10:36:28,465 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 10:36:28,465 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 10:36:28,465 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.initErr0EnsuresViolation======== [2018-01-21 10:36:28,466 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 10:36:28,487 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states. [2018-01-21 10:36:28,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-01-21 10:36:28,494 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:28,495 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-01-21 10:36:28,495 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.initErr0EnsuresViolation]=== [2018-01-21 10:36:28,500 INFO L82 PathProgramCache]: Analyzing trace with hash 51896, now seen corresponding path program 1 times [2018-01-21 10:36:28,503 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:28,551 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:28,551 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:28,552 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:28,552 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:28,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 10:36:28,593 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 10:36:28,609 INFO L381 BasicCegarLoop]: Counterexample might be feasible [2018-01-21 10:36:28,616 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-21 10:36:28,622 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 10:36:28,623 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 10:36:28,623 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 10:36:28,623 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 10:36:28,623 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 10:36:28,623 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 10:36:28,623 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 10:36:28,624 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.startErr0EnsuresViolation======== [2018-01-21 10:36:28,624 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 10:36:28,625 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states. [2018-01-21 10:36:28,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-01-21 10:36:28,626 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:28,626 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:28,627 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:28,627 INFO L82 PathProgramCache]: Analyzing trace with hash 126067280, now seen corresponding path program 1 times [2018-01-21 10:36:28,627 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:28,628 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:28,628 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:28,629 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:28,629 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:28,657 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:28,665 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:28,760 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:28,762 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 10:36:28,762 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-21 10:36:28,763 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 10:36:28,765 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-21 10:36:28,781 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-21 10:36:28,782 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-21 10:36:28,786 INFO L87 Difference]: Start difference. First operand 22 states. Second operand 4 states. [2018-01-21 10:36:28,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:28,836 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-01-21 10:36:28,837 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-21 10:36:28,838 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 18 [2018-01-21 10:36:28,839 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:28,846 INFO L225 Difference]: With dead ends: 34 [2018-01-21 10:36:28,846 INFO L226 Difference]: Without dead ends: 20 [2018-01-21 10:36:28,907 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-21 10:36:28,923 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-01-21 10:36:28,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-01-21 10:36:28,936 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-01-21 10:36:28,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2018-01-21 10:36:28,937 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 18 [2018-01-21 10:36:28,938 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:28,938 INFO L432 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2018-01-21 10:36:28,938 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-21 10:36:28,938 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-01-21 10:36:28,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-21 10:36:28,938 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:28,939 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:28,939 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:28,939 INFO L82 PathProgramCache]: Analyzing trace with hash 763300235, now seen corresponding path program 1 times [2018-01-21 10:36:28,939 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:28,940 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:28,940 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:28,940 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:28,940 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:28,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:28,956 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:29,035 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:29,035 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:29,036 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:29,037 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 20 with the following transitions: [2018-01-21 10:36:29,039 INFO L201 CegarAbsIntRunner]: [0], [1], [3], [7], [9], [10], [14], [15], [16], [18], [19], [20], [21], [23], [24], [25], [26], [27], [28] [2018-01-21 10:36:29,083 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-21 10:36:29,083 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-21 10:36:29,364 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-21 10:36:29,365 INFO L268 AbstractInterpreter]: Visited 19 different actions 23 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 15 variables. [2018-01-21 10:36:29,376 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-21 10:36:29,376 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:29,376 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:29,387 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:29,387 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:36:29,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:29,425 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:29,486 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:29,486 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:29,628 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:29,653 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:29,654 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:29,658 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:29,659 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:36:29,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:29,686 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:29,692 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:29,692 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:29,852 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:29,853 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:29,853 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 11 [2018-01-21 10:36:29,853 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:29,854 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-21 10:36:29,855 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-21 10:36:29,855 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-01-21 10:36:29,855 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand 8 states. [2018-01-21 10:36:29,918 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:29,918 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-01-21 10:36:29,918 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-21 10:36:29,918 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 19 [2018-01-21 10:36:29,919 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:29,919 INFO L225 Difference]: With dead ends: 30 [2018-01-21 10:36:29,920 INFO L226 Difference]: Without dead ends: 21 [2018-01-21 10:36:29,921 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 80 GetRequests, 68 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=81, Unknown=0, NotChecked=0, Total=132 [2018-01-21 10:36:29,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2018-01-21 10:36:29,924 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-01-21 10:36:29,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-01-21 10:36:29,925 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-01-21 10:36:29,926 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 19 [2018-01-21 10:36:29,926 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:29,926 INFO L432 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-01-21 10:36:29,926 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-21 10:36:29,926 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-01-21 10:36:29,927 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-01-21 10:36:29,927 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:29,927 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:29,927 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:29,928 INFO L82 PathProgramCache]: Analyzing trace with hash -957314640, now seen corresponding path program 2 times [2018-01-21 10:36:29,928 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:29,929 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:29,929 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:29,929 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:29,930 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:29,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:29,943 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:30,034 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:30,034 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:30,034 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:30,035 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:30,035 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:30,035 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:30,035 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:30,044 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:36:30,044 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:30,058 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:30,060 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:30,061 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:30,062 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:30,114 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:30,114 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:30,263 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:30,294 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:30,295 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:30,302 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:36:30,303 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:30,318 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:30,326 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:30,332 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:30,335 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:30,340 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:30,340 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:30,436 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:30,438 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:30,438 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 14 [2018-01-21 10:36:30,438 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:30,439 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-21 10:36:30,439 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-21 10:36:30,439 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=113, Unknown=0, NotChecked=0, Total=182 [2018-01-21 10:36:30,440 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 10 states. [2018-01-21 10:36:30,461 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:30,461 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-01-21 10:36:30,462 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-21 10:36:30,462 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 20 [2018-01-21 10:36:30,462 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:30,463 INFO L225 Difference]: With dead ends: 31 [2018-01-21 10:36:30,463 INFO L226 Difference]: Without dead ends: 22 [2018-01-21 10:36:30,463 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 85 GetRequests, 70 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=80, Invalid=130, Unknown=0, NotChecked=0, Total=210 [2018-01-21 10:36:30,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-01-21 10:36:30,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-01-21 10:36:30,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-01-21 10:36:30,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2018-01-21 10:36:30,466 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 20 [2018-01-21 10:36:30,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:30,467 INFO L432 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2018-01-21 10:36:30,467 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-21 10:36:30,467 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-01-21 10:36:30,467 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-21 10:36:30,467 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:30,467 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:30,468 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:30,468 INFO L82 PathProgramCache]: Analyzing trace with hash 1538199083, now seen corresponding path program 3 times [2018-01-21 10:36:30,468 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:30,469 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:30,469 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:30,469 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:30,469 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:30,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:30,481 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:30,523 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:30,523 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:30,523 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:30,524 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:30,524 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:30,524 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:30,524 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:30,529 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:36:30,529 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:36:30,538 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:30,540 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:30,541 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:30,541 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:30,542 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:30,583 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:30,583 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:30,695 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:30,716 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:30,716 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:30,719 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:36:30,719 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:36:30,733 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:30,744 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:30,756 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:30,762 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:30,765 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:30,769 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:30,770 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:30,811 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:30,814 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:30,814 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 17 [2018-01-21 10:36:30,815 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:30,815 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-21 10:36:30,815 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-21 10:36:30,815 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=102, Invalid=170, Unknown=0, NotChecked=0, Total=272 [2018-01-21 10:36:30,815 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 12 states. [2018-01-21 10:36:30,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:30,846 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2018-01-21 10:36:30,846 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-21 10:36:30,846 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 21 [2018-01-21 10:36:30,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:30,847 INFO L225 Difference]: With dead ends: 32 [2018-01-21 10:36:30,847 INFO L226 Difference]: Without dead ends: 23 [2018-01-21 10:36:30,847 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 90 GetRequests, 72 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 79 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=115, Invalid=191, Unknown=0, NotChecked=0, Total=306 [2018-01-21 10:36:30,848 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-01-21 10:36:30,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-01-21 10:36:30,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-01-21 10:36:30,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 23 transitions. [2018-01-21 10:36:30,850 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 23 transitions. Word has length 21 [2018-01-21 10:36:30,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:30,850 INFO L432 AbstractCegarLoop]: Abstraction has 23 states and 23 transitions. [2018-01-21 10:36:30,850 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-21 10:36:30,850 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 23 transitions. [2018-01-21 10:36:30,851 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-21 10:36:30,851 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:30,851 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:30,851 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:30,851 INFO L82 PathProgramCache]: Analyzing trace with hash 1589713168, now seen corresponding path program 4 times [2018-01-21 10:36:30,851 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:30,852 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:30,852 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:30,852 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:30,852 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:30,864 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:30,864 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:30,927 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:30,927 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:30,927 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:30,927 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:30,927 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:30,927 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:30,927 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:30,933 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:36:30,934 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:36:30,946 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:30,947 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:30,976 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:30,976 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:31,113 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:31,134 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:31,135 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:31,138 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:36:31,138 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:36:31,166 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:31,171 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:31,177 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:31,178 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:31,254 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:31,256 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:31,257 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 20 [2018-01-21 10:36:31,257 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:31,257 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-21 10:36:31,258 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-21 10:36:31,258 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=239, Unknown=0, NotChecked=0, Total=380 [2018-01-21 10:36:31,258 INFO L87 Difference]: Start difference. First operand 23 states and 23 transitions. Second operand 14 states. [2018-01-21 10:36:31,287 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:31,287 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 10:36:31,287 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-21 10:36:31,287 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 22 [2018-01-21 10:36:31,287 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:31,288 INFO L225 Difference]: With dead ends: 33 [2018-01-21 10:36:31,288 INFO L226 Difference]: Without dead ends: 24 [2018-01-21 10:36:31,288 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 74 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 122 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=156, Invalid=264, Unknown=0, NotChecked=0, Total=420 [2018-01-21 10:36:31,288 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-01-21 10:36:31,290 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-01-21 10:36:31,290 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-01-21 10:36:31,291 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-01-21 10:36:31,291 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 22 [2018-01-21 10:36:31,291 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:31,291 INFO L432 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-01-21 10:36:31,291 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-21 10:36:31,291 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-01-21 10:36:31,292 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-21 10:36:31,292 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:31,292 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:31,292 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:31,292 INFO L82 PathProgramCache]: Analyzing trace with hash -1108317493, now seen corresponding path program 5 times [2018-01-21 10:36:31,292 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:31,293 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:31,293 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:31,293 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:31,293 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:31,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:31,305 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:31,372 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:31,373 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:31,373 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:31,373 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:31,373 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:31,373 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:31,373 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:31,388 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:36:31,388 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:31,399 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:31,401 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:31,402 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:31,410 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:31,411 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:31,413 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:31,472 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:31,473 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:31,604 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:31,623 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:31,624 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:31,627 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:36:31,627 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:31,630 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:31,632 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:31,636 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:31,646 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:31,653 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:31,656 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:31,662 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:31,662 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:31,719 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:31,720 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:31,720 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 23 [2018-01-21 10:36:31,720 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:31,721 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-21 10:36:31,721 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-21 10:36:31,721 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=186, Invalid=320, Unknown=0, NotChecked=0, Total=506 [2018-01-21 10:36:31,722 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 16 states. [2018-01-21 10:36:31,749 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:31,749 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-01-21 10:36:31,749 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-21 10:36:31,749 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 23 [2018-01-21 10:36:31,750 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:31,750 INFO L225 Difference]: With dead ends: 34 [2018-01-21 10:36:31,750 INFO L226 Difference]: Without dead ends: 25 [2018-01-21 10:36:31,751 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 76 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 173 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=203, Invalid=349, Unknown=0, NotChecked=0, Total=552 [2018-01-21 10:36:31,751 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-01-21 10:36:31,753 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-01-21 10:36:31,753 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-01-21 10:36:31,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 25 transitions. [2018-01-21 10:36:31,754 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 25 transitions. Word has length 23 [2018-01-21 10:36:31,754 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:31,754 INFO L432 AbstractCegarLoop]: Abstraction has 25 states and 25 transitions. [2018-01-21 10:36:31,754 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-21 10:36:31,754 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 25 transitions. [2018-01-21 10:36:31,754 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-21 10:36:31,754 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:31,755 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:31,755 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:31,755 INFO L82 PathProgramCache]: Analyzing trace with hash 1152077936, now seen corresponding path program 6 times [2018-01-21 10:36:31,755 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:31,755 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:31,756 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:31,756 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:31,756 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:31,764 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:31,765 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:31,842 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:31,843 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:31,843 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:31,843 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:31,843 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:31,843 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:31,843 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:31,848 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:36:31,848 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:36:31,856 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:31,858 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:31,859 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:31,860 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:31,861 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:31,862 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:31,911 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:31,911 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:32,093 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:32,115 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:32,115 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:32,119 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:36:32,120 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:36:32,134 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:32,144 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:32,156 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:32,165 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:32,171 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:32,175 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:32,181 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:32,181 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:32,243 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:32,245 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:32,245 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 26 [2018-01-21 10:36:32,245 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:32,245 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-21 10:36:32,245 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-21 10:36:32,246 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=237, Invalid=413, Unknown=0, NotChecked=0, Total=650 [2018-01-21 10:36:32,246 INFO L87 Difference]: Start difference. First operand 25 states and 25 transitions. Second operand 18 states. [2018-01-21 10:36:32,297 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:32,297 INFO L93 Difference]: Finished difference Result 35 states and 35 transitions. [2018-01-21 10:36:32,298 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-21 10:36:32,298 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 24 [2018-01-21 10:36:32,298 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:32,299 INFO L225 Difference]: With dead ends: 35 [2018-01-21 10:36:32,299 INFO L226 Difference]: Without dead ends: 26 [2018-01-21 10:36:32,299 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 105 GetRequests, 78 SyntacticMatches, 2 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 232 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=256, Invalid=446, Unknown=0, NotChecked=0, Total=702 [2018-01-21 10:36:32,300 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-01-21 10:36:32,304 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-01-21 10:36:32,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-01-21 10:36:32,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 26 transitions. [2018-01-21 10:36:32,305 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 26 transitions. Word has length 24 [2018-01-21 10:36:32,305 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:32,305 INFO L432 AbstractCegarLoop]: Abstraction has 26 states and 26 transitions. [2018-01-21 10:36:32,306 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-21 10:36:32,306 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-01-21 10:36:32,308 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-21 10:36:32,309 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:32,309 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:32,309 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:32,309 INFO L82 PathProgramCache]: Analyzing trace with hash -1790107797, now seen corresponding path program 7 times [2018-01-21 10:36:32,309 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:32,310 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:32,310 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:32,310 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:32,310 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:32,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:32,323 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:32,415 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:32,415 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:32,415 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:32,415 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:32,415 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:32,415 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:32,415 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:32,420 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:32,420 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:36:32,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:32,430 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:32,481 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:32,482 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:32,648 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:32,669 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:32,669 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:32,673 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:32,673 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:36:32,690 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:32,693 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:32,697 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:32,697 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:32,751 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:32,752 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:32,752 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 29 [2018-01-21 10:36:32,753 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:32,753 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-21 10:36:32,753 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-21 10:36:32,753 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=294, Invalid=518, Unknown=0, NotChecked=0, Total=812 [2018-01-21 10:36:32,754 INFO L87 Difference]: Start difference. First operand 26 states and 26 transitions. Second operand 20 states. [2018-01-21 10:36:32,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:32,781 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-01-21 10:36:32,781 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-21 10:36:32,782 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 25 [2018-01-21 10:36:32,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:32,782 INFO L225 Difference]: With dead ends: 36 [2018-01-21 10:36:32,782 INFO L226 Difference]: Without dead ends: 27 [2018-01-21 10:36:32,783 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 80 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 299 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=315, Invalid=555, Unknown=0, NotChecked=0, Total=870 [2018-01-21 10:36:32,783 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-01-21 10:36:32,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-01-21 10:36:32,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-01-21 10:36:32,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 27 transitions. [2018-01-21 10:36:32,785 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 27 transitions. Word has length 25 [2018-01-21 10:36:32,786 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:32,786 INFO L432 AbstractCegarLoop]: Abstraction has 27 states and 27 transitions. [2018-01-21 10:36:32,786 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-21 10:36:32,786 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-01-21 10:36:32,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-21 10:36:32,786 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:32,786 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:32,787 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:32,787 INFO L82 PathProgramCache]: Analyzing trace with hash 1491414992, now seen corresponding path program 8 times [2018-01-21 10:36:32,787 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:32,787 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:32,787 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:32,788 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:32,788 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:32,796 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:32,797 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:33,059 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:33,059 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:33,059 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:33,059 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:33,059 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:33,059 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:33,060 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:33,073 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:36:33,073 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:33,081 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:33,084 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:33,085 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:33,086 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:33,191 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:33,191 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:33,394 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:33,414 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:33,414 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:33,418 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:36:33,418 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:33,428 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:33,436 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:33,443 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:33,446 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:33,451 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:33,451 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:33,533 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:33,534 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:33,534 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 32 [2018-01-21 10:36:33,534 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:33,535 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-21 10:36:33,535 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-21 10:36:33,535 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=357, Invalid=635, Unknown=0, NotChecked=0, Total=992 [2018-01-21 10:36:33,535 INFO L87 Difference]: Start difference. First operand 27 states and 27 transitions. Second operand 22 states. [2018-01-21 10:36:33,565 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:33,565 INFO L93 Difference]: Finished difference Result 37 states and 37 transitions. [2018-01-21 10:36:33,565 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-21 10:36:33,565 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 26 [2018-01-21 10:36:33,565 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:33,566 INFO L225 Difference]: With dead ends: 37 [2018-01-21 10:36:33,566 INFO L226 Difference]: Without dead ends: 28 [2018-01-21 10:36:33,566 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 82 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 374 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=380, Invalid=676, Unknown=0, NotChecked=0, Total=1056 [2018-01-21 10:36:33,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-01-21 10:36:33,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-01-21 10:36:33,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-01-21 10:36:33,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 28 transitions. [2018-01-21 10:36:33,569 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 28 transitions. Word has length 26 [2018-01-21 10:36:33,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:33,570 INFO L432 AbstractCegarLoop]: Abstraction has 28 states and 28 transitions. [2018-01-21 10:36:33,570 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-21 10:36:33,570 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-01-21 10:36:33,570 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-21 10:36:33,570 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:33,570 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:33,570 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:33,571 INFO L82 PathProgramCache]: Analyzing trace with hash 139406347, now seen corresponding path program 9 times [2018-01-21 10:36:33,571 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:33,571 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:33,571 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:33,571 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:33,571 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:33,579 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:33,580 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:33,747 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:33,748 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:33,748 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:33,748 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:33,748 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:33,748 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:33,748 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:33,756 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:36:33,756 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:36:33,764 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:33,766 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:33,767 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:33,768 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:33,769 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:33,770 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:33,771 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:33,772 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:33,842 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:33,842 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:34,071 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:34,092 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:34,092 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:34,095 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:36:34,096 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:36:34,108 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:34,115 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:34,124 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:34,132 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:34,141 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:34,150 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:34,157 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:34,160 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:34,166 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:34,166 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:34,286 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:34,288 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:34,288 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 35 [2018-01-21 10:36:34,288 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:34,288 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-21 10:36:34,289 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-21 10:36:34,289 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=426, Invalid=764, Unknown=0, NotChecked=0, Total=1190 [2018-01-21 10:36:34,289 INFO L87 Difference]: Start difference. First operand 28 states and 28 transitions. Second operand 24 states. [2018-01-21 10:36:34,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:34,362 INFO L93 Difference]: Finished difference Result 38 states and 38 transitions. [2018-01-21 10:36:34,363 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-21 10:36:34,363 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 27 [2018-01-21 10:36:34,363 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:34,364 INFO L225 Difference]: With dead ends: 38 [2018-01-21 10:36:34,364 INFO L226 Difference]: Without dead ends: 29 [2018-01-21 10:36:34,364 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 84 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 457 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=451, Invalid=809, Unknown=0, NotChecked=0, Total=1260 [2018-01-21 10:36:34,365 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-01-21 10:36:34,367 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-01-21 10:36:34,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-01-21 10:36:34,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 29 transitions. [2018-01-21 10:36:34,368 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 29 transitions. Word has length 27 [2018-01-21 10:36:34,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:34,368 INFO L432 AbstractCegarLoop]: Abstraction has 29 states and 29 transitions. [2018-01-21 10:36:34,368 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-21 10:36:34,368 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2018-01-21 10:36:34,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-21 10:36:34,369 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:34,369 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:34,369 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:34,369 INFO L82 PathProgramCache]: Analyzing trace with hash 1176811312, now seen corresponding path program 10 times [2018-01-21 10:36:34,369 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:34,370 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:34,370 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:34,370 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:34,371 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:34,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:34,379 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:34,512 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:34,512 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:34,512 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:34,512 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:34,513 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:34,513 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:34,513 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:34,518 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:36:34,518 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:36:34,528 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:34,529 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:34,594 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:34,594 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:34,842 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:34,863 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:34,863 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:34,870 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:36:34,871 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:36:34,896 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:34,899 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:34,904 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:34,904 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:34,977 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:34,979 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:34,979 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 38 [2018-01-21 10:36:34,979 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:34,979 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-21 10:36:34,980 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-21 10:36:34,980 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=501, Invalid=905, Unknown=0, NotChecked=0, Total=1406 [2018-01-21 10:36:34,980 INFO L87 Difference]: Start difference. First operand 29 states and 29 transitions. Second operand 26 states. [2018-01-21 10:36:35,012 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:35,012 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-01-21 10:36:35,012 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-21 10:36:35,013 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 28 [2018-01-21 10:36:35,013 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:35,013 INFO L225 Difference]: With dead ends: 39 [2018-01-21 10:36:35,013 INFO L226 Difference]: Without dead ends: 30 [2018-01-21 10:36:35,014 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 125 GetRequests, 86 SyntacticMatches, 2 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 548 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=528, Invalid=954, Unknown=0, NotChecked=0, Total=1482 [2018-01-21 10:36:35,014 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-01-21 10:36:35,017 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-01-21 10:36:35,017 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-01-21 10:36:35,018 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 30 transitions. [2018-01-21 10:36:35,018 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 30 transitions. Word has length 28 [2018-01-21 10:36:35,018 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:35,018 INFO L432 AbstractCegarLoop]: Abstraction has 30 states and 30 transitions. [2018-01-21 10:36:35,018 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-21 10:36:35,018 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-01-21 10:36:35,019 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-21 10:36:35,019 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:35,019 INFO L322 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:35,019 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:35,019 INFO L82 PathProgramCache]: Analyzing trace with hash -1023373141, now seen corresponding path program 11 times [2018-01-21 10:36:35,019 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:35,020 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:35,020 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:35,020 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:35,020 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:35,028 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:35,029 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:35,144 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:35,144 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:35,144 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:35,144 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:35,145 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:35,145 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:35,145 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:35,150 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:36:35,150 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:35,153 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:35,154 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:35,155 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:35,156 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:35,156 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:35,157 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:35,161 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:35,162 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:35,163 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:35,238 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:35,238 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:35,514 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:35,538 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:35,538 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:35,541 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:36:35,541 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:35,545 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:35,546 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:35,550 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:35,553 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:35,558 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:35,562 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:35,572 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:35,580 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:35,584 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:35,591 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:35,591 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:35,695 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:35,696 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:35,697 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 41 [2018-01-21 10:36:35,697 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:35,697 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-21 10:36:35,698 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-21 10:36:35,698 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=582, Invalid=1058, Unknown=0, NotChecked=0, Total=1640 [2018-01-21 10:36:35,698 INFO L87 Difference]: Start difference. First operand 30 states and 30 transitions. Second operand 28 states. [2018-01-21 10:36:35,758 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:35,759 INFO L93 Difference]: Finished difference Result 40 states and 40 transitions. [2018-01-21 10:36:35,759 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-21 10:36:35,759 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 29 [2018-01-21 10:36:35,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:35,760 INFO L225 Difference]: With dead ends: 40 [2018-01-21 10:36:35,760 INFO L226 Difference]: Without dead ends: 31 [2018-01-21 10:36:35,760 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 130 GetRequests, 88 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 647 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=611, Invalid=1111, Unknown=0, NotChecked=0, Total=1722 [2018-01-21 10:36:35,760 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2018-01-21 10:36:35,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2018-01-21 10:36:35,762 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-01-21 10:36:35,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 31 transitions. [2018-01-21 10:36:35,763 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 31 transitions. Word has length 29 [2018-01-21 10:36:35,763 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:35,763 INFO L432 AbstractCegarLoop]: Abstraction has 31 states and 31 transitions. [2018-01-21 10:36:35,763 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-21 10:36:35,763 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 31 transitions. [2018-01-21 10:36:35,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-21 10:36:35,764 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:35,764 INFO L322 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:35,764 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:35,764 INFO L82 PathProgramCache]: Analyzing trace with hash -509614448, now seen corresponding path program 12 times [2018-01-21 10:36:35,764 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:35,765 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:35,765 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:35,765 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:35,766 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:35,775 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:35,776 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:35,901 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:35,901 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:35,901 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:35,901 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:35,901 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:35,901 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:35,901 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:35,906 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:36:35,907 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:36:35,913 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:35,915 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:35,916 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:35,917 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:35,918 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:35,919 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:35,920 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:35,921 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:35,922 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:36,007 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:36,007 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:36,372 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:36,392 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:36,393 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:36,397 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:36:36,397 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:36:36,407 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:36,414 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:36,423 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:36,432 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:36,441 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:36,451 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:36,461 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:36,469 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:36,472 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:36,476 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:36,476 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:36,662 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:36,664 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:36,664 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 44 [2018-01-21 10:36:36,664 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:36,664 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-21 10:36:36,665 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-21 10:36:36,665 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=669, Invalid=1223, Unknown=0, NotChecked=0, Total=1892 [2018-01-21 10:36:36,665 INFO L87 Difference]: Start difference. First operand 31 states and 31 transitions. Second operand 30 states. [2018-01-21 10:36:36,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:36,715 INFO L93 Difference]: Finished difference Result 41 states and 41 transitions. [2018-01-21 10:36:36,715 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-21 10:36:36,716 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 30 [2018-01-21 10:36:36,716 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:36,716 INFO L225 Difference]: With dead ends: 41 [2018-01-21 10:36:36,716 INFO L226 Difference]: Without dead ends: 32 [2018-01-21 10:36:36,717 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 135 GetRequests, 90 SyntacticMatches, 2 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 754 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=700, Invalid=1280, Unknown=0, NotChecked=0, Total=1980 [2018-01-21 10:36:36,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-01-21 10:36:36,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2018-01-21 10:36:36,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-01-21 10:36:36,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 32 transitions. [2018-01-21 10:36:36,720 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 32 transitions. Word has length 30 [2018-01-21 10:36:36,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:36,720 INFO L432 AbstractCegarLoop]: Abstraction has 32 states and 32 transitions. [2018-01-21 10:36:36,720 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-21 10:36:36,720 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2018-01-21 10:36:36,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-21 10:36:36,721 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:36,721 INFO L322 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:36,721 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:36,721 INFO L82 PathProgramCache]: Analyzing trace with hash -1762964149, now seen corresponding path program 13 times [2018-01-21 10:36:36,721 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:36,721 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:36,722 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:36,722 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:36,722 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:36,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:36,729 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:36,972 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:36,972 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:36,972 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:36,972 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:36,972 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:36,973 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:36,973 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:36,986 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:36,986 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:36:36,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:37,001 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:37,099 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:37,099 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:37,485 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:37,506 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:37,506 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:37,510 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:37,510 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:36:37,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:37,541 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:37,547 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:37,547 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:37,648 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:37,649 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:37,650 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 47 [2018-01-21 10:36:37,650 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:37,650 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-21 10:36:37,650 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-21 10:36:37,651 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=762, Invalid=1400, Unknown=0, NotChecked=0, Total=2162 [2018-01-21 10:36:37,651 INFO L87 Difference]: Start difference. First operand 32 states and 32 transitions. Second operand 32 states. [2018-01-21 10:36:37,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:37,686 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-01-21 10:36:37,686 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-21 10:36:37,687 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 31 [2018-01-21 10:36:37,687 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:37,687 INFO L225 Difference]: With dead ends: 42 [2018-01-21 10:36:37,688 INFO L226 Difference]: Without dead ends: 33 [2018-01-21 10:36:37,689 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 140 GetRequests, 92 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 869 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=795, Invalid=1461, Unknown=0, NotChecked=0, Total=2256 [2018-01-21 10:36:37,689 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-01-21 10:36:37,692 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2018-01-21 10:36:37,692 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-01-21 10:36:37,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 33 transitions. [2018-01-21 10:36:37,693 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 33 transitions. Word has length 31 [2018-01-21 10:36:37,693 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:37,693 INFO L432 AbstractCegarLoop]: Abstraction has 33 states and 33 transitions. [2018-01-21 10:36:37,693 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-21 10:36:37,693 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-01-21 10:36:37,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-21 10:36:37,694 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:37,694 INFO L322 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:37,694 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:37,694 INFO L82 PathProgramCache]: Analyzing trace with hash -1962099216, now seen corresponding path program 14 times [2018-01-21 10:36:37,694 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:37,695 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:37,695 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:37,696 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:37,696 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:37,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:37,703 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:37,927 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:37,927 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:37,927 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:37,928 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:37,928 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:37,928 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:37,928 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:37,940 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:36:37,940 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:37,949 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:37,955 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:37,957 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:37,959 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:38,316 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:38,316 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:38,795 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:38,815 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:38,815 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:38,817 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:36:38,818 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:38,828 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:38,838 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:38,847 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:38,850 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:38,854 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:38,854 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:38,958 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:38,959 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:38,959 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 50 [2018-01-21 10:36:38,959 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:38,959 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-01-21 10:36:38,960 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-01-21 10:36:38,960 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=861, Invalid=1589, Unknown=0, NotChecked=0, Total=2450 [2018-01-21 10:36:38,960 INFO L87 Difference]: Start difference. First operand 33 states and 33 transitions. Second operand 34 states. [2018-01-21 10:36:39,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:39,038 INFO L93 Difference]: Finished difference Result 43 states and 43 transitions. [2018-01-21 10:36:39,039 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-21 10:36:39,039 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 32 [2018-01-21 10:36:39,039 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:39,040 INFO L225 Difference]: With dead ends: 43 [2018-01-21 10:36:39,040 INFO L226 Difference]: Without dead ends: 34 [2018-01-21 10:36:39,041 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 145 GetRequests, 94 SyntacticMatches, 2 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 992 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=896, Invalid=1654, Unknown=0, NotChecked=0, Total=2550 [2018-01-21 10:36:39,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-01-21 10:36:39,045 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-01-21 10:36:39,045 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-01-21 10:36:39,046 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2018-01-21 10:36:39,046 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 32 [2018-01-21 10:36:39,046 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:39,046 INFO L432 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2018-01-21 10:36:39,046 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-01-21 10:36:39,046 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-01-21 10:36:39,047 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-21 10:36:39,047 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:39,047 INFO L322 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:39,047 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:39,047 INFO L82 PathProgramCache]: Analyzing trace with hash 454648299, now seen corresponding path program 15 times [2018-01-21 10:36:39,048 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:39,048 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:39,048 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:39,048 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:39,049 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:39,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:39,057 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:39,428 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:39,428 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:39,428 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:39,428 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:39,428 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:39,429 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:39,429 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:39,437 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:36:39,438 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:36:39,448 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:39,451 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:39,452 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:39,454 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:39,456 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:39,458 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:39,459 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:39,461 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:39,463 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:39,464 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:39,466 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:39,675 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:39,675 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:40,276 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:40,295 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:40,296 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:40,298 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:36:40,299 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:36:40,311 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:40,317 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:40,326 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:40,334 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:40,342 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:40,351 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:40,361 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:40,371 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:40,381 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:40,389 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:40,392 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:40,399 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:40,399 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:40,523 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:40,524 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:40,524 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 53 [2018-01-21 10:36:40,524 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:40,524 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-21 10:36:40,525 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-21 10:36:40,525 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=966, Invalid=1790, Unknown=0, NotChecked=0, Total=2756 [2018-01-21 10:36:40,525 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand 36 states. [2018-01-21 10:36:40,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:40,570 INFO L93 Difference]: Finished difference Result 44 states and 44 transitions. [2018-01-21 10:36:40,571 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-21 10:36:40,571 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 33 [2018-01-21 10:36:40,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:40,571 INFO L225 Difference]: With dead ends: 44 [2018-01-21 10:36:40,571 INFO L226 Difference]: Without dead ends: 35 [2018-01-21 10:36:40,572 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 150 GetRequests, 96 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1123 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1003, Invalid=1859, Unknown=0, NotChecked=0, Total=2862 [2018-01-21 10:36:40,572 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-01-21 10:36:40,575 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 35. [2018-01-21 10:36:40,575 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-01-21 10:36:40,575 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 35 transitions. [2018-01-21 10:36:40,576 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 35 transitions. Word has length 33 [2018-01-21 10:36:40,576 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:40,576 INFO L432 AbstractCegarLoop]: Abstraction has 35 states and 35 transitions. [2018-01-21 10:36:40,576 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-21 10:36:40,576 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 35 transitions. [2018-01-21 10:36:40,576 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-21 10:36:40,576 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:40,576 INFO L322 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:40,577 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:40,577 INFO L82 PathProgramCache]: Analyzing trace with hash -1935590064, now seen corresponding path program 16 times [2018-01-21 10:36:40,577 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:40,577 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:40,577 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:40,577 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:40,578 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:40,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:40,587 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:40,758 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:40,758 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:40,758 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:40,758 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:40,758 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:40,758 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:40,758 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:40,763 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:36:40,763 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:36:40,775 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:40,777 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:40,902 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:40,902 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:41,357 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:41,377 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:41,378 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:41,380 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:36:41,380 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:36:41,410 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:41,413 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:41,419 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:41,419 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:41,542 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:41,543 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:41,543 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 56 [2018-01-21 10:36:41,544 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:41,544 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-21 10:36:41,544 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-21 10:36:41,545 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1077, Invalid=2003, Unknown=0, NotChecked=0, Total=3080 [2018-01-21 10:36:41,545 INFO L87 Difference]: Start difference. First operand 35 states and 35 transitions. Second operand 38 states. [2018-01-21 10:36:41,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:41,601 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-01-21 10:36:41,601 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-21 10:36:41,601 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 34 [2018-01-21 10:36:41,602 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:41,602 INFO L225 Difference]: With dead ends: 45 [2018-01-21 10:36:41,602 INFO L226 Difference]: Without dead ends: 36 [2018-01-21 10:36:41,603 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 98 SyntacticMatches, 2 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1262 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1116, Invalid=2076, Unknown=0, NotChecked=0, Total=3192 [2018-01-21 10:36:41,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-01-21 10:36:41,606 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-01-21 10:36:41,606 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-01-21 10:36:41,607 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-01-21 10:36:41,607 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 34 [2018-01-21 10:36:41,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:41,607 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-01-21 10:36:41,607 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-21 10:36:41,607 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-01-21 10:36:41,608 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-21 10:36:41,608 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:41,608 INFO L322 BasicCegarLoop]: trace histogram [17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:41,608 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:41,608 INFO L82 PathProgramCache]: Analyzing trace with hash 1276432011, now seen corresponding path program 17 times [2018-01-21 10:36:41,609 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:41,609 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:41,609 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:41,609 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:41,610 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:41,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:41,617 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:41,893 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:41,893 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:41,893 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:41,893 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:41,893 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:41,893 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:41,893 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:41,898 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:36:41,899 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:41,902 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:41,903 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:41,904 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:41,904 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:41,905 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:41,906 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:41,907 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:41,908 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:41,908 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:41,912 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:41,913 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:41,915 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:42,044 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:42,044 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:42,572 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:42,591 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:42,592 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:42,594 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:36:42,594 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:42,598 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:42,600 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:42,603 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:42,607 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:42,610 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:42,615 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:42,619 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:42,624 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:42,630 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:42,641 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:42,650 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:42,653 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:42,658 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:42,658 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:42,788 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:42,790 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:42,790 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 59 [2018-01-21 10:36:42,791 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:42,791 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-21 10:36:42,791 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-21 10:36:42,792 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1194, Invalid=2228, Unknown=0, NotChecked=0, Total=3422 [2018-01-21 10:36:42,792 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 40 states. [2018-01-21 10:36:42,839 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:42,839 INFO L93 Difference]: Finished difference Result 46 states and 46 transitions. [2018-01-21 10:36:42,840 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-21 10:36:42,840 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 35 [2018-01-21 10:36:42,840 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:42,840 INFO L225 Difference]: With dead ends: 46 [2018-01-21 10:36:42,840 INFO L226 Difference]: Without dead ends: 37 [2018-01-21 10:36:42,841 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 160 GetRequests, 100 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1409 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1235, Invalid=2305, Unknown=0, NotChecked=0, Total=3540 [2018-01-21 10:36:42,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-01-21 10:36:42,843 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 37. [2018-01-21 10:36:42,843 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-01-21 10:36:42,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 37 transitions. [2018-01-21 10:36:42,844 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 37 transitions. Word has length 35 [2018-01-21 10:36:42,844 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:42,844 INFO L432 AbstractCegarLoop]: Abstraction has 37 states and 37 transitions. [2018-01-21 10:36:42,844 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-21 10:36:42,844 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 37 transitions. [2018-01-21 10:36:42,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-21 10:36:42,845 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:42,845 INFO L322 BasicCegarLoop]: trace histogram [18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:42,845 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:42,845 INFO L82 PathProgramCache]: Analyzing trace with hash 2064868528, now seen corresponding path program 18 times [2018-01-21 10:36:42,845 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:42,846 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:42,846 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:42,846 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:42,846 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:42,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:42,854 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:43,058 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:43,058 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:43,059 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:43,059 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:43,059 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:43,059 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:43,059 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:43,064 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:36:43,064 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:36:43,072 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:43,074 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:43,075 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:43,075 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:43,076 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:43,077 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:43,078 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:43,079 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:43,081 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:43,082 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:43,082 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:43,083 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:43,231 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:43,231 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:43,773 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:43,792 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:43,793 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:43,795 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:36:43,795 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:36:43,804 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:43,811 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:43,819 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:43,826 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:43,835 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:43,844 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:43,853 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:43,863 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:43,873 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:43,884 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:43,892 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:43,895 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:43,900 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:43,900 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:44,032 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:44,033 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:44,033 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 62 [2018-01-21 10:36:44,033 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:44,034 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-01-21 10:36:44,034 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-01-21 10:36:44,035 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1317, Invalid=2465, Unknown=0, NotChecked=0, Total=3782 [2018-01-21 10:36:44,035 INFO L87 Difference]: Start difference. First operand 37 states and 37 transitions. Second operand 42 states. [2018-01-21 10:36:44,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:44,091 INFO L93 Difference]: Finished difference Result 47 states and 47 transitions. [2018-01-21 10:36:44,091 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-21 10:36:44,091 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 36 [2018-01-21 10:36:44,092 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:44,092 INFO L225 Difference]: With dead ends: 47 [2018-01-21 10:36:44,092 INFO L226 Difference]: Without dead ends: 38 [2018-01-21 10:36:44,093 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 102 SyntacticMatches, 2 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1564 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1360, Invalid=2546, Unknown=0, NotChecked=0, Total=3906 [2018-01-21 10:36:44,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2018-01-21 10:36:44,095 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2018-01-21 10:36:44,095 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-01-21 10:36:44,096 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 38 transitions. [2018-01-21 10:36:44,096 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 38 transitions. Word has length 36 [2018-01-21 10:36:44,096 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:44,096 INFO L432 AbstractCegarLoop]: Abstraction has 38 states and 38 transitions. [2018-01-21 10:36:44,096 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-01-21 10:36:44,096 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-01-21 10:36:44,097 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-21 10:36:44,097 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:44,097 INFO L322 BasicCegarLoop]: trace histogram [19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:44,097 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:44,098 INFO L82 PathProgramCache]: Analyzing trace with hash 736596779, now seen corresponding path program 19 times [2018-01-21 10:36:44,098 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:44,098 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:44,098 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:44,099 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:44,099 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:44,104 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:44,105 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:44,338 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:44,339 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:44,339 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:44,339 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:44,339 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:44,339 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:44,339 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:44,344 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:44,344 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:36:44,355 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:44,357 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:44,510 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:44,510 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:45,099 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:45,118 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:45,118 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:45,121 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:45,121 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:36:45,153 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:45,158 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:45,166 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:45,166 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:45,314 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:45,315 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:45,315 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 65 [2018-01-21 10:36:45,315 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:45,315 INFO L409 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-01-21 10:36:45,315 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-01-21 10:36:45,316 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1446, Invalid=2714, Unknown=0, NotChecked=0, Total=4160 [2018-01-21 10:36:45,316 INFO L87 Difference]: Start difference. First operand 38 states and 38 transitions. Second operand 44 states. [2018-01-21 10:36:45,358 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:45,358 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-01-21 10:36:45,358 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-21 10:36:45,359 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 37 [2018-01-21 10:36:45,359 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:45,359 INFO L225 Difference]: With dead ends: 48 [2018-01-21 10:36:45,359 INFO L226 Difference]: Without dead ends: 39 [2018-01-21 10:36:45,360 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 170 GetRequests, 104 SyntacticMatches, 2 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1727 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1491, Invalid=2799, Unknown=0, NotChecked=0, Total=4290 [2018-01-21 10:36:45,360 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-01-21 10:36:45,361 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-01-21 10:36:45,362 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-01-21 10:36:45,362 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 39 transitions. [2018-01-21 10:36:45,362 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 39 transitions. Word has length 37 [2018-01-21 10:36:45,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:45,362 INFO L432 AbstractCegarLoop]: Abstraction has 39 states and 39 transitions. [2018-01-21 10:36:45,362 INFO L433 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-01-21 10:36:45,362 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-01-21 10:36:45,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-21 10:36:45,363 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:45,363 INFO L322 BasicCegarLoop]: trace histogram [20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:45,363 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:45,363 INFO L82 PathProgramCache]: Analyzing trace with hash -1785121776, now seen corresponding path program 20 times [2018-01-21 10:36:45,363 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:45,364 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:45,364 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:45,364 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:45,364 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:45,370 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:45,370 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:45,586 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:45,586 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:45,616 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:45,616 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:45,617 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:45,617 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:45,617 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:45,621 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:36:45,622 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:45,628 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:45,633 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:45,634 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:45,635 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:45,803 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:45,803 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:46,446 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:46,465 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:46,466 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:46,468 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:36:46,469 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:46,478 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:46,490 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:46,500 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:46,504 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:46,509 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:46,509 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:46,659 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:46,660 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:46,660 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 68 [2018-01-21 10:36:46,660 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:46,660 INFO L409 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-01-21 10:36:46,660 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-01-21 10:36:46,661 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1581, Invalid=2975, Unknown=0, NotChecked=0, Total=4556 [2018-01-21 10:36:46,661 INFO L87 Difference]: Start difference. First operand 39 states and 39 transitions. Second operand 46 states. [2018-01-21 10:36:46,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:46,711 INFO L93 Difference]: Finished difference Result 49 states and 49 transitions. [2018-01-21 10:36:46,711 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-21 10:36:46,711 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 38 [2018-01-21 10:36:46,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:46,712 INFO L225 Difference]: With dead ends: 49 [2018-01-21 10:36:46,712 INFO L226 Difference]: Without dead ends: 40 [2018-01-21 10:36:46,712 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 106 SyntacticMatches, 2 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1898 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1628, Invalid=3064, Unknown=0, NotChecked=0, Total=4692 [2018-01-21 10:36:46,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-01-21 10:36:46,714 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2018-01-21 10:36:46,714 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-01-21 10:36:46,715 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 40 transitions. [2018-01-21 10:36:46,715 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 40 transitions. Word has length 38 [2018-01-21 10:36:46,715 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:46,715 INFO L432 AbstractCegarLoop]: Abstraction has 40 states and 40 transitions. [2018-01-21 10:36:46,715 INFO L433 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-01-21 10:36:46,716 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 40 transitions. [2018-01-21 10:36:46,716 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-21 10:36:46,716 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:46,717 INFO L322 BasicCegarLoop]: trace histogram [21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:46,717 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:46,717 INFO L82 PathProgramCache]: Analyzing trace with hash 1645981643, now seen corresponding path program 21 times [2018-01-21 10:36:46,717 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:46,718 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:46,718 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:46,718 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:46,718 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:46,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:46,725 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:46,961 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:46,961 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:46,961 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:46,962 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:46,962 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:46,962 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:46,962 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:46,967 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:36:46,967 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:36:46,974 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:46,976 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:46,977 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:46,978 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:46,979 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:46,980 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:46,982 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:46,983 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:46,985 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:46,986 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:46,987 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:46,988 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:46,989 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:46,991 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:47,177 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:47,177 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:47,858 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:47,879 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:47,879 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:47,882 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:36:47,882 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:36:47,891 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:47,897 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:47,905 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:47,913 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:47,922 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:47,931 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:47,940 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:47,950 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:47,960 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:47,971 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:47,982 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:47,993 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:48,002 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:48,005 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:48,010 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:48,010 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:48,164 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:48,165 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:48,166 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 71 [2018-01-21 10:36:48,166 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:48,166 INFO L409 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-01-21 10:36:48,166 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-01-21 10:36:48,167 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1722, Invalid=3248, Unknown=0, NotChecked=0, Total=4970 [2018-01-21 10:36:48,167 INFO L87 Difference]: Start difference. First operand 40 states and 40 transitions. Second operand 48 states. [2018-01-21 10:36:48,248 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:48,248 INFO L93 Difference]: Finished difference Result 50 states and 50 transitions. [2018-01-21 10:36:48,248 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-21 10:36:48,248 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 39 [2018-01-21 10:36:48,249 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:48,249 INFO L225 Difference]: With dead ends: 50 [2018-01-21 10:36:48,249 INFO L226 Difference]: Without dead ends: 41 [2018-01-21 10:36:48,250 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 180 GetRequests, 108 SyntacticMatches, 2 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2077 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1771, Invalid=3341, Unknown=0, NotChecked=0, Total=5112 [2018-01-21 10:36:48,250 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-01-21 10:36:48,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. [2018-01-21 10:36:48,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-01-21 10:36:48,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 41 transitions. [2018-01-21 10:36:48,254 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 41 transitions. Word has length 39 [2018-01-21 10:36:48,255 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:48,255 INFO L432 AbstractCegarLoop]: Abstraction has 41 states and 41 transitions. [2018-01-21 10:36:48,255 INFO L433 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-01-21 10:36:48,255 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 41 transitions. [2018-01-21 10:36:48,256 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-21 10:36:48,256 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:48,256 INFO L322 BasicCegarLoop]: trace histogram [22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:48,256 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:48,256 INFO L82 PathProgramCache]: Analyzing trace with hash 636005232, now seen corresponding path program 22 times [2018-01-21 10:36:48,256 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:48,257 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:48,257 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:48,257 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:48,258 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:48,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:48,269 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:48,549 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:48,549 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:48,549 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:48,549 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:48,549 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:48,549 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:48,550 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:48,554 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:36:48,554 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:36:48,567 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:48,568 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:48,761 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:48,761 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:49,529 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:49,548 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:49,549 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:49,551 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:36:49,551 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:36:49,585 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:49,588 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:49,593 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:49,594 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:49,772 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:49,773 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:49,773 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 74 [2018-01-21 10:36:49,773 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:49,774 INFO L409 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-01-21 10:36:49,774 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-01-21 10:36:49,774 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1869, Invalid=3533, Unknown=0, NotChecked=0, Total=5402 [2018-01-21 10:36:49,774 INFO L87 Difference]: Start difference. First operand 41 states and 41 transitions. Second operand 50 states. [2018-01-21 10:36:49,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:49,846 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-01-21 10:36:49,846 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-21 10:36:49,846 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 40 [2018-01-21 10:36:49,846 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:49,846 INFO L225 Difference]: With dead ends: 51 [2018-01-21 10:36:49,847 INFO L226 Difference]: Without dead ends: 42 [2018-01-21 10:36:49,847 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 185 GetRequests, 110 SyntacticMatches, 2 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2264 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1920, Invalid=3630, Unknown=0, NotChecked=0, Total=5550 [2018-01-21 10:36:49,847 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-01-21 10:36:49,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2018-01-21 10:36:49,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-01-21 10:36:49,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 42 transitions. [2018-01-21 10:36:49,850 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 42 transitions. Word has length 40 [2018-01-21 10:36:49,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:49,850 INFO L432 AbstractCegarLoop]: Abstraction has 42 states and 42 transitions. [2018-01-21 10:36:49,850 INFO L433 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-01-21 10:36:49,850 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-01-21 10:36:49,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-21 10:36:49,851 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:49,851 INFO L322 BasicCegarLoop]: trace histogram [23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:49,851 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:49,851 INFO L82 PathProgramCache]: Analyzing trace with hash -608492437, now seen corresponding path program 23 times [2018-01-21 10:36:49,851 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:49,851 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:49,851 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:49,852 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:49,852 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:49,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:49,860 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:50,124 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:50,124 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:50,124 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:50,124 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:50,124 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:50,124 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:50,125 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:50,129 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:36:50,129 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:50,133 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:50,134 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:50,135 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:50,135 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:50,136 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:50,137 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:50,138 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:50,139 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:50,140 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:50,141 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:50,141 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:50,142 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:50,146 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:50,148 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:50,149 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:50,364 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:50,364 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:51,154 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:51,174 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:51,174 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:51,177 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:36:51,177 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:51,181 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:51,182 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:51,186 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:51,189 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:51,193 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:51,198 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:51,203 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:51,208 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:51,214 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:51,220 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:51,228 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:51,235 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:51,248 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:51,258 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:51,262 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:51,267 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:51,268 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:51,484 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:51,485 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:51,485 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 77 [2018-01-21 10:36:51,485 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:51,485 INFO L409 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-01-21 10:36:51,485 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-01-21 10:36:51,486 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2022, Invalid=3830, Unknown=0, NotChecked=0, Total=5852 [2018-01-21 10:36:51,486 INFO L87 Difference]: Start difference. First operand 42 states and 42 transitions. Second operand 52 states. [2018-01-21 10:36:51,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:51,583 INFO L93 Difference]: Finished difference Result 52 states and 52 transitions. [2018-01-21 10:36:51,583 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-21 10:36:51,583 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 41 [2018-01-21 10:36:51,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:51,584 INFO L225 Difference]: With dead ends: 52 [2018-01-21 10:36:51,584 INFO L226 Difference]: Without dead ends: 43 [2018-01-21 10:36:51,584 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 190 GetRequests, 112 SyntacticMatches, 2 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2459 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=2075, Invalid=3931, Unknown=0, NotChecked=0, Total=6006 [2018-01-21 10:36:51,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-01-21 10:36:51,587 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2018-01-21 10:36:51,587 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-01-21 10:36:51,588 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 43 transitions. [2018-01-21 10:36:51,588 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 43 transitions. Word has length 41 [2018-01-21 10:36:51,588 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:51,589 INFO L432 AbstractCegarLoop]: Abstraction has 43 states and 43 transitions. [2018-01-21 10:36:51,589 INFO L433 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-01-21 10:36:51,589 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 43 transitions. [2018-01-21 10:36:51,589 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-21 10:36:51,589 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:51,589 INFO L322 BasicCegarLoop]: trace histogram [24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:51,590 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:51,590 INFO L82 PathProgramCache]: Analyzing trace with hash -533214512, now seen corresponding path program 24 times [2018-01-21 10:36:51,590 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:51,590 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:51,591 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:51,591 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:51,591 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:51,600 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:51,601 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:51,878 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:51,879 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:51,879 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:51,879 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:51,879 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:51,879 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:51,879 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:51,884 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:36:51,885 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:36:51,891 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:51,893 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:51,894 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:51,895 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:51,896 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:51,897 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:51,898 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:51,899 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:51,900 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:51,901 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:51,902 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:51,903 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:51,904 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:51,904 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:51,906 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:52,127 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:52,127 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:52,984 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:53,004 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:53,004 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:53,007 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:36:53,008 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:36:53,018 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:53,025 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:53,033 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:53,041 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:53,050 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:53,060 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:53,070 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:53,081 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:53,092 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:53,103 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:53,115 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:53,128 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:53,141 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:36:53,150 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:53,154 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:53,159 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:53,160 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:53,371 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:53,372 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:53,372 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 80 [2018-01-21 10:36:53,373 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:53,373 INFO L409 AbstractCegarLoop]: Interpolant automaton has 54 states [2018-01-21 10:36:53,373 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2018-01-21 10:36:53,374 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2181, Invalid=4139, Unknown=0, NotChecked=0, Total=6320 [2018-01-21 10:36:53,374 INFO L87 Difference]: Start difference. First operand 43 states and 43 transitions. Second operand 54 states. [2018-01-21 10:36:53,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:53,472 INFO L93 Difference]: Finished difference Result 53 states and 53 transitions. [2018-01-21 10:36:53,473 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-21 10:36:53,473 INFO L78 Accepts]: Start accepts. Automaton has 54 states. Word has length 42 [2018-01-21 10:36:53,473 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:53,474 INFO L225 Difference]: With dead ends: 53 [2018-01-21 10:36:53,474 INFO L226 Difference]: Without dead ends: 44 [2018-01-21 10:36:53,474 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 195 GetRequests, 114 SyntacticMatches, 2 SemanticMatches, 79 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2662 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=2236, Invalid=4244, Unknown=0, NotChecked=0, Total=6480 [2018-01-21 10:36:53,475 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-01-21 10:36:53,477 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-01-21 10:36:53,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-01-21 10:36:53,478 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 44 transitions. [2018-01-21 10:36:53,478 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 44 transitions. Word has length 42 [2018-01-21 10:36:53,478 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:53,479 INFO L432 AbstractCegarLoop]: Abstraction has 44 states and 44 transitions. [2018-01-21 10:36:53,479 INFO L433 AbstractCegarLoop]: Interpolant automaton has 54 states. [2018-01-21 10:36:53,479 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 44 transitions. [2018-01-21 10:36:53,479 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-21 10:36:53,479 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:53,480 INFO L322 BasicCegarLoop]: trace histogram [25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:53,480 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:53,480 INFO L82 PathProgramCache]: Analyzing trace with hash 1800401163, now seen corresponding path program 25 times [2018-01-21 10:36:53,480 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:53,481 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:53,481 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:53,481 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:53,481 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:53,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:53,492 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:53,798 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:53,798 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:53,799 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:53,799 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:53,799 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:53,799 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:53,799 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:53,804 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:53,804 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:36:53,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:53,818 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:54,059 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:54,060 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:54,980 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:54,999 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:55,000 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:55,002 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:55,002 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:36:55,029 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:55,033 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:55,045 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:55,045 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:55,238 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:55,239 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:55,240 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 83 [2018-01-21 10:36:55,240 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:55,240 INFO L409 AbstractCegarLoop]: Interpolant automaton has 56 states [2018-01-21 10:36:55,240 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2018-01-21 10:36:55,241 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2346, Invalid=4460, Unknown=0, NotChecked=0, Total=6806 [2018-01-21 10:36:55,241 INFO L87 Difference]: Start difference. First operand 44 states and 44 transitions. Second operand 56 states. [2018-01-21 10:36:55,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:55,291 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2018-01-21 10:36:55,291 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-21 10:36:55,291 INFO L78 Accepts]: Start accepts. Automaton has 56 states. Word has length 43 [2018-01-21 10:36:55,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:55,291 INFO L225 Difference]: With dead ends: 54 [2018-01-21 10:36:55,291 INFO L226 Difference]: Without dead ends: 45 [2018-01-21 10:36:55,292 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 200 GetRequests, 116 SyntacticMatches, 2 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2873 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=2403, Invalid=4569, Unknown=0, NotChecked=0, Total=6972 [2018-01-21 10:36:55,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-01-21 10:36:55,294 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-01-21 10:36:55,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-01-21 10:36:55,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 45 transitions. [2018-01-21 10:36:55,294 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 45 transitions. Word has length 43 [2018-01-21 10:36:55,294 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:55,294 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 45 transitions. [2018-01-21 10:36:55,295 INFO L433 AbstractCegarLoop]: Interpolant automaton has 56 states. [2018-01-21 10:36:55,295 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 45 transitions. [2018-01-21 10:36:55,295 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-21 10:36:55,295 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:55,295 INFO L322 BasicCegarLoop]: trace histogram [26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:55,295 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:55,295 INFO L82 PathProgramCache]: Analyzing trace with hash 1128043056, now seen corresponding path program 26 times [2018-01-21 10:36:55,295 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:55,296 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:55,296 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:36:55,296 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:55,296 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:55,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:55,306 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:55,755 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:55,755 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:55,794 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:55,795 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:55,795 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:55,795 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:55,795 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:55,802 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:36:55,802 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:55,810 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:55,817 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:55,818 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:55,820 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:56,081 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:56,081 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:57,054 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:57,074 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:57,074 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:57,077 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:36:57,077 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:36:57,087 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:57,101 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:36:57,113 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:57,116 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:57,122 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:57,122 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:57,330 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:57,331 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:57,331 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 86 [2018-01-21 10:36:57,331 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:57,331 INFO L409 AbstractCegarLoop]: Interpolant automaton has 58 states [2018-01-21 10:36:57,332 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2018-01-21 10:36:57,332 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2517, Invalid=4793, Unknown=0, NotChecked=0, Total=7310 [2018-01-21 10:36:57,332 INFO L87 Difference]: Start difference. First operand 45 states and 45 transitions. Second operand 58 states. [2018-01-21 10:36:57,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:57,392 INFO L93 Difference]: Finished difference Result 55 states and 55 transitions. [2018-01-21 10:36:57,392 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-01-21 10:36:57,392 INFO L78 Accepts]: Start accepts. Automaton has 58 states. Word has length 44 [2018-01-21 10:36:57,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:57,393 INFO L225 Difference]: With dead ends: 55 [2018-01-21 10:36:57,393 INFO L226 Difference]: Without dead ends: 46 [2018-01-21 10:36:57,393 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 205 GetRequests, 118 SyntacticMatches, 2 SemanticMatches, 85 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3092 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2576, Invalid=4906, Unknown=0, NotChecked=0, Total=7482 [2018-01-21 10:36:57,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-01-21 10:36:57,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2018-01-21 10:36:57,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-01-21 10:36:57,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 46 transitions. [2018-01-21 10:36:57,396 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 46 transitions. Word has length 44 [2018-01-21 10:36:57,396 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:57,396 INFO L432 AbstractCegarLoop]: Abstraction has 46 states and 46 transitions. [2018-01-21 10:36:57,396 INFO L433 AbstractCegarLoop]: Interpolant automaton has 58 states. [2018-01-21 10:36:57,396 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 46 transitions. [2018-01-21 10:36:57,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-21 10:36:57,396 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:57,396 INFO L322 BasicCegarLoop]: trace histogram [27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:57,396 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:57,396 INFO L82 PathProgramCache]: Analyzing trace with hash 1759778219, now seen corresponding path program 27 times [2018-01-21 10:36:57,397 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:57,397 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:57,397 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:57,397 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:57,397 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:57,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:57,404 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:36:57,956 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:57,956 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:57,956 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:36:57,956 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:36:57,957 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:36:57,957 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:57,957 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:36:57,961 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:36:57,962 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:36:57,968 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:57,970 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:57,971 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:57,972 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:57,973 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:57,974 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:57,975 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:57,976 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:57,977 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:57,978 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:57,979 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:57,980 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:57,981 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:57,983 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:57,984 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:57,984 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:57,986 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:58,254 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:58,254 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:59,297 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:59,317 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:36:59,317 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:36:59,320 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:36:59,320 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:36:59,330 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:59,336 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:59,344 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:59,353 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:59,361 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:59,370 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:59,380 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:59,390 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:59,400 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:59,412 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:59,423 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:59,435 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:59,447 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:59,459 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:59,472 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:36:59,482 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:36:59,485 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:36:59,493 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:59,493 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:36:59,724 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:36:59,724 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:36:59,725 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 89 [2018-01-21 10:36:59,725 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:36:59,725 INFO L409 AbstractCegarLoop]: Interpolant automaton has 60 states [2018-01-21 10:36:59,725 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2018-01-21 10:36:59,725 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2694, Invalid=5138, Unknown=0, NotChecked=0, Total=7832 [2018-01-21 10:36:59,726 INFO L87 Difference]: Start difference. First operand 46 states and 46 transitions. Second operand 60 states. [2018-01-21 10:36:59,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:36:59,785 INFO L93 Difference]: Finished difference Result 56 states and 56 transitions. [2018-01-21 10:36:59,785 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-21 10:36:59,785 INFO L78 Accepts]: Start accepts. Automaton has 60 states. Word has length 45 [2018-01-21 10:36:59,785 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:36:59,785 INFO L225 Difference]: With dead ends: 56 [2018-01-21 10:36:59,785 INFO L226 Difference]: Without dead ends: 47 [2018-01-21 10:36:59,786 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 210 GetRequests, 120 SyntacticMatches, 2 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3319 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=2755, Invalid=5255, Unknown=0, NotChecked=0, Total=8010 [2018-01-21 10:36:59,786 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-01-21 10:36:59,788 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2018-01-21 10:36:59,788 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-01-21 10:36:59,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 47 transitions. [2018-01-21 10:36:59,789 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 47 transitions. Word has length 45 [2018-01-21 10:36:59,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:36:59,789 INFO L432 AbstractCegarLoop]: Abstraction has 47 states and 47 transitions. [2018-01-21 10:36:59,789 INFO L433 AbstractCegarLoop]: Interpolant automaton has 60 states. [2018-01-21 10:36:59,789 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 47 transitions. [2018-01-21 10:36:59,789 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-21 10:36:59,790 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:36:59,790 INFO L322 BasicCegarLoop]: trace histogram [28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:36:59,790 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:36:59,790 INFO L82 PathProgramCache]: Analyzing trace with hash -131268208, now seen corresponding path program 28 times [2018-01-21 10:36:59,790 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:36:59,790 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:59,791 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:36:59,791 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:36:59,791 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:36:59,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:36:59,798 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:00,158 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:00,158 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:00,158 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:00,158 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:00,158 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:00,158 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:00,158 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:00,163 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:37:00,164 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:37:00,177 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:00,179 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:00,465 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:00,466 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:01,583 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:01,602 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:01,603 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:01,605 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:37:01,605 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:37:01,645 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:01,649 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:01,655 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:01,655 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:01,883 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:01,884 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:01,884 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32, 32, 32] total 92 [2018-01-21 10:37:01,885 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:01,885 INFO L409 AbstractCegarLoop]: Interpolant automaton has 62 states [2018-01-21 10:37:01,885 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2018-01-21 10:37:01,885 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2877, Invalid=5495, Unknown=0, NotChecked=0, Total=8372 [2018-01-21 10:37:01,885 INFO L87 Difference]: Start difference. First operand 47 states and 47 transitions. Second operand 62 states. [2018-01-21 10:37:01,948 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:01,948 INFO L93 Difference]: Finished difference Result 57 states and 57 transitions. [2018-01-21 10:37:01,948 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-21 10:37:01,948 INFO L78 Accepts]: Start accepts. Automaton has 62 states. Word has length 46 [2018-01-21 10:37:01,949 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:01,949 INFO L225 Difference]: With dead ends: 57 [2018-01-21 10:37:01,949 INFO L226 Difference]: Without dead ends: 48 [2018-01-21 10:37:01,949 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 215 GetRequests, 122 SyntacticMatches, 2 SemanticMatches, 91 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3554 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2940, Invalid=5616, Unknown=0, NotChecked=0, Total=8556 [2018-01-21 10:37:01,950 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-01-21 10:37:01,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-01-21 10:37:01,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-21 10:37:01,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-01-21 10:37:01,952 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 46 [2018-01-21 10:37:01,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:01,952 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-01-21 10:37:01,952 INFO L433 AbstractCegarLoop]: Interpolant automaton has 62 states. [2018-01-21 10:37:01,952 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-01-21 10:37:01,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-21 10:37:01,952 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:01,952 INFO L322 BasicCegarLoop]: trace histogram [29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:01,952 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:01,952 INFO L82 PathProgramCache]: Analyzing trace with hash 1375834699, now seen corresponding path program 29 times [2018-01-21 10:37:01,953 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:01,953 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:01,953 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:01,953 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:01,953 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:01,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:01,964 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:02,385 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:02,386 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:02,386 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:02,386 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:02,386 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:02,386 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:02,386 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:02,391 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:37:02,391 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:02,395 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:02,395 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:02,396 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:02,397 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:02,398 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:02,398 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:02,399 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:02,400 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:02,401 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:02,402 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:02,402 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:02,403 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:02,404 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:02,405 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:02,406 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:02,410 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:02,411 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:02,412 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:02,728 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:02,728 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:03,900 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:03,919 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:03,919 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:03,922 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:37:03,922 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:03,927 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:03,929 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:03,932 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:03,936 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:03,940 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:03,944 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:03,949 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:03,954 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:03,959 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:03,965 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:03,971 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:03,978 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:03,985 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:03,992 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:04,000 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:04,014 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:04,025 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:04,028 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:04,034 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:04,034 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:04,275 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:04,276 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:04,276 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 33] total 95 [2018-01-21 10:37:04,276 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:04,277 INFO L409 AbstractCegarLoop]: Interpolant automaton has 64 states [2018-01-21 10:37:04,277 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2018-01-21 10:37:04,277 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3066, Invalid=5864, Unknown=0, NotChecked=0, Total=8930 [2018-01-21 10:37:04,277 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 64 states. [2018-01-21 10:37:04,348 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:04,348 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2018-01-21 10:37:04,348 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-21 10:37:04,348 INFO L78 Accepts]: Start accepts. Automaton has 64 states. Word has length 47 [2018-01-21 10:37:04,349 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:04,349 INFO L225 Difference]: With dead ends: 58 [2018-01-21 10:37:04,349 INFO L226 Difference]: Without dead ends: 49 [2018-01-21 10:37:04,349 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 220 GetRequests, 124 SyntacticMatches, 2 SemanticMatches, 94 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3797 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=3131, Invalid=5989, Unknown=0, NotChecked=0, Total=9120 [2018-01-21 10:37:04,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-01-21 10:37:04,351 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2018-01-21 10:37:04,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-01-21 10:37:04,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 49 transitions. [2018-01-21 10:37:04,352 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 49 transitions. Word has length 47 [2018-01-21 10:37:04,352 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:04,352 INFO L432 AbstractCegarLoop]: Abstraction has 49 states and 49 transitions. [2018-01-21 10:37:04,352 INFO L433 AbstractCegarLoop]: Interpolant automaton has 64 states. [2018-01-21 10:37:04,352 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 49 transitions. [2018-01-21 10:37:04,352 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-21 10:37:04,352 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:04,352 INFO L322 BasicCegarLoop]: trace histogram [30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:04,353 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:04,353 INFO L82 PathProgramCache]: Analyzing trace with hash 851384560, now seen corresponding path program 30 times [2018-01-21 10:37:04,353 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:04,353 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:04,353 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:04,353 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:04,353 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:04,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:04,361 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:04,764 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:04,765 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:04,765 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:04,765 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:04,765 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:04,765 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:04,765 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:04,770 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:37:04,770 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:37:04,777 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:04,779 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:04,780 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:04,781 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:04,782 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:04,783 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:04,784 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:04,785 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:04,786 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:04,787 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:04,789 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:04,790 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:04,791 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:04,792 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:04,793 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:04,795 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:04,795 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:04,797 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:05,129 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:05,130 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:06,415 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:06,441 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:06,441 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:06,444 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:37:06,444 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:37:06,454 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:06,461 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:06,470 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:06,479 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:06,488 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:06,497 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:06,507 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:06,517 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:06,527 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:06,538 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:06,549 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:06,561 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:06,573 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:06,585 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:06,598 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:06,612 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:06,622 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:06,625 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:06,632 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:06,632 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:06,937 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:06,938 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:06,938 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 34] total 98 [2018-01-21 10:37:06,938 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:06,938 INFO L409 AbstractCegarLoop]: Interpolant automaton has 66 states [2018-01-21 10:37:06,939 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 66 interpolants. [2018-01-21 10:37:06,939 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3261, Invalid=6245, Unknown=0, NotChecked=0, Total=9506 [2018-01-21 10:37:06,939 INFO L87 Difference]: Start difference. First operand 49 states and 49 transitions. Second operand 66 states. [2018-01-21 10:37:07,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:07,031 INFO L93 Difference]: Finished difference Result 59 states and 59 transitions. [2018-01-21 10:37:07,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-21 10:37:07,031 INFO L78 Accepts]: Start accepts. Automaton has 66 states. Word has length 48 [2018-01-21 10:37:07,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:07,032 INFO L225 Difference]: With dead ends: 59 [2018-01-21 10:37:07,032 INFO L226 Difference]: Without dead ends: 50 [2018-01-21 10:37:07,033 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 225 GetRequests, 126 SyntacticMatches, 2 SemanticMatches, 97 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4048 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=3328, Invalid=6374, Unknown=0, NotChecked=0, Total=9702 [2018-01-21 10:37:07,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-01-21 10:37:07,035 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2018-01-21 10:37:07,035 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-01-21 10:37:07,036 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 50 transitions. [2018-01-21 10:37:07,036 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 50 transitions. Word has length 48 [2018-01-21 10:37:07,036 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:07,036 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 50 transitions. [2018-01-21 10:37:07,036 INFO L433 AbstractCegarLoop]: Interpolant automaton has 66 states. [2018-01-21 10:37:07,036 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 50 transitions. [2018-01-21 10:37:07,037 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-01-21 10:37:07,037 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:07,037 INFO L322 BasicCegarLoop]: trace histogram [31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:07,037 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:07,037 INFO L82 PathProgramCache]: Analyzing trace with hash 1773299435, now seen corresponding path program 31 times [2018-01-21 10:37:07,038 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:07,038 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:07,038 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:07,038 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:07,039 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:07,050 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:07,050 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:07,613 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:07,614 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:07,614 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:07,614 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:07,614 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:07,614 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:07,614 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:07,619 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:37:07,619 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:37:07,632 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:07,634 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:07,974 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:07,974 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:09,302 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:09,322 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:09,322 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:09,325 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:37:09,325 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:37:09,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:09,363 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:09,370 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:09,370 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:09,630 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:09,631 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:09,631 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 101 [2018-01-21 10:37:09,631 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:09,632 INFO L409 AbstractCegarLoop]: Interpolant automaton has 68 states [2018-01-21 10:37:09,632 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2018-01-21 10:37:09,632 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3462, Invalid=6638, Unknown=0, NotChecked=0, Total=10100 [2018-01-21 10:37:09,632 INFO L87 Difference]: Start difference. First operand 50 states and 50 transitions. Second operand 68 states. [2018-01-21 10:37:09,688 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:09,688 INFO L93 Difference]: Finished difference Result 60 states and 60 transitions. [2018-01-21 10:37:09,688 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-21 10:37:09,688 INFO L78 Accepts]: Start accepts. Automaton has 68 states. Word has length 49 [2018-01-21 10:37:09,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:09,689 INFO L225 Difference]: With dead ends: 60 [2018-01-21 10:37:09,689 INFO L226 Difference]: Without dead ends: 51 [2018-01-21 10:37:09,689 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 230 GetRequests, 128 SyntacticMatches, 2 SemanticMatches, 100 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4307 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=3531, Invalid=6771, Unknown=0, NotChecked=0, Total=10302 [2018-01-21 10:37:09,689 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-01-21 10:37:09,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2018-01-21 10:37:09,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-01-21 10:37:09,691 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 51 transitions. [2018-01-21 10:37:09,691 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 51 transitions. Word has length 49 [2018-01-21 10:37:09,691 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:09,691 INFO L432 AbstractCegarLoop]: Abstraction has 51 states and 51 transitions. [2018-01-21 10:37:09,691 INFO L433 AbstractCegarLoop]: Interpolant automaton has 68 states. [2018-01-21 10:37:09,692 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 51 transitions. [2018-01-21 10:37:09,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-21 10:37:09,692 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:09,692 INFO L322 BasicCegarLoop]: trace histogram [32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:09,692 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:09,692 INFO L82 PathProgramCache]: Analyzing trace with hash 287889488, now seen corresponding path program 32 times [2018-01-21 10:37:09,692 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:09,693 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:09,693 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:37:09,693 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:09,693 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:09,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:09,704 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:10,167 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:10,168 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:10,168 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:10,168 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:10,168 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:10,168 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:10,168 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:10,173 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:37:10,174 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:10,180 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:10,187 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:10,188 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:10,190 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:10,552 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:10,552 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:11,955 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:11,975 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:11,975 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:11,983 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:37:11,983 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:11,993 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:12,008 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:12,022 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:12,025 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:12,032 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:12,032 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:12,307 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:12,308 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:12,309 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 36, 36, 36] total 104 [2018-01-21 10:37:12,309 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:12,309 INFO L409 AbstractCegarLoop]: Interpolant automaton has 70 states [2018-01-21 10:37:12,309 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants. [2018-01-21 10:37:12,310 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3669, Invalid=7043, Unknown=0, NotChecked=0, Total=10712 [2018-01-21 10:37:12,310 INFO L87 Difference]: Start difference. First operand 51 states and 51 transitions. Second operand 70 states. [2018-01-21 10:37:12,428 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:12,428 INFO L93 Difference]: Finished difference Result 61 states and 61 transitions. [2018-01-21 10:37:12,428 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-01-21 10:37:12,429 INFO L78 Accepts]: Start accepts. Automaton has 70 states. Word has length 50 [2018-01-21 10:37:12,429 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:12,429 INFO L225 Difference]: With dead ends: 61 [2018-01-21 10:37:12,429 INFO L226 Difference]: Without dead ends: 52 [2018-01-21 10:37:12,430 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 235 GetRequests, 130 SyntacticMatches, 2 SemanticMatches, 103 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4574 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=3740, Invalid=7180, Unknown=0, NotChecked=0, Total=10920 [2018-01-21 10:37:12,430 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-01-21 10:37:12,432 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-01-21 10:37:12,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-01-21 10:37:12,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 52 transitions. [2018-01-21 10:37:12,433 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 52 transitions. Word has length 50 [2018-01-21 10:37:12,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:12,434 INFO L432 AbstractCegarLoop]: Abstraction has 52 states and 52 transitions. [2018-01-21 10:37:12,434 INFO L433 AbstractCegarLoop]: Interpolant automaton has 70 states. [2018-01-21 10:37:12,434 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 52 transitions. [2018-01-21 10:37:12,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-21 10:37:12,434 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:12,435 INFO L322 BasicCegarLoop]: trace histogram [33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:12,435 INFO L371 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:12,435 INFO L82 PathProgramCache]: Analyzing trace with hash 1484821387, now seen corresponding path program 33 times [2018-01-21 10:37:12,435 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:12,436 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:12,436 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:12,436 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:12,436 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:12,448 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:12,449 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:12,932 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:12,932 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:12,932 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:12,932 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:12,932 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:12,932 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:12,932 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:12,937 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:37:12,937 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:37:12,944 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:12,946 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:12,946 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:12,947 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:12,948 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:12,949 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:12,950 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:12,951 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:12,952 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:12,954 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:12,955 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:12,956 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:12,957 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:12,958 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:12,959 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:12,960 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:12,961 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:12,963 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:12,963 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:12,965 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:13,354 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:13,354 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:14,852 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:14,872 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:14,872 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:14,875 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:37:14,875 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:37:14,884 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:14,891 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:14,899 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:14,907 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:14,916 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:14,925 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:14,935 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:14,944 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:14,955 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:14,966 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:14,978 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:14,990 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:15,001 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:15,014 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:15,027 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:15,041 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:15,056 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:15,071 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:15,082 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:15,086 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:15,093 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:15,094 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:15,378 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:15,379 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:15,379 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 107 [2018-01-21 10:37:15,379 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:15,379 INFO L409 AbstractCegarLoop]: Interpolant automaton has 72 states [2018-01-21 10:37:15,380 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 72 interpolants. [2018-01-21 10:37:15,380 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3882, Invalid=7460, Unknown=0, NotChecked=0, Total=11342 [2018-01-21 10:37:15,380 INFO L87 Difference]: Start difference. First operand 52 states and 52 transitions. Second operand 72 states. [2018-01-21 10:37:15,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:15,472 INFO L93 Difference]: Finished difference Result 62 states and 62 transitions. [2018-01-21 10:37:15,472 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-01-21 10:37:15,472 INFO L78 Accepts]: Start accepts. Automaton has 72 states. Word has length 51 [2018-01-21 10:37:15,473 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:15,473 INFO L225 Difference]: With dead ends: 62 [2018-01-21 10:37:15,473 INFO L226 Difference]: Without dead ends: 53 [2018-01-21 10:37:15,474 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 240 GetRequests, 132 SyntacticMatches, 2 SemanticMatches, 106 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4849 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=3955, Invalid=7601, Unknown=0, NotChecked=0, Total=11556 [2018-01-21 10:37:15,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-01-21 10:37:15,476 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-01-21 10:37:15,476 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-01-21 10:37:15,477 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 53 transitions. [2018-01-21 10:37:15,477 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 53 transitions. Word has length 51 [2018-01-21 10:37:15,477 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:15,477 INFO L432 AbstractCegarLoop]: Abstraction has 53 states and 53 transitions. [2018-01-21 10:37:15,478 INFO L433 AbstractCegarLoop]: Interpolant automaton has 72 states. [2018-01-21 10:37:15,478 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 53 transitions. [2018-01-21 10:37:15,478 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-21 10:37:15,478 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:15,478 INFO L322 BasicCegarLoop]: trace histogram [34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:15,478 INFO L371 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:15,479 INFO L82 PathProgramCache]: Analyzing trace with hash -64995408, now seen corresponding path program 34 times [2018-01-21 10:37:15,479 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:15,479 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:15,479 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:15,480 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:15,480 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:15,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:15,492 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:16,036 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:16,036 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:16,066 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:16,067 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:16,067 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:16,067 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:16,067 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:16,072 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:37:16,072 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:37:16,087 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:16,088 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:16,505 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:16,505 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:18,065 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:18,087 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:18,087 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:18,090 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:37:18,090 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:37:18,134 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:18,138 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:18,149 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:18,149 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:18,461 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:18,462 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:18,463 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 110 [2018-01-21 10:37:18,463 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:18,463 INFO L409 AbstractCegarLoop]: Interpolant automaton has 74 states [2018-01-21 10:37:18,463 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 74 interpolants. [2018-01-21 10:37:18,464 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4101, Invalid=7889, Unknown=0, NotChecked=0, Total=11990 [2018-01-21 10:37:18,464 INFO L87 Difference]: Start difference. First operand 53 states and 53 transitions. Second operand 74 states. [2018-01-21 10:37:18,519 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:18,519 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-01-21 10:37:18,519 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-01-21 10:37:18,519 INFO L78 Accepts]: Start accepts. Automaton has 74 states. Word has length 52 [2018-01-21 10:37:18,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:18,520 INFO L225 Difference]: With dead ends: 63 [2018-01-21 10:37:18,520 INFO L226 Difference]: Without dead ends: 54 [2018-01-21 10:37:18,520 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 245 GetRequests, 134 SyntacticMatches, 2 SemanticMatches, 109 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5132 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=4176, Invalid=8034, Unknown=0, NotChecked=0, Total=12210 [2018-01-21 10:37:18,520 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-01-21 10:37:18,522 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-01-21 10:37:18,522 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-01-21 10:37:18,522 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 54 transitions. [2018-01-21 10:37:18,522 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 54 transitions. Word has length 52 [2018-01-21 10:37:18,522 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:18,523 INFO L432 AbstractCegarLoop]: Abstraction has 54 states and 54 transitions. [2018-01-21 10:37:18,523 INFO L433 AbstractCegarLoop]: Interpolant automaton has 74 states. [2018-01-21 10:37:18,523 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 54 transitions. [2018-01-21 10:37:18,523 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-01-21 10:37:18,523 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:18,523 INFO L322 BasicCegarLoop]: trace histogram [35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:18,523 INFO L371 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:18,523 INFO L82 PathProgramCache]: Analyzing trace with hash -864675797, now seen corresponding path program 35 times [2018-01-21 10:37:18,523 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:18,524 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:18,524 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:18,524 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:18,524 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:18,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:18,534 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:19,263 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:19,263 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:19,263 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:19,263 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:19,263 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:19,263 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:19,263 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:19,269 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:37:19,269 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:19,273 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:19,274 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:19,275 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:19,275 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:19,276 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:19,277 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:19,278 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:19,278 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:19,279 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:19,280 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:19,281 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:19,282 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:19,283 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:19,283 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:19,284 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:19,285 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:19,286 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:19,287 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:19,291 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:19,292 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:19,294 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:19,723 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:19,723 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:21,353 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:21,373 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:21,373 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:21,376 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:37:21,376 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:21,380 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:21,382 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:21,385 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:21,389 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:21,393 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:21,397 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:21,401 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:21,407 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:21,416 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:21,424 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:21,431 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:21,437 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:21,444 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:21,452 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:21,460 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:21,469 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:21,478 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:21,487 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:21,502 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:21,514 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:21,518 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:21,525 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:21,525 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:21,833 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:21,834 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:21,834 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39, 39, 39, 39] total 113 [2018-01-21 10:37:21,834 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:21,835 INFO L409 AbstractCegarLoop]: Interpolant automaton has 76 states [2018-01-21 10:37:21,835 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 76 interpolants. [2018-01-21 10:37:21,835 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4326, Invalid=8330, Unknown=0, NotChecked=0, Total=12656 [2018-01-21 10:37:21,835 INFO L87 Difference]: Start difference. First operand 54 states and 54 transitions. Second operand 76 states. [2018-01-21 10:37:21,907 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:21,907 INFO L93 Difference]: Finished difference Result 64 states and 64 transitions. [2018-01-21 10:37:21,907 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-01-21 10:37:21,907 INFO L78 Accepts]: Start accepts. Automaton has 76 states. Word has length 53 [2018-01-21 10:37:21,907 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:21,908 INFO L225 Difference]: With dead ends: 64 [2018-01-21 10:37:21,908 INFO L226 Difference]: Without dead ends: 55 [2018-01-21 10:37:21,908 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 250 GetRequests, 136 SyntacticMatches, 2 SemanticMatches, 112 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5423 ImplicationChecksByTransitivity, 2.4s TimeCoverageRelationStatistics Valid=4403, Invalid=8479, Unknown=0, NotChecked=0, Total=12882 [2018-01-21 10:37:21,908 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-01-21 10:37:21,910 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2018-01-21 10:37:21,910 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-01-21 10:37:21,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 55 transitions. [2018-01-21 10:37:21,910 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 55 transitions. Word has length 53 [2018-01-21 10:37:21,911 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:21,911 INFO L432 AbstractCegarLoop]: Abstraction has 55 states and 55 transitions. [2018-01-21 10:37:21,911 INFO L433 AbstractCegarLoop]: Interpolant automaton has 76 states. [2018-01-21 10:37:21,911 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 55 transitions. [2018-01-21 10:37:21,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-01-21 10:37:21,911 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:21,911 INFO L322 BasicCegarLoop]: trace histogram [36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:21,911 INFO L371 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:21,911 INFO L82 PathProgramCache]: Analyzing trace with hash 115035920, now seen corresponding path program 36 times [2018-01-21 10:37:21,911 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:21,912 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:21,912 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:21,912 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:21,912 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:21,921 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:21,922 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:22,480 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:22,480 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:22,480 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:22,480 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:22,481 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:22,481 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:22,481 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:22,485 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:37:22,485 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:37:22,492 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:22,493 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:22,494 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:22,495 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:22,496 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:22,497 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:22,498 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:22,499 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:22,500 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:22,501 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:22,502 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:22,503 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:22,504 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:22,505 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:22,506 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:22,507 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:22,508 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:22,509 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:22,511 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:22,511 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:22,512 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:22,926 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:22,927 INFO L314 TraceCheckSpWp]: Computing backward predicates... Received shutdown request... [2018-01-21 10:37:23,599 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-21 10:37:23,599 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 10:37:23,601 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 10:37:23,601 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 10:37:23,601 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 10:37:23,601 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 10:37:23,601 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 10:37:23,601 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 10:37:23,601 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 10:37:23,601 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == mainErr0EnsuresViolation======== [2018-01-21 10:37:23,601 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 10:37:23,602 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states. [2018-01-21 10:37:23,602 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 10:37:23,603 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 21.01 10:37:23 BoogieIcfgContainer [2018-01-21 10:37:23,603 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-21 10:37:23,603 INFO L168 Benchmark]: Toolchain (without parser) took 55602.35 ms. Allocated memory was 307.8 MB in the beginning and 816.3 MB in the end (delta: 508.6 MB). Free memory was 266.7 MB in the beginning and 766.1 MB in the end (delta: -499.4 MB). Peak memory consumption was 9.2 MB. Max. memory is 5.3 GB. [2018-01-21 10:37:23,604 INFO L168 Benchmark]: CDTParser took 0.24 ms. Allocated memory is still 307.8 MB. Free memory is still 271.7 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-21 10:37:23,604 INFO L168 Benchmark]: CACSL2BoogieTranslator took 175.42 ms. Allocated memory is still 307.8 MB. Free memory was 265.7 MB in the beginning and 257.7 MB in the end (delta: 8.0 MB). Peak memory consumption was 8.0 MB. Max. memory is 5.3 GB. [2018-01-21 10:37:23,605 INFO L168 Benchmark]: Boogie Preprocessor took 29.84 ms. Allocated memory is still 307.8 MB. Free memory was 257.7 MB in the beginning and 256.7 MB in the end (delta: 996.4 kB). Peak memory consumption was 996.4 kB. Max. memory is 5.3 GB. [2018-01-21 10:37:23,605 INFO L168 Benchmark]: RCFGBuilder took 191.80 ms. Allocated memory is still 307.8 MB. Free memory was 256.7 MB in the beginning and 244.6 MB in the end (delta: 12.2 MB). Peak memory consumption was 12.2 MB. Max. memory is 5.3 GB. [2018-01-21 10:37:23,605 INFO L168 Benchmark]: TraceAbstraction took 55199.53 ms. Allocated memory was 307.8 MB in the beginning and 816.3 MB in the end (delta: 508.6 MB). Free memory was 243.6 MB in the beginning and 766.1 MB in the end (delta: -522.5 MB). There was no memory consumed. Max. memory is 5.3 GB. [2018-01-21 10:37:23,606 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.24 ms. Allocated memory is still 307.8 MB. Free memory is still 271.7 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 175.42 ms. Allocated memory is still 307.8 MB. Free memory was 265.7 MB in the beginning and 257.7 MB in the end (delta: 8.0 MB). Peak memory consumption was 8.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 29.84 ms. Allocated memory is still 307.8 MB. Free memory was 257.7 MB in the beginning and 256.7 MB in the end (delta: 996.4 kB). Peak memory consumption was 996.4 kB. Max. memory is 5.3 GB. * RCFGBuilder took 191.80 ms. Allocated memory is still 307.8 MB. Free memory was 256.7 MB in the beginning and 244.6 MB in the end (delta: 12.2 MB). Peak memory consumption was 12.2 MB. Max. memory is 5.3 GB. * TraceAbstraction took 55199.53 ms. Allocated memory was 307.8 MB in the beginning and 816.3 MB in the end (delta: 508.6 MB). Free memory was 243.6 MB in the beginning and 766.1 MB in the end (delta: -522.5 MB). There was no memory consumed. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 18 LocStat_MAX_WEQGRAPH_SIZE : 2 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 126 LocStat_NO_SUPPORTING_DISEQUALITIES : 29 LocStat_NO_DISJUNCTIONS : -36 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 25 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 35 TransStat_NO_SUPPORTING_DISEQUALITIES : 5 TransStat_NO_DISJUNCTIONS : 25 TransStat_MAX_NO_DISJUNCTIONS : 1 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.515071 RENAME_VARIABLES(MILLISECONDS) : 0.153160 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.455408 PROJECTAWAY(MILLISECONDS) : 0.104720 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.099185 DISJOIN(MILLISECONDS) : 0.000000 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.199931 ADD_EQUALITY(MILLISECONDS) : 0.134421 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.018039 #CONJOIN_DISJUNCTIVE : 34 #RENAME_VARIABLES : 64 #UNFREEZE : 0 #CONJOIN : 64 #PROJECTAWAY : 66 #ADD_WEAK_EQUALITY : 4 #DISJOIN : 0 #RENAME_VARIABLES_DISJUNCTIVE : 64 #ADD_EQUALITY : 35 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1]: not all allocated memory was freed not all allocated memory was freed We found a FailurePath: - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.initErr0EnsuresViolation CFG has 4 procedures, 22 locations, 3 error locations. UNSAFE Result, 0.1s OverallTime, 1 OverallIterations, 1 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=22occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 3 NumberOfCodeBlocks, 3 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1). Cancelled while BasicCegarLoop was analyzing trace of length 55 with TraceHistMax 36, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 91 known predicates. - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.startErr0EnsuresViolation CFG has 4 procedures, 22 locations, 3 error locations. TIMEOUT Result, 54.9s OverallTime, 37 OverallIterations, 36 TraceHistogramMax, 2.2s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 615 SDtfs, 117 SDslu, 11554 SDs, 0 SdLazy, 2569 SolverSat, 135 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 5780 GetRequests, 3572 SyntacticMatches, 70 SemanticMatches, 2138 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69020 ImplicationChecksByTransitivity, 33.3s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=55occurred in iteration=36, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.3s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 36 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 2.8s SatisfiabilityAnalysisTime, 45.9s InterpolantComputationTime, 3798 NumberOfCodeBlocks, 3798 NumberOfCodeBlocksAsserted, 460 NumberOfCheckSat, 6142 ConstructedInterpolants, 0 QuantifiedInterpolants, 973390 SizeOfPredicates, 70 NumberOfNonLiveVariables, 8330 ConjunctsInSsa, 1470 ConjunctsInUnsatCore, 176 InterpolantComputations, 1 PerfectInterpolantSequences, 0/38850 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 25]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 25). Cancelled while IsEmpty was searching accepting run (input had 22 states). - StatisticsResult: Ultimate Automizer benchmark data for error location: mainErr0EnsuresViolation CFG has 4 procedures, 22 locations, 3 error locations. TIMEOUT Result, 0.0s OverallTime, 0 OverallIterations, 0 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=22occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset3_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-21_10-37-23-613.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset3_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-21_10-37-23-613.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset3_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-21_10-37-23-613.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset3_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-21_10-37-23-613.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset3_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-1-2018-01-21_10-37-23-613.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memset3_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-2-2018-01-21_10-37-23-613.csv Completed graceful shutdown