java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memsetNonZero2_false-valid-deref-write.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-2f49842 [2018-01-21 10:31:31,013 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-21 10:31:31,015 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-21 10:31:31,029 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-21 10:31:31,029 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-21 10:31:31,030 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-21 10:31:31,031 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-21 10:31:31,032 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-21 10:31:31,034 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-21 10:31:31,034 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-21 10:31:31,035 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-21 10:31:31,035 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-21 10:31:31,035 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-21 10:31:31,036 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-21 10:31:31,037 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-21 10:31:31,040 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-21 10:31:31,042 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-21 10:31:31,044 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-21 10:31:31,045 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-21 10:31:31,046 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-21 10:31:31,049 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-01-21 10:31:31,054 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-21 10:31:31,054 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-21 10:31:31,055 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf [2018-01-21 10:31:31,065 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-21 10:31:31,065 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-21 10:31:31,066 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-21 10:31:31,066 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-21 10:31:31,066 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-21 10:31:31,066 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-21 10:31:31,066 INFO L133 SettingsManager]: * Precise comparison operator=true [2018-01-21 10:31:31,067 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-21 10:31:31,067 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-21 10:31:31,068 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-21 10:31:31,068 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-21 10:31:31,068 INFO L133 SettingsManager]: * Check allocation purity=true [2018-01-21 10:31:31,068 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-21 10:31:31,068 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-21 10:31:31,068 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-21 10:31:31,069 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-01-21 10:31:31,069 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-21 10:31:31,069 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-01-21 10:31:31,069 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-21 10:31:31,069 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-01-21 10:31:31,070 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-01-21 10:31:31,070 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-21 10:31:31,070 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-21 10:31:31,070 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-21 10:31:31,070 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-21 10:31:31,070 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-21 10:31:31,071 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 10:31:31,071 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-21 10:31:31,071 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-21 10:31:31,071 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-21 10:31:31,071 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-21 10:31:31,072 INFO L133 SettingsManager]: * Stop after first violation was found=false [2018-01-21 10:31:31,072 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-21 10:31:31,072 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-21 10:31:31,072 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-21 10:31:31,072 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-21 10:31:31,072 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-21 10:31:31,073 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-21 10:31:31,074 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-21 10:31:31,108 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-21 10:31:31,121 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-21 10:31:31,125 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-21 10:31:31,126 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-21 10:31:31,127 INFO L276 PluginConnector]: CDTParser initialized [2018-01-21 10:31:31,127 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memsetNonZero2_false-valid-deref-write.c [2018-01-21 10:31:31,262 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-21 10:31:31,268 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-21 10:31:31,269 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-21 10:31:31,269 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-21 10:31:31,274 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-21 10:31:31,275 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 10:31:31" (1/1) ... [2018-01-21 10:31:31,277 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@8d55d51 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:31:31, skipping insertion in model container [2018-01-21 10:31:31,278 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 10:31:31" (1/1) ... [2018-01-21 10:31:31,292 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 10:31:31,308 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 10:31:31,413 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 10:31:31,426 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 10:31:31,462 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:31:31 WrapperNode [2018-01-21 10:31:31,462 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-21 10:31:31,462 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-21 10:31:31,462 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-21 10:31:31,462 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-21 10:31:31,473 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:31:31" (1/1) ... [2018-01-21 10:31:31,473 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:31:31" (1/1) ... [2018-01-21 10:31:31,480 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:31:31" (1/1) ... [2018-01-21 10:31:31,481 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:31:31" (1/1) ... [2018-01-21 10:31:31,483 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:31:31" (1/1) ... [2018-01-21 10:31:31,485 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:31:31" (1/1) ... [2018-01-21 10:31:31,486 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:31:31" (1/1) ... [2018-01-21 10:31:31,487 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-21 10:31:31,487 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-21 10:31:31,487 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-21 10:31:31,488 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-21 10:31:31,489 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:31:31" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 10:31:31,533 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-21 10:31:31,533 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-21 10:31:31,533 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-21 10:31:31,533 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-21 10:31:31,533 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-21 10:31:31,534 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-21 10:31:31,534 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-21 10:31:31,534 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-21 10:31:31,534 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-21 10:31:31,534 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-21 10:31:31,534 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-21 10:31:31,534 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-21 10:31:31,641 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-21 10:31:31,642 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 10:31:31 BoogieIcfgContainer [2018-01-21 10:31:31,642 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-21 10:31:31,643 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-21 10:31:31,643 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-21 10:31:31,644 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-21 10:31:31,644 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 21.01 10:31:31" (1/3) ... [2018-01-21 10:31:31,645 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@87a776 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 10:31:31, skipping insertion in model container [2018-01-21 10:31:31,645 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:31:31" (2/3) ... [2018-01-21 10:31:31,646 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@87a776 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 10:31:31, skipping insertion in model container [2018-01-21 10:31:31,646 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 10:31:31" (3/3) ... [2018-01-21 10:31:31,647 INFO L105 eAbstractionObserver]: Analyzing ICFG memsetNonZero2_false-valid-deref-write.c [2018-01-21 10:31:31,653 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-21 10:31:31,659 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-01-21 10:31:31,693 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 10:31:31,694 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 10:31:31,694 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 10:31:31,694 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 10:31:31,694 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 10:31:31,694 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 10:31:31,694 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 10:31:31,694 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.initErr0EnsuresViolation======== [2018-01-21 10:31:31,695 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 10:31:31,714 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 10:31:31,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-01-21 10:31:31,720 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:31,721 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-01-21 10:31:31,722 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.initErr0EnsuresViolation]=== [2018-01-21 10:31:31,727 INFO L82 PathProgramCache]: Analyzing trace with hash 50935, now seen corresponding path program 1 times [2018-01-21 10:31:31,730 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:31,778 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:31,778 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:31,778 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:31,779 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:31,805 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 10:31:31,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 10:31:31,827 INFO L381 BasicCegarLoop]: Counterexample might be feasible [2018-01-21 10:31:31,832 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-21 10:31:31,838 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 10:31:31,838 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 10:31:31,838 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 10:31:31,838 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 10:31:31,838 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 10:31:31,839 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 10:31:31,839 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 10:31:31,839 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.startErr0EnsuresViolation======== [2018-01-21 10:31:31,839 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 10:31:31,840 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 10:31:31,841 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-21 10:31:31,841 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:31,841 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:31,841 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:31,842 INFO L82 PathProgramCache]: Analyzing trace with hash 457189328, now seen corresponding path program 1 times [2018-01-21 10:31:31,842 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:31,843 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:31,843 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:31,843 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:31,844 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:31,867 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:31,874 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:31,940 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:31,942 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 10:31:31,942 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-21 10:31:31,942 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 10:31:31,944 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-21 10:31:31,953 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-21 10:31:31,955 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-21 10:31:31,956 INFO L87 Difference]: Start difference. First operand 21 states. Second operand 4 states. [2018-01-21 10:31:31,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:31,991 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 10:31:31,992 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-21 10:31:31,993 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 17 [2018-01-21 10:31:31,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:32,004 INFO L225 Difference]: With dead ends: 33 [2018-01-21 10:31:32,004 INFO L226 Difference]: Without dead ends: 19 [2018-01-21 10:31:32,067 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-21 10:31:32,083 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-01-21 10:31:32,093 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2018-01-21 10:31:32,094 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-01-21 10:31:32,095 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 19 transitions. [2018-01-21 10:31:32,096 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 19 transitions. Word has length 17 [2018-01-21 10:31:32,096 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:32,096 INFO L432 AbstractCegarLoop]: Abstraction has 19 states and 19 transitions. [2018-01-21 10:31:32,096 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-21 10:31:32,096 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 19 transitions. [2018-01-21 10:31:32,096 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-01-21 10:31:32,097 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:32,097 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:32,097 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:32,097 INFO L82 PathProgramCache]: Analyzing trace with hash -114007861, now seen corresponding path program 1 times [2018-01-21 10:31:32,097 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:32,098 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:32,098 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:32,098 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:32,098 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:32,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:32,109 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:32,166 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:32,166 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:32,166 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:32,167 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 19 with the following transitions: [2018-01-21 10:31:32,170 INFO L201 CegarAbsIntRunner]: [0], [1], [3], [7], [9], [10], [14], [15], [17], [18], [19], [20], [22], [23], [24], [25], [26], [27] [2018-01-21 10:31:32,210 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-21 10:31:32,210 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-21 10:31:32,450 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-21 10:31:32,451 INFO L268 AbstractInterpreter]: Visited 18 different actions 22 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 15 variables. [2018-01-21 10:31:32,466 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-21 10:31:32,466 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:32,466 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:32,475 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:32,475 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:31:32,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:32,504 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:32,525 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:32,525 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:32,715 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:32,736 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:32,737 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:32,740 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:32,741 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:31:32,768 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:32,773 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:32,778 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:32,778 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:32,849 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:32,850 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:32,851 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-21 10:31:32,851 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:32,852 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-21 10:31:32,852 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-21 10:31:32,853 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-01-21 10:31:32,853 INFO L87 Difference]: Start difference. First operand 19 states and 19 transitions. Second operand 6 states. [2018-01-21 10:31:32,880 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:32,880 INFO L93 Difference]: Finished difference Result 29 states and 29 transitions. [2018-01-21 10:31:32,881 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-21 10:31:32,881 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 18 [2018-01-21 10:31:32,881 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:32,882 INFO L225 Difference]: With dead ends: 29 [2018-01-21 10:31:32,882 INFO L226 Difference]: Without dead ends: 20 [2018-01-21 10:31:32,883 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 66 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-01-21 10:31:32,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-01-21 10:31:32,886 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-01-21 10:31:32,886 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-01-21 10:31:32,887 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2018-01-21 10:31:32,887 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 18 [2018-01-21 10:31:32,888 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:32,888 INFO L432 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2018-01-21 10:31:32,888 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-21 10:31:32,888 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-01-21 10:31:32,889 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-21 10:31:32,889 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:32,889 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:32,889 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:32,890 INFO L82 PathProgramCache]: Analyzing trace with hash -641251536, now seen corresponding path program 2 times [2018-01-21 10:31:32,890 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:32,891 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:32,891 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:32,891 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:32,891 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:32,905 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:32,906 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:32,968 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:32,968 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:32,968 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:32,969 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:32,969 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:32,969 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:32,969 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:32,980 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:31:32,981 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:32,996 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:32,998 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:32,999 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:33,001 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:33,018 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:33,019 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:33,224 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:33,245 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:33,245 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:33,248 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:31:33,248 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:33,261 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:33,269 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:33,275 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:33,279 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:33,283 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:33,284 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:33,366 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:33,367 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:33,368 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-21 10:31:33,368 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:33,368 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-21 10:31:33,369 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-21 10:31:33,369 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-01-21 10:31:33,370 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand 7 states. [2018-01-21 10:31:33,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:33,392 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-01-21 10:31:33,392 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-21 10:31:33,392 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-01-21 10:31:33,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:33,393 INFO L225 Difference]: With dead ends: 30 [2018-01-21 10:31:33,393 INFO L226 Difference]: Without dead ends: 21 [2018-01-21 10:31:33,394 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 69 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=77, Unknown=0, NotChecked=0, Total=132 [2018-01-21 10:31:33,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2018-01-21 10:31:33,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-01-21 10:31:33,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-01-21 10:31:33,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-01-21 10:31:33,398 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 19 [2018-01-21 10:31:33,398 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:33,398 INFO L432 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-01-21 10:31:33,399 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-21 10:31:33,399 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-01-21 10:31:33,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-01-21 10:31:33,400 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:33,400 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:33,400 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:33,400 INFO L82 PathProgramCache]: Analyzing trace with hash 194063723, now seen corresponding path program 3 times [2018-01-21 10:31:33,400 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:33,401 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:33,401 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:33,402 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:33,402 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:33,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:33,414 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:33,467 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:33,468 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:33,468 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:33,468 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:33,468 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:33,468 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:33,468 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:33,475 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:31:33,475 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:31:33,485 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:33,488 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:33,489 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:33,497 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:33,499 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:33,527 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:33,527 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:33,674 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:33,694 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:33,694 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:33,697 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:31:33,698 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:31:33,708 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:33,716 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:33,724 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:33,729 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:33,733 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:33,739 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:33,739 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:33,791 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:33,793 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:33,794 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-21 10:31:33,794 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:33,794 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-21 10:31:33,795 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-21 10:31:33,795 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-21 10:31:33,795 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 8 states. [2018-01-21 10:31:33,811 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:33,812 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-01-21 10:31:33,812 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-21 10:31:33,812 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 20 [2018-01-21 10:31:33,812 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:33,813 INFO L225 Difference]: With dead ends: 31 [2018-01-21 10:31:33,813 INFO L226 Difference]: Without dead ends: 22 [2018-01-21 10:31:33,813 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 72 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=77, Invalid=105, Unknown=0, NotChecked=0, Total=182 [2018-01-21 10:31:33,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-01-21 10:31:33,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-01-21 10:31:33,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-01-21 10:31:33,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2018-01-21 10:31:33,816 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 20 [2018-01-21 10:31:33,816 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:33,816 INFO L432 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2018-01-21 10:31:33,816 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-21 10:31:33,816 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-01-21 10:31:33,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-21 10:31:33,817 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:33,817 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:33,817 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:33,817 INFO L82 PathProgramCache]: Analyzing trace with hash 319032976, now seen corresponding path program 4 times [2018-01-21 10:31:33,817 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:33,818 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:33,818 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:33,819 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:33,819 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:33,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:33,832 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:33,888 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:33,889 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:33,889 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:33,889 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:33,889 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:33,889 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:33,889 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:33,894 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:31:33,895 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:31:33,904 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:33,906 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:33,914 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:33,914 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:34,017 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:34,038 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:34,038 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:34,041 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:31:34,041 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:31:34,063 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:34,066 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:34,070 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:34,070 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:34,113 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:34,114 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:34,115 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-21 10:31:34,115 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:34,115 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-21 10:31:34,115 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-21 10:31:34,115 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-21 10:31:34,116 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 9 states. [2018-01-21 10:31:34,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:34,135 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2018-01-21 10:31:34,135 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-21 10:31:34,135 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 21 [2018-01-21 10:31:34,135 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:34,136 INFO L225 Difference]: With dead ends: 32 [2018-01-21 10:31:34,136 INFO L226 Difference]: Without dead ends: 23 [2018-01-21 10:31:34,136 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 75 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=103, Invalid=137, Unknown=0, NotChecked=0, Total=240 [2018-01-21 10:31:34,136 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-01-21 10:31:34,138 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-01-21 10:31:34,138 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-01-21 10:31:34,139 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 23 transitions. [2018-01-21 10:31:34,139 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 23 transitions. Word has length 21 [2018-01-21 10:31:34,139 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:34,139 INFO L432 AbstractCegarLoop]: Abstraction has 23 states and 23 transitions. [2018-01-21 10:31:34,139 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-21 10:31:34,139 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 23 transitions. [2018-01-21 10:31:34,140 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-21 10:31:34,140 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:34,140 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:34,140 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:34,140 INFO L82 PathProgramCache]: Analyzing trace with hash -101887477, now seen corresponding path program 5 times [2018-01-21 10:31:34,140 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:34,141 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:34,141 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:34,141 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:34,141 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:34,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:34,150 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:34,201 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:34,201 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:34,201 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:34,201 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:34,202 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:34,202 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:34,202 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:34,209 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:31:34,209 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:34,214 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:34,218 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:34,219 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:34,225 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:34,232 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:34,234 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:34,246 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:34,247 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:34,404 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:34,425 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:34,425 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:34,428 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:31:34,428 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:34,433 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:34,435 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:34,438 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:34,448 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:34,454 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:34,458 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:34,463 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:34,464 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:34,513 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:34,515 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:34,515 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-21 10:31:34,515 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:34,515 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-21 10:31:34,516 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-21 10:31:34,516 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-21 10:31:34,516 INFO L87 Difference]: Start difference. First operand 23 states and 23 transitions. Second operand 10 states. [2018-01-21 10:31:34,538 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:34,539 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 10:31:34,539 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-21 10:31:34,539 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 22 [2018-01-21 10:31:34,540 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:34,540 INFO L225 Difference]: With dead ends: 33 [2018-01-21 10:31:34,540 INFO L226 Difference]: Without dead ends: 24 [2018-01-21 10:31:34,541 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 78 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=133, Invalid=173, Unknown=0, NotChecked=0, Total=306 [2018-01-21 10:31:34,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-01-21 10:31:34,544 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-01-21 10:31:34,544 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-01-21 10:31:34,544 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-01-21 10:31:34,545 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 22 [2018-01-21 10:31:34,545 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:34,545 INFO L432 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-01-21 10:31:34,545 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-21 10:31:34,545 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-01-21 10:31:34,546 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-21 10:31:34,546 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:34,546 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:34,546 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:34,546 INFO L82 PathProgramCache]: Analyzing trace with hash -265519632, now seen corresponding path program 6 times [2018-01-21 10:31:34,546 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:34,547 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:34,547 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:34,547 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:34,547 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:34,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:34,558 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:34,621 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:34,622 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:34,622 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:34,622 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:34,622 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:34,622 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:34,622 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:34,627 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:31:34,627 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:31:34,634 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:34,636 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:34,637 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:34,638 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:34,638 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:34,640 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:34,648 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:34,648 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:34,884 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:34,905 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:34,905 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:34,908 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:31:34,908 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:31:34,917 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:34,924 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:34,932 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:34,940 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:34,946 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:34,949 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:34,955 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:34,955 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:35,040 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:35,042 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:35,042 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-21 10:31:35,042 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:35,043 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-21 10:31:35,043 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-21 10:31:35,043 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-21 10:31:35,043 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 11 states. [2018-01-21 10:31:35,082 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:35,082 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-01-21 10:31:35,082 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-21 10:31:35,082 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 23 [2018-01-21 10:31:35,083 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:35,083 INFO L225 Difference]: With dead ends: 34 [2018-01-21 10:31:35,083 INFO L226 Difference]: Without dead ends: 25 [2018-01-21 10:31:35,084 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 81 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=167, Invalid=213, Unknown=0, NotChecked=0, Total=380 [2018-01-21 10:31:35,084 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-01-21 10:31:35,087 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-01-21 10:31:35,087 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-01-21 10:31:35,087 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 25 transitions. [2018-01-21 10:31:35,087 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 25 transitions. Word has length 23 [2018-01-21 10:31:35,088 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:35,088 INFO L432 AbstractCegarLoop]: Abstraction has 25 states and 25 transitions. [2018-01-21 10:31:35,088 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-21 10:31:35,088 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 25 transitions. [2018-01-21 10:31:35,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-21 10:31:35,088 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:35,088 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:35,088 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:35,089 INFO L82 PathProgramCache]: Analyzing trace with hash -1043149141, now seen corresponding path program 7 times [2018-01-21 10:31:35,089 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:35,090 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:35,090 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:35,090 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:35,090 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:35,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:35,101 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:35,241 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:35,241 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:35,241 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:35,241 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:35,241 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:35,241 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:35,241 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:35,246 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:35,247 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:31:35,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:35,258 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:35,271 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:35,271 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:35,475 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:35,509 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:35,509 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:35,512 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:35,512 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:31:35,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:35,531 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:35,536 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:35,536 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:35,596 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:35,598 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:35,598 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 21 [2018-01-21 10:31:35,598 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:35,598 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-21 10:31:35,598 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-21 10:31:35,599 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=228, Unknown=0, NotChecked=0, Total=420 [2018-01-21 10:31:35,599 INFO L87 Difference]: Start difference. First operand 25 states and 25 transitions. Second operand 12 states. [2018-01-21 10:31:35,618 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:35,619 INFO L93 Difference]: Finished difference Result 35 states and 35 transitions. [2018-01-21 10:31:35,619 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-21 10:31:35,619 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 24 [2018-01-21 10:31:35,619 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:35,619 INFO L225 Difference]: With dead ends: 35 [2018-01-21 10:31:35,620 INFO L226 Difference]: Without dead ends: 26 [2018-01-21 10:31:35,620 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 84 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=205, Invalid=257, Unknown=0, NotChecked=0, Total=462 [2018-01-21 10:31:35,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-01-21 10:31:35,622 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-01-21 10:31:35,622 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-01-21 10:31:35,623 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 26 transitions. [2018-01-21 10:31:35,623 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 26 transitions. Word has length 24 [2018-01-21 10:31:35,623 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:35,623 INFO L432 AbstractCegarLoop]: Abstraction has 26 states and 26 transitions. [2018-01-21 10:31:35,623 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-21 10:31:35,623 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-01-21 10:31:35,624 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-21 10:31:35,624 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:35,624 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:35,624 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:35,624 INFO L82 PathProgramCache]: Analyzing trace with hash 620139856, now seen corresponding path program 8 times [2018-01-21 10:31:35,624 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:35,625 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:35,625 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:35,625 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:35,625 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:35,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:35,634 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:35,732 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:35,733 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:35,733 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:35,733 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:35,733 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:35,733 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:35,733 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:35,740 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:31:35,741 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:35,748 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:35,752 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:35,753 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:35,754 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:35,766 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:35,767 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:35,957 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:35,978 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:35,978 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:35,981 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:31:35,981 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:35,990 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:35,999 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:36,006 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:36,009 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:36,013 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:36,013 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:36,093 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:36,095 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:36,095 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 23 [2018-01-21 10:31:36,095 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:36,096 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-21 10:31:36,096 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-21 10:31:36,096 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=233, Invalid=273, Unknown=0, NotChecked=0, Total=506 [2018-01-21 10:31:36,097 INFO L87 Difference]: Start difference. First operand 26 states and 26 transitions. Second operand 13 states. [2018-01-21 10:31:36,138 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:36,138 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-01-21 10:31:36,138 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-21 10:31:36,138 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 25 [2018-01-21 10:31:36,138 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:36,139 INFO L225 Difference]: With dead ends: 36 [2018-01-21 10:31:36,139 INFO L226 Difference]: Without dead ends: 27 [2018-01-21 10:31:36,139 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 87 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 51 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=247, Invalid=305, Unknown=0, NotChecked=0, Total=552 [2018-01-21 10:31:36,139 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-01-21 10:31:36,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-01-21 10:31:36,141 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-01-21 10:31:36,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 27 transitions. [2018-01-21 10:31:36,142 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 27 transitions. Word has length 25 [2018-01-21 10:31:36,142 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:36,142 INFO L432 AbstractCegarLoop]: Abstraction has 27 states and 27 transitions. [2018-01-21 10:31:36,142 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-21 10:31:36,142 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-01-21 10:31:36,143 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-21 10:31:36,143 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:36,143 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:36,143 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:36,143 INFO L82 PathProgramCache]: Analyzing trace with hash 642491211, now seen corresponding path program 9 times [2018-01-21 10:31:36,143 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:36,144 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:36,144 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:36,144 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:36,144 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:36,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:36,153 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:36,272 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:36,272 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:36,272 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:36,272 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:36,272 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:36,272 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:36,273 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:36,285 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:31:36,285 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:31:36,293 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:36,300 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:36,309 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:36,311 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:36,317 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:36,322 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:36,326 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:36,327 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:36,349 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:36,349 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:36,665 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:36,686 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:36,686 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:36,689 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:31:36,689 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:31:36,697 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:36,704 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:36,712 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:36,720 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:36,729 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:36,739 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:36,745 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:36,749 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:36,753 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:36,753 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:36,818 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:36,819 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:36,819 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 25 [2018-01-21 10:31:36,819 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:36,820 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-21 10:31:36,820 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-21 10:31:36,820 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=278, Invalid=322, Unknown=0, NotChecked=0, Total=600 [2018-01-21 10:31:36,820 INFO L87 Difference]: Start difference. First operand 27 states and 27 transitions. Second operand 14 states. [2018-01-21 10:31:36,849 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:36,850 INFO L93 Difference]: Finished difference Result 37 states and 37 transitions. [2018-01-21 10:31:36,850 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-21 10:31:36,850 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 26 [2018-01-21 10:31:36,851 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:36,851 INFO L225 Difference]: With dead ends: 37 [2018-01-21 10:31:36,851 INFO L226 Difference]: Without dead ends: 28 [2018-01-21 10:31:36,852 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 90 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=293, Invalid=357, Unknown=0, NotChecked=0, Total=650 [2018-01-21 10:31:36,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-01-21 10:31:36,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-01-21 10:31:36,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-01-21 10:31:36,857 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 28 transitions. [2018-01-21 10:31:36,857 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 28 transitions. Word has length 26 [2018-01-21 10:31:36,857 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:36,857 INFO L432 AbstractCegarLoop]: Abstraction has 28 states and 28 transitions. [2018-01-21 10:31:36,857 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-21 10:31:36,858 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-01-21 10:31:36,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-21 10:31:36,858 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:36,858 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:36,858 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:36,859 INFO L82 PathProgramCache]: Analyzing trace with hash 1335383216, now seen corresponding path program 10 times [2018-01-21 10:31:36,859 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:36,860 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:36,860 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:36,860 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:36,860 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:36,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:36,870 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:36,975 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:36,975 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:36,975 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:36,975 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:36,976 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:36,976 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:36,976 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:36,981 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:31:36,981 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:31:36,991 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:36,992 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:37,001 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:37,001 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:37,241 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:37,261 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:37,261 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:37,264 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:31:37,264 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:31:37,301 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:37,304 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:37,310 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:37,310 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:37,403 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:37,404 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:37,404 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 27 [2018-01-21 10:31:37,405 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:37,405 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-21 10:31:37,405 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-21 10:31:37,405 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=327, Invalid=375, Unknown=0, NotChecked=0, Total=702 [2018-01-21 10:31:37,405 INFO L87 Difference]: Start difference. First operand 28 states and 28 transitions. Second operand 15 states. [2018-01-21 10:31:37,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:37,432 INFO L93 Difference]: Finished difference Result 38 states and 38 transitions. [2018-01-21 10:31:37,432 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-21 10:31:37,432 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 27 [2018-01-21 10:31:37,432 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:37,433 INFO L225 Difference]: With dead ends: 38 [2018-01-21 10:31:37,433 INFO L226 Difference]: Without dead ends: 29 [2018-01-21 10:31:37,433 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 93 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 63 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=343, Invalid=413, Unknown=0, NotChecked=0, Total=756 [2018-01-21 10:31:37,433 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-01-21 10:31:37,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-01-21 10:31:37,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-01-21 10:31:37,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 29 transitions. [2018-01-21 10:31:37,436 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 29 transitions. Word has length 27 [2018-01-21 10:31:37,436 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:37,436 INFO L432 AbstractCegarLoop]: Abstraction has 29 states and 29 transitions. [2018-01-21 10:31:37,436 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-21 10:31:37,436 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2018-01-21 10:31:37,437 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-21 10:31:37,437 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:37,437 INFO L322 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:37,437 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:37,437 INFO L82 PathProgramCache]: Analyzing trace with hash 1340198891, now seen corresponding path program 11 times [2018-01-21 10:31:37,437 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:37,438 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:37,438 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:37,438 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:37,438 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:37,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:37,445 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:37,519 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:37,519 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:37,519 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:37,519 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:37,520 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:37,520 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:37,520 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:37,524 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:31:37,525 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:37,528 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:37,529 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:37,529 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:37,530 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:37,531 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:37,532 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:37,536 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:37,537 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:37,538 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:37,546 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:37,546 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:37,807 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:37,827 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:37,827 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:37,830 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:31:37,830 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:37,834 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:37,835 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:37,839 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:37,842 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:37,846 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:37,850 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:37,860 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:37,867 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:37,870 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:37,876 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:37,876 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:37,986 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:37,987 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:37,988 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 29 [2018-01-21 10:31:37,988 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:37,988 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-21 10:31:37,988 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-21 10:31:37,989 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=380, Invalid=432, Unknown=0, NotChecked=0, Total=812 [2018-01-21 10:31:37,989 INFO L87 Difference]: Start difference. First operand 29 states and 29 transitions. Second operand 16 states. [2018-01-21 10:31:38,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:38,020 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-01-21 10:31:38,020 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-21 10:31:38,020 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 28 [2018-01-21 10:31:38,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:38,021 INFO L225 Difference]: With dead ends: 39 [2018-01-21 10:31:38,021 INFO L226 Difference]: Without dead ends: 30 [2018-01-21 10:31:38,021 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 96 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 69 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=397, Invalid=473, Unknown=0, NotChecked=0, Total=870 [2018-01-21 10:31:38,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-01-21 10:31:38,023 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-01-21 10:31:38,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-01-21 10:31:38,024 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 30 transitions. [2018-01-21 10:31:38,024 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 30 transitions. Word has length 28 [2018-01-21 10:31:38,024 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:38,025 INFO L432 AbstractCegarLoop]: Abstraction has 30 states and 30 transitions. [2018-01-21 10:31:38,025 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-21 10:31:38,025 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-01-21 10:31:38,025 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-21 10:31:38,025 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:38,025 INFO L322 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:38,025 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:38,026 INFO L82 PathProgramCache]: Analyzing trace with hash 1489484816, now seen corresponding path program 12 times [2018-01-21 10:31:38,026 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:38,026 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:38,026 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:38,026 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:38,026 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:38,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:38,035 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:38,133 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:38,133 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:38,133 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:38,133 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:38,133 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:38,133 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:38,133 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:38,141 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:31:38,141 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:31:38,149 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:38,151 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:38,152 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:38,153 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:38,154 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:38,156 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:38,157 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:38,158 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:38,159 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:38,167 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:38,167 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:38,480 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:38,501 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:38,501 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:38,504 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:31:38,504 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:31:38,513 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:38,520 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:38,528 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:38,536 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:38,545 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:38,554 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:38,566 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:38,574 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:38,577 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:38,583 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:38,583 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:38,678 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:38,679 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:38,679 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 31 [2018-01-21 10:31:38,679 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:38,679 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-21 10:31:38,680 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-21 10:31:38,680 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=437, Invalid=493, Unknown=0, NotChecked=0, Total=930 [2018-01-21 10:31:38,680 INFO L87 Difference]: Start difference. First operand 30 states and 30 transitions. Second operand 17 states. [2018-01-21 10:31:38,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:38,707 INFO L93 Difference]: Finished difference Result 40 states and 40 transitions. [2018-01-21 10:31:38,708 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-21 10:31:38,708 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 29 [2018-01-21 10:31:38,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:38,709 INFO L225 Difference]: With dead ends: 40 [2018-01-21 10:31:38,709 INFO L226 Difference]: Without dead ends: 31 [2018-01-21 10:31:38,710 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 99 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=455, Invalid=537, Unknown=0, NotChecked=0, Total=992 [2018-01-21 10:31:38,710 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2018-01-21 10:31:38,712 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2018-01-21 10:31:38,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-01-21 10:31:38,713 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 31 transitions. [2018-01-21 10:31:38,713 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 31 transitions. Word has length 29 [2018-01-21 10:31:38,714 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:38,714 INFO L432 AbstractCegarLoop]: Abstraction has 31 states and 31 transitions. [2018-01-21 10:31:38,714 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-21 10:31:38,714 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 31 transitions. [2018-01-21 10:31:38,714 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-21 10:31:38,714 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:38,715 INFO L322 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:38,715 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:38,715 INFO L82 PathProgramCache]: Analyzing trace with hash 1822381195, now seen corresponding path program 13 times [2018-01-21 10:31:38,715 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:38,716 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:38,716 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:38,716 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:38,716 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:38,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:38,725 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:38,827 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:38,828 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:38,828 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:38,828 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:38,828 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:38,828 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:38,828 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:38,833 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:38,833 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:31:38,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:38,844 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:38,853 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:38,854 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:39,228 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:39,248 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:39,248 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:39,252 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:39,253 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:31:39,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:39,275 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:39,279 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:39,279 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:39,413 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:39,414 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:39,414 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 33 [2018-01-21 10:31:39,414 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:39,414 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-21 10:31:39,415 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-21 10:31:39,415 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=498, Invalid=558, Unknown=0, NotChecked=0, Total=1056 [2018-01-21 10:31:39,415 INFO L87 Difference]: Start difference. First operand 31 states and 31 transitions. Second operand 18 states. [2018-01-21 10:31:39,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:39,457 INFO L93 Difference]: Finished difference Result 41 states and 41 transitions. [2018-01-21 10:31:39,457 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-21 10:31:39,457 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 30 [2018-01-21 10:31:39,457 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:39,458 INFO L225 Difference]: With dead ends: 41 [2018-01-21 10:31:39,458 INFO L226 Difference]: Without dead ends: 32 [2018-01-21 10:31:39,459 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 102 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 81 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=517, Invalid=605, Unknown=0, NotChecked=0, Total=1122 [2018-01-21 10:31:39,459 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-01-21 10:31:39,461 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2018-01-21 10:31:39,461 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-01-21 10:31:39,462 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 32 transitions. [2018-01-21 10:31:39,462 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 32 transitions. Word has length 30 [2018-01-21 10:31:39,462 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:39,463 INFO L432 AbstractCegarLoop]: Abstraction has 32 states and 32 transitions. [2018-01-21 10:31:39,463 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-21 10:31:39,463 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2018-01-21 10:31:39,463 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-21 10:31:39,463 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:39,464 INFO L322 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:39,464 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:39,464 INFO L82 PathProgramCache]: Analyzing trace with hash -742732944, now seen corresponding path program 14 times [2018-01-21 10:31:39,464 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:39,465 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:39,465 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:39,465 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:39,465 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:39,471 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:39,471 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:39,598 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:39,598 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:39,599 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:39,599 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:39,599 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:39,599 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:39,599 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:39,610 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:31:39,610 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:39,619 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:39,629 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:39,635 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:39,636 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:39,644 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:39,645 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:40,020 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:40,041 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:40,041 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:40,044 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:31:40,045 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:40,057 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:40,071 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:40,081 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:40,085 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:40,090 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:40,090 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:40,247 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:40,248 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:40,248 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 35 [2018-01-21 10:31:40,248 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:40,249 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-21 10:31:40,249 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-21 10:31:40,249 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=563, Invalid=627, Unknown=0, NotChecked=0, Total=1190 [2018-01-21 10:31:40,249 INFO L87 Difference]: Start difference. First operand 32 states and 32 transitions. Second operand 19 states. [2018-01-21 10:31:40,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:40,391 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-01-21 10:31:40,393 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-21 10:31:40,393 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 31 [2018-01-21 10:31:40,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:40,393 INFO L225 Difference]: With dead ends: 42 [2018-01-21 10:31:40,394 INFO L226 Difference]: Without dead ends: 33 [2018-01-21 10:31:40,394 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 105 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 87 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=583, Invalid=677, Unknown=0, NotChecked=0, Total=1260 [2018-01-21 10:31:40,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-01-21 10:31:40,397 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2018-01-21 10:31:40,397 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-01-21 10:31:40,398 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 33 transitions. [2018-01-21 10:31:40,398 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 33 transitions. Word has length 31 [2018-01-21 10:31:40,399 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:40,399 INFO L432 AbstractCegarLoop]: Abstraction has 33 states and 33 transitions. [2018-01-21 10:31:40,399 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-21 10:31:40,399 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-01-21 10:31:40,399 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-21 10:31:40,399 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:40,400 INFO L322 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:40,400 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:40,400 INFO L82 PathProgramCache]: Analyzing trace with hash 1343107371, now seen corresponding path program 15 times [2018-01-21 10:31:40,400 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:40,401 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:40,401 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:40,401 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:40,401 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:40,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:40,408 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:41,103 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:41,103 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:41,103 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:41,104 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:41,104 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:41,104 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:41,104 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:41,111 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:31:41,111 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:31:41,117 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:41,119 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:41,120 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:41,121 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:41,122 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:41,124 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:41,125 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:41,127 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:41,128 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:41,128 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:41,130 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:41,139 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:41,139 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:41,723 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:41,743 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:41,743 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:41,746 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:31:41,747 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:31:41,756 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:41,763 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:41,771 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:41,779 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:41,787 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:41,797 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:41,806 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:41,816 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:41,826 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:41,834 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:41,837 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:41,843 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:41,844 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:41,992 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:41,994 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:41,994 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 37 [2018-01-21 10:31:41,994 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:41,994 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-21 10:31:41,994 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-21 10:31:41,995 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=632, Invalid=700, Unknown=0, NotChecked=0, Total=1332 [2018-01-21 10:31:41,995 INFO L87 Difference]: Start difference. First operand 33 states and 33 transitions. Second operand 20 states. [2018-01-21 10:31:42,025 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:42,025 INFO L93 Difference]: Finished difference Result 43 states and 43 transitions. [2018-01-21 10:31:42,026 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-21 10:31:42,026 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 32 [2018-01-21 10:31:42,026 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:42,026 INFO L225 Difference]: With dead ends: 43 [2018-01-21 10:31:42,026 INFO L226 Difference]: Without dead ends: 34 [2018-01-21 10:31:42,027 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 108 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 93 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=653, Invalid=753, Unknown=0, NotChecked=0, Total=1406 [2018-01-21 10:31:42,027 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-01-21 10:31:42,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-01-21 10:31:42,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-01-21 10:31:42,029 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2018-01-21 10:31:42,029 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 32 [2018-01-21 10:31:42,030 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:42,030 INFO L432 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2018-01-21 10:31:42,030 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-21 10:31:42,030 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-01-21 10:31:42,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-21 10:31:42,030 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:42,030 INFO L322 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:42,030 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:42,031 INFO L82 PathProgramCache]: Analyzing trace with hash 1579647696, now seen corresponding path program 16 times [2018-01-21 10:31:42,031 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:42,031 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:42,031 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:42,031 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:42,031 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:42,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:42,039 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:42,213 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:42,213 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:42,214 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:42,214 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:42,214 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:42,214 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:42,214 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:42,221 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:31:42,222 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:31:42,234 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:42,236 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:42,247 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:42,247 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:42,856 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:42,876 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:42,877 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:42,879 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:31:42,880 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:31:42,909 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:42,912 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:42,917 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:42,917 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:43,039 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:43,040 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:43,040 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 39 [2018-01-21 10:31:43,040 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:43,041 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-21 10:31:43,041 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-21 10:31:43,041 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=705, Invalid=777, Unknown=0, NotChecked=0, Total=1482 [2018-01-21 10:31:43,041 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand 21 states. [2018-01-21 10:31:43,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:43,079 INFO L93 Difference]: Finished difference Result 44 states and 44 transitions. [2018-01-21 10:31:43,079 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-21 10:31:43,079 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 33 [2018-01-21 10:31:43,079 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:43,080 INFO L225 Difference]: With dead ends: 44 [2018-01-21 10:31:43,080 INFO L226 Difference]: Without dead ends: 35 [2018-01-21 10:31:43,080 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 111 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 99 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=727, Invalid=833, Unknown=0, NotChecked=0, Total=1560 [2018-01-21 10:31:43,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-01-21 10:31:43,082 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 35. [2018-01-21 10:31:43,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-01-21 10:31:43,083 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 35 transitions. [2018-01-21 10:31:43,083 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 35 transitions. Word has length 33 [2018-01-21 10:31:43,083 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:43,083 INFO L432 AbstractCegarLoop]: Abstraction has 35 states and 35 transitions. [2018-01-21 10:31:43,083 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-21 10:31:43,083 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 35 transitions. [2018-01-21 10:31:43,084 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-21 10:31:43,084 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:43,084 INFO L322 BasicCegarLoop]: trace histogram [17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:43,084 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:43,084 INFO L82 PathProgramCache]: Analyzing trace with hash 322463179, now seen corresponding path program 17 times [2018-01-21 10:31:43,084 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:43,085 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:43,085 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:43,085 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:43,085 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:43,093 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:43,094 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:43,246 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:43,247 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:43,247 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:43,247 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:43,247 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:43,247 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:43,247 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:43,254 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:31:43,254 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:43,257 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:43,258 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:43,259 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:43,260 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:43,260 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:43,261 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:43,262 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:43,263 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:43,264 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:43,267 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:43,268 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:43,270 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:43,278 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:43,278 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:43,770 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:43,790 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:43,790 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:43,793 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:31:43,793 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:43,797 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:43,798 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:43,802 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:43,806 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:43,810 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:43,814 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:43,819 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:43,824 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:43,830 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:43,841 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:43,849 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:43,853 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:43,857 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:43,857 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:43,990 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:43,991 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:43,991 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 41 [2018-01-21 10:31:43,991 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:43,992 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-21 10:31:43,992 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-21 10:31:43,992 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=782, Invalid=858, Unknown=0, NotChecked=0, Total=1640 [2018-01-21 10:31:43,992 INFO L87 Difference]: Start difference. First operand 35 states and 35 transitions. Second operand 22 states. [2018-01-21 10:31:44,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:44,030 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-01-21 10:31:44,030 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-21 10:31:44,030 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 34 [2018-01-21 10:31:44,030 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:44,031 INFO L225 Difference]: With dead ends: 45 [2018-01-21 10:31:44,031 INFO L226 Difference]: Without dead ends: 36 [2018-01-21 10:31:44,031 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 114 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 105 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=805, Invalid=917, Unknown=0, NotChecked=0, Total=1722 [2018-01-21 10:31:44,031 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-01-21 10:31:44,033 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-01-21 10:31:44,034 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-01-21 10:31:44,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-01-21 10:31:44,034 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 34 [2018-01-21 10:31:44,034 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:44,034 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-01-21 10:31:44,034 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-21 10:31:44,035 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-01-21 10:31:44,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-21 10:31:44,035 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:44,035 INFO L322 BasicCegarLoop]: trace histogram [18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:44,035 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:44,035 INFO L82 PathProgramCache]: Analyzing trace with hash 4448816, now seen corresponding path program 18 times [2018-01-21 10:31:44,036 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:44,036 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:44,036 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:44,036 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:44,036 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:44,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:44,043 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:44,275 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:44,276 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:44,276 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:44,276 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:44,276 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:44,276 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:44,276 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:44,281 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:31:44,281 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:31:44,290 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:44,291 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:44,293 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:44,294 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:44,295 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:44,296 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:44,297 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:44,298 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:44,299 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:44,300 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:44,301 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:44,302 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:44,311 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:44,312 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:44,939 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:44,959 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:44,959 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:44,962 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:31:44,963 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:31:44,972 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:44,979 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:44,987 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:44,996 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:45,005 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:45,015 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:45,025 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:45,036 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:45,047 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:45,060 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:45,068 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:45,072 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:45,077 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:45,077 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:45,205 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:45,206 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:45,206 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 43 [2018-01-21 10:31:45,206 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:45,206 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-21 10:31:45,206 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-21 10:31:45,207 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=863, Invalid=943, Unknown=0, NotChecked=0, Total=1806 [2018-01-21 10:31:45,207 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 23 states. [2018-01-21 10:31:45,245 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:45,245 INFO L93 Difference]: Finished difference Result 46 states and 46 transitions. [2018-01-21 10:31:45,245 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-21 10:31:45,245 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 35 [2018-01-21 10:31:45,246 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:45,246 INFO L225 Difference]: With dead ends: 46 [2018-01-21 10:31:45,246 INFO L226 Difference]: Without dead ends: 37 [2018-01-21 10:31:45,247 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 117 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 111 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=887, Invalid=1005, Unknown=0, NotChecked=0, Total=1892 [2018-01-21 10:31:45,247 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-01-21 10:31:45,250 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 37. [2018-01-21 10:31:45,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-01-21 10:31:45,251 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 37 transitions. [2018-01-21 10:31:45,251 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 37 transitions. Word has length 35 [2018-01-21 10:31:45,251 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:45,251 INFO L432 AbstractCegarLoop]: Abstraction has 37 states and 37 transitions. [2018-01-21 10:31:45,252 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-21 10:31:45,252 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 37 transitions. [2018-01-21 10:31:45,252 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-21 10:31:45,252 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:45,252 INFO L322 BasicCegarLoop]: trace histogram [19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:45,253 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:45,253 INFO L82 PathProgramCache]: Analyzing trace with hash -1264061845, now seen corresponding path program 19 times [2018-01-21 10:31:45,253 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:45,254 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:45,254 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:45,254 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:45,254 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:45,262 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:45,263 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:45,423 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:45,423 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:45,423 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:45,423 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:45,423 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:45,423 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:45,423 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:45,428 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:45,428 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:31:45,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:45,440 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:45,448 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:45,448 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:46,056 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:46,076 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:46,076 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:46,079 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:46,079 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:31:46,102 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:46,105 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:46,111 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:46,112 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:46,272 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:46,273 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:46,274 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 45 [2018-01-21 10:31:46,274 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:46,274 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-21 10:31:46,274 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-21 10:31:46,275 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=948, Invalid=1032, Unknown=0, NotChecked=0, Total=1980 [2018-01-21 10:31:46,275 INFO L87 Difference]: Start difference. First operand 37 states and 37 transitions. Second operand 24 states. [2018-01-21 10:31:46,313 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:46,313 INFO L93 Difference]: Finished difference Result 47 states and 47 transitions. [2018-01-21 10:31:46,313 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-21 10:31:46,313 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 36 [2018-01-21 10:31:46,313 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:46,314 INFO L225 Difference]: With dead ends: 47 [2018-01-21 10:31:46,314 INFO L226 Difference]: Without dead ends: 38 [2018-01-21 10:31:46,314 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 166 GetRequests, 120 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 117 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=973, Invalid=1097, Unknown=0, NotChecked=0, Total=2070 [2018-01-21 10:31:46,315 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2018-01-21 10:31:46,316 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2018-01-21 10:31:46,317 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-01-21 10:31:46,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 38 transitions. [2018-01-21 10:31:46,317 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 38 transitions. Word has length 36 [2018-01-21 10:31:46,317 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:46,317 INFO L432 AbstractCegarLoop]: Abstraction has 38 states and 38 transitions. [2018-01-21 10:31:46,318 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-21 10:31:46,318 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-01-21 10:31:46,318 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-21 10:31:46,318 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:46,318 INFO L322 BasicCegarLoop]: trace histogram [20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:46,318 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:46,318 INFO L82 PathProgramCache]: Analyzing trace with hash -1933186672, now seen corresponding path program 20 times [2018-01-21 10:31:46,318 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:46,319 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:46,319 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:46,319 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:46,319 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:46,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:46,325 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:46,509 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:46,524 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:46,524 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:46,524 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:46,524 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:46,524 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:46,524 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:46,529 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:31:46,530 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:46,536 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:46,541 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:46,542 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:46,544 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:46,552 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:46,552 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:47,179 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:47,199 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:47,199 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:47,202 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:31:47,202 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:47,211 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:47,222 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:47,232 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:47,235 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:47,240 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:47,240 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:47,399 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:47,400 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:47,400 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 47 [2018-01-21 10:31:47,400 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:47,401 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-21 10:31:47,401 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-21 10:31:47,401 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1037, Invalid=1125, Unknown=0, NotChecked=0, Total=2162 [2018-01-21 10:31:47,401 INFO L87 Difference]: Start difference. First operand 38 states and 38 transitions. Second operand 25 states. [2018-01-21 10:31:47,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:47,432 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-01-21 10:31:47,433 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-21 10:31:47,433 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 37 [2018-01-21 10:31:47,433 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:47,433 INFO L225 Difference]: With dead ends: 48 [2018-01-21 10:31:47,433 INFO L226 Difference]: Without dead ends: 39 [2018-01-21 10:31:47,434 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 123 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 123 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1063, Invalid=1193, Unknown=0, NotChecked=0, Total=2256 [2018-01-21 10:31:47,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-01-21 10:31:47,436 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-01-21 10:31:47,436 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-01-21 10:31:47,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 39 transitions. [2018-01-21 10:31:47,436 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 39 transitions. Word has length 37 [2018-01-21 10:31:47,436 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:47,436 INFO L432 AbstractCegarLoop]: Abstraction has 39 states and 39 transitions. [2018-01-21 10:31:47,436 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-21 10:31:47,436 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-01-21 10:31:47,437 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-21 10:31:47,437 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:47,437 INFO L322 BasicCegarLoop]: trace histogram [21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:47,437 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:47,437 INFO L82 PathProgramCache]: Analyzing trace with hash -1201219829, now seen corresponding path program 21 times [2018-01-21 10:31:47,437 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:47,438 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:47,438 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:47,438 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:47,438 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:47,444 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:47,445 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:47,634 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:47,634 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:47,634 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:47,635 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:47,635 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:47,635 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:47,635 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:47,640 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:31:47,640 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:31:47,647 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:47,648 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:47,650 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:47,651 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:47,652 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:47,654 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:47,655 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:47,657 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:47,658 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:47,660 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:47,662 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:47,663 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:47,664 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:47,665 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:47,674 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:47,674 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:48,348 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:48,368 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:48,368 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:48,371 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:31:48,371 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:31:48,379 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:48,386 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:48,394 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:48,401 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:48,410 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:48,418 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:48,427 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:48,437 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:48,447 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:48,457 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:48,468 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:48,479 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:48,487 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:48,490 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:48,495 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:48,495 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:48,649 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:48,650 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:48,650 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 49 [2018-01-21 10:31:48,650 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:48,651 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-21 10:31:48,651 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-21 10:31:48,651 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1127, Invalid=1225, Unknown=0, NotChecked=0, Total=2352 [2018-01-21 10:31:48,651 INFO L87 Difference]: Start difference. First operand 39 states and 39 transitions. Second operand 26 states. [2018-01-21 10:31:48,685 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:48,685 INFO L93 Difference]: Finished difference Result 49 states and 49 transitions. [2018-01-21 10:31:48,685 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-21 10:31:48,685 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 38 [2018-01-21 10:31:48,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:48,686 INFO L225 Difference]: With dead ends: 49 [2018-01-21 10:31:48,686 INFO L226 Difference]: Without dead ends: 40 [2018-01-21 10:31:48,687 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 126 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 171 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1154, Invalid=1296, Unknown=0, NotChecked=0, Total=2450 [2018-01-21 10:31:48,687 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-01-21 10:31:48,690 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2018-01-21 10:31:48,690 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-01-21 10:31:48,690 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 40 transitions. [2018-01-21 10:31:48,690 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 40 transitions. Word has length 38 [2018-01-21 10:31:48,691 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:48,691 INFO L432 AbstractCegarLoop]: Abstraction has 40 states and 40 transitions. [2018-01-21 10:31:48,691 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-21 10:31:48,691 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 40 transitions. [2018-01-21 10:31:48,691 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-21 10:31:48,692 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:48,692 INFO L322 BasicCegarLoop]: trace histogram [22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:48,692 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:48,692 INFO L82 PathProgramCache]: Analyzing trace with hash 14915824, now seen corresponding path program 22 times [2018-01-21 10:31:48,692 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:48,692 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:48,692 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:48,693 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:48,693 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:48,698 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:48,699 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:48,888 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:48,888 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:48,888 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:48,888 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:48,888 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:48,889 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:48,889 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:48,893 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:31:48,893 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:31:48,906 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:48,907 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:48,916 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:48,916 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:49,636 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:49,656 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:49,656 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:49,658 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:31:49,658 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:31:49,692 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:49,696 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:49,701 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:49,701 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:49,861 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:49,862 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:49,862 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 51 [2018-01-21 10:31:49,862 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:49,862 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-21 10:31:49,863 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-21 10:31:49,863 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1217, Invalid=1333, Unknown=0, NotChecked=0, Total=2550 [2018-01-21 10:31:49,863 INFO L87 Difference]: Start difference. First operand 40 states and 40 transitions. Second operand 27 states. [2018-01-21 10:31:49,918 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:49,918 INFO L93 Difference]: Finished difference Result 50 states and 50 transitions. [2018-01-21 10:31:49,918 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-21 10:31:49,918 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 39 [2018-01-21 10:31:49,918 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:49,918 INFO L225 Difference]: With dead ends: 50 [2018-01-21 10:31:49,918 INFO L226 Difference]: Without dead ends: 41 [2018-01-21 10:31:49,919 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 181 GetRequests, 129 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 223 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1245, Invalid=1407, Unknown=0, NotChecked=0, Total=2652 [2018-01-21 10:31:49,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-01-21 10:31:49,922 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. [2018-01-21 10:31:49,922 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-01-21 10:31:49,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 41 transitions. [2018-01-21 10:31:49,922 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 41 transitions. Word has length 39 [2018-01-21 10:31:49,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:49,922 INFO L432 AbstractCegarLoop]: Abstraction has 41 states and 41 transitions. [2018-01-21 10:31:49,923 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-21 10:31:49,923 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 41 transitions. [2018-01-21 10:31:49,923 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-21 10:31:49,923 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:49,923 INFO L322 BasicCegarLoop]: trace histogram [23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:49,923 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:49,923 INFO L82 PathProgramCache]: Analyzing trace with hash -939584597, now seen corresponding path program 23 times [2018-01-21 10:31:49,924 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:49,924 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:49,924 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:49,924 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:49,924 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:49,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:49,932 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:50,143 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:50,143 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:50,144 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:50,144 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:50,144 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:50,144 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:50,144 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:50,150 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:31:50,150 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:50,154 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:50,155 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:50,156 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:50,156 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:50,157 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:50,158 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:50,159 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:50,159 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:50,160 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:50,161 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:50,162 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:50,163 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:50,166 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:50,167 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:50,169 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:50,177 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:50,177 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:50,921 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:50,940 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:50,940 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:50,943 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:31:50,943 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:50,948 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:50,950 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:50,954 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:50,957 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:50,964 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:50,970 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:50,975 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:50,980 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:50,986 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:50,992 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:50,998 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:51,005 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:51,017 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:51,027 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:51,030 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:51,035 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:51,036 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:51,216 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:51,217 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:51,217 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 53 [2018-01-21 10:31:51,217 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:51,217 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-21 10:31:51,218 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-21 10:31:51,218 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1307, Invalid=1449, Unknown=0, NotChecked=0, Total=2756 [2018-01-21 10:31:51,218 INFO L87 Difference]: Start difference. First operand 41 states and 41 transitions. Second operand 28 states. [2018-01-21 10:31:51,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:51,250 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-01-21 10:31:51,250 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-21 10:31:51,250 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 40 [2018-01-21 10:31:51,251 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:51,251 INFO L225 Difference]: With dead ends: 51 [2018-01-21 10:31:51,251 INFO L226 Difference]: Without dead ends: 42 [2018-01-21 10:31:51,252 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 132 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 279 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1336, Invalid=1526, Unknown=0, NotChecked=0, Total=2862 [2018-01-21 10:31:51,252 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-01-21 10:31:51,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2018-01-21 10:31:51,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-01-21 10:31:51,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 42 transitions. [2018-01-21 10:31:51,254 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 42 transitions. Word has length 40 [2018-01-21 10:31:51,254 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:51,254 INFO L432 AbstractCegarLoop]: Abstraction has 42 states and 42 transitions. [2018-01-21 10:31:51,254 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-21 10:31:51,254 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-01-21 10:31:51,254 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-21 10:31:51,255 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:51,255 INFO L322 BasicCegarLoop]: trace histogram [24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:51,255 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:51,255 INFO L82 PathProgramCache]: Analyzing trace with hash -464326576, now seen corresponding path program 24 times [2018-01-21 10:31:51,255 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:51,255 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:51,255 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:51,256 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:51,256 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:51,263 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:51,263 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:51,487 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:51,487 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:51,488 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:51,488 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:51,488 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:51,488 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:51,488 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:51,493 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:31:51,493 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:31:51,499 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:51,501 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:51,502 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:51,503 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:51,504 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:51,505 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:51,550 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:51,551 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:51,552 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:51,553 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:51,554 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:51,555 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:51,556 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:51,557 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:51,558 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:51,582 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:51,582 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:52,378 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:52,407 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:52,407 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:52,410 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:31:52,410 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:31:52,419 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:52,425 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:52,433 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:52,441 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:52,450 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:52,458 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:52,468 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:52,477 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:52,488 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:52,499 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:52,510 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:52,521 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:52,533 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:31:52,542 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:52,545 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:52,551 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:52,551 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:52,749 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:52,750 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:52,750 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 55 [2018-01-21 10:31:52,750 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:52,751 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-21 10:31:52,751 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-21 10:31:52,752 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1397, Invalid=1573, Unknown=0, NotChecked=0, Total=2970 [2018-01-21 10:31:52,752 INFO L87 Difference]: Start difference. First operand 42 states and 42 transitions. Second operand 29 states. [2018-01-21 10:31:52,814 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:52,815 INFO L93 Difference]: Finished difference Result 52 states and 52 transitions. [2018-01-21 10:31:52,815 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-21 10:31:52,815 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 41 [2018-01-21 10:31:52,815 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:52,815 INFO L225 Difference]: With dead ends: 52 [2018-01-21 10:31:52,815 INFO L226 Difference]: Without dead ends: 43 [2018-01-21 10:31:52,816 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 135 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 339 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1427, Invalid=1653, Unknown=0, NotChecked=0, Total=3080 [2018-01-21 10:31:52,816 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-01-21 10:31:52,818 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2018-01-21 10:31:52,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-01-21 10:31:52,818 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 43 transitions. [2018-01-21 10:31:52,818 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 43 transitions. Word has length 41 [2018-01-21 10:31:52,819 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:52,819 INFO L432 AbstractCegarLoop]: Abstraction has 43 states and 43 transitions. [2018-01-21 10:31:52,819 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-21 10:31:52,819 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 43 transitions. [2018-01-21 10:31:52,819 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-21 10:31:52,819 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:52,819 INFO L322 BasicCegarLoop]: trace histogram [25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:52,819 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:52,819 INFO L82 PathProgramCache]: Analyzing trace with hash 1383770187, now seen corresponding path program 25 times [2018-01-21 10:31:52,820 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:52,820 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:52,820 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:52,820 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:52,820 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:52,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:52,828 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:53,053 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:53,053 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:53,053 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:53,053 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:53,053 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:53,054 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:53,054 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:53,058 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:53,058 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:31:53,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:53,072 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:53,080 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:53,080 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:53,908 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:53,927 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:53,927 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:53,930 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:53,930 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:31:53,955 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:53,959 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:53,964 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:53,965 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:54,185 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:54,186 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:54,186 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 57 [2018-01-21 10:31:54,186 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:54,186 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-21 10:31:54,187 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-21 10:31:54,187 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1487, Invalid=1705, Unknown=0, NotChecked=0, Total=3192 [2018-01-21 10:31:54,187 INFO L87 Difference]: Start difference. First operand 43 states and 43 transitions. Second operand 30 states. [2018-01-21 10:31:54,224 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:54,224 INFO L93 Difference]: Finished difference Result 53 states and 53 transitions. [2018-01-21 10:31:54,224 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-21 10:31:54,224 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 42 [2018-01-21 10:31:54,224 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:54,225 INFO L225 Difference]: With dead ends: 53 [2018-01-21 10:31:54,225 INFO L226 Difference]: Without dead ends: 44 [2018-01-21 10:31:54,226 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 196 GetRequests, 138 SyntacticMatches, 2 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 403 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1518, Invalid=1788, Unknown=0, NotChecked=0, Total=3306 [2018-01-21 10:31:54,226 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-01-21 10:31:54,228 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-01-21 10:31:54,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-01-21 10:31:54,228 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 44 transitions. [2018-01-21 10:31:54,228 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 44 transitions. Word has length 42 [2018-01-21 10:31:54,228 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:54,229 INFO L432 AbstractCegarLoop]: Abstraction has 44 states and 44 transitions. [2018-01-21 10:31:54,229 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-21 10:31:54,229 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 44 transitions. [2018-01-21 10:31:54,229 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-21 10:31:54,229 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:54,229 INFO L322 BasicCegarLoop]: trace histogram [26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:54,229 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:54,229 INFO L82 PathProgramCache]: Analyzing trace with hash -1454772304, now seen corresponding path program 26 times [2018-01-21 10:31:54,229 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:54,230 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:54,230 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:31:54,230 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:54,230 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:54,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:54,236 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:54,480 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:54,480 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:54,481 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:54,481 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:54,481 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:54,481 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:54,481 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:54,486 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:31:54,487 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:54,493 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:54,498 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:54,499 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:54,501 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:54,509 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:54,509 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:55,382 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:55,401 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:55,402 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:55,404 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:31:55,405 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:55,414 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:55,427 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:55,439 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:55,443 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:55,449 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:55,450 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:55,652 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:55,653 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:55,653 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 59 [2018-01-21 10:31:55,653 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:55,653 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-01-21 10:31:55,654 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-01-21 10:31:55,654 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1577, Invalid=1845, Unknown=0, NotChecked=0, Total=3422 [2018-01-21 10:31:55,654 INFO L87 Difference]: Start difference. First operand 44 states and 44 transitions. Second operand 31 states. [2018-01-21 10:31:55,692 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:55,692 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2018-01-21 10:31:55,692 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-01-21 10:31:55,692 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 43 [2018-01-21 10:31:55,692 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:55,693 INFO L225 Difference]: With dead ends: 54 [2018-01-21 10:31:55,693 INFO L226 Difference]: Without dead ends: 45 [2018-01-21 10:31:55,693 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 201 GetRequests, 141 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 471 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1609, Invalid=1931, Unknown=0, NotChecked=0, Total=3540 [2018-01-21 10:31:55,693 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-01-21 10:31:55,695 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-01-21 10:31:55,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-01-21 10:31:55,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 45 transitions. [2018-01-21 10:31:55,695 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 45 transitions. Word has length 43 [2018-01-21 10:31:55,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:55,695 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 45 transitions. [2018-01-21 10:31:55,695 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-01-21 10:31:55,695 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 45 transitions. [2018-01-21 10:31:55,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-21 10:31:55,696 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:55,696 INFO L322 BasicCegarLoop]: trace histogram [27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:55,696 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:55,696 INFO L82 PathProgramCache]: Analyzing trace with hash 744723691, now seen corresponding path program 27 times [2018-01-21 10:31:55,696 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:55,697 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:55,697 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:55,697 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:55,697 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:55,702 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:55,703 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:56,027 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:56,027 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:56,028 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:56,028 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:56,028 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:56,028 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:56,028 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:56,033 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:31:56,033 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:31:56,039 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:56,040 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:56,041 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:56,042 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:56,043 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:56,044 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:56,045 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:56,046 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:56,047 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:56,048 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:56,049 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:56,051 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:56,052 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:56,053 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:56,054 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:56,054 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:56,056 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:56,064 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:56,064 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:56,974 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:56,994 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:56,994 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:56,997 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:31:56,997 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:31:57,007 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:57,013 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:57,021 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:57,029 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:57,037 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:57,046 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:57,055 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:57,065 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:57,075 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:57,086 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:57,097 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:57,108 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:57,120 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:57,133 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:57,145 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:31:57,155 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:57,158 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:57,164 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:57,164 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:57,384 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:57,385 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:57,385 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 61 [2018-01-21 10:31:57,385 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:57,385 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-21 10:31:57,385 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-21 10:31:57,385 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1667, Invalid=1993, Unknown=0, NotChecked=0, Total=3660 [2018-01-21 10:31:57,386 INFO L87 Difference]: Start difference. First operand 45 states and 45 transitions. Second operand 32 states. [2018-01-21 10:31:57,429 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:57,430 INFO L93 Difference]: Finished difference Result 55 states and 55 transitions. [2018-01-21 10:31:57,430 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-21 10:31:57,430 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 44 [2018-01-21 10:31:57,430 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:57,430 INFO L225 Difference]: With dead ends: 55 [2018-01-21 10:31:57,430 INFO L226 Difference]: Without dead ends: 46 [2018-01-21 10:31:57,431 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 144 SyntacticMatches, 2 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 543 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1700, Invalid=2082, Unknown=0, NotChecked=0, Total=3782 [2018-01-21 10:31:57,431 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-01-21 10:31:57,433 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2018-01-21 10:31:57,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-01-21 10:31:57,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 46 transitions. [2018-01-21 10:31:57,434 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 46 transitions. Word has length 44 [2018-01-21 10:31:57,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:57,434 INFO L432 AbstractCegarLoop]: Abstraction has 46 states and 46 transitions. [2018-01-21 10:31:57,434 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-21 10:31:57,434 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 46 transitions. [2018-01-21 10:31:57,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-21 10:31:57,434 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:57,435 INFO L322 BasicCegarLoop]: trace histogram [28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:57,435 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:57,435 INFO L82 PathProgramCache]: Analyzing trace with hash 209622800, now seen corresponding path program 28 times [2018-01-21 10:31:57,435 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:57,435 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:57,436 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:57,436 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:57,436 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:57,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:57,442 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:57,716 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:57,716 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:57,716 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:57,716 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:57,717 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:57,717 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:57,717 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:57,722 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:31:57,722 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:31:57,737 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:57,739 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:57,755 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:57,755 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:58,705 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:58,724 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:58,725 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:31:58,727 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:31:58,727 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:31:58,767 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:58,770 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:58,778 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:58,778 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:31:58,998 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:58,999 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:31:58,999 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32, 32, 32] total 63 [2018-01-21 10:31:58,999 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:31:58,999 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-01-21 10:31:59,000 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-01-21 10:31:59,000 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1757, Invalid=2149, Unknown=0, NotChecked=0, Total=3906 [2018-01-21 10:31:59,000 INFO L87 Difference]: Start difference. First operand 46 states and 46 transitions. Second operand 33 states. [2018-01-21 10:31:59,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:31:59,057 INFO L93 Difference]: Finished difference Result 56 states and 56 transitions. [2018-01-21 10:31:59,057 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-21 10:31:59,057 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 45 [2018-01-21 10:31:59,057 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:31:59,057 INFO L225 Difference]: With dead ends: 56 [2018-01-21 10:31:59,057 INFO L226 Difference]: Without dead ends: 47 [2018-01-21 10:31:59,058 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 211 GetRequests, 147 SyntacticMatches, 2 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 619 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1791, Invalid=2241, Unknown=0, NotChecked=0, Total=4032 [2018-01-21 10:31:59,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-01-21 10:31:59,060 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2018-01-21 10:31:59,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-01-21 10:31:59,061 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 47 transitions. [2018-01-21 10:31:59,061 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 47 transitions. Word has length 45 [2018-01-21 10:31:59,061 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:31:59,061 INFO L432 AbstractCegarLoop]: Abstraction has 47 states and 47 transitions. [2018-01-21 10:31:59,061 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-01-21 10:31:59,061 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 47 transitions. [2018-01-21 10:31:59,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-21 10:31:59,061 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:31:59,062 INFO L322 BasicCegarLoop]: trace histogram [29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:31:59,062 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:31:59,062 INFO L82 PathProgramCache]: Analyzing trace with hash 801364363, now seen corresponding path program 29 times [2018-01-21 10:31:59,062 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:31:59,062 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:59,062 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:31:59,063 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:31:59,063 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:31:59,069 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:31:59,069 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:31:59,440 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:59,440 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:59,440 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:31:59,440 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:31:59,441 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:31:59,441 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:31:59,441 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:31:59,447 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:31:59,447 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:31:59,451 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:59,452 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:59,453 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:59,453 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:59,454 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:59,455 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:59,456 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:59,456 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:59,457 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:59,458 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:59,459 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:59,460 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:59,461 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:59,462 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:59,462 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:59,466 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:31:59,467 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:31:59,469 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:31:59,478 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:31:59,478 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:00,519 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:00,539 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:00,539 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:32:00,542 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:32:00,542 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:32:00,547 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:00,549 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:00,552 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:00,556 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:00,560 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:00,565 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:00,570 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:00,575 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:00,581 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:00,588 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:00,594 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:00,602 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:00,609 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:00,617 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:00,626 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:00,640 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:00,652 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:00,656 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:00,666 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:00,666 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:00,934 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:00,935 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:32:00,935 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 33] total 65 [2018-01-21 10:32:00,935 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:32:00,935 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-01-21 10:32:00,935 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-01-21 10:32:00,936 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1847, Invalid=2313, Unknown=0, NotChecked=0, Total=4160 [2018-01-21 10:32:00,936 INFO L87 Difference]: Start difference. First operand 47 states and 47 transitions. Second operand 34 states. [2018-01-21 10:32:00,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:32:00,975 INFO L93 Difference]: Finished difference Result 57 states and 57 transitions. [2018-01-21 10:32:00,976 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-21 10:32:00,976 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 46 [2018-01-21 10:32:00,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:32:00,976 INFO L225 Difference]: With dead ends: 57 [2018-01-21 10:32:00,976 INFO L226 Difference]: Without dead ends: 48 [2018-01-21 10:32:00,977 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 216 GetRequests, 150 SyntacticMatches, 2 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 699 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1882, Invalid=2408, Unknown=0, NotChecked=0, Total=4290 [2018-01-21 10:32:00,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-01-21 10:32:00,979 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-01-21 10:32:00,979 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-21 10:32:00,979 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-01-21 10:32:00,979 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 46 [2018-01-21 10:32:00,979 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:32:00,979 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-01-21 10:32:00,979 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-01-21 10:32:00,979 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-01-21 10:32:00,980 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-21 10:32:00,980 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:32:00,980 INFO L322 BasicCegarLoop]: trace histogram [30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:32:00,980 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:32:00,980 INFO L82 PathProgramCache]: Analyzing trace with hash 1965483632, now seen corresponding path program 30 times [2018-01-21 10:32:00,980 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:32:00,981 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:00,981 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:32:00,981 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:00,981 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:32:00,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:00,988 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:32:01,286 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:01,286 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:01,286 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:32:01,286 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:32:01,287 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:32:01,287 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:01,287 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:32:01,291 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:32:01,291 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:32:01,298 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:01,300 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:01,301 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:01,302 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:01,303 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:01,304 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:01,305 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:01,306 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:01,307 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:01,308 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:01,309 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:01,310 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:01,311 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:01,312 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:01,313 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:01,315 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:01,315 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:01,317 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:01,326 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:01,326 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:02,387 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:02,407 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:02,407 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:32:02,410 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:32:02,410 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:32:02,419 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:02,425 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:02,433 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:02,441 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:02,449 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:02,458 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:02,467 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:02,477 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:02,487 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:02,497 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:02,508 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:02,519 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:02,531 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:02,543 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:02,555 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:02,569 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:02,579 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:02,583 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:02,589 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:02,589 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:02,844 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:02,845 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:32:02,845 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 34] total 67 [2018-01-21 10:32:02,845 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:32:02,846 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-01-21 10:32:02,846 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-01-21 10:32:02,846 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1937, Invalid=2485, Unknown=0, NotChecked=0, Total=4422 [2018-01-21 10:32:02,846 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 35 states. [2018-01-21 10:32:02,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:32:02,889 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2018-01-21 10:32:02,889 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-21 10:32:02,889 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 47 [2018-01-21 10:32:02,889 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:32:02,889 INFO L225 Difference]: With dead ends: 58 [2018-01-21 10:32:02,889 INFO L226 Difference]: Without dead ends: 49 [2018-01-21 10:32:02,890 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 221 GetRequests, 153 SyntacticMatches, 2 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 783 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1973, Invalid=2583, Unknown=0, NotChecked=0, Total=4556 [2018-01-21 10:32:02,890 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-01-21 10:32:02,892 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2018-01-21 10:32:02,892 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-01-21 10:32:02,892 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 49 transitions. [2018-01-21 10:32:02,892 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 49 transitions. Word has length 47 [2018-01-21 10:32:02,892 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:32:02,893 INFO L432 AbstractCegarLoop]: Abstraction has 49 states and 49 transitions. [2018-01-21 10:32:02,893 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-01-21 10:32:02,893 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 49 transitions. [2018-01-21 10:32:02,893 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-21 10:32:02,893 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:32:02,893 INFO L322 BasicCegarLoop]: trace histogram [31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:32:02,893 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:32:02,893 INFO L82 PathProgramCache]: Analyzing trace with hash -601524693, now seen corresponding path program 31 times [2018-01-21 10:32:02,893 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:32:02,894 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:02,894 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:32:02,894 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:02,894 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:32:02,902 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:02,903 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:32:03,482 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:03,483 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:03,483 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:32:03,483 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:32:03,483 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:32:03,483 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:03,483 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:32:03,492 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:32:03,492 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:32:03,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:03,509 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:03,567 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:03,567 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:03,784 WARN L143 SmtUtils]: Spent 214ms on a formula simplification that was a NOOP. DAG size: 101 [2018-01-21 10:32:04,928 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:04,948 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:04,949 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:32:04,952 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:32:04,952 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:32:04,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:04,984 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:04,990 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:04,990 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:05,254 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:05,255 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:32:05,255 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 69 [2018-01-21 10:32:05,255 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:32:05,255 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-21 10:32:05,255 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-21 10:32:05,256 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2027, Invalid=2665, Unknown=0, NotChecked=0, Total=4692 [2018-01-21 10:32:05,256 INFO L87 Difference]: Start difference. First operand 49 states and 49 transitions. Second operand 36 states. [2018-01-21 10:32:05,315 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:32:05,315 INFO L93 Difference]: Finished difference Result 59 states and 59 transitions. [2018-01-21 10:32:05,315 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-21 10:32:05,316 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 48 [2018-01-21 10:32:05,316 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:32:05,316 INFO L225 Difference]: With dead ends: 59 [2018-01-21 10:32:05,316 INFO L226 Difference]: Without dead ends: 50 [2018-01-21 10:32:05,317 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 226 GetRequests, 156 SyntacticMatches, 2 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 871 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=2064, Invalid=2766, Unknown=0, NotChecked=0, Total=4830 [2018-01-21 10:32:05,317 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-01-21 10:32:05,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2018-01-21 10:32:05,319 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-01-21 10:32:05,320 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 50 transitions. [2018-01-21 10:32:05,320 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 50 transitions. Word has length 48 [2018-01-21 10:32:05,320 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:32:05,321 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 50 transitions. [2018-01-21 10:32:05,321 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-21 10:32:05,321 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 50 transitions. [2018-01-21 10:32:05,321 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-01-21 10:32:05,321 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:32:05,322 INFO L322 BasicCegarLoop]: trace histogram [32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:32:05,322 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:32:05,322 INFO L82 PathProgramCache]: Analyzing trace with hash 1425595856, now seen corresponding path program 32 times [2018-01-21 10:32:05,322 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:32:05,323 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:05,323 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:32:05,323 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:05,323 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:32:05,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:05,333 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:32:05,723 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:05,723 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:05,723 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:32:05,723 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:32:05,724 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:32:05,724 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:05,724 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:32:05,729 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:32:05,729 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:32:05,736 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:05,748 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:05,754 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:05,756 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:05,766 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:05,766 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:06,923 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:06,943 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:06,943 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:32:06,945 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:32:06,946 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:32:06,956 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:06,971 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:06,984 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:06,987 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:06,994 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:06,994 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:07,270 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:07,271 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:32:07,271 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 36, 36, 36] total 71 [2018-01-21 10:32:07,271 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:32:07,272 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-01-21 10:32:07,272 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-01-21 10:32:07,272 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2117, Invalid=2853, Unknown=0, NotChecked=0, Total=4970 [2018-01-21 10:32:07,272 INFO L87 Difference]: Start difference. First operand 50 states and 50 transitions. Second operand 37 states. [2018-01-21 10:32:07,323 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:32:07,323 INFO L93 Difference]: Finished difference Result 60 states and 60 transitions. [2018-01-21 10:32:07,324 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-01-21 10:32:07,324 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 49 [2018-01-21 10:32:07,324 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:32:07,324 INFO L225 Difference]: With dead ends: 60 [2018-01-21 10:32:07,324 INFO L226 Difference]: Without dead ends: 51 [2018-01-21 10:32:07,325 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 231 GetRequests, 159 SyntacticMatches, 2 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 963 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=2155, Invalid=2957, Unknown=0, NotChecked=0, Total=5112 [2018-01-21 10:32:07,325 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-01-21 10:32:07,326 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2018-01-21 10:32:07,326 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-01-21 10:32:07,327 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 51 transitions. [2018-01-21 10:32:07,327 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 51 transitions. Word has length 49 [2018-01-21 10:32:07,327 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:32:07,327 INFO L432 AbstractCegarLoop]: Abstraction has 51 states and 51 transitions. [2018-01-21 10:32:07,327 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-01-21 10:32:07,327 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 51 transitions. [2018-01-21 10:32:07,328 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-21 10:32:07,328 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:32:07,328 INFO L322 BasicCegarLoop]: trace histogram [33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:32:07,328 INFO L371 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:32:07,328 INFO L82 PathProgramCache]: Analyzing trace with hash -158176565, now seen corresponding path program 33 times [2018-01-21 10:32:07,328 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:32:07,329 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:07,329 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:32:07,329 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:07,329 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:32:07,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:07,337 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:32:07,752 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:07,752 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:07,752 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:32:07,752 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:32:07,752 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:32:07,752 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:07,752 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:32:07,757 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:32:07,757 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:32:07,764 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:07,766 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:07,767 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:07,768 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:07,769 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:07,770 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:07,772 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:07,773 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:07,774 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:07,775 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:07,776 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:07,777 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:07,778 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:07,779 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:07,780 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:07,782 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:07,783 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:07,784 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:07,784 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:07,786 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:07,819 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:07,819 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:09,005 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:09,025 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:09,025 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:32:09,028 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:32:09,028 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:32:09,037 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:09,043 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:09,051 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:09,058 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:09,066 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:09,075 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:09,084 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:09,094 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:09,104 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:09,115 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:09,126 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:09,138 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:09,150 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:09,162 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:09,175 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:09,189 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:09,202 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:09,216 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:09,227 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:09,231 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:09,237 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:09,237 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:09,524 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:09,525 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:32:09,525 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 73 [2018-01-21 10:32:09,525 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:32:09,525 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-21 10:32:09,525 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-21 10:32:09,526 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2207, Invalid=3049, Unknown=0, NotChecked=0, Total=5256 [2018-01-21 10:32:09,526 INFO L87 Difference]: Start difference. First operand 51 states and 51 transitions. Second operand 38 states. [2018-01-21 10:32:09,570 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:32:09,570 INFO L93 Difference]: Finished difference Result 61 states and 61 transitions. [2018-01-21 10:32:09,570 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-01-21 10:32:09,571 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 50 [2018-01-21 10:32:09,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:32:09,571 INFO L225 Difference]: With dead ends: 61 [2018-01-21 10:32:09,571 INFO L226 Difference]: Without dead ends: 52 [2018-01-21 10:32:09,571 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 236 GetRequests, 162 SyntacticMatches, 2 SemanticMatches, 72 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1059 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=2246, Invalid=3156, Unknown=0, NotChecked=0, Total=5402 [2018-01-21 10:32:09,571 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-01-21 10:32:09,573 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-01-21 10:32:09,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-01-21 10:32:09,574 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 52 transitions. [2018-01-21 10:32:09,574 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 52 transitions. Word has length 50 [2018-01-21 10:32:09,575 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:32:09,575 INFO L432 AbstractCegarLoop]: Abstraction has 52 states and 52 transitions. [2018-01-21 10:32:09,575 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-21 10:32:09,575 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 52 transitions. [2018-01-21 10:32:09,575 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-21 10:32:09,575 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:32:09,575 INFO L322 BasicCegarLoop]: trace histogram [34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:32:09,575 INFO L371 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:32:09,575 INFO L82 PathProgramCache]: Analyzing trace with hash -2010481360, now seen corresponding path program 34 times [2018-01-21 10:32:09,575 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:32:09,576 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:09,576 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:32:09,576 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:09,576 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:32:09,582 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:09,583 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:32:09,998 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:09,999 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:09,999 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:32:09,999 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:32:09,999 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:32:09,999 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:09,999 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:32:10,004 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:32:10,004 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:32:10,019 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:10,021 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:10,031 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:10,031 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:11,278 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:11,297 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:11,297 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:32:11,300 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:32:11,300 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:32:11,341 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:11,345 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:11,352 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:11,352 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:11,656 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:11,657 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:32:11,657 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 75 [2018-01-21 10:32:11,657 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:32:11,657 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-01-21 10:32:11,657 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-01-21 10:32:11,658 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2297, Invalid=3253, Unknown=0, NotChecked=0, Total=5550 [2018-01-21 10:32:11,658 INFO L87 Difference]: Start difference. First operand 52 states and 52 transitions. Second operand 39 states. [2018-01-21 10:32:11,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:32:11,710 INFO L93 Difference]: Finished difference Result 62 states and 62 transitions. [2018-01-21 10:32:11,710 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-01-21 10:32:11,710 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 51 [2018-01-21 10:32:11,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:32:11,711 INFO L225 Difference]: With dead ends: 62 [2018-01-21 10:32:11,711 INFO L226 Difference]: Without dead ends: 53 [2018-01-21 10:32:11,711 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 241 GetRequests, 165 SyntacticMatches, 2 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1159 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=2337, Invalid=3363, Unknown=0, NotChecked=0, Total=5700 [2018-01-21 10:32:11,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-01-21 10:32:11,714 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-01-21 10:32:11,714 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-01-21 10:32:11,715 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 53 transitions. [2018-01-21 10:32:11,715 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 53 transitions. Word has length 51 [2018-01-21 10:32:11,715 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:32:11,715 INFO L432 AbstractCegarLoop]: Abstraction has 53 states and 53 transitions. [2018-01-21 10:32:11,715 INFO L433 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-01-21 10:32:11,715 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 53 transitions. [2018-01-21 10:32:11,716 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-21 10:32:11,716 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:32:11,716 INFO L322 BasicCegarLoop]: trace histogram [35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:32:11,716 INFO L371 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:32:11,716 INFO L82 PathProgramCache]: Analyzing trace with hash 697612139, now seen corresponding path program 35 times [2018-01-21 10:32:11,716 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:32:11,717 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:11,717 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:32:11,717 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:11,717 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:32:11,726 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:11,726 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:32:12,225 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:12,235 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:12,236 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:32:12,236 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:32:12,236 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:32:12,236 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:12,236 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:32:12,241 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:32:12,241 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:32:12,245 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:12,246 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:12,247 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:12,247 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:12,248 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:12,249 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:12,250 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:12,251 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:12,251 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:12,252 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:12,253 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:12,254 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:12,255 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:12,256 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:12,257 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:12,258 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:12,259 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:12,261 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:12,264 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:12,265 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:12,267 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:12,278 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:12,278 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:13,563 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:13,582 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:13,583 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:32:13,585 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:32:13,586 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:32:13,590 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:13,591 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:13,594 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:13,598 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:13,602 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:13,606 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:13,610 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:13,615 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:13,621 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:13,627 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:13,633 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:13,640 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:13,647 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:13,660 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:13,669 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:13,677 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:13,686 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:13,696 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:13,711 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:13,722 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:13,726 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:13,733 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:13,733 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:14,039 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:14,040 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:32:14,040 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39, 39, 39, 39] total 77 [2018-01-21 10:32:14,040 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:32:14,041 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-21 10:32:14,041 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-21 10:32:14,041 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2387, Invalid=3465, Unknown=0, NotChecked=0, Total=5852 [2018-01-21 10:32:14,041 INFO L87 Difference]: Start difference. First operand 53 states and 53 transitions. Second operand 40 states. [2018-01-21 10:32:14,082 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:32:14,082 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-01-21 10:32:14,082 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-01-21 10:32:14,083 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 52 [2018-01-21 10:32:14,083 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:32:14,083 INFO L225 Difference]: With dead ends: 63 [2018-01-21 10:32:14,083 INFO L226 Difference]: Without dead ends: 54 [2018-01-21 10:32:14,083 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 246 GetRequests, 168 SyntacticMatches, 2 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1263 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2428, Invalid=3578, Unknown=0, NotChecked=0, Total=6006 [2018-01-21 10:32:14,084 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-01-21 10:32:14,085 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-01-21 10:32:14,085 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-01-21 10:32:14,086 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 54 transitions. [2018-01-21 10:32:14,086 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 54 transitions. Word has length 52 [2018-01-21 10:32:14,086 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:32:14,086 INFO L432 AbstractCegarLoop]: Abstraction has 54 states and 54 transitions. [2018-01-21 10:32:14,086 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-21 10:32:14,086 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 54 transitions. [2018-01-21 10:32:14,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-01-21 10:32:14,086 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:32:14,086 INFO L322 BasicCegarLoop]: trace histogram [36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:32:14,087 INFO L371 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:32:14,087 INFO L82 PathProgramCache]: Analyzing trace with hash -1250835312, now seen corresponding path program 36 times [2018-01-21 10:32:14,087 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:32:14,087 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:14,087 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:32:14,087 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:14,088 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:32:14,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:14,095 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:32:14,523 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:14,524 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:14,524 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:32:14,524 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:32:14,524 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:32:14,524 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:14,524 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:32:14,529 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:32:14,529 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:32:14,536 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:14,538 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:14,539 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:14,540 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:14,541 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:14,542 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:14,543 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:14,544 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:14,545 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:14,546 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:14,547 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:14,548 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:14,549 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:14,550 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:14,551 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:14,552 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:14,554 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:14,555 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:14,556 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:14,557 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:14,558 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:14,568 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:14,568 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:15,918 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:15,938 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:15,938 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:32:15,940 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:32:15,941 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:32:15,956 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:15,967 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:15,979 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:15,992 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:16,006 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:16,020 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:16,031 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:16,041 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:16,051 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:16,062 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:16,072 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:16,084 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:16,096 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:16,114 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:16,127 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:16,141 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:16,155 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:16,169 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:16,183 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:32:16,195 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:16,198 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:16,205 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:16,205 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:16,527 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:16,528 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:32:16,529 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40, 40, 40, 40] total 79 [2018-01-21 10:32:16,529 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:32:16,529 INFO L409 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-01-21 10:32:16,529 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-01-21 10:32:16,530 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2477, Invalid=3685, Unknown=0, NotChecked=0, Total=6162 [2018-01-21 10:32:16,530 INFO L87 Difference]: Start difference. First operand 54 states and 54 transitions. Second operand 41 states. [2018-01-21 10:32:16,574 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:32:16,574 INFO L93 Difference]: Finished difference Result 64 states and 64 transitions. [2018-01-21 10:32:16,574 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-01-21 10:32:16,574 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 53 [2018-01-21 10:32:16,575 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:32:16,575 INFO L225 Difference]: With dead ends: 64 [2018-01-21 10:32:16,575 INFO L226 Difference]: Without dead ends: 55 [2018-01-21 10:32:16,576 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 251 GetRequests, 171 SyntacticMatches, 2 SemanticMatches, 78 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1371 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2519, Invalid=3801, Unknown=0, NotChecked=0, Total=6320 [2018-01-21 10:32:16,576 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-01-21 10:32:16,578 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2018-01-21 10:32:16,578 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-01-21 10:32:16,578 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 55 transitions. [2018-01-21 10:32:16,578 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 55 transitions. Word has length 53 [2018-01-21 10:32:16,578 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:32:16,579 INFO L432 AbstractCegarLoop]: Abstraction has 55 states and 55 transitions. [2018-01-21 10:32:16,579 INFO L433 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-01-21 10:32:16,579 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 55 transitions. [2018-01-21 10:32:16,579 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-01-21 10:32:16,579 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:32:16,579 INFO L322 BasicCegarLoop]: trace histogram [37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:32:16,579 INFO L371 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:32:16,580 INFO L82 PathProgramCache]: Analyzing trace with hash -1523164149, now seen corresponding path program 37 times [2018-01-21 10:32:16,580 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:32:16,580 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:16,580 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:32:16,581 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:16,581 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:32:16,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:16,588 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:32:17,018 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:17,018 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:17,018 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:32:17,018 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:32:17,018 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:32:17,018 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:17,018 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:32:17,025 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:32:17,025 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:32:17,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:17,046 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:17,058 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:17,058 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:18,464 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:18,483 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:18,484 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 75 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 75 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:32:18,487 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:32:18,487 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:32:18,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:18,523 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:18,530 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:18,530 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:18,866 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:18,867 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:32:18,867 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41, 41, 41, 41] total 81 [2018-01-21 10:32:18,867 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:32:18,868 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-01-21 10:32:18,868 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-01-21 10:32:18,868 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2567, Invalid=3913, Unknown=0, NotChecked=0, Total=6480 [2018-01-21 10:32:18,868 INFO L87 Difference]: Start difference. First operand 55 states and 55 transitions. Second operand 42 states. [2018-01-21 10:32:18,918 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:32:18,918 INFO L93 Difference]: Finished difference Result 65 states and 65 transitions. [2018-01-21 10:32:18,919 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-01-21 10:32:18,919 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 54 [2018-01-21 10:32:18,919 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:32:18,919 INFO L225 Difference]: With dead ends: 65 [2018-01-21 10:32:18,919 INFO L226 Difference]: Without dead ends: 56 [2018-01-21 10:32:18,920 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 256 GetRequests, 174 SyntacticMatches, 2 SemanticMatches, 80 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1483 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=2610, Invalid=4032, Unknown=0, NotChecked=0, Total=6642 [2018-01-21 10:32:18,920 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 56 states. [2018-01-21 10:32:18,921 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 56 to 56. [2018-01-21 10:32:18,921 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-01-21 10:32:18,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 56 transitions. [2018-01-21 10:32:18,922 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 56 transitions. Word has length 54 [2018-01-21 10:32:18,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:32:18,922 INFO L432 AbstractCegarLoop]: Abstraction has 56 states and 56 transitions. [2018-01-21 10:32:18,922 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-01-21 10:32:18,922 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 56 transitions. [2018-01-21 10:32:18,922 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 56 [2018-01-21 10:32:18,922 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:32:18,922 INFO L322 BasicCegarLoop]: trace histogram [38, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:32:18,922 INFO L371 AbstractCegarLoop]: === Iteration 39 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:32:18,923 INFO L82 PathProgramCache]: Analyzing trace with hash -1375423504, now seen corresponding path program 38 times [2018-01-21 10:32:18,923 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:32:18,923 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:18,923 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:32:18,923 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:18,923 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:32:18,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:18,931 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:32:19,451 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:19,451 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:19,451 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:32:19,451 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:32:19,451 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:32:19,451 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:19,451 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 76 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:32:19,457 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:32:19,457 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:32:19,465 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:19,472 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:19,474 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:19,476 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:19,486 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:19,486 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:21,013 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:21,033 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:21,033 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 77 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 77 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:32:21,035 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:32:21,036 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:32:21,046 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:21,062 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:32:21,077 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:21,081 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:21,089 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:21,089 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:21,444 INFO L134 CoverageAnalysis]: Checked inductivity of 741 backedges. 0 proven. 741 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:21,445 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:32:21,445 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 42, 42, 42, 42] total 83 [2018-01-21 10:32:21,445 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:32:21,445 INFO L409 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-01-21 10:32:21,445 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-01-21 10:32:21,445 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2657, Invalid=4149, Unknown=0, NotChecked=0, Total=6806 [2018-01-21 10:32:21,446 INFO L87 Difference]: Start difference. First operand 56 states and 56 transitions. Second operand 43 states. [2018-01-21 10:32:21,491 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:32:21,491 INFO L93 Difference]: Finished difference Result 66 states and 66 transitions. [2018-01-21 10:32:21,491 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-01-21 10:32:21,491 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 55 [2018-01-21 10:32:21,491 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:32:21,492 INFO L225 Difference]: With dead ends: 66 [2018-01-21 10:32:21,492 INFO L226 Difference]: Without dead ends: 57 [2018-01-21 10:32:21,492 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 261 GetRequests, 177 SyntacticMatches, 2 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1599 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=2701, Invalid=4271, Unknown=0, NotChecked=0, Total=6972 [2018-01-21 10:32:21,492 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-01-21 10:32:21,493 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 57. [2018-01-21 10:32:21,494 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-01-21 10:32:21,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 57 transitions. [2018-01-21 10:32:21,494 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 57 transitions. Word has length 55 [2018-01-21 10:32:21,494 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:32:21,494 INFO L432 AbstractCegarLoop]: Abstraction has 57 states and 57 transitions. [2018-01-21 10:32:21,494 INFO L433 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-01-21 10:32:21,494 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 57 transitions. [2018-01-21 10:32:21,495 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-21 10:32:21,495 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:32:21,495 INFO L322 BasicCegarLoop]: trace histogram [39, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:32:21,495 INFO L371 AbstractCegarLoop]: === Iteration 40 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:32:21,495 INFO L82 PathProgramCache]: Analyzing trace with hash -1090430805, now seen corresponding path program 39 times [2018-01-21 10:32:21,495 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:32:21,495 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:21,496 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:32:21,496 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:21,496 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:32:21,502 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:21,502 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:32:21,972 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:21,972 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:21,973 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:32:21,973 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:32:21,973 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:32:21,973 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:21,973 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 78 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:32:21,980 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:32:21,980 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:32:21,988 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:21,990 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:21,992 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:21,993 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:21,994 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:21,996 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:21,997 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:21,999 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:22,000 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:22,001 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:22,004 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:22,006 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:22,008 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:22,009 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:22,011 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:22,013 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:22,014 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:22,016 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:22,018 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:22,020 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:22,021 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:22,022 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:22,024 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:22,035 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:22,035 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:23,539 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:23,558 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:23,558 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 79 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 79 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:32:23,561 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:32:23,561 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:32:23,571 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:23,578 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:23,585 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:23,593 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:23,601 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:23,610 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:23,620 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:23,629 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:23,640 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:23,650 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:23,661 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:23,672 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:23,684 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:23,697 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:23,710 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:23,723 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:23,737 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:23,751 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:23,766 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:23,781 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:23,796 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:32:23,808 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:23,811 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:23,819 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:23,819 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:24,192 INFO L134 CoverageAnalysis]: Checked inductivity of 780 backedges. 0 proven. 780 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:24,193 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:32:24,193 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [43, 43, 43, 43, 43] total 85 [2018-01-21 10:32:24,193 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:32:24,193 INFO L409 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-01-21 10:32:24,194 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-01-21 10:32:24,194 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2747, Invalid=4393, Unknown=0, NotChecked=0, Total=7140 [2018-01-21 10:32:24,194 INFO L87 Difference]: Start difference. First operand 57 states and 57 transitions. Second operand 44 states. [2018-01-21 10:32:24,254 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:32:24,255 INFO L93 Difference]: Finished difference Result 67 states and 67 transitions. [2018-01-21 10:32:24,255 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-01-21 10:32:24,255 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 56 [2018-01-21 10:32:24,255 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:32:24,255 INFO L225 Difference]: With dead ends: 67 [2018-01-21 10:32:24,255 INFO L226 Difference]: Without dead ends: 58 [2018-01-21 10:32:24,256 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 266 GetRequests, 180 SyntacticMatches, 2 SemanticMatches, 84 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1719 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=2792, Invalid=4518, Unknown=0, NotChecked=0, Total=7310 [2018-01-21 10:32:24,256 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2018-01-21 10:32:24,258 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 58. [2018-01-21 10:32:24,258 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58 states. [2018-01-21 10:32:24,258 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 58 transitions. [2018-01-21 10:32:24,258 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 58 transitions. Word has length 56 [2018-01-21 10:32:24,258 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:32:24,259 INFO L432 AbstractCegarLoop]: Abstraction has 58 states and 58 transitions. [2018-01-21 10:32:24,259 INFO L433 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-01-21 10:32:24,259 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 58 transitions. [2018-01-21 10:32:24,259 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-01-21 10:32:24,259 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:32:24,259 INFO L322 BasicCegarLoop]: trace histogram [40, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:32:24,259 INFO L371 AbstractCegarLoop]: === Iteration 41 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:32:24,259 INFO L82 PathProgramCache]: Analyzing trace with hash -845591728, now seen corresponding path program 40 times [2018-01-21 10:32:24,259 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:32:24,260 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:24,260 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:32:24,260 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:24,260 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:32:24,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:32:24,267 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:32:24,775 INFO L134 CoverageAnalysis]: Checked inductivity of 820 backedges. 0 proven. 820 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:24,775 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:24,775 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:32:24,775 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:32:24,775 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:32:24,775 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:24,775 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 80 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:32:24,780 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:32:24,780 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:32:24,797 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:24,799 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:24,809 INFO L134 CoverageAnalysis]: Checked inductivity of 820 backedges. 0 proven. 820 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:24,810 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:26,438 INFO L134 CoverageAnalysis]: Checked inductivity of 820 backedges. 0 proven. 820 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:26,458 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:32:26,458 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 81 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 81 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:32:26,462 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:32:26,462 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:32:26,514 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:32:26,519 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:32:26,530 INFO L134 CoverageAnalysis]: Checked inductivity of 820 backedges. 0 proven. 820 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:26,530 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:32:26,650 WARN L143 SmtUtils]: Spent 117ms on a formula simplification that was a NOOP. DAG size: 128 [2018-01-21 10:32:26,780 WARN L143 SmtUtils]: Spent 128ms on a formula simplification that was a NOOP. DAG size: 128 [2018-01-21 10:32:26,990 INFO L134 CoverageAnalysis]: Checked inductivity of 820 backedges. 0 proven. 820 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:32:26,991 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:32:26,991 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [44, 44, 44, 44, 44] total 86 [2018-01-21 10:32:26,991 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:32:26,992 INFO L409 AbstractCegarLoop]: Interpolant automaton has 45 states [2018-01-21 10:32:26,992 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2018-01-21 10:32:26,992 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2793, Invalid=4517, Unknown=0, NotChecked=0, Total=7310 [2018-01-21 10:32:26,992 INFO L87 Difference]: Start difference. First operand 58 states and 58 transitions. Second operand 45 states. [2018-01-21 10:32:27,049 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:32:27,049 INFO L93 Difference]: Finished difference Result 68 states and 68 transitions. [2018-01-21 10:32:27,049 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2018-01-21 10:32:27,049 INFO L78 Accepts]: Start accepts. Automaton has 45 states. Word has length 57 [2018-01-21 10:32:27,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:32:27,050 INFO L225 Difference]: With dead ends: 68 [2018-01-21 10:32:27,050 INFO L226 Difference]: Without dead ends: 59 [2018-01-21 10:32:27,050 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 271 GetRequests, 182 SyntacticMatches, 4 SemanticMatches, 85 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1966 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=2838, Invalid=4644, Unknown=0, NotChecked=0, Total=7482 [2018-01-21 10:32:27,050 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-01-21 10:32:27,052 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 59. [2018-01-21 10:32:27,052 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59 states. [2018-01-21 10:32:27,052 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 59 transitions. [2018-01-21 10:32:27,052 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 59 transitions. Word has length 57 [2018-01-21 10:32:27,053 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:32:27,053 INFO L432 AbstractCegarLoop]: Abstraction has 59 states and 59 transitions. [2018-01-21 10:32:27,053 INFO L433 AbstractCegarLoop]: Interpolant automaton has 45 states. [2018-01-21 10:32:27,053 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 59 transitions. [2018-01-21 10:32:27,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-01-21 10:32:27,053 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:32:27,054 INFO L322 BasicCegarLoop]: trace histogram [41, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:32:27,054 INFO L371 AbstractCegarLoop]: === Iteration 42 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:32:27,054 INFO L82 PathProgramCache]: Analyzing trace with hash -1845514933, now seen corresponding path program 41 times [2018-01-21 10:32:27,054 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:32:27,054 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:27,054 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:32:27,054 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:32:27,055 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:32:27,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 10:32:27,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 10:32:27,092 INFO L381 BasicCegarLoop]: Counterexample might be feasible [2018-01-21 10:32:27,100 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-21 10:32:27,106 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2018-01-21 10:32:27,107 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) Received shutdown request... [2018-01-21 10:32:27,107 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-21 10:32:27,114 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 10:32:27,114 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 10:32:27,114 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 10:32:27,114 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 10:32:27,114 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 10:32:27,114 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 10:32:27,114 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 10:32:27,114 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == mainErr0EnsuresViolation======== [2018-01-21 10:32:27,114 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 10:32:27,115 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 10:32:27,116 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 10:32:27,118 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 21.01 10:32:27 BoogieIcfgContainer [2018-01-21 10:32:27,118 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-21 10:32:27,119 INFO L168 Benchmark]: Toolchain (without parser) took 55856.36 ms. Allocated memory was 304.1 MB in the beginning and 846.2 MB in the end (delta: 542.1 MB). Free memory was 263.4 MB in the beginning and 489.6 MB in the end (delta: -226.2 MB). Peak memory consumption was 315.9 MB. Max. memory is 5.3 GB. [2018-01-21 10:32:27,120 INFO L168 Benchmark]: CDTParser took 0.15 ms. Allocated memory is still 304.1 MB. Free memory is still 268.4 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-21 10:32:27,120 INFO L168 Benchmark]: CACSL2BoogieTranslator took 193.42 ms. Allocated memory is still 304.1 MB. Free memory was 262.4 MB in the beginning and 255.3 MB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 5.3 GB. [2018-01-21 10:32:27,120 INFO L168 Benchmark]: Boogie Preprocessor took 24.72 ms. Allocated memory is still 304.1 MB. Free memory was 255.3 MB in the beginning and 253.3 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-21 10:32:27,120 INFO L168 Benchmark]: RCFGBuilder took 154.78 ms. Allocated memory is still 304.1 MB. Free memory was 253.3 MB in the beginning and 241.7 MB in the end (delta: 11.6 MB). Peak memory consumption was 11.6 MB. Max. memory is 5.3 GB. [2018-01-21 10:32:27,121 INFO L168 Benchmark]: TraceAbstraction took 55475.21 ms. Allocated memory was 304.1 MB in the beginning and 846.2 MB in the end (delta: 542.1 MB). Free memory was 241.7 MB in the beginning and 489.6 MB in the end (delta: -247.9 MB). Peak memory consumption was 294.2 MB. Max. memory is 5.3 GB. [2018-01-21 10:32:27,122 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.15 ms. Allocated memory is still 304.1 MB. Free memory is still 268.4 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 193.42 ms. Allocated memory is still 304.1 MB. Free memory was 262.4 MB in the beginning and 255.3 MB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 24.72 ms. Allocated memory is still 304.1 MB. Free memory was 255.3 MB in the beginning and 253.3 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 154.78 ms. Allocated memory is still 304.1 MB. Free memory was 253.3 MB in the beginning and 241.7 MB in the end (delta: 11.6 MB). Peak memory consumption was 11.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 55475.21 ms. Allocated memory was 304.1 MB in the beginning and 846.2 MB in the end (delta: 542.1 MB). Free memory was 241.7 MB in the beginning and 489.6 MB in the end (delta: -247.9 MB). Peak memory consumption was 294.2 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 17 LocStat_MAX_WEQGRAPH_SIZE : 2 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 102 LocStat_NO_SUPPORTING_DISEQUALITIES : 23 LocStat_NO_DISJUNCTIONS : -34 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 24 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 33 TransStat_NO_SUPPORTING_DISEQUALITIES : 5 TransStat_NO_DISJUNCTIONS : 24 TransStat_MAX_NO_DISJUNCTIONS : 1 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.293415 RENAME_VARIABLES(MILLISECONDS) : 0.154840 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.246194 PROJECTAWAY(MILLISECONDS) : 0.087980 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.169055 DISJOIN(MILLISECONDS) : 0.000000 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.192588 ADD_EQUALITY(MILLISECONDS) : 0.035781 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.012662 #CONJOIN_DISJUNCTIVE : 32 #RENAME_VARIABLES : 62 #UNFREEZE : 0 #CONJOIN : 62 #PROJECTAWAY : 64 #ADD_WEAK_EQUALITY : 4 #DISJOIN : 0 #RENAME_VARIABLES_DISJUNCTIVE : 62 #ADD_EQUALITY : 33 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1]: not all allocated memory was freed not all allocated memory was freed We found a FailurePath: - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.initErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. UNSAFE Result, 0.1s OverallTime, 1 OverallIterations, 1 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 3 NumberOfCodeBlocks, 3 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - CounterExampleResult [Line: 1]: not all allocated memory was freed not all allocated memory was freed We found a FailurePath: [L21] FCALL struct compstat cstats ; VAL [cstats={42:0}] [L22] FCALL memset((void *)(& cstats), 10, 41UL) VAL [cstats={42:0}, memset((void *)(& cstats), 10, 41UL)={42:0}] [L23] return 0; VAL [\result=0, cstats={42:0}] [L23] return 0; - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.startErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. UNSAFE Result, 55.2s OverallTime, 42 OverallIterations, 41 TraceHistogramMax, 1.8s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 659 SDtfs, 82 SDslu, 11391 SDs, 0 SdLazy, 1798 SolverSat, 53 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 0.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 6945 GetRequests, 4981 SyntacticMatches, 82 SemanticMatches, 1882 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19302 ImplicationChecksByTransitivity, 31.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=59occurred in iteration=41, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.3s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 41 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 3.5s SatisfiabilityAnalysisTime, 47.5s InterpolantComputationTime, 4575 NumberOfCodeBlocks, 4575 NumberOfCodeBlocksAsserted, 556 NumberOfCheckSat, 7316 ConstructedInterpolants, 0 QuantifiedInterpolants, 1124652 SizeOfPredicates, 80 NumberOfNonLiveVariables, 9800 ConjunctsInSsa, 1880 ConjunctsInUnsatCore, 201 InterpolantComputations, 1 PerfectInterpolantSequences, 0/57400 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 20]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 20). Cancelled while IsEmpty was searching accepting run (input had 21 states). - StatisticsResult: Ultimate Automizer benchmark data for error location: mainErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 0.0s OverallTime, 0 OverallIterations, 0 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-21_10-32-27-132.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-21_10-32-27-132.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-21_10-32-27-132.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-21_10-32-27-132.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-1-2018-01-21_10-32-27-132.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_false-valid-deref-write.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-2-2018-01-21_10-32-27-132.csv Completed graceful shutdown