java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memsetNonZero2_true-valid-memsafety_true-termination.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-2f49842 [2018-01-21 10:37:24,754 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-21 10:37:24,756 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-21 10:37:24,770 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-21 10:37:24,771 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-21 10:37:24,771 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-21 10:37:24,773 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-21 10:37:24,775 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-21 10:37:24,777 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-21 10:37:24,778 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-21 10:37:24,779 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-21 10:37:24,779 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-21 10:37:24,780 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-21 10:37:24,781 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-21 10:37:24,782 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-21 10:37:24,784 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-21 10:37:24,786 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-21 10:37:24,788 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-21 10:37:24,789 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-21 10:37:24,790 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-21 10:37:24,793 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-21 10:37:24,793 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-21 10:37:24,793 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-21 10:37:24,794 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-21 10:37:24,795 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-21 10:37:24,796 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-21 10:37:24,797 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-21 10:37:24,797 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-21 10:37:24,797 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-21 10:37:24,798 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-21 10:37:24,798 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-21 10:37:24,799 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf [2018-01-21 10:37:24,809 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-21 10:37:24,809 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-21 10:37:24,810 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-21 10:37:24,810 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-21 10:37:24,810 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-21 10:37:24,810 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-21 10:37:24,811 INFO L133 SettingsManager]: * Precise comparison operator=true [2018-01-21 10:37:24,811 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-21 10:37:24,811 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-21 10:37:24,812 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-21 10:37:24,812 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-21 10:37:24,812 INFO L133 SettingsManager]: * Check allocation purity=true [2018-01-21 10:37:24,812 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-21 10:37:24,812 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-21 10:37:24,813 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-21 10:37:24,813 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-01-21 10:37:24,813 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-21 10:37:24,813 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-01-21 10:37:24,813 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-21 10:37:24,814 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-01-21 10:37:24,814 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-01-21 10:37:24,814 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-21 10:37:24,814 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-21 10:37:24,814 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-21 10:37:24,815 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-21 10:37:24,815 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-21 10:37:24,815 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 10:37:24,815 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-21 10:37:24,815 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-21 10:37:24,816 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-21 10:37:24,816 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-21 10:37:24,816 INFO L133 SettingsManager]: * Stop after first violation was found=false [2018-01-21 10:37:24,816 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-21 10:37:24,816 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-21 10:37:24,817 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-21 10:37:24,817 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-21 10:37:24,817 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-21 10:37:24,818 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-21 10:37:24,818 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-21 10:37:24,853 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-21 10:37:24,865 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-21 10:37:24,870 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-21 10:37:24,871 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-21 10:37:24,872 INFO L276 PluginConnector]: CDTParser initialized [2018-01-21 10:37:24,873 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memsetNonZero2_true-valid-memsafety_true-termination.c [2018-01-21 10:37:24,991 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-21 10:37:24,996 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-21 10:37:24,997 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-21 10:37:24,998 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-21 10:37:25,005 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-21 10:37:25,007 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 10:37:24" (1/1) ... [2018-01-21 10:37:25,010 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@47d05f2 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:37:25, skipping insertion in model container [2018-01-21 10:37:25,011 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 21.01 10:37:24" (1/1) ... [2018-01-21 10:37:25,029 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 10:37:25,049 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-21 10:37:25,164 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 10:37:25,177 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-21 10:37:25,181 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:37:25 WrapperNode [2018-01-21 10:37:25,181 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-21 10:37:25,182 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-21 10:37:25,182 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-21 10:37:25,182 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-21 10:37:25,193 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:37:25" (1/1) ... [2018-01-21 10:37:25,193 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:37:25" (1/1) ... [2018-01-21 10:37:25,201 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:37:25" (1/1) ... [2018-01-21 10:37:25,201 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:37:25" (1/1) ... [2018-01-21 10:37:25,203 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:37:25" (1/1) ... [2018-01-21 10:37:25,207 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:37:25" (1/1) ... [2018-01-21 10:37:25,208 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:37:25" (1/1) ... [2018-01-21 10:37:25,210 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-21 10:37:25,210 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-21 10:37:25,211 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-21 10:37:25,211 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-21 10:37:25,212 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:37:25" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-21 10:37:25,262 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-21 10:37:25,262 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-21 10:37:25,262 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-21 10:37:25,262 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-21 10:37:25,262 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-21 10:37:25,263 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-21 10:37:25,263 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-21 10:37:25,263 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-21 10:37:25,263 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-21 10:37:25,263 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-21 10:37:25,263 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-21 10:37:25,263 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-21 10:37:25,402 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-21 10:37:25,403 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 10:37:25 BoogieIcfgContainer [2018-01-21 10:37:25,403 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-21 10:37:25,404 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-21 10:37:25,404 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-21 10:37:25,405 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-21 10:37:25,406 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 21.01 10:37:24" (1/3) ... [2018-01-21 10:37:25,406 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@145e9556 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 10:37:25, skipping insertion in model container [2018-01-21 10:37:25,407 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 21.01 10:37:25" (2/3) ... [2018-01-21 10:37:25,407 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@145e9556 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 21.01 10:37:25, skipping insertion in model container [2018-01-21 10:37:25,407 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 21.01 10:37:25" (3/3) ... [2018-01-21 10:37:25,408 INFO L105 eAbstractionObserver]: Analyzing ICFG memsetNonZero2_true-valid-memsafety_true-termination.c [2018-01-21 10:37:25,416 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-21 10:37:25,421 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 3 error locations. [2018-01-21 10:37:25,464 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 10:37:25,465 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 10:37:25,465 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 10:37:25,465 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 10:37:25,465 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 10:37:25,465 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 10:37:25,465 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 10:37:25,465 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.initErr0EnsuresViolation======== [2018-01-21 10:37:25,466 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 10:37:25,482 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 10:37:25,486 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 4 [2018-01-21 10:37:25,486 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:25,487 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1] [2018-01-21 10:37:25,487 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.initErr0EnsuresViolation]=== [2018-01-21 10:37:25,491 INFO L82 PathProgramCache]: Analyzing trace with hash 50935, now seen corresponding path program 1 times [2018-01-21 10:37:25,493 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:25,535 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:25,535 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:37:25,536 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:25,536 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:25,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 10:37:25,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-21 10:37:25,598 INFO L381 BasicCegarLoop]: Counterexample might be feasible [2018-01-21 10:37:25,604 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-21 10:37:25,611 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 10:37:25,611 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 10:37:25,611 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 10:37:25,611 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 10:37:25,611 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 10:37:25,612 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 10:37:25,612 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 10:37:25,612 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == ULTIMATE.startErr0EnsuresViolation======== [2018-01-21 10:37:25,612 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 10:37:25,613 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 10:37:25,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-21 10:37:25,614 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:25,614 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:25,614 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:25,614 INFO L82 PathProgramCache]: Analyzing trace with hash 457189328, now seen corresponding path program 1 times [2018-01-21 10:37:25,614 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:25,615 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:25,615 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:37:25,616 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:25,616 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:25,638 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:25,645 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:25,742 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:25,744 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-21 10:37:25,744 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-21 10:37:25,744 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-21 10:37:25,746 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-21 10:37:25,757 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-21 10:37:25,758 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-21 10:37:25,759 INFO L87 Difference]: Start difference. First operand 21 states. Second operand 4 states. [2018-01-21 10:37:25,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:25,817 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 10:37:25,817 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-21 10:37:25,818 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 17 [2018-01-21 10:37:25,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:25,827 INFO L225 Difference]: With dead ends: 33 [2018-01-21 10:37:25,827 INFO L226 Difference]: Without dead ends: 19 [2018-01-21 10:37:25,829 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-21 10:37:25,910 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 19 states. [2018-01-21 10:37:25,925 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 19 to 19. [2018-01-21 10:37:25,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 19 states. [2018-01-21 10:37:25,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 19 states to 19 states and 19 transitions. [2018-01-21 10:37:25,928 INFO L78 Accepts]: Start accepts. Automaton has 19 states and 19 transitions. Word has length 17 [2018-01-21 10:37:25,928 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:25,928 INFO L432 AbstractCegarLoop]: Abstraction has 19 states and 19 transitions. [2018-01-21 10:37:25,929 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-21 10:37:25,929 INFO L276 IsEmpty]: Start isEmpty. Operand 19 states and 19 transitions. [2018-01-21 10:37:25,929 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-01-21 10:37:25,929 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:25,929 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:25,929 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:25,930 INFO L82 PathProgramCache]: Analyzing trace with hash -114007861, now seen corresponding path program 1 times [2018-01-21 10:37:25,930 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:25,930 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:25,931 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:37:25,931 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:25,931 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:25,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:25,945 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:26,018 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:26,019 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:26,019 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:26,020 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 19 with the following transitions: [2018-01-21 10:37:26,022 INFO L201 CegarAbsIntRunner]: [0], [1], [3], [7], [9], [10], [14], [15], [17], [18], [19], [20], [22], [23], [24], [25], [26], [27] [2018-01-21 10:37:26,066 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-21 10:37:26,066 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-21 10:37:26,317 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-21 10:37:26,318 INFO L268 AbstractInterpreter]: Visited 18 different actions 22 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 15 variables. [2018-01-21 10:37:26,330 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-21 10:37:26,330 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:26,330 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:26,341 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:37:26,341 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:37:26,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:26,370 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:26,416 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:26,416 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:26,569 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:26,604 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:26,604 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:26,611 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:37:26,611 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:37:26,640 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:26,644 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:26,649 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:26,650 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:26,778 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:26,779 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:26,779 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 11 [2018-01-21 10:37:26,779 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:26,780 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-21 10:37:26,781 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-21 10:37:26,781 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-01-21 10:37:26,781 INFO L87 Difference]: Start difference. First operand 19 states and 19 transitions. Second operand 8 states. [2018-01-21 10:37:26,829 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:26,829 INFO L93 Difference]: Finished difference Result 29 states and 29 transitions. [2018-01-21 10:37:26,830 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-21 10:37:26,830 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 18 [2018-01-21 10:37:26,830 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:26,831 INFO L225 Difference]: With dead ends: 29 [2018-01-21 10:37:26,831 INFO L226 Difference]: Without dead ends: 20 [2018-01-21 10:37:26,832 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 76 GetRequests, 64 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=81, Unknown=0, NotChecked=0, Total=132 [2018-01-21 10:37:26,832 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 20 states. [2018-01-21 10:37:26,834 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 20 to 20. [2018-01-21 10:37:26,834 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 20 states. [2018-01-21 10:37:26,835 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 20 states to 20 states and 20 transitions. [2018-01-21 10:37:26,835 INFO L78 Accepts]: Start accepts. Automaton has 20 states and 20 transitions. Word has length 18 [2018-01-21 10:37:26,835 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:26,835 INFO L432 AbstractCegarLoop]: Abstraction has 20 states and 20 transitions. [2018-01-21 10:37:26,835 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-21 10:37:26,835 INFO L276 IsEmpty]: Start isEmpty. Operand 20 states and 20 transitions. [2018-01-21 10:37:26,836 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-21 10:37:26,836 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:26,836 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:26,836 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:26,836 INFO L82 PathProgramCache]: Analyzing trace with hash -641251536, now seen corresponding path program 2 times [2018-01-21 10:37:26,836 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:26,837 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:26,837 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:37:26,837 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:26,838 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:26,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:26,850 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:26,917 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:26,917 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:26,917 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:26,918 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:26,918 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:26,918 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:26,918 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:26,926 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:37:26,926 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:26,940 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:26,954 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:26,955 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:26,957 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:26,994 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:26,994 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:27,157 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:27,183 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:27,183 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:27,187 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:37:27,187 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:27,201 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:27,209 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:27,215 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:27,219 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:27,224 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:27,224 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:27,322 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:27,323 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:27,324 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 14 [2018-01-21 10:37:27,324 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:27,324 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-21 10:37:27,325 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-21 10:37:27,325 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=69, Invalid=113, Unknown=0, NotChecked=0, Total=182 [2018-01-21 10:37:27,325 INFO L87 Difference]: Start difference. First operand 20 states and 20 transitions. Second operand 10 states. [2018-01-21 10:37:27,348 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:27,348 INFO L93 Difference]: Finished difference Result 30 states and 30 transitions. [2018-01-21 10:37:27,348 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-21 10:37:27,348 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 19 [2018-01-21 10:37:27,349 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:27,349 INFO L225 Difference]: With dead ends: 30 [2018-01-21 10:37:27,349 INFO L226 Difference]: Without dead ends: 21 [2018-01-21 10:37:27,350 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 66 SyntacticMatches, 2 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=80, Invalid=130, Unknown=0, NotChecked=0, Total=210 [2018-01-21 10:37:27,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 21 states. [2018-01-21 10:37:27,351 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 21 to 21. [2018-01-21 10:37:27,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 21 states. [2018-01-21 10:37:27,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 21 states to 21 states and 21 transitions. [2018-01-21 10:37:27,352 INFO L78 Accepts]: Start accepts. Automaton has 21 states and 21 transitions. Word has length 19 [2018-01-21 10:37:27,352 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:27,352 INFO L432 AbstractCegarLoop]: Abstraction has 21 states and 21 transitions. [2018-01-21 10:37:27,352 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-21 10:37:27,353 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states and 21 transitions. [2018-01-21 10:37:27,353 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 21 [2018-01-21 10:37:27,353 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:27,353 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:27,353 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:27,353 INFO L82 PathProgramCache]: Analyzing trace with hash 194063723, now seen corresponding path program 3 times [2018-01-21 10:37:27,354 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:27,354 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:27,354 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:27,354 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:27,354 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:27,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:27,366 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:27,410 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:27,411 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:27,411 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:27,411 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:27,412 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:27,412 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:27,412 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:27,423 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:37:27,423 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:37:27,432 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:27,434 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:27,435 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:27,436 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:27,437 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:27,468 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:27,469 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:27,586 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:27,607 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:27,607 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:27,610 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:37:27,611 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:37:27,623 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:27,630 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:27,637 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:27,643 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:27,646 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:27,650 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:27,650 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:27,689 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:27,690 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:27,690 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 17 [2018-01-21 10:37:27,691 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:27,691 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-21 10:37:27,691 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-21 10:37:27,691 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=102, Invalid=170, Unknown=0, NotChecked=0, Total=272 [2018-01-21 10:37:27,692 INFO L87 Difference]: Start difference. First operand 21 states and 21 transitions. Second operand 12 states. [2018-01-21 10:37:27,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:27,712 INFO L93 Difference]: Finished difference Result 31 states and 31 transitions. [2018-01-21 10:37:27,713 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-21 10:37:27,713 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 20 [2018-01-21 10:37:27,713 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:27,713 INFO L225 Difference]: With dead ends: 31 [2018-01-21 10:37:27,714 INFO L226 Difference]: Without dead ends: 22 [2018-01-21 10:37:27,714 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 68 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 79 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=115, Invalid=191, Unknown=0, NotChecked=0, Total=306 [2018-01-21 10:37:27,714 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 22 states. [2018-01-21 10:37:27,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 22 to 22. [2018-01-21 10:37:27,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 22 states. [2018-01-21 10:37:27,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 22 states to 22 states and 22 transitions. [2018-01-21 10:37:27,717 INFO L78 Accepts]: Start accepts. Automaton has 22 states and 22 transitions. Word has length 20 [2018-01-21 10:37:27,717 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:27,717 INFO L432 AbstractCegarLoop]: Abstraction has 22 states and 22 transitions. [2018-01-21 10:37:27,717 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-21 10:37:27,717 INFO L276 IsEmpty]: Start isEmpty. Operand 22 states and 22 transitions. [2018-01-21 10:37:27,718 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-21 10:37:27,718 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:27,718 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:27,718 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:27,718 INFO L82 PathProgramCache]: Analyzing trace with hash 319032976, now seen corresponding path program 4 times [2018-01-21 10:37:27,718 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:27,719 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:27,719 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:27,719 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:27,719 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:27,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:27,730 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:27,785 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:27,786 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:27,786 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:27,786 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:27,786 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:27,786 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:27,786 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:27,798 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:37:27,798 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:37:27,811 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:27,813 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:27,849 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:27,849 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:27,978 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:27,999 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:27,999 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:28,002 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:37:28,003 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:37:28,027 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:28,030 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:28,036 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:28,036 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:28,098 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:28,100 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:28,100 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 20 [2018-01-21 10:37:28,101 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:28,101 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-21 10:37:28,101 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-21 10:37:28,102 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=239, Unknown=0, NotChecked=0, Total=380 [2018-01-21 10:37:28,102 INFO L87 Difference]: Start difference. First operand 22 states and 22 transitions. Second operand 14 states. [2018-01-21 10:37:28,154 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:28,155 INFO L93 Difference]: Finished difference Result 32 states and 32 transitions. [2018-01-21 10:37:28,156 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-21 10:37:28,156 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 21 [2018-01-21 10:37:28,157 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:28,157 INFO L225 Difference]: With dead ends: 32 [2018-01-21 10:37:28,157 INFO L226 Difference]: Without dead ends: 23 [2018-01-21 10:37:28,158 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 70 SyntacticMatches, 2 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 122 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=156, Invalid=264, Unknown=0, NotChecked=0, Total=420 [2018-01-21 10:37:28,158 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 23 states. [2018-01-21 10:37:28,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 23 to 23. [2018-01-21 10:37:28,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 23 states. [2018-01-21 10:37:28,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 23 states to 23 states and 23 transitions. [2018-01-21 10:37:28,162 INFO L78 Accepts]: Start accepts. Automaton has 23 states and 23 transitions. Word has length 21 [2018-01-21 10:37:28,163 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:28,163 INFO L432 AbstractCegarLoop]: Abstraction has 23 states and 23 transitions. [2018-01-21 10:37:28,163 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-21 10:37:28,163 INFO L276 IsEmpty]: Start isEmpty. Operand 23 states and 23 transitions. [2018-01-21 10:37:28,163 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-21 10:37:28,164 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:28,164 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:28,164 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:28,164 INFO L82 PathProgramCache]: Analyzing trace with hash -101887477, now seen corresponding path program 5 times [2018-01-21 10:37:28,164 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:28,170 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:28,170 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:28,170 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:28,171 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:28,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:28,185 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:28,256 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:28,256 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:28,256 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:28,256 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:28,257 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:28,257 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:28,257 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:28,262 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:37:28,262 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:28,266 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:28,267 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:28,268 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:28,274 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:28,276 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:28,278 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:28,334 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:28,334 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:28,487 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:28,511 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:28,511 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:28,514 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:37:28,514 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:28,518 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:28,519 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:28,523 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:28,534 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:28,541 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:28,544 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:28,549 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:28,550 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:28,614 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:28,616 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:28,616 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 23 [2018-01-21 10:37:28,616 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:28,616 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-21 10:37:28,617 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-21 10:37:28,617 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=186, Invalid=320, Unknown=0, NotChecked=0, Total=506 [2018-01-21 10:37:28,617 INFO L87 Difference]: Start difference. First operand 23 states and 23 transitions. Second operand 16 states. [2018-01-21 10:37:28,656 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:28,656 INFO L93 Difference]: Finished difference Result 33 states and 33 transitions. [2018-01-21 10:37:28,656 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-21 10:37:28,656 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 22 [2018-01-21 10:37:28,656 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:28,657 INFO L225 Difference]: With dead ends: 33 [2018-01-21 10:37:28,657 INFO L226 Difference]: Without dead ends: 24 [2018-01-21 10:37:28,657 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 72 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 173 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=203, Invalid=349, Unknown=0, NotChecked=0, Total=552 [2018-01-21 10:37:28,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 24 states. [2018-01-21 10:37:28,660 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 24 to 24. [2018-01-21 10:37:28,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 24 states. [2018-01-21 10:37:28,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 24 states to 24 states and 24 transitions. [2018-01-21 10:37:28,661 INFO L78 Accepts]: Start accepts. Automaton has 24 states and 24 transitions. Word has length 22 [2018-01-21 10:37:28,661 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:28,661 INFO L432 AbstractCegarLoop]: Abstraction has 24 states and 24 transitions. [2018-01-21 10:37:28,661 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-21 10:37:28,661 INFO L276 IsEmpty]: Start isEmpty. Operand 24 states and 24 transitions. [2018-01-21 10:37:28,661 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-21 10:37:28,661 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:28,661 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:28,662 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:28,662 INFO L82 PathProgramCache]: Analyzing trace with hash -265519632, now seen corresponding path program 6 times [2018-01-21 10:37:28,662 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:28,662 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:28,662 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:28,663 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:28,663 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:28,674 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:28,674 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:28,762 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:28,762 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:28,762 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:28,762 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:28,762 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:28,762 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:28,763 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:28,768 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:37:28,768 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:37:28,775 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:28,777 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:28,778 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:28,779 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:28,780 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:28,781 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:28,826 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:28,827 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:28,987 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:29,007 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:29,007 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:29,010 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:37:29,011 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:37:29,021 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:29,027 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:29,035 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:29,044 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:29,050 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:29,053 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:29,059 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:29,059 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:29,127 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:29,130 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:29,130 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 26 [2018-01-21 10:37:29,130 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:29,131 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-21 10:37:29,131 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-21 10:37:29,131 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=237, Invalid=413, Unknown=0, NotChecked=0, Total=650 [2018-01-21 10:37:29,131 INFO L87 Difference]: Start difference. First operand 24 states and 24 transitions. Second operand 18 states. [2018-01-21 10:37:29,174 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:29,175 INFO L93 Difference]: Finished difference Result 34 states and 34 transitions. [2018-01-21 10:37:29,175 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-21 10:37:29,175 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 23 [2018-01-21 10:37:29,176 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:29,176 INFO L225 Difference]: With dead ends: 34 [2018-01-21 10:37:29,176 INFO L226 Difference]: Without dead ends: 25 [2018-01-21 10:37:29,177 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 101 GetRequests, 74 SyntacticMatches, 2 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 232 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=256, Invalid=446, Unknown=0, NotChecked=0, Total=702 [2018-01-21 10:37:29,177 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 25 states. [2018-01-21 10:37:29,180 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 25 to 25. [2018-01-21 10:37:29,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 25 states. [2018-01-21 10:37:29,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 25 states to 25 states and 25 transitions. [2018-01-21 10:37:29,181 INFO L78 Accepts]: Start accepts. Automaton has 25 states and 25 transitions. Word has length 23 [2018-01-21 10:37:29,181 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:29,181 INFO L432 AbstractCegarLoop]: Abstraction has 25 states and 25 transitions. [2018-01-21 10:37:29,181 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-21 10:37:29,182 INFO L276 IsEmpty]: Start isEmpty. Operand 25 states and 25 transitions. [2018-01-21 10:37:29,182 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-21 10:37:29,182 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:29,182 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:29,183 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:29,183 INFO L82 PathProgramCache]: Analyzing trace with hash -1043149141, now seen corresponding path program 7 times [2018-01-21 10:37:29,183 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:29,184 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:29,184 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:29,184 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:29,184 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:29,196 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:29,196 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:29,293 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:29,294 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:29,294 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:29,294 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:29,294 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:29,294 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:29,294 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:29,299 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:37:29,299 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:37:29,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:29,310 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:29,356 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:29,357 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:29,591 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:29,615 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:29,615 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:29,618 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:37:29,618 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:37:29,635 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:29,638 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:29,643 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:29,643 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:29,698 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:29,699 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:29,699 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 29 [2018-01-21 10:37:29,699 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:29,700 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-21 10:37:29,700 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-21 10:37:29,700 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=294, Invalid=518, Unknown=0, NotChecked=0, Total=812 [2018-01-21 10:37:29,700 INFO L87 Difference]: Start difference. First operand 25 states and 25 transitions. Second operand 20 states. [2018-01-21 10:37:29,730 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:29,731 INFO L93 Difference]: Finished difference Result 35 states and 35 transitions. [2018-01-21 10:37:29,731 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-21 10:37:29,731 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 24 [2018-01-21 10:37:29,731 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:29,732 INFO L225 Difference]: With dead ends: 35 [2018-01-21 10:37:29,732 INFO L226 Difference]: Without dead ends: 26 [2018-01-21 10:37:29,732 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 106 GetRequests, 76 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 299 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=315, Invalid=555, Unknown=0, NotChecked=0, Total=870 [2018-01-21 10:37:29,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 26 states. [2018-01-21 10:37:29,734 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 26 to 26. [2018-01-21 10:37:29,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 26 states. [2018-01-21 10:37:29,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 26 states to 26 states and 26 transitions. [2018-01-21 10:37:29,735 INFO L78 Accepts]: Start accepts. Automaton has 26 states and 26 transitions. Word has length 24 [2018-01-21 10:37:29,735 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:29,735 INFO L432 AbstractCegarLoop]: Abstraction has 26 states and 26 transitions. [2018-01-21 10:37:29,735 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-21 10:37:29,735 INFO L276 IsEmpty]: Start isEmpty. Operand 26 states and 26 transitions. [2018-01-21 10:37:29,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-21 10:37:29,736 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:29,736 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:29,736 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:29,736 INFO L82 PathProgramCache]: Analyzing trace with hash 620139856, now seen corresponding path program 8 times [2018-01-21 10:37:29,736 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:29,737 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:29,737 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:37:29,737 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:29,737 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:29,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:29,748 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:29,906 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:29,906 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:29,907 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:29,907 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:29,907 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:29,907 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:29,907 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:29,912 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:37:29,912 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:29,920 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:29,923 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:29,929 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:29,931 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:30,022 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:30,022 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:30,269 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:30,290 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:30,290 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:30,293 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:37:30,294 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:30,302 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:30,311 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:30,318 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:30,321 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:30,325 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:30,326 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:30,405 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:30,407 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:30,407 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 32 [2018-01-21 10:37:30,407 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:30,407 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-21 10:37:30,408 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-21 10:37:30,408 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=357, Invalid=635, Unknown=0, NotChecked=0, Total=992 [2018-01-21 10:37:30,408 INFO L87 Difference]: Start difference. First operand 26 states and 26 transitions. Second operand 22 states. [2018-01-21 10:37:30,436 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:30,437 INFO L93 Difference]: Finished difference Result 36 states and 36 transitions. [2018-01-21 10:37:30,437 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-21 10:37:30,437 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 25 [2018-01-21 10:37:30,437 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:30,438 INFO L225 Difference]: With dead ends: 36 [2018-01-21 10:37:30,438 INFO L226 Difference]: Without dead ends: 27 [2018-01-21 10:37:30,438 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 78 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 374 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=380, Invalid=676, Unknown=0, NotChecked=0, Total=1056 [2018-01-21 10:37:30,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 27 states. [2018-01-21 10:37:30,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 27 to 27. [2018-01-21 10:37:30,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 27 states. [2018-01-21 10:37:30,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 27 states to 27 states and 27 transitions. [2018-01-21 10:37:30,441 INFO L78 Accepts]: Start accepts. Automaton has 27 states and 27 transitions. Word has length 25 [2018-01-21 10:37:30,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:30,441 INFO L432 AbstractCegarLoop]: Abstraction has 27 states and 27 transitions. [2018-01-21 10:37:30,441 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-21 10:37:30,441 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states and 27 transitions. [2018-01-21 10:37:30,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-21 10:37:30,442 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:30,442 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:30,442 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:30,442 INFO L82 PathProgramCache]: Analyzing trace with hash 642491211, now seen corresponding path program 9 times [2018-01-21 10:37:30,442 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:30,443 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:30,443 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:30,443 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:30,443 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:30,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:30,452 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:30,561 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:30,561 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:30,561 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:30,561 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:30,561 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:30,561 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:30,562 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:30,570 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:37:30,570 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:37:30,578 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:30,580 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:30,582 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:30,584 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:30,585 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:30,587 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:30,600 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:30,601 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:30,675 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:30,675 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:30,919 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:30,939 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:30,939 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:30,943 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:37:30,943 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:37:30,951 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:30,958 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:30,966 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:30,974 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:30,982 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:30,990 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:30,997 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:31,000 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:31,004 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:31,005 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:31,098 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:31,099 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:31,100 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 35 [2018-01-21 10:37:31,100 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:31,100 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-21 10:37:31,100 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-21 10:37:31,101 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=426, Invalid=764, Unknown=0, NotChecked=0, Total=1190 [2018-01-21 10:37:31,101 INFO L87 Difference]: Start difference. First operand 27 states and 27 transitions. Second operand 24 states. [2018-01-21 10:37:31,132 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:31,132 INFO L93 Difference]: Finished difference Result 37 states and 37 transitions. [2018-01-21 10:37:31,167 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-21 10:37:31,168 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 26 [2018-01-21 10:37:31,168 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:31,169 INFO L225 Difference]: With dead ends: 37 [2018-01-21 10:37:31,169 INFO L226 Difference]: Without dead ends: 28 [2018-01-21 10:37:31,169 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 80 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 457 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=451, Invalid=809, Unknown=0, NotChecked=0, Total=1260 [2018-01-21 10:37:31,169 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 28 states. [2018-01-21 10:37:31,172 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 28 to 28. [2018-01-21 10:37:31,172 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 28 states. [2018-01-21 10:37:31,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 28 states to 28 states and 28 transitions. [2018-01-21 10:37:31,173 INFO L78 Accepts]: Start accepts. Automaton has 28 states and 28 transitions. Word has length 26 [2018-01-21 10:37:31,173 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:31,173 INFO L432 AbstractCegarLoop]: Abstraction has 28 states and 28 transitions. [2018-01-21 10:37:31,173 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-21 10:37:31,173 INFO L276 IsEmpty]: Start isEmpty. Operand 28 states and 28 transitions. [2018-01-21 10:37:31,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-21 10:37:31,174 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:31,174 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:31,174 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:31,174 INFO L82 PathProgramCache]: Analyzing trace with hash 1335383216, now seen corresponding path program 10 times [2018-01-21 10:37:31,174 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:31,175 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:31,175 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:31,175 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:31,175 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:31,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:31,185 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:31,278 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:31,279 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:31,279 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:31,279 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:31,279 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:31,279 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:31,279 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:31,286 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:37:31,287 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:37:31,301 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:31,303 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:31,384 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:31,385 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:31,627 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:31,647 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:31,647 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:31,650 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:37:31,651 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:37:31,675 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:31,678 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:31,683 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:31,684 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:31,759 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:31,760 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:31,761 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 38 [2018-01-21 10:37:31,761 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:31,761 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-21 10:37:31,761 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-21 10:37:31,762 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=501, Invalid=905, Unknown=0, NotChecked=0, Total=1406 [2018-01-21 10:37:31,762 INFO L87 Difference]: Start difference. First operand 28 states and 28 transitions. Second operand 26 states. [2018-01-21 10:37:31,790 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:31,790 INFO L93 Difference]: Finished difference Result 38 states and 38 transitions. [2018-01-21 10:37:31,791 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-21 10:37:31,791 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 27 [2018-01-21 10:37:31,791 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:31,792 INFO L225 Difference]: With dead ends: 38 [2018-01-21 10:37:31,792 INFO L226 Difference]: Without dead ends: 29 [2018-01-21 10:37:31,792 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 121 GetRequests, 82 SyntacticMatches, 2 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 548 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=528, Invalid=954, Unknown=0, NotChecked=0, Total=1482 [2018-01-21 10:37:31,793 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-01-21 10:37:31,795 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-01-21 10:37:31,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-01-21 10:37:31,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 29 transitions. [2018-01-21 10:37:31,796 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 29 transitions. Word has length 27 [2018-01-21 10:37:31,796 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:31,797 INFO L432 AbstractCegarLoop]: Abstraction has 29 states and 29 transitions. [2018-01-21 10:37:31,797 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-21 10:37:31,797 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 29 transitions. [2018-01-21 10:37:31,797 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-21 10:37:31,797 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:31,798 INFO L322 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:31,798 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:31,798 INFO L82 PathProgramCache]: Analyzing trace with hash 1340198891, now seen corresponding path program 11 times [2018-01-21 10:37:31,798 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:31,799 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:31,799 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:31,799 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:31,799 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:31,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:31,808 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:31,923 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:31,923 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:31,923 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:31,923 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:31,924 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:31,924 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:31,924 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:31,928 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:37:31,929 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:31,932 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:31,933 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:31,933 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:31,934 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:31,935 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:31,936 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:31,939 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:31,940 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:31,941 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:32,015 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:32,015 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:32,282 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:32,302 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:32,302 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:32,307 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:37:32,307 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:32,311 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:32,312 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:32,316 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:32,319 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:32,323 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:32,327 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:32,337 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:32,344 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:32,347 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:32,353 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:32,354 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:32,447 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:32,449 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:32,449 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 41 [2018-01-21 10:37:32,449 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:32,450 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-21 10:37:32,450 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-21 10:37:32,451 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=582, Invalid=1058, Unknown=0, NotChecked=0, Total=1640 [2018-01-21 10:37:32,451 INFO L87 Difference]: Start difference. First operand 29 states and 29 transitions. Second operand 28 states. [2018-01-21 10:37:32,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:32,501 INFO L93 Difference]: Finished difference Result 39 states and 39 transitions. [2018-01-21 10:37:32,502 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-21 10:37:32,502 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 28 [2018-01-21 10:37:32,502 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:32,503 INFO L225 Difference]: With dead ends: 39 [2018-01-21 10:37:32,503 INFO L226 Difference]: Without dead ends: 30 [2018-01-21 10:37:32,504 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 126 GetRequests, 84 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 647 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=611, Invalid=1111, Unknown=0, NotChecked=0, Total=1722 [2018-01-21 10:37:32,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 30 states. [2018-01-21 10:37:32,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 30 to 30. [2018-01-21 10:37:32,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 30 states. [2018-01-21 10:37:32,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 30 states to 30 states and 30 transitions. [2018-01-21 10:37:32,507 INFO L78 Accepts]: Start accepts. Automaton has 30 states and 30 transitions. Word has length 28 [2018-01-21 10:37:32,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:32,507 INFO L432 AbstractCegarLoop]: Abstraction has 30 states and 30 transitions. [2018-01-21 10:37:32,508 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-21 10:37:32,508 INFO L276 IsEmpty]: Start isEmpty. Operand 30 states and 30 transitions. [2018-01-21 10:37:32,508 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-21 10:37:32,508 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:32,509 INFO L322 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:32,509 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:32,509 INFO L82 PathProgramCache]: Analyzing trace with hash 1489484816, now seen corresponding path program 12 times [2018-01-21 10:37:32,509 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:32,510 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:32,510 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:32,510 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:32,510 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:32,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:32,519 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:32,962 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:32,962 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:32,962 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:32,962 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:32,962 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:32,962 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:32,962 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:32,970 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:37:32,970 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:37:32,977 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:32,980 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:32,982 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:32,983 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:32,985 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:32,986 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:32,987 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:32,988 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:32,989 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:33,114 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:33,114 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:33,543 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:33,573 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:33,573 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:33,577 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:37:33,577 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:37:33,587 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:33,593 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:33,601 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:33,609 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:33,618 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:33,627 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:33,637 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:33,644 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:33,647 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:33,651 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:33,652 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:33,779 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:33,781 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:33,782 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 44 [2018-01-21 10:37:33,782 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:33,782 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-21 10:37:33,783 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-21 10:37:33,783 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=669, Invalid=1223, Unknown=0, NotChecked=0, Total=1892 [2018-01-21 10:37:33,783 INFO L87 Difference]: Start difference. First operand 30 states and 30 transitions. Second operand 30 states. [2018-01-21 10:37:33,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:33,836 INFO L93 Difference]: Finished difference Result 40 states and 40 transitions. [2018-01-21 10:37:33,836 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-21 10:37:33,837 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 29 [2018-01-21 10:37:33,837 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:33,837 INFO L225 Difference]: With dead ends: 40 [2018-01-21 10:37:33,837 INFO L226 Difference]: Without dead ends: 31 [2018-01-21 10:37:33,838 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 86 SyntacticMatches, 2 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 754 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=700, Invalid=1280, Unknown=0, NotChecked=0, Total=1980 [2018-01-21 10:37:33,838 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 31 states. [2018-01-21 10:37:33,840 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 31 to 31. [2018-01-21 10:37:33,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-01-21 10:37:33,840 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 31 transitions. [2018-01-21 10:37:33,840 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 31 transitions. Word has length 29 [2018-01-21 10:37:33,841 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:33,841 INFO L432 AbstractCegarLoop]: Abstraction has 31 states and 31 transitions. [2018-01-21 10:37:33,841 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-21 10:37:33,841 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 31 transitions. [2018-01-21 10:37:33,841 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-21 10:37:33,841 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:33,841 INFO L322 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:33,841 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:33,842 INFO L82 PathProgramCache]: Analyzing trace with hash 1822381195, now seen corresponding path program 13 times [2018-01-21 10:37:33,842 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:33,842 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:33,842 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:33,842 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:33,842 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:33,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:33,852 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:34,095 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:34,095 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:34,095 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:34,095 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:34,095 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:34,095 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:34,095 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:34,108 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:37:34,109 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:37:34,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:34,121 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:34,239 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:34,239 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:34,631 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:34,663 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:34,663 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:34,667 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:37:34,667 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:37:34,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:34,692 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:34,697 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:34,697 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:34,807 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:34,808 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:34,808 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 47 [2018-01-21 10:37:34,808 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:34,808 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-21 10:37:34,809 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-21 10:37:34,809 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=762, Invalid=1400, Unknown=0, NotChecked=0, Total=2162 [2018-01-21 10:37:34,810 INFO L87 Difference]: Start difference. First operand 31 states and 31 transitions. Second operand 32 states. [2018-01-21 10:37:34,866 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:34,867 INFO L93 Difference]: Finished difference Result 41 states and 41 transitions. [2018-01-21 10:37:34,867 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-21 10:37:34,867 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 30 [2018-01-21 10:37:34,867 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:34,868 INFO L225 Difference]: With dead ends: 41 [2018-01-21 10:37:34,868 INFO L226 Difference]: Without dead ends: 32 [2018-01-21 10:37:34,868 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 88 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 869 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=795, Invalid=1461, Unknown=0, NotChecked=0, Total=2256 [2018-01-21 10:37:34,868 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 32 states. [2018-01-21 10:37:34,870 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 32 to 32. [2018-01-21 10:37:34,870 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 32 states. [2018-01-21 10:37:34,871 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 32 states to 32 states and 32 transitions. [2018-01-21 10:37:34,871 INFO L78 Accepts]: Start accepts. Automaton has 32 states and 32 transitions. Word has length 30 [2018-01-21 10:37:34,871 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:34,871 INFO L432 AbstractCegarLoop]: Abstraction has 32 states and 32 transitions. [2018-01-21 10:37:34,871 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-21 10:37:34,871 INFO L276 IsEmpty]: Start isEmpty. Operand 32 states and 32 transitions. [2018-01-21 10:37:34,872 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-21 10:37:34,872 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:34,872 INFO L322 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:34,872 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:34,872 INFO L82 PathProgramCache]: Analyzing trace with hash -742732944, now seen corresponding path program 14 times [2018-01-21 10:37:34,872 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:34,873 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:34,873 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:37:34,873 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:34,873 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:34,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:34,881 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:35,116 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:35,116 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:35,116 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:35,122 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:35,122 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:35,123 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:35,123 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) [2018-01-21 10:37:35,139 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:37:35,139 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:35,148 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:35,158 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:35,162 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:35,164 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:35,314 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:35,314 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:35,751 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:35,770 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:35,771 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:35,773 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:37:35,774 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:35,782 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:35,792 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:35,800 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:35,803 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:35,808 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:35,808 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:35,924 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:35,925 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:35,926 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 50 [2018-01-21 10:37:35,926 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:35,926 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-01-21 10:37:35,927 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-01-21 10:37:35,927 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=861, Invalid=1589, Unknown=0, NotChecked=0, Total=2450 [2018-01-21 10:37:35,927 INFO L87 Difference]: Start difference. First operand 32 states and 32 transitions. Second operand 34 states. [2018-01-21 10:37:36,004 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:36,004 INFO L93 Difference]: Finished difference Result 42 states and 42 transitions. [2018-01-21 10:37:36,006 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-21 10:37:36,006 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 31 [2018-01-21 10:37:36,007 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:36,007 INFO L225 Difference]: With dead ends: 42 [2018-01-21 10:37:36,007 INFO L226 Difference]: Without dead ends: 33 [2018-01-21 10:37:36,008 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 90 SyntacticMatches, 2 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 992 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=896, Invalid=1654, Unknown=0, NotChecked=0, Total=2550 [2018-01-21 10:37:36,009 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 33 states. [2018-01-21 10:37:36,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 33 to 33. [2018-01-21 10:37:36,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-01-21 10:37:36,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 33 transitions. [2018-01-21 10:37:36,013 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 33 transitions. Word has length 31 [2018-01-21 10:37:36,013 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:36,013 INFO L432 AbstractCegarLoop]: Abstraction has 33 states and 33 transitions. [2018-01-21 10:37:36,013 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-01-21 10:37:36,013 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 33 transitions. [2018-01-21 10:37:36,014 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-21 10:37:36,014 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:36,014 INFO L322 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:36,014 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:36,014 INFO L82 PathProgramCache]: Analyzing trace with hash 1343107371, now seen corresponding path program 15 times [2018-01-21 10:37:36,014 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:36,015 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:36,015 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:36,015 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:36,016 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:36,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:36,025 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:36,218 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:36,219 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:36,219 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:36,219 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:36,219 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:36,219 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:36,219 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:36,229 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:37:36,230 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:37:36,237 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:36,239 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:36,240 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:36,241 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:36,242 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:36,244 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:36,245 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:36,246 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:36,248 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:36,248 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:36,249 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:36,407 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:36,407 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:37,058 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:37,090 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:37,090 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:37,094 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:37:37,094 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:37:37,106 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:37,113 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:37,122 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:37,130 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:37,140 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:37,150 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:37,161 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:37,172 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:37,182 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:37,191 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:37,195 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:37,201 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:37,201 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:37,338 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:37,339 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:37,339 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 53 [2018-01-21 10:37:37,339 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:37,340 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-21 10:37:37,340 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-21 10:37:37,341 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=966, Invalid=1790, Unknown=0, NotChecked=0, Total=2756 [2018-01-21 10:37:37,341 INFO L87 Difference]: Start difference. First operand 33 states and 33 transitions. Second operand 36 states. [2018-01-21 10:37:37,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:37,386 INFO L93 Difference]: Finished difference Result 43 states and 43 transitions. [2018-01-21 10:37:37,386 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-21 10:37:37,386 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 32 [2018-01-21 10:37:37,387 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:37,387 INFO L225 Difference]: With dead ends: 43 [2018-01-21 10:37:37,387 INFO L226 Difference]: Without dead ends: 34 [2018-01-21 10:37:37,388 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 92 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1123 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1003, Invalid=1859, Unknown=0, NotChecked=0, Total=2862 [2018-01-21 10:37:37,388 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-01-21 10:37:37,390 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 34. [2018-01-21 10:37:37,390 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 34 states. [2018-01-21 10:37:37,391 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 34 states to 34 states and 34 transitions. [2018-01-21 10:37:37,391 INFO L78 Accepts]: Start accepts. Automaton has 34 states and 34 transitions. Word has length 32 [2018-01-21 10:37:37,391 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:37,391 INFO L432 AbstractCegarLoop]: Abstraction has 34 states and 34 transitions. [2018-01-21 10:37:37,391 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-21 10:37:37,391 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states and 34 transitions. [2018-01-21 10:37:37,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-21 10:37:37,392 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:37,392 INFO L322 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:37,392 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:37,392 INFO L82 PathProgramCache]: Analyzing trace with hash 1579647696, now seen corresponding path program 16 times [2018-01-21 10:37:37,393 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:37,393 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:37,393 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:37,393 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:37,394 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:37,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:37,402 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:37,621 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:37,622 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:37,622 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:37,622 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:37,622 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:37,622 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:37,622 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:37,627 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:37:37,627 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:37:37,638 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:37,640 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:37,765 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:37,765 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:38,218 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:38,238 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:38,238 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:38,241 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:37:38,241 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:37:38,270 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:38,273 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:38,278 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:38,279 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:38,412 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:38,414 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:38,414 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 56 [2018-01-21 10:37:38,414 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:38,414 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-21 10:37:38,415 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-21 10:37:38,415 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1077, Invalid=2003, Unknown=0, NotChecked=0, Total=3080 [2018-01-21 10:37:38,416 INFO L87 Difference]: Start difference. First operand 34 states and 34 transitions. Second operand 38 states. [2018-01-21 10:37:38,503 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:38,503 INFO L93 Difference]: Finished difference Result 44 states and 44 transitions. [2018-01-21 10:37:38,503 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-21 10:37:38,503 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 33 [2018-01-21 10:37:38,504 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:38,504 INFO L225 Difference]: With dead ends: 44 [2018-01-21 10:37:38,504 INFO L226 Difference]: Without dead ends: 35 [2018-01-21 10:37:38,505 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 94 SyntacticMatches, 2 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1262 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1116, Invalid=2076, Unknown=0, NotChecked=0, Total=3192 [2018-01-21 10:37:38,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-01-21 10:37:38,507 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 35. [2018-01-21 10:37:38,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 35 states. [2018-01-21 10:37:38,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 35 states to 35 states and 35 transitions. [2018-01-21 10:37:38,508 INFO L78 Accepts]: Start accepts. Automaton has 35 states and 35 transitions. Word has length 33 [2018-01-21 10:37:38,509 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:38,509 INFO L432 AbstractCegarLoop]: Abstraction has 35 states and 35 transitions. [2018-01-21 10:37:38,509 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-21 10:37:38,509 INFO L276 IsEmpty]: Start isEmpty. Operand 35 states and 35 transitions. [2018-01-21 10:37:38,509 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-21 10:37:38,510 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:38,510 INFO L322 BasicCegarLoop]: trace histogram [17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:38,510 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:38,510 INFO L82 PathProgramCache]: Analyzing trace with hash 322463179, now seen corresponding path program 17 times [2018-01-21 10:37:38,510 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:38,511 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:38,511 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:38,511 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:38,511 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:38,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:38,520 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:38,702 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:38,702 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:38,702 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:38,703 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:38,703 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:38,703 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:38,703 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:38,708 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:37:38,708 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:38,711 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:38,712 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:38,713 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:38,714 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:38,714 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:38,715 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:38,716 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:38,717 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:38,718 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:38,722 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:38,723 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:38,724 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:38,858 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:38,858 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:39,390 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:39,410 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:39,410 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:39,413 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:37:39,413 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:39,417 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:39,418 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:39,421 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:39,425 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:39,429 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:39,434 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:39,438 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:39,444 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:39,449 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:39,460 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:39,469 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:39,472 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:39,476 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:39,476 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:39,598 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:39,599 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:39,599 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 59 [2018-01-21 10:37:39,599 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:39,599 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-21 10:37:39,599 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-21 10:37:39,600 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1194, Invalid=2228, Unknown=0, NotChecked=0, Total=3422 [2018-01-21 10:37:39,600 INFO L87 Difference]: Start difference. First operand 35 states and 35 transitions. Second operand 40 states. [2018-01-21 10:37:39,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:39,642 INFO L93 Difference]: Finished difference Result 45 states and 45 transitions. [2018-01-21 10:37:39,643 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-21 10:37:39,643 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 34 [2018-01-21 10:37:39,643 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:39,644 INFO L225 Difference]: With dead ends: 45 [2018-01-21 10:37:39,644 INFO L226 Difference]: Without dead ends: 36 [2018-01-21 10:37:39,645 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 96 SyntacticMatches, 2 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1409 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1235, Invalid=2305, Unknown=0, NotChecked=0, Total=3540 [2018-01-21 10:37:39,645 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 36 states. [2018-01-21 10:37:39,648 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 36 to 36. [2018-01-21 10:37:39,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 36 states. [2018-01-21 10:37:39,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 36 states to 36 states and 36 transitions. [2018-01-21 10:37:39,649 INFO L78 Accepts]: Start accepts. Automaton has 36 states and 36 transitions. Word has length 34 [2018-01-21 10:37:39,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:39,649 INFO L432 AbstractCegarLoop]: Abstraction has 36 states and 36 transitions. [2018-01-21 10:37:39,649 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-21 10:37:39,649 INFO L276 IsEmpty]: Start isEmpty. Operand 36 states and 36 transitions. [2018-01-21 10:37:39,650 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-21 10:37:39,650 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:39,650 INFO L322 BasicCegarLoop]: trace histogram [18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:39,650 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:39,650 INFO L82 PathProgramCache]: Analyzing trace with hash 4448816, now seen corresponding path program 18 times [2018-01-21 10:37:39,650 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:39,651 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:39,651 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:39,651 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:39,651 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:39,659 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:39,659 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:39,849 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:39,849 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:39,849 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:39,849 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:39,849 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:39,849 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:39,849 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:39,854 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:37:39,854 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:37:39,862 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:39,863 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:39,864 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:39,866 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:39,867 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:39,868 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:39,869 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:39,870 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:39,871 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:39,872 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:39,873 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:39,874 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:40,024 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:40,024 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:40,667 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:40,687 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:40,687 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:40,689 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:37:40,690 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:37:40,698 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:40,705 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:40,712 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:40,720 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:40,729 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:40,738 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:40,747 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:40,757 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:40,767 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:40,778 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:40,785 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:40,788 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:40,793 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:40,793 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:40,923 INFO L134 CoverageAnalysis]: Checked inductivity of 171 backedges. 0 proven. 171 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:40,924 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:40,924 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 62 [2018-01-21 10:37:40,924 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:40,924 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-01-21 10:37:40,924 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-01-21 10:37:40,925 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1317, Invalid=2465, Unknown=0, NotChecked=0, Total=3782 [2018-01-21 10:37:40,925 INFO L87 Difference]: Start difference. First operand 36 states and 36 transitions. Second operand 42 states. [2018-01-21 10:37:40,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:40,967 INFO L93 Difference]: Finished difference Result 46 states and 46 transitions. [2018-01-21 10:37:40,967 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-21 10:37:40,967 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 35 [2018-01-21 10:37:40,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:40,968 INFO L225 Difference]: With dead ends: 46 [2018-01-21 10:37:40,968 INFO L226 Difference]: Without dead ends: 37 [2018-01-21 10:37:40,968 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 161 GetRequests, 98 SyntacticMatches, 2 SemanticMatches, 61 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1564 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1360, Invalid=2546, Unknown=0, NotChecked=0, Total=3906 [2018-01-21 10:37:40,969 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-01-21 10:37:40,971 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 37. [2018-01-21 10:37:40,971 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-01-21 10:37:40,971 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 37 transitions. [2018-01-21 10:37:40,971 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 37 transitions. Word has length 35 [2018-01-21 10:37:40,971 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:40,971 INFO L432 AbstractCegarLoop]: Abstraction has 37 states and 37 transitions. [2018-01-21 10:37:40,971 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-01-21 10:37:40,971 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 37 transitions. [2018-01-21 10:37:40,972 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-21 10:37:40,972 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:40,972 INFO L322 BasicCegarLoop]: trace histogram [19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:40,972 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:40,972 INFO L82 PathProgramCache]: Analyzing trace with hash -1264061845, now seen corresponding path program 19 times [2018-01-21 10:37:40,972 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:40,973 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:40,973 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:40,973 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:40,973 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:40,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:40,980 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:41,231 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:41,231 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:41,256 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:41,256 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:41,256 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:41,256 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:41,257 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:41,261 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:37:41,261 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:37:41,273 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:41,275 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:41,444 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:41,444 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:42,034 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:42,053 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:42,053 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:42,056 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:37:42,056 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:37:42,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:42,081 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:42,087 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:42,087 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:42,224 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:42,225 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:42,225 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 65 [2018-01-21 10:37:42,225 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:42,225 INFO L409 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-01-21 10:37:42,225 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-01-21 10:37:42,226 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1446, Invalid=2714, Unknown=0, NotChecked=0, Total=4160 [2018-01-21 10:37:42,226 INFO L87 Difference]: Start difference. First operand 37 states and 37 transitions. Second operand 44 states. [2018-01-21 10:37:42,284 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:42,284 INFO L93 Difference]: Finished difference Result 47 states and 47 transitions. [2018-01-21 10:37:42,284 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-21 10:37:42,285 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 36 [2018-01-21 10:37:42,285 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:42,285 INFO L225 Difference]: With dead ends: 47 [2018-01-21 10:37:42,285 INFO L226 Difference]: Without dead ends: 38 [2018-01-21 10:37:42,286 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 166 GetRequests, 100 SyntacticMatches, 2 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1727 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1491, Invalid=2799, Unknown=0, NotChecked=0, Total=4290 [2018-01-21 10:37:42,286 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 38 states. [2018-01-21 10:37:42,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 38 to 38. [2018-01-21 10:37:42,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-01-21 10:37:42,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 38 transitions. [2018-01-21 10:37:42,288 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 38 transitions. Word has length 36 [2018-01-21 10:37:42,288 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:42,288 INFO L432 AbstractCegarLoop]: Abstraction has 38 states and 38 transitions. [2018-01-21 10:37:42,288 INFO L433 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-01-21 10:37:42,288 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 38 transitions. [2018-01-21 10:37:42,289 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-21 10:37:42,289 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:42,289 INFO L322 BasicCegarLoop]: trace histogram [20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:42,289 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:42,289 INFO L82 PathProgramCache]: Analyzing trace with hash -1933186672, now seen corresponding path program 20 times [2018-01-21 10:37:42,289 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:42,290 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:42,290 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:37:42,290 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:42,290 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:42,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:42,297 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:42,525 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:42,525 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:42,526 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:42,526 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:42,526 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:42,526 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:42,526 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:42,531 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:37:42,531 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:42,539 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:42,547 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:42,550 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:42,552 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:42,746 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:42,746 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:43,391 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:43,410 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:43,411 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:43,413 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:37:43,414 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:43,422 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:43,433 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:43,443 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:43,446 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:43,451 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:43,451 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:43,600 INFO L134 CoverageAnalysis]: Checked inductivity of 210 backedges. 0 proven. 210 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:43,601 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:43,601 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 68 [2018-01-21 10:37:43,601 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:43,601 INFO L409 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-01-21 10:37:43,602 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-01-21 10:37:43,602 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1583, Invalid=2973, Unknown=0, NotChecked=0, Total=4556 [2018-01-21 10:37:43,602 INFO L87 Difference]: Start difference. First operand 38 states and 38 transitions. Second operand 46 states. [2018-01-21 10:37:43,651 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:43,651 INFO L93 Difference]: Finished difference Result 48 states and 48 transitions. [2018-01-21 10:37:43,651 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-21 10:37:43,652 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 37 [2018-01-21 10:37:43,652 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:43,652 INFO L225 Difference]: With dead ends: 48 [2018-01-21 10:37:43,652 INFO L226 Difference]: Without dead ends: 39 [2018-01-21 10:37:43,652 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 171 GetRequests, 102 SyntacticMatches, 2 SemanticMatches, 67 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1916 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1630, Invalid=3062, Unknown=0, NotChecked=0, Total=4692 [2018-01-21 10:37:43,653 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 39 states. [2018-01-21 10:37:43,654 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 39 to 39. [2018-01-21 10:37:43,654 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 39 states. [2018-01-21 10:37:43,655 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 39 states to 39 states and 39 transitions. [2018-01-21 10:37:43,655 INFO L78 Accepts]: Start accepts. Automaton has 39 states and 39 transitions. Word has length 37 [2018-01-21 10:37:43,655 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:43,655 INFO L432 AbstractCegarLoop]: Abstraction has 39 states and 39 transitions. [2018-01-21 10:37:43,655 INFO L433 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-01-21 10:37:43,655 INFO L276 IsEmpty]: Start isEmpty. Operand 39 states and 39 transitions. [2018-01-21 10:37:43,655 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-21 10:37:43,655 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:43,655 INFO L322 BasicCegarLoop]: trace histogram [21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:43,656 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:43,656 INFO L82 PathProgramCache]: Analyzing trace with hash -1201219829, now seen corresponding path program 21 times [2018-01-21 10:37:43,656 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:43,656 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:43,656 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:43,656 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:43,656 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:43,662 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:43,663 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:43,899 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:43,900 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:43,900 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:43,900 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:43,900 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:43,900 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:43,900 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:43,905 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:37:43,905 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:37:43,911 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:43,913 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:43,914 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:43,915 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:43,916 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:43,917 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:43,918 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:43,919 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:43,920 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:43,922 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:43,923 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:43,924 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:43,924 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:43,925 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:44,107 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:44,107 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:44,777 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:44,796 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:44,796 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:44,799 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:37:44,799 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:37:44,808 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:44,814 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:44,822 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:44,830 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:44,839 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:44,847 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:44,857 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:44,867 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:44,877 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:44,888 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:44,899 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:44,910 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:44,918 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:44,921 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:44,926 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:44,926 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:45,085 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:45,086 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:45,086 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 71 [2018-01-21 10:37:45,086 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:45,087 INFO L409 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-01-21 10:37:45,087 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-01-21 10:37:45,087 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1726, Invalid=3244, Unknown=0, NotChecked=0, Total=4970 [2018-01-21 10:37:45,088 INFO L87 Difference]: Start difference. First operand 39 states and 39 transitions. Second operand 48 states. [2018-01-21 10:37:45,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:45,135 INFO L93 Difference]: Finished difference Result 49 states and 49 transitions. [2018-01-21 10:37:45,136 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-21 10:37:45,136 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 38 [2018-01-21 10:37:45,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:45,136 INFO L225 Difference]: With dead ends: 49 [2018-01-21 10:37:45,136 INFO L226 Difference]: Without dead ends: 40 [2018-01-21 10:37:45,137 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 104 SyntacticMatches, 2 SemanticMatches, 70 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2136 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1775, Invalid=3337, Unknown=0, NotChecked=0, Total=5112 [2018-01-21 10:37:45,137 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 40 states. [2018-01-21 10:37:45,139 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 40 to 40. [2018-01-21 10:37:45,139 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 40 states. [2018-01-21 10:37:45,140 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 40 states to 40 states and 40 transitions. [2018-01-21 10:37:45,140 INFO L78 Accepts]: Start accepts. Automaton has 40 states and 40 transitions. Word has length 38 [2018-01-21 10:37:45,140 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:45,140 INFO L432 AbstractCegarLoop]: Abstraction has 40 states and 40 transitions. [2018-01-21 10:37:45,140 INFO L433 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-01-21 10:37:45,141 INFO L276 IsEmpty]: Start isEmpty. Operand 40 states and 40 transitions. [2018-01-21 10:37:45,141 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-21 10:37:45,141 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:45,141 INFO L322 BasicCegarLoop]: trace histogram [22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:45,141 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:45,141 INFO L82 PathProgramCache]: Analyzing trace with hash 14915824, now seen corresponding path program 22 times [2018-01-21 10:37:45,141 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:45,142 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:45,142 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:45,142 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:45,142 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:45,148 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:45,149 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:45,393 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:45,393 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:45,393 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:45,393 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:45,393 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:45,394 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:45,394 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:45,400 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:37:45,400 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:37:45,418 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:45,420 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:45,621 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:45,621 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:46,343 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:46,362 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:46,374 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:46,377 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:37:46,377 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:37:46,410 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:46,413 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:46,418 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:46,418 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:46,604 INFO L134 CoverageAnalysis]: Checked inductivity of 253 backedges. 0 proven. 253 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:46,605 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:46,605 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 74 [2018-01-21 10:37:46,605 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:46,605 INFO L409 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-01-21 10:37:46,605 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-01-21 10:37:46,606 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1875, Invalid=3527, Unknown=0, NotChecked=0, Total=5402 [2018-01-21 10:37:46,606 INFO L87 Difference]: Start difference. First operand 40 states and 40 transitions. Second operand 50 states. [2018-01-21 10:37:46,672 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:46,672 INFO L93 Difference]: Finished difference Result 50 states and 50 transitions. [2018-01-21 10:37:46,673 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-21 10:37:46,673 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 39 [2018-01-21 10:37:46,673 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:46,673 INFO L225 Difference]: With dead ends: 50 [2018-01-21 10:37:46,673 INFO L226 Difference]: Without dead ends: 41 [2018-01-21 10:37:46,674 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 181 GetRequests, 106 SyntacticMatches, 2 SemanticMatches, 73 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2368 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1926, Invalid=3624, Unknown=0, NotChecked=0, Total=5550 [2018-01-21 10:37:46,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-01-21 10:37:46,677 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 41. [2018-01-21 10:37:46,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-01-21 10:37:46,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 41 transitions. [2018-01-21 10:37:46,678 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 41 transitions. Word has length 39 [2018-01-21 10:37:46,678 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:46,678 INFO L432 AbstractCegarLoop]: Abstraction has 41 states and 41 transitions. [2018-01-21 10:37:46,678 INFO L433 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-01-21 10:37:46,679 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 41 transitions. [2018-01-21 10:37:46,679 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-21 10:37:46,679 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:46,679 INFO L322 BasicCegarLoop]: trace histogram [23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:46,679 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:46,680 INFO L82 PathProgramCache]: Analyzing trace with hash -939584597, now seen corresponding path program 23 times [2018-01-21 10:37:46,680 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:46,680 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:46,680 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:46,681 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:46,681 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:46,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:46,688 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:46,969 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:46,969 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:46,969 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:46,969 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:46,969 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:46,969 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:46,969 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:46,974 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:37:46,974 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:46,978 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:46,979 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:46,980 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:46,981 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:46,981 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:46,982 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:46,983 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:46,984 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:46,985 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:46,986 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:46,986 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:46,987 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:46,991 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:46,992 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:46,994 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:47,205 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:47,206 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:47,966 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:47,986 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:47,986 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:47,988 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:37:47,989 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:47,993 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:47,995 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:47,998 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:48,002 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:48,005 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:48,010 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:48,015 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:48,020 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:48,026 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:48,031 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:48,038 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:48,044 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:48,056 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:48,066 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:48,069 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:48,074 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:48,075 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:48,262 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:48,263 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:48,263 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 77 [2018-01-21 10:37:48,263 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:48,263 INFO L409 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-01-21 10:37:48,264 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-01-21 10:37:48,264 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2030, Invalid=3822, Unknown=0, NotChecked=0, Total=5852 [2018-01-21 10:37:48,265 INFO L87 Difference]: Start difference. First operand 41 states and 41 transitions. Second operand 52 states. [2018-01-21 10:37:48,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:48,326 INFO L93 Difference]: Finished difference Result 51 states and 51 transitions. [2018-01-21 10:37:48,326 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-21 10:37:48,327 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 40 [2018-01-21 10:37:48,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:48,327 INFO L225 Difference]: With dead ends: 51 [2018-01-21 10:37:48,327 INFO L226 Difference]: Without dead ends: 42 [2018-01-21 10:37:48,328 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 108 SyntacticMatches, 2 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2612 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=2083, Invalid=3923, Unknown=0, NotChecked=0, Total=6006 [2018-01-21 10:37:48,328 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 42 states. [2018-01-21 10:37:48,331 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 42 to 42. [2018-01-21 10:37:48,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 42 states. [2018-01-21 10:37:48,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 42 states to 42 states and 42 transitions. [2018-01-21 10:37:48,331 INFO L78 Accepts]: Start accepts. Automaton has 42 states and 42 transitions. Word has length 40 [2018-01-21 10:37:48,332 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:48,332 INFO L432 AbstractCegarLoop]: Abstraction has 42 states and 42 transitions. [2018-01-21 10:37:48,332 INFO L433 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-01-21 10:37:48,332 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states and 42 transitions. [2018-01-21 10:37:48,332 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-21 10:37:48,333 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:48,333 INFO L322 BasicCegarLoop]: trace histogram [24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:48,333 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:48,333 INFO L82 PathProgramCache]: Analyzing trace with hash -464326576, now seen corresponding path program 24 times [2018-01-21 10:37:48,333 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:48,334 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:48,334 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:48,334 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:48,334 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:48,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:48,344 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:48,612 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:48,612 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:48,612 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:48,613 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:48,613 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:48,613 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:48,613 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:48,618 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:37:48,618 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:37:48,624 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:48,626 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:48,627 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:48,628 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:48,629 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:48,630 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:48,631 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:48,632 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:48,633 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:48,634 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:48,635 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:48,636 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:48,637 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:48,637 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:48,639 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:48,925 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:48,925 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:49,711 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:49,731 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:49,731 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:49,734 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:37:49,734 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:37:49,743 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:49,750 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:49,758 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:49,766 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:49,774 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:49,782 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:49,792 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:49,802 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:49,812 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:49,823 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:49,833 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:49,845 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:49,856 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:37:49,865 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:49,868 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:49,873 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:49,873 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:50,070 INFO L134 CoverageAnalysis]: Checked inductivity of 300 backedges. 0 proven. 300 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:50,072 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:50,072 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 80 [2018-01-21 10:37:50,072 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:50,072 INFO L409 AbstractCegarLoop]: Interpolant automaton has 54 states [2018-01-21 10:37:50,072 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2018-01-21 10:37:50,073 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2191, Invalid=4129, Unknown=0, NotChecked=0, Total=6320 [2018-01-21 10:37:50,073 INFO L87 Difference]: Start difference. First operand 42 states and 42 transitions. Second operand 54 states. [2018-01-21 10:37:50,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:50,167 INFO L93 Difference]: Finished difference Result 52 states and 52 transitions. [2018-01-21 10:37:50,173 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-21 10:37:50,173 INFO L78 Accepts]: Start accepts. Automaton has 54 states. Word has length 41 [2018-01-21 10:37:50,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:50,173 INFO L225 Difference]: With dead ends: 52 [2018-01-21 10:37:50,173 INFO L226 Difference]: Without dead ends: 43 [2018-01-21 10:37:50,174 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 191 GetRequests, 110 SyntacticMatches, 2 SemanticMatches, 79 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2868 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=2246, Invalid=4234, Unknown=0, NotChecked=0, Total=6480 [2018-01-21 10:37:50,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 43 states. [2018-01-21 10:37:50,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 43 to 43. [2018-01-21 10:37:50,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 43 states. [2018-01-21 10:37:50,176 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 43 states to 43 states and 43 transitions. [2018-01-21 10:37:50,177 INFO L78 Accepts]: Start accepts. Automaton has 43 states and 43 transitions. Word has length 41 [2018-01-21 10:37:50,177 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:50,177 INFO L432 AbstractCegarLoop]: Abstraction has 43 states and 43 transitions. [2018-01-21 10:37:50,177 INFO L433 AbstractCegarLoop]: Interpolant automaton has 54 states. [2018-01-21 10:37:50,177 INFO L276 IsEmpty]: Start isEmpty. Operand 43 states and 43 transitions. [2018-01-21 10:37:50,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-21 10:37:50,178 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:50,178 INFO L322 BasicCegarLoop]: trace histogram [25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:50,178 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:50,178 INFO L82 PathProgramCache]: Analyzing trace with hash 1383770187, now seen corresponding path program 25 times [2018-01-21 10:37:50,178 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:50,179 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:50,179 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:50,179 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:50,179 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:50,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:50,188 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:50,531 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:50,532 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:50,532 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:50,532 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:50,532 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:50,532 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:50,532 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:50,537 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:37:50,537 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:37:50,549 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:50,550 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:50,789 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:50,789 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:51,624 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:51,643 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:51,644 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:51,646 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:37:51,646 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:37:51,673 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:51,676 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:51,681 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:51,682 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:51,883 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:51,884 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:51,884 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 83 [2018-01-21 10:37:51,885 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:51,885 INFO L409 AbstractCegarLoop]: Interpolant automaton has 56 states [2018-01-21 10:37:51,885 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2018-01-21 10:37:51,885 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2358, Invalid=4448, Unknown=0, NotChecked=0, Total=6806 [2018-01-21 10:37:51,886 INFO L87 Difference]: Start difference. First operand 43 states and 43 transitions. Second operand 56 states. [2018-01-21 10:37:51,949 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:51,950 INFO L93 Difference]: Finished difference Result 53 states and 53 transitions. [2018-01-21 10:37:51,950 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-21 10:37:51,950 INFO L78 Accepts]: Start accepts. Automaton has 56 states. Word has length 42 [2018-01-21 10:37:51,950 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:51,950 INFO L225 Difference]: With dead ends: 53 [2018-01-21 10:37:51,950 INFO L226 Difference]: Without dead ends: 44 [2018-01-21 10:37:51,951 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 196 GetRequests, 112 SyntacticMatches, 2 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3136 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=2415, Invalid=4557, Unknown=0, NotChecked=0, Total=6972 [2018-01-21 10:37:51,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-01-21 10:37:51,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 44. [2018-01-21 10:37:51,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 44 states. [2018-01-21 10:37:51,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 44 states to 44 states and 44 transitions. [2018-01-21 10:37:51,953 INFO L78 Accepts]: Start accepts. Automaton has 44 states and 44 transitions. Word has length 42 [2018-01-21 10:37:51,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:51,954 INFO L432 AbstractCegarLoop]: Abstraction has 44 states and 44 transitions. [2018-01-21 10:37:51,954 INFO L433 AbstractCegarLoop]: Interpolant automaton has 56 states. [2018-01-21 10:37:51,954 INFO L276 IsEmpty]: Start isEmpty. Operand 44 states and 44 transitions. [2018-01-21 10:37:51,954 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-21 10:37:51,954 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:51,954 INFO L322 BasicCegarLoop]: trace histogram [26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:51,954 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:51,954 INFO L82 PathProgramCache]: Analyzing trace with hash -1454772304, now seen corresponding path program 26 times [2018-01-21 10:37:51,954 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:51,955 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:51,955 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:37:51,955 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:51,955 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:51,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:51,963 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:52,343 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:52,343 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:52,343 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:52,343 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:52,344 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:52,344 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:52,344 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:52,351 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:37:52,351 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:52,359 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:52,366 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:52,368 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:52,370 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:52,682 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:52,682 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:53,564 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:53,584 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:53,584 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:53,587 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:37:53,587 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:53,596 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:53,608 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:53,620 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:53,623 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:53,629 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:53,629 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:53,836 INFO L134 CoverageAnalysis]: Checked inductivity of 351 backedges. 0 proven. 351 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:53,837 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:53,837 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 86 [2018-01-21 10:37:53,837 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:53,838 INFO L409 AbstractCegarLoop]: Interpolant automaton has 58 states [2018-01-21 10:37:53,838 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2018-01-21 10:37:53,839 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2531, Invalid=4779, Unknown=0, NotChecked=0, Total=7310 [2018-01-21 10:37:53,839 INFO L87 Difference]: Start difference. First operand 44 states and 44 transitions. Second operand 58 states. [2018-01-21 10:37:53,900 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:53,900 INFO L93 Difference]: Finished difference Result 54 states and 54 transitions. [2018-01-21 10:37:53,900 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-01-21 10:37:53,900 INFO L78 Accepts]: Start accepts. Automaton has 58 states. Word has length 43 [2018-01-21 10:37:53,900 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:53,901 INFO L225 Difference]: With dead ends: 54 [2018-01-21 10:37:53,901 INFO L226 Difference]: Without dead ends: 45 [2018-01-21 10:37:53,901 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 201 GetRequests, 114 SyntacticMatches, 2 SemanticMatches, 85 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3416 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=2590, Invalid=4892, Unknown=0, NotChecked=0, Total=7482 [2018-01-21 10:37:53,901 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-01-21 10:37:53,903 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-01-21 10:37:53,903 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-01-21 10:37:53,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 45 transitions. [2018-01-21 10:37:53,903 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 45 transitions. Word has length 43 [2018-01-21 10:37:53,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:53,904 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 45 transitions. [2018-01-21 10:37:53,904 INFO L433 AbstractCegarLoop]: Interpolant automaton has 58 states. [2018-01-21 10:37:53,904 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 45 transitions. [2018-01-21 10:37:53,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-21 10:37:53,904 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:53,904 INFO L322 BasicCegarLoop]: trace histogram [27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:53,904 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:53,904 INFO L82 PathProgramCache]: Analyzing trace with hash 744723691, now seen corresponding path program 27 times [2018-01-21 10:37:53,904 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:53,905 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:53,905 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:53,905 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:53,905 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:53,915 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:53,915 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:54,280 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:54,280 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:54,280 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:54,280 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:54,281 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:54,281 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:54,281 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:54,285 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:37:54,286 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:37:54,292 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:54,294 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:54,295 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:54,296 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:54,297 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:54,298 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:54,299 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:54,300 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:54,301 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:54,302 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:54,303 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:54,304 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:54,305 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:54,307 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:54,308 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:54,308 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:54,310 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:54,583 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:54,584 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:55,513 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:55,533 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:55,533 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:55,536 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:37:55,536 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:37:55,546 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:55,552 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:55,560 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:55,568 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:55,576 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:55,584 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:55,594 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:55,603 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:55,613 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:55,624 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:55,635 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:55,647 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:55,659 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:55,671 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:55,684 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:37:55,693 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:55,697 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:55,703 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:55,703 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:55,920 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:55,921 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:55,921 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31, 31, 31, 31] total 89 [2018-01-21 10:37:55,921 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:55,921 INFO L409 AbstractCegarLoop]: Interpolant automaton has 60 states [2018-01-21 10:37:55,922 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2018-01-21 10:37:55,922 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2710, Invalid=5122, Unknown=0, NotChecked=0, Total=7832 [2018-01-21 10:37:55,922 INFO L87 Difference]: Start difference. First operand 45 states and 45 transitions. Second operand 60 states. [2018-01-21 10:37:55,979 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:55,979 INFO L93 Difference]: Finished difference Result 55 states and 55 transitions. [2018-01-21 10:37:55,979 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-21 10:37:55,979 INFO L78 Accepts]: Start accepts. Automaton has 60 states. Word has length 44 [2018-01-21 10:37:55,979 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:55,980 INFO L225 Difference]: With dead ends: 55 [2018-01-21 10:37:55,980 INFO L226 Difference]: Without dead ends: 46 [2018-01-21 10:37:55,980 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 206 GetRequests, 116 SyntacticMatches, 2 SemanticMatches, 88 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3708 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=2771, Invalid=5239, Unknown=0, NotChecked=0, Total=8010 [2018-01-21 10:37:55,980 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 46 states. [2018-01-21 10:37:55,982 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 46 to 46. [2018-01-21 10:37:55,982 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-01-21 10:37:55,982 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 46 transitions. [2018-01-21 10:37:55,983 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 46 transitions. Word has length 44 [2018-01-21 10:37:55,983 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:55,983 INFO L432 AbstractCegarLoop]: Abstraction has 46 states and 46 transitions. [2018-01-21 10:37:55,983 INFO L433 AbstractCegarLoop]: Interpolant automaton has 60 states. [2018-01-21 10:37:55,983 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 46 transitions. [2018-01-21 10:37:55,983 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-21 10:37:55,984 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:55,984 INFO L322 BasicCegarLoop]: trace histogram [28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:55,984 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:55,984 INFO L82 PathProgramCache]: Analyzing trace with hash 209622800, now seen corresponding path program 28 times [2018-01-21 10:37:55,984 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:55,985 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:55,985 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:55,985 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:55,985 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:55,996 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:55,996 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:56,341 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:56,342 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:56,342 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:56,342 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:56,342 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:56,342 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:56,342 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:56,347 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:37:56,348 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:37:56,362 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:56,363 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:56,653 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:56,653 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:57,635 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:57,654 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:57,655 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:57,658 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:37:57,658 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:37:57,698 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:57,701 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:57,708 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:57,708 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:57,934 INFO L134 CoverageAnalysis]: Checked inductivity of 406 backedges. 0 proven. 406 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:57,935 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:37:57,935 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32, 32, 32] total 92 [2018-01-21 10:37:57,935 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:37:57,935 INFO L409 AbstractCegarLoop]: Interpolant automaton has 62 states [2018-01-21 10:37:57,935 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 62 interpolants. [2018-01-21 10:37:57,936 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2895, Invalid=5477, Unknown=0, NotChecked=0, Total=8372 [2018-01-21 10:37:57,936 INFO L87 Difference]: Start difference. First operand 46 states and 46 transitions. Second operand 62 states. [2018-01-21 10:37:57,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:37:57,999 INFO L93 Difference]: Finished difference Result 56 states and 56 transitions. [2018-01-21 10:37:57,999 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-21 10:37:57,999 INFO L78 Accepts]: Start accepts. Automaton has 62 states. Word has length 45 [2018-01-21 10:37:57,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:37:57,999 INFO L225 Difference]: With dead ends: 56 [2018-01-21 10:37:58,000 INFO L226 Difference]: Without dead ends: 47 [2018-01-21 10:37:58,000 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 211 GetRequests, 118 SyntacticMatches, 2 SemanticMatches, 91 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4012 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=2958, Invalid=5598, Unknown=0, NotChecked=0, Total=8556 [2018-01-21 10:37:58,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 47 states. [2018-01-21 10:37:58,002 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 47 to 47. [2018-01-21 10:37:58,002 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 47 states. [2018-01-21 10:37:58,003 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 47 states to 47 states and 47 transitions. [2018-01-21 10:37:58,003 INFO L78 Accepts]: Start accepts. Automaton has 47 states and 47 transitions. Word has length 45 [2018-01-21 10:37:58,003 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:37:58,003 INFO L432 AbstractCegarLoop]: Abstraction has 47 states and 47 transitions. [2018-01-21 10:37:58,003 INFO L433 AbstractCegarLoop]: Interpolant automaton has 62 states. [2018-01-21 10:37:58,003 INFO L276 IsEmpty]: Start isEmpty. Operand 47 states and 47 transitions. [2018-01-21 10:37:58,003 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-21 10:37:58,003 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:37:58,004 INFO L322 BasicCegarLoop]: trace histogram [29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:37:58,004 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:37:58,004 INFO L82 PathProgramCache]: Analyzing trace with hash 801364363, now seen corresponding path program 29 times [2018-01-21 10:37:58,004 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:37:58,004 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:58,004 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:37:58,005 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:37:58,005 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:37:58,012 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:37:58,012 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:37:58,387 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:58,387 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:58,387 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:37:58,387 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:37:58,387 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:37:58,387 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:58,387 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:37:58,392 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:37:58,392 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:58,396 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:58,397 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:58,398 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:58,399 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:58,399 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:58,400 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:58,401 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:58,402 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:58,402 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:58,403 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:58,404 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:58,405 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:58,406 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:58,407 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:58,408 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:58,411 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:58,412 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:58,414 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:58,722 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:58,722 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:37:59,744 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:59,763 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:37:59,764 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:37:59,766 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:37:59,766 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:37:59,772 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:59,773 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:59,777 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:59,780 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:59,784 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:59,789 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:59,793 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:59,799 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:59,805 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:59,811 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:59,818 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:59,825 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:59,833 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:59,841 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:59,849 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:59,863 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:37:59,875 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:37:59,879 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:37:59,886 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:37:59,886 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:38:00,153 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:00,154 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:38:00,155 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 33] total 95 [2018-01-21 10:38:00,155 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:38:00,155 INFO L409 AbstractCegarLoop]: Interpolant automaton has 64 states [2018-01-21 10:38:00,155 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 64 interpolants. [2018-01-21 10:38:00,156 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3086, Invalid=5844, Unknown=0, NotChecked=0, Total=8930 [2018-01-21 10:38:00,156 INFO L87 Difference]: Start difference. First operand 47 states and 47 transitions. Second operand 64 states. [2018-01-21 10:38:00,225 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:38:00,226 INFO L93 Difference]: Finished difference Result 57 states and 57 transitions. [2018-01-21 10:38:00,226 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-21 10:38:00,226 INFO L78 Accepts]: Start accepts. Automaton has 64 states. Word has length 46 [2018-01-21 10:38:00,226 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:38:00,226 INFO L225 Difference]: With dead ends: 57 [2018-01-21 10:38:00,226 INFO L226 Difference]: Without dead ends: 48 [2018-01-21 10:38:00,227 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 216 GetRequests, 120 SyntacticMatches, 2 SemanticMatches, 94 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4328 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=3151, Invalid=5969, Unknown=0, NotChecked=0, Total=9120 [2018-01-21 10:38:00,227 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-01-21 10:38:00,229 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-01-21 10:38:00,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-21 10:38:00,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 48 transitions. [2018-01-21 10:38:00,229 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 48 transitions. Word has length 46 [2018-01-21 10:38:00,229 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:38:00,229 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 48 transitions. [2018-01-21 10:38:00,229 INFO L433 AbstractCegarLoop]: Interpolant automaton has 64 states. [2018-01-21 10:38:00,229 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 48 transitions. [2018-01-21 10:38:00,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-21 10:38:00,230 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:38:00,230 INFO L322 BasicCegarLoop]: trace histogram [30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:38:00,230 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:38:00,230 INFO L82 PathProgramCache]: Analyzing trace with hash 1965483632, now seen corresponding path program 30 times [2018-01-21 10:38:00,230 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:38:00,231 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:38:00,231 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:38:00,231 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:38:00,231 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:38:00,242 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:38:00,243 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:38:00,662 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:00,663 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:38:00,663 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:38:00,663 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:38:00,663 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:38:00,663 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:38:00,663 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:38:00,668 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:38:00,668 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:38:00,674 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:00,676 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:00,677 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:00,678 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:00,679 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:00,680 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:00,681 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:00,682 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:00,683 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:00,684 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:00,685 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:00,686 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:00,687 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:00,689 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:00,690 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:00,691 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:00,691 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:38:00,693 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:38:01,029 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:01,029 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:38:02,087 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:02,107 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:38:02,107 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:38:02,110 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:38:02,110 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:38:02,120 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:02,126 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:02,134 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:02,142 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:02,150 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:02,158 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:02,167 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:02,177 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:02,187 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:02,197 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:02,208 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:02,219 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:02,231 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:02,243 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:02,256 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:02,270 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:02,280 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:38:02,283 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:38:02,290 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:02,290 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:38:02,567 INFO L134 CoverageAnalysis]: Checked inductivity of 465 backedges. 0 proven. 465 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:02,568 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:38:02,568 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34, 34, 34, 34] total 98 [2018-01-21 10:38:02,568 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:38:02,568 INFO L409 AbstractCegarLoop]: Interpolant automaton has 66 states [2018-01-21 10:38:02,568 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 66 interpolants. [2018-01-21 10:38:02,569 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3283, Invalid=6223, Unknown=0, NotChecked=0, Total=9506 [2018-01-21 10:38:02,569 INFO L87 Difference]: Start difference. First operand 48 states and 48 transitions. Second operand 66 states. [2018-01-21 10:38:02,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:38:02,625 INFO L93 Difference]: Finished difference Result 58 states and 58 transitions. [2018-01-21 10:38:02,625 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-21 10:38:02,625 INFO L78 Accepts]: Start accepts. Automaton has 66 states. Word has length 47 [2018-01-21 10:38:02,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:38:02,625 INFO L225 Difference]: With dead ends: 58 [2018-01-21 10:38:02,625 INFO L226 Difference]: Without dead ends: 49 [2018-01-21 10:38:02,626 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 221 GetRequests, 122 SyntacticMatches, 2 SemanticMatches, 97 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4656 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=3350, Invalid=6352, Unknown=0, NotChecked=0, Total=9702 [2018-01-21 10:38:02,626 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-01-21 10:38:02,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2018-01-21 10:38:02,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-01-21 10:38:02,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 49 transitions. [2018-01-21 10:38:02,628 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 49 transitions. Word has length 47 [2018-01-21 10:38:02,628 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:38:02,628 INFO L432 AbstractCegarLoop]: Abstraction has 49 states and 49 transitions. [2018-01-21 10:38:02,628 INFO L433 AbstractCegarLoop]: Interpolant automaton has 66 states. [2018-01-21 10:38:02,628 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 49 transitions. [2018-01-21 10:38:02,628 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-21 10:38:02,628 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:38:02,629 INFO L322 BasicCegarLoop]: trace histogram [31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:38:02,629 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:38:02,629 INFO L82 PathProgramCache]: Analyzing trace with hash -601524693, now seen corresponding path program 31 times [2018-01-21 10:38:02,629 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:38:02,629 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:38:02,629 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:38:02,630 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:38:02,630 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:38:02,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:38:02,637 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:38:03,056 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:03,056 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:38:03,056 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:38:03,056 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:38:03,056 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:38:03,057 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:38:03,057 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:38:03,062 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:38:03,062 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:38:03,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:38:03,076 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:38:03,668 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:03,668 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:38:04,809 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:04,828 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:38:04,829 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 63 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:38:04,832 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:38:04,832 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:38:04,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:38:04,866 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:38:04,872 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:04,872 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:38:05,132 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:05,133 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:38:05,134 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35, 35, 35, 35] total 101 [2018-01-21 10:38:05,134 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:38:05,134 INFO L409 AbstractCegarLoop]: Interpolant automaton has 68 states [2018-01-21 10:38:05,134 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 68 interpolants. [2018-01-21 10:38:05,135 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3486, Invalid=6614, Unknown=0, NotChecked=0, Total=10100 [2018-01-21 10:38:05,135 INFO L87 Difference]: Start difference. First operand 49 states and 49 transitions. Second operand 68 states. [2018-01-21 10:38:05,222 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:38:05,222 INFO L93 Difference]: Finished difference Result 59 states and 59 transitions. [2018-01-21 10:38:05,222 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-21 10:38:05,222 INFO L78 Accepts]: Start accepts. Automaton has 68 states. Word has length 48 [2018-01-21 10:38:05,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:38:05,223 INFO L225 Difference]: With dead ends: 59 [2018-01-21 10:38:05,223 INFO L226 Difference]: Without dead ends: 50 [2018-01-21 10:38:05,223 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 226 GetRequests, 124 SyntacticMatches, 2 SemanticMatches, 100 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4996 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=3555, Invalid=6747, Unknown=0, NotChecked=0, Total=10302 [2018-01-21 10:38:05,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 50 states. [2018-01-21 10:38:05,225 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 50 to 50. [2018-01-21 10:38:05,225 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-01-21 10:38:05,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 50 transitions. [2018-01-21 10:38:05,226 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 50 transitions. Word has length 48 [2018-01-21 10:38:05,226 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:38:05,226 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 50 transitions. [2018-01-21 10:38:05,226 INFO L433 AbstractCegarLoop]: Interpolant automaton has 68 states. [2018-01-21 10:38:05,226 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 50 transitions. [2018-01-21 10:38:05,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-01-21 10:38:05,227 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:38:05,227 INFO L322 BasicCegarLoop]: trace histogram [32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:38:05,227 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:38:05,227 INFO L82 PathProgramCache]: Analyzing trace with hash 1425595856, now seen corresponding path program 32 times [2018-01-21 10:38:05,227 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:38:05,227 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:38:05,228 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:38:05,228 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:38:05,228 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:38:05,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:38:05,236 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:38:05,776 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:05,777 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:38:05,777 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:38:05,777 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:38:05,777 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:38:05,777 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:38:05,777 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 64 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:38:05,784 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:38:05,784 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:38:05,791 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:05,797 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:05,799 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:38:05,801 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:38:06,167 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:06,167 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:38:07,335 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:07,376 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:38:07,377 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 65 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:38:07,379 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-21 10:38:07,379 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:38:07,389 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:07,405 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:07,418 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:38:07,421 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:38:07,428 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:07,428 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:38:07,706 INFO L134 CoverageAnalysis]: Checked inductivity of 528 backedges. 0 proven. 528 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:07,707 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:38:07,707 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36, 36, 36, 36] total 104 [2018-01-21 10:38:07,707 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:38:07,708 INFO L409 AbstractCegarLoop]: Interpolant automaton has 70 states [2018-01-21 10:38:07,708 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 70 interpolants. [2018-01-21 10:38:07,708 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3695, Invalid=7017, Unknown=0, NotChecked=0, Total=10712 [2018-01-21 10:38:07,708 INFO L87 Difference]: Start difference. First operand 50 states and 50 transitions. Second operand 70 states. [2018-01-21 10:38:07,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:38:07,815 INFO L93 Difference]: Finished difference Result 60 states and 60 transitions. [2018-01-21 10:38:07,815 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-01-21 10:38:07,815 INFO L78 Accepts]: Start accepts. Automaton has 70 states. Word has length 49 [2018-01-21 10:38:07,815 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:38:07,816 INFO L225 Difference]: With dead ends: 60 [2018-01-21 10:38:07,816 INFO L226 Difference]: Without dead ends: 51 [2018-01-21 10:38:07,816 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 231 GetRequests, 126 SyntacticMatches, 2 SemanticMatches, 103 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5348 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=3766, Invalid=7154, Unknown=0, NotChecked=0, Total=10920 [2018-01-21 10:38:07,817 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-01-21 10:38:07,818 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 51. [2018-01-21 10:38:07,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 51 states. [2018-01-21 10:38:07,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 51 states to 51 states and 51 transitions. [2018-01-21 10:38:07,819 INFO L78 Accepts]: Start accepts. Automaton has 51 states and 51 transitions. Word has length 49 [2018-01-21 10:38:07,819 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:38:07,819 INFO L432 AbstractCegarLoop]: Abstraction has 51 states and 51 transitions. [2018-01-21 10:38:07,819 INFO L433 AbstractCegarLoop]: Interpolant automaton has 70 states. [2018-01-21 10:38:07,819 INFO L276 IsEmpty]: Start isEmpty. Operand 51 states and 51 transitions. [2018-01-21 10:38:07,820 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-21 10:38:07,820 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:38:07,820 INFO L322 BasicCegarLoop]: trace histogram [33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:38:07,820 INFO L371 AbstractCegarLoop]: === Iteration 34 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:38:07,820 INFO L82 PathProgramCache]: Analyzing trace with hash -158176565, now seen corresponding path program 33 times [2018-01-21 10:38:07,820 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:38:07,821 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:38:07,821 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:38:07,821 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:38:07,821 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:38:07,829 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:38:07,830 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:38:08,342 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:08,342 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:38:08,342 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:38:08,343 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:38:08,343 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:38:08,343 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:38:08,343 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 66 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:38:08,347 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:38:08,348 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:38:08,355 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:08,356 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:08,357 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:08,358 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:08,359 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:08,360 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:08,361 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:08,362 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:08,363 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:08,364 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:08,365 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:08,367 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:08,368 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:08,369 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:08,370 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:08,371 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:08,372 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:08,373 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:08,374 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:38:08,375 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:38:08,761 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:08,761 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:38:09,974 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:09,994 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:38:09,994 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 67 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:38:09,997 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-21 10:38:09,997 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-21 10:38:10,007 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:10,013 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:10,021 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:10,029 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:10,037 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:10,046 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:10,055 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:10,065 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:10,075 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:10,086 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:10,097 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:10,108 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:10,120 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:10,132 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:10,145 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:10,159 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:10,172 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:10,186 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-21 10:38:10,197 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:38:10,200 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:38:10,207 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:10,207 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:38:10,491 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 0 proven. 561 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:10,492 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:38:10,492 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37, 37, 37, 37] total 107 [2018-01-21 10:38:10,492 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:38:10,493 INFO L409 AbstractCegarLoop]: Interpolant automaton has 72 states [2018-01-21 10:38:10,493 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 72 interpolants. [2018-01-21 10:38:10,493 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3910, Invalid=7432, Unknown=0, NotChecked=0, Total=11342 [2018-01-21 10:38:10,493 INFO L87 Difference]: Start difference. First operand 51 states and 51 transitions. Second operand 72 states. [2018-01-21 10:38:10,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:38:10,563 INFO L93 Difference]: Finished difference Result 61 states and 61 transitions. [2018-01-21 10:38:10,564 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-01-21 10:38:10,564 INFO L78 Accepts]: Start accepts. Automaton has 72 states. Word has length 50 [2018-01-21 10:38:10,564 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:38:10,564 INFO L225 Difference]: With dead ends: 61 [2018-01-21 10:38:10,564 INFO L226 Difference]: Without dead ends: 52 [2018-01-21 10:38:10,565 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 236 GetRequests, 128 SyntacticMatches, 2 SemanticMatches, 106 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5712 ImplicationChecksByTransitivity, 1.7s TimeCoverageRelationStatistics Valid=3983, Invalid=7573, Unknown=0, NotChecked=0, Total=11556 [2018-01-21 10:38:10,565 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-01-21 10:38:10,566 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-01-21 10:38:10,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-01-21 10:38:10,567 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 52 transitions. [2018-01-21 10:38:10,567 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 52 transitions. Word has length 50 [2018-01-21 10:38:10,567 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:38:10,567 INFO L432 AbstractCegarLoop]: Abstraction has 52 states and 52 transitions. [2018-01-21 10:38:10,567 INFO L433 AbstractCegarLoop]: Interpolant automaton has 72 states. [2018-01-21 10:38:10,567 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 52 transitions. [2018-01-21 10:38:10,568 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-21 10:38:10,568 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:38:10,568 INFO L322 BasicCegarLoop]: trace histogram [34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:38:10,568 INFO L371 AbstractCegarLoop]: === Iteration 35 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:38:10,568 INFO L82 PathProgramCache]: Analyzing trace with hash -2010481360, now seen corresponding path program 34 times [2018-01-21 10:38:10,568 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:38:10,568 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:38:10,569 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:38:10,569 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:38:10,569 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:38:10,578 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:38:10,578 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:38:11,109 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:11,109 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:38:11,109 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:38:11,109 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:38:11,109 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:38:11,109 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:38:11,109 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 68 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:38:11,114 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:38:11,114 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:38:11,130 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:38:11,131 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:38:11,537 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:11,537 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:38:12,846 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:12,878 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:38:12,878 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 69 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:38:12,883 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-21 10:38:12,883 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-21 10:38:12,929 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:38:12,933 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:38:12,943 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:12,943 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:38:13,294 INFO L134 CoverageAnalysis]: Checked inductivity of 595 backedges. 0 proven. 595 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:13,295 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:38:13,295 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38, 38, 38, 38] total 110 [2018-01-21 10:38:13,295 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:38:13,296 INFO L409 AbstractCegarLoop]: Interpolant automaton has 74 states [2018-01-21 10:38:13,296 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 74 interpolants. [2018-01-21 10:38:13,297 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4131, Invalid=7859, Unknown=0, NotChecked=0, Total=11990 [2018-01-21 10:38:13,297 INFO L87 Difference]: Start difference. First operand 52 states and 52 transitions. Second operand 74 states. [2018-01-21 10:38:13,436 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:38:13,436 INFO L93 Difference]: Finished difference Result 62 states and 62 transitions. [2018-01-21 10:38:13,436 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-01-21 10:38:13,437 INFO L78 Accepts]: Start accepts. Automaton has 74 states. Word has length 51 [2018-01-21 10:38:13,437 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:38:13,437 INFO L225 Difference]: With dead ends: 62 [2018-01-21 10:38:13,437 INFO L226 Difference]: Without dead ends: 53 [2018-01-21 10:38:13,438 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 241 GetRequests, 130 SyntacticMatches, 2 SemanticMatches, 109 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6088 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=4206, Invalid=8004, Unknown=0, NotChecked=0, Total=12210 [2018-01-21 10:38:13,438 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-01-21 10:38:13,439 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 53. [2018-01-21 10:38:13,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-01-21 10:38:13,440 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 53 transitions. [2018-01-21 10:38:13,440 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 53 transitions. Word has length 51 [2018-01-21 10:38:13,440 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:38:13,440 INFO L432 AbstractCegarLoop]: Abstraction has 53 states and 53 transitions. [2018-01-21 10:38:13,440 INFO L433 AbstractCegarLoop]: Interpolant automaton has 74 states. [2018-01-21 10:38:13,440 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 53 transitions. [2018-01-21 10:38:13,441 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-21 10:38:13,441 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:38:13,441 INFO L322 BasicCegarLoop]: trace histogram [35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:38:13,441 INFO L371 AbstractCegarLoop]: === Iteration 36 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:38:13,441 INFO L82 PathProgramCache]: Analyzing trace with hash 697612139, now seen corresponding path program 35 times [2018-01-21 10:38:13,441 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:38:13,442 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:38:13,442 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:38:13,442 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:38:13,442 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:38:13,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:38:13,452 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:38:14,013 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:14,013 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:38:14,013 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:38:14,014 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:38:14,014 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:38:14,014 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:38:14,014 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 70 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:38:14,018 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:38:14,019 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:38:14,023 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:14,023 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:14,024 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:14,025 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:14,026 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:14,026 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:14,027 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:14,028 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:14,029 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:14,030 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:14,031 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:14,031 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:14,032 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:14,033 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:14,034 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:14,035 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:14,036 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:14,038 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:14,041 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:14,043 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:38:14,045 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:38:14,477 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:14,477 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:38:15,794 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:15,814 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:38:15,814 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 71 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:38:15,816 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-21 10:38:15,817 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-21 10:38:15,821 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:15,823 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:15,826 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:15,829 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:15,833 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:15,837 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:15,842 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:15,847 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:15,852 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:15,858 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:15,865 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:15,872 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:15,879 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:15,886 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:15,894 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:15,903 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:15,912 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:15,921 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:15,935 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-21 10:38:15,947 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:38:15,950 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:38:15,957 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:15,958 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:38:16,269 INFO L134 CoverageAnalysis]: Checked inductivity of 630 backedges. 0 proven. 630 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:16,270 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:38:16,270 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39, 39, 39, 39] total 113 [2018-01-21 10:38:16,270 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:38:16,271 INFO L409 AbstractCegarLoop]: Interpolant automaton has 76 states [2018-01-21 10:38:16,271 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 76 interpolants. [2018-01-21 10:38:16,271 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4358, Invalid=8298, Unknown=0, NotChecked=0, Total=12656 [2018-01-21 10:38:16,272 INFO L87 Difference]: Start difference. First operand 53 states and 53 transitions. Second operand 76 states. [2018-01-21 10:38:16,348 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:38:16,348 INFO L93 Difference]: Finished difference Result 63 states and 63 transitions. [2018-01-21 10:38:16,349 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-01-21 10:38:16,349 INFO L78 Accepts]: Start accepts. Automaton has 76 states. Word has length 52 [2018-01-21 10:38:16,349 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:38:16,349 INFO L225 Difference]: With dead ends: 63 [2018-01-21 10:38:16,349 INFO L226 Difference]: Without dead ends: 54 [2018-01-21 10:38:16,350 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 246 GetRequests, 132 SyntacticMatches, 2 SemanticMatches, 112 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6476 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=4435, Invalid=8447, Unknown=0, NotChecked=0, Total=12882 [2018-01-21 10:38:16,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-01-21 10:38:16,352 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 54. [2018-01-21 10:38:16,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-01-21 10:38:16,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 54 transitions. [2018-01-21 10:38:16,352 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 54 transitions. Word has length 52 [2018-01-21 10:38:16,352 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:38:16,352 INFO L432 AbstractCegarLoop]: Abstraction has 54 states and 54 transitions. [2018-01-21 10:38:16,352 INFO L433 AbstractCegarLoop]: Interpolant automaton has 76 states. [2018-01-21 10:38:16,353 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 54 transitions. [2018-01-21 10:38:16,353 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-01-21 10:38:16,353 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:38:16,353 INFO L322 BasicCegarLoop]: trace histogram [36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:38:16,353 INFO L371 AbstractCegarLoop]: === Iteration 37 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:38:16,353 INFO L82 PathProgramCache]: Analyzing trace with hash -1250835312, now seen corresponding path program 36 times [2018-01-21 10:38:16,353 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:38:16,354 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:38:16,354 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:38:16,354 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:38:16,354 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:38:16,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:38:16,364 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:38:16,909 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:16,909 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:38:16,909 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:38:16,909 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:38:16,910 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:38:16,910 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:38:16,910 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 72 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:38:16,914 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:38:16,915 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:38:16,922 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:16,923 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:16,924 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:16,925 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:16,926 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:16,927 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:16,929 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:16,930 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:16,931 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:16,932 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:16,933 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:16,934 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:16,936 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:16,937 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:16,938 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:16,939 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:16,940 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:16,941 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:16,943 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:16,943 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:38:16,945 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:38:17,393 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:17,393 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:38:18,769 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:18,789 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:38:18,789 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 73 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-21 10:38:18,792 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-21 10:38:18,792 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-21 10:38:18,803 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:18,810 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:18,818 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:18,826 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:18,835 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:18,844 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:18,853 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:18,863 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:18,873 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:18,883 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:18,894 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:18,906 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:18,917 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:18,930 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:18,943 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:18,956 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:18,970 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:18,984 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:18,999 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-21 10:38:19,010 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-21 10:38:19,014 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:38:19,021 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:19,021 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-21 10:38:19,341 INFO L134 CoverageAnalysis]: Checked inductivity of 666 backedges. 0 proven. 666 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:19,342 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-21 10:38:19,342 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40, 40, 40, 40] total 116 [2018-01-21 10:38:19,342 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-21 10:38:19,342 INFO L409 AbstractCegarLoop]: Interpolant automaton has 78 states [2018-01-21 10:38:19,342 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 78 interpolants. [2018-01-21 10:38:19,343 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=4591, Invalid=8749, Unknown=0, NotChecked=0, Total=13340 [2018-01-21 10:38:19,343 INFO L87 Difference]: Start difference. First operand 54 states and 54 transitions. Second operand 78 states. [2018-01-21 10:38:19,419 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-21 10:38:19,420 INFO L93 Difference]: Finished difference Result 64 states and 64 transitions. [2018-01-21 10:38:19,420 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-01-21 10:38:19,420 INFO L78 Accepts]: Start accepts. Automaton has 78 states. Word has length 53 [2018-01-21 10:38:19,420 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-21 10:38:19,421 INFO L225 Difference]: With dead ends: 64 [2018-01-21 10:38:19,421 INFO L226 Difference]: Without dead ends: 55 [2018-01-21 10:38:19,421 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 251 GetRequests, 134 SyntacticMatches, 2 SemanticMatches, 115 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6876 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=4670, Invalid=8902, Unknown=0, NotChecked=0, Total=13572 [2018-01-21 10:38:19,422 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 55 states. [2018-01-21 10:38:19,423 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 55 to 55. [2018-01-21 10:38:19,423 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 55 states. [2018-01-21 10:38:19,423 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 55 states to 55 states and 55 transitions. [2018-01-21 10:38:19,424 INFO L78 Accepts]: Start accepts. Automaton has 55 states and 55 transitions. Word has length 53 [2018-01-21 10:38:19,424 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-21 10:38:19,424 INFO L432 AbstractCegarLoop]: Abstraction has 55 states and 55 transitions. [2018-01-21 10:38:19,424 INFO L433 AbstractCegarLoop]: Interpolant automaton has 78 states. [2018-01-21 10:38:19,424 INFO L276 IsEmpty]: Start isEmpty. Operand 55 states and 55 transitions. [2018-01-21 10:38:19,424 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-01-21 10:38:19,424 INFO L314 BasicCegarLoop]: Found error trace [2018-01-21 10:38:19,424 INFO L322 BasicCegarLoop]: trace histogram [37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-21 10:38:19,424 INFO L371 AbstractCegarLoop]: === Iteration 38 === [ULTIMATE.startErr0EnsuresViolation]=== [2018-01-21 10:38:19,425 INFO L82 PathProgramCache]: Analyzing trace with hash -1523164149, now seen corresponding path program 37 times [2018-01-21 10:38:19,425 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-21 10:38:19,425 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:38:19,425 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-21 10:38:19,425 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-21 10:38:19,425 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-21 10:38:19,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:38:19,438 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-21 10:38:20,013 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:20,013 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:38:20,013 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-21 10:38:20,014 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-21 10:38:20,014 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-21 10:38:20,014 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-21 10:38:20,014 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 74 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-21 10:38:20,021 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-21 10:38:20,021 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-21 10:38:20,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-21 10:38:20,042 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-21 10:38:20,511 INFO L134 CoverageAnalysis]: Checked inductivity of 703 backedges. 0 proven. 703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-21 10:38:20,511 INFO L314 TraceCheckSpWp]: Computing backward predicates... Received shutdown request... [2018-01-21 10:38:21,091 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-21 10:38:21,091 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 10:38:21,093 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-21 10:38:21,093 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-21 10:38:21,093 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-21 10:38:21,093 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-21 10:38:21,094 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-21 10:38:21,094 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-21 10:38:21,094 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-21 10:38:21,094 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == mainErr0EnsuresViolation======== [2018-01-21 10:38:21,094 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-21 10:38:21,094 INFO L276 IsEmpty]: Start isEmpty. Operand 21 states. [2018-01-21 10:38:21,094 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-21 10:38:21,095 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 21.01 10:38:21 BoogieIcfgContainer [2018-01-21 10:38:21,095 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-21 10:38:21,096 INFO L168 Benchmark]: Toolchain (without parser) took 56104.15 ms. Allocated memory was 306.7 MB in the beginning and 812.1 MB in the end (delta: 505.4 MB). Free memory was 266.0 MB in the beginning and 723.2 MB in the end (delta: -457.2 MB). Peak memory consumption was 48.2 MB. Max. memory is 5.3 GB. [2018-01-21 10:38:21,096 INFO L168 Benchmark]: CDTParser took 0.25 ms. Allocated memory is still 306.7 MB. Free memory is still 271.0 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-21 10:38:21,097 INFO L168 Benchmark]: CACSL2BoogieTranslator took 184.40 ms. Allocated memory is still 306.7 MB. Free memory was 265.0 MB in the beginning and 257.9 MB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 5.3 GB. [2018-01-21 10:38:21,097 INFO L168 Benchmark]: Boogie Preprocessor took 27.91 ms. Allocated memory is still 306.7 MB. Free memory was 257.9 MB in the beginning and 255.9 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-21 10:38:21,097 INFO L168 Benchmark]: RCFGBuilder took 192.62 ms. Allocated memory is still 306.7 MB. Free memory was 255.9 MB in the beginning and 244.3 MB in the end (delta: 11.6 MB). Peak memory consumption was 11.6 MB. Max. memory is 5.3 GB. [2018-01-21 10:38:21,098 INFO L168 Benchmark]: TraceAbstraction took 55691.49 ms. Allocated memory was 306.7 MB in the beginning and 812.1 MB in the end (delta: 505.4 MB). Free memory was 244.3 MB in the beginning and 723.2 MB in the end (delta: -479.0 MB). Peak memory consumption was 26.5 MB. Max. memory is 5.3 GB. [2018-01-21 10:38:21,099 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.25 ms. Allocated memory is still 306.7 MB. Free memory is still 271.0 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 184.40 ms. Allocated memory is still 306.7 MB. Free memory was 265.0 MB in the beginning and 257.9 MB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 27.91 ms. Allocated memory is still 306.7 MB. Free memory was 257.9 MB in the beginning and 255.9 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 192.62 ms. Allocated memory is still 306.7 MB. Free memory was 255.9 MB in the beginning and 244.3 MB in the end (delta: 11.6 MB). Peak memory consumption was 11.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 55691.49 ms. Allocated memory was 306.7 MB in the beginning and 812.1 MB in the end (delta: 505.4 MB). Free memory was 244.3 MB in the beginning and 723.2 MB in the end (delta: -479.0 MB). Peak memory consumption was 26.5 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 17 LocStat_MAX_WEQGRAPH_SIZE : 2 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 102 LocStat_NO_SUPPORTING_DISEQUALITIES : 23 LocStat_NO_DISJUNCTIONS : -34 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 24 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 33 TransStat_NO_SUPPORTING_DISEQUALITIES : 5 TransStat_NO_DISJUNCTIONS : 24 TransStat_MAX_NO_DISJUNCTIONS : 1 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.355010 RENAME_VARIABLES(MILLISECONDS) : 0.155740 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.299444 PROJECTAWAY(MILLISECONDS) : 0.116813 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.233468 DISJOIN(MILLISECONDS) : 0.000000 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.194361 ADD_EQUALITY(MILLISECONDS) : 0.073567 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.015472 #CONJOIN_DISJUNCTIVE : 32 #RENAME_VARIABLES : 62 #UNFREEZE : 0 #CONJOIN : 62 #PROJECTAWAY : 64 #ADD_WEAK_EQUALITY : 4 #DISJOIN : 0 #RENAME_VARIABLES_DISJUNCTIVE : 62 #ADD_EQUALITY : 33 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - CounterExampleResult [Line: 1]: not all allocated memory was freed not all allocated memory was freed We found a FailurePath: - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.initErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. UNSAFE Result, 0.1s OverallTime, 1 OverallIterations, 1 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.0s SatisfiabilityAnalysisTime, 0.0s InterpolantComputationTime, 3 NumberOfCodeBlocks, 3 NumberOfCodeBlocksAsserted, 1 NumberOfCheckSat, 0 ConstructedInterpolants, 0 QuantifiedInterpolants, 0 SizeOfPredicates, 0 NumberOfNonLiveVariables, 0 ConjunctsInSsa, 0 ConjunctsInUnsatCore, 0 InterpolantComputations, 0 PerfectInterpolantSequences, 0/0 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1). Cancelled while BasicCegarLoop was analyzing trace of length 55 with TraceHistMax 37, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 89 known predicates. - StatisticsResult: Ultimate Automizer benchmark data for error location: ULTIMATE.startErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 55.4s OverallTime, 38 OverallIterations, 37 TraceHistogramMax, 2.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 595 SDtfs, 117 SDslu, 12907 SDs, 0 SdLazy, 2847 SolverSat, 135 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 1.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 5891 GetRequests, 3566 SyntacticMatches, 72 SemanticMatches, 2253 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 83344 ImplicationChecksByTransitivity, 33.0s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=55occurred in iteration=37, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.3s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 37 MinimizatonAttempts, 0 StatesRemovedByMinimization, 0 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 3.0s SatisfiabilityAnalysisTime, 46.2s InterpolantComputationTime, 3851 NumberOfCodeBlocks, 3851 NumberOfCodeBlocksAsserted, 499 NumberOfCheckSat, 6226 ConstructedInterpolants, 0 QuantifiedInterpolants, 1009008 SizeOfPredicates, 72 NumberOfNonLiveVariables, 8388 ConjunctsInSsa, 1548 ConjunctsInUnsatCore, 181 InterpolantComputations, 1 PerfectInterpolantSequences, 0/42180 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available - TimeoutResultAtElement [Line: 20]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 20). Cancelled while IsEmpty was searching accepting run (input had 21 states). - StatisticsResult: Ultimate Automizer benchmark data for error location: mainErr0EnsuresViolation CFG has 4 procedures, 21 locations, 3 error locations. TIMEOUT Result, 0.0s OverallTime, 0 OverallIterations, 0 TraceHistogramMax, 0.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: No data available, PredicateUnifierStatistics: No data available, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=21occurred in iteration=0, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: No data available, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate proved your program to be incorrect! Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-21_10-38-21-108.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-21_10-38-21-108.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-21_10-38-21-108.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-21_10-38-21-108.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-1-2018-01-21_10-38-21-108.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memsetNonZero2_true-valid-memsafety_true-termination.c_mempurity-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-2-2018-01-21_10-38-21-108.csv Completed graceful shutdown