java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test12_false-valid-free.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-24 12:19:04,409 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-24 12:19:04,411 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-24 12:19:04,425 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-24 12:19:04,425 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-24 12:19:04,426 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-24 12:19:04,427 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-24 12:19:04,429 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-24 12:19:04,431 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-24 12:19:04,432 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-24 12:19:04,433 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-24 12:19:04,433 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-24 12:19:04,434 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-24 12:19:04,435 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-24 12:19:04,436 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-24 12:19:04,439 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-24 12:19:04,441 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-24 12:19:04,443 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-24 12:19:04,444 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-24 12:19:04,445 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-24 12:19:04,448 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-24 12:19:04,448 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-24 12:19:04,448 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-24 12:19:04,449 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-24 12:19:04,450 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-24 12:19:04,451 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-24 12:19:04,451 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-24 12:19:04,452 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-24 12:19:04,452 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-24 12:19:04,452 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-24 12:19:04,453 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-24 12:19:04,453 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ.epf [2018-01-24 12:19:04,461 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-24 12:19:04,462 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-24 12:19:04,462 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-24 12:19:04,462 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-24 12:19:04,463 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-24 12:19:04,463 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-24 12:19:04,463 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-24 12:19:04,463 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-24 12:19:04,463 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-24 12:19:04,463 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-24 12:19:04,464 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-24 12:19:04,464 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-24 12:19:04,464 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-24 12:19:04,464 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-24 12:19:04,464 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-24 12:19:04,464 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-24 12:19:04,464 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-24 12:19:04,465 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-24 12:19:04,465 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-24 12:19:04,465 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-24 12:19:04,465 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-24 12:19:04,465 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-24 12:19:04,465 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-24 12:19:04,466 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 12:19:04,466 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-24 12:19:04,466 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-24 12:19:04,466 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-24 12:19:04,466 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-24 12:19:04,466 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-01-24 12:19:04,467 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-24 12:19:04,467 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-24 12:19:04,467 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-24 12:19:04,467 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-24 12:19:04,468 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-24 12:19:04,501 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-24 12:19:04,512 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-24 12:19:04,515 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-24 12:19:04,516 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-24 12:19:04,517 INFO L276 PluginConnector]: CDTParser initialized [2018-01-24 12:19:04,517 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test12_false-valid-free.i [2018-01-24 12:19:04,716 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-24 12:19:04,723 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-24 12:19:04,724 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-24 12:19:04,724 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-24 12:19:04,731 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-24 12:19:04,733 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 12:19:04" (1/1) ... [2018-01-24 12:19:04,736 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@17e88f8c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:19:04, skipping insertion in model container [2018-01-24 12:19:04,736 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 12:19:04" (1/1) ... [2018-01-24 12:19:04,754 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 12:19:04,808 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 12:19:04,963 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 12:19:05,003 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 12:19:05,019 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:19:05 WrapperNode [2018-01-24 12:19:05,019 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-24 12:19:05,020 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-24 12:19:05,020 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-24 12:19:05,021 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-24 12:19:05,037 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:19:05" (1/1) ... [2018-01-24 12:19:05,037 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:19:05" (1/1) ... [2018-01-24 12:19:05,056 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:19:05" (1/1) ... [2018-01-24 12:19:05,057 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:19:05" (1/1) ... [2018-01-24 12:19:05,073 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:19:05" (1/1) ... [2018-01-24 12:19:05,078 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:19:05" (1/1) ... [2018-01-24 12:19:05,083 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:19:05" (1/1) ... [2018-01-24 12:19:05,088 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-24 12:19:05,089 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-24 12:19:05,089 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-24 12:19:05,089 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-24 12:19:05,090 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:19:05" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 12:19:05,139 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-24 12:19:05,139 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-24 12:19:05,139 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~X~$Pointer$~X~int~TO~int [2018-01-24 12:19:05,140 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-01-24 12:19:05,140 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-01-24 12:19:05,140 INFO L136 BoogieDeclarations]: Found implementation of procedure __ldv_list_add [2018-01-24 12:19:05,140 INFO L136 BoogieDeclarations]: Found implementation of procedure __ldv_list_del [2018-01-24 12:19:05,140 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_list_add [2018-01-24 12:19:05,140 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_list_del [2018-01-24 12:19:05,140 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_msg_alloc [2018-01-24 12:19:05,140 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_msg_fill [2018-01-24 12:19:05,140 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_msg_free [2018-01-24 12:19:05,141 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_submit_msg [2018-01-24 12:19:05,141 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_destroy_msgs [2018-01-24 12:19:05,141 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_dev_get_drvdata [2018-01-24 12:19:05,141 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_dev_set_drvdata [2018-01-24 12:19:05,141 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-01-24 12:19:05,141 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-01-24 12:19:05,142 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_i2c_get_clientdata [2018-01-24 12:19:05,142 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_i2c_set_clientdata [2018-01-24 12:19:05,142 INFO L136 BoogieDeclarations]: Found implementation of procedure master_xfer [2018-01-24 12:19:05,142 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_i2c_transfer [2018-01-24 12:19:05,142 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_m88ts2022_rd_reg [2018-01-24 12:19:05,142 INFO L136 BoogieDeclarations]: Found implementation of procedure alloc_12 [2018-01-24 12:19:05,143 INFO L136 BoogieDeclarations]: Found implementation of procedure free_12 [2018-01-24 12:19:05,143 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-01-24 12:19:05,143 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-24 12:19:05,143 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-24 12:19:05,143 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-24 12:19:05,143 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-24 12:19:05,144 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-24 12:19:05,144 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-24 12:19:05,144 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-24 12:19:05,144 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-24 12:19:05,144 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memcpy [2018-01-24 12:19:05,144 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memcpy [2018-01-24 12:19:05,144 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-24 12:19:05,144 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-24 12:19:05,144 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-24 12:19:05,145 INFO L128 BoogieDeclarations]: Found specification of procedure memcpy [2018-01-24 12:19:05,145 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-01-24 12:19:05,145 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-01-24 12:19:05,145 INFO L128 BoogieDeclarations]: Found specification of procedure __ldv_list_add [2018-01-24 12:19:05,145 INFO L128 BoogieDeclarations]: Found specification of procedure __ldv_list_del [2018-01-24 12:19:05,145 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_list_add [2018-01-24 12:19:05,145 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_list_del [2018-01-24 12:19:05,145 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_msg_alloc [2018-01-24 12:19:05,145 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_msg_fill [2018-01-24 12:19:05,146 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_msg_free [2018-01-24 12:19:05,146 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_submit_msg [2018-01-24 12:19:05,146 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_destroy_msgs [2018-01-24 12:19:05,146 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_dev_get_drvdata [2018-01-24 12:19:05,146 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_dev_set_drvdata [2018-01-24 12:19:05,146 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-01-24 12:19:05,146 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-01-24 12:19:05,147 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_i2c_get_clientdata [2018-01-24 12:19:05,147 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_i2c_set_clientdata [2018-01-24 12:19:05,147 INFO L128 BoogieDeclarations]: Found specification of procedure master_xfer [2018-01-24 12:19:05,147 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_i2c_transfer [2018-01-24 12:19:05,147 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~X~$Pointer$~X~int~TO~int [2018-01-24 12:19:05,147 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_m88ts2022_rd_reg [2018-01-24 12:19:05,147 INFO L128 BoogieDeclarations]: Found specification of procedure alloc_12 [2018-01-24 12:19:05,147 INFO L128 BoogieDeclarations]: Found specification of procedure free_12 [2018-01-24 12:19:05,148 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-01-24 12:19:05,148 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-24 12:19:05,148 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-24 12:19:05,148 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-24 12:19:06,119 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-01-24 12:19:06,233 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-24 12:19:06,234 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 12:19:06 BoogieIcfgContainer [2018-01-24 12:19:06,234 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-24 12:19:06,235 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-24 12:19:06,235 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-24 12:19:06,238 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-24 12:19:06,238 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.01 12:19:04" (1/3) ... [2018-01-24 12:19:06,239 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4f01cc5a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 12:19:06, skipping insertion in model container [2018-01-24 12:19:06,239 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:19:05" (2/3) ... [2018-01-24 12:19:06,240 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4f01cc5a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 12:19:06, skipping insertion in model container [2018-01-24 12:19:06,240 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 12:19:06" (3/3) ... [2018-01-24 12:19:06,242 INFO L105 eAbstractionObserver]: Analyzing ICFG memleaks_test12_false-valid-free.i [2018-01-24 12:19:06,251 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-24 12:19:06,262 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 141 error locations. [2018-01-24 12:19:06,318 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-24 12:19:06,318 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-24 12:19:06,318 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-24 12:19:06,319 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-24 12:19:06,319 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-24 12:19:06,319 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-24 12:19:06,319 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-24 12:19:06,319 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-24 12:19:06,320 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-24 12:19:06,347 INFO L276 IsEmpty]: Start isEmpty. Operand 398 states. [2018-01-24 12:19:06,350 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2018-01-24 12:19:06,350 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:19:06,351 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1] [2018-01-24 12:19:06,352 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, alloc_12Err2RequiresViolation, alloc_12Err13RequiresViolation, alloc_12Err14RequiresViolation, alloc_12Err6RequiresViolation, alloc_12Err7RequiresViolation, alloc_12Err4RequiresViolation, alloc_12Err11RequiresViolation, alloc_12Err0RequiresViolation, alloc_12Err9RequiresViolation, alloc_12Err5RequiresViolation, alloc_12Err15RequiresViolation, alloc_12Err1RequiresViolation, alloc_12Err10RequiresViolation, alloc_12Err8RequiresViolation, alloc_12Err3RequiresViolation, alloc_12Err12RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]=== [2018-01-24 12:19:06,357 INFO L82 PathProgramCache]: Analyzing trace with hash 18685926, now seen corresponding path program 1 times [2018-01-24 12:19:06,360 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:19:06,360 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:19:06,426 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:06,426 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:19:06,426 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:06,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:19:06,570 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:19:06,619 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:19:06,621 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:19:06,622 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 12:19:06,623 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 12:19:06,633 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 12:19:06,633 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 12:19:06,635 INFO L87 Difference]: Start difference. First operand 398 states. Second operand 3 states. [2018-01-24 12:19:07,066 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:19:07,066 INFO L93 Difference]: Finished difference Result 668 states and 724 transitions. [2018-01-24 12:19:07,067 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 12:19:07,068 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 4 [2018-01-24 12:19:07,069 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:19:07,090 INFO L225 Difference]: With dead ends: 668 [2018-01-24 12:19:07,091 INFO L226 Difference]: Without dead ends: 481 [2018-01-24 12:19:07,096 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 12:19:07,116 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 481 states. [2018-01-24 12:19:07,167 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 481 to 436. [2018-01-24 12:19:07,168 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 436 states. [2018-01-24 12:19:07,171 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 436 states to 436 states and 491 transitions. [2018-01-24 12:19:07,172 INFO L78 Accepts]: Start accepts. Automaton has 436 states and 491 transitions. Word has length 4 [2018-01-24 12:19:07,172 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:19:07,172 INFO L432 AbstractCegarLoop]: Abstraction has 436 states and 491 transitions. [2018-01-24 12:19:07,172 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 12:19:07,173 INFO L276 IsEmpty]: Start isEmpty. Operand 436 states and 491 transitions. [2018-01-24 12:19:07,173 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 5 [2018-01-24 12:19:07,173 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:19:07,173 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1] [2018-01-24 12:19:07,174 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, alloc_12Err2RequiresViolation, alloc_12Err13RequiresViolation, alloc_12Err14RequiresViolation, alloc_12Err6RequiresViolation, alloc_12Err7RequiresViolation, alloc_12Err4RequiresViolation, alloc_12Err11RequiresViolation, alloc_12Err0RequiresViolation, alloc_12Err9RequiresViolation, alloc_12Err5RequiresViolation, alloc_12Err15RequiresViolation, alloc_12Err1RequiresViolation, alloc_12Err10RequiresViolation, alloc_12Err8RequiresViolation, alloc_12Err3RequiresViolation, alloc_12Err12RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]=== [2018-01-24 12:19:07,174 INFO L82 PathProgramCache]: Analyzing trace with hash 18685927, now seen corresponding path program 1 times [2018-01-24 12:19:07,174 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:19:07,174 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:19:07,176 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:07,176 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:19:07,176 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:07,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:19:07,188 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:19:07,225 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:19:07,225 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:19:07,225 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 12:19:07,226 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 12:19:07,227 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 12:19:07,227 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 12:19:07,227 INFO L87 Difference]: Start difference. First operand 436 states and 491 transitions. Second operand 3 states. [2018-01-24 12:19:07,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:19:07,457 INFO L93 Difference]: Finished difference Result 570 states and 656 transitions. [2018-01-24 12:19:07,457 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 12:19:07,457 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 4 [2018-01-24 12:19:07,457 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:19:07,461 INFO L225 Difference]: With dead ends: 570 [2018-01-24 12:19:07,461 INFO L226 Difference]: Without dead ends: 567 [2018-01-24 12:19:07,462 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 12:19:07,463 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 567 states. [2018-01-24 12:19:07,490 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 567 to 497. [2018-01-24 12:19:07,490 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 497 states. [2018-01-24 12:19:07,493 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 497 states to 497 states and 602 transitions. [2018-01-24 12:19:07,494 INFO L78 Accepts]: Start accepts. Automaton has 497 states and 602 transitions. Word has length 4 [2018-01-24 12:19:07,494 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:19:07,494 INFO L432 AbstractCegarLoop]: Abstraction has 497 states and 602 transitions. [2018-01-24 12:19:07,494 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 12:19:07,494 INFO L276 IsEmpty]: Start isEmpty. Operand 497 states and 602 transitions. [2018-01-24 12:19:07,495 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-24 12:19:07,495 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:19:07,495 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:19:07,495 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, alloc_12Err2RequiresViolation, alloc_12Err13RequiresViolation, alloc_12Err14RequiresViolation, alloc_12Err6RequiresViolation, alloc_12Err7RequiresViolation, alloc_12Err4RequiresViolation, alloc_12Err11RequiresViolation, alloc_12Err0RequiresViolation, alloc_12Err9RequiresViolation, alloc_12Err5RequiresViolation, alloc_12Err15RequiresViolation, alloc_12Err1RequiresViolation, alloc_12Err10RequiresViolation, alloc_12Err8RequiresViolation, alloc_12Err3RequiresViolation, alloc_12Err12RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]=== [2018-01-24 12:19:07,495 INFO L82 PathProgramCache]: Analyzing trace with hash -2098584656, now seen corresponding path program 1 times [2018-01-24 12:19:07,495 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:19:07,495 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:19:07,497 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:07,497 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:19:07,497 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:07,525 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:19:07,526 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:19:07,585 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:19:07,585 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:19:07,585 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 12:19:07,585 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 12:19:07,586 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 12:19:07,586 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:19:07,586 INFO L87 Difference]: Start difference. First operand 497 states and 602 transitions. Second operand 6 states. [2018-01-24 12:19:07,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:19:07,710 INFO L93 Difference]: Finished difference Result 624 states and 762 transitions. [2018-01-24 12:19:07,710 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 12:19:07,711 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 21 [2018-01-24 12:19:07,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:19:07,715 INFO L225 Difference]: With dead ends: 624 [2018-01-24 12:19:07,715 INFO L226 Difference]: Without dead ends: 543 [2018-01-24 12:19:07,717 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:19:07,718 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 543 states. [2018-01-24 12:19:07,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 543 to 496. [2018-01-24 12:19:07,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 496 states. [2018-01-24 12:19:07,750 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 496 states to 496 states and 604 transitions. [2018-01-24 12:19:07,750 INFO L78 Accepts]: Start accepts. Automaton has 496 states and 604 transitions. Word has length 21 [2018-01-24 12:19:07,751 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:19:07,751 INFO L432 AbstractCegarLoop]: Abstraction has 496 states and 604 transitions. [2018-01-24 12:19:07,751 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 12:19:07,751 INFO L276 IsEmpty]: Start isEmpty. Operand 496 states and 604 transitions. [2018-01-24 12:19:07,752 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-24 12:19:07,752 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:19:07,752 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:19:07,752 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, alloc_12Err2RequiresViolation, alloc_12Err13RequiresViolation, alloc_12Err14RequiresViolation, alloc_12Err6RequiresViolation, alloc_12Err7RequiresViolation, alloc_12Err4RequiresViolation, alloc_12Err11RequiresViolation, alloc_12Err0RequiresViolation, alloc_12Err9RequiresViolation, alloc_12Err5RequiresViolation, alloc_12Err15RequiresViolation, alloc_12Err1RequiresViolation, alloc_12Err10RequiresViolation, alloc_12Err8RequiresViolation, alloc_12Err3RequiresViolation, alloc_12Err12RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]=== [2018-01-24 12:19:07,753 INFO L82 PathProgramCache]: Analyzing trace with hash -1744465714, now seen corresponding path program 1 times [2018-01-24 12:19:07,753 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:19:07,753 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:19:07,755 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:07,755 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:19:07,755 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:07,781 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:19:07,782 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:19:07,891 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:19:07,891 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:19:07,891 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 12:19:07,892 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 12:19:07,892 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 12:19:07,892 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:19:07,892 INFO L87 Difference]: Start difference. First operand 496 states and 604 transitions. Second operand 5 states. [2018-01-24 12:19:08,452 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:19:08,452 INFO L93 Difference]: Finished difference Result 572 states and 705 transitions. [2018-01-24 12:19:08,453 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 12:19:08,453 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 21 [2018-01-24 12:19:08,453 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:19:08,457 INFO L225 Difference]: With dead ends: 572 [2018-01-24 12:19:08,457 INFO L226 Difference]: Without dead ends: 571 [2018-01-24 12:19:08,458 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 4 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:19:08,458 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 571 states. [2018-01-24 12:19:08,487 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 571 to 538. [2018-01-24 12:19:08,488 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 538 states. [2018-01-24 12:19:08,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 538 states to 538 states and 661 transitions. [2018-01-24 12:19:08,493 INFO L78 Accepts]: Start accepts. Automaton has 538 states and 661 transitions. Word has length 21 [2018-01-24 12:19:08,493 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:19:08,493 INFO L432 AbstractCegarLoop]: Abstraction has 538 states and 661 transitions. [2018-01-24 12:19:08,493 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 12:19:08,493 INFO L276 IsEmpty]: Start isEmpty. Operand 538 states and 661 transitions. [2018-01-24 12:19:08,494 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-24 12:19:08,494 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:19:08,494 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:19:08,495 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, alloc_12Err2RequiresViolation, alloc_12Err13RequiresViolation, alloc_12Err14RequiresViolation, alloc_12Err6RequiresViolation, alloc_12Err7RequiresViolation, alloc_12Err4RequiresViolation, alloc_12Err11RequiresViolation, alloc_12Err0RequiresViolation, alloc_12Err9RequiresViolation, alloc_12Err5RequiresViolation, alloc_12Err15RequiresViolation, alloc_12Err1RequiresViolation, alloc_12Err10RequiresViolation, alloc_12Err8RequiresViolation, alloc_12Err3RequiresViolation, alloc_12Err12RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]=== [2018-01-24 12:19:08,495 INFO L82 PathProgramCache]: Analyzing trace with hash -1744465713, now seen corresponding path program 1 times [2018-01-24 12:19:08,495 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:19:08,495 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:19:08,497 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:08,497 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:19:08,497 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:08,515 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:19:08,516 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:19:08,667 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:19:08,667 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:19:08,667 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 12:19:08,668 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 12:19:08,668 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 12:19:08,668 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:19:08,668 INFO L87 Difference]: Start difference. First operand 538 states and 661 transitions. Second operand 7 states. [2018-01-24 12:19:09,988 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:19:09,988 INFO L93 Difference]: Finished difference Result 669 states and 772 transitions. [2018-01-24 12:19:09,989 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 12:19:09,989 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 21 [2018-01-24 12:19:09,989 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:19:09,993 INFO L225 Difference]: With dead ends: 669 [2018-01-24 12:19:09,993 INFO L226 Difference]: Without dead ends: 668 [2018-01-24 12:19:09,993 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 5 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=51, Invalid=105, Unknown=0, NotChecked=0, Total=156 [2018-01-24 12:19:09,994 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 668 states. [2018-01-24 12:19:10,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 668 to 538. [2018-01-24 12:19:10,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 538 states. [2018-01-24 12:19:10,033 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 538 states to 538 states and 660 transitions. [2018-01-24 12:19:10,033 INFO L78 Accepts]: Start accepts. Automaton has 538 states and 660 transitions. Word has length 21 [2018-01-24 12:19:10,034 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:19:10,034 INFO L432 AbstractCegarLoop]: Abstraction has 538 states and 660 transitions. [2018-01-24 12:19:10,034 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 12:19:10,034 INFO L276 IsEmpty]: Start isEmpty. Operand 538 states and 660 transitions. [2018-01-24 12:19:10,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-24 12:19:10,035 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:19:10,036 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:19:10,036 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, alloc_12Err2RequiresViolation, alloc_12Err13RequiresViolation, alloc_12Err14RequiresViolation, alloc_12Err6RequiresViolation, alloc_12Err7RequiresViolation, alloc_12Err4RequiresViolation, alloc_12Err11RequiresViolation, alloc_12Err0RequiresViolation, alloc_12Err9RequiresViolation, alloc_12Err5RequiresViolation, alloc_12Err15RequiresViolation, alloc_12Err1RequiresViolation, alloc_12Err10RequiresViolation, alloc_12Err8RequiresViolation, alloc_12Err3RequiresViolation, alloc_12Err12RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]=== [2018-01-24 12:19:10,036 INFO L82 PathProgramCache]: Analyzing trace with hash -1603523080, now seen corresponding path program 1 times [2018-01-24 12:19:10,036 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:19:10,036 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:19:10,038 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:10,038 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:19:10,038 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:10,052 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:19:10,053 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:19:10,132 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 12:19:10,133 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:19:10,133 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:19:10,150 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:19:10,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:19:10,200 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:19:10,248 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 12:19:10,286 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:19:10,287 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 4] total 8 [2018-01-24 12:19:10,287 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 12:19:10,287 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 12:19:10,287 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-01-24 12:19:10,288 INFO L87 Difference]: Start difference. First operand 538 states and 660 transitions. Second operand 8 states. [2018-01-24 12:19:10,388 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:19:10,388 INFO L93 Difference]: Finished difference Result 1019 states and 1220 transitions. [2018-01-24 12:19:10,389 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 12:19:10,389 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 24 [2018-01-24 12:19:10,389 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:19:10,391 INFO L225 Difference]: With dead ends: 1019 [2018-01-24 12:19:10,392 INFO L226 Difference]: Without dead ends: 503 [2018-01-24 12:19:10,395 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-01-24 12:19:10,396 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 503 states. [2018-01-24 12:19:10,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 503 to 495. [2018-01-24 12:19:10,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 495 states. [2018-01-24 12:19:10,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 495 states to 495 states and 574 transitions. [2018-01-24 12:19:10,422 INFO L78 Accepts]: Start accepts. Automaton has 495 states and 574 transitions. Word has length 24 [2018-01-24 12:19:10,422 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:19:10,422 INFO L432 AbstractCegarLoop]: Abstraction has 495 states and 574 transitions. [2018-01-24 12:19:10,422 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 12:19:10,422 INFO L276 IsEmpty]: Start isEmpty. Operand 495 states and 574 transitions. [2018-01-24 12:19:10,423 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-24 12:19:10,423 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:19:10,423 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:19:10,423 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, alloc_12Err2RequiresViolation, alloc_12Err13RequiresViolation, alloc_12Err14RequiresViolation, alloc_12Err6RequiresViolation, alloc_12Err7RequiresViolation, alloc_12Err4RequiresViolation, alloc_12Err11RequiresViolation, alloc_12Err0RequiresViolation, alloc_12Err9RequiresViolation, alloc_12Err5RequiresViolation, alloc_12Err15RequiresViolation, alloc_12Err1RequiresViolation, alloc_12Err10RequiresViolation, alloc_12Err8RequiresViolation, alloc_12Err3RequiresViolation, alloc_12Err12RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]=== [2018-01-24 12:19:10,423 INFO L82 PathProgramCache]: Analyzing trace with hash 1679705302, now seen corresponding path program 1 times [2018-01-24 12:19:10,423 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:19:10,423 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:19:10,425 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:10,425 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:19:10,425 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:10,437 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:19:10,439 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:19:10,508 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 12:19:10,508 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:19:10,508 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:19:10,523 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:19:10,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:19:10,556 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:19:10,640 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 12:19:10,662 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:19:10,662 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2018-01-24 12:19:10,662 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 12:19:10,663 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 12:19:10,663 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:19:10,663 INFO L87 Difference]: Start difference. First operand 495 states and 574 transitions. Second operand 6 states. [2018-01-24 12:19:10,805 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:19:10,805 INFO L93 Difference]: Finished difference Result 497 states and 581 transitions. [2018-01-24 12:19:10,806 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 12:19:10,807 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 26 [2018-01-24 12:19:10,807 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:19:10,809 INFO L225 Difference]: With dead ends: 497 [2018-01-24 12:19:10,809 INFO L226 Difference]: Without dead ends: 496 [2018-01-24 12:19:10,810 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 23 SyntacticMatches, 4 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:19:10,810 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 496 states. [2018-01-24 12:19:10,829 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 496 to 494. [2018-01-24 12:19:10,829 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 494 states. [2018-01-24 12:19:10,831 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 494 states to 494 states and 572 transitions. [2018-01-24 12:19:10,831 INFO L78 Accepts]: Start accepts. Automaton has 494 states and 572 transitions. Word has length 26 [2018-01-24 12:19:10,849 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:19:10,849 INFO L432 AbstractCegarLoop]: Abstraction has 494 states and 572 transitions. [2018-01-24 12:19:10,849 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 12:19:10,849 INFO L276 IsEmpty]: Start isEmpty. Operand 494 states and 572 transitions. [2018-01-24 12:19:10,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-24 12:19:10,850 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:19:10,850 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:19:10,850 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, alloc_12Err2RequiresViolation, alloc_12Err13RequiresViolation, alloc_12Err14RequiresViolation, alloc_12Err6RequiresViolation, alloc_12Err7RequiresViolation, alloc_12Err4RequiresViolation, alloc_12Err11RequiresViolation, alloc_12Err0RequiresViolation, alloc_12Err9RequiresViolation, alloc_12Err5RequiresViolation, alloc_12Err15RequiresViolation, alloc_12Err1RequiresViolation, alloc_12Err10RequiresViolation, alloc_12Err8RequiresViolation, alloc_12Err3RequiresViolation, alloc_12Err12RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]=== [2018-01-24 12:19:10,851 INFO L82 PathProgramCache]: Analyzing trace with hash 1679705303, now seen corresponding path program 1 times [2018-01-24 12:19:10,851 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:19:10,851 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:19:10,852 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:10,852 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:19:10,852 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:10,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:19:10,866 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:19:10,996 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:19:10,996 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:19:10,996 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:19:11,016 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:19:11,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:19:11,044 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:19:11,079 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 12:19:11,081 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:19:11,096 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:19:11,097 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-24 12:19:11,192 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:19:11,214 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:19:11,215 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2018-01-24 12:19:11,215 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 12:19:11,215 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 12:19:11,215 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:19:11,215 INFO L87 Difference]: Start difference. First operand 494 states and 572 transitions. Second operand 7 states. [2018-01-24 12:19:12,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:19:12,807 INFO L93 Difference]: Finished difference Result 602 states and 710 transitions. [2018-01-24 12:19:12,807 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 12:19:12,807 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 26 [2018-01-24 12:19:12,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:19:12,812 INFO L225 Difference]: With dead ends: 602 [2018-01-24 12:19:12,812 INFO L226 Difference]: Without dead ends: 592 [2018-01-24 12:19:12,813 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 23 SyntacticMatches, 4 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-01-24 12:19:12,814 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 592 states. [2018-01-24 12:19:12,848 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 592 to 521. [2018-01-24 12:19:12,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 521 states. [2018-01-24 12:19:12,852 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 521 states to 521 states and 620 transitions. [2018-01-24 12:19:12,852 INFO L78 Accepts]: Start accepts. Automaton has 521 states and 620 transitions. Word has length 26 [2018-01-24 12:19:12,853 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:19:12,853 INFO L432 AbstractCegarLoop]: Abstraction has 521 states and 620 transitions. [2018-01-24 12:19:12,853 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 12:19:12,853 INFO L276 IsEmpty]: Start isEmpty. Operand 521 states and 620 transitions. [2018-01-24 12:19:12,854 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-24 12:19:12,854 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:19:12,854 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:19:12,854 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, alloc_12Err2RequiresViolation, alloc_12Err13RequiresViolation, alloc_12Err14RequiresViolation, alloc_12Err6RequiresViolation, alloc_12Err7RequiresViolation, alloc_12Err4RequiresViolation, alloc_12Err11RequiresViolation, alloc_12Err0RequiresViolation, alloc_12Err9RequiresViolation, alloc_12Err5RequiresViolation, alloc_12Err15RequiresViolation, alloc_12Err1RequiresViolation, alloc_12Err10RequiresViolation, alloc_12Err8RequiresViolation, alloc_12Err3RequiresViolation, alloc_12Err12RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]=== [2018-01-24 12:19:12,855 INFO L82 PathProgramCache]: Analyzing trace with hash 1679705304, now seen corresponding path program 1 times [2018-01-24 12:19:12,855 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:19:12,855 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:19:12,856 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:12,856 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:19:12,857 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:12,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:19:12,869 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:19:12,931 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 12:19:12,931 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:19:12,931 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 12:19:12,932 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 12:19:12,932 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 12:19:12,932 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:19:12,932 INFO L87 Difference]: Start difference. First operand 521 states and 620 transitions. Second operand 5 states. [2018-01-24 12:19:13,012 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:19:13,012 INFO L93 Difference]: Finished difference Result 955 states and 1116 transitions. [2018-01-24 12:19:13,013 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 12:19:13,013 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2018-01-24 12:19:13,014 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:19:13,016 INFO L225 Difference]: With dead ends: 955 [2018-01-24 12:19:13,016 INFO L226 Difference]: Without dead ends: 523 [2018-01-24 12:19:13,018 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:19:13,019 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 523 states. [2018-01-24 12:19:13,050 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 523 to 520. [2018-01-24 12:19:13,050 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 520 states. [2018-01-24 12:19:13,053 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 520 states to 520 states and 617 transitions. [2018-01-24 12:19:13,054 INFO L78 Accepts]: Start accepts. Automaton has 520 states and 617 transitions. Word has length 26 [2018-01-24 12:19:13,054 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:19:13,054 INFO L432 AbstractCegarLoop]: Abstraction has 520 states and 617 transitions. [2018-01-24 12:19:13,054 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 12:19:13,054 INFO L276 IsEmpty]: Start isEmpty. Operand 520 states and 617 transitions. [2018-01-24 12:19:13,055 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-24 12:19:13,055 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:19:13,055 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:19:13,055 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, alloc_12Err2RequiresViolation, alloc_12Err13RequiresViolation, alloc_12Err14RequiresViolation, alloc_12Err6RequiresViolation, alloc_12Err7RequiresViolation, alloc_12Err4RequiresViolation, alloc_12Err11RequiresViolation, alloc_12Err0RequiresViolation, alloc_12Err9RequiresViolation, alloc_12Err5RequiresViolation, alloc_12Err15RequiresViolation, alloc_12Err1RequiresViolation, alloc_12Err10RequiresViolation, alloc_12Err8RequiresViolation, alloc_12Err3RequiresViolation, alloc_12Err12RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]=== [2018-01-24 12:19:13,055 INFO L82 PathProgramCache]: Analyzing trace with hash -1000460798, now seen corresponding path program 1 times [2018-01-24 12:19:13,056 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:19:13,056 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:19:13,057 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:13,057 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:19:13,057 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:13,071 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:19:13,072 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:19:13,108 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:19:13,108 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:19:13,108 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 12:19:13,109 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 12:19:13,109 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 12:19:13,109 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:19:13,109 INFO L87 Difference]: Start difference. First operand 520 states and 617 transitions. Second operand 5 states. [2018-01-24 12:19:13,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:19:13,709 INFO L93 Difference]: Finished difference Result 543 states and 651 transitions. [2018-01-24 12:19:13,710 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 12:19:13,710 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 27 [2018-01-24 12:19:13,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:19:13,713 INFO L225 Difference]: With dead ends: 543 [2018-01-24 12:19:13,713 INFO L226 Difference]: Without dead ends: 541 [2018-01-24 12:19:13,713 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:19:13,714 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 541 states. [2018-01-24 12:19:13,750 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 541 to 537. [2018-01-24 12:19:13,751 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 537 states. [2018-01-24 12:19:13,754 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 537 states to 537 states and 638 transitions. [2018-01-24 12:19:13,755 INFO L78 Accepts]: Start accepts. Automaton has 537 states and 638 transitions. Word has length 27 [2018-01-24 12:19:13,755 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:19:13,755 INFO L432 AbstractCegarLoop]: Abstraction has 537 states and 638 transitions. [2018-01-24 12:19:13,755 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 12:19:13,755 INFO L276 IsEmpty]: Start isEmpty. Operand 537 states and 638 transitions. [2018-01-24 12:19:13,756 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-24 12:19:13,757 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:19:13,757 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:19:13,757 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, alloc_12Err2RequiresViolation, alloc_12Err13RequiresViolation, alloc_12Err14RequiresViolation, alloc_12Err6RequiresViolation, alloc_12Err7RequiresViolation, alloc_12Err4RequiresViolation, alloc_12Err11RequiresViolation, alloc_12Err0RequiresViolation, alloc_12Err9RequiresViolation, alloc_12Err5RequiresViolation, alloc_12Err15RequiresViolation, alloc_12Err1RequiresViolation, alloc_12Err10RequiresViolation, alloc_12Err8RequiresViolation, alloc_12Err3RequiresViolation, alloc_12Err12RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]=== [2018-01-24 12:19:13,757 INFO L82 PathProgramCache]: Analyzing trace with hash -1000460797, now seen corresponding path program 1 times [2018-01-24 12:19:13,757 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:19:13,757 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:19:13,758 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:13,759 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:19:13,759 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:13,773 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:19:13,774 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:19:14,066 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:19:14,066 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:19:14,066 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-24 12:19:14,067 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 12:19:14,067 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 12:19:14,067 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=40, Unknown=0, NotChecked=0, Total=56 [2018-01-24 12:19:14,067 INFO L87 Difference]: Start difference. First operand 537 states and 638 transitions. Second operand 8 states. [2018-01-24 12:19:14,506 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:19:14,507 INFO L93 Difference]: Finished difference Result 627 states and 738 transitions. [2018-01-24 12:19:14,507 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 12:19:14,507 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 27 [2018-01-24 12:19:14,507 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:19:14,510 INFO L225 Difference]: With dead ends: 627 [2018-01-24 12:19:14,510 INFO L226 Difference]: Without dead ends: 488 [2018-01-24 12:19:14,511 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=40, Invalid=92, Unknown=0, NotChecked=0, Total=132 [2018-01-24 12:19:14,512 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 488 states. [2018-01-24 12:19:14,538 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 488 to 477. [2018-01-24 12:19:14,539 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 477 states. [2018-01-24 12:19:14,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 477 states to 477 states and 550 transitions. [2018-01-24 12:19:14,541 INFO L78 Accepts]: Start accepts. Automaton has 477 states and 550 transitions. Word has length 27 [2018-01-24 12:19:14,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:19:14,542 INFO L432 AbstractCegarLoop]: Abstraction has 477 states and 550 transitions. [2018-01-24 12:19:14,542 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 12:19:14,542 INFO L276 IsEmpty]: Start isEmpty. Operand 477 states and 550 transitions. [2018-01-24 12:19:14,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-24 12:19:14,543 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:19:14,543 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:19:14,543 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, alloc_12Err2RequiresViolation, alloc_12Err13RequiresViolation, alloc_12Err14RequiresViolation, alloc_12Err6RequiresViolation, alloc_12Err7RequiresViolation, alloc_12Err4RequiresViolation, alloc_12Err11RequiresViolation, alloc_12Err0RequiresViolation, alloc_12Err9RequiresViolation, alloc_12Err5RequiresViolation, alloc_12Err15RequiresViolation, alloc_12Err1RequiresViolation, alloc_12Err10RequiresViolation, alloc_12Err8RequiresViolation, alloc_12Err3RequiresViolation, alloc_12Err12RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]=== [2018-01-24 12:19:14,544 INFO L82 PathProgramCache]: Analyzing trace with hash -1378219079, now seen corresponding path program 1 times [2018-01-24 12:19:14,544 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:19:14,544 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:19:14,545 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:14,545 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:19:14,545 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:14,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:19:14,558 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:19:14,607 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 12:19:14,607 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:19:14,607 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 12:19:14,608 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 12:19:14,608 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 12:19:14,608 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:19:14,608 INFO L87 Difference]: Start difference. First operand 477 states and 550 transitions. Second operand 6 states. [2018-01-24 12:19:14,698 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:19:14,698 INFO L93 Difference]: Finished difference Result 497 states and 568 transitions. [2018-01-24 12:19:14,699 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 12:19:14,699 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 28 [2018-01-24 12:19:14,699 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:19:14,702 INFO L225 Difference]: With dead ends: 497 [2018-01-24 12:19:14,702 INFO L226 Difference]: Without dead ends: 478 [2018-01-24 12:19:14,702 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:19:14,703 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 478 states. [2018-01-24 12:19:14,718 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 478 to 476. [2018-01-24 12:19:14,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 476 states. [2018-01-24 12:19:14,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 476 states to 476 states and 547 transitions. [2018-01-24 12:19:14,720 INFO L78 Accepts]: Start accepts. Automaton has 476 states and 547 transitions. Word has length 28 [2018-01-24 12:19:14,721 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:19:14,721 INFO L432 AbstractCegarLoop]: Abstraction has 476 states and 547 transitions. [2018-01-24 12:19:14,721 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 12:19:14,721 INFO L276 IsEmpty]: Start isEmpty. Operand 476 states and 547 transitions. [2018-01-24 12:19:14,721 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-24 12:19:14,721 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:19:14,722 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:19:14,722 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, alloc_12Err2RequiresViolation, alloc_12Err13RequiresViolation, alloc_12Err14RequiresViolation, alloc_12Err6RequiresViolation, alloc_12Err7RequiresViolation, alloc_12Err4RequiresViolation, alloc_12Err11RequiresViolation, alloc_12Err0RequiresViolation, alloc_12Err9RequiresViolation, alloc_12Err5RequiresViolation, alloc_12Err15RequiresViolation, alloc_12Err1RequiresViolation, alloc_12Err10RequiresViolation, alloc_12Err8RequiresViolation, alloc_12Err3RequiresViolation, alloc_12Err12RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]=== [2018-01-24 12:19:14,722 INFO L82 PathProgramCache]: Analyzing trace with hash -1378219079, now seen corresponding path program 1 times [2018-01-24 12:19:14,722 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:19:14,722 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:19:14,723 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:14,724 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:19:14,724 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:14,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:19:14,734 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:19:15,013 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 4 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:19:15,014 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:19:15,014 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:19:15,019 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:19:15,049 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:19:15,052 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:19:15,060 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 12:19:15,061 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:19:15,083 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:19:15,083 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-24 12:19:15,229 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:19:15,230 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:19:15,233 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-01-24 12:19:15,233 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:19:15,261 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 12:19:15,261 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:17, output treesize:15 [2018-01-24 12:19:15,339 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:19:15,360 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:19:15,360 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 10 [2018-01-24 12:19:15,361 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-24 12:19:15,361 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-24 12:19:15,361 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=24, Invalid=86, Unknown=0, NotChecked=0, Total=110 [2018-01-24 12:19:15,361 INFO L87 Difference]: Start difference. First operand 476 states and 547 transitions. Second operand 11 states. [2018-01-24 12:19:16,769 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:19:16,769 INFO L93 Difference]: Finished difference Result 585 states and 683 transitions. [2018-01-24 12:19:16,769 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-24 12:19:16,770 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 28 [2018-01-24 12:19:16,770 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:19:16,772 INFO L225 Difference]: With dead ends: 585 [2018-01-24 12:19:16,772 INFO L226 Difference]: Without dead ends: 582 [2018-01-24 12:19:16,773 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 23 SyntacticMatches, 4 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=48, Invalid=162, Unknown=0, NotChecked=0, Total=210 [2018-01-24 12:19:16,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 582 states. [2018-01-24 12:19:16,795 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 582 to 461. [2018-01-24 12:19:16,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 461 states. [2018-01-24 12:19:16,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 461 states to 461 states and 518 transitions. [2018-01-24 12:19:16,797 INFO L78 Accepts]: Start accepts. Automaton has 461 states and 518 transitions. Word has length 28 [2018-01-24 12:19:16,797 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:19:16,797 INFO L432 AbstractCegarLoop]: Abstraction has 461 states and 518 transitions. [2018-01-24 12:19:16,797 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-24 12:19:16,797 INFO L276 IsEmpty]: Start isEmpty. Operand 461 states and 518 transitions. [2018-01-24 12:19:16,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-24 12:19:16,798 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:19:16,798 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:19:16,798 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, alloc_12Err2RequiresViolation, alloc_12Err13RequiresViolation, alloc_12Err14RequiresViolation, alloc_12Err6RequiresViolation, alloc_12Err7RequiresViolation, alloc_12Err4RequiresViolation, alloc_12Err11RequiresViolation, alloc_12Err0RequiresViolation, alloc_12Err9RequiresViolation, alloc_12Err5RequiresViolation, alloc_12Err15RequiresViolation, alloc_12Err1RequiresViolation, alloc_12Err10RequiresViolation, alloc_12Err8RequiresViolation, alloc_12Err3RequiresViolation, alloc_12Err12RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]=== [2018-01-24 12:19:16,798 INFO L82 PathProgramCache]: Analyzing trace with hash -1378219078, now seen corresponding path program 1 times [2018-01-24 12:19:16,798 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:19:16,798 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:19:16,799 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:16,800 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:19:16,800 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:16,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:19:16,812 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:19:17,037 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:19:17,037 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:19:17,037 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:19:17,046 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:19:17,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:19:17,071 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:19:17,091 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 22 [2018-01-24 12:19:17,092 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:19:17,108 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 25 [2018-01-24 12:19:17,109 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:19:17,110 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 21 [2018-01-24 12:19:17,111 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 12:19:17,134 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 24 [2018-01-24 12:19:17,135 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 12:19:17,155 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-01-24 12:19:17,156 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:50, output treesize:46 [2018-01-24 12:19:17,363 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:19:17,372 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:19:17,373 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 28 [2018-01-24 12:19:17,373 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:19:17,393 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:19:17,394 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 37 [2018-01-24 12:19:17,395 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:19:17,417 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:19:17,419 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 35 [2018-01-24 12:19:17,419 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 12:19:17,439 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:19:17,440 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:19:17,440 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-01-24 12:19:17,441 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 12:19:17,457 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 4 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-01-24 12:19:17,457 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 8 variables, input treesize:67, output treesize:49 [2018-01-24 12:19:17,530 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:19:17,560 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:19:17,560 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 17 [2018-01-24 12:19:17,561 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-24 12:19:17,561 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-24 12:19:17,561 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=44, Invalid=260, Unknown=2, NotChecked=0, Total=306 [2018-01-24 12:19:17,562 INFO L87 Difference]: Start difference. First operand 461 states and 518 transitions. Second operand 18 states. [2018-01-24 12:19:17,860 WARN L146 SmtUtils]: Spent 110ms on a formula simplification. DAG size of input: 67 DAG size of output 64 [2018-01-24 12:19:38,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:19:38,362 INFO L93 Difference]: Finished difference Result 658 states and 766 transitions. [2018-01-24 12:19:38,363 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-24 12:19:38,371 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 28 [2018-01-24 12:19:38,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:19:38,374 INFO L225 Difference]: With dead ends: 658 [2018-01-24 12:19:38,375 INFO L226 Difference]: Without dead ends: 655 [2018-01-24 12:19:38,375 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 45 GetRequests, 22 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 88 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=96, Invalid=500, Unknown=4, NotChecked=0, Total=600 [2018-01-24 12:19:38,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 655 states. [2018-01-24 12:19:38,416 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 655 to 473. [2018-01-24 12:19:38,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 473 states. [2018-01-24 12:19:38,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 473 states to 473 states and 544 transitions. [2018-01-24 12:19:38,420 INFO L78 Accepts]: Start accepts. Automaton has 473 states and 544 transitions. Word has length 28 [2018-01-24 12:19:38,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:19:38,420 INFO L432 AbstractCegarLoop]: Abstraction has 473 states and 544 transitions. [2018-01-24 12:19:38,420 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-24 12:19:38,420 INFO L276 IsEmpty]: Start isEmpty. Operand 473 states and 544 transitions. [2018-01-24 12:19:38,421 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-24 12:19:38,421 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:19:38,421 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:19:38,421 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, alloc_12Err2RequiresViolation, alloc_12Err13RequiresViolation, alloc_12Err14RequiresViolation, alloc_12Err6RequiresViolation, alloc_12Err7RequiresViolation, alloc_12Err4RequiresViolation, alloc_12Err11RequiresViolation, alloc_12Err0RequiresViolation, alloc_12Err9RequiresViolation, alloc_12Err5RequiresViolation, alloc_12Err15RequiresViolation, alloc_12Err1RequiresViolation, alloc_12Err10RequiresViolation, alloc_12Err8RequiresViolation, alloc_12Err3RequiresViolation, alloc_12Err12RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]=== [2018-01-24 12:19:38,421 INFO L82 PathProgramCache]: Analyzing trace with hash -562803403, now seen corresponding path program 1 times [2018-01-24 12:19:38,421 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:19:38,422 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:19:38,423 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:38,423 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:19:38,423 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:38,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:19:38,436 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:19:38,610 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 12:19:38,610 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:19:38,610 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:19:38,622 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:19:38,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:19:38,650 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:19:38,653 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 12:19:38,654 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:19:38,655 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:19:38,655 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-24 12:19:38,661 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-01-24 12:19:38,662 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:19:38,663 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:19:38,663 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:9, output treesize:3 [2018-01-24 12:19:38,704 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:19:38,704 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:19:38,705 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-01-24 12:19:38,705 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:19:38,710 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:19:38,710 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15 [2018-01-24 12:19:38,762 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 12 [2018-01-24 12:19:38,762 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:19:38,775 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 8 [2018-01-24 12:19:38,776 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:19:38,784 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:19:38,784 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:41, output treesize:3 [2018-01-24 12:19:38,797 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:19:38,798 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-01-24 12:19:38,798 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:19:38,817 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 12:19:38,817 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:25, output treesize:15 [2018-01-24 12:19:38,837 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 12:19:38,868 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:19:38,868 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 9] total 13 [2018-01-24 12:19:38,868 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-24 12:19:38,869 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-24 12:19:38,869 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=32, Invalid=150, Unknown=0, NotChecked=0, Total=182 [2018-01-24 12:19:38,869 INFO L87 Difference]: Start difference. First operand 473 states and 544 transitions. Second operand 14 states. [2018-01-24 12:19:40,417 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:19:40,417 INFO L93 Difference]: Finished difference Result 573 states and 641 transitions. [2018-01-24 12:19:40,417 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-24 12:19:40,417 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 29 [2018-01-24 12:19:40,417 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:19:40,419 INFO L225 Difference]: With dead ends: 573 [2018-01-24 12:19:40,419 INFO L226 Difference]: Without dead ends: 572 [2018-01-24 12:19:40,420 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 27 SyntacticMatches, 3 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=71, Invalid=349, Unknown=0, NotChecked=0, Total=420 [2018-01-24 12:19:40,420 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 572 states. [2018-01-24 12:19:40,445 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 572 to 473. [2018-01-24 12:19:40,445 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 473 states. [2018-01-24 12:19:40,446 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 473 states to 473 states and 543 transitions. [2018-01-24 12:19:40,446 INFO L78 Accepts]: Start accepts. Automaton has 473 states and 543 transitions. Word has length 29 [2018-01-24 12:19:40,447 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:19:40,447 INFO L432 AbstractCegarLoop]: Abstraction has 473 states and 543 transitions. [2018-01-24 12:19:40,447 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-24 12:19:40,447 INFO L276 IsEmpty]: Start isEmpty. Operand 473 states and 543 transitions. [2018-01-24 12:19:40,447 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-24 12:19:40,447 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:19:40,447 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:19:40,447 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_list_addErr0RequiresViolation, ldv_list_addErr1RequiresViolation, ldv_destroy_msgsErr5RequiresViolation, ldv_destroy_msgsErr3RequiresViolation, ldv_destroy_msgsErr4RequiresViolation, ldv_destroy_msgsErr0RequiresViolation, ldv_destroy_msgsErr2RequiresViolation, ldv_destroy_msgsErr1RequiresViolation, ldv_msg_fillErr3RequiresViolation, ldv_msg_fillErr1RequiresViolation, ldv_msg_fillErr5RequiresViolation, ldv_msg_fillErr0RequiresViolation, ldv_msg_fillErr4RequiresViolation, ldv_msg_fillErr2RequiresViolation, alloc_12Err2RequiresViolation, alloc_12Err13RequiresViolation, alloc_12Err14RequiresViolation, alloc_12Err6RequiresViolation, alloc_12Err7RequiresViolation, alloc_12Err4RequiresViolation, alloc_12Err11RequiresViolation, alloc_12Err0RequiresViolation, alloc_12Err9RequiresViolation, alloc_12Err5RequiresViolation, alloc_12Err15RequiresViolation, alloc_12Err1RequiresViolation, alloc_12Err10RequiresViolation, alloc_12Err8RequiresViolation, alloc_12Err3RequiresViolation, alloc_12Err12RequiresViolation, __ldv_list_delErr2RequiresViolation, __ldv_list_delErr0RequiresViolation, __ldv_list_delErr1RequiresViolation, __ldv_list_delErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, ldv_msg_freeErr5RequiresViolation, ldv_msg_freeErr3RequiresViolation, ldv_msg_freeErr1RequiresViolation, ldv_msg_freeErr0RequiresViolation, ldv_msg_freeErr4RequiresViolation, ldv_msg_freeErr2RequiresViolation, mainErr0EnsuresViolation, ldv_list_delErr3RequiresViolation, ldv_list_delErr1RequiresViolation, ldv_list_delErr0RequiresViolation, ldv_list_delErr2RequiresViolation, ldv_m88ts2022_rd_regErr30RequiresViolation, ldv_m88ts2022_rd_regErr25RequiresViolation, ldv_m88ts2022_rd_regErr20RequiresViolation, ldv_m88ts2022_rd_regErr15RequiresViolation, ldv_m88ts2022_rd_regErr2RequiresViolation, ldv_m88ts2022_rd_regErr10RequiresViolation, ldv_m88ts2022_rd_regErr17RequiresViolation, ldv_m88ts2022_rd_regErr22RequiresViolation, ldv_m88ts2022_rd_regErr12RequiresViolation, ldv_m88ts2022_rd_regErr8RequiresViolation, ldv_m88ts2022_rd_regErr31RequiresViolation, ldv_m88ts2022_rd_regErr28RequiresViolation, ldv_m88ts2022_rd_regErr18RequiresViolation, ldv_m88ts2022_rd_regErr21RequiresViolation, ldv_m88ts2022_rd_regErr5RequiresViolation, ldv_m88ts2022_rd_regErr1RequiresViolation, ldv_m88ts2022_rd_regErr11RequiresViolation, ldv_m88ts2022_rd_regErr29RequiresViolation, ldv_m88ts2022_rd_regErr16RequiresViolation, ldv_m88ts2022_rd_regErr24RequiresViolation, ldv_m88ts2022_rd_regErr4RequiresViolation, ldv_m88ts2022_rd_regErr14RequiresViolation, ldv_m88ts2022_rd_regErr6RequiresViolation, ldv_m88ts2022_rd_regErr9RequiresViolation, ldv_m88ts2022_rd_regErr19RequiresViolation, ldv_m88ts2022_rd_regErr27RequiresViolation, ldv_m88ts2022_rd_regErr13RequiresViolation, ldv_m88ts2022_rd_regErr3RequiresViolation, ldv_m88ts2022_rd_regErr23RequiresViolation, ldv_m88ts2022_rd_regErr32RequiresViolation, ldv_m88ts2022_rd_regErr7RequiresViolation, ldv_m88ts2022_rd_regErr33RequiresViolation, ldv_m88ts2022_rd_regErr0RequiresViolation, ldv_m88ts2022_rd_regErr26RequiresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation, __ldv_list_addErr6RequiresViolation, __ldv_list_addErr1RequiresViolation, __ldv_list_addErr7RequiresViolation, __ldv_list_addErr0RequiresViolation, __ldv_list_addErr2RequiresViolation, __ldv_list_addErr4RequiresViolation, __ldv_list_addErr5RequiresViolation, __ldv_list_addErr3RequiresViolation, master_xferErr0RequiresViolation, master_xferErr3RequiresViolation, master_xferErr1RequiresViolation, master_xferErr2RequiresViolation, ULTIMATE.initErr3RequiresViolation, ULTIMATE.initErr1RequiresViolation, ULTIMATE.initErr2RequiresViolation, ULTIMATE.initErr0RequiresViolation, ldv_i2c_transferErr0RequiresViolation, ldv_i2c_transferErr1RequiresViolation, ldv_dev_set_drvdataErr0RequiresViolation, ldv_dev_set_drvdataErr1RequiresViolation, free_12Err1RequiresViolation, free_12Err6RequiresViolation, free_12Err3RequiresViolation, free_12Err2RequiresViolation, free_12Err0RequiresViolation, free_12Err7RequiresViolation, free_12Err4RequiresViolation, free_12Err5RequiresViolation, ldv_dev_get_drvdataErr1RequiresViolation, ldv_dev_get_drvdataErr0RequiresViolation, entry_pointErr5RequiresViolation, entry_pointErr14RequiresViolation, entry_pointErr18RequiresViolation, entry_pointErr0RequiresViolation, entry_pointErr1RequiresViolation, entry_pointErr13RequiresViolation, entry_pointErr19RequiresViolation, entry_pointErr6RequiresViolation, entry_pointErr8RequiresViolation, entry_pointErr11RequiresViolation, entry_pointErr3RequiresViolation, entry_pointErr16RequiresViolation, entry_pointErr7RequiresViolation, entry_pointErr12RequiresViolation, entry_pointErr15RequiresViolation, entry_pointErr17RequiresViolation, entry_pointErr4RequiresViolation, entry_pointErr2RequiresViolation, entry_pointErr9RequiresViolation, entry_pointErr10RequiresViolation, ldv_msg_allocErr0RequiresViolation, ldv_msg_allocErr1RequiresViolation]=== [2018-01-24 12:19:40,447 INFO L82 PathProgramCache]: Analyzing trace with hash -562803402, now seen corresponding path program 1 times [2018-01-24 12:19:40,448 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:19:40,448 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:19:40,449 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:40,449 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:19:40,449 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:19:40,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:19:40,460 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:19:40,797 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:19:40,797 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:19:40,798 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:19:40,812 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:19:40,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:19:40,845 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:19:40,855 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 12:19:40,856 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:19:40,882 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 12:19:40,882 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:19:40,886 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:19:40,887 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:16, output treesize:14 [2018-01-24 12:19:40,900 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-01-24 12:19:40,901 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:19:40,907 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 5 treesize of output 1 [2018-01-24 12:19:40,908 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:19:40,927 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:19:40,927 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:20, output treesize:10 [2018-01-24 12:19:40,996 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:19:40,997 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:19:40,998 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 47 [2018-01-24 12:19:40,998 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:19:41,020 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:19:41,020 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:19:41,021 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-01-24 12:19:41,021 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:19:41,038 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:19:41,040 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 35 [2018-01-24 12:19:41,040 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 12:19:41,057 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:19:41,057 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:19:41,058 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-01-24 12:19:41,058 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 12:19:41,072 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 4 dim-1 vars, End of recursive call: 4 dim-0 vars, and 2 xjuncts. [2018-01-24 12:19:41,073 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 8 variables, input treesize:67, output treesize:49 [2018-01-24 12:19:41,115 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 16 [2018-01-24 12:19:41,115 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:19:41,130 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:19:41,130 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:19:41,131 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 24 [2018-01-24 12:19:41,131 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:19:41,144 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:19:41,145 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:55, output treesize:7 [2018-01-24 12:19:41,176 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:19:41,201 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:19:41,202 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6] total 11 [2018-01-24 12:19:41,202 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-24 12:19:41,202 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-24 12:19:41,202 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=98, Unknown=0, NotChecked=0, Total=132 [2018-01-24 12:19:41,203 INFO L87 Difference]: Start difference. First operand 473 states and 543 transitions. Second operand 12 states. Received shutdown request... [2018-01-24 12:20:07,516 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 12:20:07,516 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-24 12:20:07,522 WARN L187 ceAbstractionStarter]: Timeout [2018-01-24 12:20:07,522 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.01 12:20:07 BoogieIcfgContainer [2018-01-24 12:20:07,523 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-24 12:20:07,523 INFO L168 Benchmark]: Toolchain (without parser) took 62806.42 ms. Allocated memory was 306.7 MB in the beginning and 645.9 MB in the end (delta: 339.2 MB). Free memory was 265.6 MB in the beginning and 348.3 MB in the end (delta: -82.7 MB). Peak memory consumption was 256.6 MB. Max. memory is 5.3 GB. [2018-01-24 12:20:07,524 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 306.7 MB. Free memory is still 272.6 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-24 12:20:07,524 INFO L168 Benchmark]: CACSL2BoogieTranslator took 295.67 ms. Allocated memory is still 306.7 MB. Free memory was 265.6 MB in the beginning and 248.5 MB in the end (delta: 17.1 MB). Peak memory consumption was 17.1 MB. Max. memory is 5.3 GB. [2018-01-24 12:20:07,525 INFO L168 Benchmark]: Boogie Preprocessor took 68.20 ms. Allocated memory is still 306.7 MB. Free memory was 248.5 MB in the beginning and 245.6 MB in the end (delta: 3.0 MB). Peak memory consumption was 3.0 MB. Max. memory is 5.3 GB. [2018-01-24 12:20:07,525 INFO L168 Benchmark]: RCFGBuilder took 1145.14 ms. Allocated memory was 306.7 MB in the beginning and 327.2 MB in the end (delta: 20.4 MB). Free memory was 245.6 MB in the beginning and 260.6 MB in the end (delta: -15.1 MB). Peak memory consumption was 69.0 MB. Max. memory is 5.3 GB. [2018-01-24 12:20:07,525 INFO L168 Benchmark]: TraceAbstraction took 61287.58 ms. Allocated memory was 327.2 MB in the beginning and 645.9 MB in the end (delta: 318.8 MB). Free memory was 260.6 MB in the beginning and 348.3 MB in the end (delta: -87.7 MB). Peak memory consumption was 231.1 MB. Max. memory is 5.3 GB. [2018-01-24 12:20:07,526 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 306.7 MB. Free memory is still 272.6 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 295.67 ms. Allocated memory is still 306.7 MB. Free memory was 265.6 MB in the beginning and 248.5 MB in the end (delta: 17.1 MB). Peak memory consumption was 17.1 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 68.20 ms. Allocated memory is still 306.7 MB. Free memory was 248.5 MB in the beginning and 245.6 MB in the end (delta: 3.0 MB). Peak memory consumption was 3.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 1145.14 ms. Allocated memory was 306.7 MB in the beginning and 327.2 MB in the end (delta: 20.4 MB). Free memory was 245.6 MB in the beginning and 260.6 MB in the end (delta: -15.1 MB). Peak memory consumption was 69.0 MB. Max. memory is 5.3 GB. * TraceAbstraction took 61287.58 ms. Allocated memory was 327.2 MB in the beginning and 645.9 MB in the end (delta: 318.8 MB). Free memory was 260.6 MB in the beginning and 348.3 MB in the end (delta: -87.7 MB). Peak memory consumption was 231.1 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1121). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1121). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1179). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1179). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1179). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1179). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1179). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1179). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1156). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1156). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1157). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1156). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1157). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1156). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1542). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1559). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1563). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1545). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1545). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1545). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1551). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1541). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1546). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1545). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1563). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1541). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1551). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1546). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1542). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1559). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1116). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1115). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1115). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1116). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1164). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1163). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1163). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1163). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1164). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1163). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1619]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1619). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1131). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1131). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1131). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1131). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1530). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1522). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1517). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1522). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1530). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1528). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1517). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1512). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1528). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1522). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1517). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1522). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1528). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1517). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1530). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1515). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1530). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1512). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1528). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1110). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1107). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1110). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1107). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1108). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1109). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1109). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1108). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1490). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1490). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1490). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1490). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1135). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1135). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1135). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1135). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1508). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1508). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1198). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1198). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1569). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1574). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1570). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1570). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1569). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1574). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1571). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1571). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1193). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1193). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1592). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1609). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1613). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1584). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1584). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1607). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1613). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1597). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1599). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1605). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1588). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1611). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1597). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1607). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1609). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1611). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1592). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1588). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1599). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1605). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1146). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1146). Cancelled while BasicCegarLoop was constructing difference of abstraction (473states) and interpolant automaton (currently 6 states, 12 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 64. - StatisticsResult: Ultimate Automizer benchmark data CFG has 28 procedures, 416 locations, 141 error locations. TIMEOUT Result, 61.2s OverallTime, 16 OverallIterations, 2 TraceHistogramMax, 55.9s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 5823 SDtfs, 2848 SDslu, 18265 SDs, 0 SdLazy, 12170 SolverSat, 636 SolverUnsat, 26 SolverUnknown, 0 SolverNotchecked, 30.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 337 GetRequests, 178 SyntacticMatches, 30 SemanticMatches, 128 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 198 ImplicationChecksByTransitivity, 7.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=538occurred in iteration=4, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.5s AutomataMinimizationTime, 15 MinimizatonAttempts, 828 StatesRemovedByMinimization, 15 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 0.3s SatisfiabilityAnalysisTime, 3.7s InterpolantComputationTime, 559 NumberOfCodeBlocks, 559 NumberOfCodeBlocksAsserted, 23 NumberOfCheckSat, 536 ConstructedInterpolants, 27 QuantifiedInterpolants, 104647 SizeOfPredicates, 21 NumberOfNonLiveVariables, 1018 ConjunctsInSsa, 114 ConjunctsInUnsatCore, 23 InterpolantComputations, 9 PerfectInterpolantSequences, 37/74 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test12_false-valid-free.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-24_12-20-07-538.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test12_false-valid-free.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-24_12-20-07-538.csv Completed graceful shutdown