java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-24 12:24:36,848 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-24 12:24:36,849 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-24 12:24:36,861 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-24 12:24:36,862 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-24 12:24:36,863 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-24 12:24:36,864 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-24 12:24:36,865 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-24 12:24:36,867 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-24 12:24:36,868 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-24 12:24:36,868 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-24 12:24:36,868 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-24 12:24:36,869 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-24 12:24:36,870 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-24 12:24:36,871 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-24 12:24:36,874 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-24 12:24:36,876 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-24 12:24:36,878 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-24 12:24:36,880 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-24 12:24:36,881 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-24 12:24:36,884 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-24 12:24:36,884 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-24 12:24:36,884 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-24 12:24:36,886 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-24 12:24:36,887 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-24 12:24:36,888 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-24 12:24:36,888 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-24 12:24:36,889 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-24 12:24:36,889 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-24 12:24:36,889 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-24 12:24:36,890 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-24 12:24:36,890 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ.epf [2018-01-24 12:24:36,900 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-24 12:24:36,900 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-24 12:24:36,901 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-24 12:24:36,901 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-24 12:24:36,902 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-24 12:24:36,902 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-24 12:24:36,902 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-24 12:24:36,903 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-24 12:24:36,903 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-24 12:24:36,903 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-24 12:24:36,903 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-24 12:24:36,904 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-24 12:24:36,904 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-24 12:24:36,904 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-24 12:24:36,904 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-24 12:24:36,904 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-24 12:24:36,905 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-24 12:24:36,905 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-24 12:24:36,905 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-24 12:24:36,905 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-24 12:24:36,905 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-24 12:24:36,906 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-24 12:24:36,906 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-24 12:24:36,906 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 12:24:36,906 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-24 12:24:36,907 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-24 12:24:36,907 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-24 12:24:36,907 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-24 12:24:36,907 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-01-24 12:24:36,907 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-24 12:24:36,908 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-24 12:24:36,908 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-24 12:24:36,909 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-24 12:24:36,909 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-24 12:24:36,945 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-24 12:24:36,958 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-24 12:24:36,963 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-24 12:24:36,965 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-24 12:24:36,965 INFO L276 PluginConnector]: CDTParser initialized [2018-01-24 12:24:36,966 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-01-24 12:24:37,183 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-24 12:24:37,189 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-24 12:24:37,190 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-24 12:24:37,190 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-24 12:24:37,196 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-24 12:24:37,197 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 12:24:37" (1/1) ... [2018-01-24 12:24:37,201 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7207b160 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:24:37, skipping insertion in model container [2018-01-24 12:24:37,201 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 12:24:37" (1/1) ... [2018-01-24 12:24:37,222 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 12:24:37,274 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 12:24:37,398 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 12:24:37,426 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 12:24:37,439 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:24:37 WrapperNode [2018-01-24 12:24:37,439 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-24 12:24:37,440 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-24 12:24:37,440 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-24 12:24:37,440 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-24 12:24:37,451 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:24:37" (1/1) ... [2018-01-24 12:24:37,451 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:24:37" (1/1) ... [2018-01-24 12:24:37,463 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:24:37" (1/1) ... [2018-01-24 12:24:37,463 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:24:37" (1/1) ... [2018-01-24 12:24:37,474 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:24:37" (1/1) ... [2018-01-24 12:24:37,479 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:24:37" (1/1) ... [2018-01-24 12:24:37,481 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:24:37" (1/1) ... [2018-01-24 12:24:37,485 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-24 12:24:37,486 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-24 12:24:37,486 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-24 12:24:37,486 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-24 12:24:37,487 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:24:37" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 12:24:37,538 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-24 12:24:37,538 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-24 12:24:37,538 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-01-24 12:24:37,538 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-01-24 12:24:37,538 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-01-24 12:24:37,539 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-01-24 12:24:37,539 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-01-24 12:24:37,539 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-01-24 12:24:37,539 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-01-24 12:24:37,539 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-01-24 12:24:37,539 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-01-24 12:24:37,539 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-01-24 12:24:37,539 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-01-24 12:24:37,539 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-01-24 12:24:37,539 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-01-24 12:24:37,540 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-01-24 12:24:37,540 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-01-24 12:24:37,540 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-01-24 12:24:37,540 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-01-24 12:24:37,540 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-24 12:24:37,540 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-24 12:24:37,540 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-24 12:24:37,540 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-24 12:24:37,540 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-24 12:24:37,540 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-24 12:24:37,541 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-24 12:24:37,541 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-24 12:24:37,541 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-24 12:24:37,541 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-24 12:24:37,541 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-24 12:24:37,541 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-24 12:24:37,541 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-24 12:24:37,541 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-24 12:24:37,541 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-01-24 12:24:37,542 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-01-24 12:24:37,542 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-01-24 12:24:37,542 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-01-24 12:24:37,542 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-01-24 12:24:37,542 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-01-24 12:24:37,542 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-01-24 12:24:37,542 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-01-24 12:24:37,542 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-01-24 12:24:37,542 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-01-24 12:24:37,542 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-01-24 12:24:37,542 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-01-24 12:24:37,543 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-01-24 12:24:37,543 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-01-24 12:24:37,543 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-01-24 12:24:37,543 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-01-24 12:24:37,543 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-01-24 12:24:37,543 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-24 12:24:37,543 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-24 12:24:37,543 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-24 12:24:37,801 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-01-24 12:24:37,990 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-24 12:24:37,991 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 12:24:37 BoogieIcfgContainer [2018-01-24 12:24:37,991 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-24 12:24:37,992 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-24 12:24:37,992 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-24 12:24:37,994 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-24 12:24:37,995 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.01 12:24:37" (1/3) ... [2018-01-24 12:24:37,996 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6caee62c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 12:24:37, skipping insertion in model container [2018-01-24 12:24:37,996 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:24:37" (2/3) ... [2018-01-24 12:24:37,997 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@6caee62c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 12:24:37, skipping insertion in model container [2018-01-24 12:24:37,997 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 12:24:37" (3/3) ... [2018-01-24 12:24:37,999 INFO L105 eAbstractionObserver]: Analyzing ICFG memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-01-24 12:24:38,008 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-24 12:24:38,016 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2018-01-24 12:24:38,059 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-24 12:24:38,059 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-24 12:24:38,059 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-24 12:24:38,059 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-24 12:24:38,060 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-24 12:24:38,060 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-24 12:24:38,060 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-24 12:24:38,060 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-24 12:24:38,061 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-24 12:24:38,081 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states. [2018-01-24 12:24:38,085 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-24 12:24:38,086 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:24:38,086 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:24:38,087 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:24:38,091 INFO L82 PathProgramCache]: Analyzing trace with hash -1956546830, now seen corresponding path program 1 times [2018-01-24 12:24:38,093 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:24:38,094 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:24:38,143 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:38,143 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:24:38,143 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:38,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:24:38,201 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:24:38,433 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:24:38,436 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:24:38,436 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 12:24:38,438 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 12:24:38,449 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 12:24:38,450 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:24:38,452 INFO L87 Difference]: Start difference. First operand 142 states. Second operand 5 states. [2018-01-24 12:24:38,513 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:24:38,513 INFO L93 Difference]: Finished difference Result 272 states and 287 transitions. [2018-01-24 12:24:38,514 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 12:24:38,515 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-01-24 12:24:38,515 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:24:38,526 INFO L225 Difference]: With dead ends: 272 [2018-01-24 12:24:38,527 INFO L226 Difference]: Without dead ends: 145 [2018-01-24 12:24:38,530 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:24:38,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-01-24 12:24:38,565 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 143. [2018-01-24 12:24:38,566 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-01-24 12:24:38,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 151 transitions. [2018-01-24 12:24:38,570 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 151 transitions. Word has length 17 [2018-01-24 12:24:38,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:24:38,570 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 151 transitions. [2018-01-24 12:24:38,570 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 12:24:38,570 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 151 transitions. [2018-01-24 12:24:38,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 12:24:38,571 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:24:38,571 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:24:38,571 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:24:38,571 INFO L82 PathProgramCache]: Analyzing trace with hash 1123892084, now seen corresponding path program 1 times [2018-01-24 12:24:38,572 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:24:38,572 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:24:38,574 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:38,574 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:24:38,574 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:38,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:24:38,597 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:24:38,655 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:24:38,656 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:24:38,656 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 12:24:38,657 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 12:24:38,658 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 12:24:38,658 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:24:38,658 INFO L87 Difference]: Start difference. First operand 143 states and 151 transitions. Second operand 6 states. [2018-01-24 12:24:38,856 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:24:38,856 INFO L93 Difference]: Finished difference Result 145 states and 153 transitions. [2018-01-24 12:24:38,857 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 12:24:38,857 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-01-24 12:24:38,857 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:24:38,859 INFO L225 Difference]: With dead ends: 145 [2018-01-24 12:24:38,859 INFO L226 Difference]: Without dead ends: 144 [2018-01-24 12:24:38,860 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:24:38,860 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-01-24 12:24:38,871 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 142. [2018-01-24 12:24:38,871 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-01-24 12:24:38,873 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 150 transitions. [2018-01-24 12:24:38,874 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 150 transitions. Word has length 19 [2018-01-24 12:24:38,874 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:24:38,874 INFO L432 AbstractCegarLoop]: Abstraction has 142 states and 150 transitions. [2018-01-24 12:24:38,874 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 12:24:38,874 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 150 transitions. [2018-01-24 12:24:38,874 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 12:24:38,875 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:24:38,875 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:24:38,875 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:24:38,875 INFO L82 PathProgramCache]: Analyzing trace with hash 1123892085, now seen corresponding path program 1 times [2018-01-24 12:24:38,875 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:24:38,875 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:24:38,876 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:38,876 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:24:38,876 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:38,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:24:38,898 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:24:39,219 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:24:39,219 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:24:39,219 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 12:24:39,220 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 12:24:39,220 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 12:24:39,220 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:24:39,220 INFO L87 Difference]: Start difference. First operand 142 states and 150 transitions. Second operand 7 states. [2018-01-24 12:24:39,454 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:24:39,454 INFO L93 Difference]: Finished difference Result 144 states and 152 transitions. [2018-01-24 12:24:39,455 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 12:24:39,455 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-01-24 12:24:39,455 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:24:39,456 INFO L225 Difference]: With dead ends: 144 [2018-01-24 12:24:39,456 INFO L226 Difference]: Without dead ends: 143 [2018-01-24 12:24:39,457 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-01-24 12:24:39,457 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-01-24 12:24:39,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 141. [2018-01-24 12:24:39,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-01-24 12:24:39,469 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 149 transitions. [2018-01-24 12:24:39,470 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 149 transitions. Word has length 19 [2018-01-24 12:24:39,470 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:24:39,470 INFO L432 AbstractCegarLoop]: Abstraction has 141 states and 149 transitions. [2018-01-24 12:24:39,470 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 12:24:39,471 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 149 transitions. [2018-01-24 12:24:39,471 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-24 12:24:39,472 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:24:39,472 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:24:39,472 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:24:39,472 INFO L82 PathProgramCache]: Analyzing trace with hash -1414777661, now seen corresponding path program 1 times [2018-01-24 12:24:39,472 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:24:39,473 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:24:39,474 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:39,474 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:24:39,475 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:39,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:24:39,493 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:24:39,569 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:24:39,570 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:24:39,570 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-24 12:24:39,570 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 12:24:39,570 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 12:24:39,571 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:24:39,571 INFO L87 Difference]: Start difference. First operand 141 states and 149 transitions. Second operand 7 states. [2018-01-24 12:24:39,652 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:24:39,652 INFO L93 Difference]: Finished difference Result 235 states and 247 transitions. [2018-01-24 12:24:39,652 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 12:24:39,652 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 27 [2018-01-24 12:24:39,653 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:24:39,656 INFO L225 Difference]: With dead ends: 235 [2018-01-24 12:24:39,656 INFO L226 Difference]: Without dead ends: 157 [2018-01-24 12:24:39,657 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-01-24 12:24:39,658 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-01-24 12:24:39,676 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 150. [2018-01-24 12:24:39,682 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-01-24 12:24:39,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 158 transitions. [2018-01-24 12:24:39,684 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 158 transitions. Word has length 27 [2018-01-24 12:24:39,684 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:24:39,684 INFO L432 AbstractCegarLoop]: Abstraction has 150 states and 158 transitions. [2018-01-24 12:24:39,685 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 12:24:39,686 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 158 transitions. [2018-01-24 12:24:39,687 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 12:24:39,687 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:24:39,687 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:24:39,688 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:24:39,690 INFO L82 PathProgramCache]: Analyzing trace with hash 1439517623, now seen corresponding path program 1 times [2018-01-24 12:24:39,690 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:24:39,691 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:24:39,692 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:39,692 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:24:39,692 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:39,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:24:39,712 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:24:39,824 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:24:39,825 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:24:39,825 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 12:24:39,825 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 12:24:39,826 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 12:24:39,826 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 12:24:39,826 INFO L87 Difference]: Start difference. First operand 150 states and 158 transitions. Second operand 10 states. [2018-01-24 12:24:40,048 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:24:40,049 INFO L93 Difference]: Finished difference Result 150 states and 158 transitions. [2018-01-24 12:24:40,049 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 12:24:40,049 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 34 [2018-01-24 12:24:40,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:24:40,050 INFO L225 Difference]: With dead ends: 150 [2018-01-24 12:24:40,050 INFO L226 Difference]: Without dead ends: 149 [2018-01-24 12:24:40,051 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 12:24:40,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-01-24 12:24:40,058 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 149. [2018-01-24 12:24:40,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-01-24 12:24:40,060 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 157 transitions. [2018-01-24 12:24:40,060 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 157 transitions. Word has length 34 [2018-01-24 12:24:40,060 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:24:40,060 INFO L432 AbstractCegarLoop]: Abstraction has 149 states and 157 transitions. [2018-01-24 12:24:40,060 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 12:24:40,060 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 157 transitions. [2018-01-24 12:24:40,061 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 12:24:40,061 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:24:40,061 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:24:40,061 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:24:40,061 INFO L82 PathProgramCache]: Analyzing trace with hash 1439517624, now seen corresponding path program 1 times [2018-01-24 12:24:40,062 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:24:40,062 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:24:40,063 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:40,063 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:24:40,063 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:40,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:24:40,081 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:24:40,121 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:24:40,121 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:24:40,156 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 12:24:40,157 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 12:24:40,157 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 12:24:40,157 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 12:24:40,157 INFO L87 Difference]: Start difference. First operand 149 states and 157 transitions. Second operand 4 states. [2018-01-24 12:24:40,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:24:40,188 INFO L93 Difference]: Finished difference Result 264 states and 278 transitions. [2018-01-24 12:24:40,188 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 12:24:40,188 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2018-01-24 12:24:40,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:24:40,190 INFO L225 Difference]: With dead ends: 264 [2018-01-24 12:24:40,190 INFO L226 Difference]: Without dead ends: 150 [2018-01-24 12:24:40,192 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:24:40,192 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-01-24 12:24:40,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-01-24 12:24:40,202 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-01-24 12:24:40,203 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 158 transitions. [2018-01-24 12:24:40,203 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 158 transitions. Word has length 34 [2018-01-24 12:24:40,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:24:40,203 INFO L432 AbstractCegarLoop]: Abstraction has 150 states and 158 transitions. [2018-01-24 12:24:40,203 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 12:24:40,204 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 158 transitions. [2018-01-24 12:24:40,205 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-24 12:24:40,205 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:24:40,205 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:24:40,205 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:24:40,206 INFO L82 PathProgramCache]: Analyzing trace with hash -204456797, now seen corresponding path program 1 times [2018-01-24 12:24:40,206 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:24:40,206 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:24:40,207 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:40,207 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:24:40,207 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:40,223 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:24:40,224 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:24:40,278 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:24:40,279 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:24:40,279 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:24:40,287 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:24:40,324 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:24:40,334 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:24:40,371 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:24:40,393 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:24:40,393 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-01-24 12:24:40,394 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 12:24:40,394 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 12:24:40,394 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:24:40,394 INFO L87 Difference]: Start difference. First operand 150 states and 158 transitions. Second operand 6 states. [2018-01-24 12:24:40,426 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:24:40,426 INFO L93 Difference]: Finished difference Result 265 states and 279 transitions. [2018-01-24 12:24:40,426 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 12:24:40,426 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-01-24 12:24:40,427 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:24:40,428 INFO L225 Difference]: With dead ends: 265 [2018-01-24 12:24:40,428 INFO L226 Difference]: Without dead ends: 151 [2018-01-24 12:24:40,430 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:24:40,430 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-01-24 12:24:40,439 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 151. [2018-01-24 12:24:40,439 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-01-24 12:24:40,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 159 transitions. [2018-01-24 12:24:40,441 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 159 transitions. Word has length 35 [2018-01-24 12:24:40,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:24:40,441 INFO L432 AbstractCegarLoop]: Abstraction has 151 states and 159 transitions. [2018-01-24 12:24:40,441 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 12:24:40,442 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 159 transitions. [2018-01-24 12:24:40,443 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 12:24:40,443 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:24:40,443 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:24:40,443 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:24:40,444 INFO L82 PathProgramCache]: Analyzing trace with hash -1829139958, now seen corresponding path program 1 times [2018-01-24 12:24:40,444 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:24:40,444 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:24:40,445 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:40,446 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:24:40,446 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:40,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:24:40,463 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:24:40,575 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:24:40,575 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:24:40,576 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-24 12:24:40,576 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 12:24:40,576 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 12:24:40,576 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:24:40,577 INFO L87 Difference]: Start difference. First operand 151 states and 159 transitions. Second operand 7 states. [2018-01-24 12:24:40,627 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:24:40,628 INFO L93 Difference]: Finished difference Result 215 states and 225 transitions. [2018-01-24 12:24:40,628 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 12:24:40,628 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 36 [2018-01-24 12:24:40,629 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:24:40,630 INFO L225 Difference]: With dead ends: 215 [2018-01-24 12:24:40,630 INFO L226 Difference]: Without dead ends: 161 [2018-01-24 12:24:40,631 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-01-24 12:24:40,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2018-01-24 12:24:40,641 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 157. [2018-01-24 12:24:40,641 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-01-24 12:24:40,643 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 165 transitions. [2018-01-24 12:24:40,643 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 165 transitions. Word has length 36 [2018-01-24 12:24:40,644 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:24:40,644 INFO L432 AbstractCegarLoop]: Abstraction has 157 states and 165 transitions. [2018-01-24 12:24:40,644 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 12:24:40,644 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 165 transitions. [2018-01-24 12:24:40,645 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 12:24:40,645 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:24:40,646 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:24:40,646 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:24:40,646 INFO L82 PathProgramCache]: Analyzing trace with hash 371943704, now seen corresponding path program 2 times [2018-01-24 12:24:40,646 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:24:40,646 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:24:40,647 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:40,647 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:24:40,648 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:40,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:24:40,666 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:24:40,733 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:24:40,733 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:24:40,733 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:24:40,747 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 12:24:40,778 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:24:40,782 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:24:40,787 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:24:40,840 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 12:24:40,843 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:24:40,880 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 12:24:40,881 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:24:40,908 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 12:24:40,908 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 12:24:41,570 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 12:24:41,591 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-24 12:24:41,591 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [6] total 19 [2018-01-24 12:24:41,592 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-24 12:24:41,592 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-24 12:24:41,593 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=291, Unknown=0, NotChecked=0, Total=342 [2018-01-24 12:24:41,593 INFO L87 Difference]: Start difference. First operand 157 states and 165 transitions. Second operand 19 states. [2018-01-24 12:24:42,823 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:24:42,823 INFO L93 Difference]: Finished difference Result 290 states and 304 transitions. [2018-01-24 12:24:42,824 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-24 12:24:42,824 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 36 [2018-01-24 12:24:42,824 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:24:42,825 INFO L225 Difference]: With dead ends: 290 [2018-01-24 12:24:42,825 INFO L226 Difference]: Without dead ends: 176 [2018-01-24 12:24:42,826 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=99, Invalid=603, Unknown=0, NotChecked=0, Total=702 [2018-01-24 12:24:42,826 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-01-24 12:24:42,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 157. [2018-01-24 12:24:42,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-01-24 12:24:42,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 165 transitions. [2018-01-24 12:24:42,844 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 165 transitions. Word has length 36 [2018-01-24 12:24:42,845 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:24:42,845 INFO L432 AbstractCegarLoop]: Abstraction has 157 states and 165 transitions. [2018-01-24 12:24:42,845 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-24 12:24:42,845 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 165 transitions. [2018-01-24 12:24:42,846 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 12:24:42,846 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:24:42,846 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:24:42,847 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:24:42,847 INFO L82 PathProgramCache]: Analyzing trace with hash -1983848104, now seen corresponding path program 1 times [2018-01-24 12:24:42,847 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:24:42,847 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:24:42,848 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:42,849 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:24:42,849 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:42,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:24:42,857 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:24:42,891 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:24:42,891 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:24:42,892 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 12:24:42,892 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 12:24:42,892 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 12:24:42,892 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 12:24:42,892 INFO L87 Difference]: Start difference. First operand 157 states and 165 transitions. Second operand 3 states. [2018-01-24 12:24:42,994 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:24:42,994 INFO L93 Difference]: Finished difference Result 175 states and 184 transitions. [2018-01-24 12:24:42,994 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 12:24:42,994 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 34 [2018-01-24 12:24:42,994 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:24:42,996 INFO L225 Difference]: With dead ends: 175 [2018-01-24 12:24:42,996 INFO L226 Difference]: Without dead ends: 161 [2018-01-24 12:24:42,996 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 12:24:42,996 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2018-01-24 12:24:43,010 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 153. [2018-01-24 12:24:43,010 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153 states. [2018-01-24 12:24:43,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 160 transitions. [2018-01-24 12:24:43,012 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 160 transitions. Word has length 34 [2018-01-24 12:24:43,012 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:24:43,012 INFO L432 AbstractCegarLoop]: Abstraction has 153 states and 160 transitions. [2018-01-24 12:24:43,012 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 12:24:43,012 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 160 transitions. [2018-01-24 12:24:43,013 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 12:24:43,013 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:24:43,013 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:24:43,013 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:24:43,013 INFO L82 PathProgramCache]: Analyzing trace with hash 515535126, now seen corresponding path program 1 times [2018-01-24 12:24:43,013 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:24:43,014 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:24:43,015 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:43,015 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:24:43,015 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:43,021 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:24:43,022 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:24:43,089 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:24:43,090 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:24:43,090 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 12:24:43,090 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 12:24:43,090 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 12:24:43,090 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:24:43,090 INFO L87 Difference]: Start difference. First operand 153 states and 160 transitions. Second operand 6 states. [2018-01-24 12:24:43,142 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:24:43,142 INFO L93 Difference]: Finished difference Result 157 states and 163 transitions. [2018-01-24 12:24:43,143 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 12:24:43,143 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 36 [2018-01-24 12:24:43,143 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:24:43,144 INFO L225 Difference]: With dead ends: 157 [2018-01-24 12:24:43,144 INFO L226 Difference]: Without dead ends: 138 [2018-01-24 12:24:43,145 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:24:43,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-01-24 12:24:43,156 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-01-24 12:24:43,157 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-01-24 12:24:43,157 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 144 transitions. [2018-01-24 12:24:43,158 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 144 transitions. Word has length 36 [2018-01-24 12:24:43,158 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:24:43,158 INFO L432 AbstractCegarLoop]: Abstraction has 138 states and 144 transitions. [2018-01-24 12:24:43,158 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 12:24:43,158 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 144 transitions. [2018-01-24 12:24:43,159 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-24 12:24:43,159 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:24:43,159 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:24:43,159 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:24:43,159 INFO L82 PathProgramCache]: Analyzing trace with hash -723967063, now seen corresponding path program 1 times [2018-01-24 12:24:43,159 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:24:43,159 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:24:43,160 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:43,160 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:24:43,160 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:43,173 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:24:43,174 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:24:43,436 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 12:24:43,436 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:24:43,437 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 12:24:43,437 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 12:24:43,437 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 12:24:43,437 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 12:24:43,437 INFO L87 Difference]: Start difference. First operand 138 states and 144 transitions. Second operand 10 states. [2018-01-24 12:24:43,659 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:24:43,660 INFO L93 Difference]: Finished difference Result 138 states and 144 transitions. [2018-01-24 12:24:43,660 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 12:24:43,660 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 42 [2018-01-24 12:24:43,660 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:24:43,661 INFO L225 Difference]: With dead ends: 138 [2018-01-24 12:24:43,661 INFO L226 Difference]: Without dead ends: 136 [2018-01-24 12:24:43,661 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 12:24:43,661 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-01-24 12:24:43,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-01-24 12:24:43,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-01-24 12:24:43,676 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 142 transitions. [2018-01-24 12:24:43,676 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 142 transitions. Word has length 42 [2018-01-24 12:24:43,676 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:24:43,677 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 142 transitions. [2018-01-24 12:24:43,677 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 12:24:43,677 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 142 transitions. [2018-01-24 12:24:43,677 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-24 12:24:43,677 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:24:43,678 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:24:43,678 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:24:43,678 INFO L82 PathProgramCache]: Analyzing trace with hash -723967062, now seen corresponding path program 1 times [2018-01-24 12:24:43,678 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:24:43,678 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:24:43,679 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:43,680 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:24:43,680 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:43,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:24:43,698 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:24:43,755 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:24:43,755 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:24:43,755 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:24:43,763 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:24:43,787 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:24:43,791 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:24:43,801 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:24:43,836 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:24:43,836 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-01-24 12:24:43,837 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 12:24:43,837 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 12:24:43,837 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-01-24 12:24:43,837 INFO L87 Difference]: Start difference. First operand 136 states and 142 transitions. Second operand 8 states. [2018-01-24 12:24:43,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:24:43,888 INFO L93 Difference]: Finished difference Result 248 states and 260 transitions. [2018-01-24 12:24:43,888 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 12:24:43,888 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 42 [2018-01-24 12:24:43,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:24:43,889 INFO L225 Difference]: With dead ends: 248 [2018-01-24 12:24:43,889 INFO L226 Difference]: Without dead ends: 137 [2018-01-24 12:24:43,890 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 42 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-01-24 12:24:43,890 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-01-24 12:24:43,899 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-01-24 12:24:43,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-01-24 12:24:43,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 143 transitions. [2018-01-24 12:24:43,900 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 143 transitions. Word has length 42 [2018-01-24 12:24:43,900 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:24:43,900 INFO L432 AbstractCegarLoop]: Abstraction has 137 states and 143 transitions. [2018-01-24 12:24:43,900 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 12:24:43,901 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 143 transitions. [2018-01-24 12:24:43,901 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-24 12:24:43,901 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:24:43,901 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:24:43,901 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:24:43,901 INFO L82 PathProgramCache]: Analyzing trace with hash -1816266347, now seen corresponding path program 2 times [2018-01-24 12:24:43,901 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:24:43,901 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:24:43,902 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:43,902 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:24:43,903 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:43,914 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:24:43,915 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:24:43,999 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:24:44,000 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:24:44,000 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:24:44,005 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 12:24:44,022 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:24:44,025 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:24:44,028 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:24:44,036 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 12:24:44,036 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:24:44,051 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 12:24:44,051 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:24:44,065 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 12:24:44,065 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 12:24:46,249 WARN L143 SmtUtils]: Spent 2028ms on a formula simplification that was a NOOP. DAG size: 21 [2018-01-24 12:24:46,581 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 12:24:46,601 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-24 12:24:46,601 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [8] total 22 [2018-01-24 12:24:46,602 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-24 12:24:46,602 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-24 12:24:46,602 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=390, Unknown=0, NotChecked=0, Total=462 [2018-01-24 12:24:46,602 INFO L87 Difference]: Start difference. First operand 137 states and 143 transitions. Second operand 22 states. [2018-01-24 12:24:51,079 WARN L143 SmtUtils]: Spent 4027ms on a formula simplification that was a NOOP. DAG size: 32 [2018-01-24 12:24:51,858 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:24:51,858 INFO L93 Difference]: Finished difference Result 247 states and 261 transitions. [2018-01-24 12:24:51,859 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-24 12:24:51,859 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 43 [2018-01-24 12:24:51,859 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:24:51,860 INFO L225 Difference]: With dead ends: 247 [2018-01-24 12:24:51,860 INFO L226 Difference]: Without dead ends: 136 [2018-01-24 12:24:51,860 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 29 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 155 ImplicationChecksByTransitivity, 6.9s TimeCoverageRelationStatistics Valid=147, Invalid=845, Unknown=0, NotChecked=0, Total=992 [2018-01-24 12:24:51,861 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-01-24 12:24:51,871 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-01-24 12:24:51,872 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-01-24 12:24:51,872 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 142 transitions. [2018-01-24 12:24:51,873 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 142 transitions. Word has length 43 [2018-01-24 12:24:51,873 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:24:51,873 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 142 transitions. [2018-01-24 12:24:51,873 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-24 12:24:51,873 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 142 transitions. [2018-01-24 12:24:51,873 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-24 12:24:51,873 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:24:51,874 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:24:51,874 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:24:51,874 INFO L82 PathProgramCache]: Analyzing trace with hash -2123180192, now seen corresponding path program 1 times [2018-01-24 12:24:51,874 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:24:51,874 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:24:51,875 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:51,875 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:24:51,875 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:51,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:24:51,885 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:24:51,954 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 12:24:51,954 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:24:51,954 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-24 12:24:51,955 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 12:24:51,955 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 12:24:51,955 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-01-24 12:24:51,955 INFO L87 Difference]: Start difference. First operand 136 states and 142 transitions. Second operand 8 states. [2018-01-24 12:24:52,006 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:24:52,007 INFO L93 Difference]: Finished difference Result 223 states and 232 transitions. [2018-01-24 12:24:52,007 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 12:24:52,007 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 47 [2018-01-24 12:24:52,007 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:24:52,008 INFO L225 Difference]: With dead ends: 223 [2018-01-24 12:24:52,008 INFO L226 Difference]: Without dead ends: 136 [2018-01-24 12:24:52,009 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-01-24 12:24:52,009 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-01-24 12:24:52,027 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-01-24 12:24:52,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-01-24 12:24:52,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 141 transitions. [2018-01-24 12:24:52,028 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 141 transitions. Word has length 47 [2018-01-24 12:24:52,029 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:24:52,029 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 141 transitions. [2018-01-24 12:24:52,029 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 12:24:52,029 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 141 transitions. [2018-01-24 12:24:52,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-24 12:24:52,030 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:24:52,030 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:24:52,030 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:24:52,030 INFO L82 PathProgramCache]: Analyzing trace with hash -1684319326, now seen corresponding path program 1 times [2018-01-24 12:24:52,030 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:24:52,030 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:24:52,031 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:52,031 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:24:52,032 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:52,043 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:24:52,045 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:24:52,162 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 12:24:52,162 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:24:52,162 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-01-24 12:24:52,163 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 12:24:52,163 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 12:24:52,163 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 12:24:52,163 INFO L87 Difference]: Start difference. First operand 136 states and 141 transitions. Second operand 10 states. [2018-01-24 12:24:52,232 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:24:52,232 INFO L93 Difference]: Finished difference Result 225 states and 233 transitions. [2018-01-24 12:24:52,233 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 12:24:52,233 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 52 [2018-01-24 12:24:52,233 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:24:52,234 INFO L225 Difference]: With dead ends: 225 [2018-01-24 12:24:52,234 INFO L226 Difference]: Without dead ends: 136 [2018-01-24 12:24:52,235 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 12:24:52,235 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-01-24 12:24:52,250 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-01-24 12:24:52,250 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-01-24 12:24:52,251 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 140 transitions. [2018-01-24 12:24:52,251 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 140 transitions. Word has length 52 [2018-01-24 12:24:52,252 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:24:52,252 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 140 transitions. [2018-01-24 12:24:52,252 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 12:24:52,252 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 140 transitions. [2018-01-24 12:24:52,253 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-01-24 12:24:52,253 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:24:52,253 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:24:52,253 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:24:52,253 INFO L82 PathProgramCache]: Analyzing trace with hash 1703813979, now seen corresponding path program 1 times [2018-01-24 12:24:52,253 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:24:52,254 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:24:52,255 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:52,255 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:24:52,255 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:52,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:24:52,273 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:24:52,415 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 12:24:52,416 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:24:52,416 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-01-24 12:24:52,416 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-24 12:24:52,416 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-24 12:24:52,416 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156 [2018-01-24 12:24:52,417 INFO L87 Difference]: Start difference. First operand 136 states and 140 transitions. Second operand 13 states. [2018-01-24 12:24:52,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:24:52,830 INFO L93 Difference]: Finished difference Result 136 states and 140 transitions. [2018-01-24 12:24:52,830 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-24 12:24:52,830 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 63 [2018-01-24 12:24:52,831 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:24:52,831 INFO L225 Difference]: With dead ends: 136 [2018-01-24 12:24:52,832 INFO L226 Difference]: Without dead ends: 134 [2018-01-24 12:24:52,832 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2018-01-24 12:24:52,832 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-01-24 12:24:52,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-01-24 12:24:52,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-01-24 12:24:52,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 138 transitions. [2018-01-24 12:24:52,855 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 138 transitions. Word has length 63 [2018-01-24 12:24:52,856 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:24:52,856 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 138 transitions. [2018-01-24 12:24:52,857 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-24 12:24:52,857 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 138 transitions. [2018-01-24 12:24:52,858 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-01-24 12:24:52,858 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:24:52,858 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:24:52,858 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:24:52,858 INFO L82 PathProgramCache]: Analyzing trace with hash 1703813980, now seen corresponding path program 1 times [2018-01-24 12:24:52,858 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:24:52,859 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:24:52,860 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:52,860 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:24:52,860 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:52,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:24:52,879 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:24:52,960 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:24:52,961 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:24:52,961 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:24:52,966 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:24:53,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:24:53,006 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:24:53,032 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:24:53,057 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:24:53,058 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-01-24 12:24:53,058 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 12:24:53,058 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 12:24:53,058 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-01-24 12:24:53,058 INFO L87 Difference]: Start difference. First operand 134 states and 138 transitions. Second operand 10 states. [2018-01-24 12:24:53,091 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:24:53,091 INFO L93 Difference]: Finished difference Result 242 states and 250 transitions. [2018-01-24 12:24:53,091 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-24 12:24:53,091 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 63 [2018-01-24 12:24:53,092 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:24:53,092 INFO L225 Difference]: With dead ends: 242 [2018-01-24 12:24:53,093 INFO L226 Difference]: Without dead ends: 135 [2018-01-24 12:24:53,093 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 72 GetRequests, 63 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-01-24 12:24:53,094 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-01-24 12:24:53,111 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-01-24 12:24:53,111 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-01-24 12:24:53,112 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 139 transitions. [2018-01-24 12:24:53,112 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 139 transitions. Word has length 63 [2018-01-24 12:24:53,113 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:24:53,113 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 139 transitions. [2018-01-24 12:24:53,113 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 12:24:53,113 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 139 transitions. [2018-01-24 12:24:53,113 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-01-24 12:24:53,114 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:24:53,114 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:24:53,114 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:24:53,114 INFO L82 PathProgramCache]: Analyzing trace with hash 1580383825, now seen corresponding path program 2 times [2018-01-24 12:24:53,114 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:24:53,114 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:24:53,115 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:53,115 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:24:53,116 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:53,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:24:53,135 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:24:53,212 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:24:53,212 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:24:53,212 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:24:53,225 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 12:24:53,259 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:24:53,264 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:24:53,270 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:24:53,280 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 12:24:53,280 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:24:53,316 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 12:24:53,317 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:24:53,333 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 12:24:53,333 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 12:24:54,045 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-01-24 12:24:54,065 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-24 12:24:54,065 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [10] total 27 [2018-01-24 12:24:54,066 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-24 12:24:54,066 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-24 12:24:54,066 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=99, Invalid=603, Unknown=0, NotChecked=0, Total=702 [2018-01-24 12:24:54,066 INFO L87 Difference]: Start difference. First operand 135 states and 139 transitions. Second operand 27 states. [2018-01-24 12:24:56,140 WARN L143 SmtUtils]: Spent 2036ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-24 12:24:58,474 WARN L143 SmtUtils]: Spent 2020ms on a formula simplification that was a NOOP. DAG size: 31 [2018-01-24 12:24:59,364 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:24:59,364 INFO L93 Difference]: Finished difference Result 241 states and 251 transitions. [2018-01-24 12:24:59,365 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-24 12:24:59,365 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 64 [2018-01-24 12:24:59,365 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:24:59,366 INFO L225 Difference]: With dead ends: 241 [2018-01-24 12:24:59,366 INFO L226 Difference]: Without dead ends: 134 [2018-01-24 12:24:59,366 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 86 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 319 ImplicationChecksByTransitivity, 5.1s TimeCoverageRelationStatistics Valid=213, Invalid=1347, Unknown=0, NotChecked=0, Total=1560 [2018-01-24 12:24:59,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-01-24 12:24:59,380 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-01-24 12:24:59,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-01-24 12:24:59,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 138 transitions. [2018-01-24 12:24:59,381 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 138 transitions. Word has length 64 [2018-01-24 12:24:59,381 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:24:59,381 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 138 transitions. [2018-01-24 12:24:59,381 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-24 12:24:59,381 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 138 transitions. [2018-01-24 12:24:59,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-01-24 12:24:59,382 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:24:59,382 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:24:59,382 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:24:59,382 INFO L82 PathProgramCache]: Analyzing trace with hash -1086612526, now seen corresponding path program 1 times [2018-01-24 12:24:59,382 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:24:59,383 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:24:59,383 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:59,383 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:24:59,383 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:59,396 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:24:59,397 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:24:59,515 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-01-24 12:24:59,516 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:24:59,516 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-24 12:24:59,516 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-24 12:24:59,516 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-24 12:24:59,516 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-01-24 12:24:59,517 INFO L87 Difference]: Start difference. First operand 134 states and 138 transitions. Second operand 11 states. [2018-01-24 12:24:59,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:24:59,617 INFO L93 Difference]: Finished difference Result 195 states and 201 transitions. [2018-01-24 12:24:59,617 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 12:24:59,617 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 74 [2018-01-24 12:24:59,618 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:24:59,619 INFO L225 Difference]: With dead ends: 195 [2018-01-24 12:24:59,619 INFO L226 Difference]: Without dead ends: 134 [2018-01-24 12:24:59,619 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2018-01-24 12:24:59,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-01-24 12:24:59,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-01-24 12:24:59,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-01-24 12:24:59,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 137 transitions. [2018-01-24 12:24:59,641 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 137 transitions. Word has length 74 [2018-01-24 12:24:59,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:24:59,642 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 137 transitions. [2018-01-24 12:24:59,642 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-24 12:24:59,642 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 137 transitions. [2018-01-24 12:24:59,643 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-01-24 12:24:59,643 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:24:59,643 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:24:59,643 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:24:59,644 INFO L82 PathProgramCache]: Analyzing trace with hash 27384906, now seen corresponding path program 1 times [2018-01-24 12:24:59,644 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:24:59,644 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:24:59,645 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:59,645 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:24:59,645 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:24:59,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:24:59,668 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:24:59,890 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-01-24 12:24:59,891 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:24:59,891 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-01-24 12:24:59,891 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-24 12:24:59,891 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-24 12:24:59,891 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=271, Unknown=0, NotChecked=0, Total=306 [2018-01-24 12:24:59,892 INFO L87 Difference]: Start difference. First operand 134 states and 137 transitions. Second operand 18 states. [2018-01-24 12:25:00,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:00,360 INFO L93 Difference]: Finished difference Result 143 states and 146 transitions. [2018-01-24 12:25:00,360 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-24 12:25:00,360 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 87 [2018-01-24 12:25:00,361 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:00,362 INFO L225 Difference]: With dead ends: 143 [2018-01-24 12:25:00,362 INFO L226 Difference]: Without dead ends: 141 [2018-01-24 12:25:00,362 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=59, Invalid=493, Unknown=0, NotChecked=0, Total=552 [2018-01-24 12:25:00,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-01-24 12:25:00,389 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 132. [2018-01-24 12:25:00,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-01-24 12:25:00,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 135 transitions. [2018-01-24 12:25:00,390 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 135 transitions. Word has length 87 [2018-01-24 12:25:00,391 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:00,391 INFO L432 AbstractCegarLoop]: Abstraction has 132 states and 135 transitions. [2018-01-24 12:25:00,391 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-24 12:25:00,391 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 135 transitions. [2018-01-24 12:25:00,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-01-24 12:25:00,392 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:00,392 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:00,392 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:00,393 INFO L82 PathProgramCache]: Analyzing trace with hash 27384907, now seen corresponding path program 1 times [2018-01-24 12:25:00,393 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:00,393 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:00,395 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:00,395 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:00,396 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:00,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:00,444 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:00,599 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:00,599 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:25:00,599 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:25:00,607 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:00,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:00,675 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:25:00,716 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:00,750 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:25:00,751 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2018-01-24 12:25:00,751 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-24 12:25:00,751 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-24 12:25:00,751 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132 [2018-01-24 12:25:00,752 INFO L87 Difference]: Start difference. First operand 132 states and 135 transitions. Second operand 12 states. [2018-01-24 12:25:00,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:00,850 INFO L93 Difference]: Finished difference Result 236 states and 242 transitions. [2018-01-24 12:25:00,851 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 12:25:00,851 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 87 [2018-01-24 12:25:00,852 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:00,853 INFO L225 Difference]: With dead ends: 236 [2018-01-24 12:25:00,853 INFO L226 Difference]: Without dead ends: 133 [2018-01-24 12:25:00,853 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 87 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=61, Invalid=95, Unknown=0, NotChecked=0, Total=156 [2018-01-24 12:25:00,854 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-01-24 12:25:00,875 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 133. [2018-01-24 12:25:00,875 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-01-24 12:25:00,876 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 136 transitions. [2018-01-24 12:25:00,876 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 136 transitions. Word has length 87 [2018-01-24 12:25:00,876 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:00,877 INFO L432 AbstractCegarLoop]: Abstraction has 133 states and 136 transitions. [2018-01-24 12:25:00,877 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-24 12:25:00,877 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 136 transitions. [2018-01-24 12:25:00,877 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-01-24 12:25:00,877 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:00,878 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:00,878 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:00,879 INFO L82 PathProgramCache]: Analyzing trace with hash -556652480, now seen corresponding path program 2 times [2018-01-24 12:25:00,879 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:00,879 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:00,880 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:00,880 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:00,880 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:00,903 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:00,905 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:01,062 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:01,062 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:25:01,062 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:25:01,070 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 12:25:01,121 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:25:01,129 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:25:01,136 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:25:01,156 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 12:25:01,156 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:25:01,175 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 12:25:01,175 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:25:01,201 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 12:25:01,201 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 12:25:02,358 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-24 12:25:02,385 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-24 12:25:02,386 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [12] total 31 [2018-01-24 12:25:02,386 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-01-24 12:25:02,387 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-01-24 12:25:02,387 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=126, Invalid=804, Unknown=0, NotChecked=0, Total=930 [2018-01-24 12:25:02,387 INFO L87 Difference]: Start difference. First operand 133 states and 136 transitions. Second operand 31 states. [2018-01-24 12:25:04,211 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:04,212 INFO L93 Difference]: Finished difference Result 235 states and 243 transitions. [2018-01-24 12:25:04,212 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-24 12:25:04,212 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 88 [2018-01-24 12:25:04,213 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:04,213 INFO L225 Difference]: With dead ends: 235 [2018-01-24 12:25:04,214 INFO L226 Difference]: Without dead ends: 132 [2018-01-24 12:25:04,215 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 67 SyntacticMatches, 3 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 488 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=286, Invalid=1876, Unknown=0, NotChecked=0, Total=2162 [2018-01-24 12:25:04,215 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-01-24 12:25:04,242 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132. [2018-01-24 12:25:04,242 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-01-24 12:25:04,243 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 135 transitions. [2018-01-24 12:25:04,243 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 135 transitions. Word has length 88 [2018-01-24 12:25:04,243 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:04,243 INFO L432 AbstractCegarLoop]: Abstraction has 132 states and 135 transitions. [2018-01-24 12:25:04,244 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-01-24 12:25:04,244 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 135 transitions. [2018-01-24 12:25:04,244 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-01-24 12:25:04,244 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:04,245 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:04,245 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:04,245 INFO L82 PathProgramCache]: Analyzing trace with hash -2005833160, now seen corresponding path program 1 times [2018-01-24 12:25:04,245 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:04,245 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:04,246 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:04,246 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:25:04,246 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:04,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:04,267 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:04,380 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-24 12:25:04,381 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:25:04,381 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-24 12:25:04,381 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-24 12:25:04,381 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-24 12:25:04,381 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-01-24 12:25:04,381 INFO L87 Difference]: Start difference. First operand 132 states and 135 transitions. Second operand 11 states. [2018-01-24 12:25:04,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:04,445 INFO L93 Difference]: Finished difference Result 138 states and 140 transitions. [2018-01-24 12:25:04,445 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 12:25:04,445 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 87 [2018-01-24 12:25:04,446 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:04,446 INFO L225 Difference]: With dead ends: 138 [2018-01-24 12:25:04,446 INFO L226 Difference]: Without dead ends: 132 [2018-01-24 12:25:04,446 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2018-01-24 12:25:04,447 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-01-24 12:25:04,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132. [2018-01-24 12:25:04,465 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-01-24 12:25:04,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 134 transitions. [2018-01-24 12:25:04,466 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 134 transitions. Word has length 87 [2018-01-24 12:25:04,466 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:04,466 INFO L432 AbstractCegarLoop]: Abstraction has 132 states and 134 transitions. [2018-01-24 12:25:04,466 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-24 12:25:04,466 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 134 transitions. [2018-01-24 12:25:04,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2018-01-24 12:25:04,467 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:04,467 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:04,467 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:04,467 INFO L82 PathProgramCache]: Analyzing trace with hash -1275758021, now seen corresponding path program 1 times [2018-01-24 12:25:04,467 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:04,467 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:04,468 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:04,468 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:04,468 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:04,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:04,492 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:04,908 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-24 12:25:04,909 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:25:04,909 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2018-01-24 12:25:04,909 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-24 12:25:04,909 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-24 12:25:04,910 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=419, Unknown=0, NotChecked=0, Total=462 [2018-01-24 12:25:04,910 INFO L87 Difference]: Start difference. First operand 132 states and 134 transitions. Second operand 22 states. [2018-01-24 12:25:05,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:05,374 INFO L93 Difference]: Finished difference Result 137 states and 139 transitions. [2018-01-24 12:25:05,374 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-24 12:25:05,374 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 103 [2018-01-24 12:25:05,374 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:05,375 INFO L225 Difference]: With dead ends: 137 [2018-01-24 12:25:05,375 INFO L226 Difference]: Without dead ends: 135 [2018-01-24 12:25:05,375 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=75, Invalid=795, Unknown=0, NotChecked=0, Total=870 [2018-01-24 12:25:05,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-01-24 12:25:05,401 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 130. [2018-01-24 12:25:05,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-01-24 12:25:05,402 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 132 transitions. [2018-01-24 12:25:05,402 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 132 transitions. Word has length 103 [2018-01-24 12:25:05,402 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:05,402 INFO L432 AbstractCegarLoop]: Abstraction has 130 states and 132 transitions. [2018-01-24 12:25:05,402 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-24 12:25:05,402 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 132 transitions. [2018-01-24 12:25:05,403 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2018-01-24 12:25:05,403 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:05,403 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:05,403 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:05,403 INFO L82 PathProgramCache]: Analyzing trace with hash -1275758020, now seen corresponding path program 1 times [2018-01-24 12:25:05,403 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:05,404 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:05,404 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:05,404 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:05,405 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:05,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:05,433 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:05,630 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:05,631 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:25:05,631 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:25:05,638 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:05,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:05,712 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:25:05,751 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:05,785 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:25:05,786 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 14 [2018-01-24 12:25:05,786 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-24 12:25:05,786 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-24 12:25:05,787 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=102, Unknown=0, NotChecked=0, Total=182 [2018-01-24 12:25:05,787 INFO L87 Difference]: Start difference. First operand 130 states and 132 transitions. Second operand 14 states. [2018-01-24 12:25:05,860 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:05,860 INFO L93 Difference]: Finished difference Result 230 states and 234 transitions. [2018-01-24 12:25:05,860 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-24 12:25:05,860 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 103 [2018-01-24 12:25:05,860 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:05,861 INFO L225 Difference]: With dead ends: 230 [2018-01-24 12:25:05,861 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 12:25:05,862 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 103 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=84, Invalid=126, Unknown=0, NotChecked=0, Total=210 [2018-01-24 12:25:05,862 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 12:25:05,887 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 131. [2018-01-24 12:25:05,887 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-01-24 12:25:05,946 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 133 transitions. [2018-01-24 12:25:05,946 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 133 transitions. Word has length 103 [2018-01-24 12:25:05,946 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:05,946 INFO L432 AbstractCegarLoop]: Abstraction has 131 states and 133 transitions. [2018-01-24 12:25:05,947 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-24 12:25:05,947 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 133 transitions. [2018-01-24 12:25:05,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-01-24 12:25:05,948 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:05,948 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:05,948 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:05,948 INFO L82 PathProgramCache]: Analyzing trace with hash 666975281, now seen corresponding path program 2 times [2018-01-24 12:25:05,948 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:05,948 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:05,949 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:05,949 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:05,949 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:05,977 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:05,979 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:06,158 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:06,159 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:25:06,159 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:25:06,164 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 12:25:06,204 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:25:06,209 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:25:06,215 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:25:06,220 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 12:25:06,221 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:25:06,241 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 12:25:06,241 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:25:06,254 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 12:25:06,254 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 12:25:07,479 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2018-01-24 12:25:07,500 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-24 12:25:07,500 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [14] total 37 [2018-01-24 12:25:07,501 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-01-24 12:25:07,501 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-01-24 12:25:07,501 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=165, Invalid=1167, Unknown=0, NotChecked=0, Total=1332 [2018-01-24 12:25:07,501 INFO L87 Difference]: Start difference. First operand 131 states and 133 transitions. Second operand 37 states. [2018-01-24 12:25:09,700 WARN L143 SmtUtils]: Spent 2024ms on a formula simplification that was a NOOP. DAG size: 34 [2018-01-24 12:25:12,142 WARN L143 SmtUtils]: Spent 2022ms on a formula simplification that was a NOOP. DAG size: 35 [2018-01-24 12:25:13,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:13,426 INFO L93 Difference]: Finished difference Result 229 states and 235 transitions. [2018-01-24 12:25:13,426 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-01-24 12:25:13,426 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 104 [2018-01-24 12:25:13,426 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:13,427 INFO L225 Difference]: With dead ends: 229 [2018-01-24 12:25:13,427 INFO L226 Difference]: Without dead ends: 130 [2018-01-24 12:25:13,428 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 77 SyntacticMatches, 5 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 768 ImplicationChecksByTransitivity, 6.0s TimeCoverageRelationStatistics Valid=385, Invalid=2807, Unknown=0, NotChecked=0, Total=3192 [2018-01-24 12:25:13,428 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-01-24 12:25:13,446 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 130. [2018-01-24 12:25:13,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-01-24 12:25:13,447 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 132 transitions. [2018-01-24 12:25:13,447 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 132 transitions. Word has length 104 [2018-01-24 12:25:13,447 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:13,447 INFO L432 AbstractCegarLoop]: Abstraction has 130 states and 132 transitions. [2018-01-24 12:25:13,448 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-01-24 12:25:13,448 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 132 transitions. [2018-01-24 12:25:13,448 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-01-24 12:25:13,448 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:13,448 INFO L322 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:13,448 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:13,449 INFO L82 PathProgramCache]: Analyzing trace with hash -603686051, now seen corresponding path program 1 times [2018-01-24 12:25:13,449 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:13,449 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:13,450 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:13,450 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:25:13,450 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:13,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:13,470 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:13,624 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:13,625 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:25:13,625 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:25:13,630 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:13,682 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:13,686 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:25:13,699 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:13,720 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:25:13,720 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16 [2018-01-24 12:25:13,720 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-24 12:25:13,721 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-24 12:25:13,721 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=133, Unknown=0, NotChecked=0, Total=240 [2018-01-24 12:25:13,721 INFO L87 Difference]: Start difference. First operand 130 states and 132 transitions. Second operand 16 states. [2018-01-24 12:25:13,777 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:13,777 INFO L93 Difference]: Finished difference Result 228 states and 232 transitions. [2018-01-24 12:25:13,777 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-24 12:25:13,777 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 109 [2018-01-24 12:25:13,778 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:13,778 INFO L225 Difference]: With dead ends: 228 [2018-01-24 12:25:13,778 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 12:25:13,779 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 124 GetRequests, 109 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=111, Invalid=161, Unknown=0, NotChecked=0, Total=272 [2018-01-24 12:25:13,779 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 12:25:13,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 131. [2018-01-24 12:25:13,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-01-24 12:25:13,827 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 133 transitions. [2018-01-24 12:25:13,827 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 133 transitions. Word has length 109 [2018-01-24 12:25:13,827 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:13,827 INFO L432 AbstractCegarLoop]: Abstraction has 131 states and 133 transitions. [2018-01-24 12:25:13,827 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-24 12:25:13,827 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 133 transitions. [2018-01-24 12:25:13,828 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2018-01-24 12:25:13,828 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:13,828 INFO L322 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:13,828 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:13,829 INFO L82 PathProgramCache]: Analyzing trace with hash 1049768338, now seen corresponding path program 2 times [2018-01-24 12:25:13,829 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:13,829 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:13,830 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:13,830 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:13,830 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:13,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:13,855 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:14,212 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:14,212 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:25:14,212 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:25:14,224 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 12:25:14,285 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:25:14,297 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:25:14,307 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:25:14,426 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-24 12:25:14,427 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 12:25:14,427 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:25:14,428 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:25:14,429 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:25:14,429 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-01-24 12:25:14,511 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 12:25:14,513 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 12:25:14,516 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 12:25:14,517 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:26 [2018-01-24 12:25:14,551 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2018-01-24 12:25:14,553 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:25:14,556 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 35 [2018-01-24 12:25:14,559 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:25:14,560 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:25:14,563 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 37 [2018-01-24 12:25:14,563 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 12:25:14,570 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:25:14,573 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:25:14,577 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:25:14,577 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9 [2018-01-24 12:25:14,947 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:25:14,947 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 36 [2018-01-24 12:25:14,949 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 12:25:14,950 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:25:14,950 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 15 [2018-01-24 12:25:14,951 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:25:14,953 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:25:14,955 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:25:14,955 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:13 [2018-01-24 12:25:15,358 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-01-24 12:25:15,360 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-01-24 12:25:15,360 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:25:15,361 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:25:15,362 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:25:15,362 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-01-24 12:25:15,407 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-24 12:25:15,426 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-24 12:25:15,427 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [41] imperfect sequences [16] total 55 [2018-01-24 12:25:15,427 INFO L409 AbstractCegarLoop]: Interpolant automaton has 55 states [2018-01-24 12:25:15,427 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2018-01-24 12:25:15,428 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=197, Invalid=2773, Unknown=0, NotChecked=0, Total=2970 [2018-01-24 12:25:15,428 INFO L87 Difference]: Start difference. First operand 131 states and 133 transitions. Second operand 55 states. [2018-01-24 12:25:17,263 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:17,263 INFO L93 Difference]: Finished difference Result 209 states and 215 transitions. [2018-01-24 12:25:17,264 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2018-01-24 12:25:17,264 INFO L78 Accepts]: Start accepts. Automaton has 55 states. Word has length 110 [2018-01-24 12:25:17,264 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:17,264 INFO L225 Difference]: With dead ends: 209 [2018-01-24 12:25:17,264 INFO L226 Difference]: Without dead ends: 112 [2018-01-24 12:25:17,266 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 148 GetRequests, 72 SyntacticMatches, 0 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1033 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=313, Invalid=5693, Unknown=0, NotChecked=0, Total=6006 [2018-01-24 12:25:17,267 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2018-01-24 12:25:17,288 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2018-01-24 12:25:17,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-01-24 12:25:17,288 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 112 transitions. [2018-01-24 12:25:17,288 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 112 transitions. Word has length 110 [2018-01-24 12:25:17,289 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:17,289 INFO L432 AbstractCegarLoop]: Abstraction has 112 states and 112 transitions. [2018-01-24 12:25:17,289 INFO L433 AbstractCegarLoop]: Interpolant automaton has 55 states. [2018-01-24 12:25:17,289 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 112 transitions. [2018-01-24 12:25:17,289 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-01-24 12:25:17,289 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:17,290 INFO L322 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:17,290 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:17,290 INFO L82 PathProgramCache]: Analyzing trace with hash 1499710248, now seen corresponding path program 1 times [2018-01-24 12:25:17,290 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:17,290 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:17,291 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:17,291 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:25:17,292 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:17,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:17,309 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:17,480 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:17,481 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:25:17,481 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:25:17,489 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:17,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:17,548 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:25:17,589 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:17,610 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:25:17,611 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18 [2018-01-24 12:25:17,611 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-24 12:25:17,611 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-24 12:25:17,611 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=168, Unknown=0, NotChecked=0, Total=306 [2018-01-24 12:25:17,611 INFO L87 Difference]: Start difference. First operand 112 states and 112 transitions. Second operand 18 states. [2018-01-24 12:25:17,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:17,667 INFO L93 Difference]: Finished difference Result 190 states and 190 transitions. [2018-01-24 12:25:17,667 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-24 12:25:17,667 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 111 [2018-01-24 12:25:17,667 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:17,668 INFO L225 Difference]: With dead ends: 190 [2018-01-24 12:25:17,668 INFO L226 Difference]: Without dead ends: 113 [2018-01-24 12:25:17,668 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 111 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=142, Invalid=200, Unknown=0, NotChecked=0, Total=342 [2018-01-24 12:25:17,669 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-01-24 12:25:17,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2018-01-24 12:25:17,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-01-24 12:25:17,688 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 113 transitions. [2018-01-24 12:25:17,689 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 113 transitions. Word has length 111 [2018-01-24 12:25:17,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:17,689 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 113 transitions. [2018-01-24 12:25:17,689 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-24 12:25:17,689 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 113 transitions. [2018-01-24 12:25:17,689 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-01-24 12:25:17,690 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:17,690 INFO L322 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:17,690 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:17,690 INFO L82 PathProgramCache]: Analyzing trace with hash 1331478557, now seen corresponding path program 2 times [2018-01-24 12:25:17,690 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:17,690 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:17,691 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:17,691 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:17,691 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:17,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:17,711 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:18,117 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:18,117 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:25:18,117 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:25:18,125 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 12:25:18,171 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:25:18,200 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:25:18,203 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:25:18,207 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:25:18,236 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:18,258 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:25:18,258 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19 [2018-01-24 12:25:18,259 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-24 12:25:18,259 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-24 12:25:18,259 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-24 12:25:18,259 INFO L87 Difference]: Start difference. First operand 113 states and 113 transitions. Second operand 19 states. [2018-01-24 12:25:18,339 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:18,339 INFO L93 Difference]: Finished difference Result 191 states and 191 transitions. [2018-01-24 12:25:18,340 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-24 12:25:18,340 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 112 [2018-01-24 12:25:18,341 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:18,341 INFO L225 Difference]: With dead ends: 191 [2018-01-24 12:25:18,341 INFO L226 Difference]: Without dead ends: 114 [2018-01-24 12:25:18,342 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 130 GetRequests, 112 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=159, Invalid=221, Unknown=0, NotChecked=0, Total=380 [2018-01-24 12:25:18,343 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-01-24 12:25:18,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 114. [2018-01-24 12:25:18,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-01-24 12:25:18,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 114 transitions. [2018-01-24 12:25:18,378 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 114 transitions. Word has length 112 [2018-01-24 12:25:18,378 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:18,378 INFO L432 AbstractCegarLoop]: Abstraction has 114 states and 114 transitions. [2018-01-24 12:25:18,378 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-24 12:25:18,378 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 114 transitions. [2018-01-24 12:25:18,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-01-24 12:25:18,379 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:18,379 INFO L322 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:18,379 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:18,380 INFO L82 PathProgramCache]: Analyzing trace with hash 411263432, now seen corresponding path program 3 times [2018-01-24 12:25:18,380 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:18,380 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:18,381 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:18,381 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:25:18,381 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:18,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:18,405 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:18,643 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:18,644 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:25:18,644 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:25:18,649 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 12:25:18,692 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 12:25:18,715 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 12:25:18,766 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 12:25:19,085 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 12:25:19,502 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 12:25:21,040 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 12:25:22,806 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 12:25:25,499 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 12:25:29,533 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 12:25:29,536 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:25:29,545 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:25:29,558 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:29,581 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:25:29,581 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 20 [2018-01-24 12:25:29,581 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-24 12:25:29,581 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-24 12:25:29,582 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=207, Unknown=0, NotChecked=0, Total=380 [2018-01-24 12:25:29,582 INFO L87 Difference]: Start difference. First operand 114 states and 114 transitions. Second operand 20 states. [2018-01-24 12:25:29,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:29,636 INFO L93 Difference]: Finished difference Result 192 states and 192 transitions. [2018-01-24 12:25:29,636 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-24 12:25:29,637 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 113 [2018-01-24 12:25:29,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:29,637 INFO L225 Difference]: With dead ends: 192 [2018-01-24 12:25:29,637 INFO L226 Difference]: Without dead ends: 115 [2018-01-24 12:25:29,638 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 113 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=177, Invalid=243, Unknown=0, NotChecked=0, Total=420 [2018-01-24 12:25:29,638 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-01-24 12:25:29,659 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 115. [2018-01-24 12:25:29,659 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-01-24 12:25:29,660 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 115 transitions. [2018-01-24 12:25:29,660 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 115 transitions. Word has length 113 [2018-01-24 12:25:29,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:29,660 INFO L432 AbstractCegarLoop]: Abstraction has 115 states and 115 transitions. [2018-01-24 12:25:29,660 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-24 12:25:29,660 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 115 transitions. [2018-01-24 12:25:29,661 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-01-24 12:25:29,661 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:29,661 INFO L322 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:29,661 INFO L371 AbstractCegarLoop]: === Iteration 33 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:29,661 INFO L82 PathProgramCache]: Analyzing trace with hash 1949365629, now seen corresponding path program 4 times [2018-01-24 12:25:29,662 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:29,662 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:29,662 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:29,662 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:25:29,662 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:29,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-24 12:25:29,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is sat [2018-01-24 12:25:29,795 INFO L381 BasicCegarLoop]: Counterexample might be feasible [2018-01-24 12:25:29,817 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) [2018-01-24 12:25:29,826 WARN L343 cessorBacktranslator]: Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) [2018-01-24 12:25:29,850 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.01 12:25:29 BoogieIcfgContainer [2018-01-24 12:25:29,850 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-24 12:25:29,851 INFO L168 Benchmark]: Toolchain (without parser) took 52667.63 ms. Allocated memory was 305.7 MB in the beginning and 725.6 MB in the end (delta: 420.0 MB). Free memory was 264.7 MB in the beginning and 458.8 MB in the end (delta: -194.0 MB). Peak memory consumption was 225.9 MB. Max. memory is 5.3 GB. [2018-01-24 12:25:29,853 INFO L168 Benchmark]: CDTParser took 0.27 ms. Allocated memory is still 305.7 MB. Free memory is still 270.7 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-24 12:25:29,853 INFO L168 Benchmark]: CACSL2BoogieTranslator took 249.43 ms. Allocated memory is still 305.7 MB. Free memory was 264.7 MB in the beginning and 250.7 MB in the end (delta: 14.1 MB). Peak memory consumption was 14.1 MB. Max. memory is 5.3 GB. [2018-01-24 12:25:29,854 INFO L168 Benchmark]: Boogie Preprocessor took 45.59 ms. Allocated memory is still 305.7 MB. Free memory was 250.7 MB in the beginning and 248.6 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 5.3 GB. [2018-01-24 12:25:29,854 INFO L168 Benchmark]: RCFGBuilder took 505.09 ms. Allocated memory is still 305.7 MB. Free memory was 248.6 MB in the beginning and 214.0 MB in the end (delta: 34.5 MB). Peak memory consumption was 34.5 MB. Max. memory is 5.3 GB. [2018-01-24 12:25:29,854 INFO L168 Benchmark]: TraceAbstraction took 51858.60 ms. Allocated memory was 305.7 MB in the beginning and 725.6 MB in the end (delta: 420.0 MB). Free memory was 214.0 MB in the beginning and 458.8 MB in the end (delta: -244.7 MB). Peak memory consumption was 175.2 MB. Max. memory is 5.3 GB. [2018-01-24 12:25:29,857 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.27 ms. Allocated memory is still 305.7 MB. Free memory is still 270.7 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 249.43 ms. Allocated memory is still 305.7 MB. Free memory was 264.7 MB in the beginning and 250.7 MB in the end (delta: 14.1 MB). Peak memory consumption was 14.1 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 45.59 ms. Allocated memory is still 305.7 MB. Free memory was 250.7 MB in the beginning and 248.6 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 5.3 GB. * RCFGBuilder took 505.09 ms. Allocated memory is still 305.7 MB. Free memory was 248.6 MB in the beginning and 214.0 MB in the end (delta: 34.5 MB). Peak memory consumption was 34.5 MB. Max. memory is 5.3 GB. * TraceAbstraction took 51858.60 ms. Allocated memory was 305.7 MB in the beginning and 725.6 MB in the end (delta: 420.0 MB). Free memory was 214.0 MB in the beginning and 458.8 MB in the end (delta: -244.7 MB). Peak memory consumption was 175.2 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.boogie.preprocessor: - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification free ensures #res.base == #ptr.base && #res.offset == #ptr.offset; is not ensure(true) - GenericResult: Unfinished Backtranslation Generated EnsuresSpecification ensures #valid == old(#valid); is not ensure(true) * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - UnprovableResult [Line: 1443]: Unable to prove that all allocated memory was freed Unable to prove that all allocated memory was freed Reason: overapproximation of memtrack at line 1443. Possible FailurePath: [L1444] CALL entry_point() [L1436] struct ldv_kobject *kobj; [L1437] CALL, EXPR ldv_kobject_create() [L1406] struct ldv_kobject *kobj; [L1408] CALL, EXPR ldv_malloc(sizeof(*kobj)) VAL [\old(size)=16] [L1073] COND TRUE __VERIFIER_nondet_int() [L1074] EXPR, FCALL malloc(size) VAL [\old(size)=16, malloc(size)={19:0}, size=16] [L1074] RET return malloc(size); VAL [\old(size)=16, \result={19:0}, malloc(size)={19:0}, size=16] [L1408] EXPR ldv_malloc(sizeof(*kobj)) VAL [ldv_malloc(sizeof(*kobj))={19:0}] [L1408] kobj = ldv_malloc(sizeof(*kobj)) [L1409] COND FALSE !(!kobj) VAL [kobj={19:0}] [L1411] FCALL memset(kobj, 0, sizeof(*kobj)) VAL [kobj={19:0}, memset(kobj, 0, sizeof(*kobj))={19:0}] [L1413] CALL ldv_kobject_init(kobj) VAL [kobj={19:0}] [L1394] COND FALSE !(!kobj) VAL [kobj={19:0}, kobj={19:0}] [L1398] CALL ldv_kobject_init_internal(kobj) VAL [kobj={19:0}] [L1380] COND FALSE !(!kobj) VAL [kobj={19:0}, kobj={19:0}] [L1382] CALL ldv_kref_init(&kobj->kref) VAL [kref={19:12}] [L1294] RET, FCALL ((&kref->refcount)->counter) = (1) VAL [kref={19:12}, kref={19:12}] [L1382] ldv_kref_init(&kobj->kref) VAL [kobj={19:0}, kobj={19:0}] [L1383] CALL LDV_INIT_LIST_HEAD(&kobj->entry) VAL [list={19:4}] [L1099] FCALL list->next = list VAL [list={19:4}, list={19:4}] [L1100] FCALL list->prev = list VAL [list={19:4}, list={19:4}] [L1383] RET, FCALL LDV_INIT_LIST_HEAD(&kobj->entry) VAL [kobj={19:0}, kobj={19:0}] [L1413] ldv_kobject_init(kobj) VAL [kobj={19:0}] [L1414] RET return kobj; VAL [\result={19:0}, kobj={19:0}] [L1437] EXPR ldv_kobject_create() VAL [ldv_kobject_create()={19:0}] [L1437] kobj = ldv_kobject_create() [L1438] CALL ldv_kobject_get(kobj) VAL [kobj={19:0}] [L1373] COND TRUE \read(*kobj) VAL [kobj={19:0}, kobj={19:0}] [L1374] CALL ldv_kref_get(&kobj->kref) VAL [kref={19:12}] [L1308] CALL ldv_atomic_add_return(1, (&kref->refcount)) VAL [\old(i)=1, v={19:12}] [L1255] int temp; VAL [\old(i)=1, i=1, v={19:12}, v={19:12}] [L1256] EXPR, FCALL v->counter VAL [\old(i)=1, i=1, v={19:12}, v={19:12}, v->counter=1] [L1256] temp = v->counter [L1257] temp += i VAL [\old(i)=1, i=1, temp=2, v={19:12}, v={19:12}] [L1258] FCALL v->counter = temp VAL [\old(i)=1, i=1, temp=2, v={19:12}, v={19:12}] [L1259] RET return temp; VAL [\old(i)=1, \result=2, i=1, temp=2, v={19:12}, v={19:12}] [L1308] RET ldv_atomic_add_return(1, (&kref->refcount)) VAL [kref={19:12}, kref={19:12}, ldv_atomic_add_return(1, (&kref->refcount))=2] [L1374] ldv_kref_get(&kobj->kref) VAL [kobj={19:0}, kobj={19:0}] [L1375] RET return kobj; VAL [\result={19:0}, kobj={19:0}, kobj={19:0}] [L1438] ldv_kobject_get(kobj) VAL [kobj={19:0}, ldv_kobject_get(kobj)={19:0}] [L1440] CALL ldv_kobject_put(kobj) VAL [kobj={19:0}] [L1361] COND TRUE \read(*kobj) VAL [kobj={19:0}, kobj={19:0}] [L1363] CALL ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kref={19:12}, release={-1:0}] [L1313] CALL, EXPR ldv_kref_sub(kref, 1, release) VAL [\old(count)=1, kref={19:12}, release={-1:0}] [L1281] CALL, EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(i)=1, v={19:12}] [L1264] int temp; VAL [\old(i)=1, i=1, v={19:12}, v={19:12}] [L1265] EXPR, FCALL v->counter VAL [\old(i)=1, i=1, v={19:12}, v={19:12}, v->counter=2] [L1265] temp = v->counter [L1266] temp -= i VAL [\old(i)=1, i=1, temp=1, v={19:12}, v={19:12}] [L1267] FCALL v->counter = temp VAL [\old(i)=1, i=1, temp=1, v={19:12}, v={19:12}] [L1268] RET return temp; VAL [\old(i)=1, \result=1, i=1, temp=1, v={19:12}, v={19:12}] [L1281] EXPR ldv_atomic_sub_return(((int) count), (&kref->refcount)) VAL [\old(count)=1, count=1, kref={19:12}, kref={19:12}, ldv_atomic_sub_return(((int) count), (&kref->refcount))=1, release={-1:0}, release={-1:0}] [L1281] COND FALSE !((ldv_atomic_sub_return(((int) count), (&kref->refcount)) == 0)) [L1285] RET return 0; VAL [\old(count)=1, \result=0, count=1, kref={19:12}, kref={19:12}, release={-1:0}, release={-1:0}] [L1313] EXPR ldv_kref_sub(kref, 1, release) VAL [kref={19:12}, kref={19:12}, ldv_kref_sub(kref, 1, release)=0, release={-1:0}, release={-1:0}] [L1313] RET return ldv_kref_sub(kref, 1, release); [L1363] ldv_kref_put(&kobj->kref, ldv_kobject_release) VAL [kobj={19:0}, kobj={19:0}, ldv_kref_put(&kobj->kref, ldv_kobject_release)=0] [L1440] FCALL ldv_kobject_put(kobj) - StatisticsResult: Ultimate Automizer benchmark data CFG has 21 procedures, 142 locations, 23 error locations. UNSAFE Result, 51.7s OverallTime, 33 OverallIterations, 16 TraceHistogramMax, 24.8s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3833 SDtfs, 1164 SDslu, 33575 SDs, 0 SdLazy, 11592 SolverSat, 335 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 7.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1685 GetRequests, 1125 SyntacticMatches, 11 SemanticMatches, 549 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3198 ImplicationChecksByTransitivity, 26.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=157occurred in iteration=8, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.6s AutomataMinimizationTime, 32 MinimizatonAttempts, 58 StatesRemovedByMinimization, 9 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 11.9s SatisfiabilityAnalysisTime, 12.8s InterpolantComputationTime, 3365 NumberOfCodeBlocks, 3323 NumberOfCodeBlocksAsserted, 57 NumberOfCheckSat, 3204 ConstructedInterpolants, 272 QuantifiedInterpolants, 1002137 SizeOfPredicates, 112 NumberOfNonLiveVariables, 5589 ConjunctsInSsa, 562 ConjunctsInUnsatCore, 47 InterpolantComputations, 23 PerfectInterpolantSequences, 400/1557 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate could not prove your program: unable to determine feasibility of some traces Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_1_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-24_12-25-29-865.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_1_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-24_12-25-29-865.csv Received shutdown request...