java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_3_false-valid-deref.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-24 12:18:02,660 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-24 12:18:02,662 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-24 12:18:02,675 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-24 12:18:02,675 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-24 12:18:02,676 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-24 12:18:02,677 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-24 12:18:02,679 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-24 12:18:02,681 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-24 12:18:02,682 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-24 12:18:02,682 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-24 12:18:02,682 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-24 12:18:02,683 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-24 12:18:02,684 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-24 12:18:02,685 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-24 12:18:02,687 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-24 12:18:02,689 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-24 12:18:02,691 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-24 12:18:02,693 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-24 12:18:02,694 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-24 12:18:02,696 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-24 12:18:02,697 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-24 12:18:02,697 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-24 12:18:02,698 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-24 12:18:02,699 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-24 12:18:02,700 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-24 12:18:02,700 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-24 12:18:02,701 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-24 12:18:02,701 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-24 12:18:02,702 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-24 12:18:02,702 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-24 12:18:02,703 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ.epf [2018-01-24 12:18:02,712 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-24 12:18:02,712 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-24 12:18:02,713 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-24 12:18:02,714 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-24 12:18:02,714 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-24 12:18:02,714 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-24 12:18:02,714 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-24 12:18:02,715 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-24 12:18:02,715 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-24 12:18:02,715 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-24 12:18:02,715 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-24 12:18:02,715 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-24 12:18:02,716 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-24 12:18:02,716 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-24 12:18:02,716 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-24 12:18:02,716 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-24 12:18:02,716 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-24 12:18:02,717 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-24 12:18:02,717 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-24 12:18:02,717 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-24 12:18:02,717 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-24 12:18:02,718 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-24 12:18:02,718 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-24 12:18:02,718 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 12:18:02,718 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-24 12:18:02,718 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-24 12:18:02,719 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-24 12:18:02,719 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-24 12:18:02,719 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-01-24 12:18:02,719 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-24 12:18:02,719 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-24 12:18:02,719 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-24 12:18:02,720 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-24 12:18:02,721 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-24 12:18:02,757 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-24 12:18:02,770 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-24 12:18:02,774 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-24 12:18:02,775 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-24 12:18:02,776 INFO L276 PluginConnector]: CDTParser initialized [2018-01-24 12:18:02,776 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_3_false-valid-deref.i [2018-01-24 12:18:02,952 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-24 12:18:02,959 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-24 12:18:02,960 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-24 12:18:02,960 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-24 12:18:02,966 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-24 12:18:02,967 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 12:18:02" (1/1) ... [2018-01-24 12:18:02,970 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@42577689 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:18:02, skipping insertion in model container [2018-01-24 12:18:02,971 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 12:18:02" (1/1) ... [2018-01-24 12:18:02,990 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 12:18:03,041 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 12:18:03,163 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 12:18:03,185 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 12:18:03,197 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:18:03 WrapperNode [2018-01-24 12:18:03,197 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-24 12:18:03,198 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-24 12:18:03,198 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-24 12:18:03,199 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-24 12:18:03,216 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:18:03" (1/1) ... [2018-01-24 12:18:03,217 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:18:03" (1/1) ... [2018-01-24 12:18:03,232 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:18:03" (1/1) ... [2018-01-24 12:18:03,233 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:18:03" (1/1) ... [2018-01-24 12:18:03,240 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:18:03" (1/1) ... [2018-01-24 12:18:03,244 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:18:03" (1/1) ... [2018-01-24 12:18:03,245 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:18:03" (1/1) ... [2018-01-24 12:18:03,248 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-24 12:18:03,248 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-24 12:18:03,248 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-24 12:18:03,248 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-24 12:18:03,249 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:18:03" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 12:18:03,306 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-24 12:18:03,306 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-24 12:18:03,306 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-01-24 12:18:03,306 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-01-24 12:18:03,306 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-01-24 12:18:03,307 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-01-24 12:18:03,307 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-01-24 12:18:03,307 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-01-24 12:18:03,307 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-01-24 12:18:03,307 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-01-24 12:18:03,307 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-01-24 12:18:03,307 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-01-24 12:18:03,308 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-01-24 12:18:03,308 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-01-24 12:18:03,308 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-01-24 12:18:03,308 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-01-24 12:18:03,308 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-24 12:18:03,308 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-24 12:18:03,309 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-24 12:18:03,309 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-24 12:18:03,309 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-24 12:18:03,309 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-24 12:18:03,309 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-24 12:18:03,309 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-24 12:18:03,310 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-24 12:18:03,310 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-24 12:18:03,310 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-24 12:18:03,310 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-24 12:18:03,310 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-24 12:18:03,310 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-24 12:18:03,311 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-01-24 12:18:03,311 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-01-24 12:18:03,311 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-01-24 12:18:03,311 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-01-24 12:18:03,311 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-01-24 12:18:03,311 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-01-24 12:18:03,311 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-01-24 12:18:03,312 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-01-24 12:18:03,312 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-01-24 12:18:03,312 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-01-24 12:18:03,312 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-01-24 12:18:03,312 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-01-24 12:18:03,312 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-01-24 12:18:03,312 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-01-24 12:18:03,313 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-24 12:18:03,313 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-24 12:18:03,313 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-24 12:18:03,574 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-01-24 12:18:03,729 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-24 12:18:03,730 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 12:18:03 BoogieIcfgContainer [2018-01-24 12:18:03,730 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-24 12:18:03,731 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-24 12:18:03,731 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-24 12:18:03,733 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-24 12:18:03,733 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.01 12:18:02" (1/3) ... [2018-01-24 12:18:03,734 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1733c5de and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 12:18:03, skipping insertion in model container [2018-01-24 12:18:03,734 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:18:03" (2/3) ... [2018-01-24 12:18:03,735 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1733c5de and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 12:18:03, skipping insertion in model container [2018-01-24 12:18:03,735 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 12:18:03" (3/3) ... [2018-01-24 12:18:03,736 INFO L105 eAbstractionObserver]: Analyzing ICFG memleaks_test22_3_false-valid-deref.i [2018-01-24 12:18:03,744 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-24 12:18:03,752 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 19 error locations. [2018-01-24 12:18:03,804 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-24 12:18:03,804 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-24 12:18:03,804 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-24 12:18:03,804 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-24 12:18:03,805 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-24 12:18:03,805 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-24 12:18:03,805 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-24 12:18:03,805 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-24 12:18:03,806 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-24 12:18:03,829 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states. [2018-01-24 12:18:03,836 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-24 12:18:03,836 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:18:03,837 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:18:03,838 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:18:03,843 INFO L82 PathProgramCache]: Analyzing trace with hash 556227080, now seen corresponding path program 1 times [2018-01-24 12:18:03,845 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:18:03,846 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:18:03,895 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:03,895 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:18:03,895 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:03,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:03,957 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:18:04,099 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:04,101 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:18:04,101 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 12:18:04,103 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 12:18:04,183 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 12:18:04,184 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:18:04,186 INFO L87 Difference]: Start difference. First operand 119 states. Second operand 5 states. [2018-01-24 12:18:04,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:18:04,258 INFO L93 Difference]: Finished difference Result 226 states and 241 transitions. [2018-01-24 12:18:04,258 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 12:18:04,260 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-01-24 12:18:04,261 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:18:04,274 INFO L225 Difference]: With dead ends: 226 [2018-01-24 12:18:04,274 INFO L226 Difference]: Without dead ends: 122 [2018-01-24 12:18:04,279 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:18:04,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-01-24 12:18:04,314 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 120. [2018-01-24 12:18:04,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-01-24 12:18:04,317 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 128 transitions. [2018-01-24 12:18:04,319 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 128 transitions. Word has length 17 [2018-01-24 12:18:04,319 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:18:04,319 INFO L432 AbstractCegarLoop]: Abstraction has 120 states and 128 transitions. [2018-01-24 12:18:04,319 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 12:18:04,319 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 128 transitions. [2018-01-24 12:18:04,320 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 12:18:04,320 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:18:04,320 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:18:04,320 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:18:04,320 INFO L82 PathProgramCache]: Analyzing trace with hash -1895274134, now seen corresponding path program 1 times [2018-01-24 12:18:04,321 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:18:04,321 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:18:04,322 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:04,322 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:18:04,322 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:04,344 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:04,346 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:18:04,430 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:04,430 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:18:04,430 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 12:18:04,431 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 12:18:04,431 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 12:18:04,432 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:18:04,432 INFO L87 Difference]: Start difference. First operand 120 states and 128 transitions. Second operand 6 states. [2018-01-24 12:18:04,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:18:04,662 INFO L93 Difference]: Finished difference Result 122 states and 130 transitions. [2018-01-24 12:18:04,663 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 12:18:04,663 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-01-24 12:18:04,663 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:18:04,664 INFO L225 Difference]: With dead ends: 122 [2018-01-24 12:18:04,664 INFO L226 Difference]: Without dead ends: 121 [2018-01-24 12:18:04,665 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:18:04,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-01-24 12:18:04,673 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 119. [2018-01-24 12:18:04,673 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-01-24 12:18:04,675 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 127 transitions. [2018-01-24 12:18:04,675 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 127 transitions. Word has length 19 [2018-01-24 12:18:04,675 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:18:04,675 INFO L432 AbstractCegarLoop]: Abstraction has 119 states and 127 transitions. [2018-01-24 12:18:04,675 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 12:18:04,675 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 127 transitions. [2018-01-24 12:18:04,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 12:18:04,676 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:18:04,676 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:18:04,676 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:18:04,676 INFO L82 PathProgramCache]: Analyzing trace with hash -1895274133, now seen corresponding path program 1 times [2018-01-24 12:18:04,676 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:18:04,676 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:18:04,678 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:04,678 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:18:04,678 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:04,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:04,698 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:18:04,931 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:04,931 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:18:04,931 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 12:18:04,932 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 12:18:04,932 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 12:18:04,932 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:18:04,932 INFO L87 Difference]: Start difference. First operand 119 states and 127 transitions. Second operand 7 states. [2018-01-24 12:18:05,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:18:05,185 INFO L93 Difference]: Finished difference Result 121 states and 129 transitions. [2018-01-24 12:18:05,185 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 12:18:05,186 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-01-24 12:18:05,186 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:18:05,188 INFO L225 Difference]: With dead ends: 121 [2018-01-24 12:18:05,188 INFO L226 Difference]: Without dead ends: 120 [2018-01-24 12:18:05,189 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-01-24 12:18:05,189 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-01-24 12:18:05,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 118. [2018-01-24 12:18:05,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-01-24 12:18:05,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 126 transitions. [2018-01-24 12:18:05,202 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 126 transitions. Word has length 19 [2018-01-24 12:18:05,203 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:18:05,203 INFO L432 AbstractCegarLoop]: Abstraction has 118 states and 126 transitions. [2018-01-24 12:18:05,203 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 12:18:05,203 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 126 transitions. [2018-01-24 12:18:05,205 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-24 12:18:05,205 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:18:05,205 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:18:05,205 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:18:05,205 INFO L82 PathProgramCache]: Analyzing trace with hash 1715794329, now seen corresponding path program 1 times [2018-01-24 12:18:05,205 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:18:05,206 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:18:05,207 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:05,207 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:18:05,207 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:05,230 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:05,232 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:18:05,347 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:05,347 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:18:05,348 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-24 12:18:05,348 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 12:18:05,348 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 12:18:05,348 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:18:05,348 INFO L87 Difference]: Start difference. First operand 118 states and 126 transitions. Second operand 7 states. [2018-01-24 12:18:05,418 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:18:05,418 INFO L93 Difference]: Finished difference Result 188 states and 203 transitions. [2018-01-24 12:18:05,418 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 12:18:05,418 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 29 [2018-01-24 12:18:05,419 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:18:05,420 INFO L225 Difference]: With dead ends: 188 [2018-01-24 12:18:05,420 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 12:18:05,421 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-01-24 12:18:05,422 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 12:18:05,434 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 127. [2018-01-24 12:18:05,434 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-01-24 12:18:05,436 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 136 transitions. [2018-01-24 12:18:05,437 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 136 transitions. Word has length 29 [2018-01-24 12:18:05,437 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:18:05,438 INFO L432 AbstractCegarLoop]: Abstraction has 127 states and 136 transitions. [2018-01-24 12:18:05,438 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 12:18:05,438 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 136 transitions. [2018-01-24 12:18:05,439 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 12:18:05,439 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:18:05,440 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:18:05,440 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:18:05,440 INFO L82 PathProgramCache]: Analyzing trace with hash -785661208, now seen corresponding path program 1 times [2018-01-24 12:18:05,440 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:18:05,441 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:18:05,442 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:05,442 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:18:05,443 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:05,462 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:05,464 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:18:05,578 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:05,578 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:18:05,578 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 12:18:05,579 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 12:18:05,580 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 12:18:05,580 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 12:18:05,580 INFO L87 Difference]: Start difference. First operand 127 states and 136 transitions. Second operand 10 states. [2018-01-24 12:18:05,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:18:05,798 INFO L93 Difference]: Finished difference Result 127 states and 136 transitions. [2018-01-24 12:18:05,798 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 12:18:05,798 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 34 [2018-01-24 12:18:05,799 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:18:05,800 INFO L225 Difference]: With dead ends: 127 [2018-01-24 12:18:05,800 INFO L226 Difference]: Without dead ends: 126 [2018-01-24 12:18:05,801 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 12:18:05,801 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-01-24 12:18:05,812 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 126. [2018-01-24 12:18:05,812 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-01-24 12:18:05,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 135 transitions. [2018-01-24 12:18:05,814 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 135 transitions. Word has length 34 [2018-01-24 12:18:05,814 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:18:05,815 INFO L432 AbstractCegarLoop]: Abstraction has 126 states and 135 transitions. [2018-01-24 12:18:05,815 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 12:18:05,815 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 135 transitions. [2018-01-24 12:18:05,816 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 12:18:05,816 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:18:05,816 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:18:05,817 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:18:05,817 INFO L82 PathProgramCache]: Analyzing trace with hash -785661207, now seen corresponding path program 1 times [2018-01-24 12:18:05,817 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:18:05,817 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:18:05,818 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:05,818 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:18:05,818 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:05,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:05,835 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:18:05,863 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:05,863 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:18:05,863 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 12:18:05,864 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 12:18:05,864 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 12:18:05,864 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 12:18:05,864 INFO L87 Difference]: Start difference. First operand 126 states and 135 transitions. Second operand 4 states. [2018-01-24 12:18:05,886 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:18:05,887 INFO L93 Difference]: Finished difference Result 218 states and 233 transitions. [2018-01-24 12:18:05,887 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 12:18:05,887 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2018-01-24 12:18:05,888 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:18:05,889 INFO L225 Difference]: With dead ends: 218 [2018-01-24 12:18:05,890 INFO L226 Difference]: Without dead ends: 127 [2018-01-24 12:18:05,891 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:18:05,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-01-24 12:18:05,901 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2018-01-24 12:18:05,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-01-24 12:18:05,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 136 transitions. [2018-01-24 12:18:05,904 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 136 transitions. Word has length 34 [2018-01-24 12:18:05,904 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:18:05,904 INFO L432 AbstractCegarLoop]: Abstraction has 127 states and 136 transitions. [2018-01-24 12:18:05,904 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 12:18:05,904 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 136 transitions. [2018-01-24 12:18:05,905 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-24 12:18:05,906 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:18:05,906 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:18:05,906 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:18:05,906 INFO L82 PathProgramCache]: Analyzing trace with hash -1322241719, now seen corresponding path program 1 times [2018-01-24 12:18:05,906 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:18:05,906 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:18:05,908 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:05,908 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:18:05,908 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:05,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:05,919 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:18:05,955 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-24 12:18:05,956 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:18:05,956 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 12:18:05,956 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 12:18:05,956 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 12:18:05,956 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 12:18:05,957 INFO L87 Difference]: Start difference. First operand 127 states and 136 transitions. Second operand 3 states. [2018-01-24 12:18:06,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:18:06,064 INFO L93 Difference]: Finished difference Result 144 states and 155 transitions. [2018-01-24 12:18:06,064 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 12:18:06,064 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 32 [2018-01-24 12:18:06,065 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:18:06,066 INFO L225 Difference]: With dead ends: 144 [2018-01-24 12:18:06,066 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 12:18:06,066 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 12:18:06,066 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 12:18:06,076 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 123. [2018-01-24 12:18:06,077 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-01-24 12:18:06,078 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 131 transitions. [2018-01-24 12:18:06,078 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 131 transitions. Word has length 32 [2018-01-24 12:18:06,078 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:18:06,079 INFO L432 AbstractCegarLoop]: Abstraction has 123 states and 131 transitions. [2018-01-24 12:18:06,079 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 12:18:06,079 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 131 transitions. [2018-01-24 12:18:06,080 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-24 12:18:06,080 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:18:06,080 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:18:06,080 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:18:06,080 INFO L82 PathProgramCache]: Analyzing trace with hash 1082750419, now seen corresponding path program 1 times [2018-01-24 12:18:06,081 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:18:06,081 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:18:06,082 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:06,082 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:18:06,082 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:06,095 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:06,096 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:18:06,152 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:06,152 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:18:06,152 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:18:06,167 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:18:06,200 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:06,208 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:18:06,289 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:06,313 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:18:06,313 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-01-24 12:18:06,314 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 12:18:06,314 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 12:18:06,314 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:18:06,314 INFO L87 Difference]: Start difference. First operand 123 states and 131 transitions. Second operand 6 states. [2018-01-24 12:18:06,353 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:18:06,353 INFO L93 Difference]: Finished difference Result 215 states and 229 transitions. [2018-01-24 12:18:06,354 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 12:18:06,354 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-01-24 12:18:06,354 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:18:06,355 INFO L225 Difference]: With dead ends: 215 [2018-01-24 12:18:06,355 INFO L226 Difference]: Without dead ends: 124 [2018-01-24 12:18:06,356 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:18:06,356 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-01-24 12:18:06,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 124. [2018-01-24 12:18:06,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-01-24 12:18:06,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 132 transitions. [2018-01-24 12:18:06,367 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 132 transitions. Word has length 35 [2018-01-24 12:18:06,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:18:06,368 INFO L432 AbstractCegarLoop]: Abstraction has 124 states and 132 transitions. [2018-01-24 12:18:06,368 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 12:18:06,368 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 132 transitions. [2018-01-24 12:18:06,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 12:18:06,369 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:18:06,369 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:18:06,369 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:18:06,370 INFO L82 PathProgramCache]: Analyzing trace with hash -1962528345, now seen corresponding path program 1 times [2018-01-24 12:18:06,370 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:18:06,370 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:18:06,371 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:06,371 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:18:06,371 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:06,381 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:06,382 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:18:06,458 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-24 12:18:06,458 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:18:06,458 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 12:18:06,459 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 12:18:06,459 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 12:18:06,459 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:18:06,459 INFO L87 Difference]: Start difference. First operand 124 states and 132 transitions. Second operand 6 states. [2018-01-24 12:18:06,518 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:18:06,518 INFO L93 Difference]: Finished difference Result 128 states and 135 transitions. [2018-01-24 12:18:06,519 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 12:18:06,519 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2018-01-24 12:18:06,519 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:18:06,520 INFO L225 Difference]: With dead ends: 128 [2018-01-24 12:18:06,521 INFO L226 Difference]: Without dead ends: 115 [2018-01-24 12:18:06,521 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:18:06,522 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-01-24 12:18:06,534 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 115. [2018-01-24 12:18:06,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-01-24 12:18:06,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 121 transitions. [2018-01-24 12:18:06,538 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 121 transitions. Word has length 34 [2018-01-24 12:18:06,538 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:18:06,538 INFO L432 AbstractCegarLoop]: Abstraction has 115 states and 121 transitions. [2018-01-24 12:18:06,538 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 12:18:06,539 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 121 transitions. [2018-01-24 12:18:06,539 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 12:18:06,539 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:18:06,540 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:18:06,542 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:18:06,542 INFO L82 PathProgramCache]: Analyzing trace with hash -1126031319, now seen corresponding path program 2 times [2018-01-24 12:18:06,542 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:18:06,543 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:18:06,544 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:06,544 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:18:06,544 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:06,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:06,562 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:18:06,635 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:06,635 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:18:06,635 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:18:06,646 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 12:18:06,678 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:18:06,682 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:18:06,687 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:18:06,722 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 12:18:06,724 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:18:06,753 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 12:18:06,753 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:18:06,800 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 12:18:06,800 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 12:18:07,637 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 12:18:07,658 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-24 12:18:07,658 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [6] total 19 [2018-01-24 12:18:07,659 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-24 12:18:07,659 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-24 12:18:07,659 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=291, Unknown=0, NotChecked=0, Total=342 [2018-01-24 12:18:07,659 INFO L87 Difference]: Start difference. First operand 115 states and 121 transitions. Second operand 19 states. [2018-01-24 12:18:09,874 WARN L143 SmtUtils]: Spent 2040ms on a formula simplification that was a NOOP. DAG size: 31 [2018-01-24 12:18:10,746 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:18:10,746 INFO L93 Difference]: Finished difference Result 206 states and 219 transitions. [2018-01-24 12:18:10,746 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-24 12:18:10,746 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 36 [2018-01-24 12:18:10,746 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:18:10,747 INFO L225 Difference]: With dead ends: 206 [2018-01-24 12:18:10,747 INFO L226 Difference]: Without dead ends: 115 [2018-01-24 12:18:10,748 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=99, Invalid=603, Unknown=0, NotChecked=0, Total=702 [2018-01-24 12:18:10,748 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-01-24 12:18:10,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 115. [2018-01-24 12:18:10,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-01-24 12:18:10,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 121 transitions. [2018-01-24 12:18:10,758 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 121 transitions. Word has length 36 [2018-01-24 12:18:10,758 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:18:10,758 INFO L432 AbstractCegarLoop]: Abstraction has 115 states and 121 transitions. [2018-01-24 12:18:10,758 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-24 12:18:10,758 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 121 transitions. [2018-01-24 12:18:10,759 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-24 12:18:10,759 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:18:10,759 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:18:10,759 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:18:10,760 INFO L82 PathProgramCache]: Analyzing trace with hash 1693572500, now seen corresponding path program 1 times [2018-01-24 12:18:10,760 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:18:10,760 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:18:10,761 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:10,762 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:18:10,762 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:10,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:10,777 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:18:10,855 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 12:18:10,855 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:18:10,855 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 12:18:10,856 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 12:18:10,856 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 12:18:10,856 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 12:18:10,856 INFO L87 Difference]: Start difference. First operand 115 states and 121 transitions. Second operand 10 states. [2018-01-24 12:18:11,087 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:18:11,088 INFO L93 Difference]: Finished difference Result 115 states and 121 transitions. [2018-01-24 12:18:11,088 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 12:18:11,088 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 42 [2018-01-24 12:18:11,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:18:11,090 INFO L225 Difference]: With dead ends: 115 [2018-01-24 12:18:11,090 INFO L226 Difference]: Without dead ends: 113 [2018-01-24 12:18:11,090 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 12:18:11,091 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-01-24 12:18:11,104 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2018-01-24 12:18:11,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-01-24 12:18:11,106 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 119 transitions. [2018-01-24 12:18:11,106 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 119 transitions. Word has length 42 [2018-01-24 12:18:11,107 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:18:11,107 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 119 transitions. [2018-01-24 12:18:11,107 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 12:18:11,107 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 119 transitions. [2018-01-24 12:18:11,108 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-24 12:18:11,108 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:18:11,108 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:18:11,108 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:18:11,108 INFO L82 PathProgramCache]: Analyzing trace with hash 1693572501, now seen corresponding path program 1 times [2018-01-24 12:18:11,109 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:18:11,109 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:18:11,110 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:11,110 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:18:11,110 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:11,126 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:11,127 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:18:11,186 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:11,186 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:18:11,186 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:18:11,196 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:18:11,220 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:11,224 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:18:11,233 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:11,253 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:18:11,253 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-01-24 12:18:11,254 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 12:18:11,254 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 12:18:11,254 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-01-24 12:18:11,254 INFO L87 Difference]: Start difference. First operand 113 states and 119 transitions. Second operand 8 states. [2018-01-24 12:18:11,287 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:18:11,287 INFO L93 Difference]: Finished difference Result 202 states and 214 transitions. [2018-01-24 12:18:11,288 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 12:18:11,288 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 42 [2018-01-24 12:18:11,288 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:18:11,289 INFO L225 Difference]: With dead ends: 202 [2018-01-24 12:18:11,289 INFO L226 Difference]: Without dead ends: 114 [2018-01-24 12:18:11,290 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 42 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-01-24 12:18:11,290 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-01-24 12:18:11,304 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 114. [2018-01-24 12:18:11,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-01-24 12:18:11,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 120 transitions. [2018-01-24 12:18:11,305 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 120 transitions. Word has length 42 [2018-01-24 12:18:11,306 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:18:11,306 INFO L432 AbstractCegarLoop]: Abstraction has 114 states and 120 transitions. [2018-01-24 12:18:11,306 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 12:18:11,306 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 120 transitions. [2018-01-24 12:18:11,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-24 12:18:11,307 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:18:11,307 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:18:11,307 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:18:11,307 INFO L82 PathProgramCache]: Analyzing trace with hash 1124796031, now seen corresponding path program 2 times [2018-01-24 12:18:11,308 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:18:11,308 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:18:11,309 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:11,309 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:18:11,309 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:11,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:11,326 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:18:11,418 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:11,418 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:18:11,418 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:18:11,426 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 12:18:11,451 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:18:11,454 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:18:11,458 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:18:11,469 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 12:18:11,469 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:18:11,488 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 12:18:11,489 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:18:11,519 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 12:18:11,519 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 12:18:12,027 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 12:18:12,047 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-24 12:18:12,047 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [8] total 22 [2018-01-24 12:18:12,048 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-24 12:18:12,048 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-24 12:18:12,048 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=390, Unknown=0, NotChecked=0, Total=462 [2018-01-24 12:18:12,048 INFO L87 Difference]: Start difference. First operand 114 states and 120 transitions. Second operand 22 states. [2018-01-24 12:18:14,118 WARN L143 SmtUtils]: Spent 2032ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-24 12:18:16,324 WARN L143 SmtUtils]: Spent 2022ms on a formula simplification that was a NOOP. DAG size: 31 [2018-01-24 12:18:17,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:18:17,031 INFO L93 Difference]: Finished difference Result 201 states and 215 transitions. [2018-01-24 12:18:17,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-24 12:18:17,031 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 43 [2018-01-24 12:18:17,032 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:18:17,032 INFO L225 Difference]: With dead ends: 201 [2018-01-24 12:18:17,032 INFO L226 Difference]: Without dead ends: 113 [2018-01-24 12:18:17,033 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 29 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 155 ImplicationChecksByTransitivity, 4.8s TimeCoverageRelationStatistics Valid=147, Invalid=845, Unknown=0, NotChecked=0, Total=992 [2018-01-24 12:18:17,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-01-24 12:18:17,047 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2018-01-24 12:18:17,047 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-01-24 12:18:17,048 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 119 transitions. [2018-01-24 12:18:17,048 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 119 transitions. Word has length 43 [2018-01-24 12:18:17,049 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:18:17,049 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 119 transitions. [2018-01-24 12:18:17,049 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-24 12:18:17,049 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 119 transitions. [2018-01-24 12:18:17,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-01-24 12:18:17,050 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:18:17,050 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:18:17,050 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:18:17,050 INFO L82 PathProgramCache]: Analyzing trace with hash -889747813, now seen corresponding path program 1 times [2018-01-24 12:18:17,050 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:18:17,051 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:18:17,052 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:17,052 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:18:17,052 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:17,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:17,067 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:18:17,128 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 12:18:17,128 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:18:17,128 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-24 12:18:17,128 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 12:18:17,129 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 12:18:17,129 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-01-24 12:18:17,129 INFO L87 Difference]: Start difference. First operand 113 states and 119 transitions. Second operand 8 states. [2018-01-24 12:18:17,182 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:18:17,182 INFO L93 Difference]: Finished difference Result 177 states and 186 transitions. [2018-01-24 12:18:17,183 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 12:18:17,183 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 49 [2018-01-24 12:18:17,183 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:18:17,183 INFO L225 Difference]: With dead ends: 177 [2018-01-24 12:18:17,183 INFO L226 Difference]: Without dead ends: 113 [2018-01-24 12:18:17,184 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-01-24 12:18:17,184 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-01-24 12:18:17,200 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2018-01-24 12:18:17,200 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-01-24 12:18:17,202 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 118 transitions. [2018-01-24 12:18:17,202 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 118 transitions. Word has length 49 [2018-01-24 12:18:17,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:18:17,202 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 118 transitions. [2018-01-24 12:18:17,202 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 12:18:17,203 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 118 transitions. [2018-01-24 12:18:17,203 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-01-24 12:18:17,203 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:18:17,203 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:18:17,204 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:18:17,204 INFO L82 PathProgramCache]: Analyzing trace with hash 2041611084, now seen corresponding path program 1 times [2018-01-24 12:18:17,204 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:18:17,204 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:18:17,205 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:17,205 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:18:17,205 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:17,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:17,220 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:18:17,317 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 12:18:17,317 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:18:17,317 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-01-24 12:18:17,318 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 12:18:17,318 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 12:18:17,318 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 12:18:17,318 INFO L87 Difference]: Start difference. First operand 113 states and 118 transitions. Second operand 10 states. [2018-01-24 12:18:17,378 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:18:17,379 INFO L93 Difference]: Finished difference Result 179 states and 187 transitions. [2018-01-24 12:18:17,379 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 12:18:17,379 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 54 [2018-01-24 12:18:17,379 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:18:17,380 INFO L225 Difference]: With dead ends: 179 [2018-01-24 12:18:17,380 INFO L226 Difference]: Without dead ends: 113 [2018-01-24 12:18:17,381 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 12:18:17,381 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-01-24 12:18:17,394 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2018-01-24 12:18:17,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-01-24 12:18:17,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 117 transitions. [2018-01-24 12:18:17,395 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 117 transitions. Word has length 54 [2018-01-24 12:18:17,395 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:18:17,395 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 117 transitions. [2018-01-24 12:18:17,395 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 12:18:17,395 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 117 transitions. [2018-01-24 12:18:17,395 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-01-24 12:18:17,395 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:18:17,396 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:18:17,396 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:18:17,396 INFO L82 PathProgramCache]: Analyzing trace with hash -1648870102, now seen corresponding path program 1 times [2018-01-24 12:18:17,396 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:18:17,396 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:18:17,397 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:17,397 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:18:17,397 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:17,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:17,417 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:18:17,639 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 12:18:17,639 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:18:17,639 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2018-01-24 12:18:17,640 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-24 12:18:17,640 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-24 12:18:17,640 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=379, Unknown=0, NotChecked=0, Total=420 [2018-01-24 12:18:17,640 INFO L87 Difference]: Start difference. First operand 113 states and 117 transitions. Second operand 21 states. [2018-01-24 12:18:18,048 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:18:18,048 INFO L93 Difference]: Finished difference Result 143 states and 155 transitions. [2018-01-24 12:18:18,048 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-24 12:18:18,049 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 65 [2018-01-24 12:18:18,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:18:18,050 INFO L225 Difference]: With dead ends: 143 [2018-01-24 12:18:18,050 INFO L226 Difference]: Without dead ends: 141 [2018-01-24 12:18:18,051 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=69, Invalid=687, Unknown=0, NotChecked=0, Total=756 [2018-01-24 12:18:18,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-01-24 12:18:18,065 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 136. [2018-01-24 12:18:18,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-01-24 12:18:18,066 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 148 transitions. [2018-01-24 12:18:18,066 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 148 transitions. Word has length 65 [2018-01-24 12:18:18,066 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:18:18,066 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 148 transitions. [2018-01-24 12:18:18,066 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-24 12:18:18,067 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 148 transitions. [2018-01-24 12:18:18,067 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-01-24 12:18:18,067 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:18:18,067 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:18:18,067 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:18:18,068 INFO L82 PathProgramCache]: Analyzing trace with hash -1648870101, now seen corresponding path program 1 times [2018-01-24 12:18:18,068 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:18:18,068 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:18:18,068 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:18,069 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:18:18,069 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:18,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:18,085 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:18:18,146 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:18,146 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:18:18,146 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:18:18,156 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:18:18,193 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:18,198 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:18:18,232 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:18,267 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:18:18,267 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-01-24 12:18:18,268 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 12:18:18,268 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 12:18:18,268 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-01-24 12:18:18,268 INFO L87 Difference]: Start difference. First operand 136 states and 148 transitions. Second operand 10 states. [2018-01-24 12:18:18,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:18:18,307 INFO L93 Difference]: Finished difference Result 246 states and 270 transitions. [2018-01-24 12:18:18,307 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-24 12:18:18,307 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 65 [2018-01-24 12:18:18,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:18:18,308 INFO L225 Difference]: With dead ends: 246 [2018-01-24 12:18:18,309 INFO L226 Difference]: Without dead ends: 137 [2018-01-24 12:18:18,309 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-01-24 12:18:18,310 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-01-24 12:18:18,330 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-01-24 12:18:18,330 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-01-24 12:18:18,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 149 transitions. [2018-01-24 12:18:18,331 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 149 transitions. Word has length 65 [2018-01-24 12:18:18,331 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:18:18,332 INFO L432 AbstractCegarLoop]: Abstraction has 137 states and 149 transitions. [2018-01-24 12:18:18,332 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 12:18:18,332 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 149 transitions. [2018-01-24 12:18:18,332 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-01-24 12:18:18,333 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:18:18,333 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:18:18,333 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:18:18,333 INFO L82 PathProgramCache]: Analyzing trace with hash -1958826751, now seen corresponding path program 2 times [2018-01-24 12:18:18,333 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:18:18,333 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:18:18,334 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:18,335 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:18:18,335 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:18,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:18,357 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:18:18,496 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:18,496 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:18:18,496 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:18:18,503 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 12:18:18,530 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:18:18,534 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:18:18,538 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:18:18,542 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 12:18:18,542 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:18:18,554 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 12:18:18,554 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:18:18,565 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 12:18:18,565 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 12:18:19,334 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-01-24 12:18:19,355 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-24 12:18:19,356 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [10] total 29 [2018-01-24 12:18:19,356 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-24 12:18:19,356 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-24 12:18:19,357 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=705, Unknown=0, NotChecked=0, Total=812 [2018-01-24 12:18:19,357 INFO L87 Difference]: Start difference. First operand 137 states and 149 transitions. Second operand 29 states. [2018-01-24 12:18:20,894 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:18:20,894 INFO L93 Difference]: Finished difference Result 245 states and 271 transitions. [2018-01-24 12:18:20,894 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-24 12:18:20,895 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 66 [2018-01-24 12:18:20,895 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:18:20,896 INFO L225 Difference]: With dead ends: 245 [2018-01-24 12:18:20,896 INFO L226 Difference]: Without dead ends: 136 [2018-01-24 12:18:20,897 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 369 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=227, Invalid=1579, Unknown=0, NotChecked=0, Total=1806 [2018-01-24 12:18:20,897 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-01-24 12:18:20,920 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-01-24 12:18:20,921 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-01-24 12:18:20,922 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 146 transitions. [2018-01-24 12:18:20,922 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 146 transitions. Word has length 66 [2018-01-24 12:18:20,922 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:18:20,922 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 146 transitions. [2018-01-24 12:18:20,922 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-24 12:18:20,923 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 146 transitions. [2018-01-24 12:18:20,923 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-01-24 12:18:20,923 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:18:20,924 INFO L322 BasicCegarLoop]: trace histogram [7, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:18:20,924 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:18:20,924 INFO L82 PathProgramCache]: Analyzing trace with hash 1967521112, now seen corresponding path program 1 times [2018-01-24 12:18:20,924 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:18:20,924 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:18:20,925 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:20,925 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:18:20,925 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:20,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:20,943 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:18:21,056 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 29 trivial. 0 not checked. [2018-01-24 12:18:21,057 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:18:21,057 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:18:21,065 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:18:21,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:21,118 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:18:21,316 INFO L134 CoverageAnalysis]: Checked inductivity of 32 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-24 12:18:21,350 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:18:21,350 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 20 [2018-01-24 12:18:21,350 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-24 12:18:21,351 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-24 12:18:21,351 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=65, Invalid=315, Unknown=0, NotChecked=0, Total=380 [2018-01-24 12:18:21,351 INFO L87 Difference]: Start difference. First operand 136 states and 146 transitions. Second operand 20 states. [2018-01-24 12:18:21,605 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:18:21,606 INFO L93 Difference]: Finished difference Result 245 states and 263 transitions. [2018-01-24 12:18:21,606 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-24 12:18:21,606 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 70 [2018-01-24 12:18:21,606 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:18:21,607 INFO L225 Difference]: With dead ends: 245 [2018-01-24 12:18:21,607 INFO L226 Difference]: Without dead ends: 134 [2018-01-24 12:18:21,608 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 62 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=81, Invalid=471, Unknown=0, NotChecked=0, Total=552 [2018-01-24 12:18:21,608 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-01-24 12:18:21,633 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-01-24 12:18:21,633 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-01-24 12:18:21,634 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 140 transitions. [2018-01-24 12:18:21,634 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 140 transitions. Word has length 70 [2018-01-24 12:18:21,635 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:18:21,635 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 140 transitions. [2018-01-24 12:18:21,635 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-24 12:18:21,635 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 140 transitions. [2018-01-24 12:18:21,636 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-01-24 12:18:21,636 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:18:21,636 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:18:21,636 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:18:21,637 INFO L82 PathProgramCache]: Analyzing trace with hash -170218834, now seen corresponding path program 1 times [2018-01-24 12:18:21,637 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:18:21,637 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:18:21,638 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:21,638 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:18:21,638 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:21,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:21,661 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:18:22,017 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-24 12:18:22,017 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:18:22,018 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2018-01-24 12:18:22,018 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-24 12:18:22,018 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-24 12:18:22,018 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=551, Unknown=0, NotChecked=0, Total=600 [2018-01-24 12:18:22,018 INFO L87 Difference]: Start difference. First operand 134 states and 140 transitions. Second operand 25 states. [2018-01-24 12:18:22,556 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:18:22,556 INFO L93 Difference]: Finished difference Result 146 states and 156 transitions. [2018-01-24 12:18:22,556 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-24 12:18:22,556 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 82 [2018-01-24 12:18:22,557 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:18:22,557 INFO L225 Difference]: With dead ends: 146 [2018-01-24 12:18:22,557 INFO L226 Difference]: Without dead ends: 144 [2018-01-24 12:18:22,558 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=85, Invalid=1037, Unknown=0, NotChecked=0, Total=1122 [2018-01-24 12:18:22,558 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-01-24 12:18:22,584 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 140. [2018-01-24 12:18:22,584 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-01-24 12:18:22,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 150 transitions. [2018-01-24 12:18:22,586 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 150 transitions. Word has length 82 [2018-01-24 12:18:22,586 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:18:22,586 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 150 transitions. [2018-01-24 12:18:22,586 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-24 12:18:22,586 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 150 transitions. [2018-01-24 12:18:22,587 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-01-24 12:18:22,587 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:18:22,587 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:18:22,588 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:18:22,588 INFO L82 PathProgramCache]: Analyzing trace with hash -170218833, now seen corresponding path program 1 times [2018-01-24 12:18:22,588 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:18:22,588 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:18:22,589 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:22,589 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:18:22,589 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:22,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:22,614 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:18:22,742 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:22,743 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:18:22,743 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:18:22,751 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:18:22,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:22,795 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:18:22,806 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:22,825 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:18:22,826 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 13 [2018-01-24 12:18:22,826 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-24 12:18:22,826 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-24 12:18:22,827 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-24 12:18:22,827 INFO L87 Difference]: Start difference. First operand 140 states and 150 transitions. Second operand 13 states. [2018-01-24 12:18:22,863 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:18:22,864 INFO L93 Difference]: Finished difference Result 251 states and 271 transitions. [2018-01-24 12:18:22,864 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-24 12:18:22,864 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 82 [2018-01-24 12:18:22,864 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:18:22,865 INFO L225 Difference]: With dead ends: 251 [2018-01-24 12:18:22,865 INFO L226 Difference]: Without dead ends: 141 [2018-01-24 12:18:22,865 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 82 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=72, Invalid=110, Unknown=0, NotChecked=0, Total=182 [2018-01-24 12:18:22,865 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-01-24 12:18:22,902 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 141. [2018-01-24 12:18:22,902 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-01-24 12:18:22,903 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 151 transitions. [2018-01-24 12:18:22,903 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 151 transitions. Word has length 82 [2018-01-24 12:18:22,903 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:18:22,903 INFO L432 AbstractCegarLoop]: Abstraction has 141 states and 151 transitions. [2018-01-24 12:18:22,904 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-24 12:18:22,904 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 151 transitions. [2018-01-24 12:18:22,904 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-01-24 12:18:22,904 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:18:22,904 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:18:22,905 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:18:22,905 INFO L82 PathProgramCache]: Analyzing trace with hash -1743576679, now seen corresponding path program 2 times [2018-01-24 12:18:22,905 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:18:22,905 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:18:22,906 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:22,906 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:18:22,906 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:22,929 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:22,930 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:18:23,054 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:23,055 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:18:23,055 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:18:23,066 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 12:18:23,115 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:18:23,123 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:18:23,130 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:18:23,135 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 12:18:23,135 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:18:23,167 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 12:18:23,167 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:18:23,183 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 12:18:23,183 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 12:18:26,266 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-24 12:18:26,286 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-24 12:18:26,287 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [13] total 36 [2018-01-24 12:18:26,287 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-24 12:18:26,287 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-24 12:18:26,288 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=153, Invalid=1106, Unknown=1, NotChecked=0, Total=1260 [2018-01-24 12:18:26,288 INFO L87 Difference]: Start difference. First operand 141 states and 151 transitions. Second operand 36 states. [2018-01-24 12:18:28,695 WARN L143 SmtUtils]: Spent 2033ms on a formula simplification that was a NOOP. DAG size: 35 [2018-01-24 12:18:32,786 WARN L143 SmtUtils]: Spent 4025ms on a formula simplification that was a NOOP. DAG size: 35 [2018-01-24 12:18:34,288 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:18:34,288 INFO L93 Difference]: Finished difference Result 250 states and 272 transitions. [2018-01-24 12:18:34,290 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-01-24 12:18:34,290 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 83 [2018-01-24 12:18:34,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:18:34,291 INFO L225 Difference]: With dead ends: 250 [2018-01-24 12:18:34,291 INFO L226 Difference]: Without dead ends: 140 [2018-01-24 12:18:34,292 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 114 GetRequests, 58 SyntacticMatches, 3 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 678 ImplicationChecksByTransitivity, 9.8s TimeCoverageRelationStatistics Valid=348, Invalid=2621, Unknown=1, NotChecked=0, Total=2970 [2018-01-24 12:18:34,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-01-24 12:18:34,338 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-01-24 12:18:34,338 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-01-24 12:18:34,339 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 149 transitions. [2018-01-24 12:18:34,339 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 149 transitions. Word has length 83 [2018-01-24 12:18:34,340 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:18:34,340 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 149 transitions. [2018-01-24 12:18:34,340 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-24 12:18:34,340 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 149 transitions. [2018-01-24 12:18:34,341 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-01-24 12:18:34,341 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:18:34,341 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:18:34,341 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:18:34,341 INFO L82 PathProgramCache]: Analyzing trace with hash 470121776, now seen corresponding path program 1 times [2018-01-24 12:18:34,341 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:18:34,341 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:18:34,342 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:34,343 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:18:34,343 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:34,365 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:34,367 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:18:34,568 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:34,568 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:18:34,568 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:18:34,579 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:18:34,649 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:34,654 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:18:34,672 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:34,708 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:18:34,709 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 15 [2018-01-24 12:18:34,709 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 12:18:34,709 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 12:18:34,710 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-24 12:18:34,710 INFO L87 Difference]: Start difference. First operand 140 states and 149 transitions. Second operand 15 states. [2018-01-24 12:18:34,806 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:18:34,806 INFO L93 Difference]: Finished difference Result 249 states and 267 transitions. [2018-01-24 12:18:34,806 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-24 12:18:34,806 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 88 [2018-01-24 12:18:34,807 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:18:34,807 INFO L225 Difference]: With dead ends: 249 [2018-01-24 12:18:34,808 INFO L226 Difference]: Without dead ends: 141 [2018-01-24 12:18:34,808 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 102 GetRequests, 88 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=97, Invalid=143, Unknown=0, NotChecked=0, Total=240 [2018-01-24 12:18:34,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-01-24 12:18:34,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 141. [2018-01-24 12:18:34,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-01-24 12:18:34,843 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 150 transitions. [2018-01-24 12:18:34,843 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 150 transitions. Word has length 88 [2018-01-24 12:18:34,844 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:18:34,844 INFO L432 AbstractCegarLoop]: Abstraction has 141 states and 150 transitions. [2018-01-24 12:18:34,844 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 12:18:34,844 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 150 transitions. [2018-01-24 12:18:34,845 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-01-24 12:18:34,845 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:18:34,845 INFO L322 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:18:34,845 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:18:34,845 INFO L82 PathProgramCache]: Analyzing trace with hash -1375757158, now seen corresponding path program 2 times [2018-01-24 12:18:34,845 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:18:34,846 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:18:34,846 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:34,847 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:18:34,847 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:34,870 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:34,872 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:18:35,144 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:35,144 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:18:35,144 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:18:35,152 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 12:18:35,206 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:18:35,229 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:18:35,231 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:18:35,236 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:18:35,271 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:35,297 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:18:35,298 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16 [2018-01-24 12:18:35,298 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-24 12:18:35,298 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-24 12:18:35,299 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=133, Unknown=0, NotChecked=0, Total=240 [2018-01-24 12:18:35,299 INFO L87 Difference]: Start difference. First operand 141 states and 150 transitions. Second operand 16 states. [2018-01-24 12:18:35,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:18:35,367 INFO L93 Difference]: Finished difference Result 250 states and 268 transitions. [2018-01-24 12:18:35,370 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-24 12:18:35,370 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 89 [2018-01-24 12:18:35,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:18:35,372 INFO L225 Difference]: With dead ends: 250 [2018-01-24 12:18:35,372 INFO L226 Difference]: Without dead ends: 142 [2018-01-24 12:18:35,372 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 89 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=111, Invalid=161, Unknown=0, NotChecked=0, Total=272 [2018-01-24 12:18:35,373 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-01-24 12:18:35,406 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-01-24 12:18:35,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-01-24 12:18:35,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 151 transitions. [2018-01-24 12:18:35,408 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 151 transitions. Word has length 89 [2018-01-24 12:18:35,408 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:18:35,408 INFO L432 AbstractCegarLoop]: Abstraction has 142 states and 151 transitions. [2018-01-24 12:18:35,408 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-24 12:18:35,408 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 151 transitions. [2018-01-24 12:18:35,410 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-01-24 12:18:35,410 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:18:35,410 INFO L322 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:18:35,410 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:18:35,410 INFO L82 PathProgramCache]: Analyzing trace with hash 1531538032, now seen corresponding path program 3 times [2018-01-24 12:18:35,411 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:18:35,411 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:18:35,412 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:35,412 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:18:35,412 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:35,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:35,436 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:18:35,674 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:35,674 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:18:35,725 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:18:35,732 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 12:18:35,777 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 12:18:35,789 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 12:18:35,819 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 12:18:35,892 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 12:18:36,221 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 12:18:36,844 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 12:18:37,881 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 12:18:37,884 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:18:37,891 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:18:38,088 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:38,110 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:18:38,110 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 21] total 35 [2018-01-24 12:18:38,111 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-01-24 12:18:38,111 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-01-24 12:18:38,111 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=328, Invalid=862, Unknown=0, NotChecked=0, Total=1190 [2018-01-24 12:18:38,111 INFO L87 Difference]: Start difference. First operand 142 states and 151 transitions. Second operand 35 states. [2018-01-24 12:18:38,207 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:18:38,207 INFO L93 Difference]: Finished difference Result 251 states and 269 transitions. [2018-01-24 12:18:38,207 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-24 12:18:38,208 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 90 [2018-01-24 12:18:38,208 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:18:38,208 INFO L225 Difference]: With dead ends: 251 [2018-01-24 12:18:38,208 INFO L226 Difference]: Without dead ends: 143 [2018-01-24 12:18:38,209 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 72 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 449 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=368, Invalid=1038, Unknown=0, NotChecked=0, Total=1406 [2018-01-24 12:18:38,209 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-01-24 12:18:38,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2018-01-24 12:18:38,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-01-24 12:18:38,240 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 152 transitions. [2018-01-24 12:18:38,240 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 152 transitions. Word has length 90 [2018-01-24 12:18:38,240 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:18:38,241 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 152 transitions. [2018-01-24 12:18:38,241 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-01-24 12:18:38,241 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 152 transitions. [2018-01-24 12:18:38,241 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-01-24 12:18:38,241 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:18:38,241 INFO L322 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:18:38,242 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:18:38,242 INFO L82 PathProgramCache]: Analyzing trace with hash 1463375706, now seen corresponding path program 4 times [2018-01-24 12:18:38,242 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:18:38,242 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:18:38,243 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:38,243 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:18:38,243 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:38,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:38,267 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:18:38,474 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:38,475 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:18:38,475 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:18:38,486 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-24 12:18:38,580 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:18:38,585 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:18:38,640 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:38,661 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:18:38,661 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18 [2018-01-24 12:18:38,661 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-24 12:18:38,662 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-24 12:18:38,662 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=168, Unknown=0, NotChecked=0, Total=306 [2018-01-24 12:18:38,662 INFO L87 Difference]: Start difference. First operand 143 states and 152 transitions. Second operand 18 states. [2018-01-24 12:18:38,720 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:18:38,720 INFO L93 Difference]: Finished difference Result 252 states and 270 transitions. [2018-01-24 12:18:38,721 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-24 12:18:38,721 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 91 [2018-01-24 12:18:38,721 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:18:38,722 INFO L225 Difference]: With dead ends: 252 [2018-01-24 12:18:38,722 INFO L226 Difference]: Without dead ends: 144 [2018-01-24 12:18:38,722 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 108 GetRequests, 91 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=142, Invalid=200, Unknown=0, NotChecked=0, Total=342 [2018-01-24 12:18:38,722 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-01-24 12:18:38,745 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 144. [2018-01-24 12:18:38,745 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-01-24 12:18:38,746 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 153 transitions. [2018-01-24 12:18:38,746 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 153 transitions. Word has length 91 [2018-01-24 12:18:38,746 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:18:38,746 INFO L432 AbstractCegarLoop]: Abstraction has 144 states and 153 transitions. [2018-01-24 12:18:38,747 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-24 12:18:38,747 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 153 transitions. [2018-01-24 12:18:38,747 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-01-24 12:18:38,747 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:18:38,747 INFO L322 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:18:38,748 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:18:38,748 INFO L82 PathProgramCache]: Analyzing trace with hash -649656400, now seen corresponding path program 5 times [2018-01-24 12:18:38,748 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:18:38,748 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:18:38,749 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:38,749 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:18:38,749 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:38,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:38,768 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:18:38,978 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:38,979 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:18:38,979 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:18:38,984 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-24 12:18:38,998 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:18:39,001 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:18:39,006 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:18:39,029 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:18:39,055 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:18:39,122 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:18:39,230 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:18:39,316 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:18:39,321 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:18:39,325 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:18:39,339 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:39,360 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:18:39,360 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19 [2018-01-24 12:18:39,360 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-24 12:18:39,361 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-24 12:18:39,361 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-24 12:18:39,361 INFO L87 Difference]: Start difference. First operand 144 states and 153 transitions. Second operand 19 states. [2018-01-24 12:18:39,415 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:18:39,415 INFO L93 Difference]: Finished difference Result 253 states and 271 transitions. [2018-01-24 12:18:39,415 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-24 12:18:39,415 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 92 [2018-01-24 12:18:39,415 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:18:39,416 INFO L225 Difference]: With dead ends: 253 [2018-01-24 12:18:39,416 INFO L226 Difference]: Without dead ends: 145 [2018-01-24 12:18:39,417 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 110 GetRequests, 92 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=159, Invalid=221, Unknown=0, NotChecked=0, Total=380 [2018-01-24 12:18:39,417 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-01-24 12:18:39,438 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 145. [2018-01-24 12:18:39,438 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-01-24 12:18:39,439 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 154 transitions. [2018-01-24 12:18:39,439 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 154 transitions. Word has length 92 [2018-01-24 12:18:39,439 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:18:39,439 INFO L432 AbstractCegarLoop]: Abstraction has 145 states and 154 transitions. [2018-01-24 12:18:39,439 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-24 12:18:39,439 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 154 transitions. [2018-01-24 12:18:39,440 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-01-24 12:18:39,440 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:18:39,440 INFO L322 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:18:39,440 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:18:39,440 INFO L82 PathProgramCache]: Analyzing trace with hash -1729142246, now seen corresponding path program 6 times [2018-01-24 12:18:39,440 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:18:39,440 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:18:39,441 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:39,441 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:18:39,441 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:39,457 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:39,458 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:18:39,644 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:39,645 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:18:39,645 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:18:39,650 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-24 12:18:39,683 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 12:18:39,694 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 12:18:39,720 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 12:18:39,764 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 12:18:40,114 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 12:18:40,776 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 12:18:43,835 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 12:18:48,006 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 12:18:51,482 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 12:18:51,486 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:18:51,494 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:18:51,511 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:51,534 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:18:51,534 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 20 [2018-01-24 12:18:51,535 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-24 12:18:51,535 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-24 12:18:51,535 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=207, Unknown=0, NotChecked=0, Total=380 [2018-01-24 12:18:51,535 INFO L87 Difference]: Start difference. First operand 145 states and 154 transitions. Second operand 20 states. [2018-01-24 12:18:51,591 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:18:51,592 INFO L93 Difference]: Finished difference Result 254 states and 272 transitions. [2018-01-24 12:18:51,592 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-24 12:18:51,592 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 93 [2018-01-24 12:18:51,592 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:18:51,593 INFO L225 Difference]: With dead ends: 254 [2018-01-24 12:18:51,593 INFO L226 Difference]: Without dead ends: 146 [2018-01-24 12:18:51,593 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 93 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=177, Invalid=243, Unknown=0, NotChecked=0, Total=420 [2018-01-24 12:18:51,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 146 states. [2018-01-24 12:18:51,614 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 146 to 146. [2018-01-24 12:18:51,614 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-01-24 12:18:51,615 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 155 transitions. [2018-01-24 12:18:51,615 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 155 transitions. Word has length 93 [2018-01-24 12:18:51,615 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:18:51,615 INFO L432 AbstractCegarLoop]: Abstraction has 146 states and 155 transitions. [2018-01-24 12:18:51,615 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-24 12:18:51,615 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 155 transitions. [2018-01-24 12:18:51,616 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-01-24 12:18:51,616 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:18:51,616 INFO L322 BasicCegarLoop]: trace histogram [16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:18:51,616 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:18:51,616 INFO L82 PathProgramCache]: Analyzing trace with hash -833465104, now seen corresponding path program 7 times [2018-01-24 12:18:51,616 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:18:51,616 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:18:51,617 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:51,617 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:18:51,617 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:18:51,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:51,699 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:18:55,213 INFO L134 CoverageAnalysis]: Checked inductivity of 136 backedges. 0 proven. 136 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:18:55,213 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:18:55,213 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:18:55,220 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:18:55,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:18:55,273 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:18:55,349 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-24 12:18:55,351 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-24 12:18:55,351 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:18:55,352 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:18:55,356 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:18:55,357 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:20, output treesize:16 [2018-01-24 12:18:55,406 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-01-24 12:18:55,408 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,411 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-01-24 12:18:55,411 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:18:55,416 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:18:55,423 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 12:18:55,423 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:36, output treesize:32 [2018-01-24 12:18:55,494 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2018-01-24 12:18:55,497 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,498 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,499 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,500 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 52 [2018-01-24 12:18:55,500 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:18:55,511 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:18:55,522 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 12:18:55,523 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:52, output treesize:48 [2018-01-24 12:18:55,620 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-01-24 12:18:55,624 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,626 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,627 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,628 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,629 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,630 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,630 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 85 [2018-01-24 12:18:55,631 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:18:55,646 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:18:55,662 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-01-24 12:18:55,662 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:68, output treesize:64 [2018-01-24 12:18:55,773 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 47 [2018-01-24 12:18:55,777 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,778 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,778 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,779 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,780 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,782 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,783 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,784 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,785 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,787 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,788 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 126 [2018-01-24 12:18:55,789 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:18:55,815 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:18:55,833 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 4 dim-0 vars, and 1 xjuncts. [2018-01-24 12:18:55,833 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 5 variables, input treesize:84, output treesize:80 [2018-01-24 12:18:55,938 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-01-24 12:18:55,942 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,943 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,944 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,945 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,946 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,947 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,948 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,949 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,950 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,950 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,951 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,952 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,953 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,954 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,955 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:55,956 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 175 [2018-01-24 12:18:55,956 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:18:55,990 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:18:56,011 INFO L267 ElimStorePlain]: Start of recursive call 1: 5 dim-0 vars, 1 dim-2 vars, End of recursive call: 5 dim-0 vars, and 1 xjuncts. [2018-01-24 12:18:56,011 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 6 variables, input treesize:100, output treesize:96 [2018-01-24 12:18:56,157 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 65 [2018-01-24 12:18:56,163 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:56,165 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:56,166 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:56,168 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:56,169 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:56,171 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:56,172 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:56,174 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:56,175 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:56,177 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:56,178 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:56,180 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:56,182 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:56,183 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:56,185 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:56,186 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:56,188 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:56,189 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:56,191 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:56,192 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:56,194 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:18:56,195 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 232 [2018-01-24 12:18:56,196 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:18:56,274 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:18:56,311 INFO L267 ElimStorePlain]: Start of recursive call 1: 6 dim-0 vars, 1 dim-2 vars, End of recursive call: 6 dim-0 vars, and 1 xjuncts. [2018-01-24 12:18:56,312 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 7 variables, input treesize:116, output treesize:112 Received shutdown request... [2018-01-24 12:18:58,709 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-24 12:18:58,709 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-24 12:18:58,713 WARN L187 ceAbstractionStarter]: Timeout [2018-01-24 12:18:58,714 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.01 12:18:58 BoogieIcfgContainer [2018-01-24 12:18:58,714 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-24 12:18:58,714 INFO L168 Benchmark]: Toolchain (without parser) took 55761.88 ms. Allocated memory was 308.8 MB in the beginning and 752.9 MB in the end (delta: 444.1 MB). Free memory was 267.7 MB in the beginning and 321.2 MB in the end (delta: -53.5 MB). Peak memory consumption was 390.6 MB. Max. memory is 5.3 GB. [2018-01-24 12:18:58,715 INFO L168 Benchmark]: CDTParser took 0.23 ms. Allocated memory is still 308.8 MB. Free memory is still 274.7 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-24 12:18:58,716 INFO L168 Benchmark]: CACSL2BoogieTranslator took 237.92 ms. Allocated memory is still 308.8 MB. Free memory was 267.7 MB in the beginning and 253.5 MB in the end (delta: 14.2 MB). Peak memory consumption was 14.2 MB. Max. memory is 5.3 GB. [2018-01-24 12:18:58,716 INFO L168 Benchmark]: Boogie Preprocessor took 49.77 ms. Allocated memory is still 308.8 MB. Free memory was 253.5 MB in the beginning and 251.5 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-24 12:18:58,716 INFO L168 Benchmark]: RCFGBuilder took 481.91 ms. Allocated memory is still 308.8 MB. Free memory was 251.5 MB in the beginning and 220.4 MB in the end (delta: 31.1 MB). Peak memory consumption was 31.1 MB. Max. memory is 5.3 GB. [2018-01-24 12:18:58,716 INFO L168 Benchmark]: TraceAbstraction took 54982.99 ms. Allocated memory was 308.8 MB in the beginning and 752.9 MB in the end (delta: 444.1 MB). Free memory was 220.4 MB in the beginning and 321.2 MB in the end (delta: -100.7 MB). Peak memory consumption was 343.3 MB. Max. memory is 5.3 GB. [2018-01-24 12:18:58,718 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.23 ms. Allocated memory is still 308.8 MB. Free memory is still 274.7 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 237.92 ms. Allocated memory is still 308.8 MB. Free memory was 267.7 MB in the beginning and 253.5 MB in the end (delta: 14.2 MB). Peak memory consumption was 14.2 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 49.77 ms. Allocated memory is still 308.8 MB. Free memory was 253.5 MB in the beginning and 251.5 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 481.91 ms. Allocated memory is still 308.8 MB. Free memory was 251.5 MB in the beginning and 220.4 MB in the end (delta: 31.1 MB). Peak memory consumption was 31.1 MB. Max. memory is 5.3 GB. * TraceAbstraction took 54982.99 ms. Allocated memory was 308.8 MB in the beginning and 752.9 MB in the end (delta: 444.1 MB). Free memory was 220.4 MB in the beginning and 321.2 MB in the end (delta: -100.7 MB). Peak memory consumption was 343.3 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 53. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 53. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 53. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 53. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 53. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 53. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 53. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 53. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 53. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 53. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 53. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 53. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 53. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 53. - TimeoutResultAtElement [Line: 1443]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1443). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 53. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 53. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 53. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 53. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 95 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 53. - StatisticsResult: Ultimate Automizer benchmark data CFG has 18 procedures, 119 locations, 19 error locations. TIMEOUT Result, 54.9s OverallTime, 29 OverallIterations, 16 TraceHistogramMax, 20.9s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 2898 SDtfs, 723 SDslu, 23095 SDs, 0 SdLazy, 7087 SolverSat, 218 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 4.8s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1456 GetRequests, 999 SyntacticMatches, 5 SemanticMatches, 452 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2121 ImplicationChecksByTransitivity, 22.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=146occurred in iteration=28, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.5s AutomataMinimizationTime, 28 MinimizatonAttempts, 27 StatesRemovedByMinimization, 7 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 15.1s SatisfiabilityAnalysisTime, 9.9s InterpolantComputationTime, 2640 NumberOfCodeBlocks, 2619 NumberOfCodeBlocksAsserted, 66 NumberOfCheckSat, 2597 ConstructedInterpolants, 176 QuantifiedInterpolants, 582813 SizeOfPredicates, 67 NumberOfNonLiveVariables, 5238 ConjunctsInSsa, 396 ConjunctsInUnsatCore, 43 InterpolantComputations, 17 PerfectInterpolantSequences, 207/1463 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_3_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-24_12-18-58-725.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_3_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-24_12-18-58-725.csv Completed graceful shutdown