java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_3_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-24 12:30:45,411 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-24 12:30:45,434 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-24 12:30:45,449 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-24 12:30:45,449 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-24 12:30:45,450 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-24 12:30:45,451 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-24 12:30:45,453 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-24 12:30:45,455 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-24 12:30:45,456 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-24 12:30:45,457 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-24 12:30:45,457 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-24 12:30:45,458 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-24 12:30:45,459 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-24 12:30:45,460 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-24 12:30:45,462 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-24 12:30:45,464 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-24 12:30:45,467 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-24 12:30:45,468 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-24 12:30:45,469 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-24 12:30:45,471 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-24 12:30:45,472 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-24 12:30:45,472 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-24 12:30:45,473 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-24 12:30:45,474 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-24 12:30:45,475 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-24 12:30:45,475 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-24 12:30:45,476 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-24 12:30:45,476 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-24 12:30:45,477 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-24 12:30:45,477 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-24 12:30:45,478 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ.epf [2018-01-24 12:30:45,486 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-24 12:30:45,486 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-24 12:30:45,487 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-24 12:30:45,487 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-24 12:30:45,487 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-24 12:30:45,487 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-24 12:30:45,488 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-24 12:30:45,488 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-24 12:30:45,488 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-24 12:30:45,488 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-24 12:30:45,488 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-24 12:30:45,488 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-24 12:30:45,489 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-24 12:30:45,489 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-24 12:30:45,489 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-24 12:30:45,489 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-24 12:30:45,489 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-24 12:30:45,489 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-24 12:30:45,489 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-24 12:30:45,490 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-24 12:30:45,490 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-24 12:30:45,490 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-24 12:30:45,490 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-24 12:30:45,490 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 12:30:45,490 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-24 12:30:45,491 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-24 12:30:45,491 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-24 12:30:45,491 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-24 12:30:45,491 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-01-24 12:30:45,491 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-24 12:30:45,491 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-24 12:30:45,491 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-24 12:30:45,492 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-24 12:30:45,492 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-24 12:30:45,525 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-24 12:30:45,536 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-24 12:30:45,539 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-24 12:30:45,540 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-24 12:30:45,541 INFO L276 PluginConnector]: CDTParser initialized [2018-01-24 12:30:45,542 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_3_true-valid-memsafety_true-termination.i [2018-01-24 12:30:45,731 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-24 12:30:45,736 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-24 12:30:45,737 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-24 12:30:45,737 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-24 12:30:45,741 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-24 12:30:45,742 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 12:30:45" (1/1) ... [2018-01-24 12:30:45,745 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7bc1eb44 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:30:45, skipping insertion in model container [2018-01-24 12:30:45,745 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 12:30:45" (1/1) ... [2018-01-24 12:30:45,758 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 12:30:45,807 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 12:30:45,936 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 12:30:45,961 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 12:30:45,973 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:30:45 WrapperNode [2018-01-24 12:30:45,973 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-24 12:30:45,974 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-24 12:30:45,974 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-24 12:30:45,974 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-24 12:30:45,987 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:30:45" (1/1) ... [2018-01-24 12:30:45,987 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:30:45" (1/1) ... [2018-01-24 12:30:46,001 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:30:45" (1/1) ... [2018-01-24 12:30:46,001 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:30:45" (1/1) ... [2018-01-24 12:30:46,012 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:30:45" (1/1) ... [2018-01-24 12:30:46,015 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:30:45" (1/1) ... [2018-01-24 12:30:46,017 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:30:45" (1/1) ... [2018-01-24 12:30:46,020 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-24 12:30:46,021 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-24 12:30:46,021 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-24 12:30:46,021 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-24 12:30:46,022 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:30:45" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 12:30:46,068 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-24 12:30:46,069 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-24 12:30:46,069 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-01-24 12:30:46,069 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-01-24 12:30:46,069 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-01-24 12:30:46,069 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-01-24 12:30:46,069 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-01-24 12:30:46,070 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-01-24 12:30:46,070 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-01-24 12:30:46,070 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-01-24 12:30:46,070 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-01-24 12:30:46,070 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-01-24 12:30:46,070 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-01-24 12:30:46,070 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-01-24 12:30:46,071 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-01-24 12:30:46,071 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-01-24 12:30:46,071 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-01-24 12:30:46,071 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-01-24 12:30:46,071 INFO L136 BoogieDeclarations]: Found implementation of procedure f_22_get [2018-01-24 12:30:46,071 INFO L136 BoogieDeclarations]: Found implementation of procedure f_22_put [2018-01-24 12:30:46,072 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-01-24 12:30:46,072 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-24 12:30:46,072 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-24 12:30:46,072 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-24 12:30:46,072 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-24 12:30:46,073 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-24 12:30:46,073 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-24 12:30:46,073 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-24 12:30:46,073 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-24 12:30:46,073 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-24 12:30:46,073 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-24 12:30:46,074 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-24 12:30:46,074 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-24 12:30:46,074 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-24 12:30:46,074 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-24 12:30:46,074 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-01-24 12:30:46,074 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-01-24 12:30:46,075 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-01-24 12:30:46,075 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-01-24 12:30:46,075 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-01-24 12:30:46,075 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-01-24 12:30:46,075 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-01-24 12:30:46,075 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-01-24 12:30:46,075 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-01-24 12:30:46,076 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-01-24 12:30:46,076 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-01-24 12:30:46,076 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-01-24 12:30:46,076 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-01-24 12:30:46,076 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-01-24 12:30:46,076 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-01-24 12:30:46,076 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-01-24 12:30:46,077 INFO L128 BoogieDeclarations]: Found specification of procedure f_22_get [2018-01-24 12:30:46,077 INFO L128 BoogieDeclarations]: Found specification of procedure f_22_put [2018-01-24 12:30:46,077 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-01-24 12:30:46,077 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-24 12:30:46,077 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-24 12:30:46,077 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-24 12:30:46,337 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-01-24 12:30:46,532 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-24 12:30:46,533 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 12:30:46 BoogieIcfgContainer [2018-01-24 12:30:46,533 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-24 12:30:46,534 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-24 12:30:46,535 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-24 12:30:46,537 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-24 12:30:46,537 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.01 12:30:45" (1/3) ... [2018-01-24 12:30:46,538 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4fcba919 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 12:30:46, skipping insertion in model container [2018-01-24 12:30:46,539 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:30:45" (2/3) ... [2018-01-24 12:30:46,539 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4fcba919 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 12:30:46, skipping insertion in model container [2018-01-24 12:30:46,539 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 12:30:46" (3/3) ... [2018-01-24 12:30:46,541 INFO L105 eAbstractionObserver]: Analyzing ICFG memleaks_test22_3_true-valid-memsafety_true-termination.i [2018-01-24 12:30:46,547 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-24 12:30:46,553 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2018-01-24 12:30:46,594 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-24 12:30:46,594 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-24 12:30:46,594 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-24 12:30:46,594 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-24 12:30:46,594 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-24 12:30:46,594 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-24 12:30:46,594 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-24 12:30:46,594 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-24 12:30:46,595 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-24 12:30:46,615 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states. [2018-01-24 12:30:46,621 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-24 12:30:46,622 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:30:46,623 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:30:46,623 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:30:46,627 INFO L82 PathProgramCache]: Analyzing trace with hash 1245228870, now seen corresponding path program 1 times [2018-01-24 12:30:46,628 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:30:46,629 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:30:46,677 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:30:46,677 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:30:46,678 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:30:46,724 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:30:46,731 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:30:46,926 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:30:46,929 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:30:46,929 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 12:30:46,931 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 12:30:46,945 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 12:30:46,946 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:30:46,948 INFO L87 Difference]: Start difference. First operand 151 states. Second operand 5 states. [2018-01-24 12:30:47,015 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:30:47,016 INFO L93 Difference]: Finished difference Result 290 states and 307 transitions. [2018-01-24 12:30:47,016 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 12:30:47,017 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-01-24 12:30:47,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:30:47,029 INFO L225 Difference]: With dead ends: 290 [2018-01-24 12:30:47,030 INFO L226 Difference]: Without dead ends: 154 [2018-01-24 12:30:47,034 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:30:47,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-01-24 12:30:47,075 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 152. [2018-01-24 12:30:47,076 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-01-24 12:30:47,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 161 transitions. [2018-01-24 12:30:47,081 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 161 transitions. Word has length 17 [2018-01-24 12:30:47,082 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:30:47,082 INFO L432 AbstractCegarLoop]: Abstraction has 152 states and 161 transitions. [2018-01-24 12:30:47,082 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 12:30:47,082 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 161 transitions. [2018-01-24 12:30:47,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 12:30:47,083 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:30:47,083 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:30:47,083 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:30:47,084 INFO L82 PathProgramCache]: Analyzing trace with hash -1572748952, now seen corresponding path program 1 times [2018-01-24 12:30:47,084 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:30:47,084 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:30:47,086 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:30:47,086 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:30:47,086 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:30:47,107 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:30:47,109 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:30:47,163 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:30:47,163 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:30:47,164 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 12:30:47,165 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 12:30:47,166 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 12:30:47,166 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:30:47,166 INFO L87 Difference]: Start difference. First operand 152 states and 161 transitions. Second operand 6 states. [2018-01-24 12:30:47,378 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:30:47,378 INFO L93 Difference]: Finished difference Result 154 states and 163 transitions. [2018-01-24 12:30:47,379 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 12:30:47,379 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-01-24 12:30:47,379 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:30:47,381 INFO L225 Difference]: With dead ends: 154 [2018-01-24 12:30:47,381 INFO L226 Difference]: Without dead ends: 153 [2018-01-24 12:30:47,385 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:30:47,385 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-01-24 12:30:47,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 151. [2018-01-24 12:30:47,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-01-24 12:30:47,399 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 160 transitions. [2018-01-24 12:30:47,400 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 160 transitions. Word has length 19 [2018-01-24 12:30:47,400 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:30:47,400 INFO L432 AbstractCegarLoop]: Abstraction has 151 states and 160 transitions. [2018-01-24 12:30:47,400 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 12:30:47,400 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 160 transitions. [2018-01-24 12:30:47,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 12:30:47,401 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:30:47,401 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:30:47,401 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:30:47,402 INFO L82 PathProgramCache]: Analyzing trace with hash -1572748951, now seen corresponding path program 1 times [2018-01-24 12:30:47,402 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:30:47,402 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:30:47,403 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:30:47,404 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:30:47,404 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:30:47,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:30:47,428 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:30:47,685 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:30:47,686 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:30:47,686 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 12:30:47,686 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 12:30:47,686 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 12:30:47,687 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:30:47,687 INFO L87 Difference]: Start difference. First operand 151 states and 160 transitions. Second operand 7 states. [2018-01-24 12:30:47,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:30:47,916 INFO L93 Difference]: Finished difference Result 153 states and 162 transitions. [2018-01-24 12:30:47,917 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 12:30:47,917 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-01-24 12:30:47,917 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:30:47,918 INFO L225 Difference]: With dead ends: 153 [2018-01-24 12:30:47,918 INFO L226 Difference]: Without dead ends: 152 [2018-01-24 12:30:47,919 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-01-24 12:30:47,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-01-24 12:30:47,929 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 150. [2018-01-24 12:30:47,929 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-01-24 12:30:47,931 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 159 transitions. [2018-01-24 12:30:47,932 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 159 transitions. Word has length 19 [2018-01-24 12:30:47,932 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:30:47,932 INFO L432 AbstractCegarLoop]: Abstraction has 150 states and 159 transitions. [2018-01-24 12:30:47,932 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 12:30:47,932 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 159 transitions. [2018-01-24 12:30:47,933 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-24 12:30:47,934 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:30:47,934 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:30:47,934 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:30:47,934 INFO L82 PathProgramCache]: Analyzing trace with hash -336004596, now seen corresponding path program 1 times [2018-01-24 12:30:47,934 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:30:47,934 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:30:47,936 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:30:47,936 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:30:47,936 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:30:47,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:30:47,956 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:30:48,058 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:30:48,058 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:30:48,058 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 12:30:48,058 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 12:30:48,059 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 12:30:48,059 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-01-24 12:30:48,059 INFO L87 Difference]: Start difference. First operand 150 states and 159 transitions. Second operand 9 states. [2018-01-24 12:30:48,213 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:30:48,213 INFO L93 Difference]: Finished difference Result 256 states and 271 transitions. [2018-01-24 12:30:48,214 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 12:30:48,214 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-01-24 12:30:48,214 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:30:48,216 INFO L225 Difference]: With dead ends: 256 [2018-01-24 12:30:48,216 INFO L226 Difference]: Without dead ends: 171 [2018-01-24 12:30:48,218 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-01-24 12:30:48,218 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-01-24 12:30:48,232 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 164. [2018-01-24 12:30:48,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2018-01-24 12:30:48,235 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 173 transitions. [2018-01-24 12:30:48,235 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 173 transitions. Word has length 29 [2018-01-24 12:30:48,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:30:48,236 INFO L432 AbstractCegarLoop]: Abstraction has 164 states and 173 transitions. [2018-01-24 12:30:48,236 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 12:30:48,236 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 173 transitions. [2018-01-24 12:30:48,237 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 12:30:48,237 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:30:48,237 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:30:48,238 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:30:48,238 INFO L82 PathProgramCache]: Analyzing trace with hash 610577100, now seen corresponding path program 1 times [2018-01-24 12:30:48,238 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:30:48,238 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:30:48,240 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:30:48,240 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:30:48,240 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:30:48,257 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:30:48,258 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:30:48,344 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:30:48,344 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:30:48,345 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 12:30:48,345 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 12:30:48,346 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 12:30:48,346 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 12:30:48,346 INFO L87 Difference]: Start difference. First operand 164 states and 173 transitions. Second operand 10 states. [2018-01-24 12:30:48,561 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:30:48,561 INFO L93 Difference]: Finished difference Result 164 states and 173 transitions. [2018-01-24 12:30:48,562 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 12:30:48,562 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 34 [2018-01-24 12:30:48,562 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:30:48,563 INFO L225 Difference]: With dead ends: 164 [2018-01-24 12:30:48,563 INFO L226 Difference]: Without dead ends: 163 [2018-01-24 12:30:48,564 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 12:30:48,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-01-24 12:30:48,574 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 163. [2018-01-24 12:30:48,574 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-01-24 12:30:48,576 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 172 transitions. [2018-01-24 12:30:48,576 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 172 transitions. Word has length 34 [2018-01-24 12:30:48,577 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:30:48,577 INFO L432 AbstractCegarLoop]: Abstraction has 163 states and 172 transitions. [2018-01-24 12:30:48,577 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 12:30:48,577 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 172 transitions. [2018-01-24 12:30:48,578 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 12:30:48,578 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:30:48,578 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:30:48,579 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:30:48,579 INFO L82 PathProgramCache]: Analyzing trace with hash 610577101, now seen corresponding path program 1 times [2018-01-24 12:30:48,579 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:30:48,579 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:30:48,580 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:30:48,580 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:30:48,580 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:30:48,596 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:30:48,597 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:30:48,629 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:30:48,630 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:30:48,630 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 12:30:48,630 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 12:30:48,630 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 12:30:48,630 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 12:30:48,630 INFO L87 Difference]: Start difference. First operand 163 states and 172 transitions. Second operand 4 states. [2018-01-24 12:30:48,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:30:48,657 INFO L93 Difference]: Finished difference Result 287 states and 303 transitions. [2018-01-24 12:30:48,658 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 12:30:48,658 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2018-01-24 12:30:48,659 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:30:48,660 INFO L225 Difference]: With dead ends: 287 [2018-01-24 12:30:48,660 INFO L226 Difference]: Without dead ends: 164 [2018-01-24 12:30:48,661 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:30:48,662 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-01-24 12:30:48,672 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 164. [2018-01-24 12:30:48,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2018-01-24 12:30:48,673 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 173 transitions. [2018-01-24 12:30:48,674 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 173 transitions. Word has length 34 [2018-01-24 12:30:48,674 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:30:48,674 INFO L432 AbstractCegarLoop]: Abstraction has 164 states and 173 transitions. [2018-01-24 12:30:48,674 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 12:30:48,674 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 173 transitions. [2018-01-24 12:30:48,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-24 12:30:48,676 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:30:48,676 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:30:48,676 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:30:48,676 INFO L82 PathProgramCache]: Analyzing trace with hash -838244594, now seen corresponding path program 1 times [2018-01-24 12:30:48,676 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:30:48,677 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:30:48,678 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:30:48,678 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:30:48,678 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:30:48,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:30:48,696 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:30:48,750 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:30:48,750 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:30:48,750 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:30:48,761 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:30:48,798 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:30:48,809 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:30:48,846 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:30:48,879 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:30:48,879 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-01-24 12:30:48,879 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 12:30:48,880 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 12:30:48,880 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:30:48,880 INFO L87 Difference]: Start difference. First operand 164 states and 173 transitions. Second operand 6 states. [2018-01-24 12:30:48,930 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:30:48,930 INFO L93 Difference]: Finished difference Result 288 states and 304 transitions. [2018-01-24 12:30:48,930 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 12:30:48,930 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-01-24 12:30:48,931 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:30:48,932 INFO L225 Difference]: With dead ends: 288 [2018-01-24 12:30:48,932 INFO L226 Difference]: Without dead ends: 165 [2018-01-24 12:30:48,934 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:30:48,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-01-24 12:30:48,943 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 165. [2018-01-24 12:30:48,944 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-01-24 12:30:48,945 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 174 transitions. [2018-01-24 12:30:48,945 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 174 transitions. Word has length 35 [2018-01-24 12:30:48,946 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:30:48,946 INFO L432 AbstractCegarLoop]: Abstraction has 165 states and 174 transitions. [2018-01-24 12:30:48,946 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 12:30:48,946 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 174 transitions. [2018-01-24 12:30:48,947 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 12:30:48,947 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:30:48,947 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:30:48,948 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:30:48,948 INFO L82 PathProgramCache]: Analyzing trace with hash 1492923117, now seen corresponding path program 2 times [2018-01-24 12:30:48,948 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:30:48,948 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:30:48,949 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:30:48,950 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:30:48,950 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:30:48,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:30:48,967 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:30:49,005 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:30:49,006 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:30:49,006 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:30:49,019 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 12:30:49,048 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:30:49,052 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:30:49,057 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:30:49,088 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 12:30:49,090 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:30:49,110 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 12:30:49,111 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:30:49,133 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 12:30:49,133 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 12:30:49,848 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 12:30:49,880 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-24 12:30:49,880 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [6] total 19 [2018-01-24 12:30:49,881 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-24 12:30:49,881 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-24 12:30:49,881 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=291, Unknown=0, NotChecked=0, Total=342 [2018-01-24 12:30:49,881 INFO L87 Difference]: Start difference. First operand 165 states and 174 transitions. Second operand 19 states. [2018-01-24 12:30:51,990 WARN L143 SmtUtils]: Spent 2044ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-24 12:30:54,107 WARN L143 SmtUtils]: Spent 2021ms on a formula simplification that was a NOOP. DAG size: 31 [2018-01-24 12:30:56,269 WARN L143 SmtUtils]: Spent 2040ms on a formula simplification that was a NOOP. DAG size: 31 [2018-01-24 12:30:58,348 WARN L143 SmtUtils]: Spent 2027ms on a formula simplification that was a NOOP. DAG size: 32 [2018-01-24 12:31:01,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:31:01,367 INFO L93 Difference]: Finished difference Result 364 states and 384 transitions. [2018-01-24 12:31:01,368 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-24 12:31:01,368 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 36 [2018-01-24 12:31:01,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:31:01,369 INFO L225 Difference]: With dead ends: 364 [2018-01-24 12:31:01,369 INFO L226 Difference]: Without dead ends: 241 [2018-01-24 12:31:01,370 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 9.0s TimeCoverageRelationStatistics Valid=99, Invalid=603, Unknown=0, NotChecked=0, Total=702 [2018-01-24 12:31:01,371 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 241 states. [2018-01-24 12:31:01,383 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 241 to 165. [2018-01-24 12:31:01,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-01-24 12:31:01,385 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 174 transitions. [2018-01-24 12:31:01,385 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 174 transitions. Word has length 36 [2018-01-24 12:31:01,385 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:31:01,385 INFO L432 AbstractCegarLoop]: Abstraction has 165 states and 174 transitions. [2018-01-24 12:31:01,385 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-24 12:31:01,385 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 174 transitions. [2018-01-24 12:31:01,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-24 12:31:01,386 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:31:01,386 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:31:01,386 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:31:01,387 INFO L82 PathProgramCache]: Analyzing trace with hash 278126369, now seen corresponding path program 1 times [2018-01-24 12:31:01,387 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:31:01,387 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:31:01,388 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:01,388 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:31:01,388 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:01,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:31:01,402 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:31:01,530 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:31:01,531 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:31:01,531 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 12:31:01,531 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 12:31:01,532 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 12:31:01,532 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-01-24 12:31:01,532 INFO L87 Difference]: Start difference. First operand 165 states and 174 transitions. Second operand 9 states. [2018-01-24 12:31:01,660 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:31:01,660 INFO L93 Difference]: Finished difference Result 238 states and 254 transitions. [2018-01-24 12:31:01,660 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 12:31:01,661 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 42 [2018-01-24 12:31:01,661 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:31:01,662 INFO L225 Difference]: With dead ends: 238 [2018-01-24 12:31:01,662 INFO L226 Difference]: Without dead ends: 179 [2018-01-24 12:31:01,663 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-01-24 12:31:01,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-01-24 12:31:01,680 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 175. [2018-01-24 12:31:01,680 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-01-24 12:31:01,682 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 185 transitions. [2018-01-24 12:31:01,682 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 185 transitions. Word has length 42 [2018-01-24 12:31:01,683 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:31:01,683 INFO L432 AbstractCegarLoop]: Abstraction has 175 states and 185 transitions. [2018-01-24 12:31:01,683 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 12:31:01,683 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 185 transitions. [2018-01-24 12:31:01,684 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-24 12:31:01,684 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:31:01,684 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:31:01,684 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:31:01,685 INFO L82 PathProgramCache]: Analyzing trace with hash 2131974142, now seen corresponding path program 1 times [2018-01-24 12:31:01,685 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:31:01,685 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:31:01,686 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:01,686 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:31:01,687 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:01,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:31:01,703 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:31:01,797 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 12:31:01,797 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:31:01,797 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 12:31:01,797 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 12:31:01,798 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 12:31:01,798 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 12:31:01,798 INFO L87 Difference]: Start difference. First operand 175 states and 185 transitions. Second operand 10 states. [2018-01-24 12:31:02,022 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:31:02,023 INFO L93 Difference]: Finished difference Result 175 states and 185 transitions. [2018-01-24 12:31:02,023 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 12:31:02,023 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 42 [2018-01-24 12:31:02,023 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:31:02,024 INFO L225 Difference]: With dead ends: 175 [2018-01-24 12:31:02,024 INFO L226 Difference]: Without dead ends: 173 [2018-01-24 12:31:02,025 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 12:31:02,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2018-01-24 12:31:02,039 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 173. [2018-01-24 12:31:02,039 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-01-24 12:31:02,041 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 183 transitions. [2018-01-24 12:31:02,041 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 183 transitions. Word has length 42 [2018-01-24 12:31:02,042 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:31:02,042 INFO L432 AbstractCegarLoop]: Abstraction has 173 states and 183 transitions. [2018-01-24 12:31:02,042 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 12:31:02,042 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 183 transitions. [2018-01-24 12:31:02,043 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-24 12:31:02,043 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:31:02,043 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:31:02,043 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:31:02,044 INFO L82 PathProgramCache]: Analyzing trace with hash 2131974143, now seen corresponding path program 1 times [2018-01-24 12:31:02,044 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:31:02,044 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:31:02,045 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:02,046 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:31:02,046 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:02,063 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:31:02,064 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:31:02,117 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:31:02,117 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:31:02,117 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:31:02,122 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:31:02,152 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:31:02,156 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:31:02,178 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:31:02,200 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:31:02,200 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-01-24 12:31:02,200 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 12:31:02,201 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 12:31:02,201 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-01-24 12:31:02,201 INFO L87 Difference]: Start difference. First operand 173 states and 183 transitions. Second operand 8 states. [2018-01-24 12:31:02,239 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:31:02,239 INFO L93 Difference]: Finished difference Result 294 states and 311 transitions. [2018-01-24 12:31:02,239 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 12:31:02,239 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 42 [2018-01-24 12:31:02,240 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:31:02,241 INFO L225 Difference]: With dead ends: 294 [2018-01-24 12:31:02,241 INFO L226 Difference]: Without dead ends: 174 [2018-01-24 12:31:02,241 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 42 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-01-24 12:31:02,242 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2018-01-24 12:31:02,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 174. [2018-01-24 12:31:02,253 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-01-24 12:31:02,254 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 184 transitions. [2018-01-24 12:31:02,254 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 184 transitions. Word has length 42 [2018-01-24 12:31:02,255 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:31:02,255 INFO L432 AbstractCegarLoop]: Abstraction has 174 states and 184 transitions. [2018-01-24 12:31:02,255 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 12:31:02,255 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 184 transitions. [2018-01-24 12:31:02,255 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-24 12:31:02,255 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:31:02,256 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:31:02,256 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:31:02,256 INFO L82 PathProgramCache]: Analyzing trace with hash 731661120, now seen corresponding path program 2 times [2018-01-24 12:31:02,256 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:31:02,256 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:31:02,257 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:02,257 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:31:02,258 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:02,271 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:31:02,273 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:31:02,331 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:31:02,331 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:31:02,411 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:31:02,416 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 12:31:02,438 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:31:02,442 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:31:02,446 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:31:02,451 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 12:31:02,451 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:31:02,470 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 12:31:02,471 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:31:02,489 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 12:31:02,489 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 12:31:03,005 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 12:31:03,025 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-24 12:31:03,025 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [8] total 22 [2018-01-24 12:31:03,025 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-24 12:31:03,026 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-24 12:31:03,026 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=390, Unknown=0, NotChecked=0, Total=462 [2018-01-24 12:31:03,026 INFO L87 Difference]: Start difference. First operand 174 states and 184 transitions. Second operand 22 states. [2018-01-24 12:31:05,244 WARN L143 SmtUtils]: Spent 2020ms on a formula simplification that was a NOOP. DAG size: 31 [2018-01-24 12:31:06,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:31:06,363 INFO L93 Difference]: Finished difference Result 325 states and 343 transitions. [2018-01-24 12:31:06,363 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-24 12:31:06,363 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 43 [2018-01-24 12:31:06,364 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:31:06,364 INFO L225 Difference]: With dead ends: 325 [2018-01-24 12:31:06,365 INFO L226 Difference]: Without dead ends: 205 [2018-01-24 12:31:06,365 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 29 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 155 ImplicationChecksByTransitivity, 2.8s TimeCoverageRelationStatistics Valid=147, Invalid=845, Unknown=0, NotChecked=0, Total=992 [2018-01-24 12:31:06,366 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2018-01-24 12:31:06,379 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 173. [2018-01-24 12:31:06,379 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-01-24 12:31:06,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 183 transitions. [2018-01-24 12:31:06,381 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 183 transitions. Word has length 43 [2018-01-24 12:31:06,381 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:31:06,381 INFO L432 AbstractCegarLoop]: Abstraction has 173 states and 183 transitions. [2018-01-24 12:31:06,381 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-24 12:31:06,381 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 183 transitions. [2018-01-24 12:31:06,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-24 12:31:06,382 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:31:06,382 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:31:06,382 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:31:06,382 INFO L82 PathProgramCache]: Analyzing trace with hash 689381786, now seen corresponding path program 1 times [2018-01-24 12:31:06,382 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:31:06,382 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:31:06,383 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:06,383 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:31:06,383 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:06,390 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:31:06,391 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:31:06,414 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-24 12:31:06,414 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:31:06,414 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 12:31:06,415 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 12:31:06,415 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 12:31:06,415 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 12:31:06,416 INFO L87 Difference]: Start difference. First operand 173 states and 183 transitions. Second operand 3 states. [2018-01-24 12:31:06,564 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:31:06,564 INFO L93 Difference]: Finished difference Result 193 states and 206 transitions. [2018-01-24 12:31:06,564 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 12:31:06,564 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 47 [2018-01-24 12:31:06,564 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:31:06,565 INFO L225 Difference]: With dead ends: 193 [2018-01-24 12:31:06,565 INFO L226 Difference]: Without dead ends: 179 [2018-01-24 12:31:06,566 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 12:31:06,566 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-01-24 12:31:06,589 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 169. [2018-01-24 12:31:06,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-01-24 12:31:06,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 178 transitions. [2018-01-24 12:31:06,591 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 178 transitions. Word has length 47 [2018-01-24 12:31:06,591 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:31:06,591 INFO L432 AbstractCegarLoop]: Abstraction has 169 states and 178 transitions. [2018-01-24 12:31:06,591 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 12:31:06,591 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 178 transitions. [2018-01-24 12:31:06,592 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-01-24 12:31:06,592 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:31:06,592 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:31:06,592 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:31:06,592 INFO L82 PathProgramCache]: Analyzing trace with hash 2000778853, now seen corresponding path program 1 times [2018-01-24 12:31:06,592 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:31:06,592 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:31:06,593 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:06,593 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:31:06,593 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:06,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:31:06,607 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:31:06,695 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 12:31:06,695 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:31:06,696 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-24 12:31:06,696 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 12:31:06,696 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 12:31:06,696 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-01-24 12:31:06,696 INFO L87 Difference]: Start difference. First operand 169 states and 178 transitions. Second operand 8 states. [2018-01-24 12:31:06,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:31:06,743 INFO L93 Difference]: Finished difference Result 265 states and 278 transitions. [2018-01-24 12:31:06,744 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 12:31:06,744 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 49 [2018-01-24 12:31:06,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:31:06,745 INFO L225 Difference]: With dead ends: 265 [2018-01-24 12:31:06,745 INFO L226 Difference]: Without dead ends: 145 [2018-01-24 12:31:06,746 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-01-24 12:31:06,746 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-01-24 12:31:06,766 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 145. [2018-01-24 12:31:06,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-01-24 12:31:06,768 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 151 transitions. [2018-01-24 12:31:06,768 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 151 transitions. Word has length 49 [2018-01-24 12:31:06,769 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:31:06,769 INFO L432 AbstractCegarLoop]: Abstraction has 145 states and 151 transitions. [2018-01-24 12:31:06,769 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 12:31:06,769 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 151 transitions. [2018-01-24 12:31:06,770 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-01-24 12:31:06,770 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:31:06,770 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:31:06,770 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:31:06,770 INFO L82 PathProgramCache]: Analyzing trace with hash 2066481475, now seen corresponding path program 1 times [2018-01-24 12:31:06,770 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:31:06,770 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:31:06,771 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:06,771 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:31:06,772 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:06,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:31:06,786 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:31:06,898 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 12:31:06,899 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:31:06,899 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-01-24 12:31:06,899 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 12:31:06,899 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 12:31:06,899 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 12:31:06,900 INFO L87 Difference]: Start difference. First operand 145 states and 151 transitions. Second operand 10 states. [2018-01-24 12:31:07,010 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:31:07,010 INFO L93 Difference]: Finished difference Result 243 states and 253 transitions. [2018-01-24 12:31:07,010 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 12:31:07,010 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 54 [2018-01-24 12:31:07,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:31:07,011 INFO L225 Difference]: With dead ends: 243 [2018-01-24 12:31:07,011 INFO L226 Difference]: Without dead ends: 145 [2018-01-24 12:31:07,012 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 12:31:07,012 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-01-24 12:31:07,025 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 145. [2018-01-24 12:31:07,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-01-24 12:31:07,026 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 150 transitions. [2018-01-24 12:31:07,026 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 150 transitions. Word has length 54 [2018-01-24 12:31:07,026 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:31:07,027 INFO L432 AbstractCegarLoop]: Abstraction has 145 states and 150 transitions. [2018-01-24 12:31:07,027 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 12:31:07,027 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 150 transitions. [2018-01-24 12:31:07,027 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-01-24 12:31:07,028 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:31:07,028 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:31:07,028 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:31:07,028 INFO L82 PathProgramCache]: Analyzing trace with hash 1850180082, now seen corresponding path program 1 times [2018-01-24 12:31:07,028 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:31:07,028 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:31:07,029 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:07,029 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:31:07,029 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:07,045 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:31:07,046 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:31:07,241 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 12:31:07,242 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:31:07,242 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2018-01-24 12:31:07,242 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 12:31:07,242 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 12:31:07,243 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=183, Unknown=0, NotChecked=0, Total=210 [2018-01-24 12:31:07,243 INFO L87 Difference]: Start difference. First operand 145 states and 150 transitions. Second operand 15 states. [2018-01-24 12:31:07,578 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:31:07,578 INFO L93 Difference]: Finished difference Result 145 states and 150 transitions. [2018-01-24 12:31:07,578 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-24 12:31:07,579 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 65 [2018-01-24 12:31:07,579 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:31:07,580 INFO L225 Difference]: With dead ends: 145 [2018-01-24 12:31:07,580 INFO L226 Difference]: Without dead ends: 143 [2018-01-24 12:31:07,580 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=47, Invalid=333, Unknown=0, NotChecked=0, Total=380 [2018-01-24 12:31:07,580 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-01-24 12:31:07,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2018-01-24 12:31:07,596 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-01-24 12:31:07,597 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 148 transitions. [2018-01-24 12:31:07,597 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 148 transitions. Word has length 65 [2018-01-24 12:31:07,598 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:31:07,598 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 148 transitions. [2018-01-24 12:31:07,598 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 12:31:07,598 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 148 transitions. [2018-01-24 12:31:07,599 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-01-24 12:31:07,599 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:31:07,599 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:31:07,599 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:31:07,599 INFO L82 PathProgramCache]: Analyzing trace with hash 1850180083, now seen corresponding path program 1 times [2018-01-24 12:31:07,600 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:31:07,600 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:31:07,601 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:07,601 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:31:07,601 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:07,621 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:31:07,623 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:31:07,695 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:31:07,695 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:31:07,696 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:31:07,706 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:31:07,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:31:07,750 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:31:07,764 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:31:07,788 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:31:07,788 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-01-24 12:31:07,788 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 12:31:07,788 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 12:31:07,789 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-01-24 12:31:07,789 INFO L87 Difference]: Start difference. First operand 143 states and 148 transitions. Second operand 10 states. [2018-01-24 12:31:07,841 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:31:07,841 INFO L93 Difference]: Finished difference Result 260 states and 270 transitions. [2018-01-24 12:31:07,841 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-24 12:31:07,841 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 65 [2018-01-24 12:31:07,842 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:31:07,843 INFO L225 Difference]: With dead ends: 260 [2018-01-24 12:31:07,843 INFO L226 Difference]: Without dead ends: 144 [2018-01-24 12:31:07,843 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-01-24 12:31:07,844 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-01-24 12:31:07,861 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 144. [2018-01-24 12:31:07,861 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-01-24 12:31:07,862 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 149 transitions. [2018-01-24 12:31:07,863 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 149 transitions. Word has length 65 [2018-01-24 12:31:07,863 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:31:07,863 INFO L432 AbstractCegarLoop]: Abstraction has 144 states and 149 transitions. [2018-01-24 12:31:07,863 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 12:31:07,863 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 149 transitions. [2018-01-24 12:31:07,864 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-01-24 12:31:07,864 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:31:07,864 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:31:07,864 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:31:07,865 INFO L82 PathProgramCache]: Analyzing trace with hash -1823769198, now seen corresponding path program 2 times [2018-01-24 12:31:07,865 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:31:07,865 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:31:07,866 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:07,866 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:31:07,866 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:07,885 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:31:07,886 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:31:08,008 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:31:08,009 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:31:08,009 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:31:08,022 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 12:31:08,061 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:31:08,067 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:31:08,074 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:31:08,080 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 12:31:08,081 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:31:08,109 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 12:31:08,110 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:31:08,131 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 12:31:08,131 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 12:31:09,096 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-01-24 12:31:09,116 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-24 12:31:09,116 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [10] total 29 [2018-01-24 12:31:09,117 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-24 12:31:09,117 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-24 12:31:09,117 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=705, Unknown=0, NotChecked=0, Total=812 [2018-01-24 12:31:09,117 INFO L87 Difference]: Start difference. First operand 144 states and 149 transitions. Second operand 29 states. [2018-01-24 12:31:11,282 WARN L143 SmtUtils]: Spent 2037ms on a formula simplification that was a NOOP. DAG size: 31 [2018-01-24 12:31:13,646 WARN L143 SmtUtils]: Spent 2134ms on a formula simplification that was a NOOP. DAG size: 32 [2018-01-24 12:31:14,670 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:31:14,670 INFO L93 Difference]: Finished difference Result 259 states and 271 transitions. [2018-01-24 12:31:14,670 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-24 12:31:14,670 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 66 [2018-01-24 12:31:14,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:31:14,671 INFO L225 Difference]: With dead ends: 259 [2018-01-24 12:31:14,671 INFO L226 Difference]: Without dead ends: 143 [2018-01-24 12:31:14,672 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 369 ImplicationChecksByTransitivity, 5.5s TimeCoverageRelationStatistics Valid=227, Invalid=1579, Unknown=0, NotChecked=0, Total=1806 [2018-01-24 12:31:14,672 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-01-24 12:31:14,686 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2018-01-24 12:31:14,686 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-01-24 12:31:14,687 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 148 transitions. [2018-01-24 12:31:14,687 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 148 transitions. Word has length 66 [2018-01-24 12:31:14,688 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:31:14,688 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 148 transitions. [2018-01-24 12:31:14,688 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-24 12:31:14,688 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 148 transitions. [2018-01-24 12:31:14,689 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 81 [2018-01-24 12:31:14,689 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:31:14,689 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:31:14,690 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:31:14,690 INFO L82 PathProgramCache]: Analyzing trace with hash -920668901, now seen corresponding path program 1 times [2018-01-24 12:31:14,690 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:31:14,690 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:31:14,691 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:14,691 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:31:14,691 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:14,711 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:31:14,712 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:31:14,858 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-01-24 12:31:14,858 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:31:14,858 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-01-24 12:31:14,858 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-24 12:31:14,859 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-24 12:31:14,859 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156 [2018-01-24 12:31:14,859 INFO L87 Difference]: Start difference. First operand 143 states and 148 transitions. Second operand 13 states. [2018-01-24 12:31:14,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:31:14,941 INFO L93 Difference]: Finished difference Result 211 states and 219 transitions. [2018-01-24 12:31:14,941 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-24 12:31:14,941 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 80 [2018-01-24 12:31:14,941 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:31:14,942 INFO L225 Difference]: With dead ends: 211 [2018-01-24 12:31:14,942 INFO L226 Difference]: Without dead ends: 143 [2018-01-24 12:31:14,942 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2018-01-24 12:31:14,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-01-24 12:31:14,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2018-01-24 12:31:14,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-01-24 12:31:14,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 147 transitions. [2018-01-24 12:31:14,956 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 147 transitions. Word has length 80 [2018-01-24 12:31:14,956 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:31:14,956 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 147 transitions. [2018-01-24 12:31:14,956 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-24 12:31:14,956 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 147 transitions. [2018-01-24 12:31:14,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-01-24 12:31:14,957 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:31:14,957 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:31:14,957 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:31:14,958 INFO L82 PathProgramCache]: Analyzing trace with hash -773057741, now seen corresponding path program 1 times [2018-01-24 12:31:14,958 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:31:14,958 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:31:14,959 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:14,959 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:31:14,959 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:14,975 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:31:14,976 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:31:15,306 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-01-24 12:31:15,306 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:31:15,306 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2018-01-24 12:31:15,306 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-24 12:31:15,306 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-24 12:31:15,307 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=419, Unknown=0, NotChecked=0, Total=462 [2018-01-24 12:31:15,307 INFO L87 Difference]: Start difference. First operand 143 states and 147 transitions. Second operand 22 states. [2018-01-24 12:31:15,832 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:31:15,832 INFO L93 Difference]: Finished difference Result 172 states and 182 transitions. [2018-01-24 12:31:15,832 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-24 12:31:15,832 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 93 [2018-01-24 12:31:15,833 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:31:15,834 INFO L225 Difference]: With dead ends: 172 [2018-01-24 12:31:15,834 INFO L226 Difference]: Without dead ends: 170 [2018-01-24 12:31:15,835 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=75, Invalid=795, Unknown=0, NotChecked=0, Total=870 [2018-01-24 12:31:15,835 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states. [2018-01-24 12:31:15,859 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 165. [2018-01-24 12:31:15,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-01-24 12:31:15,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 175 transitions. [2018-01-24 12:31:15,861 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 175 transitions. Word has length 93 [2018-01-24 12:31:15,861 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:31:15,861 INFO L432 AbstractCegarLoop]: Abstraction has 165 states and 175 transitions. [2018-01-24 12:31:15,861 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-24 12:31:15,862 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 175 transitions. [2018-01-24 12:31:15,862 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-01-24 12:31:15,863 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:31:15,863 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:31:15,863 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:31:15,863 INFO L82 PathProgramCache]: Analyzing trace with hash -773057740, now seen corresponding path program 1 times [2018-01-24 12:31:15,863 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:31:15,863 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:31:15,864 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:15,865 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:31:15,865 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:15,889 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:31:15,891 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:31:16,051 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:31:16,052 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:31:16,052 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:31:16,057 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:31:16,101 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:31:16,104 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:31:16,115 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:31:16,136 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:31:16,136 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2018-01-24 12:31:16,136 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-24 12:31:16,136 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-24 12:31:16,136 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132 [2018-01-24 12:31:16,136 INFO L87 Difference]: Start difference. First operand 165 states and 175 transitions. Second operand 12 states. [2018-01-24 12:31:16,175 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:31:16,175 INFO L93 Difference]: Finished difference Result 302 states and 322 transitions. [2018-01-24 12:31:16,175 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 12:31:16,176 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 93 [2018-01-24 12:31:16,176 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:31:16,177 INFO L225 Difference]: With dead ends: 302 [2018-01-24 12:31:16,177 INFO L226 Difference]: Without dead ends: 166 [2018-01-24 12:31:16,178 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 93 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=61, Invalid=95, Unknown=0, NotChecked=0, Total=156 [2018-01-24 12:31:16,178 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2018-01-24 12:31:16,195 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 166. [2018-01-24 12:31:16,195 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-01-24 12:31:16,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 176 transitions. [2018-01-24 12:31:16,196 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 176 transitions. Word has length 93 [2018-01-24 12:31:16,196 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:31:16,196 INFO L432 AbstractCegarLoop]: Abstraction has 166 states and 176 transitions. [2018-01-24 12:31:16,196 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-24 12:31:16,196 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 176 transitions. [2018-01-24 12:31:16,198 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-01-24 12:31:16,198 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:31:16,198 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:31:16,198 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:31:16,198 INFO L82 PathProgramCache]: Analyzing trace with hash 572029523, now seen corresponding path program 2 times [2018-01-24 12:31:16,198 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:31:16,199 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:31:16,200 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:16,200 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:31:16,200 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:16,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:31:16,227 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:31:16,363 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:31:16,363 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:31:16,363 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:31:16,371 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 12:31:16,411 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:31:16,416 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:31:16,421 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:31:16,427 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 12:31:16,428 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:31:16,444 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 12:31:16,444 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:31:16,456 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 12:31:16,456 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 12:31:17,547 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-24 12:31:17,569 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-24 12:31:17,569 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [22] imperfect sequences [12] total 33 [2018-01-24 12:31:17,570 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-01-24 12:31:17,570 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-01-24 12:31:17,571 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=134, Invalid=922, Unknown=0, NotChecked=0, Total=1056 [2018-01-24 12:31:17,571 INFO L87 Difference]: Start difference. First operand 166 states and 176 transitions. Second operand 33 states. [2018-01-24 12:31:19,813 WARN L143 SmtUtils]: Spent 2024ms on a formula simplification that was a NOOP. DAG size: 34 [2018-01-24 12:31:21,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:31:21,338 INFO L93 Difference]: Finished difference Result 301 states and 323 transitions. [2018-01-24 12:31:21,338 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-24 12:31:21,338 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 94 [2018-01-24 12:31:21,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:31:21,339 INFO L225 Difference]: With dead ends: 301 [2018-01-24 12:31:21,340 INFO L226 Difference]: Without dead ends: 165 [2018-01-24 12:31:21,341 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 71 SyntacticMatches, 3 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 549 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=300, Invalid=2150, Unknown=0, NotChecked=0, Total=2450 [2018-01-24 12:31:21,341 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-01-24 12:31:21,360 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 165. [2018-01-24 12:31:21,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-01-24 12:31:21,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 173 transitions. [2018-01-24 12:31:21,361 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 173 transitions. Word has length 94 [2018-01-24 12:31:21,361 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:31:21,361 INFO L432 AbstractCegarLoop]: Abstraction has 165 states and 173 transitions. [2018-01-24 12:31:21,361 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-01-24 12:31:21,361 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 173 transitions. [2018-01-24 12:31:21,362 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-01-24 12:31:21,362 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:31:21,362 INFO L322 BasicCegarLoop]: trace histogram [9, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:31:21,362 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:31:21,362 INFO L82 PathProgramCache]: Analyzing trace with hash 700888674, now seen corresponding path program 1 times [2018-01-24 12:31:21,362 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:31:21,363 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:31:21,363 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:21,363 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:31:21,363 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:21,378 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:31:21,379 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:31:21,587 INFO L134 CoverageAnalysis]: Checked inductivity of 47 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-24 12:31:21,587 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:31:21,587 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-01-24 12:31:21,588 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-24 12:31:21,588 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-24 12:31:21,588 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156 [2018-01-24 12:31:21,588 INFO L87 Difference]: Start difference. First operand 165 states and 173 transitions. Second operand 13 states. [2018-01-24 12:31:21,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:31:21,683 INFO L93 Difference]: Finished difference Result 223 states and 233 transitions. [2018-01-24 12:31:21,684 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-24 12:31:21,684 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 102 [2018-01-24 12:31:21,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:31:21,685 INFO L225 Difference]: With dead ends: 223 [2018-01-24 12:31:21,686 INFO L226 Difference]: Without dead ends: 163 [2018-01-24 12:31:21,686 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2018-01-24 12:31:21,686 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-01-24 12:31:21,716 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 163. [2018-01-24 12:31:21,716 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-01-24 12:31:21,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 169 transitions. [2018-01-24 12:31:21,718 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 169 transitions. Word has length 102 [2018-01-24 12:31:21,718 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:31:21,718 INFO L432 AbstractCegarLoop]: Abstraction has 163 states and 169 transitions. [2018-01-24 12:31:21,718 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-24 12:31:21,718 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 169 transitions. [2018-01-24 12:31:21,719 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-01-24 12:31:21,719 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:31:21,719 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:31:21,719 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:31:21,720 INFO L82 PathProgramCache]: Analyzing trace with hash 1156968532, now seen corresponding path program 1 times [2018-01-24 12:31:21,720 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:31:21,720 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:31:21,721 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:21,721 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:31:21,721 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:21,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:31:21,746 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:31:22,101 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-24 12:31:22,101 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:31:22,101 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2018-01-24 12:31:22,102 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-24 12:31:22,102 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-24 12:31:22,102 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=553, Unknown=0, NotChecked=0, Total=600 [2018-01-24 12:31:22,102 INFO L87 Difference]: Start difference. First operand 163 states and 169 transitions. Second operand 25 states. [2018-01-24 12:31:22,624 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:31:22,624 INFO L93 Difference]: Finished difference Result 175 states and 185 transitions. [2018-01-24 12:31:22,625 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-24 12:31:22,625 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 109 [2018-01-24 12:31:22,625 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:31:22,626 INFO L225 Difference]: With dead ends: 175 [2018-01-24 12:31:22,626 INFO L226 Difference]: Without dead ends: 173 [2018-01-24 12:31:22,626 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=91, Invalid=1169, Unknown=0, NotChecked=0, Total=1260 [2018-01-24 12:31:22,627 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2018-01-24 12:31:22,658 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 169. [2018-01-24 12:31:22,658 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-01-24 12:31:22,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 179 transitions. [2018-01-24 12:31:22,659 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 179 transitions. Word has length 109 [2018-01-24 12:31:22,660 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:31:22,660 INFO L432 AbstractCegarLoop]: Abstraction has 169 states and 179 transitions. [2018-01-24 12:31:22,660 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-24 12:31:22,660 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 179 transitions. [2018-01-24 12:31:22,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 110 [2018-01-24 12:31:22,661 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:31:22,661 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:31:22,661 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:31:22,661 INFO L82 PathProgramCache]: Analyzing trace with hash 1156968533, now seen corresponding path program 1 times [2018-01-24 12:31:22,661 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:31:22,661 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:31:22,662 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:22,662 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:31:22,662 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:22,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:31:22,682 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:31:22,869 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:31:22,869 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:31:22,869 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:31:22,875 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:31:22,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:31:22,927 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:31:22,942 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:31:22,963 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:31:22,964 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 14 [2018-01-24 12:31:22,964 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-24 12:31:22,964 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-24 12:31:22,964 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=102, Unknown=0, NotChecked=0, Total=182 [2018-01-24 12:31:22,965 INFO L87 Difference]: Start difference. First operand 169 states and 179 transitions. Second operand 14 states. [2018-01-24 12:31:23,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:31:23,014 INFO L93 Difference]: Finished difference Result 308 states and 328 transitions. [2018-01-24 12:31:23,014 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-24 12:31:23,014 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 109 [2018-01-24 12:31:23,014 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:31:23,015 INFO L225 Difference]: With dead ends: 308 [2018-01-24 12:31:23,015 INFO L226 Difference]: Without dead ends: 170 [2018-01-24 12:31:23,016 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 109 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=84, Invalid=126, Unknown=0, NotChecked=0, Total=210 [2018-01-24 12:31:23,016 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states. [2018-01-24 12:31:23,036 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 170. [2018-01-24 12:31:23,036 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states. [2018-01-24 12:31:23,037 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 180 transitions. [2018-01-24 12:31:23,037 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 180 transitions. Word has length 109 [2018-01-24 12:31:23,037 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:31:23,037 INFO L432 AbstractCegarLoop]: Abstraction has 170 states and 180 transitions. [2018-01-24 12:31:23,037 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-24 12:31:23,037 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 180 transitions. [2018-01-24 12:31:23,038 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2018-01-24 12:31:23,038 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:31:23,038 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:31:23,038 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:31:23,038 INFO L82 PathProgramCache]: Analyzing trace with hash -637126284, now seen corresponding path program 2 times [2018-01-24 12:31:23,038 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:31:23,038 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:31:23,039 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:23,039 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:31:23,039 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:23,058 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:31:23,059 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:31:23,432 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:31:23,434 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:31:23,435 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:31:23,441 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 12:31:23,491 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:31:23,497 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:31:23,504 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:31:23,508 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 12:31:23,509 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:31:23,524 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 12:31:23,525 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:31:23,536 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 12:31:23,537 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 12:31:24,689 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2018-01-24 12:31:24,709 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-24 12:31:24,710 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [26] imperfect sequences [14] total 39 [2018-01-24 12:31:24,710 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-01-24 12:31:24,710 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-01-24 12:31:24,711 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=1309, Unknown=0, NotChecked=0, Total=1482 [2018-01-24 12:31:24,711 INFO L87 Difference]: Start difference. First operand 170 states and 180 transitions. Second operand 39 states. [2018-01-24 12:31:26,828 WARN L143 SmtUtils]: Spent 2055ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-24 12:31:29,119 WARN L143 SmtUtils]: Spent 2023ms on a formula simplification that was a NOOP. DAG size: 35 [2018-01-24 12:31:31,531 WARN L143 SmtUtils]: Spent 2030ms on a formula simplification that was a NOOP. DAG size: 36 [2018-01-24 12:31:33,024 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:31:33,024 INFO L93 Difference]: Finished difference Result 307 states and 329 transitions. [2018-01-24 12:31:33,024 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-01-24 12:31:33,024 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 110 [2018-01-24 12:31:33,024 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:31:33,025 INFO L225 Difference]: With dead ends: 307 [2018-01-24 12:31:33,025 INFO L226 Difference]: Without dead ends: 169 [2018-01-24 12:31:33,026 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 81 SyntacticMatches, 5 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 843 ImplicationChecksByTransitivity, 8.2s TimeCoverageRelationStatistics Valid=399, Invalid=3141, Unknown=0, NotChecked=0, Total=3540 [2018-01-24 12:31:33,026 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-01-24 12:31:33,046 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 169. [2018-01-24 12:31:33,047 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-01-24 12:31:33,047 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 178 transitions. [2018-01-24 12:31:33,047 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 178 transitions. Word has length 110 [2018-01-24 12:31:33,047 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:31:33,047 INFO L432 AbstractCegarLoop]: Abstraction has 169 states and 178 transitions. [2018-01-24 12:31:33,048 INFO L433 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-01-24 12:31:33,048 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 178 transitions. [2018-01-24 12:31:33,048 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-01-24 12:31:33,048 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:31:33,048 INFO L322 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:31:33,048 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:31:33,048 INFO L82 PathProgramCache]: Analyzing trace with hash 1817608758, now seen corresponding path program 1 times [2018-01-24 12:31:33,049 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:31:33,049 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:31:33,049 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:33,049 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:31:33,049 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:33,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:31:33,067 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:31:33,238 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:31:33,238 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:31:33,238 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:31:33,243 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:31:33,288 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:31:33,291 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:31:33,305 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:31:33,324 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:31:33,324 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16 [2018-01-24 12:31:33,324 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-24 12:31:33,324 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-24 12:31:33,324 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=133, Unknown=0, NotChecked=0, Total=240 [2018-01-24 12:31:33,324 INFO L87 Difference]: Start difference. First operand 169 states and 178 transitions. Second operand 16 states. [2018-01-24 12:31:33,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:31:33,367 INFO L93 Difference]: Finished difference Result 306 states and 324 transitions. [2018-01-24 12:31:33,367 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-24 12:31:33,367 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 115 [2018-01-24 12:31:33,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:31:33,368 INFO L225 Difference]: With dead ends: 306 [2018-01-24 12:31:33,368 INFO L226 Difference]: Without dead ends: 170 [2018-01-24 12:31:33,369 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 130 GetRequests, 115 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=111, Invalid=161, Unknown=0, NotChecked=0, Total=272 [2018-01-24 12:31:33,369 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states. [2018-01-24 12:31:33,399 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 170. [2018-01-24 12:31:33,399 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states. [2018-01-24 12:31:33,400 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 179 transitions. [2018-01-24 12:31:33,400 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 179 transitions. Word has length 115 [2018-01-24 12:31:33,400 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:31:33,400 INFO L432 AbstractCegarLoop]: Abstraction has 170 states and 179 transitions. [2018-01-24 12:31:33,400 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-24 12:31:33,400 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 179 transitions. [2018-01-24 12:31:33,401 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2018-01-24 12:31:33,401 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:31:33,401 INFO L322 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:31:33,401 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:31:33,401 INFO L82 PathProgramCache]: Analyzing trace with hash 70072341, now seen corresponding path program 2 times [2018-01-24 12:31:33,401 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:31:33,401 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:31:33,402 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:33,402 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:31:33,402 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:33,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:31:33,424 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:31:33,628 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:31:33,628 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:31:33,628 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:31:33,634 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 12:31:33,678 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:31:33,686 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:31:33,695 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:31:33,763 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-24 12:31:33,764 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 12:31:33,764 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:31:33,766 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:31:33,767 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:31:33,767 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-01-24 12:31:33,853 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 12:31:33,855 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 12:31:33,859 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 12:31:33,859 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:26 [2018-01-24 12:31:33,861 WARN L1029 $PredicateComparison]: unable to prove that (exists ((LDV_INIT_LIST_HEAD_~list.offset Int) (v_DerPreprocessor_2 Int)) (and (= |c_#memory_int| (store |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base| (let ((.cse0 (+ LDV_INIT_LIST_HEAD_~list.offset 4))) (store (store (select |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base|) LDV_INIT_LIST_HEAD_~list.offset v_DerPreprocessor_2) .cse0 (select (select |c_#memory_int| |c_LDV_INIT_LIST_HEAD_#in~list.base|) .cse0))))) (<= LDV_INIT_LIST_HEAD_~list.offset |c_LDV_INIT_LIST_HEAD_#in~list.offset|))) is different from true [2018-01-24 12:31:33,868 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2018-01-24 12:31:33,870 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:31:33,873 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 35 [2018-01-24 12:31:33,877 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:31:33,878 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:31:33,882 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 37 [2018-01-24 12:31:33,882 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 12:31:33,890 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:31:33,893 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:31:33,897 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:31:33,898 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9 [2018-01-24 12:31:34,310 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:31:34,310 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 38 [2018-01-24 12:31:34,330 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:31:34,331 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 9 [2018-01-24 12:31:34,331 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:31:34,332 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:31:34,335 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:31:34,335 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:34, output treesize:13 [2018-01-24 12:31:34,780 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-01-24 12:31:34,781 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-01-24 12:31:34,781 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:31:34,782 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:31:34,783 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:31:34,783 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-01-24 12:31:34,833 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-24 12:31:34,855 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-24 12:31:34,855 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [45] imperfect sequences [16] total 59 [2018-01-24 12:31:34,856 INFO L409 AbstractCegarLoop]: Interpolant automaton has 59 states [2018-01-24 12:31:34,856 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 59 interpolants. [2018-01-24 12:31:34,857 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=206, Invalid=3103, Unknown=1, NotChecked=112, Total=3422 [2018-01-24 12:31:34,857 INFO L87 Difference]: Start difference. First operand 170 states and 179 transitions. Second operand 59 states. [2018-01-24 12:31:37,303 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:31:37,303 INFO L93 Difference]: Finished difference Result 300 states and 317 transitions. [2018-01-24 12:31:37,303 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 61 states. [2018-01-24 12:31:37,303 INFO L78 Accepts]: Start accepts. Automaton has 59 states. Word has length 116 [2018-01-24 12:31:37,303 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:31:37,304 INFO L225 Difference]: With dead ends: 300 [2018-01-24 12:31:37,304 INFO L226 Difference]: Without dead ends: 164 [2018-01-24 12:31:37,306 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 74 SyntacticMatches, 0 SemanticMatches, 81 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1141 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=328, Invalid=6317, Unknown=1, NotChecked=160, Total=6806 [2018-01-24 12:31:37,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-01-24 12:31:37,330 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 164. [2018-01-24 12:31:37,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2018-01-24 12:31:37,331 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 167 transitions. [2018-01-24 12:31:37,331 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 167 transitions. Word has length 116 [2018-01-24 12:31:37,331 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:31:37,331 INFO L432 AbstractCegarLoop]: Abstraction has 164 states and 167 transitions. [2018-01-24 12:31:37,331 INFO L433 AbstractCegarLoop]: Interpolant automaton has 59 states. [2018-01-24 12:31:37,332 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 167 transitions. [2018-01-24 12:31:37,332 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-01-24 12:31:37,332 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:31:37,332 INFO L322 BasicCegarLoop]: trace histogram [13, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:31:37,332 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:31:37,333 INFO L82 PathProgramCache]: Analyzing trace with hash -2129620089, now seen corresponding path program 1 times [2018-01-24 12:31:37,333 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:31:37,333 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:31:37,333 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:37,334 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:31:37,334 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:37,351 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:31:37,352 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:31:37,930 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 2 proven. 7 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2018-01-24 12:31:37,930 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:31:37,930 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:31:37,935 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:31:38,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:31:38,035 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:31:38,305 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-01-24 12:31:38,325 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:31:38,325 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 17] total 36 [2018-01-24 12:31:38,326 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-24 12:31:38,326 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-24 12:31:38,326 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=162, Invalid=1098, Unknown=0, NotChecked=0, Total=1260 [2018-01-24 12:31:38,326 INFO L87 Difference]: Start difference. First operand 164 states and 167 transitions. Second operand 36 states. [2018-01-24 12:31:39,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:31:39,753 INFO L93 Difference]: Finished difference Result 306 states and 312 transitions. [2018-01-24 12:31:39,753 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-01-24 12:31:39,753 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 126 [2018-01-24 12:31:39,753 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:31:39,754 INFO L225 Difference]: With dead ends: 306 [2018-01-24 12:31:39,754 INFO L226 Difference]: Without dead ends: 177 [2018-01-24 12:31:39,756 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 184 GetRequests, 118 SyntacticMatches, 0 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 586 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=492, Invalid=4064, Unknown=0, NotChecked=0, Total=4556 [2018-01-24 12:31:39,756 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 177 states. [2018-01-24 12:31:39,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 177 to 167. [2018-01-24 12:31:39,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 167 states. [2018-01-24 12:31:39,785 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 167 states to 167 states and 169 transitions. [2018-01-24 12:31:39,785 INFO L78 Accepts]: Start accepts. Automaton has 167 states and 169 transitions. Word has length 126 [2018-01-24 12:31:39,786 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:31:39,786 INFO L432 AbstractCegarLoop]: Abstraction has 167 states and 169 transitions. [2018-01-24 12:31:39,786 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-24 12:31:39,786 INFO L276 IsEmpty]: Start isEmpty. Operand 167 states and 169 transitions. [2018-01-24 12:31:39,786 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 142 [2018-01-24 12:31:39,786 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:31:39,787 INFO L322 BasicCegarLoop]: trace histogram [14, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:31:39,787 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:31:39,787 INFO L82 PathProgramCache]: Analyzing trace with hash 1333200073, now seen corresponding path program 1 times [2018-01-24 12:31:39,787 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:31:39,787 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:31:39,788 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:39,788 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:31:39,788 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:31:39,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:31:39,826 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:31:40,344 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 112 trivial. 0 not checked. [2018-01-24 12:31:40,344 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:31:40,345 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:31:40,350 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:31:40,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:31:40,433 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:31:40,802 INFO L134 CoverageAnalysis]: Checked inductivity of 121 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 16 trivial. 0 not checked. [2018-01-24 12:31:40,823 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:31:40,823 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 18] total 40 [2018-01-24 12:31:40,823 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-24 12:31:40,823 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-24 12:31:40,824 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=182, Invalid=1378, Unknown=0, NotChecked=0, Total=1560 [2018-01-24 12:31:40,824 INFO L87 Difference]: Start difference. First operand 167 states and 169 transitions. Second operand 40 states. Received shutdown request... [2018-01-24 12:31:41,923 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-24 12:31:41,923 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-24 12:31:41,929 WARN L187 ceAbstractionStarter]: Timeout [2018-01-24 12:31:41,929 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.01 12:31:41 BoogieIcfgContainer [2018-01-24 12:31:41,929 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-24 12:31:41,930 INFO L168 Benchmark]: Toolchain (without parser) took 56198.52 ms. Allocated memory was 297.8 MB in the beginning and 791.7 MB in the end (delta: 493.9 MB). Free memory was 256.7 MB in the beginning and 541.8 MB in the end (delta: -285.0 MB). Peak memory consumption was 208.9 MB. Max. memory is 5.3 GB. [2018-01-24 12:31:41,932 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 297.8 MB. Free memory is still 262.7 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-24 12:31:41,932 INFO L168 Benchmark]: CACSL2BoogieTranslator took 236.92 ms. Allocated memory is still 297.8 MB. Free memory was 256.7 MB in the beginning and 242.7 MB in the end (delta: 14.1 MB). Peak memory consumption was 14.1 MB. Max. memory is 5.3 GB. [2018-01-24 12:31:41,932 INFO L168 Benchmark]: Boogie Preprocessor took 46.43 ms. Allocated memory is still 297.8 MB. Free memory was 242.7 MB in the beginning and 240.7 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-24 12:31:41,933 INFO L168 Benchmark]: RCFGBuilder took 512.89 ms. Allocated memory is still 297.8 MB. Free memory was 240.7 MB in the beginning and 203.8 MB in the end (delta: 36.9 MB). Peak memory consumption was 36.9 MB. Max. memory is 5.3 GB. [2018-01-24 12:31:41,933 INFO L168 Benchmark]: TraceAbstraction took 55394.70 ms. Allocated memory was 297.8 MB in the beginning and 791.7 MB in the end (delta: 493.9 MB). Free memory was 203.8 MB in the beginning and 541.8 MB in the end (delta: -338.0 MB). Peak memory consumption was 155.9 MB. Max. memory is 5.3 GB. [2018-01-24 12:31:41,935 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 297.8 MB. Free memory is still 262.7 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 236.92 ms. Allocated memory is still 297.8 MB. Free memory was 256.7 MB in the beginning and 242.7 MB in the end (delta: 14.1 MB). Peak memory consumption was 14.1 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 46.43 ms. Allocated memory is still 297.8 MB. Free memory was 242.7 MB in the beginning and 240.7 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 512.89 ms. Allocated memory is still 297.8 MB. Free memory was 240.7 MB in the beginning and 203.8 MB in the end (delta: 36.9 MB). Peak memory consumption was 36.9 MB. Max. memory is 5.3 GB. * TraceAbstraction took 55394.70 ms. Allocated memory was 297.8 MB in the beginning and 791.7 MB in the end (delta: 493.9 MB). Free memory was 203.8 MB in the beginning and 541.8 MB in the end (delta: -338.0 MB). Peak memory consumption was 155.9 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was constructing difference of abstraction (167states) and interpolant automaton (currently 28 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (200 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was constructing difference of abstraction (167states) and interpolant automaton (currently 28 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (200 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was constructing difference of abstraction (167states) and interpolant automaton (currently 28 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (200 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was constructing difference of abstraction (167states) and interpolant automaton (currently 28 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (200 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was constructing difference of abstraction (167states) and interpolant automaton (currently 28 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (200 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was constructing difference of abstraction (167states) and interpolant automaton (currently 28 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (200 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was constructing difference of abstraction (167states) and interpolant automaton (currently 28 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (200 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was constructing difference of abstraction (167states) and interpolant automaton (currently 28 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (200 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1256). Cancelled while BasicCegarLoop was constructing difference of abstraction (167states) and interpolant automaton (currently 28 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (200 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1256). Cancelled while BasicCegarLoop was constructing difference of abstraction (167states) and interpolant automaton (currently 28 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (200 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1258). Cancelled while BasicCegarLoop was constructing difference of abstraction (167states) and interpolant automaton (currently 28 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (200 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1258). Cancelled while BasicCegarLoop was constructing difference of abstraction (167states) and interpolant automaton (currently 28 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (200 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was constructing difference of abstraction (167states) and interpolant automaton (currently 28 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (200 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was constructing difference of abstraction (167states) and interpolant automaton (currently 28 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (200 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was constructing difference of abstraction (167states) and interpolant automaton (currently 28 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (200 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was constructing difference of abstraction (167states) and interpolant automaton (currently 28 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (200 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was constructing difference of abstraction (167states) and interpolant automaton (currently 28 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (200 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was constructing difference of abstraction (167states) and interpolant automaton (currently 28 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (200 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1452]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1452). Cancelled while BasicCegarLoop was constructing difference of abstraction (167states) and interpolant automaton (currently 28 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (200 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was constructing difference of abstraction (167states) and interpolant automaton (currently 28 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (200 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was constructing difference of abstraction (167states) and interpolant automaton (currently 28 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (200 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was constructing difference of abstraction (167states) and interpolant automaton (currently 28 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (200 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was constructing difference of abstraction (167states) and interpolant automaton (currently 28 states, 40 states before enhancement), while ReachableStatesComputation was computing reachable states (200 states constructedinput type IntersectNwa). - StatisticsResult: Ultimate Automizer benchmark data CFG has 23 procedures, 151 locations, 23 error locations. TIMEOUT Result, 55.3s OverallTime, 30 OverallIterations, 14 TraceHistogramMax, 40.9s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 4023 SDtfs, 1283 SDslu, 37994 SDs, 0 SdLazy, 18706 SolverSat, 409 SolverUnsat, 1 SolverUnknown, 0 SolverNotchecked, 11.4s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 1741 GetRequests, 1071 SyntacticMatches, 11 SemanticMatches, 659 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 4261 ImplicationChecksByTransitivity, 36.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=175occurred in iteration=9, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.5s AutomataMinimizationTime, 29 MinimizatonAttempts, 154 StatesRemovedByMinimization, 11 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 0.9s SatisfiabilityAnalysisTime, 11.7s InterpolantComputationTime, 3217 NumberOfCodeBlocks, 3175 NumberOfCodeBlocksAsserted, 44 NumberOfCheckSat, 3173 ConstructedInterpolants, 286 QuantifiedInterpolants, 1130438 SizeOfPredicates, 122 NumberOfNonLiveVariables, 5596 ConjunctsInSsa, 588 ConjunctsInUnsatCore, 44 InterpolantComputations, 22 PerfectInterpolantSequences, 636/1373 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_3_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-24_12-31-41-945.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_3_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-24_12-31-41-945.csv Completed graceful shutdown