java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-24 12:25:00,073 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-24 12:25:00,075 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-24 12:25:00,089 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-24 12:25:00,089 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-24 12:25:00,090 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-24 12:25:00,091 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-24 12:25:00,093 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-24 12:25:00,094 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-24 12:25:00,095 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-24 12:25:00,096 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-24 12:25:00,096 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-24 12:25:00,096 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-24 12:25:00,097 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-24 12:25:00,098 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-24 12:25:00,100 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-24 12:25:00,103 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-24 12:25:00,105 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-24 12:25:00,106 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-24 12:25:00,107 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-24 12:25:00,110 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-24 12:25:00,110 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-24 12:25:00,110 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-24 12:25:00,111 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-24 12:25:00,112 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-24 12:25:00,113 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-24 12:25:00,114 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-24 12:25:00,114 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-24 12:25:00,115 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-24 12:25:00,115 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-24 12:25:00,115 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-24 12:25:00,116 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ.epf [2018-01-24 12:25:00,126 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-24 12:25:00,126 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-24 12:25:00,127 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-24 12:25:00,127 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-24 12:25:00,127 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-24 12:25:00,127 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-24 12:25:00,128 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-24 12:25:00,128 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-24 12:25:00,128 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-24 12:25:00,129 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-24 12:25:00,129 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-24 12:25:00,129 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-24 12:25:00,129 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-24 12:25:00,130 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-24 12:25:00,130 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-24 12:25:00,130 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-24 12:25:00,130 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-24 12:25:00,130 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-24 12:25:00,131 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-24 12:25:00,131 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-24 12:25:00,131 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-24 12:25:00,131 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-24 12:25:00,131 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-24 12:25:00,131 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 12:25:00,132 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-24 12:25:00,132 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-24 12:25:00,132 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-24 12:25:00,132 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-24 12:25:00,132 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-01-24 12:25:00,133 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-24 12:25:00,133 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-24 12:25:00,133 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-24 12:25:00,134 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-24 12:25:00,134 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-24 12:25:00,170 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-24 12:25:00,183 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-24 12:25:00,187 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-24 12:25:00,189 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-24 12:25:00,189 INFO L276 PluginConnector]: CDTParser initialized [2018-01-24 12:25:00,190 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-01-24 12:25:00,415 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-24 12:25:00,422 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-24 12:25:00,423 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-24 12:25:00,423 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-24 12:25:00,430 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-24 12:25:00,431 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 12:25:00" (1/1) ... [2018-01-24 12:25:00,433 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@105626bc and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:25:00, skipping insertion in model container [2018-01-24 12:25:00,434 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 12:25:00" (1/1) ... [2018-01-24 12:25:00,447 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 12:25:00,497 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 12:25:00,620 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 12:25:00,644 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 12:25:00,657 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:25:00 WrapperNode [2018-01-24 12:25:00,657 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-24 12:25:00,657 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-24 12:25:00,657 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-24 12:25:00,658 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-24 12:25:00,670 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:25:00" (1/1) ... [2018-01-24 12:25:00,671 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:25:00" (1/1) ... [2018-01-24 12:25:00,682 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:25:00" (1/1) ... [2018-01-24 12:25:00,682 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:25:00" (1/1) ... [2018-01-24 12:25:00,689 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:25:00" (1/1) ... [2018-01-24 12:25:00,692 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:25:00" (1/1) ... [2018-01-24 12:25:00,694 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:25:00" (1/1) ... [2018-01-24 12:25:00,697 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-24 12:25:00,697 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-24 12:25:00,698 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-24 12:25:00,698 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-24 12:25:00,698 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:25:00" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 12:25:00,744 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-24 12:25:00,744 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-24 12:25:00,744 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-01-24 12:25:00,744 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-01-24 12:25:00,745 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-01-24 12:25:00,745 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-01-24 12:25:00,745 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-01-24 12:25:00,745 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-01-24 12:25:00,745 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-01-24 12:25:00,745 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-01-24 12:25:00,745 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-01-24 12:25:00,745 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-01-24 12:25:00,745 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-01-24 12:25:00,745 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-01-24 12:25:00,746 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-01-24 12:25:00,746 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-01-24 12:25:00,746 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-01-24 12:25:00,746 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-01-24 12:25:00,746 INFO L136 BoogieDeclarations]: Found implementation of procedure f_22_get [2018-01-24 12:25:00,746 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-01-24 12:25:00,746 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-24 12:25:00,746 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-24 12:25:00,746 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-24 12:25:00,747 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-24 12:25:00,747 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-24 12:25:00,747 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-24 12:25:00,747 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-24 12:25:00,747 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-24 12:25:00,747 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-24 12:25:00,747 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-24 12:25:00,747 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-24 12:25:00,747 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-24 12:25:00,747 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-24 12:25:00,748 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-24 12:25:00,748 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-01-24 12:25:00,748 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-01-24 12:25:00,748 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-01-24 12:25:00,748 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-01-24 12:25:00,748 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-01-24 12:25:00,748 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-01-24 12:25:00,748 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-01-24 12:25:00,748 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-01-24 12:25:00,748 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-01-24 12:25:00,748 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-01-24 12:25:00,749 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-01-24 12:25:00,749 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-01-24 12:25:00,749 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-01-24 12:25:00,749 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-01-24 12:25:00,749 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-01-24 12:25:00,749 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-01-24 12:25:00,749 INFO L128 BoogieDeclarations]: Found specification of procedure f_22_get [2018-01-24 12:25:00,749 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-01-24 12:25:00,749 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-24 12:25:00,750 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-24 12:25:00,750 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-24 12:25:01,010 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-01-24 12:25:01,191 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-24 12:25:01,192 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 12:25:01 BoogieIcfgContainer [2018-01-24 12:25:01,192 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-24 12:25:01,193 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-24 12:25:01,193 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-24 12:25:01,196 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-24 12:25:01,196 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.01 12:25:00" (1/3) ... [2018-01-24 12:25:01,197 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@59044a5b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 12:25:01, skipping insertion in model container [2018-01-24 12:25:01,197 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:25:00" (2/3) ... [2018-01-24 12:25:01,198 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@59044a5b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 12:25:01, skipping insertion in model container [2018-01-24 12:25:01,198 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 12:25:01" (3/3) ... [2018-01-24 12:25:01,199 INFO L105 eAbstractionObserver]: Analyzing ICFG memleaks_test22_4_false-valid-memtrack_true-termination.i [2018-01-24 12:25:01,207 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-24 12:25:01,216 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2018-01-24 12:25:01,260 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-24 12:25:01,260 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-24 12:25:01,260 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-24 12:25:01,261 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-24 12:25:01,261 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-24 12:25:01,261 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-24 12:25:01,261 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-24 12:25:01,261 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-24 12:25:01,262 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-24 12:25:01,280 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states. [2018-01-24 12:25:01,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-24 12:25:01,287 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:01,288 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:01,288 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:01,292 INFO L82 PathProgramCache]: Analyzing trace with hash -367619766, now seen corresponding path program 1 times [2018-01-24 12:25:01,294 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:01,295 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:01,344 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:01,344 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:01,345 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:01,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:01,403 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:01,571 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:01,652 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:25:01,653 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 12:25:01,655 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 12:25:01,670 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 12:25:01,671 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:25:01,674 INFO L87 Difference]: Start difference. First operand 146 states. Second operand 5 states. [2018-01-24 12:25:01,768 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:01,768 INFO L93 Difference]: Finished difference Result 280 states and 295 transitions. [2018-01-24 12:25:01,768 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 12:25:01,769 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-01-24 12:25:01,770 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:01,782 INFO L225 Difference]: With dead ends: 280 [2018-01-24 12:25:01,782 INFO L226 Difference]: Without dead ends: 149 [2018-01-24 12:25:01,786 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:25:01,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-01-24 12:25:01,822 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 147. [2018-01-24 12:25:01,824 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-01-24 12:25:01,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 155 transitions. [2018-01-24 12:25:01,827 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 155 transitions. Word has length 17 [2018-01-24 12:25:01,828 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:01,828 INFO L432 AbstractCegarLoop]: Abstraction has 147 states and 155 transitions. [2018-01-24 12:25:01,828 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 12:25:01,828 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 155 transitions. [2018-01-24 12:25:01,829 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 12:25:01,829 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:01,829 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:01,829 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:01,829 INFO L82 PathProgramCache]: Analyzing trace with hash -1040907540, now seen corresponding path program 1 times [2018-01-24 12:25:01,829 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:01,829 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:01,831 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:01,831 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:01,831 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:01,862 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:01,863 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:01,933 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:01,933 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:25:01,934 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 12:25:01,935 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 12:25:01,936 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 12:25:01,936 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:25:01,936 INFO L87 Difference]: Start difference. First operand 147 states and 155 transitions. Second operand 6 states. [2018-01-24 12:25:02,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:02,169 INFO L93 Difference]: Finished difference Result 149 states and 157 transitions. [2018-01-24 12:25:02,169 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 12:25:02,170 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-01-24 12:25:02,170 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:02,172 INFO L225 Difference]: With dead ends: 149 [2018-01-24 12:25:02,172 INFO L226 Difference]: Without dead ends: 148 [2018-01-24 12:25:02,173 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:25:02,174 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-01-24 12:25:02,188 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 146. [2018-01-24 12:25:02,188 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-01-24 12:25:02,191 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 154 transitions. [2018-01-24 12:25:02,191 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 154 transitions. Word has length 19 [2018-01-24 12:25:02,191 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:02,192 INFO L432 AbstractCegarLoop]: Abstraction has 146 states and 154 transitions. [2018-01-24 12:25:02,192 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 12:25:02,192 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 154 transitions. [2018-01-24 12:25:02,193 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 12:25:02,193 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:02,193 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:02,193 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:02,193 INFO L82 PathProgramCache]: Analyzing trace with hash -1040907539, now seen corresponding path program 1 times [2018-01-24 12:25:02,193 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:02,194 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:02,195 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:02,195 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:02,195 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:02,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:02,219 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:02,494 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:02,494 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:25:02,494 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 12:25:02,494 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 12:25:02,495 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 12:25:02,495 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:25:02,495 INFO L87 Difference]: Start difference. First operand 146 states and 154 transitions. Second operand 7 states. [2018-01-24 12:25:02,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:02,813 INFO L93 Difference]: Finished difference Result 148 states and 156 transitions. [2018-01-24 12:25:02,813 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 12:25:02,813 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-01-24 12:25:02,814 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:02,815 INFO L225 Difference]: With dead ends: 148 [2018-01-24 12:25:02,816 INFO L226 Difference]: Without dead ends: 147 [2018-01-24 12:25:02,816 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-01-24 12:25:02,817 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-01-24 12:25:02,829 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 145. [2018-01-24 12:25:02,830 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-01-24 12:25:02,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 153 transitions. [2018-01-24 12:25:02,832 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 153 transitions. Word has length 19 [2018-01-24 12:25:02,833 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:02,833 INFO L432 AbstractCegarLoop]: Abstraction has 145 states and 153 transitions. [2018-01-24 12:25:02,833 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 12:25:02,833 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 153 transitions. [2018-01-24 12:25:02,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-24 12:25:02,834 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:02,835 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:02,835 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:02,835 INFO L82 PathProgramCache]: Analyzing trace with hash -1287954832, now seen corresponding path program 1 times [2018-01-24 12:25:02,835 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:02,836 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:02,837 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:02,837 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:02,837 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:02,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:02,858 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:02,975 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:02,976 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:25:02,976 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 12:25:02,976 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 12:25:02,977 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 12:25:02,977 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-01-24 12:25:02,977 INFO L87 Difference]: Start difference. First operand 145 states and 153 transitions. Second operand 9 states. [2018-01-24 12:25:03,087 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:03,088 INFO L93 Difference]: Finished difference Result 245 states and 257 transitions. [2018-01-24 12:25:03,088 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 12:25:03,088 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-01-24 12:25:03,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:03,092 INFO L225 Difference]: With dead ends: 245 [2018-01-24 12:25:03,092 INFO L226 Difference]: Without dead ends: 165 [2018-01-24 12:25:03,093 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-01-24 12:25:03,093 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-01-24 12:25:03,110 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 159. [2018-01-24 12:25:03,110 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-01-24 12:25:03,112 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 167 transitions. [2018-01-24 12:25:03,112 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 167 transitions. Word has length 29 [2018-01-24 12:25:03,112 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:03,112 INFO L432 AbstractCegarLoop]: Abstraction has 159 states and 167 transitions. [2018-01-24 12:25:03,113 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 12:25:03,113 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 167 transitions. [2018-01-24 12:25:03,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 12:25:03,114 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:03,114 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:03,114 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:03,114 INFO L82 PathProgramCache]: Analyzing trace with hash 1025625474, now seen corresponding path program 1 times [2018-01-24 12:25:03,114 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:03,114 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:03,115 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:03,115 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:03,116 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:03,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:03,135 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:03,233 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:03,234 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:25:03,234 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 12:25:03,234 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 12:25:03,234 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 12:25:03,234 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 12:25:03,235 INFO L87 Difference]: Start difference. First operand 159 states and 167 transitions. Second operand 10 states. [2018-01-24 12:25:03,456 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:03,457 INFO L93 Difference]: Finished difference Result 159 states and 167 transitions. [2018-01-24 12:25:03,457 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 12:25:03,457 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 34 [2018-01-24 12:25:03,457 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:03,459 INFO L225 Difference]: With dead ends: 159 [2018-01-24 12:25:03,459 INFO L226 Difference]: Without dead ends: 158 [2018-01-24 12:25:03,459 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 12:25:03,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2018-01-24 12:25:03,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 158. [2018-01-24 12:25:03,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-01-24 12:25:03,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 166 transitions. [2018-01-24 12:25:03,472 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 166 transitions. Word has length 34 [2018-01-24 12:25:03,472 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:03,472 INFO L432 AbstractCegarLoop]: Abstraction has 158 states and 166 transitions. [2018-01-24 12:25:03,472 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 12:25:03,472 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 166 transitions. [2018-01-24 12:25:03,473 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 12:25:03,474 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:03,474 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:03,474 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:03,474 INFO L82 PathProgramCache]: Analyzing trace with hash 1025625475, now seen corresponding path program 1 times [2018-01-24 12:25:03,474 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:03,474 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:03,476 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:03,476 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:03,476 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:03,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:03,493 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:03,531 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:03,531 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:25:03,532 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 12:25:03,532 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 12:25:03,532 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 12:25:03,532 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 12:25:03,533 INFO L87 Difference]: Start difference. First operand 158 states and 166 transitions. Second operand 4 states. [2018-01-24 12:25:03,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:03,554 INFO L93 Difference]: Finished difference Result 277 states and 291 transitions. [2018-01-24 12:25:03,555 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 12:25:03,555 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2018-01-24 12:25:03,555 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:03,557 INFO L225 Difference]: With dead ends: 277 [2018-01-24 12:25:03,557 INFO L226 Difference]: Without dead ends: 159 [2018-01-24 12:25:03,558 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:25:03,559 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-01-24 12:25:03,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 159. [2018-01-24 12:25:03,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-01-24 12:25:03,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 167 transitions. [2018-01-24 12:25:03,570 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 167 transitions. Word has length 34 [2018-01-24 12:25:03,571 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:03,571 INFO L432 AbstractCegarLoop]: Abstraction has 159 states and 167 transitions. [2018-01-24 12:25:03,571 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 12:25:03,571 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 167 transitions. [2018-01-24 12:25:03,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-24 12:25:03,573 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:03,573 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:03,573 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:03,573 INFO L82 PathProgramCache]: Analyzing trace with hash -553427227, now seen corresponding path program 1 times [2018-01-24 12:25:03,573 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:03,574 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:03,575 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:03,575 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:03,575 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:03,592 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:03,593 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:03,646 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:03,646 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:25:03,646 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:25:03,660 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:03,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:03,708 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:25:03,754 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:03,781 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:25:03,781 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-01-24 12:25:03,782 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 12:25:03,782 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 12:25:03,782 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:25:03,782 INFO L87 Difference]: Start difference. First operand 159 states and 167 transitions. Second operand 6 states. [2018-01-24 12:25:03,817 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:03,818 INFO L93 Difference]: Finished difference Result 278 states and 292 transitions. [2018-01-24 12:25:03,818 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 12:25:03,818 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-01-24 12:25:03,818 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:03,820 INFO L225 Difference]: With dead ends: 278 [2018-01-24 12:25:03,820 INFO L226 Difference]: Without dead ends: 160 [2018-01-24 12:25:03,821 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 40 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:25:03,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-01-24 12:25:03,831 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 160. [2018-01-24 12:25:03,831 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-01-24 12:25:03,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 168 transitions. [2018-01-24 12:25:03,833 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 168 transitions. Word has length 35 [2018-01-24 12:25:03,833 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:03,833 INFO L432 AbstractCegarLoop]: Abstraction has 160 states and 168 transitions. [2018-01-24 12:25:03,833 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 12:25:03,833 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 168 transitions. [2018-01-24 12:25:03,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 12:25:03,835 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:03,835 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:03,835 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:03,835 INFO L82 PathProgramCache]: Analyzing trace with hash 2035546563, now seen corresponding path program 2 times [2018-01-24 12:25:03,835 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:03,835 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:03,837 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:03,837 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:03,837 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:03,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:03,856 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:03,921 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:03,921 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:25:03,921 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:25:03,932 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 12:25:03,959 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:25:03,964 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:25:03,969 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:25:04,004 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 12:25:04,007 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:25:04,090 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 12:25:04,090 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:25:04,108 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 12:25:04,109 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 12:25:06,488 WARN L143 SmtUtils]: Spent 2054ms on a formula simplification that was a NOOP. DAG size: 27 [2018-01-24 12:25:06,884 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 12:25:06,905 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-24 12:25:06,905 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [6] total 19 [2018-01-24 12:25:06,906 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-24 12:25:06,906 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-24 12:25:06,906 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=291, Unknown=0, NotChecked=0, Total=342 [2018-01-24 12:25:06,906 INFO L87 Difference]: Start difference. First operand 160 states and 168 transitions. Second operand 19 states. [2018-01-24 12:25:07,258 WARN L143 SmtUtils]: Spent 296ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-24 12:25:09,528 WARN L143 SmtUtils]: Spent 2026ms on a formula simplification that was a NOOP. DAG size: 31 [2018-01-24 12:25:12,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:12,546 INFO L93 Difference]: Finished difference Result 349 states and 366 transitions. [2018-01-24 12:25:12,547 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-24 12:25:12,547 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 36 [2018-01-24 12:25:12,547 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:12,549 INFO L225 Difference]: With dead ends: 349 [2018-01-24 12:25:12,549 INFO L226 Difference]: Without dead ends: 231 [2018-01-24 12:25:12,550 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 24 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 5.2s TimeCoverageRelationStatistics Valid=99, Invalid=603, Unknown=0, NotChecked=0, Total=702 [2018-01-24 12:25:12,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 231 states. [2018-01-24 12:25:12,562 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 231 to 160. [2018-01-24 12:25:12,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-01-24 12:25:12,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 168 transitions. [2018-01-24 12:25:12,563 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 168 transitions. Word has length 36 [2018-01-24 12:25:12,563 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:12,563 INFO L432 AbstractCegarLoop]: Abstraction has 160 states and 168 transitions. [2018-01-24 12:25:12,563 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-24 12:25:12,564 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 168 transitions. [2018-01-24 12:25:12,565 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-24 12:25:12,565 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:12,565 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:12,565 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:12,565 INFO L82 PathProgramCache]: Analyzing trace with hash -2073429328, now seen corresponding path program 1 times [2018-01-24 12:25:12,566 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:12,566 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:12,567 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:12,567 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:25:12,567 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:12,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:12,581 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:12,671 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:12,671 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:25:12,671 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-24 12:25:12,672 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 12:25:12,672 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 12:25:12,672 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:25:12,672 INFO L87 Difference]: Start difference. First operand 160 states and 168 transitions. Second operand 7 states. [2018-01-24 12:25:12,786 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:12,786 INFO L93 Difference]: Finished difference Result 223 states and 233 transitions. [2018-01-24 12:25:12,786 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 12:25:12,787 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 40 [2018-01-24 12:25:12,787 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:12,789 INFO L225 Difference]: With dead ends: 223 [2018-01-24 12:25:12,789 INFO L226 Difference]: Without dead ends: 169 [2018-01-24 12:25:12,789 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-01-24 12:25:12,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-01-24 12:25:12,801 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 165. [2018-01-24 12:25:12,802 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-01-24 12:25:12,803 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 173 transitions. [2018-01-24 12:25:12,804 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 173 transitions. Word has length 40 [2018-01-24 12:25:12,804 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:12,804 INFO L432 AbstractCegarLoop]: Abstraction has 165 states and 173 transitions. [2018-01-24 12:25:12,804 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 12:25:12,804 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 173 transitions. [2018-01-24 12:25:12,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-24 12:25:12,805 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:12,805 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:12,805 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:12,806 INFO L82 PathProgramCache]: Analyzing trace with hash 2040053740, now seen corresponding path program 1 times [2018-01-24 12:25:12,806 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:12,806 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:12,807 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:12,807 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:12,807 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:12,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:12,815 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:12,835 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:12,835 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:25:12,835 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 12:25:12,836 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 12:25:12,836 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 12:25:12,836 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 12:25:12,836 INFO L87 Difference]: Start difference. First operand 165 states and 173 transitions. Second operand 3 states. [2018-01-24 12:25:12,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:12,992 INFO L93 Difference]: Finished difference Result 182 states and 191 transitions. [2018-01-24 12:25:12,993 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 12:25:12,993 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 38 [2018-01-24 12:25:12,993 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:12,994 INFO L225 Difference]: With dead ends: 182 [2018-01-24 12:25:12,994 INFO L226 Difference]: Without dead ends: 169 [2018-01-24 12:25:12,995 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 12:25:12,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-01-24 12:25:13,008 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 161. [2018-01-24 12:25:13,008 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-01-24 12:25:13,009 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 168 transitions. [2018-01-24 12:25:13,009 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 168 transitions. Word has length 38 [2018-01-24 12:25:13,010 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:13,010 INFO L432 AbstractCegarLoop]: Abstraction has 161 states and 168 transitions. [2018-01-24 12:25:13,010 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 12:25:13,010 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 168 transitions. [2018-01-24 12:25:13,010 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-24 12:25:13,010 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:13,011 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:13,011 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:13,011 INFO L82 PathProgramCache]: Analyzing trace with hash 8062858, now seen corresponding path program 1 times [2018-01-24 12:25:13,011 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:13,011 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:13,012 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:13,012 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:13,012 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:13,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:13,019 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:13,069 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:13,070 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:25:13,070 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 12:25:13,070 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 12:25:13,070 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 12:25:13,070 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:25:13,071 INFO L87 Difference]: Start difference. First operand 161 states and 168 transitions. Second operand 6 states. [2018-01-24 12:25:13,094 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:13,094 INFO L93 Difference]: Finished difference Result 165 states and 171 transitions. [2018-01-24 12:25:13,094 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 12:25:13,094 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 40 [2018-01-24 12:25:13,095 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:13,095 INFO L225 Difference]: With dead ends: 165 [2018-01-24 12:25:13,095 INFO L226 Difference]: Without dead ends: 142 [2018-01-24 12:25:13,096 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:25:13,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-01-24 12:25:13,107 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-01-24 12:25:13,107 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-01-24 12:25:13,108 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 148 transitions. [2018-01-24 12:25:13,108 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 148 transitions. Word has length 40 [2018-01-24 12:25:13,108 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:13,108 INFO L432 AbstractCegarLoop]: Abstraction has 142 states and 148 transitions. [2018-01-24 12:25:13,108 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 12:25:13,108 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 148 transitions. [2018-01-24 12:25:13,109 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-24 12:25:13,109 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:13,109 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:13,109 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:13,109 INFO L82 PathProgramCache]: Analyzing trace with hash -1805397434, now seen corresponding path program 1 times [2018-01-24 12:25:13,109 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:13,109 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:13,111 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:13,111 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:13,111 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:13,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:13,124 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:13,398 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 12:25:13,399 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:25:13,399 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 12:25:13,399 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 12:25:13,399 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 12:25:13,399 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 12:25:13,399 INFO L87 Difference]: Start difference. First operand 142 states and 148 transitions. Second operand 10 states. [2018-01-24 12:25:13,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:13,711 INFO L93 Difference]: Finished difference Result 142 states and 148 transitions. [2018-01-24 12:25:13,711 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 12:25:13,711 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 42 [2018-01-24 12:25:13,712 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:13,712 INFO L225 Difference]: With dead ends: 142 [2018-01-24 12:25:13,712 INFO L226 Difference]: Without dead ends: 140 [2018-01-24 12:25:13,713 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 12:25:13,713 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-01-24 12:25:13,721 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-01-24 12:25:13,721 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-01-24 12:25:13,722 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 146 transitions. [2018-01-24 12:25:13,722 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 146 transitions. Word has length 42 [2018-01-24 12:25:13,722 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:13,722 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 146 transitions. [2018-01-24 12:25:13,722 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 12:25:13,722 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 146 transitions. [2018-01-24 12:25:13,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-24 12:25:13,723 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:13,723 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:13,723 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:13,723 INFO L82 PathProgramCache]: Analyzing trace with hash -1805397433, now seen corresponding path program 1 times [2018-01-24 12:25:13,723 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:13,724 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:13,725 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:13,725 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:13,725 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:13,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:13,740 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:13,776 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:13,776 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:25:13,776 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:25:13,782 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:13,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:13,812 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:25:13,839 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:13,860 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:25:13,860 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-01-24 12:25:13,861 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 12:25:13,861 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 12:25:13,861 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-01-24 12:25:13,861 INFO L87 Difference]: Start difference. First operand 140 states and 146 transitions. Second operand 8 states. [2018-01-24 12:25:13,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:13,893 INFO L93 Difference]: Finished difference Result 256 states and 268 transitions. [2018-01-24 12:25:13,894 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 12:25:13,894 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 42 [2018-01-24 12:25:13,894 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:13,895 INFO L225 Difference]: With dead ends: 256 [2018-01-24 12:25:13,895 INFO L226 Difference]: Without dead ends: 141 [2018-01-24 12:25:13,896 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 42 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-01-24 12:25:13,896 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-01-24 12:25:13,909 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 141. [2018-01-24 12:25:13,909 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-01-24 12:25:13,910 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 147 transitions. [2018-01-24 12:25:13,910 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 147 transitions. Word has length 42 [2018-01-24 12:25:13,910 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:13,911 INFO L432 AbstractCegarLoop]: Abstraction has 141 states and 147 transitions. [2018-01-24 12:25:13,911 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 12:25:13,911 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 147 transitions. [2018-01-24 12:25:13,911 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-24 12:25:13,912 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:13,912 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:13,912 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:13,912 INFO L82 PathProgramCache]: Analyzing trace with hash 1247207849, now seen corresponding path program 2 times [2018-01-24 12:25:13,912 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:13,912 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:13,913 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:13,913 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:13,914 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:13,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:13,931 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:14,014 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:14,014 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:25:14,014 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:25:14,023 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 12:25:14,044 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:25:14,047 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:25:14,051 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:25:14,064 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 12:25:14,065 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:25:14,098 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 12:25:14,099 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:25:14,124 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 12:25:14,125 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 12:25:14,660 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 12:25:14,679 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-24 12:25:14,680 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [8] total 22 [2018-01-24 12:25:14,680 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-24 12:25:14,680 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-24 12:25:14,680 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=390, Unknown=0, NotChecked=0, Total=462 [2018-01-24 12:25:14,680 INFO L87 Difference]: Start difference. First operand 141 states and 147 transitions. Second operand 22 states. [2018-01-24 12:25:16,892 WARN L143 SmtUtils]: Spent 2019ms on a formula simplification that was a NOOP. DAG size: 31 [2018-01-24 12:25:17,889 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:17,889 INFO L93 Difference]: Finished difference Result 255 states and 269 transitions. [2018-01-24 12:25:17,889 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-24 12:25:17,890 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 43 [2018-01-24 12:25:17,890 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:17,890 INFO L225 Difference]: With dead ends: 255 [2018-01-24 12:25:17,891 INFO L226 Difference]: Without dead ends: 140 [2018-01-24 12:25:17,892 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 60 GetRequests, 29 SyntacticMatches, 1 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 155 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=147, Invalid=845, Unknown=0, NotChecked=0, Total=992 [2018-01-24 12:25:17,892 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-01-24 12:25:17,904 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-01-24 12:25:17,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-01-24 12:25:17,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 146 transitions. [2018-01-24 12:25:17,906 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 146 transitions. Word has length 43 [2018-01-24 12:25:17,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:17,906 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 146 transitions. [2018-01-24 12:25:17,906 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-24 12:25:17,906 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 146 transitions. [2018-01-24 12:25:17,906 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-01-24 12:25:17,906 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:17,906 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:17,907 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:17,907 INFO L82 PathProgramCache]: Analyzing trace with hash 414207770, now seen corresponding path program 1 times [2018-01-24 12:25:17,907 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:17,907 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:17,908 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:17,908 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:25:17,908 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:17,918 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:17,919 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:18,011 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 12:25:18,011 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:25:18,011 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-24 12:25:18,011 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 12:25:18,012 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 12:25:18,012 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-01-24 12:25:18,012 INFO L87 Difference]: Start difference. First operand 140 states and 146 transitions. Second operand 8 states. [2018-01-24 12:25:18,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:18,053 INFO L93 Difference]: Finished difference Result 231 states and 240 transitions. [2018-01-24 12:25:18,053 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 12:25:18,053 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 49 [2018-01-24 12:25:18,053 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:18,054 INFO L225 Difference]: With dead ends: 231 [2018-01-24 12:25:18,054 INFO L226 Difference]: Without dead ends: 140 [2018-01-24 12:25:18,055 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-01-24 12:25:18,055 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-01-24 12:25:18,072 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-01-24 12:25:18,072 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-01-24 12:25:18,073 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 145 transitions. [2018-01-24 12:25:18,074 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 145 transitions. Word has length 49 [2018-01-24 12:25:18,074 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:18,074 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 145 transitions. [2018-01-24 12:25:18,074 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 12:25:18,074 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 145 transitions. [2018-01-24 12:25:18,075 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-01-24 12:25:18,075 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:18,075 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:18,075 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:18,075 INFO L82 PathProgramCache]: Analyzing trace with hash -673829217, now seen corresponding path program 1 times [2018-01-24 12:25:18,076 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:18,076 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:18,077 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:18,077 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:18,077 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:18,089 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:18,090 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:18,164 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 12:25:18,164 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:25:18,164 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-01-24 12:25:18,164 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 12:25:18,165 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 12:25:18,165 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 12:25:18,165 INFO L87 Difference]: Start difference. First operand 140 states and 145 transitions. Second operand 10 states. [2018-01-24 12:25:18,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:18,275 INFO L93 Difference]: Finished difference Result 233 states and 241 transitions. [2018-01-24 12:25:18,276 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 12:25:18,276 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 54 [2018-01-24 12:25:18,276 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:18,277 INFO L225 Difference]: With dead ends: 233 [2018-01-24 12:25:18,277 INFO L226 Difference]: Without dead ends: 140 [2018-01-24 12:25:18,278 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 12:25:18,278 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-01-24 12:25:18,288 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-01-24 12:25:18,288 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-01-24 12:25:18,289 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 144 transitions. [2018-01-24 12:25:18,289 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 144 transitions. Word has length 54 [2018-01-24 12:25:18,290 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:18,290 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 144 transitions. [2018-01-24 12:25:18,290 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 12:25:18,290 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 144 transitions. [2018-01-24 12:25:18,291 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-01-24 12:25:18,291 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:18,291 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:18,291 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:18,291 INFO L82 PathProgramCache]: Analyzing trace with hash 367813469, now seen corresponding path program 1 times [2018-01-24 12:25:18,291 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:18,291 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:18,292 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:18,292 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:18,292 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:18,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:18,305 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:18,790 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 12:25:18,790 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:25:18,791 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2018-01-24 12:25:18,791 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 12:25:18,791 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 12:25:18,791 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=183, Unknown=0, NotChecked=0, Total=210 [2018-01-24 12:25:18,791 INFO L87 Difference]: Start difference. First operand 140 states and 144 transitions. Second operand 15 states. [2018-01-24 12:25:19,278 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:19,279 INFO L93 Difference]: Finished difference Result 140 states and 144 transitions. [2018-01-24 12:25:19,279 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-24 12:25:19,279 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 65 [2018-01-24 12:25:19,279 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:19,280 INFO L225 Difference]: With dead ends: 140 [2018-01-24 12:25:19,280 INFO L226 Difference]: Without dead ends: 138 [2018-01-24 12:25:19,280 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=47, Invalid=333, Unknown=0, NotChecked=0, Total=380 [2018-01-24 12:25:19,280 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-01-24 12:25:19,296 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-01-24 12:25:19,296 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-01-24 12:25:19,297 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 142 transitions. [2018-01-24 12:25:19,298 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 142 transitions. Word has length 65 [2018-01-24 12:25:19,298 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:19,298 INFO L432 AbstractCegarLoop]: Abstraction has 138 states and 142 transitions. [2018-01-24 12:25:19,298 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 12:25:19,298 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 142 transitions. [2018-01-24 12:25:19,299 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 66 [2018-01-24 12:25:19,299 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:19,299 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:19,299 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:19,299 INFO L82 PathProgramCache]: Analyzing trace with hash 367813470, now seen corresponding path program 1 times [2018-01-24 12:25:19,300 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:19,300 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:19,301 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:19,301 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:19,301 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:19,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:19,320 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:19,415 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:19,416 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:25:19,416 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:25:19,424 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:19,460 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:19,464 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:25:19,484 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:19,508 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:25:19,508 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-01-24 12:25:19,509 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 12:25:19,509 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 12:25:19,509 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-01-24 12:25:19,509 INFO L87 Difference]: Start difference. First operand 138 states and 142 transitions. Second operand 10 states. [2018-01-24 12:25:19,588 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:19,589 INFO L93 Difference]: Finished difference Result 250 states and 258 transitions. [2018-01-24 12:25:19,589 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-24 12:25:19,589 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 65 [2018-01-24 12:25:19,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:19,590 INFO L225 Difference]: With dead ends: 250 [2018-01-24 12:25:19,590 INFO L226 Difference]: Without dead ends: 139 [2018-01-24 12:25:19,590 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 65 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-01-24 12:25:19,591 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-01-24 12:25:19,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 139. [2018-01-24 12:25:19,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2018-01-24 12:25:19,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 143 transitions. [2018-01-24 12:25:19,603 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 143 transitions. Word has length 65 [2018-01-24 12:25:19,603 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:19,603 INFO L432 AbstractCegarLoop]: Abstraction has 139 states and 143 transitions. [2018-01-24 12:25:19,604 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 12:25:19,604 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 143 transitions. [2018-01-24 12:25:19,604 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-01-24 12:25:19,604 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:19,605 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:19,605 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:19,605 INFO L82 PathProgramCache]: Analyzing trace with hash -292477508, now seen corresponding path program 2 times [2018-01-24 12:25:19,605 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:19,605 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:19,606 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:19,606 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:19,606 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:19,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:19,619 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:19,847 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:19,847 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:25:19,848 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:25:19,866 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 12:25:19,915 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:25:19,921 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:25:19,927 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:25:19,933 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 12:25:19,934 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:25:19,952 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 12:25:19,952 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:25:19,966 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 12:25:19,966 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 12:25:22,171 WARN L143 SmtUtils]: Spent 2020ms on a formula simplification that was a NOOP. DAG size: 27 [2018-01-24 12:25:22,673 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-01-24 12:25:22,693 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-24 12:25:22,713 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [10] total 29 [2018-01-24 12:25:22,713 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-24 12:25:22,713 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-24 12:25:22,714 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=705, Unknown=0, NotChecked=0, Total=812 [2018-01-24 12:25:22,714 INFO L87 Difference]: Start difference. First operand 139 states and 143 transitions. Second operand 29 states. [2018-01-24 12:25:24,996 WARN L143 SmtUtils]: Spent 2224ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-24 12:25:26,328 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:26,328 INFO L93 Difference]: Finished difference Result 249 states and 259 transitions. [2018-01-24 12:25:26,329 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-24 12:25:26,329 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 66 [2018-01-24 12:25:26,329 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:26,329 INFO L225 Difference]: With dead ends: 249 [2018-01-24 12:25:26,330 INFO L226 Difference]: Without dead ends: 138 [2018-01-24 12:25:26,330 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 89 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 369 ImplicationChecksByTransitivity, 5.4s TimeCoverageRelationStatistics Valid=227, Invalid=1579, Unknown=0, NotChecked=0, Total=1806 [2018-01-24 12:25:26,330 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-01-24 12:25:26,350 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-01-24 12:25:26,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-01-24 12:25:26,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 142 transitions. [2018-01-24 12:25:26,352 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 142 transitions. Word has length 66 [2018-01-24 12:25:26,352 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:26,352 INFO L432 AbstractCegarLoop]: Abstraction has 138 states and 142 transitions. [2018-01-24 12:25:26,352 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-24 12:25:26,352 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 142 transitions. [2018-01-24 12:25:26,353 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-01-24 12:25:26,353 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:26,354 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:26,354 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:26,354 INFO L82 PathProgramCache]: Analyzing trace with hash -1942262813, now seen corresponding path program 1 times [2018-01-24 12:25:26,354 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:26,354 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:26,355 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:26,355 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:25:26,356 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:26,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:26,377 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:26,510 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-01-24 12:25:26,511 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:25:26,511 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-01-24 12:25:26,511 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-24 12:25:26,511 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-24 12:25:26,511 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156 [2018-01-24 12:25:26,511 INFO L87 Difference]: Start difference. First operand 138 states and 142 transitions. Second operand 13 states. [2018-01-24 12:25:26,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:26,590 INFO L93 Difference]: Finished difference Result 201 states and 207 transitions. [2018-01-24 12:25:26,590 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-24 12:25:26,590 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 78 [2018-01-24 12:25:26,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:26,591 INFO L225 Difference]: With dead ends: 201 [2018-01-24 12:25:26,591 INFO L226 Difference]: Without dead ends: 138 [2018-01-24 12:25:26,592 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2018-01-24 12:25:26,592 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-01-24 12:25:26,610 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-01-24 12:25:26,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-01-24 12:25:26,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 141 transitions. [2018-01-24 12:25:26,611 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 141 transitions. Word has length 78 [2018-01-24 12:25:26,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:26,611 INFO L432 AbstractCegarLoop]: Abstraction has 138 states and 141 transitions. [2018-01-24 12:25:26,612 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-24 12:25:26,612 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 141 transitions. [2018-01-24 12:25:26,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-01-24 12:25:26,613 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:26,613 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:26,613 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:26,613 INFO L82 PathProgramCache]: Analyzing trace with hash -240207015, now seen corresponding path program 1 times [2018-01-24 12:25:26,613 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:26,614 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:26,615 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:26,615 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:26,615 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:26,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:26,639 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:26,865 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-01-24 12:25:26,866 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:25:26,866 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-01-24 12:25:26,866 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-24 12:25:26,866 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-24 12:25:26,866 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=341, Unknown=0, NotChecked=0, Total=380 [2018-01-24 12:25:26,867 INFO L87 Difference]: Start difference. First operand 138 states and 141 transitions. Second operand 20 states. [2018-01-24 12:25:27,335 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:27,335 INFO L93 Difference]: Finished difference Result 147 states and 150 transitions. [2018-01-24 12:25:27,335 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-24 12:25:27,335 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 91 [2018-01-24 12:25:27,336 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:27,336 INFO L225 Difference]: With dead ends: 147 [2018-01-24 12:25:27,336 INFO L226 Difference]: Without dead ends: 145 [2018-01-24 12:25:27,337 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 53 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=67, Invalid=635, Unknown=0, NotChecked=0, Total=702 [2018-01-24 12:25:27,337 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-01-24 12:25:27,349 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 136. [2018-01-24 12:25:27,349 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-01-24 12:25:27,349 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 139 transitions. [2018-01-24 12:25:27,349 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 139 transitions. Word has length 91 [2018-01-24 12:25:27,350 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:27,350 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 139 transitions. [2018-01-24 12:25:27,350 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-24 12:25:27,350 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 139 transitions. [2018-01-24 12:25:27,350 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-01-24 12:25:27,350 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:27,350 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:27,351 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:27,351 INFO L82 PathProgramCache]: Analyzing trace with hash -240207014, now seen corresponding path program 1 times [2018-01-24 12:25:27,351 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:27,351 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:27,352 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:27,352 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:27,352 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:27,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:27,377 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:27,611 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:27,611 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:25:27,611 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:25:27,619 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:27,685 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:27,690 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:25:27,707 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:27,739 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:25:27,739 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2018-01-24 12:25:27,739 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-24 12:25:27,740 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-24 12:25:27,740 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132 [2018-01-24 12:25:27,740 INFO L87 Difference]: Start difference. First operand 136 states and 139 transitions. Second operand 12 states. [2018-01-24 12:25:27,776 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:27,777 INFO L93 Difference]: Finished difference Result 244 states and 250 transitions. [2018-01-24 12:25:27,777 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 12:25:27,777 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 91 [2018-01-24 12:25:27,777 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:27,778 INFO L225 Difference]: With dead ends: 244 [2018-01-24 12:25:27,778 INFO L226 Difference]: Without dead ends: 137 [2018-01-24 12:25:27,778 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 102 GetRequests, 91 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=61, Invalid=95, Unknown=0, NotChecked=0, Total=156 [2018-01-24 12:25:27,778 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-01-24 12:25:27,794 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-01-24 12:25:27,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-01-24 12:25:27,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 140 transitions. [2018-01-24 12:25:27,795 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 140 transitions. Word has length 91 [2018-01-24 12:25:27,795 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:27,795 INFO L432 AbstractCegarLoop]: Abstraction has 137 states and 140 transitions. [2018-01-24 12:25:27,795 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-24 12:25:27,795 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 140 transitions. [2018-01-24 12:25:27,796 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-01-24 12:25:27,796 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:27,796 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:27,796 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:27,797 INFO L82 PathProgramCache]: Analyzing trace with hash -3595208, now seen corresponding path program 2 times [2018-01-24 12:25:27,797 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:27,797 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:27,798 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:27,798 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:27,798 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:27,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:27,839 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:28,029 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:28,030 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:25:28,030 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:25:28,039 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 12:25:28,090 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:25:28,099 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:25:28,105 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:25:28,118 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 12:25:28,118 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:25:28,135 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 12:25:28,136 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:25:28,153 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 12:25:28,153 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 12:25:29,120 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 36 trivial. 0 not checked. [2018-01-24 12:25:29,140 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-24 12:25:29,141 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [12] total 31 [2018-01-24 12:25:29,141 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-01-24 12:25:29,142 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-01-24 12:25:29,142 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=126, Invalid=804, Unknown=0, NotChecked=0, Total=930 [2018-01-24 12:25:29,142 INFO L87 Difference]: Start difference. First operand 137 states and 140 transitions. Second operand 31 states. [2018-01-24 12:25:31,617 WARN L143 SmtUtils]: Spent 2023ms on a formula simplification that was a NOOP. DAG size: 35 [2018-01-24 12:25:32,812 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:32,812 INFO L93 Difference]: Finished difference Result 243 states and 251 transitions. [2018-01-24 12:25:32,812 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-24 12:25:32,812 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 92 [2018-01-24 12:25:32,813 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:32,813 INFO L225 Difference]: With dead ends: 243 [2018-01-24 12:25:32,813 INFO L226 Difference]: Without dead ends: 136 [2018-01-24 12:25:32,814 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 119 GetRequests, 71 SyntacticMatches, 3 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 488 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=286, Invalid=1876, Unknown=0, NotChecked=0, Total=2162 [2018-01-24 12:25:32,814 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-01-24 12:25:32,831 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-01-24 12:25:32,831 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-01-24 12:25:32,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 139 transitions. [2018-01-24 12:25:32,832 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 139 transitions. Word has length 92 [2018-01-24 12:25:32,832 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:32,832 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 139 transitions. [2018-01-24 12:25:32,832 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-01-24 12:25:32,832 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 139 transitions. [2018-01-24 12:25:32,833 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-01-24 12:25:32,833 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:32,833 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:32,833 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:32,833 INFO L82 PathProgramCache]: Analyzing trace with hash -359095659, now seen corresponding path program 1 times [2018-01-24 12:25:32,833 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:32,833 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:32,834 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:32,834 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:25:32,834 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:32,854 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:32,855 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:33,001 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-24 12:25:33,001 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:25:33,001 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-24 12:25:33,002 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-24 12:25:33,002 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-24 12:25:33,002 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-01-24 12:25:33,002 INFO L87 Difference]: Start difference. First operand 136 states and 139 transitions. Second operand 11 states. [2018-01-24 12:25:33,093 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:33,093 INFO L93 Difference]: Finished difference Result 142 states and 144 transitions. [2018-01-24 12:25:33,094 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 12:25:33,094 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 91 [2018-01-24 12:25:33,094 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:33,095 INFO L225 Difference]: With dead ends: 142 [2018-01-24 12:25:33,095 INFO L226 Difference]: Without dead ends: 136 [2018-01-24 12:25:33,096 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2018-01-24 12:25:33,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-01-24 12:25:33,122 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-01-24 12:25:33,122 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-01-24 12:25:33,123 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 138 transitions. [2018-01-24 12:25:33,124 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 138 transitions. Word has length 91 [2018-01-24 12:25:33,124 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:33,124 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 138 transitions. [2018-01-24 12:25:33,124 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-24 12:25:33,124 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 138 transitions. [2018-01-24 12:25:33,125 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-01-24 12:25:33,125 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:33,125 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:33,125 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:33,125 INFO L82 PathProgramCache]: Analyzing trace with hash 2073607857, now seen corresponding path program 1 times [2018-01-24 12:25:33,126 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:33,126 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:33,127 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:33,127 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:33,127 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:33,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:33,152 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:33,511 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-24 12:25:33,511 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:25:33,511 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2018-01-24 12:25:33,511 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-24 12:25:33,511 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-24 12:25:33,512 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=505, Unknown=0, NotChecked=0, Total=552 [2018-01-24 12:25:33,512 INFO L87 Difference]: Start difference. First operand 136 states and 138 transitions. Second operand 24 states. [2018-01-24 12:25:33,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:33,916 INFO L93 Difference]: Finished difference Result 141 states and 143 transitions. [2018-01-24 12:25:33,916 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-24 12:25:33,916 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 107 [2018-01-24 12:25:33,917 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:33,917 INFO L225 Difference]: With dead ends: 141 [2018-01-24 12:25:33,917 INFO L226 Difference]: Without dead ends: 139 [2018-01-24 12:25:33,918 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 32 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 78 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=83, Invalid=973, Unknown=0, NotChecked=0, Total=1056 [2018-01-24 12:25:33,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-01-24 12:25:33,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 134. [2018-01-24 12:25:33,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-01-24 12:25:33,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 136 transitions. [2018-01-24 12:25:33,935 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 136 transitions. Word has length 107 [2018-01-24 12:25:33,936 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:33,936 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 136 transitions. [2018-01-24 12:25:33,936 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-24 12:25:33,936 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 136 transitions. [2018-01-24 12:25:33,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-01-24 12:25:33,936 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:33,936 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:33,936 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:33,937 INFO L82 PathProgramCache]: Analyzing trace with hash 2073607858, now seen corresponding path program 1 times [2018-01-24 12:25:33,937 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:33,937 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:33,937 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:33,937 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:33,938 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:33,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:33,960 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:34,196 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:34,196 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:25:34,196 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:25:34,210 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:34,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:34,290 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:25:34,311 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:34,345 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:25:34,345 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 14 [2018-01-24 12:25:34,345 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-24 12:25:34,345 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-24 12:25:34,345 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=102, Unknown=0, NotChecked=0, Total=182 [2018-01-24 12:25:34,346 INFO L87 Difference]: Start difference. First operand 134 states and 136 transitions. Second operand 14 states. [2018-01-24 12:25:34,396 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:34,396 INFO L93 Difference]: Finished difference Result 238 states and 242 transitions. [2018-01-24 12:25:34,397 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-24 12:25:34,397 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 107 [2018-01-24 12:25:34,397 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:34,397 INFO L225 Difference]: With dead ends: 238 [2018-01-24 12:25:34,397 INFO L226 Difference]: Without dead ends: 135 [2018-01-24 12:25:34,398 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 107 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=84, Invalid=126, Unknown=0, NotChecked=0, Total=210 [2018-01-24 12:25:34,398 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-01-24 12:25:34,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-01-24 12:25:34,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-01-24 12:25:34,415 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 137 transitions. [2018-01-24 12:25:34,415 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 137 transitions. Word has length 107 [2018-01-24 12:25:34,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:34,415 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 137 transitions. [2018-01-24 12:25:34,416 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-24 12:25:34,416 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 137 transitions. [2018-01-24 12:25:34,417 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2018-01-24 12:25:34,417 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:34,417 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:34,417 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:34,417 INFO L82 PathProgramCache]: Analyzing trace with hash 187804560, now seen corresponding path program 2 times [2018-01-24 12:25:34,417 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:34,417 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:34,418 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:34,418 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:34,418 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:34,435 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:34,436 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:34,658 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:34,658 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:25:34,658 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:25:34,668 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 12:25:34,707 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:25:34,713 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:25:34,719 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:25:34,724 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 12:25:34,724 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:25:34,736 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 12:25:34,737 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:25:34,747 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 12:25:34,747 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 12:25:35,859 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 55 trivial. 0 not checked. [2018-01-24 12:25:35,880 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-24 12:25:35,880 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [14] total 37 [2018-01-24 12:25:35,881 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-01-24 12:25:35,881 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-01-24 12:25:35,882 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=165, Invalid=1167, Unknown=0, NotChecked=0, Total=1332 [2018-01-24 12:25:35,882 INFO L87 Difference]: Start difference. First operand 135 states and 137 transitions. Second operand 37 states. [2018-01-24 12:25:38,248 WARN L143 SmtUtils]: Spent 2023ms on a formula simplification that was a NOOP. DAG size: 35 [2018-01-24 12:25:40,552 WARN L143 SmtUtils]: Spent 2034ms on a formula simplification that was a NOOP. DAG size: 35 [2018-01-24 12:25:41,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:41,951 INFO L93 Difference]: Finished difference Result 237 states and 243 transitions. [2018-01-24 12:25:41,951 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-01-24 12:25:41,951 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 108 [2018-01-24 12:25:41,951 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:41,952 INFO L225 Difference]: With dead ends: 237 [2018-01-24 12:25:41,952 INFO L226 Difference]: Without dead ends: 134 [2018-01-24 12:25:41,953 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 81 SyntacticMatches, 5 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 768 ImplicationChecksByTransitivity, 6.0s TimeCoverageRelationStatistics Valid=385, Invalid=2807, Unknown=0, NotChecked=0, Total=3192 [2018-01-24 12:25:41,953 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-01-24 12:25:41,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-01-24 12:25:41,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-01-24 12:25:41,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 136 transitions. [2018-01-24 12:25:41,974 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 136 transitions. Word has length 108 [2018-01-24 12:25:41,974 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:41,974 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 136 transitions. [2018-01-24 12:25:41,974 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-01-24 12:25:41,974 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 136 transitions. [2018-01-24 12:25:41,975 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-01-24 12:25:41,975 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:41,975 INFO L322 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:41,975 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:41,975 INFO L82 PathProgramCache]: Analyzing trace with hash 508946867, now seen corresponding path program 1 times [2018-01-24 12:25:41,975 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:41,975 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:41,976 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:41,976 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:25:41,976 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:41,994 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:41,996 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:42,253 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:42,254 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:25:42,254 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:25:42,259 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:42,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:42,315 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:25:42,328 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:42,349 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:25:42,350 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 16 [2018-01-24 12:25:42,350 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-24 12:25:42,350 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-24 12:25:42,350 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=133, Unknown=0, NotChecked=0, Total=240 [2018-01-24 12:25:42,351 INFO L87 Difference]: Start difference. First operand 134 states and 136 transitions. Second operand 16 states. [2018-01-24 12:25:42,401 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:42,401 INFO L93 Difference]: Finished difference Result 236 states and 240 transitions. [2018-01-24 12:25:42,401 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-24 12:25:42,401 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 113 [2018-01-24 12:25:42,402 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:42,402 INFO L225 Difference]: With dead ends: 236 [2018-01-24 12:25:42,402 INFO L226 Difference]: Without dead ends: 135 [2018-01-24 12:25:42,403 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 128 GetRequests, 113 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=111, Invalid=161, Unknown=0, NotChecked=0, Total=272 [2018-01-24 12:25:42,403 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-01-24 12:25:42,421 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-01-24 12:25:42,421 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-01-24 12:25:42,422 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 137 transitions. [2018-01-24 12:25:42,422 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 137 transitions. Word has length 113 [2018-01-24 12:25:42,422 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:42,422 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 137 transitions. [2018-01-24 12:25:42,422 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-24 12:25:42,422 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 137 transitions. [2018-01-24 12:25:42,423 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 115 [2018-01-24 12:25:42,423 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:42,423 INFO L322 BasicCegarLoop]: trace histogram [12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:42,423 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:42,423 INFO L82 PathProgramCache]: Analyzing trace with hash -1170917359, now seen corresponding path program 2 times [2018-01-24 12:25:42,423 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:42,423 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:42,424 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:42,424 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:42,424 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:42,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:42,440 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:42,830 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:42,830 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:25:42,830 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:25:42,837 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 12:25:42,887 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:25:42,895 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:25:42,903 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:25:42,985 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-24 12:25:42,986 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 12:25:42,987 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:25:42,988 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:25:42,989 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:25:42,989 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-01-24 12:25:43,073 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 12:25:43,075 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 12:25:43,079 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 12:25:43,079 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:26 [2018-01-24 12:25:43,082 WARN L1029 $PredicateComparison]: unable to prove that (exists ((LDV_INIT_LIST_HEAD_~list.offset Int) (v_DerPreprocessor_2 Int)) (and (= |c_#memory_int| (store |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base| (let ((.cse0 (+ LDV_INIT_LIST_HEAD_~list.offset 4))) (store (store (select |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base|) LDV_INIT_LIST_HEAD_~list.offset v_DerPreprocessor_2) .cse0 (select (select |c_#memory_int| |c_LDV_INIT_LIST_HEAD_#in~list.base|) .cse0))))) (<= LDV_INIT_LIST_HEAD_~list.offset |c_LDV_INIT_LIST_HEAD_#in~list.offset|))) is different from true [2018-01-24 12:25:43,089 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2018-01-24 12:25:43,092 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:25:43,095 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 35 [2018-01-24 12:25:43,100 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:25:43,101 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:25:43,104 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 37 [2018-01-24 12:25:43,105 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 12:25:43,110 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:25:43,113 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:25:43,117 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:25:43,118 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9 [2018-01-24 12:25:43,523 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:25:43,524 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 38 [2018-01-24 12:25:43,526 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:25:43,527 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 9 [2018-01-24 12:25:43,527 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:25:43,529 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:25:43,532 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:25:43,532 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:34, output treesize:13 [2018-01-24 12:25:43,974 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-01-24 12:25:43,975 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-01-24 12:25:43,976 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:25:43,977 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:25:43,978 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:25:43,978 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-01-24 12:25:44,032 INFO L134 CoverageAnalysis]: Checked inductivity of 78 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 78 trivial. 0 not checked. [2018-01-24 12:25:44,052 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-24 12:25:44,053 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [43] imperfect sequences [16] total 57 [2018-01-24 12:25:44,053 INFO L409 AbstractCegarLoop]: Interpolant automaton has 57 states [2018-01-24 12:25:44,053 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 57 interpolants. [2018-01-24 12:25:44,054 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=202, Invalid=2881, Unknown=1, NotChecked=108, Total=3192 [2018-01-24 12:25:44,054 INFO L87 Difference]: Start difference. First operand 135 states and 137 transitions. Second operand 57 states. [2018-01-24 12:25:45,953 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:45,953 INFO L93 Difference]: Finished difference Result 217 states and 223 transitions. [2018-01-24 12:25:45,954 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2018-01-24 12:25:45,954 INFO L78 Accepts]: Start accepts. Automaton has 57 states. Word has length 114 [2018-01-24 12:25:45,954 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:45,955 INFO L225 Difference]: With dead ends: 217 [2018-01-24 12:25:45,955 INFO L226 Difference]: Without dead ends: 116 [2018-01-24 12:25:45,957 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 151 GetRequests, 74 SyntacticMatches, 0 SemanticMatches, 77 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 1045 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=314, Invalid=5695, Unknown=1, NotChecked=152, Total=6162 [2018-01-24 12:25:45,957 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2018-01-24 12:25:45,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 116. [2018-01-24 12:25:45,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-01-24 12:25:45,992 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 116 transitions. [2018-01-24 12:25:45,993 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 116 transitions. Word has length 114 [2018-01-24 12:25:45,993 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:45,993 INFO L432 AbstractCegarLoop]: Abstraction has 116 states and 116 transitions. [2018-01-24 12:25:45,993 INFO L433 AbstractCegarLoop]: Interpolant automaton has 57 states. [2018-01-24 12:25:45,993 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 116 transitions. [2018-01-24 12:25:45,994 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-01-24 12:25:45,994 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:45,994 INFO L322 BasicCegarLoop]: trace histogram [13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:45,994 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:45,995 INFO L82 PathProgramCache]: Analyzing trace with hash -1784564, now seen corresponding path program 1 times [2018-01-24 12:25:45,995 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:45,995 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:45,996 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:45,996 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:25:45,996 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:46,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:46,028 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:46,183 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:46,183 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:25:46,183 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:25:46,189 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:46,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:46,261 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:25:46,283 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:46,304 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:25:46,304 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18 [2018-01-24 12:25:46,305 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-24 12:25:46,305 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-24 12:25:46,305 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=168, Unknown=0, NotChecked=0, Total=306 [2018-01-24 12:25:46,305 INFO L87 Difference]: Start difference. First operand 116 states and 116 transitions. Second operand 18 states. [2018-01-24 12:25:46,371 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:46,371 INFO L93 Difference]: Finished difference Result 198 states and 198 transitions. [2018-01-24 12:25:46,371 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-24 12:25:46,371 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 115 [2018-01-24 12:25:46,371 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:46,372 INFO L225 Difference]: With dead ends: 198 [2018-01-24 12:25:46,372 INFO L226 Difference]: Without dead ends: 117 [2018-01-24 12:25:46,373 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 115 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=142, Invalid=200, Unknown=0, NotChecked=0, Total=342 [2018-01-24 12:25:46,373 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-01-24 12:25:46,394 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 117. [2018-01-24 12:25:46,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-01-24 12:25:46,394 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 117 transitions. [2018-01-24 12:25:46,394 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 117 transitions. Word has length 115 [2018-01-24 12:25:46,395 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:46,395 INFO L432 AbstractCegarLoop]: Abstraction has 117 states and 117 transitions. [2018-01-24 12:25:46,395 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-24 12:25:46,395 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 117 transitions. [2018-01-24 12:25:46,395 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 117 [2018-01-24 12:25:46,395 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:46,396 INFO L322 BasicCegarLoop]: trace histogram [14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:46,396 INFO L371 AbstractCegarLoop]: === Iteration 31 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:46,396 INFO L82 PathProgramCache]: Analyzing trace with hash 556397546, now seen corresponding path program 2 times [2018-01-24 12:25:46,396 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:46,396 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:46,397 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:46,397 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:25:46,398 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:46,413 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:46,414 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:46,605 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:46,605 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:25:46,605 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:25:46,613 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 12:25:46,657 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:25:46,690 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 12:25:46,693 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 12:25:46,698 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:25:46,734 INFO L134 CoverageAnalysis]: Checked inductivity of 105 backedges. 0 proven. 105 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:46,756 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:25:46,756 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19 [2018-01-24 12:25:46,757 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-24 12:25:46,757 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-24 12:25:46,757 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-24 12:25:46,757 INFO L87 Difference]: Start difference. First operand 117 states and 117 transitions. Second operand 19 states. [2018-01-24 12:25:46,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:25:46,851 INFO L93 Difference]: Finished difference Result 199 states and 199 transitions. [2018-01-24 12:25:46,851 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-24 12:25:46,851 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 116 [2018-01-24 12:25:46,851 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:25:46,852 INFO L225 Difference]: With dead ends: 199 [2018-01-24 12:25:46,852 INFO L226 Difference]: Without dead ends: 118 [2018-01-24 12:25:46,852 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 134 GetRequests, 116 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=159, Invalid=221, Unknown=0, NotChecked=0, Total=380 [2018-01-24 12:25:46,852 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states. [2018-01-24 12:25:46,873 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 118. [2018-01-24 12:25:46,873 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-01-24 12:25:46,874 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 118 transitions. [2018-01-24 12:25:46,874 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 118 transitions. Word has length 116 [2018-01-24 12:25:46,874 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:25:46,874 INFO L432 AbstractCegarLoop]: Abstraction has 118 states and 118 transitions. [2018-01-24 12:25:46,874 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-24 12:25:46,874 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 118 transitions. [2018-01-24 12:25:46,875 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2018-01-24 12:25:46,875 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:25:46,875 INFO L322 BasicCegarLoop]: trace histogram [15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:25:46,875 INFO L371 AbstractCegarLoop]: === Iteration 32 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 12:25:46,875 INFO L82 PathProgramCache]: Analyzing trace with hash 680173772, now seen corresponding path program 3 times [2018-01-24 12:25:46,875 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:25:46,875 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:25:46,876 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:46,876 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 12:25:46,877 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:25:46,892 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:25:46,893 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:25:47,226 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:25:47,227 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:25:47,227 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:25:47,242 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 12:25:47,283 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 12:25:47,312 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 12:25:47,404 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 12:25:47,800 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 12:25:50,506 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 12:25:52,338 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 12:25:52,649 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 12:25:53,740 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command Received shutdown request... Cannot interrupt operation gracefully because timeout expired. Forcing shutdown