java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ.epf -i ../../../trunk/examples/svcomp/memsafety-ext2/optional_data_creation_test04_false-valid-memtrack.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-24 12:09:03,557 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-24 12:09:03,559 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-24 12:09:03,573 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-24 12:09:03,573 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-24 12:09:03,574 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-24 12:09:03,575 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-24 12:09:03,577 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-24 12:09:03,579 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-24 12:09:03,580 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-24 12:09:03,580 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-24 12:09:03,580 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-24 12:09:03,581 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-24 12:09:03,582 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-24 12:09:03,583 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-24 12:09:03,586 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-24 12:09:03,588 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-24 12:09:03,590 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-24 12:09:03,591 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-24 12:09:03,593 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-24 12:09:03,595 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-24 12:09:03,595 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-24 12:09:03,596 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-24 12:09:03,597 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-24 12:09:03,597 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-24 12:09:03,599 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-24 12:09:03,599 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-24 12:09:03,600 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-24 12:09:03,600 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-24 12:09:03,600 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-24 12:09:03,601 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-24 12:09:03,601 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ.epf [2018-01-24 12:09:03,611 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-24 12:09:03,611 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-24 12:09:03,612 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-24 12:09:03,612 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-24 12:09:03,613 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-24 12:09:03,613 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-24 12:09:03,613 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-24 12:09:03,614 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-24 12:09:03,614 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-24 12:09:03,614 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-24 12:09:03,614 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-24 12:09:03,614 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-24 12:09:03,615 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-24 12:09:03,615 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-24 12:09:03,615 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-24 12:09:03,615 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-24 12:09:03,615 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-24 12:09:03,615 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-24 12:09:03,616 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-24 12:09:03,616 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-24 12:09:03,616 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-24 12:09:03,616 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-24 12:09:03,616 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-24 12:09:03,617 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 12:09:03,617 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-24 12:09:03,617 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-24 12:09:03,617 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-24 12:09:03,618 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-24 12:09:03,618 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-01-24 12:09:03,618 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-24 12:09:03,618 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-24 12:09:03,618 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-24 12:09:03,619 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-24 12:09:03,619 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-24 12:09:03,653 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-24 12:09:03,667 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-24 12:09:03,671 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-24 12:09:03,673 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-24 12:09:03,673 INFO L276 PluginConnector]: CDTParser initialized [2018-01-24 12:09:03,674 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety-ext2/optional_data_creation_test04_false-valid-memtrack.i [2018-01-24 12:09:03,874 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-24 12:09:03,879 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-24 12:09:03,880 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-24 12:09:03,880 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-24 12:09:03,888 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-24 12:09:03,889 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 12:09:03" (1/1) ... [2018-01-24 12:09:03,891 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@321f72c1 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:09:03, skipping insertion in model container [2018-01-24 12:09:03,892 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 12:09:03" (1/1) ... [2018-01-24 12:09:03,912 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 12:09:03,954 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 12:09:04,072 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 12:09:04,099 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 12:09:04,109 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:09:04 WrapperNode [2018-01-24 12:09:04,109 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-24 12:09:04,110 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-24 12:09:04,110 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-24 12:09:04,110 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-24 12:09:04,121 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:09:04" (1/1) ... [2018-01-24 12:09:04,121 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:09:04" (1/1) ... [2018-01-24 12:09:04,133 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:09:04" (1/1) ... [2018-01-24 12:09:04,133 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:09:04" (1/1) ... [2018-01-24 12:09:04,141 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:09:04" (1/1) ... [2018-01-24 12:09:04,146 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:09:04" (1/1) ... [2018-01-24 12:09:04,148 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:09:04" (1/1) ... [2018-01-24 12:09:04,150 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-24 12:09:04,151 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-24 12:09:04,151 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-24 12:09:04,151 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-24 12:09:04,152 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:09:04" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 12:09:04,208 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-24 12:09:04,208 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-24 12:09:04,208 INFO L136 BoogieDeclarations]: Found implementation of procedure create_data [2018-01-24 12:09:04,208 INFO L136 BoogieDeclarations]: Found implementation of procedure freeData [2018-01-24 12:09:04,209 INFO L136 BoogieDeclarations]: Found implementation of procedure append [2018-01-24 12:09:04,209 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-24 12:09:04,209 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-24 12:09:04,209 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-24 12:09:04,209 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-24 12:09:04,210 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-24 12:09:04,210 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-24 12:09:04,210 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-24 12:09:04,210 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-24 12:09:04,210 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-24 12:09:04,210 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-24 12:09:04,210 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-24 12:09:04,211 INFO L128 BoogieDeclarations]: Found specification of procedure create_data [2018-01-24 12:09:04,211 INFO L128 BoogieDeclarations]: Found specification of procedure freeData [2018-01-24 12:09:04,211 INFO L128 BoogieDeclarations]: Found specification of procedure append [2018-01-24 12:09:04,211 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-24 12:09:04,211 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-24 12:09:04,211 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-24 12:09:04,634 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-24 12:09:04,635 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 12:09:04 BoogieIcfgContainer [2018-01-24 12:09:04,635 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-24 12:09:04,636 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-24 12:09:04,637 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-24 12:09:04,639 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-24 12:09:04,640 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.01 12:09:03" (1/3) ... [2018-01-24 12:09:04,641 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@731e4e53 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 12:09:04, skipping insertion in model container [2018-01-24 12:09:04,641 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 12:09:04" (2/3) ... [2018-01-24 12:09:04,642 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@731e4e53 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 12:09:04, skipping insertion in model container [2018-01-24 12:09:04,642 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 12:09:04" (3/3) ... [2018-01-24 12:09:04,644 INFO L105 eAbstractionObserver]: Analyzing ICFG optional_data_creation_test04_false-valid-memtrack.i [2018-01-24 12:09:04,654 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-24 12:09:04,662 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 45 error locations. [2018-01-24 12:09:04,705 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-24 12:09:04,705 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-24 12:09:04,705 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-24 12:09:04,705 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-24 12:09:04,705 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-24 12:09:04,705 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-24 12:09:04,706 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-24 12:09:04,706 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-24 12:09:04,706 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-24 12:09:04,727 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states. [2018-01-24 12:09:04,733 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-01-24 12:09:04,734 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:04,735 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:04,735 INFO L371 AbstractCegarLoop]: === Iteration 1 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:04,739 INFO L82 PathProgramCache]: Analyzing trace with hash -548983798, now seen corresponding path program 1 times [2018-01-24 12:09:04,741 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:04,741 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:04,784 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:04,784 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:04,784 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:04,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:04,830 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:04,882 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:04,884 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:04,884 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 12:09:04,886 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 12:09:04,897 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 12:09:04,897 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 12:09:04,899 INFO L87 Difference]: Start difference. First operand 121 states. Second operand 3 states. [2018-01-24 12:09:05,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:05,168 INFO L93 Difference]: Finished difference Result 235 states and 262 transitions. [2018-01-24 12:09:05,168 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 12:09:05,170 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-01-24 12:09:05,170 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:05,183 INFO L225 Difference]: With dead ends: 235 [2018-01-24 12:09:05,183 INFO L226 Difference]: Without dead ends: 120 [2018-01-24 12:09:05,188 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 12:09:05,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-01-24 12:09:05,226 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 117. [2018-01-24 12:09:05,227 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-01-24 12:09:05,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 124 transitions. [2018-01-24 12:09:05,231 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 124 transitions. Word has length 7 [2018-01-24 12:09:05,231 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:05,231 INFO L432 AbstractCegarLoop]: Abstraction has 117 states and 124 transitions. [2018-01-24 12:09:05,232 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 12:09:05,232 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 124 transitions. [2018-01-24 12:09:05,232 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-01-24 12:09:05,232 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:05,232 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:05,232 INFO L371 AbstractCegarLoop]: === Iteration 2 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:05,233 INFO L82 PathProgramCache]: Analyzing trace with hash -548983797, now seen corresponding path program 1 times [2018-01-24 12:09:05,233 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:05,233 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:05,234 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:05,234 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:05,234 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:05,245 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:05,246 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:05,340 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:05,340 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:05,340 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 12:09:05,341 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 12:09:05,342 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 12:09:05,342 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 12:09:05,342 INFO L87 Difference]: Start difference. First operand 117 states and 124 transitions. Second operand 3 states. [2018-01-24 12:09:05,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:05,486 INFO L93 Difference]: Finished difference Result 119 states and 127 transitions. [2018-01-24 12:09:05,486 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 12:09:05,486 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-01-24 12:09:05,487 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:05,488 INFO L225 Difference]: With dead ends: 119 [2018-01-24 12:09:05,489 INFO L226 Difference]: Without dead ends: 118 [2018-01-24 12:09:05,489 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 12:09:05,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states. [2018-01-24 12:09:05,497 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 116. [2018-01-24 12:09:05,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-01-24 12:09:05,498 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 123 transitions. [2018-01-24 12:09:05,499 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 123 transitions. Word has length 7 [2018-01-24 12:09:05,499 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:05,499 INFO L432 AbstractCegarLoop]: Abstraction has 116 states and 123 transitions. [2018-01-24 12:09:05,499 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 12:09:05,499 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 123 transitions. [2018-01-24 12:09:05,499 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-01-24 12:09:05,499 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:05,500 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:05,500 INFO L371 AbstractCegarLoop]: === Iteration 3 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:05,500 INFO L82 PathProgramCache]: Analyzing trace with hash 1805977305, now seen corresponding path program 1 times [2018-01-24 12:09:05,500 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:05,500 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:05,501 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:05,501 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:05,501 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:05,517 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:05,517 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:05,584 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:05,584 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:05,584 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 12:09:05,585 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 12:09:05,585 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 12:09:05,585 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:09:05,585 INFO L87 Difference]: Start difference. First operand 116 states and 123 transitions. Second operand 5 states. [2018-01-24 12:09:05,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:05,844 INFO L93 Difference]: Finished difference Result 130 states and 138 transitions. [2018-01-24 12:09:05,844 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 12:09:05,845 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 14 [2018-01-24 12:09:05,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:05,846 INFO L225 Difference]: With dead ends: 130 [2018-01-24 12:09:05,846 INFO L226 Difference]: Without dead ends: 129 [2018-01-24 12:09:05,847 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:09:05,847 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-01-24 12:09:05,856 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 122. [2018-01-24 12:09:05,856 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-01-24 12:09:05,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 131 transitions. [2018-01-24 12:09:05,858 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 131 transitions. Word has length 14 [2018-01-24 12:09:05,859 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:05,859 INFO L432 AbstractCegarLoop]: Abstraction has 122 states and 131 transitions. [2018-01-24 12:09:05,859 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 12:09:05,859 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 131 transitions. [2018-01-24 12:09:05,859 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-01-24 12:09:05,860 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:05,860 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:05,860 INFO L371 AbstractCegarLoop]: === Iteration 4 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:05,860 INFO L82 PathProgramCache]: Analyzing trace with hash 1805977306, now seen corresponding path program 1 times [2018-01-24 12:09:05,860 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:05,860 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:05,861 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:05,862 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:05,862 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:05,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:05,877 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:05,982 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:05,982 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:05,982 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 12:09:05,983 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 12:09:05,983 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 12:09:05,983 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:09:05,983 INFO L87 Difference]: Start difference. First operand 122 states and 131 transitions. Second operand 7 states. [2018-01-24 12:09:06,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:06,206 INFO L93 Difference]: Finished difference Result 128 states and 137 transitions. [2018-01-24 12:09:06,207 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 12:09:06,207 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 14 [2018-01-24 12:09:06,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:06,209 INFO L225 Difference]: With dead ends: 128 [2018-01-24 12:09:06,209 INFO L226 Difference]: Without dead ends: 127 [2018-01-24 12:09:06,209 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-01-24 12:09:06,210 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-01-24 12:09:06,219 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 122. [2018-01-24 12:09:06,220 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-01-24 12:09:06,222 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 130 transitions. [2018-01-24 12:09:06,222 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 130 transitions. Word has length 14 [2018-01-24 12:09:06,223 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:06,223 INFO L432 AbstractCegarLoop]: Abstraction has 122 states and 130 transitions. [2018-01-24 12:09:06,223 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 12:09:06,223 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 130 transitions. [2018-01-24 12:09:06,224 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-01-24 12:09:06,224 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:06,224 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:06,225 INFO L371 AbstractCegarLoop]: === Iteration 5 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:06,225 INFO L82 PathProgramCache]: Analyzing trace with hash 150721727, now seen corresponding path program 1 times [2018-01-24 12:09:06,225 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:06,225 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:06,226 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:06,226 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:06,226 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:06,239 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:06,240 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:06,276 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:06,276 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:06,276 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 12:09:06,276 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 12:09:06,277 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 12:09:06,277 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 12:09:06,277 INFO L87 Difference]: Start difference. First operand 122 states and 130 transitions. Second operand 4 states. [2018-01-24 12:09:06,399 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:06,399 INFO L93 Difference]: Finished difference Result 122 states and 130 transitions. [2018-01-24 12:09:06,399 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 12:09:06,399 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-01-24 12:09:06,400 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:06,400 INFO L225 Difference]: With dead ends: 122 [2018-01-24 12:09:06,400 INFO L226 Difference]: Without dead ends: 121 [2018-01-24 12:09:06,401 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:09:06,401 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-01-24 12:09:06,410 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 121. [2018-01-24 12:09:06,410 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121 states. [2018-01-24 12:09:06,411 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 129 transitions. [2018-01-24 12:09:06,412 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 129 transitions. Word has length 15 [2018-01-24 12:09:06,412 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:06,412 INFO L432 AbstractCegarLoop]: Abstraction has 121 states and 129 transitions. [2018-01-24 12:09:06,412 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 12:09:06,412 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 129 transitions. [2018-01-24 12:09:06,413 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-01-24 12:09:06,413 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:06,413 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:06,413 INFO L371 AbstractCegarLoop]: === Iteration 6 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:06,413 INFO L82 PathProgramCache]: Analyzing trace with hash 150721728, now seen corresponding path program 1 times [2018-01-24 12:09:06,413 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:06,414 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:06,415 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:06,415 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:06,415 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:06,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:06,428 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:06,506 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:06,506 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:06,506 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 12:09:06,507 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 12:09:06,507 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 12:09:06,507 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 12:09:06,507 INFO L87 Difference]: Start difference. First operand 121 states and 129 transitions. Second operand 4 states. [2018-01-24 12:09:06,591 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:06,591 INFO L93 Difference]: Finished difference Result 121 states and 129 transitions. [2018-01-24 12:09:06,592 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 12:09:06,592 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-01-24 12:09:06,592 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:06,593 INFO L225 Difference]: With dead ends: 121 [2018-01-24 12:09:06,593 INFO L226 Difference]: Without dead ends: 120 [2018-01-24 12:09:06,593 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:09:06,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-01-24 12:09:06,600 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 120. [2018-01-24 12:09:06,600 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-01-24 12:09:06,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 128 transitions. [2018-01-24 12:09:06,602 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 128 transitions. Word has length 15 [2018-01-24 12:09:06,602 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:06,602 INFO L432 AbstractCegarLoop]: Abstraction has 120 states and 128 transitions. [2018-01-24 12:09:06,602 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 12:09:06,602 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 128 transitions. [2018-01-24 12:09:06,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-24 12:09:06,603 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:06,603 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:06,603 INFO L371 AbstractCegarLoop]: === Iteration 7 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:06,604 INFO L82 PathProgramCache]: Analyzing trace with hash 1247099981, now seen corresponding path program 1 times [2018-01-24 12:09:06,604 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:06,604 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:06,605 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:06,605 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:06,605 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:06,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:06,619 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:06,668 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:06,669 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:06,669 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 12:09:06,669 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 12:09:06,669 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 12:09:06,670 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:09:06,670 INFO L87 Difference]: Start difference. First operand 120 states and 128 transitions. Second operand 5 states. [2018-01-24 12:09:06,869 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:06,869 INFO L93 Difference]: Finished difference Result 136 states and 145 transitions. [2018-01-24 12:09:06,870 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 12:09:06,870 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-01-24 12:09:06,870 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:06,871 INFO L225 Difference]: With dead ends: 136 [2018-01-24 12:09:06,871 INFO L226 Difference]: Without dead ends: 135 [2018-01-24 12:09:06,872 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:09:06,872 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-01-24 12:09:06,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 123. [2018-01-24 12:09:06,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-01-24 12:09:06,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 132 transitions. [2018-01-24 12:09:06,881 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 132 transitions. Word has length 22 [2018-01-24 12:09:06,881 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:06,881 INFO L432 AbstractCegarLoop]: Abstraction has 123 states and 132 transitions. [2018-01-24 12:09:06,881 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 12:09:06,881 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 132 transitions. [2018-01-24 12:09:06,882 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-24 12:09:06,882 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:06,882 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:06,882 INFO L371 AbstractCegarLoop]: === Iteration 8 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:06,883 INFO L82 PathProgramCache]: Analyzing trace with hash 1247099982, now seen corresponding path program 1 times [2018-01-24 12:09:06,883 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:06,883 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:06,884 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:06,884 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:06,884 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:06,896 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:06,897 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:06,966 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:06,967 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:06,967 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 12:09:06,967 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 12:09:06,967 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 12:09:06,968 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:09:06,968 INFO L87 Difference]: Start difference. First operand 123 states and 132 transitions. Second operand 5 states. [2018-01-24 12:09:07,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:07,111 INFO L93 Difference]: Finished difference Result 130 states and 139 transitions. [2018-01-24 12:09:07,111 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 12:09:07,112 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-01-24 12:09:07,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:07,112 INFO L225 Difference]: With dead ends: 130 [2018-01-24 12:09:07,113 INFO L226 Difference]: Without dead ends: 129 [2018-01-24 12:09:07,113 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:09:07,113 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-01-24 12:09:07,118 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 123. [2018-01-24 12:09:07,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-01-24 12:09:07,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 131 transitions. [2018-01-24 12:09:07,119 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 131 transitions. Word has length 22 [2018-01-24 12:09:07,119 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:07,119 INFO L432 AbstractCegarLoop]: Abstraction has 123 states and 131 transitions. [2018-01-24 12:09:07,119 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 12:09:07,119 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 131 transitions. [2018-01-24 12:09:07,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-24 12:09:07,120 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:07,120 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:07,120 INFO L371 AbstractCegarLoop]: === Iteration 9 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:07,120 INFO L82 PathProgramCache]: Analyzing trace with hash 4873111, now seen corresponding path program 1 times [2018-01-24 12:09:07,120 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:07,120 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:07,121 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:07,121 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:07,121 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:07,132 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:07,133 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:07,171 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:07,171 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:07,172 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 12:09:07,172 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 12:09:07,172 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 12:09:07,172 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 12:09:07,173 INFO L87 Difference]: Start difference. First operand 123 states and 131 transitions. Second operand 4 states. [2018-01-24 12:09:07,248 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:07,248 INFO L93 Difference]: Finished difference Result 123 states and 131 transitions. [2018-01-24 12:09:07,248 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 12:09:07,248 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2018-01-24 12:09:07,249 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:07,249 INFO L225 Difference]: With dead ends: 123 [2018-01-24 12:09:07,249 INFO L226 Difference]: Without dead ends: 119 [2018-01-24 12:09:07,250 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:09:07,250 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2018-01-24 12:09:07,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 119. [2018-01-24 12:09:07,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-01-24 12:09:07,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 127 transitions. [2018-01-24 12:09:07,255 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 127 transitions. Word has length 23 [2018-01-24 12:09:07,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:07,256 INFO L432 AbstractCegarLoop]: Abstraction has 119 states and 127 transitions. [2018-01-24 12:09:07,256 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 12:09:07,256 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 127 transitions. [2018-01-24 12:09:07,257 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-24 12:09:07,257 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:07,257 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:07,257 INFO L371 AbstractCegarLoop]: === Iteration 10 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:07,257 INFO L82 PathProgramCache]: Analyzing trace with hash 4873112, now seen corresponding path program 1 times [2018-01-24 12:09:07,257 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:07,258 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:07,258 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:07,259 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:07,259 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:07,270 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:07,271 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:07,330 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:07,330 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:07,330 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 12:09:07,331 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 12:09:07,331 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 12:09:07,332 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 12:09:07,332 INFO L87 Difference]: Start difference. First operand 119 states and 127 transitions. Second operand 4 states. [2018-01-24 12:09:07,432 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:07,432 INFO L93 Difference]: Finished difference Result 125 states and 133 transitions. [2018-01-24 12:09:07,433 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 12:09:07,433 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2018-01-24 12:09:07,434 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:07,435 INFO L225 Difference]: With dead ends: 125 [2018-01-24 12:09:07,435 INFO L226 Difference]: Without dead ends: 123 [2018-01-24 12:09:07,436 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:09:07,436 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2018-01-24 12:09:07,443 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 120. [2018-01-24 12:09:07,443 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-01-24 12:09:07,444 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 128 transitions. [2018-01-24 12:09:07,444 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 128 transitions. Word has length 23 [2018-01-24 12:09:07,445 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:07,445 INFO L432 AbstractCegarLoop]: Abstraction has 120 states and 128 transitions. [2018-01-24 12:09:07,445 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 12:09:07,445 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 128 transitions. [2018-01-24 12:09:07,446 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-24 12:09:07,446 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:07,446 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:07,446 INFO L371 AbstractCegarLoop]: === Iteration 11 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:07,447 INFO L82 PathProgramCache]: Analyzing trace with hash 167210254, now seen corresponding path program 1 times [2018-01-24 12:09:07,447 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:07,447 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:07,448 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:07,448 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:07,448 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:07,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:07,462 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:07,517 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:07,517 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:07,517 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 12:09:07,518 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 12:09:07,518 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 12:09:07,518 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 12:09:07,518 INFO L87 Difference]: Start difference. First operand 120 states and 128 transitions. Second operand 4 states. [2018-01-24 12:09:07,620 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:07,620 INFO L93 Difference]: Finished difference Result 129 states and 137 transitions. [2018-01-24 12:09:07,620 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 12:09:07,620 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 24 [2018-01-24 12:09:07,621 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:07,621 INFO L225 Difference]: With dead ends: 129 [2018-01-24 12:09:07,621 INFO L226 Difference]: Without dead ends: 128 [2018-01-24 12:09:07,622 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 12:09:07,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-01-24 12:09:07,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 122. [2018-01-24 12:09:07,628 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-01-24 12:09:07,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 131 transitions. [2018-01-24 12:09:07,629 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 131 transitions. Word has length 24 [2018-01-24 12:09:07,629 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:07,629 INFO L432 AbstractCegarLoop]: Abstraction has 122 states and 131 transitions. [2018-01-24 12:09:07,629 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 12:09:07,629 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 131 transitions. [2018-01-24 12:09:07,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-24 12:09:07,630 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:07,630 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:07,630 INFO L371 AbstractCegarLoop]: === Iteration 12 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:07,630 INFO L82 PathProgramCache]: Analyzing trace with hash 167210255, now seen corresponding path program 1 times [2018-01-24 12:09:07,630 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:07,630 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:07,631 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:07,631 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:07,631 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:07,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:07,644 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:07,737 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:07,737 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:07,738 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 12:09:07,738 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 12:09:07,738 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 12:09:07,738 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:09:07,739 INFO L87 Difference]: Start difference. First operand 122 states and 131 transitions. Second operand 7 states. [2018-01-24 12:09:07,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:07,997 INFO L93 Difference]: Finished difference Result 123 states and 131 transitions. [2018-01-24 12:09:07,997 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 12:09:07,997 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 24 [2018-01-24 12:09:07,998 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:07,998 INFO L225 Difference]: With dead ends: 123 [2018-01-24 12:09:07,998 INFO L226 Difference]: Without dead ends: 122 [2018-01-24 12:09:07,999 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2018-01-24 12:09:07,999 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-01-24 12:09:08,002 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 122. [2018-01-24 12:09:08,003 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-01-24 12:09:08,004 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 130 transitions. [2018-01-24 12:09:08,004 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 130 transitions. Word has length 24 [2018-01-24 12:09:08,004 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:08,004 INFO L432 AbstractCegarLoop]: Abstraction has 122 states and 130 transitions. [2018-01-24 12:09:08,004 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 12:09:08,004 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 130 transitions. [2018-01-24 12:09:08,005 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-24 12:09:08,005 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:08,005 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:08,005 INFO L371 AbstractCegarLoop]: === Iteration 13 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:08,006 INFO L82 PathProgramCache]: Analyzing trace with hash 151037655, now seen corresponding path program 1 times [2018-01-24 12:09:08,006 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:08,006 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:08,006 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:08,006 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:08,007 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:08,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:08,018 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:08,079 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:08,079 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:08,079 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 12:09:08,079 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 12:09:08,079 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 12:09:08,080 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:09:08,080 INFO L87 Difference]: Start difference. First operand 122 states and 130 transitions. Second operand 5 states. [2018-01-24 12:09:08,239 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:08,240 INFO L93 Difference]: Finished difference Result 122 states and 130 transitions. [2018-01-24 12:09:08,240 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 12:09:08,240 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 24 [2018-01-24 12:09:08,240 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:08,241 INFO L225 Difference]: With dead ends: 122 [2018-01-24 12:09:08,241 INFO L226 Difference]: Without dead ends: 119 [2018-01-24 12:09:08,241 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:09:08,242 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2018-01-24 12:09:08,247 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 117. [2018-01-24 12:09:08,247 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-01-24 12:09:08,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 125 transitions. [2018-01-24 12:09:08,248 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 125 transitions. Word has length 24 [2018-01-24 12:09:08,248 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:08,248 INFO L432 AbstractCegarLoop]: Abstraction has 117 states and 125 transitions. [2018-01-24 12:09:08,248 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 12:09:08,248 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 125 transitions. [2018-01-24 12:09:08,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-24 12:09:08,250 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:08,250 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:08,250 INFO L371 AbstractCegarLoop]: === Iteration 14 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:08,250 INFO L82 PathProgramCache]: Analyzing trace with hash 1118005000, now seen corresponding path program 1 times [2018-01-24 12:09:08,250 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:08,250 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:08,251 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:08,251 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:08,252 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:08,264 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:08,265 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:08,350 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:08,351 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:08,351 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-24 12:09:08,351 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 12:09:08,351 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 12:09:08,351 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-01-24 12:09:08,351 INFO L87 Difference]: Start difference. First operand 117 states and 125 transitions. Second operand 8 states. [2018-01-24 12:09:08,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:08,710 INFO L93 Difference]: Finished difference Result 132 states and 141 transitions. [2018-01-24 12:09:08,710 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 12:09:08,710 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 29 [2018-01-24 12:09:08,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:08,712 INFO L225 Difference]: With dead ends: 132 [2018-01-24 12:09:08,712 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 12:09:08,713 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2018-01-24 12:09:08,713 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 12:09:08,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 123. [2018-01-24 12:09:08,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-01-24 12:09:08,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 132 transitions. [2018-01-24 12:09:08,721 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 132 transitions. Word has length 29 [2018-01-24 12:09:08,721 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:08,721 INFO L432 AbstractCegarLoop]: Abstraction has 123 states and 132 transitions. [2018-01-24 12:09:08,721 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 12:09:08,721 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 132 transitions. [2018-01-24 12:09:08,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-24 12:09:08,722 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:08,722 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:08,723 INFO L371 AbstractCegarLoop]: === Iteration 15 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:08,723 INFO L82 PathProgramCache]: Analyzing trace with hash 1118005001, now seen corresponding path program 1 times [2018-01-24 12:09:08,723 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:08,723 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:08,724 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:08,724 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:08,724 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:08,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:08,739 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:08,881 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:08,882 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:08,882 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 12:09:08,882 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 12:09:08,882 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 12:09:08,883 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:09:08,883 INFO L87 Difference]: Start difference. First operand 123 states and 132 transitions. Second operand 7 states. [2018-01-24 12:09:09,262 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:09,262 INFO L93 Difference]: Finished difference Result 132 states and 142 transitions. [2018-01-24 12:09:09,262 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 12:09:09,263 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 29 [2018-01-24 12:09:09,263 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:09,264 INFO L225 Difference]: With dead ends: 132 [2018-01-24 12:09:09,264 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 12:09:09,264 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2018-01-24 12:09:09,264 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 12:09:09,270 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 123. [2018-01-24 12:09:09,270 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-01-24 12:09:09,271 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 131 transitions. [2018-01-24 12:09:09,271 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 131 transitions. Word has length 29 [2018-01-24 12:09:09,271 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:09,271 INFO L432 AbstractCegarLoop]: Abstraction has 123 states and 131 transitions. [2018-01-24 12:09:09,271 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 12:09:09,271 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 131 transitions. [2018-01-24 12:09:09,272 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-24 12:09:09,272 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:09,272 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:09,272 INFO L371 AbstractCegarLoop]: === Iteration 16 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:09,273 INFO L82 PathProgramCache]: Analyzing trace with hash 1228344885, now seen corresponding path program 1 times [2018-01-24 12:09:09,273 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:09,273 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:09,274 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:09,274 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:09,274 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:09,283 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:09,284 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:09,320 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:09,320 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:09,320 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 12:09:09,320 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 12:09:09,321 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 12:09:09,321 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:09:09,321 INFO L87 Difference]: Start difference. First operand 123 states and 131 transitions. Second operand 5 states. [2018-01-24 12:09:09,540 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:09,540 INFO L93 Difference]: Finished difference Result 123 states and 131 transitions. [2018-01-24 12:09:09,540 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 12:09:09,540 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2018-01-24 12:09:09,540 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:09,541 INFO L225 Difference]: With dead ends: 123 [2018-01-24 12:09:09,541 INFO L226 Difference]: Without dead ends: 121 [2018-01-24 12:09:09,542 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:09:09,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-01-24 12:09:09,549 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 119. [2018-01-24 12:09:09,549 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-01-24 12:09:09,551 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 126 transitions. [2018-01-24 12:09:09,551 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 126 transitions. Word has length 30 [2018-01-24 12:09:09,551 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:09,551 INFO L432 AbstractCegarLoop]: Abstraction has 119 states and 126 transitions. [2018-01-24 12:09:09,551 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 12:09:09,552 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 126 transitions. [2018-01-24 12:09:09,552 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-24 12:09:09,553 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:09,553 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:09,553 INFO L371 AbstractCegarLoop]: === Iteration 17 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:09,553 INFO L82 PathProgramCache]: Analyzing trace with hash 1228344886, now seen corresponding path program 1 times [2018-01-24 12:09:09,553 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:09,553 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:09,554 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:09,554 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:09,554 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:09,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:09,566 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:09,690 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:09,691 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:09,691 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 12:09:09,691 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 12:09:09,691 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 12:09:09,691 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:09:09,691 INFO L87 Difference]: Start difference. First operand 119 states and 126 transitions. Second operand 6 states. [2018-01-24 12:09:09,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:09,844 INFO L93 Difference]: Finished difference Result 131 states and 140 transitions. [2018-01-24 12:09:09,844 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 12:09:09,845 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 30 [2018-01-24 12:09:09,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:09,846 INFO L225 Difference]: With dead ends: 131 [2018-01-24 12:09:09,846 INFO L226 Difference]: Without dead ends: 126 [2018-01-24 12:09:09,847 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:09:09,847 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-01-24 12:09:09,854 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 119. [2018-01-24 12:09:09,854 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-01-24 12:09:09,855 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 127 transitions. [2018-01-24 12:09:09,855 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 127 transitions. Word has length 30 [2018-01-24 12:09:09,855 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:09,855 INFO L432 AbstractCegarLoop]: Abstraction has 119 states and 127 transitions. [2018-01-24 12:09:09,856 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 12:09:09,856 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 127 transitions. [2018-01-24 12:09:09,856 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-24 12:09:09,856 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:09,856 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:09,857 INFO L371 AbstractCegarLoop]: === Iteration 18 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:09,857 INFO L82 PathProgramCache]: Analyzing trace with hash -1343765284, now seen corresponding path program 1 times [2018-01-24 12:09:09,857 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:09,857 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:09,858 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:09,858 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:09,858 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:09,869 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:09,870 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:09,907 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:09,908 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:09,908 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 12:09:09,908 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 12:09:09,908 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 12:09:09,908 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:09:09,909 INFO L87 Difference]: Start difference. First operand 119 states and 127 transitions. Second operand 5 states. [2018-01-24 12:09:10,126 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:10,126 INFO L93 Difference]: Finished difference Result 131 states and 140 transitions. [2018-01-24 12:09:10,126 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 12:09:10,126 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2018-01-24 12:09:10,127 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:10,127 INFO L225 Difference]: With dead ends: 131 [2018-01-24 12:09:10,127 INFO L226 Difference]: Without dead ends: 130 [2018-01-24 12:09:10,128 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-01-24 12:09:10,128 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-01-24 12:09:10,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 124. [2018-01-24 12:09:10,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-01-24 12:09:10,134 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 134 transitions. [2018-01-24 12:09:10,134 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 134 transitions. Word has length 30 [2018-01-24 12:09:10,134 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:10,134 INFO L432 AbstractCegarLoop]: Abstraction has 124 states and 134 transitions. [2018-01-24 12:09:10,134 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 12:09:10,135 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 134 transitions. [2018-01-24 12:09:10,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-24 12:09:10,135 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:10,135 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:10,135 INFO L371 AbstractCegarLoop]: === Iteration 19 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:10,135 INFO L82 PathProgramCache]: Analyzing trace with hash -1343765283, now seen corresponding path program 1 times [2018-01-24 12:09:10,135 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:10,136 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:10,136 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:10,136 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:10,136 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:10,146 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:10,146 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:10,250 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:10,251 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:10,251 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 12:09:10,251 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 12:09:10,251 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 12:09:10,251 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:09:10,251 INFO L87 Difference]: Start difference. First operand 124 states and 134 transitions. Second operand 6 states. [2018-01-24 12:09:10,448 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:10,448 INFO L93 Difference]: Finished difference Result 235 states and 257 transitions. [2018-01-24 12:09:10,448 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 12:09:10,448 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 30 [2018-01-24 12:09:10,448 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:10,449 INFO L225 Difference]: With dead ends: 235 [2018-01-24 12:09:10,449 INFO L226 Difference]: Without dead ends: 125 [2018-01-24 12:09:10,450 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-01-24 12:09:10,450 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-01-24 12:09:10,456 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 124. [2018-01-24 12:09:10,457 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-01-24 12:09:10,458 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 132 transitions. [2018-01-24 12:09:10,458 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 132 transitions. Word has length 30 [2018-01-24 12:09:10,458 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:10,458 INFO L432 AbstractCegarLoop]: Abstraction has 124 states and 132 transitions. [2018-01-24 12:09:10,458 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 12:09:10,458 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 132 transitions. [2018-01-24 12:09:10,459 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-24 12:09:10,459 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:10,459 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:10,459 INFO L371 AbstractCegarLoop]: === Iteration 20 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:10,459 INFO L82 PathProgramCache]: Analyzing trace with hash 660985097, now seen corresponding path program 1 times [2018-01-24 12:09:10,459 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:10,459 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:10,460 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:10,460 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:10,460 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:10,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:10,469 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:10,683 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:10,683 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:10,684 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-24 12:09:10,684 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 12:09:10,684 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 12:09:10,684 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-01-24 12:09:10,684 INFO L87 Difference]: Start difference. First operand 124 states and 132 transitions. Second operand 8 states. [2018-01-24 12:09:11,074 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:11,074 INFO L93 Difference]: Finished difference Result 135 states and 144 transitions. [2018-01-24 12:09:11,074 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 12:09:11,074 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 31 [2018-01-24 12:09:11,075 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:11,076 INFO L225 Difference]: With dead ends: 135 [2018-01-24 12:09:11,076 INFO L226 Difference]: Without dead ends: 134 [2018-01-24 12:09:11,076 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2018-01-24 12:09:11,076 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-01-24 12:09:11,084 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 126. [2018-01-24 12:09:11,084 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-01-24 12:09:11,085 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 135 transitions. [2018-01-24 12:09:11,085 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 135 transitions. Word has length 31 [2018-01-24 12:09:11,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:11,085 INFO L432 AbstractCegarLoop]: Abstraction has 126 states and 135 transitions. [2018-01-24 12:09:11,086 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 12:09:11,086 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 135 transitions. [2018-01-24 12:09:11,086 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-24 12:09:11,086 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:11,086 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:11,086 INFO L371 AbstractCegarLoop]: === Iteration 21 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:11,087 INFO L82 PathProgramCache]: Analyzing trace with hash 660985098, now seen corresponding path program 1 times [2018-01-24 12:09:11,087 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:11,087 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:11,088 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:11,088 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:11,088 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:11,098 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:11,099 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:11,264 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:11,264 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:11,264 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 12:09:11,265 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 12:09:11,265 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 12:09:11,265 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-01-24 12:09:11,265 INFO L87 Difference]: Start difference. First operand 126 states and 135 transitions. Second operand 10 states. [2018-01-24 12:09:11,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:11,667 INFO L93 Difference]: Finished difference Result 134 states and 143 transitions. [2018-01-24 12:09:11,667 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-24 12:09:11,667 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 31 [2018-01-24 12:09:11,667 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:11,668 INFO L225 Difference]: With dead ends: 134 [2018-01-24 12:09:11,668 INFO L226 Difference]: Without dead ends: 133 [2018-01-24 12:09:11,668 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=73, Invalid=233, Unknown=0, NotChecked=0, Total=306 [2018-01-24 12:09:11,669 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-01-24 12:09:11,675 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 121. [2018-01-24 12:09:11,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121 states. [2018-01-24 12:09:11,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 129 transitions. [2018-01-24 12:09:11,677 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 129 transitions. Word has length 31 [2018-01-24 12:09:11,677 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:11,677 INFO L432 AbstractCegarLoop]: Abstraction has 121 states and 129 transitions. [2018-01-24 12:09:11,677 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 12:09:11,677 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 129 transitions. [2018-01-24 12:09:11,678 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 12:09:11,678 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:11,678 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:11,678 INFO L371 AbstractCegarLoop]: === Iteration 22 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:11,679 INFO L82 PathProgramCache]: Analyzing trace with hash -184722078, now seen corresponding path program 1 times [2018-01-24 12:09:11,679 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:11,679 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:11,680 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:11,680 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:11,680 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:11,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:11,695 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:11,892 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 12:09:11,893 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:09:11,893 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:09:11,902 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:11,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:11,952 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:09:12,251 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:09:12,260 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-01-24 12:09:12,261 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:12,283 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:09:12,284 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:09:12,285 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 12:09:12,285 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:12,294 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 12:09:12,295 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:25, output treesize:18 [2018-01-24 12:09:12,349 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:12,382 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:09:12,382 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 9] total 19 [2018-01-24 12:09:12,382 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-24 12:09:12,382 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-24 12:09:12,383 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=328, Unknown=0, NotChecked=0, Total=380 [2018-01-24 12:09:12,383 INFO L87 Difference]: Start difference. First operand 121 states and 129 transitions. Second operand 20 states. [2018-01-24 12:09:13,515 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:13,516 INFO L93 Difference]: Finished difference Result 183 states and 204 transitions. [2018-01-24 12:09:13,516 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-24 12:09:13,516 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 34 [2018-01-24 12:09:13,516 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:13,518 INFO L225 Difference]: With dead ends: 183 [2018-01-24 12:09:13,518 INFO L226 Difference]: Without dead ends: 180 [2018-01-24 12:09:13,518 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 54 GetRequests, 29 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 102 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=129, Invalid=573, Unknown=0, NotChecked=0, Total=702 [2018-01-24 12:09:13,519 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-01-24 12:09:13,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 113. [2018-01-24 12:09:13,529 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-01-24 12:09:13,530 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 119 transitions. [2018-01-24 12:09:13,530 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 119 transitions. Word has length 34 [2018-01-24 12:09:13,530 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:13,530 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 119 transitions. [2018-01-24 12:09:13,530 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-24 12:09:13,530 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 119 transitions. [2018-01-24 12:09:13,531 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-24 12:09:13,531 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:13,531 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:13,531 INFO L371 AbstractCegarLoop]: === Iteration 23 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:13,531 INFO L82 PathProgramCache]: Analyzing trace with hash 501156800, now seen corresponding path program 1 times [2018-01-24 12:09:13,532 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:13,532 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:13,532 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:13,533 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:13,533 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:13,543 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:13,544 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:13,619 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:13,619 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:13,619 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 12:09:13,619 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 12:09:13,620 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 12:09:13,620 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:09:13,620 INFO L87 Difference]: Start difference. First operand 113 states and 119 transitions. Second operand 7 states. [2018-01-24 12:09:13,792 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:13,792 INFO L93 Difference]: Finished difference Result 135 states and 145 transitions. [2018-01-24 12:09:13,793 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 12:09:13,793 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2018-01-24 12:09:13,793 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:13,794 INFO L225 Difference]: With dead ends: 135 [2018-01-24 12:09:13,794 INFO L226 Difference]: Without dead ends: 134 [2018-01-24 12:09:13,794 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2018-01-24 12:09:13,794 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-01-24 12:09:13,803 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 118. [2018-01-24 12:09:13,803 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-01-24 12:09:13,804 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 126 transitions. [2018-01-24 12:09:13,804 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 126 transitions. Word has length 33 [2018-01-24 12:09:13,805 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:13,805 INFO L432 AbstractCegarLoop]: Abstraction has 118 states and 126 transitions. [2018-01-24 12:09:13,805 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 12:09:13,805 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 126 transitions. [2018-01-24 12:09:13,805 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-24 12:09:13,805 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:13,806 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:13,806 INFO L371 AbstractCegarLoop]: === Iteration 24 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:13,806 INFO L82 PathProgramCache]: Analyzing trace with hash 501156801, now seen corresponding path program 1 times [2018-01-24 12:09:13,806 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:13,806 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:13,806 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:13,807 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:13,807 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:13,815 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:13,815 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:13,942 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:13,942 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:13,942 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-24 12:09:13,943 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 12:09:13,943 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 12:09:13,943 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-01-24 12:09:13,943 INFO L87 Difference]: Start difference. First operand 118 states and 126 transitions. Second operand 9 states. [2018-01-24 12:09:14,279 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:14,279 INFO L93 Difference]: Finished difference Result 160 states and 174 transitions. [2018-01-24 12:09:14,279 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-24 12:09:14,279 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 33 [2018-01-24 12:09:14,279 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:14,280 INFO L225 Difference]: With dead ends: 160 [2018-01-24 12:09:14,280 INFO L226 Difference]: Without dead ends: 159 [2018-01-24 12:09:14,280 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=186, Unknown=0, NotChecked=0, Total=240 [2018-01-24 12:09:14,281 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-01-24 12:09:14,287 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 132. [2018-01-24 12:09:14,287 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-01-24 12:09:14,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 142 transitions. [2018-01-24 12:09:14,287 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 142 transitions. Word has length 33 [2018-01-24 12:09:14,288 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:14,288 INFO L432 AbstractCegarLoop]: Abstraction has 132 states and 142 transitions. [2018-01-24 12:09:14,288 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 12:09:14,288 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 142 transitions. [2018-01-24 12:09:14,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-24 12:09:14,288 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:14,288 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:14,288 INFO L371 AbstractCegarLoop]: === Iteration 25 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:14,288 INFO L82 PathProgramCache]: Analyzing trace with hash 574362333, now seen corresponding path program 1 times [2018-01-24 12:09:14,289 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:14,289 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:14,289 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:14,289 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:14,290 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:14,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:14,296 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:14,490 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:14,490 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:14,490 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-24 12:09:14,490 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 12:09:14,491 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 12:09:14,491 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-01-24 12:09:14,491 INFO L87 Difference]: Start difference. First operand 132 states and 142 transitions. Second operand 8 states. [2018-01-24 12:09:14,680 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:14,680 INFO L93 Difference]: Finished difference Result 162 states and 174 transitions. [2018-01-24 12:09:14,681 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 12:09:14,681 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 35 [2018-01-24 12:09:14,681 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:14,682 INFO L225 Difference]: With dead ends: 162 [2018-01-24 12:09:14,682 INFO L226 Difference]: Without dead ends: 157 [2018-01-24 12:09:14,682 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-01-24 12:09:14,682 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-01-24 12:09:14,692 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 132. [2018-01-24 12:09:14,692 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-01-24 12:09:14,693 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 140 transitions. [2018-01-24 12:09:14,693 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 140 transitions. Word has length 35 [2018-01-24 12:09:14,693 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:14,694 INFO L432 AbstractCegarLoop]: Abstraction has 132 states and 140 transitions. [2018-01-24 12:09:14,694 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 12:09:14,694 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 140 transitions. [2018-01-24 12:09:14,694 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 12:09:14,694 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:14,695 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:14,695 INFO L371 AbstractCegarLoop]: === Iteration 26 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:14,695 INFO L82 PathProgramCache]: Analyzing trace with hash 655964540, now seen corresponding path program 1 times [2018-01-24 12:09:14,695 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:14,695 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:14,696 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:14,696 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:14,696 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:14,708 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:14,709 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:14,739 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:14,739 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:14,739 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 12:09:14,739 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 12:09:14,740 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 12:09:14,740 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:09:14,740 INFO L87 Difference]: Start difference. First operand 132 states and 140 transitions. Second operand 5 states. [2018-01-24 12:09:14,874 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:14,874 INFO L93 Difference]: Finished difference Result 132 states and 140 transitions. [2018-01-24 12:09:14,874 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 12:09:14,874 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 36 [2018-01-24 12:09:14,874 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:14,875 INFO L225 Difference]: With dead ends: 132 [2018-01-24 12:09:14,875 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 12:09:14,875 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:09:14,876 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 12:09:14,882 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 131. [2018-01-24 12:09:14,882 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-01-24 12:09:14,883 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 139 transitions. [2018-01-24 12:09:14,883 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 139 transitions. Word has length 36 [2018-01-24 12:09:14,883 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:14,883 INFO L432 AbstractCegarLoop]: Abstraction has 131 states and 139 transitions. [2018-01-24 12:09:14,883 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 12:09:14,883 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 139 transitions. [2018-01-24 12:09:14,884 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 12:09:14,884 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:14,884 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:14,884 INFO L371 AbstractCegarLoop]: === Iteration 27 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:14,884 INFO L82 PathProgramCache]: Analyzing trace with hash 655964541, now seen corresponding path program 1 times [2018-01-24 12:09:14,885 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:14,885 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:14,885 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:14,886 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:14,886 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:14,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:14,898 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:15,082 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:15,082 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:15,083 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 12:09:15,083 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 12:09:15,083 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 12:09:15,083 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-01-24 12:09:15,083 INFO L87 Difference]: Start difference. First operand 131 states and 139 transitions. Second operand 10 states. [2018-01-24 12:09:15,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:15,392 INFO L93 Difference]: Finished difference Result 154 states and 166 transitions. [2018-01-24 12:09:15,393 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-24 12:09:15,393 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 36 [2018-01-24 12:09:15,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:15,393 INFO L225 Difference]: With dead ends: 154 [2018-01-24 12:09:15,394 INFO L226 Difference]: Without dead ends: 153 [2018-01-24 12:09:15,394 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=57, Invalid=215, Unknown=0, NotChecked=0, Total=272 [2018-01-24 12:09:15,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-01-24 12:09:15,402 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 134. [2018-01-24 12:09:15,402 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-01-24 12:09:15,403 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 142 transitions. [2018-01-24 12:09:15,403 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 142 transitions. Word has length 36 [2018-01-24 12:09:15,403 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:15,403 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 142 transitions. [2018-01-24 12:09:15,403 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 12:09:15,404 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 142 transitions. [2018-01-24 12:09:15,404 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-24 12:09:15,404 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:15,404 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:15,404 INFO L371 AbstractCegarLoop]: === Iteration 28 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:15,405 INFO L82 PathProgramCache]: Analyzing trace with hash -747720392, now seen corresponding path program 1 times [2018-01-24 12:09:15,405 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:15,405 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:15,406 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:15,406 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:15,406 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:15,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:15,418 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:15,542 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:15,543 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:09:15,543 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:09:15,548 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:15,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:15,570 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:09:15,574 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 12:09:15,574 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:15,575 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:15,575 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-24 12:09:15,581 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:09:15,581 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:09:15,582 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-01-24 12:09:15,582 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:15,586 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:15,586 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15 [2018-01-24 12:09:15,598 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-24 12:09:15,600 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-24 12:09:15,600 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:15,601 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:15,605 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:15,605 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:27 [2018-01-24 12:09:15,653 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 57 [2018-01-24 12:09:15,657 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-24 12:09:15,657 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:15,661 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:15,665 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:15,665 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:68, output treesize:27 [2018-01-24 12:09:15,668 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-01-24 12:09:15,670 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 10 [2018-01-24 12:09:15,670 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:15,673 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:15,676 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 12:09:15,676 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:36, output treesize:15 [2018-01-24 12:09:15,690 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 12:09:15,710 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:09:15,710 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7] total 12 [2018-01-24 12:09:15,710 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-24 12:09:15,711 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-24 12:09:15,711 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=118, Unknown=0, NotChecked=0, Total=156 [2018-01-24 12:09:15,711 INFO L87 Difference]: Start difference. First operand 134 states and 142 transitions. Second operand 13 states. [2018-01-24 12:09:15,927 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:15,927 INFO L93 Difference]: Finished difference Result 134 states and 142 transitions. [2018-01-24 12:09:15,927 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 12:09:15,927 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 37 [2018-01-24 12:09:15,927 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:15,928 INFO L225 Difference]: With dead ends: 134 [2018-01-24 12:09:15,928 INFO L226 Difference]: Without dead ends: 133 [2018-01-24 12:09:15,928 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 31 SyntacticMatches, 2 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=76, Invalid=196, Unknown=0, NotChecked=0, Total=272 [2018-01-24 12:09:15,929 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-01-24 12:09:15,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 133. [2018-01-24 12:09:15,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-01-24 12:09:15,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 141 transitions. [2018-01-24 12:09:15,934 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 141 transitions. Word has length 37 [2018-01-24 12:09:15,934 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:15,934 INFO L432 AbstractCegarLoop]: Abstraction has 133 states and 141 transitions. [2018-01-24 12:09:15,935 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-24 12:09:15,935 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 141 transitions. [2018-01-24 12:09:15,935 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-24 12:09:15,935 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:15,935 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:15,935 INFO L371 AbstractCegarLoop]: === Iteration 29 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:15,935 INFO L82 PathProgramCache]: Analyzing trace with hash -747720391, now seen corresponding path program 1 times [2018-01-24 12:09:15,935 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:15,935 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:15,936 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:15,936 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:15,936 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:15,947 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:15,948 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:16,113 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:16,113 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:09:16,113 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:09:16,118 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:16,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:16,142 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:09:16,147 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 12:09:16,147 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:16,149 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:16,149 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-24 12:09:16,154 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 12:09:16,155 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:16,167 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:09:16,167 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:09:16,168 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 12:09:16,168 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:16,173 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:16,173 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:20, output treesize:13 [2018-01-24 12:09:16,181 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-24 12:09:16,183 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-24 12:09:16,183 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:16,184 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:16,191 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-24 12:09:16,192 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-24 12:09:16,192 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:16,194 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:16,198 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:16,198 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:36, output treesize:31 [2018-01-24 12:09:16,238 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 98 [2018-01-24 12:09:16,241 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-24 12:09:16,241 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:16,246 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:16,270 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 52 [2018-01-24 12:09:16,273 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-24 12:09:16,273 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:16,276 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:16,280 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:16,280 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:116, output treesize:34 [2018-01-24 12:09:16,310 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-01-24 12:09:16,312 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 10 [2018-01-24 12:09:16,313 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:16,316 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:16,323 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-01-24 12:09:16,327 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-01-24 12:09:16,327 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:16,338 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:16,353 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:16,353 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:52, output treesize:12 [2018-01-24 12:09:16,367 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:16,387 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:09:16,387 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9] total 14 [2018-01-24 12:09:16,388 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 12:09:16,388 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 12:09:16,388 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=40, Invalid=170, Unknown=0, NotChecked=0, Total=210 [2018-01-24 12:09:16,388 INFO L87 Difference]: Start difference. First operand 133 states and 141 transitions. Second operand 15 states. [2018-01-24 12:09:16,938 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:16,938 INFO L93 Difference]: Finished difference Result 268 states and 290 transitions. [2018-01-24 12:09:16,939 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-24 12:09:16,939 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 37 [2018-01-24 12:09:16,939 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:16,940 INFO L225 Difference]: With dead ends: 268 [2018-01-24 12:09:16,940 INFO L226 Difference]: Without dead ends: 143 [2018-01-24 12:09:16,941 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 56 GetRequests, 28 SyntacticMatches, 5 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 66 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=158, Invalid=442, Unknown=0, NotChecked=0, Total=600 [2018-01-24 12:09:16,941 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-01-24 12:09:16,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2018-01-24 12:09:16,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-01-24 12:09:16,956 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 151 transitions. [2018-01-24 12:09:16,956 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 151 transitions. Word has length 37 [2018-01-24 12:09:16,957 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:16,957 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 151 transitions. [2018-01-24 12:09:16,957 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 12:09:16,957 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 151 transitions. [2018-01-24 12:09:16,957 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-24 12:09:16,957 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:16,958 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:16,958 INFO L371 AbstractCegarLoop]: === Iteration 30 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:16,958 INFO L82 PathProgramCache]: Analyzing trace with hash 484884458, now seen corresponding path program 1 times [2018-01-24 12:09:16,958 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:16,958 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:16,959 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:16,959 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:16,959 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:16,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:16,972 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:17,454 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:17,455 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:17,455 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-01-24 12:09:17,456 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-24 12:09:17,456 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-24 12:09:17,456 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2018-01-24 12:09:17,457 INFO L87 Difference]: Start difference. First operand 143 states and 151 transitions. Second operand 17 states. [2018-01-24 12:09:18,643 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:18,643 INFO L93 Difference]: Finished difference Result 226 states and 243 transitions. [2018-01-24 12:09:18,644 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-24 12:09:18,644 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 40 [2018-01-24 12:09:18,644 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:18,645 INFO L225 Difference]: With dead ends: 226 [2018-01-24 12:09:18,645 INFO L226 Difference]: Without dead ends: 178 [2018-01-24 12:09:18,646 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 198 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=134, Invalid=988, Unknown=0, NotChecked=0, Total=1122 [2018-01-24 12:09:18,647 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-01-24 12:09:18,660 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 160. [2018-01-24 12:09:18,660 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-01-24 12:09:18,661 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 171 transitions. [2018-01-24 12:09:18,661 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 171 transitions. Word has length 40 [2018-01-24 12:09:18,662 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:18,662 INFO L432 AbstractCegarLoop]: Abstraction has 160 states and 171 transitions. [2018-01-24 12:09:18,662 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-24 12:09:18,662 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 171 transitions. [2018-01-24 12:09:18,663 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-24 12:09:18,663 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:18,663 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:18,663 INFO L371 AbstractCegarLoop]: === Iteration 31 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:18,663 INFO L82 PathProgramCache]: Analyzing trace with hash 1287024166, now seen corresponding path program 1 times [2018-01-24 12:09:18,663 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:18,663 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:18,664 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:18,664 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:18,664 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:18,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:18,677 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:18,944 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:18,944 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:18,944 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-24 12:09:18,944 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-24 12:09:18,944 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-24 12:09:18,945 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2018-01-24 12:09:18,945 INFO L87 Difference]: Start difference. First operand 160 states and 171 transitions. Second operand 12 states. [2018-01-24 12:09:19,905 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:19,905 INFO L93 Difference]: Finished difference Result 196 states and 214 transitions. [2018-01-24 12:09:19,906 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-24 12:09:19,906 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 40 [2018-01-24 12:09:19,906 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:19,907 INFO L225 Difference]: With dead ends: 196 [2018-01-24 12:09:19,907 INFO L226 Difference]: Without dead ends: 195 [2018-01-24 12:09:19,908 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=107, Invalid=399, Unknown=0, NotChecked=0, Total=506 [2018-01-24 12:09:19,908 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states. [2018-01-24 12:09:19,921 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 169. [2018-01-24 12:09:19,921 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-01-24 12:09:19,923 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 182 transitions. [2018-01-24 12:09:19,923 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 182 transitions. Word has length 40 [2018-01-24 12:09:19,923 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:19,923 INFO L432 AbstractCegarLoop]: Abstraction has 169 states and 182 transitions. [2018-01-24 12:09:19,923 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-24 12:09:19,923 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 182 transitions. [2018-01-24 12:09:19,924 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-24 12:09:19,924 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:19,924 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:19,924 INFO L371 AbstractCegarLoop]: === Iteration 32 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:19,924 INFO L82 PathProgramCache]: Analyzing trace with hash -907645030, now seen corresponding path program 1 times [2018-01-24 12:09:19,924 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:19,924 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:19,925 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:19,925 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:19,925 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:19,931 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:19,932 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:20,073 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:20,073 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:20,073 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-24 12:09:20,074 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 12:09:20,074 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 12:09:20,074 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-01-24 12:09:20,074 INFO L87 Difference]: Start difference. First operand 169 states and 182 transitions. Second operand 8 states. [2018-01-24 12:09:20,536 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:20,537 INFO L93 Difference]: Finished difference Result 186 states and 200 transitions. [2018-01-24 12:09:20,537 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 12:09:20,537 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 44 [2018-01-24 12:09:20,537 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:20,539 INFO L225 Difference]: With dead ends: 186 [2018-01-24 12:09:20,539 INFO L226 Difference]: Without dead ends: 185 [2018-01-24 12:09:20,539 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-01-24 12:09:20,540 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2018-01-24 12:09:20,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 178. [2018-01-24 12:09:20,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-01-24 12:09:20,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 196 transitions. [2018-01-24 12:09:20,556 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 196 transitions. Word has length 44 [2018-01-24 12:09:20,556 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:20,556 INFO L432 AbstractCegarLoop]: Abstraction has 178 states and 196 transitions. [2018-01-24 12:09:20,557 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 12:09:20,557 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 196 transitions. [2018-01-24 12:09:20,557 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-24 12:09:20,557 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:20,558 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:20,558 INFO L371 AbstractCegarLoop]: === Iteration 33 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:20,558 INFO L82 PathProgramCache]: Analyzing trace with hash -907645029, now seen corresponding path program 1 times [2018-01-24 12:09:20,558 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:20,558 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:20,559 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:20,559 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:20,559 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:20,568 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:20,569 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:20,605 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:20,606 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:20,606 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 12:09:20,606 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 12:09:20,607 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 12:09:20,607 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:09:20,607 INFO L87 Difference]: Start difference. First operand 178 states and 196 transitions. Second operand 6 states. [2018-01-24 12:09:20,825 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:20,825 INFO L93 Difference]: Finished difference Result 185 states and 204 transitions. [2018-01-24 12:09:20,825 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 12:09:20,825 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 44 [2018-01-24 12:09:20,826 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:20,826 INFO L225 Difference]: With dead ends: 185 [2018-01-24 12:09:20,827 INFO L226 Difference]: Without dead ends: 184 [2018-01-24 12:09:20,827 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-24 12:09:20,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-01-24 12:09:20,839 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 180. [2018-01-24 12:09:20,840 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-01-24 12:09:20,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 199 transitions. [2018-01-24 12:09:20,841 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 199 transitions. Word has length 44 [2018-01-24 12:09:20,841 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:20,841 INFO L432 AbstractCegarLoop]: Abstraction has 180 states and 199 transitions. [2018-01-24 12:09:20,841 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 12:09:20,842 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 199 transitions. [2018-01-24 12:09:20,842 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-24 12:09:20,842 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:20,842 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:20,843 INFO L371 AbstractCegarLoop]: === Iteration 34 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:20,843 INFO L82 PathProgramCache]: Analyzing trace with hash 563904760, now seen corresponding path program 1 times [2018-01-24 12:09:20,843 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:20,843 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:20,844 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:20,844 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:20,844 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:20,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:20,860 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:21,015 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:21,016 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:21,016 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 12:09:21,016 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 12:09:21,016 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 12:09:21,016 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-01-24 12:09:21,017 INFO L87 Difference]: Start difference. First operand 180 states and 199 transitions. Second operand 10 states. [2018-01-24 12:09:21,210 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:21,211 INFO L93 Difference]: Finished difference Result 187 states and 202 transitions. [2018-01-24 12:09:21,211 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-24 12:09:21,211 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 43 [2018-01-24 12:09:21,211 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:21,212 INFO L225 Difference]: With dead ends: 187 [2018-01-24 12:09:21,212 INFO L226 Difference]: Without dead ends: 186 [2018-01-24 12:09:21,212 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=212, Unknown=0, NotChecked=0, Total=272 [2018-01-24 12:09:21,212 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states. [2018-01-24 12:09:21,224 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 170. [2018-01-24 12:09:21,224 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states. [2018-01-24 12:09:21,225 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 187 transitions. [2018-01-24 12:09:21,225 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 187 transitions. Word has length 43 [2018-01-24 12:09:21,226 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:21,226 INFO L432 AbstractCegarLoop]: Abstraction has 170 states and 187 transitions. [2018-01-24 12:09:21,226 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 12:09:21,226 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 187 transitions. [2018-01-24 12:09:21,227 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-24 12:09:21,227 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:21,227 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:21,227 INFO L371 AbstractCegarLoop]: === Iteration 35 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:21,227 INFO L82 PathProgramCache]: Analyzing trace with hash -368510437, now seen corresponding path program 1 times [2018-01-24 12:09:21,227 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:21,227 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:21,228 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:21,228 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:21,228 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:21,237 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:21,238 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:21,428 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:21,428 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:21,428 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-24 12:09:21,429 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-24 12:09:21,429 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-24 12:09:21,429 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-01-24 12:09:21,429 INFO L87 Difference]: Start difference. First operand 170 states and 187 transitions. Second operand 12 states. [2018-01-24 12:09:21,695 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:21,695 INFO L93 Difference]: Finished difference Result 205 states and 229 transitions. [2018-01-24 12:09:21,696 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-24 12:09:21,696 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 46 [2018-01-24 12:09:21,696 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:21,697 INFO L225 Difference]: With dead ends: 205 [2018-01-24 12:09:21,697 INFO L226 Difference]: Without dead ends: 204 [2018-01-24 12:09:21,697 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=52, Invalid=220, Unknown=0, NotChecked=0, Total=272 [2018-01-24 12:09:21,697 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 204 states. [2018-01-24 12:09:21,707 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 204 to 196. [2018-01-24 12:09:21,708 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 196 states. [2018-01-24 12:09:21,708 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 220 transitions. [2018-01-24 12:09:21,708 INFO L78 Accepts]: Start accepts. Automaton has 196 states and 220 transitions. Word has length 46 [2018-01-24 12:09:21,709 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:21,709 INFO L432 AbstractCegarLoop]: Abstraction has 196 states and 220 transitions. [2018-01-24 12:09:21,709 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-24 12:09:21,709 INFO L276 IsEmpty]: Start isEmpty. Operand 196 states and 220 transitions. [2018-01-24 12:09:21,709 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-24 12:09:21,709 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:21,709 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:21,709 INFO L371 AbstractCegarLoop]: === Iteration 36 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:21,710 INFO L82 PathProgramCache]: Analyzing trace with hash 221499877, now seen corresponding path program 1 times [2018-01-24 12:09:21,710 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:21,710 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:21,710 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:21,710 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:21,710 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:21,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:21,722 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:22,093 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:22,093 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:22,094 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-01-24 12:09:22,094 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-24 12:09:22,094 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-24 12:09:22,094 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=269, Unknown=0, NotChecked=0, Total=306 [2018-01-24 12:09:22,095 INFO L87 Difference]: Start difference. First operand 196 states and 220 transitions. Second operand 18 states. [2018-01-24 12:09:23,146 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:23,147 INFO L93 Difference]: Finished difference Result 225 states and 254 transitions. [2018-01-24 12:09:23,147 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-24 12:09:23,147 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 47 [2018-01-24 12:09:23,147 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:23,149 INFO L225 Difference]: With dead ends: 225 [2018-01-24 12:09:23,149 INFO L226 Difference]: Without dead ends: 222 [2018-01-24 12:09:23,149 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 200 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=136, Invalid=1054, Unknown=0, NotChecked=0, Total=1190 [2018-01-24 12:09:23,150 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2018-01-24 12:09:23,163 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 201. [2018-01-24 12:09:23,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 201 states. [2018-01-24 12:09:23,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201 states to 201 states and 227 transitions. [2018-01-24 12:09:23,165 INFO L78 Accepts]: Start accepts. Automaton has 201 states and 227 transitions. Word has length 47 [2018-01-24 12:09:23,165 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:23,165 INFO L432 AbstractCegarLoop]: Abstraction has 201 states and 227 transitions. [2018-01-24 12:09:23,165 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-24 12:09:23,166 INFO L276 IsEmpty]: Start isEmpty. Operand 201 states and 227 transitions. [2018-01-24 12:09:23,166 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-24 12:09:23,166 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:23,166 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:23,167 INFO L371 AbstractCegarLoop]: === Iteration 37 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:23,167 INFO L82 PathProgramCache]: Analyzing trace with hash 221499878, now seen corresponding path program 1 times [2018-01-24 12:09:23,167 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:23,167 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:23,168 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:23,168 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:23,168 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:23,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:23,181 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:23,685 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:23,685 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:23,685 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2018-01-24 12:09:23,685 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-24 12:09:23,686 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-24 12:09:23,686 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=303, Unknown=0, NotChecked=0, Total=342 [2018-01-24 12:09:23,686 INFO L87 Difference]: Start difference. First operand 201 states and 227 transitions. Second operand 19 states. [2018-01-24 12:09:24,615 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:24,616 INFO L93 Difference]: Finished difference Result 242 states and 273 transitions. [2018-01-24 12:09:24,616 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-24 12:09:24,616 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 47 [2018-01-24 12:09:24,616 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:24,617 INFO L225 Difference]: With dead ends: 242 [2018-01-24 12:09:24,617 INFO L226 Difference]: Without dead ends: 239 [2018-01-24 12:09:24,618 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 247 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=150, Invalid=1256, Unknown=0, NotChecked=0, Total=1406 [2018-01-24 12:09:24,618 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239 states. [2018-01-24 12:09:24,629 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239 to 218. [2018-01-24 12:09:24,629 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 218 states. [2018-01-24 12:09:24,630 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 218 states to 218 states and 249 transitions. [2018-01-24 12:09:24,630 INFO L78 Accepts]: Start accepts. Automaton has 218 states and 249 transitions. Word has length 47 [2018-01-24 12:09:24,630 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:24,630 INFO L432 AbstractCegarLoop]: Abstraction has 218 states and 249 transitions. [2018-01-24 12:09:24,630 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-24 12:09:24,630 INFO L276 IsEmpty]: Start isEmpty. Operand 218 states and 249 transitions. [2018-01-24 12:09:24,631 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-24 12:09:24,631 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:24,631 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:24,631 INFO L371 AbstractCegarLoop]: === Iteration 38 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:24,632 INFO L82 PathProgramCache]: Analyzing trace with hash 1633162428, now seen corresponding path program 1 times [2018-01-24 12:09:24,632 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:24,632 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:24,632 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:24,633 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:24,633 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:24,643 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:24,644 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:24,678 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:24,678 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:24,678 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 12:09:24,679 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 12:09:24,679 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 12:09:24,679 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:09:24,679 INFO L87 Difference]: Start difference. First operand 218 states and 249 transitions. Second operand 5 states. [2018-01-24 12:09:24,744 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:24,744 INFO L93 Difference]: Finished difference Result 223 states and 255 transitions. [2018-01-24 12:09:24,744 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 12:09:24,745 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 50 [2018-01-24 12:09:24,745 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:24,746 INFO L225 Difference]: With dead ends: 223 [2018-01-24 12:09:24,746 INFO L226 Difference]: Without dead ends: 222 [2018-01-24 12:09:24,746 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:09:24,746 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2018-01-24 12:09:24,762 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 217. [2018-01-24 12:09:24,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 217 states. [2018-01-24 12:09:24,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 217 states to 217 states and 247 transitions. [2018-01-24 12:09:24,764 INFO L78 Accepts]: Start accepts. Automaton has 217 states and 247 transitions. Word has length 50 [2018-01-24 12:09:24,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:24,765 INFO L432 AbstractCegarLoop]: Abstraction has 217 states and 247 transitions. [2018-01-24 12:09:24,765 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 12:09:24,765 INFO L276 IsEmpty]: Start isEmpty. Operand 217 states and 247 transitions. [2018-01-24 12:09:24,766 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-24 12:09:24,766 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:24,766 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:24,766 INFO L371 AbstractCegarLoop]: === Iteration 39 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:24,766 INFO L82 PathProgramCache]: Analyzing trace with hash 1633162429, now seen corresponding path program 1 times [2018-01-24 12:09:24,766 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:24,766 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:24,767 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:24,767 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:24,767 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:24,778 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:24,779 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:24,840 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:24,840 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:24,840 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 12:09:24,841 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 12:09:24,841 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 12:09:24,841 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 12:09:24,841 INFO L87 Difference]: Start difference. First operand 217 states and 247 transitions. Second operand 5 states. [2018-01-24 12:09:24,915 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:24,915 INFO L93 Difference]: Finished difference Result 222 states and 253 transitions. [2018-01-24 12:09:24,916 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 12:09:24,916 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 50 [2018-01-24 12:09:24,916 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:24,917 INFO L225 Difference]: With dead ends: 222 [2018-01-24 12:09:24,917 INFO L226 Difference]: Without dead ends: 221 [2018-01-24 12:09:24,917 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:09:24,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states. [2018-01-24 12:09:24,927 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 216. [2018-01-24 12:09:24,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 216 states. [2018-01-24 12:09:24,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 216 states to 216 states and 245 transitions. [2018-01-24 12:09:24,928 INFO L78 Accepts]: Start accepts. Automaton has 216 states and 245 transitions. Word has length 50 [2018-01-24 12:09:24,928 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:24,928 INFO L432 AbstractCegarLoop]: Abstraction has 216 states and 245 transitions. [2018-01-24 12:09:24,928 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 12:09:24,928 INFO L276 IsEmpty]: Start isEmpty. Operand 216 states and 245 transitions. [2018-01-24 12:09:24,929 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-24 12:09:24,929 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:24,929 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:24,929 INFO L371 AbstractCegarLoop]: === Iteration 40 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:24,930 INFO L82 PathProgramCache]: Analyzing trace with hash -420728712, now seen corresponding path program 1 times [2018-01-24 12:09:24,930 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:24,930 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:24,931 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:24,931 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:24,931 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:24,941 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:24,942 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:25,456 WARN L146 SmtUtils]: Spent 227ms on a formula simplification. DAG size of input: 25 DAG size of output 24 [2018-01-24 12:09:25,702 WARN L146 SmtUtils]: Spent 215ms on a formula simplification. DAG size of input: 33 DAG size of output 32 [2018-01-24 12:09:26,076 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:26,076 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:09:26,076 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:09:26,083 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:26,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:26,115 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:09:26,118 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 12:09:26,118 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:26,121 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:26,121 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 12:09:26,146 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-24 12:09:26,148 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 12:09:26,149 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:26,151 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:26,162 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-24 12:09:26,163 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 12:09:26,164 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:26,174 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:26,201 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:26,201 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:31, output treesize:23 [2018-01-24 12:09:26,492 WARN L1029 $PredicateComparison]: unable to prove that (exists ((|append_#t~ret17.base| Int) (append_~node~12.base Int) (|append_#t~ret17.offset| Int)) (and (= (let ((.cse0 (store |c_old(#memory_$Pointer$.offset)| append_~node~12.base (store (store (select |c_old(#memory_$Pointer$.offset)| append_~node~12.base) 4 (select (select |c_old(#memory_$Pointer$.offset)| |c_append_#in~pointerToList.base|) |c_append_#in~pointerToList.offset|)) 0 |append_#t~ret17.offset|)))) (store .cse0 |c_append_#in~pointerToList.base| (store (select .cse0 |c_append_#in~pointerToList.base|) |c_append_#in~pointerToList.offset| 0))) |c_#memory_$Pointer$.offset|) (= 0 (select |c_old(#valid)| append_~node~12.base)) (= |c_#memory_$Pointer$.base| (let ((.cse1 (store |c_old(#memory_$Pointer$.base)| append_~node~12.base (store (store (select |c_old(#memory_$Pointer$.base)| append_~node~12.base) 4 (select (select |c_old(#memory_$Pointer$.base)| |c_append_#in~pointerToList.base|) |c_append_#in~pointerToList.offset|)) 0 |append_#t~ret17.base|)))) (store .cse1 |c_append_#in~pointerToList.base| (store (select .cse1 |c_append_#in~pointerToList.base|) |c_append_#in~pointerToList.offset| append_~node~12.base)))))) is different from true [2018-01-24 12:09:26,575 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:09:26,576 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:09:26,577 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 12:09:26,577 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:26,599 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 38 [2018-01-24 12:09:26,601 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-01-24 12:09:26,605 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 19 [2018-01-24 12:09:26,605 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:26,609 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:26,623 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 12:09:26,626 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 34 [2018-01-24 12:09:26,628 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-01-24 12:09:26,629 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:26,635 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:26,640 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:26,655 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 38 [2018-01-24 12:09:26,658 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-01-24 12:09:26,661 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 19 [2018-01-24 12:09:26,662 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:26,665 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:26,675 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 34 [2018-01-24 12:09:26,678 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-01-24 12:09:26,678 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:26,682 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:26,686 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:26,695 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 12:09:26,695 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 6 variables, input treesize:110, output treesize:44 [2018-01-24 12:09:27,093 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:09:27,094 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 12:09:27,099 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 1 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 73 [2018-01-24 12:09:27,103 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 62 treesize of output 54 [2018-01-24 12:09:27,104 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:27,109 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:27,121 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 12:09:27,122 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 69 [2018-01-24 12:09:27,125 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 74 [2018-01-24 12:09:27,125 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:27,132 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:27,140 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 12:09:27,140 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:94, output treesize:64 [2018-01-24 12:09:27,195 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 30 [2018-01-24 12:09:27,197 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 17 [2018-01-24 12:09:27,197 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:27,201 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 12:09:27,202 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-01-24 12:09:27,202 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:27,204 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:27,211 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2018-01-24 12:09:27,212 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 12:09:27,213 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 5 [2018-01-24 12:09:27,213 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:27,217 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-01-24 12:09:27,217 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:27,218 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:27,221 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:27,221 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:75, output treesize:7 [2018-01-24 12:09:27,259 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:27,279 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:09:27,279 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 21] total 37 [2018-01-24 12:09:27,279 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-01-24 12:09:27,280 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-01-24 12:09:27,280 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=131, Invalid=1124, Unknown=9, NotChecked=68, Total=1332 [2018-01-24 12:09:27,280 INFO L87 Difference]: Start difference. First operand 216 states and 245 transitions. Second operand 37 states. [2018-01-24 12:09:28,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:28,713 INFO L93 Difference]: Finished difference Result 284 states and 319 transitions. [2018-01-24 12:09:28,713 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-24 12:09:28,713 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 51 [2018-01-24 12:09:28,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:28,715 INFO L225 Difference]: With dead ends: 284 [2018-01-24 12:09:28,715 INFO L226 Difference]: Without dead ends: 237 [2018-01-24 12:09:28,715 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 34 SyntacticMatches, 6 SemanticMatches, 53 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 680 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=307, Invalid=2550, Unknown=9, NotChecked=104, Total=2970 [2018-01-24 12:09:28,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 237 states. [2018-01-24 12:09:28,732 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 237 to 224. [2018-01-24 12:09:28,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 224 states. [2018-01-24 12:09:28,734 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 224 states to 224 states and 253 transitions. [2018-01-24 12:09:28,734 INFO L78 Accepts]: Start accepts. Automaton has 224 states and 253 transitions. Word has length 51 [2018-01-24 12:09:28,735 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:28,735 INFO L432 AbstractCegarLoop]: Abstraction has 224 states and 253 transitions. [2018-01-24 12:09:28,735 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-01-24 12:09:28,735 INFO L276 IsEmpty]: Start isEmpty. Operand 224 states and 253 transitions. [2018-01-24 12:09:28,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-24 12:09:28,736 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:28,736 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:28,736 INFO L371 AbstractCegarLoop]: === Iteration 41 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:28,736 INFO L82 PathProgramCache]: Analyzing trace with hash 1806033505, now seen corresponding path program 1 times [2018-01-24 12:09:28,737 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:28,737 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:28,737 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:28,738 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:28,738 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:28,748 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:28,749 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:28,841 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:28,842 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:28,842 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 12:09:28,842 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 12:09:28,842 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 12:09:28,842 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-01-24 12:09:28,842 INFO L87 Difference]: Start difference. First operand 224 states and 253 transitions. Second operand 6 states. [2018-01-24 12:09:29,102 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:29,102 INFO L93 Difference]: Finished difference Result 225 states and 253 transitions. [2018-01-24 12:09:29,102 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 12:09:29,102 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 52 [2018-01-24 12:09:29,102 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:29,103 INFO L225 Difference]: With dead ends: 225 [2018-01-24 12:09:29,103 INFO L226 Difference]: Without dead ends: 224 [2018-01-24 12:09:29,103 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-01-24 12:09:29,104 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2018-01-24 12:09:29,115 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 221. [2018-01-24 12:09:29,115 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 221 states. [2018-01-24 12:09:29,116 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221 states to 221 states and 248 transitions. [2018-01-24 12:09:29,116 INFO L78 Accepts]: Start accepts. Automaton has 221 states and 248 transitions. Word has length 52 [2018-01-24 12:09:29,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:29,116 INFO L432 AbstractCegarLoop]: Abstraction has 221 states and 248 transitions. [2018-01-24 12:09:29,117 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 12:09:29,117 INFO L276 IsEmpty]: Start isEmpty. Operand 221 states and 248 transitions. [2018-01-24 12:09:29,118 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-01-24 12:09:29,118 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:29,118 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:29,118 INFO L371 AbstractCegarLoop]: === Iteration 42 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:29,118 INFO L82 PathProgramCache]: Analyzing trace with hash -594351723, now seen corresponding path program 1 times [2018-01-24 12:09:29,118 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:29,118 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:29,119 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:29,119 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:29,119 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:29,130 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:29,131 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:29,601 WARN L146 SmtUtils]: Spent 204ms on a formula simplification. DAG size of input: 24 DAG size of output 23 [2018-01-24 12:09:29,798 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:29,798 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:09:29,829 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:09:29,834 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:29,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:29,862 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:09:29,917 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-24 12:09:29,919 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 12:09:29,919 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:29,920 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:29,925 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:29,925 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:27, output treesize:28 [2018-01-24 12:09:29,973 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 8 [2018-01-24 12:09:29,973 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:29,977 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 12:09:29,977 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:29, output treesize:20 [2018-01-24 12:09:30,019 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 33 [2018-01-24 12:09:30,020 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 22 [2018-01-24 12:09:30,021 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:30,025 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:30,029 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:30,029 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:46, output treesize:27 [2018-01-24 12:09:30,079 WARN L1029 $PredicateComparison]: unable to prove that (exists ((|main_#t~mem25.base| Int) (|main_~#list~13.base| Int)) (let ((.cse0 (store |c_old(#valid)| |main_~#list~13.base| 1))) (and (= (select .cse0 |main_#t~mem25.base|) 0) (not (= 0 |main_#t~mem25.base|)) (= |c_#valid| (store (store .cse0 |main_#t~mem25.base| 0) |main_~#list~13.base| 0)) (= (select |c_old(#valid)| |main_~#list~13.base|) 0)))) is different from true [2018-01-24 12:09:30,104 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:30,124 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:09:30,124 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 21 [2018-01-24 12:09:30,124 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-24 12:09:30,124 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-24 12:09:30,125 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=56, Invalid=365, Unknown=3, NotChecked=38, Total=462 [2018-01-24 12:09:30,125 INFO L87 Difference]: Start difference. First operand 221 states and 248 transitions. Second operand 22 states. [2018-01-24 12:09:42,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:42,802 INFO L93 Difference]: Finished difference Result 233 states and 262 transitions. [2018-01-24 12:09:42,803 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-24 12:09:42,803 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 53 [2018-01-24 12:09:42,803 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:42,804 INFO L225 Difference]: With dead ends: 233 [2018-01-24 12:09:42,804 INFO L226 Difference]: Without dead ends: 207 [2018-01-24 12:09:42,805 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 83 GetRequests, 49 SyntacticMatches, 4 SemanticMatches, 30 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 206 ImplicationChecksByTransitivity, 4.9s TimeCoverageRelationStatistics Valid=124, Invalid=804, Unknown=6, NotChecked=58, Total=992 [2018-01-24 12:09:42,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2018-01-24 12:09:42,817 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 200. [2018-01-24 12:09:42,818 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 200 states. [2018-01-24 12:09:42,819 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 200 states to 200 states and 226 transitions. [2018-01-24 12:09:42,819 INFO L78 Accepts]: Start accepts. Automaton has 200 states and 226 transitions. Word has length 53 [2018-01-24 12:09:42,819 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:42,819 INFO L432 AbstractCegarLoop]: Abstraction has 200 states and 226 transitions. [2018-01-24 12:09:42,819 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-24 12:09:42,819 INFO L276 IsEmpty]: Start isEmpty. Operand 200 states and 226 transitions. [2018-01-24 12:09:42,820 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-01-24 12:09:42,820 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:42,820 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:42,821 INFO L371 AbstractCegarLoop]: === Iteration 43 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:42,821 INFO L82 PathProgramCache]: Analyzing trace with hash 419691716, now seen corresponding path program 1 times [2018-01-24 12:09:42,821 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:42,821 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:42,822 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:42,822 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:42,822 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:42,837 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:42,838 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:43,288 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:43,288 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:43,288 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [19] imperfect sequences [] total 19 [2018-01-24 12:09:43,288 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-24 12:09:43,289 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-24 12:09:43,289 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=329, Unknown=0, NotChecked=0, Total=380 [2018-01-24 12:09:43,289 INFO L87 Difference]: Start difference. First operand 200 states and 226 transitions. Second operand 20 states. [2018-01-24 12:09:44,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:44,019 INFO L93 Difference]: Finished difference Result 237 states and 273 transitions. [2018-01-24 12:09:44,019 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-24 12:09:44,019 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 53 [2018-01-24 12:09:44,019 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:44,020 INFO L225 Difference]: With dead ends: 237 [2018-01-24 12:09:44,020 INFO L226 Difference]: Without dead ends: 236 [2018-01-24 12:09:44,021 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 37 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 230 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=141, Invalid=981, Unknown=0, NotChecked=0, Total=1122 [2018-01-24 12:09:44,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 236 states. [2018-01-24 12:09:44,033 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 236 to 221. [2018-01-24 12:09:44,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 221 states. [2018-01-24 12:09:44,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 221 states to 221 states and 254 transitions. [2018-01-24 12:09:44,034 INFO L78 Accepts]: Start accepts. Automaton has 221 states and 254 transitions. Word has length 53 [2018-01-24 12:09:44,034 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:44,034 INFO L432 AbstractCegarLoop]: Abstraction has 221 states and 254 transitions. [2018-01-24 12:09:44,034 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-24 12:09:44,034 INFO L276 IsEmpty]: Start isEmpty. Operand 221 states and 254 transitions. [2018-01-24 12:09:44,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 55 [2018-01-24 12:09:44,035 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:44,035 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:44,036 INFO L371 AbstractCegarLoop]: === Iteration 44 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:44,036 INFO L82 PathProgramCache]: Analyzing trace with hash 125541378, now seen corresponding path program 1 times [2018-01-24 12:09:44,036 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:44,036 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:44,036 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:44,036 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:44,036 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:44,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:44,047 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:44,450 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:44,450 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 12:09:44,450 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2018-01-24 12:09:44,450 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-24 12:09:44,450 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-24 12:09:44,451 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=48, Invalid=294, Unknown=0, NotChecked=0, Total=342 [2018-01-24 12:09:44,451 INFO L87 Difference]: Start difference. First operand 221 states and 254 transitions. Second operand 19 states. [2018-01-24 12:09:45,029 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 12:09:45,029 INFO L93 Difference]: Finished difference Result 236 states and 271 transitions. [2018-01-24 12:09:45,029 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-24 12:09:45,029 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 54 [2018-01-24 12:09:45,029 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 12:09:45,030 INFO L225 Difference]: With dead ends: 236 [2018-01-24 12:09:45,030 INFO L226 Difference]: Without dead ends: 235 [2018-01-24 12:09:45,031 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 149 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=116, Invalid=814, Unknown=0, NotChecked=0, Total=930 [2018-01-24 12:09:45,031 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 235 states. [2018-01-24 12:09:45,044 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 235 to 215. [2018-01-24 12:09:45,044 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 215 states. [2018-01-24 12:09:45,045 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 215 states to 215 states and 248 transitions. [2018-01-24 12:09:45,045 INFO L78 Accepts]: Start accepts. Automaton has 215 states and 248 transitions. Word has length 54 [2018-01-24 12:09:45,045 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 12:09:45,045 INFO L432 AbstractCegarLoop]: Abstraction has 215 states and 248 transitions. [2018-01-24 12:09:45,045 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-24 12:09:45,045 INFO L276 IsEmpty]: Start isEmpty. Operand 215 states and 248 transitions. [2018-01-24 12:09:45,046 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-01-24 12:09:45,046 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 12:09:45,046 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 12:09:45,047 INFO L371 AbstractCegarLoop]: === Iteration 45 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 12:09:45,047 INFO L82 PathProgramCache]: Analyzing trace with hash -688882574, now seen corresponding path program 1 times [2018-01-24 12:09:45,047 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-24 12:09:45,047 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-24 12:09:45,047 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:45,048 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:45,048 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 12:09:45,060 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:45,061 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 12:09:45,418 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 14 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 12:09:45,418 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 12:09:45,418 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 12:09:45,423 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 12:09:45,464 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 12:09:45,470 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 12:09:45,678 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-24 12:09:45,680 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 12:09:45,681 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:45,683 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:45,706 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-24 12:09:45,708 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 12:09:45,709 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:45,712 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:45,719 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:45,719 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:34, output treesize:26 [2018-01-24 12:09:45,764 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 31 [2018-01-24 12:09:45,768 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 12:09:45,768 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:45,789 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 22 [2018-01-24 12:09:45,790 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 2 xjuncts. [2018-01-24 12:09:45,801 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-01-24 12:09:45,832 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 19 treesize of output 31 [2018-01-24 12:09:45,838 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 12:09:45,839 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:45,864 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 2 case distinctions, treesize of input 17 treesize of output 22 [2018-01-24 12:09:45,864 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 2 xjuncts. [2018-01-24 12:09:45,900 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-01-24 12:09:45,921 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-01-24 12:09:45,921 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:42, output treesize:115 [2018-01-24 12:09:45,981 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:09:45,982 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 12:09:45,983 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 42 [2018-01-24 12:09:45,983 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:46,039 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:46,039 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:77, output treesize:42 [2018-01-24 12:09:46,173 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-01-24 12:09:46,175 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 3 [2018-01-24 12:09:46,175 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:46,182 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 33 treesize of output 27 [2018-01-24 12:09:46,182 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 12:09:46,197 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 12:09:46,203 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-01-24 12:09:46,205 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-01-24 12:09:46,206 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 12:09:46,210 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-01-24 12:09:46,210 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-01-24 12:09:46,211 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:46,214 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 12:09:46,215 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 3 variables, input treesize:69, output treesize:7 [2018-01-24 12:09:46,242 INFO L134 CoverageAnalysis]: Checked inductivity of 20 backedges. 6 proven. 14 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 12:09:46,262 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-24 12:09:46,262 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 27 [2018-01-24 12:09:46,263 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-24 12:09:46,263 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-24 12:09:46,263 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=76, Invalid=624, Unknown=2, NotChecked=0, Total=702 [2018-01-24 12:09:46,263 INFO L87 Difference]: Start difference. First operand 215 states and 248 transitions. Second operand 27 states. Received shutdown request... [2018-01-24 12:09:46,885 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-24 12:09:46,885 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-24 12:09:46,891 WARN L187 ceAbstractionStarter]: Timeout [2018-01-24 12:09:46,891 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.01 12:09:46 BoogieIcfgContainer [2018-01-24 12:09:46,891 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-24 12:09:46,892 INFO L168 Benchmark]: Toolchain (without parser) took 43017.85 ms. Allocated memory was 296.2 MB in the beginning and 779.1 MB in the end (delta: 482.9 MB). Free memory was 256.3 MB in the beginning and 524.5 MB in the end (delta: -268.3 MB). Peak memory consumption was 214.6 MB. Max. memory is 5.3 GB. [2018-01-24 12:09:46,893 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 296.2 MB. Free memory is still 262.2 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-24 12:09:46,893 INFO L168 Benchmark]: CACSL2BoogieTranslator took 229.51 ms. Allocated memory is still 296.2 MB. Free memory was 255.3 MB in the beginning and 244.2 MB in the end (delta: 11.1 MB). Peak memory consumption was 11.1 MB. Max. memory is 5.3 GB. [2018-01-24 12:09:46,893 INFO L168 Benchmark]: Boogie Preprocessor took 40.76 ms. Allocated memory is still 296.2 MB. Free memory was 244.2 MB in the beginning and 243.2 MB in the end (delta: 996.1 kB). Peak memory consumption was 996.1 kB. Max. memory is 5.3 GB. [2018-01-24 12:09:46,894 INFO L168 Benchmark]: RCFGBuilder took 484.48 ms. Allocated memory is still 296.2 MB. Free memory was 242.2 MB in the beginning and 211.6 MB in the end (delta: 30.6 MB). Peak memory consumption was 30.6 MB. Max. memory is 5.3 GB. [2018-01-24 12:09:46,894 INFO L168 Benchmark]: TraceAbstraction took 42254.79 ms. Allocated memory was 296.2 MB in the beginning and 779.1 MB in the end (delta: 482.9 MB). Free memory was 211.6 MB in the beginning and 524.5 MB in the end (delta: -312.9 MB). Peak memory consumption was 169.9 MB. Max. memory is 5.3 GB. [2018-01-24 12:09:46,895 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 296.2 MB. Free memory is still 262.2 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 229.51 ms. Allocated memory is still 296.2 MB. Free memory was 255.3 MB in the beginning and 244.2 MB in the end (delta: 11.1 MB). Peak memory consumption was 11.1 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 40.76 ms. Allocated memory is still 296.2 MB. Free memory was 244.2 MB in the beginning and 243.2 MB in the end (delta: 996.1 kB). Peak memory consumption was 996.1 kB. Max. memory is 5.3 GB. * RCFGBuilder took 484.48 ms. Allocated memory is still 296.2 MB. Free memory was 242.2 MB in the beginning and 211.6 MB in the end (delta: 30.6 MB). Peak memory consumption was 30.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 42254.79 ms. Allocated memory was 296.2 MB in the beginning and 779.1 MB in the end (delta: 482.9 MB). Free memory was 211.6 MB in the beginning and 524.5 MB in the end (delta: -312.9 MB). Peak memory consumption was 169.9 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 547). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 550). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 544). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 547). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 547). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 544). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 550). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 552). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 547). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 552). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 562). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 560). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 560). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 560). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 560). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 559). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 559). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 562). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 577). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 579). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 571). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 580). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 570]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 570). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 571). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 576). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 577). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 579). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 580). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 576). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 577). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 579). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 577). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 579). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 566). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 567). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 568). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 566). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 566). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 566). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 567). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 568). Cancelled while BasicCegarLoop was constructing difference of abstraction (215states) and interpolant automaton (currently 21 states, 27 states before enhancement), while ReachableStatesComputation was computing reachable states (158 states constructedinput type IntersectNwa). - StatisticsResult: Ultimate Automizer benchmark data CFG has 6 procedures, 121 locations, 45 error locations. TIMEOUT Result, 42.1s OverallTime, 45 OverallIterations, 2 TraceHistogramMax, 29.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3951 SDtfs, 2748 SDslu, 13876 SDs, 0 SdLazy, 14301 SolverSat, 645 SolverUnsat, 17 SolverUnknown, 0 SolverNotchecked, 17.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 903 GetRequests, 272 SyntacticMatches, 36 SemanticMatches, 595 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 2811 ImplicationChecksByTransitivity, 17.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=224occurred in iteration=40, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.4s AutomataMinimizationTime, 44 MinimizatonAttempts, 441 StatesRemovedByMinimization, 37 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 11.0s InterpolantComputationTime, 1801 NumberOfCodeBlocks, 1801 NumberOfCodeBlocksAsserted, 51 NumberOfCheckSat, 1750 ConstructedInterpolants, 44 QuantifiedInterpolants, 783914 SizeOfPredicates, 74 NumberOfNonLiveVariables, 1276 ConjunctsInSsa, 225 ConjunctsInUnsatCore, 51 InterpolantComputations, 39 PerfectInterpolantSequences, 34/88 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/optional_data_creation_test04_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-24_12-09-46-903.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/optional_data_creation_test04_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-24_12-09-46-903.csv Completed graceful shutdown