java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_RubberTaipan+AI_EQ.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/ArraysWithLenghtAtDeclaration_false-valid-deref-read.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-24 13:18:56,141 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-24 13:18:56,142 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-24 13:18:56,157 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-24 13:18:56,157 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-24 13:18:56,158 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-24 13:18:56,159 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-24 13:18:56,160 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-24 13:18:56,161 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-24 13:18:56,162 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-24 13:18:56,163 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-24 13:18:56,163 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-24 13:18:56,163 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-24 13:18:56,164 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-24 13:18:56,165 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-24 13:18:56,168 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-24 13:18:56,170 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-24 13:18:56,172 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-24 13:18:56,173 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-24 13:18:56,174 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-24 13:18:56,177 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-24 13:18:56,177 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-24 13:18:56,177 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-24 13:18:56,178 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-24 13:18:56,179 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-24 13:18:56,180 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-24 13:18:56,181 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-24 13:18:56,181 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-24 13:18:56,182 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-24 13:18:56,182 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-24 13:18:56,182 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-24 13:18:56,183 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_RubberTaipan+AI_EQ.epf [2018-01-24 13:18:56,192 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-24 13:18:56,193 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-24 13:18:56,193 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-24 13:18:56,194 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-24 13:18:56,194 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-24 13:18:56,194 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-24 13:18:56,194 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-24 13:18:56,195 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-24 13:18:56,195 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-24 13:18:56,195 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-24 13:18:56,195 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-24 13:18:56,196 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-24 13:18:56,196 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-24 13:18:56,196 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-24 13:18:56,196 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-24 13:18:56,196 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-24 13:18:56,197 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-24 13:18:56,197 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-24 13:18:56,197 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-24 13:18:56,197 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-24 13:18:56,197 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-24 13:18:56,198 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-24 13:18:56,198 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-24 13:18:56,198 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 13:18:56,198 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-24 13:18:56,198 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-24 13:18:56,199 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-24 13:18:56,199 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-24 13:18:56,199 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-01-24 13:18:56,199 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-24 13:18:56,199 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-24 13:18:56,199 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-24 13:18:56,200 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-24 13:18:56,201 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-24 13:18:56,234 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-24 13:18:56,244 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-24 13:18:56,247 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-24 13:18:56,248 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-24 13:18:56,248 INFO L276 PluginConnector]: CDTParser initialized [2018-01-24 13:18:56,248 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/ArraysWithLenghtAtDeclaration_false-valid-deref-read.c [2018-01-24 13:18:56,361 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-24 13:18:56,367 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-24 13:18:56,367 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-24 13:18:56,368 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-24 13:18:56,375 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-24 13:18:56,376 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 01:18:56" (1/1) ... [2018-01-24 13:18:56,378 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@38a5aa62 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:18:56, skipping insertion in model container [2018-01-24 13:18:56,379 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 01:18:56" (1/1) ... [2018-01-24 13:18:56,398 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 13:18:56,418 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 13:18:56,544 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 13:18:56,559 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 13:18:56,564 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:18:56 WrapperNode [2018-01-24 13:18:56,565 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-24 13:18:56,565 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-24 13:18:56,565 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-24 13:18:56,565 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-24 13:18:56,577 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:18:56" (1/1) ... [2018-01-24 13:18:56,578 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:18:56" (1/1) ... [2018-01-24 13:18:56,588 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:18:56" (1/1) ... [2018-01-24 13:18:56,589 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:18:56" (1/1) ... [2018-01-24 13:18:56,591 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:18:56" (1/1) ... [2018-01-24 13:18:56,594 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:18:56" (1/1) ... [2018-01-24 13:18:56,595 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:18:56" (1/1) ... [2018-01-24 13:18:56,596 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-24 13:18:56,597 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-24 13:18:56,597 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-24 13:18:56,597 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-24 13:18:56,598 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:18:56" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 13:18:56,648 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-24 13:18:56,648 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-24 13:18:56,648 INFO L136 BoogieDeclarations]: Found implementation of procedure foo [2018-01-24 13:18:56,649 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-24 13:18:56,649 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-24 13:18:56,649 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-24 13:18:56,649 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-24 13:18:56,649 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-24 13:18:56,649 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-24 13:18:56,649 INFO L128 BoogieDeclarations]: Found specification of procedure foo [2018-01-24 13:18:56,649 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-24 13:18:56,649 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-24 13:18:56,649 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-24 13:18:56,860 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-24 13:18:56,862 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 01:18:56 BoogieIcfgContainer [2018-01-24 13:18:56,862 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-24 13:18:56,863 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-24 13:18:56,863 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-24 13:18:56,865 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-24 13:18:56,865 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.01 01:18:56" (1/3) ... [2018-01-24 13:18:56,866 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@45504b24 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 01:18:56, skipping insertion in model container [2018-01-24 13:18:56,866 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:18:56" (2/3) ... [2018-01-24 13:18:56,866 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@45504b24 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 01:18:56, skipping insertion in model container [2018-01-24 13:18:56,866 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 01:18:56" (3/3) ... [2018-01-24 13:18:56,868 INFO L105 eAbstractionObserver]: Analyzing ICFG ArraysWithLenghtAtDeclaration_false-valid-deref-read.c [2018-01-24 13:18:56,875 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-24 13:18:56,881 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 6 error locations. [2018-01-24 13:18:56,915 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-24 13:18:56,915 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-24 13:18:56,915 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-24 13:18:56,915 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-24 13:18:56,915 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-24 13:18:56,915 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-24 13:18:56,916 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-24 13:18:56,916 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-24 13:18:56,916 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-24 13:18:56,938 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states. [2018-01-24 13:18:56,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-01-24 13:18:56,945 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:18:56,946 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:18:56,946 INFO L371 AbstractCegarLoop]: === Iteration 1 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 13:18:56,952 INFO L82 PathProgramCache]: Analyzing trace with hash -215054890, now seen corresponding path program 1 times [2018-01-24 13:18:56,955 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:18:57,000 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:18:57,000 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:18:57,000 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:18:57,000 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:18:57,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:18:57,049 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:18:57,127 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:18:57,129 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:18:57,130 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 13:18:57,130 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:18:57,133 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 13:18:57,147 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 13:18:57,148 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 13:18:57,150 INFO L87 Difference]: Start difference. First operand 46 states. Second operand 3 states. [2018-01-24 13:18:57,259 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:18:57,259 INFO L93 Difference]: Finished difference Result 101 states and 123 transitions. [2018-01-24 13:18:57,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 13:18:57,260 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2018-01-24 13:18:57,261 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:18:57,268 INFO L225 Difference]: With dead ends: 101 [2018-01-24 13:18:57,268 INFO L226 Difference]: Without dead ends: 59 [2018-01-24 13:18:57,271 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 13:18:57,344 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-01-24 13:18:57,364 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 49. [2018-01-24 13:18:57,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-01-24 13:18:57,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 52 transitions. [2018-01-24 13:18:57,368 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 52 transitions. Word has length 11 [2018-01-24 13:18:57,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:18:57,368 INFO L432 AbstractCegarLoop]: Abstraction has 49 states and 52 transitions. [2018-01-24 13:18:57,369 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 13:18:57,369 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 52 transitions. [2018-01-24 13:18:57,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-01-24 13:18:57,369 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:18:57,369 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:18:57,369 INFO L371 AbstractCegarLoop]: === Iteration 2 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 13:18:57,370 INFO L82 PathProgramCache]: Analyzing trace with hash 1100032001, now seen corresponding path program 1 times [2018-01-24 13:18:57,370 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:18:57,371 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:18:57,371 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:18:57,371 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:18:57,371 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:18:57,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:18:57,389 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:18:57,493 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:18:57,494 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:18:57,494 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 13:18:57,494 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:18:57,496 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 13:18:57,496 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 13:18:57,496 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:18:57,497 INFO L87 Difference]: Start difference. First operand 49 states and 52 transitions. Second operand 6 states. [2018-01-24 13:18:57,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:18:57,673 INFO L93 Difference]: Finished difference Result 129 states and 141 transitions. [2018-01-24 13:18:57,674 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:18:57,674 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 16 [2018-01-24 13:18:57,674 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:18:57,677 INFO L225 Difference]: With dead ends: 129 [2018-01-24 13:18:57,677 INFO L226 Difference]: Without dead ends: 91 [2018-01-24 13:18:57,678 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:18:57,678 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2018-01-24 13:18:57,687 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 66. [2018-01-24 13:18:57,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-01-24 13:18:57,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 74 transitions. [2018-01-24 13:18:57,689 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 74 transitions. Word has length 16 [2018-01-24 13:18:57,690 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:18:57,690 INFO L432 AbstractCegarLoop]: Abstraction has 66 states and 74 transitions. [2018-01-24 13:18:57,690 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 13:18:57,690 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 74 transitions. [2018-01-24 13:18:57,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-24 13:18:57,691 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:18:57,691 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:18:57,691 INFO L371 AbstractCegarLoop]: === Iteration 3 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 13:18:57,691 INFO L82 PathProgramCache]: Analyzing trace with hash -258746290, now seen corresponding path program 1 times [2018-01-24 13:18:57,691 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:18:57,692 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:18:57,692 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:18:57,692 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:18:57,693 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:18:57,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:18:57,705 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:18:57,807 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:18:57,808 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:18:57,808 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:18:57,808 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:18:57,808 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:18:57,809 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:18:57,809 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:18:57,809 INFO L87 Difference]: Start difference. First operand 66 states and 74 transitions. Second operand 5 states. [2018-01-24 13:18:57,910 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:18:57,910 INFO L93 Difference]: Finished difference Result 77 states and 87 transitions. [2018-01-24 13:18:57,910 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 13:18:57,910 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-01-24 13:18:57,911 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:18:57,911 INFO L225 Difference]: With dead ends: 77 [2018-01-24 13:18:57,911 INFO L226 Difference]: Without dead ends: 76 [2018-01-24 13:18:57,912 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:18:57,912 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 76 states. [2018-01-24 13:18:57,918 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 76 to 68. [2018-01-24 13:18:57,918 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68 states. [2018-01-24 13:18:57,919 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 78 transitions. [2018-01-24 13:18:57,919 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 78 transitions. Word has length 17 [2018-01-24 13:18:57,920 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:18:57,920 INFO L432 AbstractCegarLoop]: Abstraction has 68 states and 78 transitions. [2018-01-24 13:18:57,920 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:18:57,920 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 78 transitions. [2018-01-24 13:18:57,920 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-24 13:18:57,920 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:18:57,920 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:18:57,920 INFO L371 AbstractCegarLoop]: === Iteration 4 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 13:18:57,921 INFO L82 PathProgramCache]: Analyzing trace with hash -258746291, now seen corresponding path program 1 times [2018-01-24 13:18:57,921 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:18:57,921 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:18:57,922 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:18:57,922 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:18:57,922 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:18:57,928 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:18:57,929 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:18:57,962 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:18:57,963 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:18:57,963 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:18:57,963 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:18:57,963 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:18:57,964 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:18:57,964 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:18:57,964 INFO L87 Difference]: Start difference. First operand 68 states and 78 transitions. Second operand 5 states. [2018-01-24 13:18:58,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:18:58,010 INFO L93 Difference]: Finished difference Result 68 states and 78 transitions. [2018-01-24 13:18:58,010 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 13:18:58,010 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-01-24 13:18:58,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:18:58,011 INFO L225 Difference]: With dead ends: 68 [2018-01-24 13:18:58,011 INFO L226 Difference]: Without dead ends: 67 [2018-01-24 13:18:58,012 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:18:58,012 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2018-01-24 13:18:58,020 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 67. [2018-01-24 13:18:58,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67 states. [2018-01-24 13:18:58,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 74 transitions. [2018-01-24 13:18:58,022 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 74 transitions. Word has length 17 [2018-01-24 13:18:58,023 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:18:58,023 INFO L432 AbstractCegarLoop]: Abstraction has 67 states and 74 transitions. [2018-01-24 13:18:58,023 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:18:58,023 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 74 transitions. [2018-01-24 13:18:58,024 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-24 13:18:58,024 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:18:58,024 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:18:58,024 INFO L371 AbstractCegarLoop]: === Iteration 5 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 13:18:58,025 INFO L82 PathProgramCache]: Analyzing trace with hash -1933852231, now seen corresponding path program 1 times [2018-01-24 13:18:58,025 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:18:58,026 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:18:58,026 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:18:58,026 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:18:58,026 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:18:58,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:18:58,039 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:18:58,126 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:18:58,127 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:18:58,127 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:18:58,141 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:18:58,142 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:18:58,158 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:18:58,164 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:18:58,212 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:18:58,212 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:18:58,268 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:18:58,289 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:18:58,289 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:18:58,293 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:18:58,293 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:18:58,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:18:58,314 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:18:58,318 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:18:58,318 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:18:58,325 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:18:58,326 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:18:58,326 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 3, 3, 3, 3] total 10 [2018-01-24 13:18:58,326 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:18:58,326 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 13:18:58,326 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 13:18:58,327 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=29, Invalid=81, Unknown=0, NotChecked=0, Total=110 [2018-01-24 13:18:58,327 INFO L87 Difference]: Start difference. First operand 67 states and 74 transitions. Second operand 9 states. [2018-01-24 13:18:58,485 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:18:58,486 INFO L93 Difference]: Finished difference Result 107 states and 125 transitions. [2018-01-24 13:18:58,486 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 13:18:58,486 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 22 [2018-01-24 13:18:58,486 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:18:58,487 INFO L225 Difference]: With dead ends: 107 [2018-01-24 13:18:58,487 INFO L226 Difference]: Without dead ends: 105 [2018-01-24 13:18:58,488 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 96 GetRequests, 83 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=63, Invalid=147, Unknown=0, NotChecked=0, Total=210 [2018-01-24 13:18:58,488 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states. [2018-01-24 13:18:58,500 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 90. [2018-01-24 13:18:58,501 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 90 states. [2018-01-24 13:18:58,503 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 90 states to 90 states and 100 transitions. [2018-01-24 13:18:58,503 INFO L78 Accepts]: Start accepts. Automaton has 90 states and 100 transitions. Word has length 22 [2018-01-24 13:18:58,503 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:18:58,503 INFO L432 AbstractCegarLoop]: Abstraction has 90 states and 100 transitions. [2018-01-24 13:18:58,503 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 13:18:58,504 INFO L276 IsEmpty]: Start isEmpty. Operand 90 states and 100 transitions. [2018-01-24 13:18:58,505 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-24 13:18:58,505 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:18:58,505 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:18:58,505 INFO L371 AbstractCegarLoop]: === Iteration 6 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 13:18:58,505 INFO L82 PathProgramCache]: Analyzing trace with hash 1693854175, now seen corresponding path program 1 times [2018-01-24 13:18:58,506 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:18:58,506 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:18:58,506 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:18:58,506 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:18:58,507 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:18:58,519 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:18:58,520 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:18:58,632 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:18:58,632 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:18:58,632 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:18:58,637 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:18:58,637 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:18:58,656 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:18:58,658 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:18:58,699 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:18:58,699 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:18:58,796 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:18:58,820 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:18:58,820 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:18:58,823 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:18:58,823 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:18:58,842 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:18:58,845 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:18:58,893 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 13:18:58,893 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:18:58,957 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 13:18:58,958 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 3 imperfect interpolant sequences. [2018-01-24 13:18:58,959 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4, 4] imperfect sequences [6, 6, 6] total 16 [2018-01-24 13:18:58,959 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:18:58,959 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:18:58,959 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:18:58,959 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=52, Invalid=188, Unknown=0, NotChecked=0, Total=240 [2018-01-24 13:18:58,960 INFO L87 Difference]: Start difference. First operand 90 states and 100 transitions. Second operand 5 states. [2018-01-24 13:18:58,991 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:18:58,991 INFO L93 Difference]: Finished difference Result 101 states and 110 transitions. [2018-01-24 13:18:58,992 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 13:18:58,992 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-01-24 13:18:58,992 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:18:58,993 INFO L225 Difference]: With dead ends: 101 [2018-01-24 13:18:58,994 INFO L226 Difference]: Without dead ends: 99 [2018-01-24 13:18:58,994 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 102 SyntacticMatches, 4 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=52, Invalid=188, Unknown=0, NotChecked=0, Total=240 [2018-01-24 13:18:58,995 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-01-24 13:18:59,004 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 87. [2018-01-24 13:18:59,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2018-01-24 13:18:59,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 97 transitions. [2018-01-24 13:18:59,007 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 97 transitions. Word has length 29 [2018-01-24 13:18:59,007 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:18:59,007 INFO L432 AbstractCegarLoop]: Abstraction has 87 states and 97 transitions. [2018-01-24 13:18:59,007 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:18:59,007 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 97 transitions. [2018-01-24 13:18:59,009 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-24 13:18:59,009 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:18:59,009 INFO L322 BasicCegarLoop]: trace histogram [4, 4, 4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:18:59,009 INFO L371 AbstractCegarLoop]: === Iteration 7 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 13:18:59,010 INFO L82 PathProgramCache]: Analyzing trace with hash -2013598170, now seen corresponding path program 1 times [2018-01-24 13:18:59,010 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:18:59,011 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:18:59,011 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:18:59,011 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:18:59,011 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:18:59,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:18:59,026 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:18:59,223 INFO L134 CoverageAnalysis]: Checked inductivity of 30 backedges. 26 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-24 13:18:59,223 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:18:59,223 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 13:18:59,223 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:18:59,223 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 13:18:59,223 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 13:18:59,224 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2018-01-24 13:18:59,224 INFO L87 Difference]: Start difference. First operand 87 states and 97 transitions. Second operand 9 states. [2018-01-24 13:18:59,361 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:18:59,361 INFO L93 Difference]: Finished difference Result 147 states and 164 transitions. [2018-01-24 13:18:59,362 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 13:18:59,362 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 35 [2018-01-24 13:18:59,362 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:18:59,363 INFO L225 Difference]: With dead ends: 147 [2018-01-24 13:18:59,363 INFO L226 Difference]: Without dead ends: 87 [2018-01-24 13:18:59,364 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=43, Invalid=89, Unknown=0, NotChecked=0, Total=132 [2018-01-24 13:18:59,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2018-01-24 13:18:59,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 79. [2018-01-24 13:18:59,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-01-24 13:18:59,373 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 86 transitions. [2018-01-24 13:18:59,373 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 86 transitions. Word has length 35 [2018-01-24 13:18:59,374 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:18:59,374 INFO L432 AbstractCegarLoop]: Abstraction has 79 states and 86 transitions. [2018-01-24 13:18:59,374 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 13:18:59,374 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 86 transitions. [2018-01-24 13:18:59,375 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-24 13:18:59,375 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:18:59,375 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:18:59,376 INFO L371 AbstractCegarLoop]: === Iteration 8 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 13:18:59,376 INFO L82 PathProgramCache]: Analyzing trace with hash 1643098334, now seen corresponding path program 1 times [2018-01-24 13:18:59,376 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:18:59,377 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:18:59,377 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:18:59,377 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:18:59,377 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:18:59,387 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:18:59,388 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:18:59,537 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:18:59,537 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:18:59,538 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:18:59,549 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:18:59,549 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:18:59,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:18:59,567 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:18:59,600 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:18:59,601 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:18:59,663 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:18:59,683 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:18:59,683 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:18:59,686 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:18:59,686 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:18:59,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:18:59,720 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:18:59,748 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 13:18:59,748 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:18:59,814 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 13:18:59,816 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:18:59,817 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 4, 4] total 16 [2018-01-24 13:18:59,817 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:18:59,817 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 13:18:59,818 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 13:18:59,818 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=189, Unknown=0, NotChecked=0, Total=240 [2018-01-24 13:18:59,818 INFO L87 Difference]: Start difference. First operand 79 states and 86 transitions. Second operand 10 states. [2018-01-24 13:19:00,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:19:00,016 INFO L93 Difference]: Finished difference Result 147 states and 160 transitions. [2018-01-24 13:19:00,017 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 13:19:00,017 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 37 [2018-01-24 13:19:00,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:19:00,017 INFO L225 Difference]: With dead ends: 147 [2018-01-24 13:19:00,018 INFO L226 Difference]: Without dead ends: 89 [2018-01-24 13:19:00,018 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 135 SyntacticMatches, 3 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 52 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=87, Invalid=293, Unknown=0, NotChecked=0, Total=380 [2018-01-24 13:19:00,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2018-01-24 13:19:00,024 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 79. [2018-01-24 13:19:00,024 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-01-24 13:19:00,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 83 transitions. [2018-01-24 13:19:00,025 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 83 transitions. Word has length 37 [2018-01-24 13:19:00,025 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:19:00,025 INFO L432 AbstractCegarLoop]: Abstraction has 79 states and 83 transitions. [2018-01-24 13:19:00,026 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 13:19:00,026 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 83 transitions. [2018-01-24 13:19:00,026 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-24 13:19:00,026 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:19:00,027 INFO L322 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:19:00,027 INFO L371 AbstractCegarLoop]: === Iteration 9 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 13:19:00,027 INFO L82 PathProgramCache]: Analyzing trace with hash 833411622, now seen corresponding path program 2 times [2018-01-24 13:19:00,027 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:19:00,028 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:00,028 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:19:00,028 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:00,028 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:19:00,037 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:19:00,038 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:19:00,076 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 13:19:00,076 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:00,077 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:19:00,085 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:19:00,085 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:19:00,096 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:00,097 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:19:00,099 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:00,135 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:19:00,142 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 5 [2018-01-24 13:19:00,142 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:19:00,144 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:19:00,144 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:12, output treesize:5 [2018-01-24 13:19:00,184 WARN L1029 $PredicateComparison]: unable to prove that (exists ((|main_~#mask~3.base| Int)) (and (= |c_#valid| (store |c_old(#valid)| |main_~#mask~3.base| 0)) (= 0 (select |c_old(#valid)| |main_~#mask~3.base|)))) is different from true [2018-01-24 13:19:00,191 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-01-24 13:19:00,191 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:00,222 WARN L1007 $PredicateComparison]: unable to prove that (forall ((|v_main_~#mask~3.base_11| Int)) (or (= (store |c_#valid| |v_main_~#mask~3.base_11| 0) |c_old(#valid)|) (not (= (select |c_#valid| |v_main_~#mask~3.base_11|) 0)))) is different from false [2018-01-24 13:19:00,230 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 12 trivial. 0 not checked. [2018-01-24 13:19:00,264 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 13:19:00,264 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5, 4] imperfect sequences [4] total 10 [2018-01-24 13:19:00,264 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:19:00,264 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 13:19:00,265 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 13:19:00,265 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=42, Unknown=2, NotChecked=26, Total=90 [2018-01-24 13:19:00,265 INFO L87 Difference]: Start difference. First operand 79 states and 83 transitions. Second operand 6 states. [2018-01-24 13:19:00,334 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:19:00,334 INFO L93 Difference]: Finished difference Result 80 states and 84 transitions. [2018-01-24 13:19:00,334 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:19:00,334 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2018-01-24 13:19:00,334 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:19:00,335 INFO L225 Difference]: With dead ends: 80 [2018-01-24 13:19:00,335 INFO L226 Difference]: Without dead ends: 63 [2018-01-24 13:19:00,335 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 80 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=69, Unknown=2, NotChecked=34, Total=132 [2018-01-24 13:19:00,335 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2018-01-24 13:19:00,342 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 63. [2018-01-24 13:19:00,342 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-01-24 13:19:00,343 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 65 transitions. [2018-01-24 13:19:00,343 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 65 transitions. Word has length 43 [2018-01-24 13:19:00,343 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:19:00,343 INFO L432 AbstractCegarLoop]: Abstraction has 63 states and 65 transitions. [2018-01-24 13:19:00,344 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 13:19:00,344 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 65 transitions. [2018-01-24 13:19:00,345 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-01-24 13:19:00,345 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:19:00,345 INFO L322 BasicCegarLoop]: trace histogram [7, 6, 6, 5, 5, 5, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:19:00,345 INFO L371 AbstractCegarLoop]: === Iteration 10 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 13:19:00,345 INFO L82 PathProgramCache]: Analyzing trace with hash 98230391, now seen corresponding path program 1 times [2018-01-24 13:19:00,345 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:19:00,346 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:00,346 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:19:00,346 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:00,346 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:19:00,361 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:19:00,362 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:19:00,539 INFO L134 CoverageAnalysis]: Checked inductivity of 97 backedges. 73 proven. 14 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 13:19:00,562 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:00,562 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:19:00,570 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:19:00,570 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:19:00,594 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:19:00,597 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:00,853 INFO L134 CoverageAnalysis]: Checked inductivity of 97 backedges. 83 proven. 4 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 13:19:00,853 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:00,963 INFO L134 CoverageAnalysis]: Checked inductivity of 97 backedges. 83 proven. 4 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 13:19:00,996 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:00,996 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 10 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:19:01,003 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:19:01,003 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:19:01,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:19:01,037 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:01,050 INFO L134 CoverageAnalysis]: Checked inductivity of 97 backedges. 83 proven. 4 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 13:19:01,050 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:01,081 INFO L134 CoverageAnalysis]: Checked inductivity of 97 backedges. 83 proven. 4 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 13:19:01,083 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:19:01,083 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 9, 9, 9, 9] total 22 [2018-01-24 13:19:01,083 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:19:01,084 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-24 13:19:01,084 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-24 13:19:01,084 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=87, Invalid=375, Unknown=0, NotChecked=0, Total=462 [2018-01-24 13:19:01,084 INFO L87 Difference]: Start difference. First operand 63 states and 65 transitions. Second operand 18 states. [2018-01-24 13:19:01,287 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:19:01,287 INFO L93 Difference]: Finished difference Result 131 states and 138 transitions. [2018-01-24 13:19:01,288 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 13:19:01,288 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 59 [2018-01-24 13:19:01,288 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:19:01,289 INFO L225 Difference]: With dead ends: 131 [2018-01-24 13:19:01,289 INFO L226 Difference]: Without dead ends: 98 [2018-01-24 13:19:01,289 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 250 GetRequests, 218 SyntacticMatches, 7 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 216 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=163, Invalid=539, Unknown=0, NotChecked=0, Total=702 [2018-01-24 13:19:01,290 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-01-24 13:19:01,298 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 93. [2018-01-24 13:19:01,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-01-24 13:19:01,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 96 transitions. [2018-01-24 13:19:01,300 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 96 transitions. Word has length 59 [2018-01-24 13:19:01,300 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:19:01,300 INFO L432 AbstractCegarLoop]: Abstraction has 93 states and 96 transitions. [2018-01-24 13:19:01,301 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-24 13:19:01,301 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 96 transitions. [2018-01-24 13:19:01,302 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-01-24 13:19:01,302 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:19:01,302 INFO L322 BasicCegarLoop]: trace histogram [10, 8, 8, 7, 7, 7, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:19:01,302 INFO L371 AbstractCegarLoop]: === Iteration 11 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 13:19:01,303 INFO L82 PathProgramCache]: Analyzing trace with hash 315437000, now seen corresponding path program 2 times [2018-01-24 13:19:01,303 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:19:01,304 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:01,304 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:19:01,304 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:01,304 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:19:01,322 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:19:01,323 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:19:01,625 INFO L134 CoverageAnalysis]: Checked inductivity of 208 backedges. 125 proven. 68 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 13:19:01,626 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:01,626 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:19:01,631 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:19:01,631 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:19:01,643 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:01,654 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:01,655 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:19:01,658 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:01,748 INFO L134 CoverageAnalysis]: Checked inductivity of 208 backedges. 157 proven. 10 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2018-01-24 13:19:01,749 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:01,916 INFO L134 CoverageAnalysis]: Checked inductivity of 208 backedges. 157 proven. 10 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2018-01-24 13:19:01,937 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:01,937 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:19:01,940 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:19:01,940 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:19:01,953 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:01,972 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:01,986 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:19:01,991 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:02,003 INFO L134 CoverageAnalysis]: Checked inductivity of 208 backedges. 157 proven. 10 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2018-01-24 13:19:02,003 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:02,077 INFO L134 CoverageAnalysis]: Checked inductivity of 208 backedges. 157 proven. 10 refuted. 0 times theorem prover too weak. 41 trivial. 0 not checked. [2018-01-24 13:19:02,081 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:19:02,081 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 8, 8, 8, 8] total 23 [2018-01-24 13:19:02,081 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:19:02,082 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-24 13:19:02,082 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-24 13:19:02,082 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=85, Invalid=421, Unknown=0, NotChecked=0, Total=506 [2018-01-24 13:19:02,082 INFO L87 Difference]: Start difference. First operand 93 states and 96 transitions. Second operand 20 states. [2018-01-24 13:19:02,361 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:19:02,361 INFO L93 Difference]: Finished difference Result 136 states and 141 transitions. [2018-01-24 13:19:02,361 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-24 13:19:02,362 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 83 [2018-01-24 13:19:02,362 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:19:02,363 INFO L225 Difference]: With dead ends: 136 [2018-01-24 13:19:02,363 INFO L226 Difference]: Without dead ends: 97 [2018-01-24 13:19:02,364 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 357 GetRequests, 315 SyntacticMatches, 9 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 352 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=219, Invalid=971, Unknown=0, NotChecked=0, Total=1190 [2018-01-24 13:19:02,365 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 97 states. [2018-01-24 13:19:02,374 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 97 to 93. [2018-01-24 13:19:02,374 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-01-24 13:19:02,375 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 94 transitions. [2018-01-24 13:19:02,375 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 94 transitions. Word has length 83 [2018-01-24 13:19:02,376 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:19:02,376 INFO L432 AbstractCegarLoop]: Abstraction has 93 states and 94 transitions. [2018-01-24 13:19:02,376 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-24 13:19:02,376 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 94 transitions. [2018-01-24 13:19:02,377 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-01-24 13:19:02,378 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:19:02,378 INFO L322 BasicCegarLoop]: trace histogram [11, 9, 9, 8, 8, 8, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:19:02,378 INFO L371 AbstractCegarLoop]: === Iteration 12 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 13:19:02,378 INFO L82 PathProgramCache]: Analyzing trace with hash 1642738256, now seen corresponding path program 3 times [2018-01-24 13:19:02,378 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:19:02,379 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:02,379 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:19:02,379 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:02,379 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:19:02,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:19:02,399 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:19:02,623 INFO L134 CoverageAnalysis]: Checked inductivity of 258 backedges. 138 proven. 20 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-01-24 13:19:02,624 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:02,624 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:19:02,629 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 13:19:02,629 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 13:19:02,637 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:02,641 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:02,647 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:02,649 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:19:02,652 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:02,655 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:19:02,655 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:19:02,658 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:19:02,658 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 13:19:02,951 INFO L134 CoverageAnalysis]: Checked inductivity of 258 backedges. 138 proven. 20 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-01-24 13:19:02,951 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:03,100 INFO L134 CoverageAnalysis]: Checked inductivity of 258 backedges. 128 proven. 30 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-01-24 13:19:03,121 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:03,121 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 14 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:19:03,124 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 13:19:03,124 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 13:19:03,135 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:03,144 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:03,164 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:03,175 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:19:03,180 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:03,182 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:19:03,182 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:19:03,185 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:19:03,185 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 13:19:03,287 INFO L134 CoverageAnalysis]: Checked inductivity of 258 backedges. 148 proven. 20 refuted. 0 times theorem prover too weak. 90 trivial. 0 not checked. [2018-01-24 13:19:03,287 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:03,465 INFO L134 CoverageAnalysis]: Checked inductivity of 258 backedges. 130 proven. 38 refuted. 0 times theorem prover too weak. 90 trivial. 0 not checked. [2018-01-24 13:19:03,467 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:19:03,467 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11, 10, 12, 11] total 38 [2018-01-24 13:19:03,467 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:19:03,467 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-24 13:19:03,468 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-24 13:19:03,468 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=246, Invalid=1236, Unknown=0, NotChecked=0, Total=1482 [2018-01-24 13:19:03,468 INFO L87 Difference]: Start difference. First operand 93 states and 94 transitions. Second operand 21 states. [2018-01-24 13:19:03,593 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:19:03,593 INFO L93 Difference]: Finished difference Result 128 states and 130 transitions. [2018-01-24 13:19:03,594 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 13:19:03,594 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 89 [2018-01-24 13:19:03,594 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:19:03,595 INFO L225 Difference]: With dead ends: 128 [2018-01-24 13:19:03,595 INFO L226 Difference]: Without dead ends: 127 [2018-01-24 13:19:03,595 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 367 GetRequests, 320 SyntacticMatches, 7 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 895 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=304, Invalid=1418, Unknown=0, NotChecked=0, Total=1722 [2018-01-24 13:19:03,596 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-01-24 13:19:03,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 123. [2018-01-24 13:19:03,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-01-24 13:19:03,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 125 transitions. [2018-01-24 13:19:03,605 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 125 transitions. Word has length 89 [2018-01-24 13:19:03,605 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:19:03,605 INFO L432 AbstractCegarLoop]: Abstraction has 123 states and 125 transitions. [2018-01-24 13:19:03,605 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-24 13:19:03,605 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 125 transitions. [2018-01-24 13:19:03,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 120 [2018-01-24 13:19:03,606 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:19:03,607 INFO L322 BasicCegarLoop]: trace histogram [15, 12, 12, 11, 11, 11, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:19:03,607 INFO L371 AbstractCegarLoop]: === Iteration 13 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 13:19:03,607 INFO L82 PathProgramCache]: Analyzing trace with hash -630750615, now seen corresponding path program 4 times [2018-01-24 13:19:03,607 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:19:03,607 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:03,608 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:19:03,608 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:03,608 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:19:03,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:19:03,627 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:19:03,943 INFO L134 CoverageAnalysis]: Checked inductivity of 497 backedges. 325 proven. 125 refuted. 0 times theorem prover too weak. 47 trivial. 0 not checked. [2018-01-24 13:19:03,943 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:03,943 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:19:03,948 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-24 13:19:03,948 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-24 13:19:03,972 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:19:03,974 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:04,048 INFO L134 CoverageAnalysis]: Checked inductivity of 497 backedges. 355 proven. 24 refuted. 0 times theorem prover too weak. 118 trivial. 0 not checked. [2018-01-24 13:19:04,049 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:04,226 INFO L134 CoverageAnalysis]: Checked inductivity of 497 backedges. 355 proven. 24 refuted. 0 times theorem prover too weak. 118 trivial. 0 not checked. [2018-01-24 13:19:04,247 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:04,247 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 16 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:19:04,250 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-24 13:19:04,250 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-24 13:19:04,298 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:19:04,303 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:04,317 INFO L134 CoverageAnalysis]: Checked inductivity of 497 backedges. 355 proven. 24 refuted. 0 times theorem prover too weak. 118 trivial. 0 not checked. [2018-01-24 13:19:04,317 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:04,389 INFO L134 CoverageAnalysis]: Checked inductivity of 497 backedges. 355 proven. 24 refuted. 0 times theorem prover too weak. 118 trivial. 0 not checked. [2018-01-24 13:19:04,391 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:19:04,391 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 10, 10, 10, 10] total 25 [2018-01-24 13:19:04,391 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:19:04,391 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-24 13:19:04,392 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-24 13:19:04,392 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=109, Invalid=491, Unknown=0, NotChecked=0, Total=600 [2018-01-24 13:19:04,392 INFO L87 Difference]: Start difference. First operand 123 states and 125 transitions. Second operand 21 states. [2018-01-24 13:19:04,771 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:19:04,771 INFO L93 Difference]: Finished difference Result 181 states and 186 transitions. [2018-01-24 13:19:04,771 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-24 13:19:04,772 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 119 [2018-01-24 13:19:04,772 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:19:04,772 INFO L225 Difference]: With dead ends: 181 [2018-01-24 13:19:04,773 INFO L226 Difference]: Without dead ends: 142 [2018-01-24 13:19:04,773 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 505 GetRequests, 459 SyntacticMatches, 10 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 370 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=275, Invalid=1131, Unknown=0, NotChecked=0, Total=1406 [2018-01-24 13:19:04,773 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-01-24 13:19:04,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 133. [2018-01-24 13:19:04,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-01-24 13:19:04,787 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 135 transitions. [2018-01-24 13:19:04,787 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 135 transitions. Word has length 119 [2018-01-24 13:19:04,787 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:19:04,787 INFO L432 AbstractCegarLoop]: Abstraction has 133 states and 135 transitions. [2018-01-24 13:19:04,787 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-24 13:19:04,788 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 135 transitions. [2018-01-24 13:19:04,789 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 126 [2018-01-24 13:19:04,789 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:19:04,789 INFO L322 BasicCegarLoop]: trace histogram [16, 13, 13, 12, 12, 12, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:19:04,789 INFO L371 AbstractCegarLoop]: === Iteration 14 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 13:19:04,789 INFO L82 PathProgramCache]: Analyzing trace with hash -1849014223, now seen corresponding path program 5 times [2018-01-24 13:19:04,790 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:19:04,790 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:04,791 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:19:04,791 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:04,791 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:19:04,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:19:04,813 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:19:05,065 INFO L134 CoverageAnalysis]: Checked inductivity of 573 backedges. 225 proven. 30 refuted. 0 times theorem prover too weak. 318 trivial. 0 not checked. [2018-01-24 13:19:05,066 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:05,066 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:19:05,071 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-24 13:19:05,071 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:19:05,080 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:05,084 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:05,089 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:05,093 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:05,098 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:05,104 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:05,106 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:19:05,109 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:05,111 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:19:05,111 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:19:05,114 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:19:05,114 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 13:19:05,219 INFO L134 CoverageAnalysis]: Checked inductivity of 573 backedges. 225 proven. 30 refuted. 0 times theorem prover too weak. 318 trivial. 0 not checked. [2018-01-24 13:19:05,219 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:05,327 INFO L134 CoverageAnalysis]: Checked inductivity of 573 backedges. 225 proven. 30 refuted. 0 times theorem prover too weak. 318 trivial. 0 not checked. [2018-01-24 13:19:05,359 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:05,359 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 18 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:19:05,362 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-24 13:19:05,362 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:19:05,374 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:05,383 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:05,399 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:05,426 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:05,465 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:05,599 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:05,619 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:19:05,625 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:05,628 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:19:05,628 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:19:05,630 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:19:05,631 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 13:19:05,726 INFO L134 CoverageAnalysis]: Checked inductivity of 573 backedges. 225 proven. 30 refuted. 0 times theorem prover too weak. 318 trivial. 0 not checked. [2018-01-24 13:19:05,726 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:05,760 INFO L134 CoverageAnalysis]: Checked inductivity of 573 backedges. 225 proven. 30 refuted. 0 times theorem prover too weak. 318 trivial. 0 not checked. [2018-01-24 13:19:05,762 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:19:05,762 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 7, 8, 7] total 18 [2018-01-24 13:19:05,762 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:19:05,763 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-24 13:19:05,763 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-24 13:19:05,763 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=84, Invalid=258, Unknown=0, NotChecked=0, Total=342 [2018-01-24 13:19:05,763 INFO L87 Difference]: Start difference. First operand 133 states and 135 transitions. Second operand 13 states. [2018-01-24 13:19:05,888 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:19:05,888 INFO L93 Difference]: Finished difference Result 142 states and 144 transitions. [2018-01-24 13:19:05,889 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 13:19:05,889 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 125 [2018-01-24 13:19:05,889 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:19:05,890 INFO L225 Difference]: With dead ends: 142 [2018-01-24 13:19:05,890 INFO L226 Difference]: Without dead ends: 141 [2018-01-24 13:19:05,890 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 510 GetRequests, 474 SyntacticMatches, 15 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 160 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=135, Invalid=371, Unknown=0, NotChecked=0, Total=506 [2018-01-24 13:19:05,891 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-01-24 13:19:05,899 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 135. [2018-01-24 13:19:05,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-01-24 13:19:05,900 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 137 transitions. [2018-01-24 13:19:05,900 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 137 transitions. Word has length 125 [2018-01-24 13:19:05,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:19:05,901 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 137 transitions. [2018-01-24 13:19:05,901 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-24 13:19:05,901 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 137 transitions. [2018-01-24 13:19:05,902 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-01-24 13:19:05,902 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:19:05,902 INFO L322 BasicCegarLoop]: trace histogram [17, 14, 14, 13, 13, 13, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:19:05,903 INFO L371 AbstractCegarLoop]: === Iteration 15 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 13:19:05,903 INFO L82 PathProgramCache]: Analyzing trace with hash 659173177, now seen corresponding path program 6 times [2018-01-24 13:19:05,903 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:19:05,904 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:05,904 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:19:05,904 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:05,904 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:19:05,924 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:19:05,925 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:19:06,224 INFO L134 CoverageAnalysis]: Checked inductivity of 655 backedges. 285 proven. 52 refuted. 0 times theorem prover too weak. 318 trivial. 0 not checked. [2018-01-24 13:19:06,225 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:06,225 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:19:06,230 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-24 13:19:06,230 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-24 13:19:06,240 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:06,244 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:06,260 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:06,277 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:06,294 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:06,308 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:06,310 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:19:06,313 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:06,315 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:19:06,315 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:19:06,320 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:19:06,320 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 13:19:06,602 INFO L134 CoverageAnalysis]: Checked inductivity of 655 backedges. 349 proven. 174 refuted. 0 times theorem prover too weak. 132 trivial. 0 not checked. [2018-01-24 13:19:06,602 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:06,964 INFO L134 CoverageAnalysis]: Checked inductivity of 655 backedges. 319 proven. 204 refuted. 0 times theorem prover too weak. 132 trivial. 0 not checked. [2018-01-24 13:19:06,984 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:06,985 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 20 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:19:06,990 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-24 13:19:06,990 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-24 13:19:07,003 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:07,011 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:07,027 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:07,055 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:07,094 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:07,179 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:07,199 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:19:07,204 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:07,207 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:19:07,207 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:19:07,209 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:19:07,209 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 13:19:07,420 INFO L134 CoverageAnalysis]: Checked inductivity of 655 backedges. 285 proven. 52 refuted. 0 times theorem prover too weak. 318 trivial. 0 not checked. [2018-01-24 13:19:07,420 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:07,555 INFO L134 CoverageAnalysis]: Checked inductivity of 655 backedges. 285 proven. 52 refuted. 0 times theorem prover too weak. 318 trivial. 0 not checked. [2018-01-24 13:19:07,557 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:19:07,557 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 16, 15, 9, 8] total 48 [2018-01-24 13:19:07,557 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:19:07,557 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-24 13:19:07,557 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-24 13:19:07,558 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=269, Invalid=2083, Unknown=0, NotChecked=0, Total=2352 [2018-01-24 13:19:07,558 INFO L87 Difference]: Start difference. First operand 135 states and 137 transitions. Second operand 25 states. [2018-01-24 13:19:08,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:19:08,405 INFO L93 Difference]: Finished difference Result 208 states and 217 transitions. [2018-01-24 13:19:08,405 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-24 13:19:08,405 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 131 [2018-01-24 13:19:08,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:19:08,406 INFO L225 Difference]: With dead ends: 208 [2018-01-24 13:19:08,406 INFO L226 Difference]: Without dead ends: 207 [2018-01-24 13:19:08,408 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 552 GetRequests, 471 SyntacticMatches, 13 SemanticMatches, 68 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1545 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=842, Invalid=3988, Unknown=0, NotChecked=0, Total=4830 [2018-01-24 13:19:08,408 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2018-01-24 13:19:08,422 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 195. [2018-01-24 13:19:08,422 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195 states. [2018-01-24 13:19:08,423 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 202 transitions. [2018-01-24 13:19:08,423 INFO L78 Accepts]: Start accepts. Automaton has 195 states and 202 transitions. Word has length 131 [2018-01-24 13:19:08,424 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:19:08,424 INFO L432 AbstractCegarLoop]: Abstraction has 195 states and 202 transitions. [2018-01-24 13:19:08,424 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-24 13:19:08,424 INFO L276 IsEmpty]: Start isEmpty. Operand 195 states and 202 transitions. [2018-01-24 13:19:08,426 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2018-01-24 13:19:08,427 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:19:08,427 INFO L322 BasicCegarLoop]: trace histogram [19, 16, 16, 15, 15, 15, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:19:08,427 INFO L371 AbstractCegarLoop]: === Iteration 16 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 13:19:08,427 INFO L82 PathProgramCache]: Analyzing trace with hash -177564663, now seen corresponding path program 7 times [2018-01-24 13:19:08,427 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:19:08,428 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:08,428 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:19:08,428 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:08,428 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:19:08,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:19:08,443 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:19:08,765 INFO L134 CoverageAnalysis]: Checked inductivity of 837 backedges. 379 proven. 80 refuted. 0 times theorem prover too weak. 378 trivial. 0 not checked. [2018-01-24 13:19:08,765 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:08,765 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:19:08,770 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:19:08,770 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:19:08,797 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:19:08,799 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:08,890 INFO L134 CoverageAnalysis]: Checked inductivity of 837 backedges. 629 proven. 40 refuted. 0 times theorem prover too weak. 168 trivial. 0 not checked. [2018-01-24 13:19:08,890 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:09,038 INFO L134 CoverageAnalysis]: Checked inductivity of 837 backedges. 655 proven. 14 refuted. 0 times theorem prover too weak. 168 trivial. 0 not checked. [2018-01-24 13:19:09,058 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:09,058 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 22 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:19:09,061 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:19:09,061 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:19:09,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:19:09,121 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:09,137 INFO L134 CoverageAnalysis]: Checked inductivity of 837 backedges. 629 proven. 40 refuted. 0 times theorem prover too weak. 168 trivial. 0 not checked. [2018-01-24 13:19:09,137 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:09,212 INFO L134 CoverageAnalysis]: Checked inductivity of 837 backedges. 655 proven. 14 refuted. 0 times theorem prover too weak. 168 trivial. 0 not checked. [2018-01-24 13:19:09,214 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:19:09,214 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11, 11, 11, 11] total 25 [2018-01-24 13:19:09,214 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:19:09,214 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-24 13:19:09,214 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-24 13:19:09,215 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=102, Invalid=498, Unknown=0, NotChecked=0, Total=600 [2018-01-24 13:19:09,215 INFO L87 Difference]: Start difference. First operand 195 states and 202 transitions. Second operand 20 states. [2018-01-24 13:19:09,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:19:09,625 INFO L93 Difference]: Finished difference Result 324 states and 340 transitions. [2018-01-24 13:19:09,625 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-24 13:19:09,626 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 143 [2018-01-24 13:19:09,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:19:09,627 INFO L225 Difference]: With dead ends: 324 [2018-01-24 13:19:09,627 INFO L226 Difference]: Without dead ends: 212 [2018-01-24 13:19:09,628 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 592 GetRequests, 548 SyntacticMatches, 10 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 302 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=239, Invalid=1021, Unknown=0, NotChecked=0, Total=1260 [2018-01-24 13:19:09,628 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 212 states. [2018-01-24 13:19:09,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 212 to 192. [2018-01-24 13:19:09,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192 states. [2018-01-24 13:19:09,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192 states to 192 states and 198 transitions. [2018-01-24 13:19:09,641 INFO L78 Accepts]: Start accepts. Automaton has 192 states and 198 transitions. Word has length 143 [2018-01-24 13:19:09,641 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:19:09,641 INFO L432 AbstractCegarLoop]: Abstraction has 192 states and 198 transitions. [2018-01-24 13:19:09,641 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-24 13:19:09,642 INFO L276 IsEmpty]: Start isEmpty. Operand 192 states and 198 transitions. [2018-01-24 13:19:09,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 186 [2018-01-24 13:19:09,644 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:19:09,644 INFO L322 BasicCegarLoop]: trace histogram [25, 21, 21, 20, 20, 20, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:19:09,644 INFO L371 AbstractCegarLoop]: === Iteration 17 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 13:19:09,644 INFO L82 PathProgramCache]: Analyzing trace with hash 267706226, now seen corresponding path program 8 times [2018-01-24 13:19:09,644 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:19:09,645 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:09,645 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:19:09,645 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:09,645 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:19:09,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:19:09,671 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:19:09,996 INFO L134 CoverageAnalysis]: Checked inductivity of 1480 backedges. 712 proven. 74 refuted. 0 times theorem prover too weak. 694 trivial. 0 not checked. [2018-01-24 13:19:09,996 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:09,996 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:19:10,003 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:19:10,004 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:19:10,017 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:10,042 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:10,046 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:19:10,051 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:10,268 INFO L134 CoverageAnalysis]: Checked inductivity of 1480 backedges. 734 proven. 52 refuted. 0 times theorem prover too weak. 694 trivial. 0 not checked. [2018-01-24 13:19:10,268 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:10,408 INFO L134 CoverageAnalysis]: Checked inductivity of 1480 backedges. 734 proven. 52 refuted. 0 times theorem prover too weak. 694 trivial. 0 not checked. [2018-01-24 13:19:10,428 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:10,428 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 24 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:19:10,431 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:19:10,431 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:19:10,448 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:10,487 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:10,514 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:19:10,520 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:10,560 INFO L134 CoverageAnalysis]: Checked inductivity of 1480 backedges. 734 proven. 52 refuted. 0 times theorem prover too weak. 694 trivial. 0 not checked. [2018-01-24 13:19:10,560 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:10,712 INFO L134 CoverageAnalysis]: Checked inductivity of 1480 backedges. 734 proven. 52 refuted. 0 times theorem prover too weak. 694 trivial. 0 not checked. [2018-01-24 13:19:10,713 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:19:10,714 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 15, 15, 15, 15] total 37 [2018-01-24 13:19:10,714 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:19:10,714 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-24 13:19:10,714 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-24 13:19:10,714 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=231, Invalid=1101, Unknown=0, NotChecked=0, Total=1332 [2018-01-24 13:19:10,715 INFO L87 Difference]: Start difference. First operand 192 states and 198 transitions. Second operand 30 states. [2018-01-24 13:19:11,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:19:11,195 INFO L93 Difference]: Finished difference Result 403 states and 428 transitions. [2018-01-24 13:19:11,195 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-24 13:19:11,196 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 185 [2018-01-24 13:19:11,196 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:19:11,198 INFO L225 Difference]: With dead ends: 403 [2018-01-24 13:19:11,198 INFO L226 Difference]: Without dead ends: 307 [2018-01-24 13:19:11,200 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 766 GetRequests, 707 SyntacticMatches, 13 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 933 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=493, Invalid=1763, Unknown=0, NotChecked=0, Total=2256 [2018-01-24 13:19:11,200 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 307 states. [2018-01-24 13:19:11,230 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 307 to 297. [2018-01-24 13:19:11,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 297 states. [2018-01-24 13:19:11,233 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 297 states to 297 states and 310 transitions. [2018-01-24 13:19:11,233 INFO L78 Accepts]: Start accepts. Automaton has 297 states and 310 transitions. Word has length 185 [2018-01-24 13:19:11,233 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:19:11,234 INFO L432 AbstractCegarLoop]: Abstraction has 297 states and 310 transitions. [2018-01-24 13:19:11,234 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-24 13:19:11,234 INFO L276 IsEmpty]: Start isEmpty. Operand 297 states and 310 transitions. [2018-01-24 13:19:11,237 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 222 [2018-01-24 13:19:11,237 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:19:11,238 INFO L322 BasicCegarLoop]: trace histogram [30, 25, 25, 24, 24, 24, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:19:11,238 INFO L371 AbstractCegarLoop]: === Iteration 18 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 13:19:11,238 INFO L82 PathProgramCache]: Analyzing trace with hash -1222792877, now seen corresponding path program 9 times [2018-01-24 13:19:11,238 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:19:11,239 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:11,239 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:19:11,239 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:11,239 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:19:11,267 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:19:11,268 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:19:11,771 INFO L134 CoverageAnalysis]: Checked inductivity of 2147 backedges. 1261 proven. 413 refuted. 0 times theorem prover too weak. 473 trivial. 0 not checked. [2018-01-24 13:19:11,771 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:11,772 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:19:11,778 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 13:19:11,778 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 13:19:11,794 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:11,799 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:11,817 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:11,836 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:11,847 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:11,858 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:11,860 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:19:11,865 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:11,872 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:19:11,873 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:19:11,876 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:19:11,876 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 13:19:12,320 INFO L134 CoverageAnalysis]: Checked inductivity of 2147 backedges. 817 proven. 92 refuted. 0 times theorem prover too weak. 1238 trivial. 0 not checked. [2018-01-24 13:19:12,320 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:12,698 INFO L134 CoverageAnalysis]: Checked inductivity of 2147 backedges. 795 proven. 114 refuted. 0 times theorem prover too weak. 1238 trivial. 0 not checked. [2018-01-24 13:19:12,718 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:12,718 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 26 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:19:12,721 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 13:19:12,721 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 13:19:12,743 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:12,753 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:12,773 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:12,811 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:12,880 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:13,009 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:13,036 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:19:13,043 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:13,045 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:19:13,045 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:19:13,050 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:19:13,051 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 13:19:13,384 INFO L134 CoverageAnalysis]: Checked inductivity of 2147 backedges. 883 proven. 92 refuted. 0 times theorem prover too weak. 1172 trivial. 0 not checked. [2018-01-24 13:19:13,384 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:13,809 INFO L134 CoverageAnalysis]: Checked inductivity of 2147 backedges. 819 proven. 156 refuted. 0 times theorem prover too weak. 1172 trivial. 0 not checked. [2018-01-24 13:19:13,811 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:19:13,812 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 14, 13, 17, 16] total 61 [2018-01-24 13:19:13,812 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:19:13,812 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-01-24 13:19:13,813 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-01-24 13:19:13,814 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=393, Invalid=3267, Unknown=0, NotChecked=0, Total=3660 [2018-01-24 13:19:13,814 INFO L87 Difference]: Start difference. First operand 297 states and 310 transitions. Second operand 33 states. [2018-01-24 13:19:16,552 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:19:16,552 INFO L93 Difference]: Finished difference Result 461 states and 483 transitions. [2018-01-24 13:19:16,553 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2018-01-24 13:19:16,553 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 221 [2018-01-24 13:19:16,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:19:16,554 INFO L225 Difference]: With dead ends: 461 [2018-01-24 13:19:16,554 INFO L226 Difference]: Without dead ends: 350 [2018-01-24 13:19:16,557 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 952 GetRequests, 825 SyntacticMatches, 19 SemanticMatches, 108 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4054 ImplicationChecksByTransitivity, 3.6s TimeCoverageRelationStatistics Valid=1685, Invalid=10305, Unknown=0, NotChecked=0, Total=11990 [2018-01-24 13:19:16,557 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 350 states. [2018-01-24 13:19:16,582 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 350 to 342. [2018-01-24 13:19:16,582 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 342 states. [2018-01-24 13:19:16,583 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 342 states to 342 states and 349 transitions. [2018-01-24 13:19:16,584 INFO L78 Accepts]: Start accepts. Automaton has 342 states and 349 transitions. Word has length 221 [2018-01-24 13:19:16,584 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:19:16,584 INFO L432 AbstractCegarLoop]: Abstraction has 342 states and 349 transitions. [2018-01-24 13:19:16,584 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-01-24 13:19:16,585 INFO L276 IsEmpty]: Start isEmpty. Operand 342 states and 349 transitions. [2018-01-24 13:19:16,586 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 276 [2018-01-24 13:19:16,586 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:19:16,586 INFO L322 BasicCegarLoop]: trace histogram [38, 32, 32, 31, 31, 31, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:19:16,586 INFO L371 AbstractCegarLoop]: === Iteration 19 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 13:19:16,587 INFO L82 PathProgramCache]: Analyzing trace with hash -1481262388, now seen corresponding path program 10 times [2018-01-24 13:19:16,587 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:19:16,587 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:16,587 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:19:16,587 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:16,587 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:19:16,617 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:19:16,619 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:19:17,126 INFO L134 CoverageAnalysis]: Checked inductivity of 3508 backedges. 1886 proven. 677 refuted. 0 times theorem prover too weak. 945 trivial. 0 not checked. [2018-01-24 13:19:17,126 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:17,126 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:19:17,131 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-24 13:19:17,131 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-24 13:19:17,176 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:19:17,179 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:17,372 INFO L134 CoverageAnalysis]: Checked inductivity of 3508 backedges. 2081 proven. 44 refuted. 0 times theorem prover too weak. 1383 trivial. 0 not checked. [2018-01-24 13:19:17,372 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:17,590 INFO L134 CoverageAnalysis]: Checked inductivity of 3508 backedges. 1459 proven. 382 refuted. 0 times theorem prover too weak. 1667 trivial. 0 not checked. [2018-01-24 13:19:17,624 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:17,624 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 28 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:19:17,627 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-24 13:19:17,627 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-24 13:19:17,740 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:19:17,748 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:17,787 INFO L134 CoverageAnalysis]: Checked inductivity of 3508 backedges. 2081 proven. 44 refuted. 0 times theorem prover too weak. 1383 trivial. 0 not checked. [2018-01-24 13:19:17,787 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:18,014 INFO L134 CoverageAnalysis]: Checked inductivity of 3508 backedges. 1459 proven. 382 refuted. 0 times theorem prover too weak. 1667 trivial. 0 not checked. [2018-01-24 13:19:18,016 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:19:18,016 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 12, 12, 12, 12] total 34 [2018-01-24 13:19:18,016 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:19:18,017 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-24 13:19:18,017 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-24 13:19:18,017 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=174, Invalid=948, Unknown=0, NotChecked=0, Total=1122 [2018-01-24 13:19:18,018 INFO L87 Difference]: Start difference. First operand 342 states and 349 transitions. Second operand 29 states. [2018-01-24 13:19:18,978 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:19:18,978 INFO L93 Difference]: Finished difference Result 498 states and 506 transitions. [2018-01-24 13:19:18,978 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-24 13:19:18,978 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 275 [2018-01-24 13:19:18,979 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:19:18,981 INFO L225 Difference]: With dead ends: 498 [2018-01-24 13:19:18,981 INFO L226 Difference]: Without dead ends: 285 [2018-01-24 13:19:18,982 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 1138 GetRequests, 1075 SyntacticMatches, 12 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1007 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=424, Invalid=2332, Unknown=0, NotChecked=0, Total=2756 [2018-01-24 13:19:18,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 285 states. [2018-01-24 13:19:19,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 285 to 285. [2018-01-24 13:19:19,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 285 states. [2018-01-24 13:19:19,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 285 states to 285 states and 287 transitions. [2018-01-24 13:19:19,015 INFO L78 Accepts]: Start accepts. Automaton has 285 states and 287 transitions. Word has length 275 [2018-01-24 13:19:19,016 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:19:19,016 INFO L432 AbstractCegarLoop]: Abstraction has 285 states and 287 transitions. [2018-01-24 13:19:19,016 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-24 13:19:19,016 INFO L276 IsEmpty]: Start isEmpty. Operand 285 states and 287 transitions. [2018-01-24 13:19:19,018 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 282 [2018-01-24 13:19:19,018 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:19:19,018 INFO L322 BasicCegarLoop]: trace histogram [39, 33, 33, 32, 32, 32, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:19:19,018 INFO L371 AbstractCegarLoop]: === Iteration 20 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 13:19:19,018 INFO L82 PathProgramCache]: Analyzing trace with hash -1397576748, now seen corresponding path program 11 times [2018-01-24 13:19:19,019 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:19:19,019 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:19,019 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:19:19,020 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:19,020 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:19:19,047 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:19:19,049 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:19:19,629 INFO L134 CoverageAnalysis]: Checked inductivity of 3710 backedges. 2416 proven. 425 refuted. 0 times theorem prover too weak. 869 trivial. 0 not checked. [2018-01-24 13:19:19,629 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:19,629 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:19:19,634 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-24 13:19:19,634 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:19:19,648 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:19,650 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:19,659 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:19,664 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:19,670 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:19,677 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:19,685 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:19,692 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:19,699 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:19,706 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:19,708 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:19:19,711 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:19,938 INFO L134 CoverageAnalysis]: Checked inductivity of 3710 backedges. 1998 proven. 491 refuted. 0 times theorem prover too weak. 1221 trivial. 0 not checked. [2018-01-24 13:19:19,938 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:20,266 INFO L134 CoverageAnalysis]: Checked inductivity of 3710 backedges. 2006 proven. 483 refuted. 0 times theorem prover too weak. 1221 trivial. 0 not checked. [2018-01-24 13:19:20,286 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:20,286 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 30 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:19:20,289 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-24 13:19:20,289 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:19:20,308 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:20,313 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:20,325 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:20,353 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:20,407 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:20,470 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:20,650 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:21,016 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:21,458 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:23,764 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:23,829 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:19:23,838 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:23,923 INFO L134 CoverageAnalysis]: Checked inductivity of 3710 backedges. 2015 proven. 580 refuted. 0 times theorem prover too weak. 1115 trivial. 0 not checked. [2018-01-24 13:19:23,923 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:24,156 INFO L134 CoverageAnalysis]: Checked inductivity of 3710 backedges. 2029 proven. 566 refuted. 0 times theorem prover too weak. 1115 trivial. 0 not checked. [2018-01-24 13:19:24,158 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:19:24,159 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 19, 19, 19, 19] total 50 [2018-01-24 13:19:24,159 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:19:24,159 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-24 13:19:24,159 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-24 13:19:24,160 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=317, Invalid=2133, Unknown=0, NotChecked=0, Total=2450 [2018-01-24 13:19:24,160 INFO L87 Difference]: Start difference. First operand 285 states and 287 transitions. Second operand 36 states. [2018-01-24 13:19:25,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:19:25,277 INFO L93 Difference]: Finished difference Result 361 states and 366 transitions. [2018-01-24 13:19:25,278 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-01-24 13:19:25,278 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 281 [2018-01-24 13:19:25,278 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:19:25,279 INFO L225 Difference]: With dead ends: 361 [2018-01-24 13:19:25,279 INFO L226 Difference]: Without dead ends: 304 [2018-01-24 13:19:25,280 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 1178 GetRequests, 1085 SyntacticMatches, 19 SemanticMatches, 74 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2104 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=918, Invalid=4782, Unknown=0, NotChecked=0, Total=5700 [2018-01-24 13:19:25,281 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 304 states. [2018-01-24 13:19:25,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 304 to 295. [2018-01-24 13:19:25,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 295 states. [2018-01-24 13:19:25,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 295 states to 295 states and 297 transitions. [2018-01-24 13:19:25,301 INFO L78 Accepts]: Start accepts. Automaton has 295 states and 297 transitions. Word has length 281 [2018-01-24 13:19:25,301 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:19:25,302 INFO L432 AbstractCegarLoop]: Abstraction has 295 states and 297 transitions. [2018-01-24 13:19:25,302 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-24 13:19:25,302 INFO L276 IsEmpty]: Start isEmpty. Operand 295 states and 297 transitions. [2018-01-24 13:19:25,303 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 288 [2018-01-24 13:19:25,303 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:19:25,303 INFO L322 BasicCegarLoop]: trace histogram [40, 34, 34, 33, 33, 33, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:19:25,303 INFO L371 AbstractCegarLoop]: === Iteration 21 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 13:19:25,303 INFO L82 PathProgramCache]: Analyzing trace with hash -825440932, now seen corresponding path program 12 times [2018-01-24 13:19:25,303 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:19:25,304 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:25,304 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:19:25,304 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:25,304 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:19:25,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:19:25,326 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:19:26,128 INFO L134 CoverageAnalysis]: Checked inductivity of 3918 backedges. 1170 proven. 114 refuted. 0 times theorem prover too weak. 2634 trivial. 0 not checked. [2018-01-24 13:19:26,129 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:26,129 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:19:26,134 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-24 13:19:26,134 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-24 13:19:26,152 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:26,164 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:26,169 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:26,171 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:26,176 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:26,183 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:26,192 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:26,208 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:26,216 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:26,250 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:26,262 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:26,265 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:19:26,269 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:26,273 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:19:26,274 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:19:26,284 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:19:26,285 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 13:19:26,831 INFO L134 CoverageAnalysis]: Checked inductivity of 3918 backedges. 1264 proven. 821 refuted. 0 times theorem prover too weak. 1833 trivial. 0 not checked. [2018-01-24 13:19:26,832 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:27,222 INFO L134 CoverageAnalysis]: Checked inductivity of 3918 backedges. 1206 proven. 172 refuted. 0 times theorem prover too weak. 2540 trivial. 0 not checked. [2018-01-24 13:19:27,248 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:27,249 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 32 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:19:27,254 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-24 13:19:27,254 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-24 13:19:27,290 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:27,304 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:27,325 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:27,351 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:27,391 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:27,472 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:27,611 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:27,828 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:28,220 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:29,097 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:30,457 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:19:30,523 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:19:30,535 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:30,538 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:19:30,538 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:19:30,547 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:19:30,548 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 13:19:31,021 INFO L134 CoverageAnalysis]: Checked inductivity of 3918 backedges. 1170 proven. 114 refuted. 0 times theorem prover too weak. 2634 trivial. 0 not checked. [2018-01-24 13:19:31,021 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:31,265 INFO L134 CoverageAnalysis]: Checked inductivity of 3918 backedges. 1170 proven. 114 refuted. 0 times theorem prover too weak. 2634 trivial. 0 not checked. [2018-01-24 13:19:31,267 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:19:31,268 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 22, 16, 11, 10] total 60 [2018-01-24 13:19:31,268 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:19:31,269 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-01-24 13:19:31,269 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-01-24 13:19:31,270 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=601, Invalid=3059, Unknown=0, NotChecked=0, Total=3660 [2018-01-24 13:19:31,270 INFO L87 Difference]: Start difference. First operand 295 states and 297 transitions. Second operand 33 states. [2018-01-24 13:19:32,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:19:32,103 INFO L93 Difference]: Finished difference Result 306 states and 308 transitions. [2018-01-24 13:19:32,103 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-24 13:19:32,104 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 287 [2018-01-24 13:19:32,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:19:32,106 INFO L225 Difference]: With dead ends: 306 [2018-01-24 13:19:32,106 INFO L226 Difference]: Without dead ends: 305 [2018-01-24 13:19:32,107 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 1176 GetRequests, 1075 SyntacticMatches, 24 SemanticMatches, 77 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2418 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=1109, Invalid=5053, Unknown=0, NotChecked=0, Total=6162 [2018-01-24 13:19:32,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 305 states. [2018-01-24 13:19:32,133 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 305 to 297. [2018-01-24 13:19:32,133 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 297 states. [2018-01-24 13:19:32,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 297 states to 297 states and 299 transitions. [2018-01-24 13:19:32,135 INFO L78 Accepts]: Start accepts. Automaton has 297 states and 299 transitions. Word has length 287 [2018-01-24 13:19:32,136 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:19:32,136 INFO L432 AbstractCegarLoop]: Abstraction has 297 states and 299 transitions. [2018-01-24 13:19:32,136 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-01-24 13:19:32,136 INFO L276 IsEmpty]: Start isEmpty. Operand 297 states and 299 transitions. [2018-01-24 13:19:32,138 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 294 [2018-01-24 13:19:32,138 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:19:32,138 INFO L322 BasicCegarLoop]: trace histogram [41, 35, 35, 34, 34, 34, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:19:32,138 INFO L371 AbstractCegarLoop]: === Iteration 22 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 13:19:32,139 INFO L82 PathProgramCache]: Analyzing trace with hash 1751572516, now seen corresponding path program 13 times [2018-01-24 13:19:32,139 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:19:32,139 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:32,140 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:19:32,140 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:32,140 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:19:32,169 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:19:32,171 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:19:32,739 INFO L134 CoverageAnalysis]: Checked inductivity of 4132 backedges. 1344 proven. 154 refuted. 0 times theorem prover too weak. 2634 trivial. 0 not checked. [2018-01-24 13:19:32,740 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:32,740 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:19:32,745 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:19:32,745 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:19:32,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:19:32,830 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:32,837 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:19:32,837 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:19:32,843 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:19:32,843 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 13:19:33,202 INFO L134 CoverageAnalysis]: Checked inductivity of 4132 backedges. 1344 proven. 154 refuted. 0 times theorem prover too weak. 2634 trivial. 0 not checked. [2018-01-24 13:19:33,202 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:33,459 INFO L134 CoverageAnalysis]: Checked inductivity of 4132 backedges. 1344 proven. 154 refuted. 0 times theorem prover too weak. 2634 trivial. 0 not checked. [2018-01-24 13:19:33,479 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:33,480 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 34 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:19:33,482 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:19:33,483 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:19:33,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:19:33,606 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:33,609 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:19:33,610 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:19:33,620 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:19:33,620 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 13:19:33,934 INFO L134 CoverageAnalysis]: Checked inductivity of 4132 backedges. 1344 proven. 154 refuted. 0 times theorem prover too weak. 2634 trivial. 0 not checked. [2018-01-24 13:19:33,935 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:34,036 INFO L134 CoverageAnalysis]: Checked inductivity of 4132 backedges. 1344 proven. 154 refuted. 0 times theorem prover too weak. 2634 trivial. 0 not checked. [2018-01-24 13:19:34,038 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:19:34,038 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 11, 12, 11] total 30 [2018-01-24 13:19:34,038 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:19:34,038 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-24 13:19:34,039 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-24 13:19:34,039 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=216, Invalid=714, Unknown=0, NotChecked=0, Total=930 [2018-01-24 13:19:34,039 INFO L87 Difference]: Start difference. First operand 297 states and 299 transitions. Second operand 21 states. [2018-01-24 13:19:34,417 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:19:34,418 INFO L93 Difference]: Finished difference Result 322 states and 326 transitions. [2018-01-24 13:19:34,418 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-24 13:19:34,418 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 293 [2018-01-24 13:19:34,419 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:19:34,420 INFO L225 Difference]: With dead ends: 322 [2018-01-24 13:19:34,421 INFO L226 Difference]: Without dead ends: 321 [2018-01-24 13:19:34,421 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 1190 GetRequests, 1126 SyntacticMatches, 27 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 547 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=369, Invalid=1113, Unknown=0, NotChecked=0, Total=1482 [2018-01-24 13:19:34,421 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 321 states. [2018-01-24 13:19:34,439 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 321 to 303. [2018-01-24 13:19:34,440 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 303 states. [2018-01-24 13:19:34,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 303 states to 303 states and 306 transitions. [2018-01-24 13:19:34,441 INFO L78 Accepts]: Start accepts. Automaton has 303 states and 306 transitions. Word has length 293 [2018-01-24 13:19:34,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:19:34,441 INFO L432 AbstractCegarLoop]: Abstraction has 303 states and 306 transitions. [2018-01-24 13:19:34,441 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-24 13:19:34,441 INFO L276 IsEmpty]: Start isEmpty. Operand 303 states and 306 transitions. [2018-01-24 13:19:34,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 300 [2018-01-24 13:19:34,443 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:19:34,443 INFO L322 BasicCegarLoop]: trace histogram [42, 36, 36, 35, 35, 35, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:19:34,443 INFO L371 AbstractCegarLoop]: === Iteration 23 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 13:19:34,443 INFO L82 PathProgramCache]: Analyzing trace with hash -1671183124, now seen corresponding path program 14 times [2018-01-24 13:19:34,443 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:19:34,444 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:34,444 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:19:34,444 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:34,444 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:19:34,466 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:19:34,468 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:19:35,347 INFO L134 CoverageAnalysis]: Checked inductivity of 4352 backedges. 1688 proven. 144 refuted. 0 times theorem prover too weak. 2520 trivial. 0 not checked. [2018-01-24 13:19:35,348 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:35,348 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:19:35,354 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:19:35,354 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:19:35,371 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:35,408 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:35,418 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:19:35,422 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:35,705 INFO L134 CoverageAnalysis]: Checked inductivity of 4352 backedges. 1718 proven. 114 refuted. 0 times theorem prover too weak. 2520 trivial. 0 not checked. [2018-01-24 13:19:35,705 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:35,938 INFO L134 CoverageAnalysis]: Checked inductivity of 4352 backedges. 1718 proven. 114 refuted. 0 times theorem prover too weak. 2520 trivial. 0 not checked. [2018-01-24 13:19:35,958 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:35,958 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 36 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:19:35,961 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:19:35,961 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:19:35,981 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:36,053 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:19:36,098 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:19:36,107 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:36,163 INFO L134 CoverageAnalysis]: Checked inductivity of 4352 backedges. 1718 proven. 114 refuted. 0 times theorem prover too weak. 2520 trivial. 0 not checked. [2018-01-24 13:19:36,163 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:36,307 INFO L134 CoverageAnalysis]: Checked inductivity of 4352 backedges. 1718 proven. 114 refuted. 0 times theorem prover too weak. 2520 trivial. 0 not checked. [2018-01-24 13:19:36,309 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:19:36,310 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 19, 19, 19, 19] total 47 [2018-01-24 13:19:36,310 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:19:36,310 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-24 13:19:36,311 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-24 13:19:36,311 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=367, Invalid=1795, Unknown=0, NotChecked=0, Total=2162 [2018-01-24 13:19:36,311 INFO L87 Difference]: Start difference. First operand 303 states and 306 transitions. Second operand 38 states. [2018-01-24 13:19:36,867 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:19:36,867 INFO L93 Difference]: Finished difference Result 449 states and 459 transitions. [2018-01-24 13:19:36,867 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-24 13:19:36,867 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 299 [2018-01-24 13:19:36,868 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:19:36,869 INFO L225 Difference]: With dead ends: 449 [2018-01-24 13:19:36,869 INFO L226 Difference]: Without dead ends: 377 [2018-01-24 13:19:36,870 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 1230 GetRequests, 1153 SyntacticMatches, 17 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1686 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=808, Invalid=2974, Unknown=0, NotChecked=0, Total=3782 [2018-01-24 13:19:36,870 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 377 states. [2018-01-24 13:19:36,893 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 377 to 369. [2018-01-24 13:19:36,893 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 369 states. [2018-01-24 13:19:36,894 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 369 states to 369 states and 373 transitions. [2018-01-24 13:19:36,894 INFO L78 Accepts]: Start accepts. Automaton has 369 states and 373 transitions. Word has length 299 [2018-01-24 13:19:36,895 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:19:36,895 INFO L432 AbstractCegarLoop]: Abstraction has 369 states and 373 transitions. [2018-01-24 13:19:36,895 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-24 13:19:36,895 INFO L276 IsEmpty]: Start isEmpty. Operand 369 states and 373 transitions. [2018-01-24 13:19:36,896 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 354 [2018-01-24 13:19:36,896 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:19:36,896 INFO L322 BasicCegarLoop]: trace histogram [50, 43, 43, 42, 42, 42, 8, 8, 8, 8, 8, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:19:36,896 INFO L371 AbstractCegarLoop]: === Iteration 24 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 13:19:36,897 INFO L82 PathProgramCache]: Analyzing trace with hash 1483763557, now seen corresponding path program 15 times [2018-01-24 13:19:36,897 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:19:36,897 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:36,897 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:19:36,897 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:19:36,897 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:19:36,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:19:36,921 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:19:37,683 INFO L134 CoverageAnalysis]: Checked inductivity of 6223 backedges. 3971 proven. 561 refuted. 0 times theorem prover too weak. 1691 trivial. 0 not checked. [2018-01-24 13:19:37,683 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:37,683 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:19:37,689 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 13:19:37,689 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 13:19:37,706 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:37,710 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:37,714 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:37,719 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:37,726 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:37,736 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:37,745 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:37,758 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:37,770 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:37,772 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:19:37,777 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:38,167 INFO L134 CoverageAnalysis]: Checked inductivity of 6223 backedges. 3075 proven. 508 refuted. 0 times theorem prover too weak. 2640 trivial. 0 not checked. [2018-01-24 13:19:38,168 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:38,722 INFO L134 CoverageAnalysis]: Checked inductivity of 6223 backedges. 3075 proven. 508 refuted. 0 times theorem prover too weak. 2640 trivial. 0 not checked. [2018-01-24 13:19:38,743 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:19:38,743 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 38 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:19:38,746 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 13:19:38,746 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 13:19:38,774 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:38,784 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:38,805 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:38,844 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:38,917 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:39,061 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:39,402 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:39,968 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:41,135 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:19:41,197 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:19:41,207 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:19:41,308 INFO L134 CoverageAnalysis]: Checked inductivity of 6223 backedges. 3075 proven. 508 refuted. 0 times theorem prover too weak. 2640 trivial. 0 not checked. [2018-01-24 13:19:41,308 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:19:41,500 INFO L134 CoverageAnalysis]: Checked inductivity of 6223 backedges. 3075 proven. 508 refuted. 0 times theorem prover too weak. 2640 trivial. 0 not checked. [2018-01-24 13:19:41,502 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:19:41,503 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 23, 23, 23, 23] total 61 [2018-01-24 13:19:41,503 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:19:41,504 INFO L409 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-01-24 13:19:41,504 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-01-24 13:19:41,505 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=468, Invalid=3192, Unknown=0, NotChecked=0, Total=3660 [2018-01-24 13:19:41,505 INFO L87 Difference]: Start difference. First operand 369 states and 373 transitions. Second operand 44 states. Received shutdown request... [2018-01-24 13:19:43,228 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2018-01-24 13:19:43,229 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-24 13:19:43,233 WARN L187 ceAbstractionStarter]: Timeout [2018-01-24 13:19:43,233 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.01 01:19:43 BoogieIcfgContainer [2018-01-24 13:19:43,233 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-24 13:19:43,234 INFO L168 Benchmark]: Toolchain (without parser) took 46872.86 ms. Allocated memory was 305.1 MB in the beginning and 951.1 MB in the end (delta: 645.9 MB). Free memory was 266.2 MB in the beginning and 800.3 MB in the end (delta: -534.1 MB). Peak memory consumption was 111.8 MB. Max. memory is 5.3 GB. [2018-01-24 13:19:43,235 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 305.1 MB. Free memory is still 271.2 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-24 13:19:43,235 INFO L168 Benchmark]: CACSL2BoogieTranslator took 197.48 ms. Allocated memory is still 305.1 MB. Free memory was 265.2 MB in the beginning and 257.2 MB in the end (delta: 8.0 MB). Peak memory consumption was 8.0 MB. Max. memory is 5.3 GB. [2018-01-24 13:19:43,236 INFO L168 Benchmark]: Boogie Preprocessor took 31.24 ms. Allocated memory is still 305.1 MB. Free memory was 257.2 MB in the beginning and 255.1 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 5.3 GB. [2018-01-24 13:19:43,236 INFO L168 Benchmark]: RCFGBuilder took 265.44 ms. Allocated memory is still 305.1 MB. Free memory was 255.1 MB in the beginning and 240.4 MB in the end (delta: 14.7 MB). Peak memory consumption was 14.7 MB. Max. memory is 5.3 GB. [2018-01-24 13:19:43,236 INFO L168 Benchmark]: TraceAbstraction took 46370.75 ms. Allocated memory was 305.1 MB in the beginning and 951.1 MB in the end (delta: 645.9 MB). Free memory was 239.4 MB in the beginning and 800.3 MB in the end (delta: -560.9 MB). Peak memory consumption was 85.0 MB. Max. memory is 5.3 GB. [2018-01-24 13:19:43,238 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 305.1 MB. Free memory is still 271.2 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 197.48 ms. Allocated memory is still 305.1 MB. Free memory was 265.2 MB in the beginning and 257.2 MB in the end (delta: 8.0 MB). Peak memory consumption was 8.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 31.24 ms. Allocated memory is still 305.1 MB. Free memory was 257.2 MB in the beginning and 255.1 MB in the end (delta: 2.1 MB). Peak memory consumption was 2.1 MB. Max. memory is 5.3 GB. * RCFGBuilder took 265.44 ms. Allocated memory is still 305.1 MB. Free memory was 255.1 MB in the beginning and 240.4 MB in the end (delta: 14.7 MB). Peak memory consumption was 14.7 MB. Max. memory is 5.3 GB. * TraceAbstraction took 46370.75 ms. Allocated memory was 305.1 MB in the beginning and 951.1 MB in the end (delta: 645.9 MB). Free memory was 239.4 MB in the beginning and 800.3 MB in the end (delta: -560.9 MB). Peak memory consumption was 85.0 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 18). Cancelled while BasicCegarLoop was constructing difference of abstraction (369states) and interpolant automaton (currently 45 states, 44 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 26. - TimeoutResultAtElement [Line: 18]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 18). Cancelled while BasicCegarLoop was constructing difference of abstraction (369states) and interpolant automaton (currently 45 states, 44 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 26. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 18). Cancelled while BasicCegarLoop was constructing difference of abstraction (369states) and interpolant automaton (currently 45 states, 44 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 26. - TimeoutResultAtElement [Line: 27]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 27). Cancelled while BasicCegarLoop was constructing difference of abstraction (369states) and interpolant automaton (currently 45 states, 44 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 26. - TimeoutResultAtElement [Line: 23]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 23). Cancelled while BasicCegarLoop was constructing difference of abstraction (369states) and interpolant automaton (currently 45 states, 44 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 26. - TimeoutResultAtElement [Line: 30]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 30). Cancelled while BasicCegarLoop was constructing difference of abstraction (369states) and interpolant automaton (currently 45 states, 44 states before enhancement), while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 26. - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 46 locations, 6 error locations. TIMEOUT Result, 46.3s OverallTime, 24 OverallIterations, 50 TraceHistogramMax, 12.2s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 811 SDtfs, 4189 SDslu, 5323 SDs, 0 SdLazy, 8048 SolverSat, 720 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 3.6s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 12731 GetRequests, 11621 SyntacticMatches, 222 SemanticMatches, 887 ConstructedPredicates, 2 IntricatePredicates, 0 DeprecatedPredicates, 19871 ImplicationChecksByTransitivity, 20.1s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=369occurred in iteration=23, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.3s AutomataMinimizationTime, 23 MinimizatonAttempts, 209 StatesRemovedByMinimization, 20 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 11.7s SatisfiabilityAnalysisTime, 20.0s InterpolantComputationTime, 9275 NumberOfCodeBlocks, 8849 NumberOfCodeBlocksAsserted, 155 NumberOfCheckSat, 15282 ConstructedInterpolants, 1462 QuantifiedInterpolants, 13819896 SizeOfPredicates, 134 NumberOfNonLiveVariables, 13012 ConjunctsInSsa, 574 ConjunctsInUnsatCore, 98 InterpolantComputations, 9 PerfectInterpolantSequences, 151188/163101 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/ArraysWithLenghtAtDeclaration_false-valid-deref-read.c_svcomp-DerefFreeMemtrack-32bit-Automizer_RubberTaipan+AI_EQ.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-24_13-19-43-246.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/ArraysWithLenghtAtDeclaration_false-valid-deref-read.c_svcomp-DerefFreeMemtrack-32bit-Automizer_RubberTaipan+AI_EQ.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-24_13-19-43-246.csv Completed graceful shutdown