java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_RubberTaipan+AI_EQ.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_3_false-valid-deref.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-24 13:21:14,513 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-24 13:21:14,514 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-24 13:21:14,528 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-24 13:21:14,528 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-24 13:21:14,529 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-24 13:21:14,531 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-24 13:21:14,532 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-24 13:21:14,534 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-24 13:21:14,535 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-24 13:21:14,536 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-24 13:21:14,536 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-24 13:21:14,537 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-24 13:21:14,539 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-24 13:21:14,539 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-24 13:21:14,542 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-24 13:21:14,544 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-24 13:21:14,546 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-24 13:21:14,547 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-24 13:21:14,548 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-24 13:21:14,550 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-24 13:21:14,551 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-24 13:21:14,551 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-24 13:21:14,552 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-24 13:21:14,553 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-24 13:21:14,554 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-24 13:21:14,554 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-24 13:21:14,555 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-24 13:21:14,555 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-24 13:21:14,555 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-24 13:21:14,556 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-24 13:21:14,556 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_RubberTaipan+AI_EQ.epf [2018-01-24 13:21:14,565 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-24 13:21:14,566 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-24 13:21:14,567 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-24 13:21:14,567 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-24 13:21:14,567 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-24 13:21:14,567 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-24 13:21:14,568 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-24 13:21:14,568 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-24 13:21:14,568 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-24 13:21:14,569 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-24 13:21:14,569 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-24 13:21:14,569 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-24 13:21:14,569 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-24 13:21:14,569 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-24 13:21:14,570 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-24 13:21:14,570 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-24 13:21:14,570 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-24 13:21:14,570 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-24 13:21:14,570 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-24 13:21:14,571 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-24 13:21:14,571 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-24 13:21:14,571 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-24 13:21:14,571 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-24 13:21:14,571 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 13:21:14,572 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-24 13:21:14,572 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-24 13:21:14,572 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-24 13:21:14,572 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-24 13:21:14,572 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-01-24 13:21:14,573 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-24 13:21:14,573 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-24 13:21:14,573 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-24 13:21:14,574 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-24 13:21:14,574 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-24 13:21:14,609 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-24 13:21:14,622 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-24 13:21:14,626 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-24 13:21:14,628 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-24 13:21:14,628 INFO L276 PluginConnector]: CDTParser initialized [2018-01-24 13:21:14,629 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_3_false-valid-deref.i [2018-01-24 13:21:14,823 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-24 13:21:14,829 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-24 13:21:14,829 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-24 13:21:14,830 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-24 13:21:14,835 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-24 13:21:14,835 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 01:21:14" (1/1) ... [2018-01-24 13:21:14,838 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@36d2d7ac and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:21:14, skipping insertion in model container [2018-01-24 13:21:14,838 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 01:21:14" (1/1) ... [2018-01-24 13:21:14,853 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 13:21:14,902 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 13:21:15,022 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 13:21:15,044 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 13:21:15,053 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:21:15 WrapperNode [2018-01-24 13:21:15,053 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-24 13:21:15,054 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-24 13:21:15,054 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-24 13:21:15,054 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-24 13:21:15,067 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:21:15" (1/1) ... [2018-01-24 13:21:15,067 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:21:15" (1/1) ... [2018-01-24 13:21:15,080 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:21:15" (1/1) ... [2018-01-24 13:21:15,080 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:21:15" (1/1) ... [2018-01-24 13:21:15,089 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:21:15" (1/1) ... [2018-01-24 13:21:15,092 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:21:15" (1/1) ... [2018-01-24 13:21:15,094 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:21:15" (1/1) ... [2018-01-24 13:21:15,096 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-24 13:21:15,096 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-24 13:21:15,096 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-24 13:21:15,097 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-24 13:21:15,097 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:21:15" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 13:21:15,148 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-24 13:21:15,148 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-24 13:21:15,149 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-01-24 13:21:15,149 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-01-24 13:21:15,149 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-01-24 13:21:15,149 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-01-24 13:21:15,149 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-01-24 13:21:15,149 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-01-24 13:21:15,149 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-01-24 13:21:15,149 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-01-24 13:21:15,149 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-01-24 13:21:15,150 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-01-24 13:21:15,150 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-01-24 13:21:15,150 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-01-24 13:21:15,150 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-01-24 13:21:15,150 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-01-24 13:21:15,150 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-24 13:21:15,150 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-24 13:21:15,150 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-24 13:21:15,150 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-24 13:21:15,150 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-24 13:21:15,151 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-24 13:21:15,151 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-24 13:21:15,151 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-24 13:21:15,151 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-24 13:21:15,151 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-24 13:21:15,151 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-24 13:21:15,151 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-24 13:21:15,151 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-24 13:21:15,152 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-24 13:21:15,152 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-01-24 13:21:15,152 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-01-24 13:21:15,152 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-01-24 13:21:15,152 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-01-24 13:21:15,152 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-01-24 13:21:15,152 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-01-24 13:21:15,152 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-01-24 13:21:15,152 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-01-24 13:21:15,152 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-01-24 13:21:15,152 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-01-24 13:21:15,153 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-01-24 13:21:15,153 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-01-24 13:21:15,153 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-01-24 13:21:15,153 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-01-24 13:21:15,153 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-24 13:21:15,153 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-24 13:21:15,153 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-24 13:21:15,393 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-01-24 13:21:15,533 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-24 13:21:15,533 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 01:21:15 BoogieIcfgContainer [2018-01-24 13:21:15,534 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-24 13:21:15,535 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-24 13:21:15,535 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-24 13:21:15,537 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-24 13:21:15,537 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.01 01:21:14" (1/3) ... [2018-01-24 13:21:15,538 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2b7e0242 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 01:21:15, skipping insertion in model container [2018-01-24 13:21:15,538 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:21:15" (2/3) ... [2018-01-24 13:21:15,538 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@2b7e0242 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 01:21:15, skipping insertion in model container [2018-01-24 13:21:15,539 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 01:21:15" (3/3) ... [2018-01-24 13:21:15,540 INFO L105 eAbstractionObserver]: Analyzing ICFG memleaks_test22_3_false-valid-deref.i [2018-01-24 13:21:15,548 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-24 13:21:15,555 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 19 error locations. [2018-01-24 13:21:15,596 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-24 13:21:15,596 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-24 13:21:15,596 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-24 13:21:15,596 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-24 13:21:15,596 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-24 13:21:15,597 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-24 13:21:15,597 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-24 13:21:15,597 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-24 13:21:15,597 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-24 13:21:15,617 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states. [2018-01-24 13:21:15,623 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-24 13:21:15,623 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:21:15,624 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:21:15,624 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:21:15,628 INFO L82 PathProgramCache]: Analyzing trace with hash 556227080, now seen corresponding path program 1 times [2018-01-24 13:21:15,630 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:21:15,678 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:15,679 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:15,679 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:15,679 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:21:15,729 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:15,737 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:21:15,866 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:15,959 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:21:15,959 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 13:21:15,959 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:21:15,964 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:21:15,975 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:21:15,976 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:21:15,978 INFO L87 Difference]: Start difference. First operand 119 states. Second operand 5 states. [2018-01-24 13:21:16,053 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:21:16,053 INFO L93 Difference]: Finished difference Result 226 states and 241 transitions. [2018-01-24 13:21:16,054 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 13:21:16,055 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-01-24 13:21:16,055 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:21:16,066 INFO L225 Difference]: With dead ends: 226 [2018-01-24 13:21:16,066 INFO L226 Difference]: Without dead ends: 122 [2018-01-24 13:21:16,070 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:21:16,084 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-01-24 13:21:16,107 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 120. [2018-01-24 13:21:16,108 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-01-24 13:21:16,110 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 128 transitions. [2018-01-24 13:21:16,112 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 128 transitions. Word has length 17 [2018-01-24 13:21:16,112 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:21:16,112 INFO L432 AbstractCegarLoop]: Abstraction has 120 states and 128 transitions. [2018-01-24 13:21:16,112 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:21:16,113 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 128 transitions. [2018-01-24 13:21:16,113 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 13:21:16,113 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:21:16,113 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:21:16,113 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:21:16,114 INFO L82 PathProgramCache]: Analyzing trace with hash -1895274134, now seen corresponding path program 1 times [2018-01-24 13:21:16,114 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:21:16,115 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:16,116 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:16,116 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:16,116 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:21:16,139 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:16,141 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:21:16,211 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:16,212 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:21:16,212 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 13:21:16,212 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:21:16,214 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 13:21:16,214 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 13:21:16,214 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:21:16,215 INFO L87 Difference]: Start difference. First operand 120 states and 128 transitions. Second operand 6 states. [2018-01-24 13:21:16,367 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:21:16,367 INFO L93 Difference]: Finished difference Result 122 states and 130 transitions. [2018-01-24 13:21:16,367 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:21:16,367 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-01-24 13:21:16,368 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:21:16,369 INFO L225 Difference]: With dead ends: 122 [2018-01-24 13:21:16,369 INFO L226 Difference]: Without dead ends: 121 [2018-01-24 13:21:16,370 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:21:16,370 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-01-24 13:21:16,378 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 119. [2018-01-24 13:21:16,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-01-24 13:21:16,379 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 127 transitions. [2018-01-24 13:21:16,379 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 127 transitions. Word has length 19 [2018-01-24 13:21:16,380 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:21:16,380 INFO L432 AbstractCegarLoop]: Abstraction has 119 states and 127 transitions. [2018-01-24 13:21:16,380 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 13:21:16,380 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 127 transitions. [2018-01-24 13:21:16,380 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 13:21:16,380 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:21:16,381 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:21:16,381 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:21:16,381 INFO L82 PathProgramCache]: Analyzing trace with hash -1895274133, now seen corresponding path program 1 times [2018-01-24 13:21:16,381 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:21:16,382 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:16,382 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:16,382 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:16,382 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:21:16,401 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:16,402 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:21:16,628 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:16,628 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:21:16,628 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 13:21:16,628 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:21:16,629 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 13:21:16,629 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 13:21:16,629 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:21:16,629 INFO L87 Difference]: Start difference. First operand 119 states and 127 transitions. Second operand 7 states. [2018-01-24 13:21:16,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:21:16,851 INFO L93 Difference]: Finished difference Result 121 states and 129 transitions. [2018-01-24 13:21:16,851 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 13:21:16,851 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-01-24 13:21:16,852 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:21:16,854 INFO L225 Difference]: With dead ends: 121 [2018-01-24 13:21:16,854 INFO L226 Difference]: Without dead ends: 120 [2018-01-24 13:21:16,854 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-01-24 13:21:16,855 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-01-24 13:21:16,865 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 118. [2018-01-24 13:21:16,866 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-01-24 13:21:16,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 126 transitions. [2018-01-24 13:21:16,868 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 126 transitions. Word has length 19 [2018-01-24 13:21:16,868 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:21:16,868 INFO L432 AbstractCegarLoop]: Abstraction has 118 states and 126 transitions. [2018-01-24 13:21:16,869 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 13:21:16,869 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 126 transitions. [2018-01-24 13:21:16,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-24 13:21:16,870 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:21:16,870 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:21:16,870 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:21:16,871 INFO L82 PathProgramCache]: Analyzing trace with hash 1715794329, now seen corresponding path program 1 times [2018-01-24 13:21:16,871 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:21:16,872 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:16,872 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:16,872 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:16,873 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:21:16,897 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:16,898 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:21:17,018 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:17,018 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:21:17,018 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-24 13:21:17,018 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:21:17,019 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 13:21:17,019 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 13:21:17,019 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:21:17,019 INFO L87 Difference]: Start difference. First operand 118 states and 126 transitions. Second operand 7 states. [2018-01-24 13:21:17,111 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:21:17,111 INFO L93 Difference]: Finished difference Result 188 states and 203 transitions. [2018-01-24 13:21:17,112 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 13:21:17,112 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 29 [2018-01-24 13:21:17,112 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:21:17,114 INFO L225 Difference]: With dead ends: 188 [2018-01-24 13:21:17,114 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 13:21:17,118 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-01-24 13:21:17,119 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 13:21:17,131 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 127. [2018-01-24 13:21:17,132 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-01-24 13:21:17,133 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 136 transitions. [2018-01-24 13:21:17,133 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 136 transitions. Word has length 29 [2018-01-24 13:21:17,133 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:21:17,134 INFO L432 AbstractCegarLoop]: Abstraction has 127 states and 136 transitions. [2018-01-24 13:21:17,134 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 13:21:17,134 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 136 transitions. [2018-01-24 13:21:17,135 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 13:21:17,135 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:21:17,135 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:21:17,135 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:21:17,135 INFO L82 PathProgramCache]: Analyzing trace with hash -785661208, now seen corresponding path program 1 times [2018-01-24 13:21:17,135 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:21:17,137 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:17,137 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:17,137 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:17,137 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:21:17,157 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:17,158 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:21:17,269 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:17,269 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:21:17,269 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 13:21:17,270 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:21:17,270 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 13:21:17,270 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 13:21:17,271 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:21:17,271 INFO L87 Difference]: Start difference. First operand 127 states and 136 transitions. Second operand 10 states. [2018-01-24 13:21:17,494 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:21:17,495 INFO L93 Difference]: Finished difference Result 127 states and 136 transitions. [2018-01-24 13:21:17,495 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 13:21:17,495 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 34 [2018-01-24 13:21:17,495 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:21:17,497 INFO L225 Difference]: With dead ends: 127 [2018-01-24 13:21:17,497 INFO L226 Difference]: Without dead ends: 126 [2018-01-24 13:21:17,497 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 13:21:17,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-01-24 13:21:17,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 126. [2018-01-24 13:21:17,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-01-24 13:21:17,510 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 135 transitions. [2018-01-24 13:21:17,510 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 135 transitions. Word has length 34 [2018-01-24 13:21:17,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:21:17,511 INFO L432 AbstractCegarLoop]: Abstraction has 126 states and 135 transitions. [2018-01-24 13:21:17,511 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 13:21:17,511 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 135 transitions. [2018-01-24 13:21:17,512 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 13:21:17,512 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:21:17,513 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:21:17,513 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:21:17,513 INFO L82 PathProgramCache]: Analyzing trace with hash -785661207, now seen corresponding path program 1 times [2018-01-24 13:21:17,513 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:21:17,514 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:17,514 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:17,514 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:17,514 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:21:17,529 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:17,530 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:21:17,566 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:17,566 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:21:17,566 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:21:17,566 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:21:17,566 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 13:21:17,567 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 13:21:17,567 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 13:21:17,567 INFO L87 Difference]: Start difference. First operand 126 states and 135 transitions. Second operand 4 states. [2018-01-24 13:21:17,587 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:21:17,588 INFO L93 Difference]: Finished difference Result 218 states and 233 transitions. [2018-01-24 13:21:17,588 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 13:21:17,588 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2018-01-24 13:21:17,589 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:21:17,590 INFO L225 Difference]: With dead ends: 218 [2018-01-24 13:21:17,590 INFO L226 Difference]: Without dead ends: 127 [2018-01-24 13:21:17,591 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:21:17,592 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-01-24 13:21:17,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2018-01-24 13:21:17,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-01-24 13:21:17,604 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 136 transitions. [2018-01-24 13:21:17,604 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 136 transitions. Word has length 34 [2018-01-24 13:21:17,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:21:17,605 INFO L432 AbstractCegarLoop]: Abstraction has 127 states and 136 transitions. [2018-01-24 13:21:17,605 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 13:21:17,605 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 136 transitions. [2018-01-24 13:21:17,606 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-24 13:21:17,606 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:21:17,606 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:21:17,606 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:21:17,607 INFO L82 PathProgramCache]: Analyzing trace with hash -1322241719, now seen corresponding path program 1 times [2018-01-24 13:21:17,607 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:21:17,608 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:17,608 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:17,608 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:17,609 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:21:17,618 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:17,619 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:21:17,649 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-24 13:21:17,650 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:21:17,650 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 13:21:17,650 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:21:17,650 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 13:21:17,650 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 13:21:17,650 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 13:21:17,651 INFO L87 Difference]: Start difference. First operand 127 states and 136 transitions. Second operand 3 states. [2018-01-24 13:21:17,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:21:17,760 INFO L93 Difference]: Finished difference Result 144 states and 155 transitions. [2018-01-24 13:21:17,760 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 13:21:17,760 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 32 [2018-01-24 13:21:17,760 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:21:17,761 INFO L225 Difference]: With dead ends: 144 [2018-01-24 13:21:17,761 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 13:21:17,762 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 13:21:17,762 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 13:21:17,771 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 123. [2018-01-24 13:21:17,772 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-01-24 13:21:17,773 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 131 transitions. [2018-01-24 13:21:17,773 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 131 transitions. Word has length 32 [2018-01-24 13:21:17,774 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:21:17,774 INFO L432 AbstractCegarLoop]: Abstraction has 123 states and 131 transitions. [2018-01-24 13:21:17,774 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 13:21:17,774 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 131 transitions. [2018-01-24 13:21:17,775 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-24 13:21:17,775 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:21:17,775 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:21:17,775 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:21:17,775 INFO L82 PathProgramCache]: Analyzing trace with hash 1082750419, now seen corresponding path program 1 times [2018-01-24 13:21:17,775 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:21:17,776 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:17,776 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:17,776 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:17,776 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:21:17,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:17,793 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:21:17,858 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:17,859 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:21:17,859 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:21:17,871 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:17,871 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:21:17,919 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:17,931 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:21:17,974 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:17,975 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:21:18,077 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:18,112 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:21:18,112 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:21:18,120 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:18,121 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:21:18,187 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:18,194 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:21:18,201 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:18,202 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:21:18,264 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:18,316 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:21:18,316 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-24 13:21:18,316 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:21:18,317 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 13:21:18,317 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 13:21:18,317 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-01-24 13:21:18,317 INFO L87 Difference]: Start difference. First operand 123 states and 131 transitions. Second operand 6 states. [2018-01-24 13:21:18,349 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:21:18,349 INFO L93 Difference]: Finished difference Result 215 states and 229 transitions. [2018-01-24 13:21:18,349 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 13:21:18,349 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-01-24 13:21:18,350 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:21:18,351 INFO L225 Difference]: With dead ends: 215 [2018-01-24 13:21:18,351 INFO L226 Difference]: Without dead ends: 124 [2018-01-24 13:21:18,352 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 134 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:21:18,352 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-01-24 13:21:18,362 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 124. [2018-01-24 13:21:18,363 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-01-24 13:21:18,364 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 132 transitions. [2018-01-24 13:21:18,364 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 132 transitions. Word has length 35 [2018-01-24 13:21:18,365 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:21:18,365 INFO L432 AbstractCegarLoop]: Abstraction has 124 states and 132 transitions. [2018-01-24 13:21:18,365 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 13:21:18,365 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 132 transitions. [2018-01-24 13:21:18,366 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 13:21:18,366 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:21:18,366 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:21:18,367 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:21:18,367 INFO L82 PathProgramCache]: Analyzing trace with hash -1962528345, now seen corresponding path program 1 times [2018-01-24 13:21:18,367 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:21:18,368 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:18,369 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:18,369 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:18,369 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:21:18,377 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:18,379 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:21:18,440 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-24 13:21:18,441 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:21:18,441 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 13:21:18,441 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:21:18,441 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 13:21:18,442 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 13:21:18,442 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:21:18,442 INFO L87 Difference]: Start difference. First operand 124 states and 132 transitions. Second operand 6 states. [2018-01-24 13:21:18,486 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:21:18,486 INFO L93 Difference]: Finished difference Result 128 states and 135 transitions. [2018-01-24 13:21:18,487 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:21:18,487 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2018-01-24 13:21:18,487 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:21:18,488 INFO L225 Difference]: With dead ends: 128 [2018-01-24 13:21:18,489 INFO L226 Difference]: Without dead ends: 115 [2018-01-24 13:21:18,489 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:21:18,490 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-01-24 13:21:18,498 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 115. [2018-01-24 13:21:18,498 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-01-24 13:21:18,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 121 transitions. [2018-01-24 13:21:18,499 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 121 transitions. Word has length 34 [2018-01-24 13:21:18,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:21:18,500 INFO L432 AbstractCegarLoop]: Abstraction has 115 states and 121 transitions. [2018-01-24 13:21:18,500 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 13:21:18,500 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 121 transitions. [2018-01-24 13:21:18,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 13:21:18,501 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:21:18,501 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:21:18,501 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:21:18,501 INFO L82 PathProgramCache]: Analyzing trace with hash -1126031319, now seen corresponding path program 2 times [2018-01-24 13:21:18,502 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:21:18,503 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:18,503 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:18,503 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:18,503 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:21:18,518 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:18,520 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:21:18,598 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:18,598 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:21:18,599 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:21:18,607 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:21:18,607 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:21:18,635 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:21:18,639 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:21:18,643 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:21:18,677 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 13:21:18,680 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:21:18,699 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 13:21:18,699 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:21:18,724 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 13:21:18,725 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 13:21:19,505 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 13:21:19,506 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:21:19,936 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 13:21:19,962 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 13:21:19,962 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14, 13] imperfect sequences [6] total 31 [2018-01-24 13:21:19,962 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:21:19,963 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 13:21:19,963 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 13:21:19,964 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=840, Unknown=0, NotChecked=0, Total=930 [2018-01-24 13:21:19,964 INFO L87 Difference]: Start difference. First operand 115 states and 121 transitions. Second operand 15 states. [2018-01-24 13:21:20,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:21:20,803 INFO L93 Difference]: Finished difference Result 115 states and 121 transitions. [2018-01-24 13:21:20,803 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-24 13:21:20,803 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 36 [2018-01-24 13:21:20,803 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:21:20,804 INFO L225 Difference]: With dead ends: 115 [2018-01-24 13:21:20,804 INFO L226 Difference]: Without dead ends: 114 [2018-01-24 13:21:20,805 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 251 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=118, Invalid=1072, Unknown=0, NotChecked=0, Total=1190 [2018-01-24 13:21:20,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-01-24 13:21:20,817 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 114. [2018-01-24 13:21:20,817 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-01-24 13:21:20,818 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 120 transitions. [2018-01-24 13:21:20,818 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 120 transitions. Word has length 36 [2018-01-24 13:21:20,819 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:21:20,819 INFO L432 AbstractCegarLoop]: Abstraction has 114 states and 120 transitions. [2018-01-24 13:21:20,819 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 13:21:20,819 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 120 transitions. [2018-01-24 13:21:20,820 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-24 13:21:20,820 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:21:20,820 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:21:20,820 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:21:20,820 INFO L82 PathProgramCache]: Analyzing trace with hash -504837186, now seen corresponding path program 1 times [2018-01-24 13:21:20,820 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:21:20,821 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:20,821 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:21:20,822 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:20,822 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:21:20,836 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:20,837 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:21:20,924 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 13:21:20,925 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:21:20,925 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 13:21:20,925 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:21:20,925 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 13:21:20,925 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 13:21:20,925 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:21:20,925 INFO L87 Difference]: Start difference. First operand 114 states and 120 transitions. Second operand 10 states. [2018-01-24 13:21:21,138 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:21:21,138 INFO L93 Difference]: Finished difference Result 114 states and 120 transitions. [2018-01-24 13:21:21,138 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 13:21:21,139 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 41 [2018-01-24 13:21:21,139 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:21:21,140 INFO L225 Difference]: With dead ends: 114 [2018-01-24 13:21:21,140 INFO L226 Difference]: Without dead ends: 112 [2018-01-24 13:21:21,140 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 13:21:21,141 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2018-01-24 13:21:21,151 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2018-01-24 13:21:21,152 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-01-24 13:21:21,152 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 118 transitions. [2018-01-24 13:21:21,153 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 118 transitions. Word has length 41 [2018-01-24 13:21:21,153 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:21:21,153 INFO L432 AbstractCegarLoop]: Abstraction has 112 states and 118 transitions. [2018-01-24 13:21:21,153 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 13:21:21,153 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 118 transitions. [2018-01-24 13:21:21,154 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-24 13:21:21,154 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:21:21,154 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:21:21,154 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:21:21,155 INFO L82 PathProgramCache]: Analyzing trace with hash -504837185, now seen corresponding path program 1 times [2018-01-24 13:21:21,155 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:21:21,156 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:21,156 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:21,156 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:21,156 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:21:21,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:21,169 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:21:21,249 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:21,249 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:21:21,249 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:21:21,260 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:21,261 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:21:21,296 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:21,300 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:21:21,378 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:21,379 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:21:21,634 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:21,655 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:21:21,655 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:21:21,659 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:21,659 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:21:21,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:21,722 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:21:21,728 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:21,728 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:21:21,781 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:21,783 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:21:21,783 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-24 13:21:21,783 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:21:21,784 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 13:21:21,784 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 13:21:21,784 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-01-24 13:21:21,784 INFO L87 Difference]: Start difference. First operand 112 states and 118 transitions. Second operand 7 states. [2018-01-24 13:21:21,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:21:21,815 INFO L93 Difference]: Finished difference Result 201 states and 213 transitions. [2018-01-24 13:21:21,815 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:21:21,815 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 41 [2018-01-24 13:21:21,816 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:21:21,817 INFO L225 Difference]: With dead ends: 201 [2018-01-24 13:21:21,817 INFO L226 Difference]: Without dead ends: 113 [2018-01-24 13:21:21,818 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 157 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=55, Invalid=77, Unknown=0, NotChecked=0, Total=132 [2018-01-24 13:21:21,818 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-01-24 13:21:21,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2018-01-24 13:21:21,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-01-24 13:21:21,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 119 transitions. [2018-01-24 13:21:21,833 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 119 transitions. Word has length 41 [2018-01-24 13:21:21,834 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:21:21,834 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 119 transitions. [2018-01-24 13:21:21,834 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 13:21:21,834 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 119 transitions. [2018-01-24 13:21:21,835 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-24 13:21:21,835 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:21:21,835 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:21:21,836 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:21:21,836 INFO L82 PathProgramCache]: Analyzing trace with hash 1693572501, now seen corresponding path program 2 times [2018-01-24 13:21:21,836 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:21:21,837 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:21,837 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:21,837 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:21,838 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:21:21,853 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:21,854 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:21:21,918 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:21,919 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:21:21,919 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:21:21,929 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:21:21,929 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:21:21,956 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:21:21,959 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:21:21,963 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:21:21,971 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 13:21:21,971 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:21:22,008 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 13:21:22,008 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:21:22,020 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 13:21:22,020 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 13:21:22,572 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 13:21:22,573 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:21:25,033 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 13:21:25,053 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 13:21:25,054 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15, 13] imperfect sequences [7] total 33 [2018-01-24 13:21:25,054 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:21:25,054 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-24 13:21:25,054 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-24 13:21:25,055 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=950, Unknown=1, NotChecked=0, Total=1056 [2018-01-24 13:21:25,055 INFO L87 Difference]: Start difference. First operand 113 states and 119 transitions. Second operand 16 states. [2018-01-24 13:21:25,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:21:25,713 INFO L93 Difference]: Finished difference Result 113 states and 119 transitions. [2018-01-24 13:21:25,713 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-24 13:21:25,713 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 42 [2018-01-24 13:21:25,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:21:25,715 INFO L225 Difference]: With dead ends: 113 [2018-01-24 13:21:25,715 INFO L226 Difference]: Without dead ends: 111 [2018-01-24 13:21:25,715 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 57 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 311 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=136, Invalid=1195, Unknown=1, NotChecked=0, Total=1332 [2018-01-24 13:21:25,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-01-24 13:21:25,727 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 111. [2018-01-24 13:21:25,727 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-01-24 13:21:25,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 117 transitions. [2018-01-24 13:21:25,727 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 117 transitions. Word has length 42 [2018-01-24 13:21:25,728 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:21:25,728 INFO L432 AbstractCegarLoop]: Abstraction has 111 states and 117 transitions. [2018-01-24 13:21:25,728 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-24 13:21:25,728 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 117 transitions. [2018-01-24 13:21:25,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-24 13:21:25,728 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:21:25,729 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:21:25,729 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:21:25,729 INFO L82 PathProgramCache]: Analyzing trace with hash 1966889947, now seen corresponding path program 1 times [2018-01-24 13:21:25,729 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:21:25,730 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:25,730 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:21:25,730 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:25,730 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:21:25,738 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:25,739 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:21:25,790 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 13:21:25,790 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:21:25,790 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-24 13:21:25,790 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:21:25,790 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 13:21:25,791 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 13:21:25,791 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-01-24 13:21:25,791 INFO L87 Difference]: Start difference. First operand 111 states and 117 transitions. Second operand 8 states. [2018-01-24 13:21:25,827 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:21:25,827 INFO L93 Difference]: Finished difference Result 175 states and 184 transitions. [2018-01-24 13:21:25,828 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 13:21:25,828 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 47 [2018-01-24 13:21:25,828 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:21:25,828 INFO L225 Difference]: With dead ends: 175 [2018-01-24 13:21:25,828 INFO L226 Difference]: Without dead ends: 111 [2018-01-24 13:21:25,829 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:21:25,829 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-01-24 13:21:25,844 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 111. [2018-01-24 13:21:25,844 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-01-24 13:21:25,845 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 116 transitions. [2018-01-24 13:21:25,845 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 116 transitions. Word has length 47 [2018-01-24 13:21:25,846 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:21:25,846 INFO L432 AbstractCegarLoop]: Abstraction has 111 states and 116 transitions. [2018-01-24 13:21:25,846 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 13:21:25,846 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 116 transitions. [2018-01-24 13:21:25,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-24 13:21:25,847 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:21:25,847 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:21:25,847 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:21:25,847 INFO L82 PathProgramCache]: Analyzing trace with hash 2136929804, now seen corresponding path program 1 times [2018-01-24 13:21:25,847 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:21:25,848 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:25,848 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:25,849 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:25,849 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:21:25,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:25,861 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:21:25,923 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 13:21:25,923 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:21:25,924 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-01-24 13:21:25,924 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:21:25,924 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 13:21:25,924 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 13:21:25,924 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:21:25,924 INFO L87 Difference]: Start difference. First operand 111 states and 116 transitions. Second operand 10 states. [2018-01-24 13:21:25,981 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:21:25,981 INFO L93 Difference]: Finished difference Result 177 states and 185 transitions. [2018-01-24 13:21:25,982 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 13:21:25,982 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 52 [2018-01-24 13:21:25,982 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:21:25,982 INFO L225 Difference]: With dead ends: 177 [2018-01-24 13:21:25,982 INFO L226 Difference]: Without dead ends: 111 [2018-01-24 13:21:25,983 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 13:21:25,983 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-01-24 13:21:25,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 111. [2018-01-24 13:21:25,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-01-24 13:21:25,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 115 transitions. [2018-01-24 13:21:25,994 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 115 transitions. Word has length 52 [2018-01-24 13:21:25,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:21:25,994 INFO L432 AbstractCegarLoop]: Abstraction has 111 states and 115 transitions. [2018-01-24 13:21:25,994 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 13:21:25,994 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 115 transitions. [2018-01-24 13:21:25,995 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-01-24 13:21:25,995 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:21:25,995 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:21:25,995 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:21:25,995 INFO L82 PathProgramCache]: Analyzing trace with hash -1070951830, now seen corresponding path program 1 times [2018-01-24 13:21:25,995 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:21:25,996 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:25,996 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:25,996 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:25,996 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:21:26,009 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:26,010 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:21:26,199 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 13:21:26,199 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:21:26,199 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2018-01-24 13:21:26,199 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:21:26,199 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-24 13:21:26,199 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-24 13:21:26,200 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=379, Unknown=0, NotChecked=0, Total=420 [2018-01-24 13:21:26,200 INFO L87 Difference]: Start difference. First operand 111 states and 115 transitions. Second operand 21 states. [2018-01-24 13:21:26,580 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:21:26,580 INFO L93 Difference]: Finished difference Result 141 states and 153 transitions. [2018-01-24 13:21:26,581 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-24 13:21:26,581 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 63 [2018-01-24 13:21:26,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:21:26,582 INFO L225 Difference]: With dead ends: 141 [2018-01-24 13:21:26,582 INFO L226 Difference]: Without dead ends: 139 [2018-01-24 13:21:26,583 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=69, Invalid=687, Unknown=0, NotChecked=0, Total=756 [2018-01-24 13:21:26,583 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-01-24 13:21:26,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 134. [2018-01-24 13:21:26,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-01-24 13:21:26,601 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 146 transitions. [2018-01-24 13:21:26,601 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 146 transitions. Word has length 63 [2018-01-24 13:21:26,601 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:21:26,601 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 146 transitions. [2018-01-24 13:21:26,601 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-24 13:21:26,601 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 146 transitions. [2018-01-24 13:21:26,602 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-01-24 13:21:26,602 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:21:26,602 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:21:26,603 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:21:26,603 INFO L82 PathProgramCache]: Analyzing trace with hash -1070951829, now seen corresponding path program 1 times [2018-01-24 13:21:26,603 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:21:26,604 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:26,604 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:26,604 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:26,604 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:21:26,623 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:26,624 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:21:26,683 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:26,683 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:21:26,683 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:21:26,691 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:26,691 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:21:26,737 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:26,740 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:21:26,753 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:26,754 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:21:26,955 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:26,975 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:21:26,975 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:21:26,980 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:26,980 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:21:27,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:27,057 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:21:27,064 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:27,064 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:21:27,133 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:27,135 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:21:27,135 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-24 13:21:27,135 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:21:27,136 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 13:21:27,136 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 13:21:27,136 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-24 13:21:27,136 INFO L87 Difference]: Start difference. First operand 134 states and 146 transitions. Second operand 8 states. [2018-01-24 13:21:27,164 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:21:27,165 INFO L93 Difference]: Finished difference Result 244 states and 268 transitions. [2018-01-24 13:21:27,165 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 13:21:27,165 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 63 [2018-01-24 13:21:27,165 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:21:27,166 INFO L225 Difference]: With dead ends: 244 [2018-01-24 13:21:27,166 INFO L226 Difference]: Without dead ends: 135 [2018-01-24 13:21:27,166 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 258 GetRequests, 244 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=77, Invalid=105, Unknown=0, NotChecked=0, Total=182 [2018-01-24 13:21:27,167 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-01-24 13:21:27,179 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-01-24 13:21:27,179 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-01-24 13:21:27,180 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 147 transitions. [2018-01-24 13:21:27,180 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 147 transitions. Word has length 63 [2018-01-24 13:21:27,180 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:21:27,180 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 147 transitions. [2018-01-24 13:21:27,180 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 13:21:27,180 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 147 transitions. [2018-01-24 13:21:27,180 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-01-24 13:21:27,181 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:21:27,181 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:21:27,181 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:21:27,181 INFO L82 PathProgramCache]: Analyzing trace with hash -1223229503, now seen corresponding path program 2 times [2018-01-24 13:21:27,181 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:21:27,182 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:27,182 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:27,182 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:27,182 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:21:27,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:27,196 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:21:27,309 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:27,310 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:21:27,310 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:21:27,315 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:21:27,315 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:21:27,346 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:21:27,357 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:21:27,361 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:21:27,373 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 13:21:27,374 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:21:27,451 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 13:21:27,452 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:21:27,464 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 13:21:27,464 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 13:21:28,213 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 13:21:28,214 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:21:28,982 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 13:21:29,015 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 13:21:29,016 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20, 18] imperfect sequences [8] total 44 [2018-01-24 13:21:29,016 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:21:29,016 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-24 13:21:29,016 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-24 13:21:29,017 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=146, Invalid=1746, Unknown=0, NotChecked=0, Total=1892 [2018-01-24 13:21:29,017 INFO L87 Difference]: Start difference. First operand 135 states and 147 transitions. Second operand 21 states. [2018-01-24 13:21:30,031 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:21:30,031 INFO L93 Difference]: Finished difference Result 135 states and 147 transitions. [2018-01-24 13:21:30,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-24 13:21:30,031 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 64 [2018-01-24 13:21:30,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:21:30,032 INFO L225 Difference]: With dead ends: 135 [2018-01-24 13:21:30,032 INFO L226 Difference]: Without dead ends: 133 [2018-01-24 13:21:30,033 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 91 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 630 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=195, Invalid=2255, Unknown=0, NotChecked=0, Total=2450 [2018-01-24 13:21:30,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-01-24 13:21:30,048 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 133. [2018-01-24 13:21:30,048 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-01-24 13:21:30,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 143 transitions. [2018-01-24 13:21:30,049 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 143 transitions. Word has length 64 [2018-01-24 13:21:30,050 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:21:30,050 INFO L432 AbstractCegarLoop]: Abstraction has 133 states and 143 transitions. [2018-01-24 13:21:30,050 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-24 13:21:30,050 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 143 transitions. [2018-01-24 13:21:30,050 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-01-24 13:21:30,051 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:21:30,051 INFO L322 BasicCegarLoop]: trace histogram [4, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:21:30,051 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:21:30,051 INFO L82 PathProgramCache]: Analyzing trace with hash -577954366, now seen corresponding path program 1 times [2018-01-24 13:21:30,051 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:21:30,052 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:30,052 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:21:30,052 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:30,053 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:21:30,064 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:30,065 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:21:30,218 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-01-24 13:21:30,218 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:21:30,218 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:21:30,230 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:30,230 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:21:30,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:30,275 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:21:30,392 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-24 13:21:30,392 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:21:30,584 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-24 13:21:30,617 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:21:30,617 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:21:30,622 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:30,623 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:21:30,692 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:30,697 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:21:30,722 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 4 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 13:21:30,722 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:21:30,912 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-01-24 13:21:30,914 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 4 imperfect interpolant sequences. [2018-01-24 13:21:30,914 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [11, 8, 8, 11] total 24 [2018-01-24 13:21:30,914 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:21:30,915 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-24 13:21:30,915 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-24 13:21:30,915 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=103, Invalid=449, Unknown=0, NotChecked=0, Total=552 [2018-01-24 13:21:30,915 INFO L87 Difference]: Start difference. First operand 133 states and 143 transitions. Second operand 11 states. [2018-01-24 13:21:31,092 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:21:31,092 INFO L93 Difference]: Finished difference Result 194 states and 204 transitions. [2018-01-24 13:21:31,092 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 13:21:31,093 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 67 [2018-01-24 13:21:31,093 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:21:31,094 INFO L225 Difference]: With dead ends: 194 [2018-01-24 13:21:31,094 INFO L226 Difference]: Without dead ends: 130 [2018-01-24 13:21:31,095 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 280 GetRequests, 249 SyntacticMatches, 6 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 37 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=116, Invalid=586, Unknown=0, NotChecked=0, Total=702 [2018-01-24 13:21:31,095 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-01-24 13:21:31,116 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 130. [2018-01-24 13:21:31,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-01-24 13:21:31,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 136 transitions. [2018-01-24 13:21:31,118 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 136 transitions. Word has length 67 [2018-01-24 13:21:31,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:21:31,118 INFO L432 AbstractCegarLoop]: Abstraction has 130 states and 136 transitions. [2018-01-24 13:21:31,118 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-24 13:21:31,118 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 136 transitions. [2018-01-24 13:21:31,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-01-24 13:21:31,119 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:21:31,119 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:21:31,119 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:21:31,120 INFO L82 PathProgramCache]: Analyzing trace with hash -1733951442, now seen corresponding path program 1 times [2018-01-24 13:21:31,120 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:21:31,121 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:31,121 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:31,121 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:31,121 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:21:31,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:31,143 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:21:31,629 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 13:21:31,629 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:21:31,629 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2018-01-24 13:21:31,630 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:21:31,630 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-24 13:21:31,630 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-24 13:21:31,630 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=551, Unknown=0, NotChecked=0, Total=600 [2018-01-24 13:21:31,630 INFO L87 Difference]: Start difference. First operand 130 states and 136 transitions. Second operand 25 states. [2018-01-24 13:21:32,449 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:21:32,449 INFO L93 Difference]: Finished difference Result 142 states and 152 transitions. [2018-01-24 13:21:32,449 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-24 13:21:32,450 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 78 [2018-01-24 13:21:32,450 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:21:32,451 INFO L225 Difference]: With dead ends: 142 [2018-01-24 13:21:32,451 INFO L226 Difference]: Without dead ends: 140 [2018-01-24 13:21:32,451 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=85, Invalid=1037, Unknown=0, NotChecked=0, Total=1122 [2018-01-24 13:21:32,451 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-01-24 13:21:32,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 136. [2018-01-24 13:21:32,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-01-24 13:21:32,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 146 transitions. [2018-01-24 13:21:32,467 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 146 transitions. Word has length 78 [2018-01-24 13:21:32,468 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:21:32,468 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 146 transitions. [2018-01-24 13:21:32,468 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-24 13:21:32,468 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 146 transitions. [2018-01-24 13:21:32,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-01-24 13:21:32,468 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:21:32,468 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:21:32,468 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:21:32,469 INFO L82 PathProgramCache]: Analyzing trace with hash -1733951441, now seen corresponding path program 1 times [2018-01-24 13:21:32,469 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:21:32,469 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:32,469 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:32,470 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:32,470 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:21:32,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:32,484 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:21:32,626 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:32,626 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:21:32,626 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:21:32,637 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:32,637 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:21:32,683 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:32,686 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:21:32,779 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:32,780 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:21:33,060 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:33,081 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:21:33,082 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 14 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:21:33,086 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:33,087 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:21:33,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:33,185 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:21:33,190 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:33,190 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:21:33,259 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:33,261 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:21:33,261 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-24 13:21:33,261 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:21:33,261 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 13:21:33,262 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 13:21:33,262 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-24 13:21:33,262 INFO L87 Difference]: Start difference. First operand 136 states and 146 transitions. Second operand 9 states. [2018-01-24 13:21:33,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:21:33,344 INFO L93 Difference]: Finished difference Result 247 states and 267 transitions. [2018-01-24 13:21:33,344 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 13:21:33,345 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 78 [2018-01-24 13:21:33,345 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:21:33,345 INFO L225 Difference]: With dead ends: 247 [2018-01-24 13:21:33,345 INFO L226 Difference]: Without dead ends: 137 [2018-01-24 13:21:33,346 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 319 GetRequests, 303 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=103, Invalid=137, Unknown=0, NotChecked=0, Total=240 [2018-01-24 13:21:33,346 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-01-24 13:21:33,368 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-01-24 13:21:33,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-01-24 13:21:33,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 147 transitions. [2018-01-24 13:21:33,370 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 147 transitions. Word has length 78 [2018-01-24 13:21:33,370 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:21:33,370 INFO L432 AbstractCegarLoop]: Abstraction has 137 states and 147 transitions. [2018-01-24 13:21:33,370 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 13:21:33,371 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 147 transitions. [2018-01-24 13:21:33,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-01-24 13:21:33,371 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:21:33,371 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:21:33,371 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:21:33,372 INFO L82 PathProgramCache]: Analyzing trace with hash 1320320025, now seen corresponding path program 2 times [2018-01-24 13:21:33,372 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:21:33,373 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:33,373 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:33,373 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:33,373 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:21:33,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:33,395 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:21:33,480 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:33,480 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:21:33,480 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:21:33,488 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:21:33,489 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:21:33,532 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:21:33,537 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:21:33,541 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:21:33,545 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 13:21:33,545 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:21:33,558 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 13:21:33,558 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:21:33,569 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 13:21:33,569 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 13:21:34,478 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 13:21:34,479 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:21:37,345 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 13:21:37,365 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 13:21:37,365 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24, 22] imperfect sequences [9] total 53 [2018-01-24 13:21:37,366 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:21:37,366 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-24 13:21:37,366 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-24 13:21:37,367 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=181, Invalid=2574, Unknown=1, NotChecked=0, Total=2756 [2018-01-24 13:21:37,367 INFO L87 Difference]: Start difference. First operand 137 states and 147 transitions. Second operand 25 states. [2018-01-24 13:21:38,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:21:38,662 INFO L93 Difference]: Finished difference Result 137 states and 147 transitions. [2018-01-24 13:21:38,662 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-24 13:21:38,662 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 79 [2018-01-24 13:21:38,663 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:21:38,664 INFO L225 Difference]: With dead ends: 137 [2018-01-24 13:21:38,664 INFO L226 Difference]: Without dead ends: 135 [2018-01-24 13:21:38,665 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 174 GetRequests, 111 SyntacticMatches, 4 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 983 ImplicationChecksByTransitivity, 3.9s TimeCoverageRelationStatistics Valid=246, Invalid=3413, Unknown=1, NotChecked=0, Total=3660 [2018-01-24 13:21:38,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-01-24 13:21:38,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-01-24 13:21:38,693 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-01-24 13:21:38,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 144 transitions. [2018-01-24 13:21:38,694 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 144 transitions. Word has length 79 [2018-01-24 13:21:38,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:21:38,695 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 144 transitions. [2018-01-24 13:21:38,695 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-24 13:21:38,695 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 144 transitions. [2018-01-24 13:21:38,695 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-01-24 13:21:38,695 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:21:38,696 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:21:38,696 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:21:38,696 INFO L82 PathProgramCache]: Analyzing trace with hash 2055490650, now seen corresponding path program 1 times [2018-01-24 13:21:38,696 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:21:38,697 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:38,697 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:21:38,697 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:38,697 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:21:38,725 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:38,726 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:21:38,852 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:38,852 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:21:38,852 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:21:38,858 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:38,859 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:21:38,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:38,920 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:21:38,933 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:38,933 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:21:39,176 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:39,212 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:21:39,212 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:21:39,218 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:39,218 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:21:39,301 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:39,308 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:21:39,338 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:39,338 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:21:39,402 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:39,404 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:21:39,404 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-24 13:21:39,404 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:21:39,405 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 13:21:39,405 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 13:21:39,405 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-24 13:21:39,405 INFO L87 Difference]: Start difference. First operand 135 states and 144 transitions. Second operand 10 states. [2018-01-24 13:21:39,437 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:21:39,437 INFO L93 Difference]: Finished difference Result 244 states and 262 transitions. [2018-01-24 13:21:39,437 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-24 13:21:39,437 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 83 [2018-01-24 13:21:39,438 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:21:39,438 INFO L225 Difference]: With dead ends: 244 [2018-01-24 13:21:39,438 INFO L226 Difference]: Without dead ends: 136 [2018-01-24 13:21:39,439 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 340 GetRequests, 322 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=133, Invalid=173, Unknown=0, NotChecked=0, Total=306 [2018-01-24 13:21:39,439 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-01-24 13:21:39,459 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-01-24 13:21:39,460 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-01-24 13:21:39,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 145 transitions. [2018-01-24 13:21:39,460 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 145 transitions. Word has length 83 [2018-01-24 13:21:39,460 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:21:39,461 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 145 transitions. [2018-01-24 13:21:39,461 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 13:21:39,461 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 145 transitions. [2018-01-24 13:21:39,461 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-01-24 13:21:39,461 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:21:39,461 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:21:39,461 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:21:39,461 INFO L82 PathProgramCache]: Analyzing trace with hash 526037680, now seen corresponding path program 2 times [2018-01-24 13:21:39,462 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:21:39,462 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:39,462 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:21:39,462 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:39,463 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:21:39,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:39,486 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:21:39,575 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:39,576 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:21:39,576 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:21:39,584 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:21:39,585 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:21:39,636 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:21:39,658 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:21:39,660 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:21:39,665 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:21:39,693 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:39,694 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:21:39,891 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:39,924 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:21:39,924 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:21:39,931 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 13:21:39,931 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:21:39,990 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:21:40,093 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:21:40,130 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:21:40,138 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:21:40,143 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:40,144 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:21:40,223 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:40,225 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:21:40,225 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-24 13:21:40,225 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:21:40,226 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-24 13:21:40,226 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-24 13:21:40,226 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-24 13:21:40,226 INFO L87 Difference]: Start difference. First operand 136 states and 145 transitions. Second operand 11 states. [2018-01-24 13:21:40,268 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:21:40,269 INFO L93 Difference]: Finished difference Result 245 states and 263 transitions. [2018-01-24 13:21:40,269 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 13:21:40,269 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 84 [2018-01-24 13:21:40,269 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:21:40,270 INFO L225 Difference]: With dead ends: 245 [2018-01-24 13:21:40,270 INFO L226 Difference]: Without dead ends: 137 [2018-01-24 13:21:40,271 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 345 GetRequests, 325 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=167, Invalid=213, Unknown=0, NotChecked=0, Total=380 [2018-01-24 13:21:40,271 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-01-24 13:21:40,294 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-01-24 13:21:40,294 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-01-24 13:21:40,294 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 146 transitions. [2018-01-24 13:21:40,295 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 146 transitions. Word has length 84 [2018-01-24 13:21:40,295 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:21:40,295 INFO L432 AbstractCegarLoop]: Abstraction has 137 states and 146 transitions. [2018-01-24 13:21:40,295 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-24 13:21:40,295 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 146 transitions. [2018-01-24 13:21:40,295 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-01-24 13:21:40,295 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:21:40,296 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:21:40,296 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:21:40,296 INFO L82 PathProgramCache]: Analyzing trace with hash 357635866, now seen corresponding path program 3 times [2018-01-24 13:21:40,296 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:21:40,297 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:40,297 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:21:40,297 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:21:40,297 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:21:40,316 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:21:40,318 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:21:40,436 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:40,436 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:21:40,436 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:21:40,441 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 13:21:40,441 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 13:21:40,473 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:21:40,489 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:21:40,523 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:21:40,633 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:21:40,976 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:21:40,978 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:21:40,981 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:21:40,990 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:40,990 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:21:41,188 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:21:41,210 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:21:41,210 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:21:41,213 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 13:21:41,213 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 13:21:41,263 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:21:41,362 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:21:41,962 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:21:53,986 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:22:06,074 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 13:22:06,178 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:22:06,198 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:22:06,207 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:22:06,207 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:22:06,325 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:22:06,328 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:22:06,328 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 21 [2018-01-24 13:22:06,328 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:22:06,328 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-24 13:22:06,329 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-24 13:22:06,329 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=228, Unknown=0, NotChecked=0, Total=420 [2018-01-24 13:22:06,329 INFO L87 Difference]: Start difference. First operand 137 states and 146 transitions. Second operand 12 states. [2018-01-24 13:22:06,363 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:22:06,363 INFO L93 Difference]: Finished difference Result 246 states and 264 transitions. [2018-01-24 13:22:06,363 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 13:22:06,363 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 85 [2018-01-24 13:22:06,363 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:22:06,364 INFO L225 Difference]: With dead ends: 246 [2018-01-24 13:22:06,364 INFO L226 Difference]: Without dead ends: 138 [2018-01-24 13:22:06,364 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 350 GetRequests, 328 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=205, Invalid=257, Unknown=0, NotChecked=0, Total=462 [2018-01-24 13:22:06,365 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-01-24 13:22:06,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 138. [2018-01-24 13:22:06,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-01-24 13:22:06,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 147 transitions. [2018-01-24 13:22:06,396 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 147 transitions. Word has length 85 [2018-01-24 13:22:06,396 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:22:06,396 INFO L432 AbstractCegarLoop]: Abstraction has 138 states and 147 transitions. [2018-01-24 13:22:06,396 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-24 13:22:06,396 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 147 transitions. [2018-01-24 13:22:06,396 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-01-24 13:22:06,396 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:22:06,397 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:22:06,397 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:22:06,397 INFO L82 PathProgramCache]: Analyzing trace with hash -567853072, now seen corresponding path program 4 times [2018-01-24 13:22:06,397 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:22:06,398 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:22:06,398 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:22:06,398 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:22:06,398 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:22:06,414 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:22:06,415 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:22:06,525 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:22:06,525 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:22:06,525 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:22:06,534 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-24 13:22:06,534 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-24 13:22:06,610 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:22:06,613 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:22:06,622 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:22:06,622 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:22:06,805 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:22:06,826 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:22:06,826 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:22:06,829 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-24 13:22:06,829 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-24 13:22:06,943 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:22:06,951 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:22:06,961 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:22:06,961 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:22:07,086 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:22:07,088 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:22:07,088 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 23 [2018-01-24 13:22:07,088 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:22:07,089 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-24 13:22:07,089 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-24 13:22:07,089 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=232, Invalid=274, Unknown=0, NotChecked=0, Total=506 [2018-01-24 13:22:07,089 INFO L87 Difference]: Start difference. First operand 138 states and 147 transitions. Second operand 13 states. [2018-01-24 13:22:07,149 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:22:07,149 INFO L93 Difference]: Finished difference Result 247 states and 265 transitions. [2018-01-24 13:22:07,150 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-24 13:22:07,150 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 86 [2018-01-24 13:22:07,150 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:22:07,151 INFO L225 Difference]: With dead ends: 247 [2018-01-24 13:22:07,151 INFO L226 Difference]: Without dead ends: 139 [2018-01-24 13:22:07,152 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 355 GetRequests, 331 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=246, Invalid=306, Unknown=0, NotChecked=0, Total=552 [2018-01-24 13:22:07,152 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-01-24 13:22:07,181 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 139. [2018-01-24 13:22:07,182 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2018-01-24 13:22:07,182 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 148 transitions. [2018-01-24 13:22:07,183 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 148 transitions. Word has length 86 [2018-01-24 13:22:07,183 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:22:07,183 INFO L432 AbstractCegarLoop]: Abstraction has 139 states and 148 transitions. [2018-01-24 13:22:07,183 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-24 13:22:07,183 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 148 transitions. [2018-01-24 13:22:07,184 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-01-24 13:22:07,184 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:22:07,184 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:22:07,184 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:22:07,184 INFO L82 PathProgramCache]: Analyzing trace with hash 806760922, now seen corresponding path program 5 times [2018-01-24 13:22:07,185 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:22:07,185 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:22:07,185 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:22:07,186 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:22:07,186 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:22:07,204 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:22:07,205 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:22:07,376 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:22:07,377 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:22:07,377 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:22:07,385 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-24 13:22:07,385 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:22:07,404 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:22:07,407 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:22:07,413 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:22:07,431 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:22:07,515 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:22:07,617 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:22:07,624 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:22:07,629 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:22:07,679 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:22:07,679 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:22:07,931 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:22:07,964 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:22:07,964 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:22:07,967 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-24 13:22:07,968 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 13:22:07,985 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:22:07,989 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:22:07,998 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:22:08,014 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:22:08,057 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:22:08,148 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 13:22:08,189 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:22:08,197 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:22:08,206 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:22:08,206 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:22:08,299 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:22:08,301 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:22:08,301 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 25 [2018-01-24 13:22:08,301 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:22:08,302 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-24 13:22:08,302 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-24 13:22:08,302 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=272, Invalid=328, Unknown=0, NotChecked=0, Total=600 [2018-01-24 13:22:08,302 INFO L87 Difference]: Start difference. First operand 139 states and 148 transitions. Second operand 14 states. [2018-01-24 13:22:08,346 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:22:08,346 INFO L93 Difference]: Finished difference Result 248 states and 266 transitions. [2018-01-24 13:22:08,346 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-24 13:22:08,346 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 87 [2018-01-24 13:22:08,346 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:22:08,347 INFO L225 Difference]: With dead ends: 248 [2018-01-24 13:22:08,347 INFO L226 Difference]: Without dead ends: 140 [2018-01-24 13:22:08,348 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 360 GetRequests, 334 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 84 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=287, Invalid=363, Unknown=0, NotChecked=0, Total=650 [2018-01-24 13:22:08,348 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-01-24 13:22:08,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-01-24 13:22:08,367 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-01-24 13:22:08,367 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 149 transitions. [2018-01-24 13:22:08,367 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 149 transitions. Word has length 87 [2018-01-24 13:22:08,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:22:08,368 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 149 transitions. [2018-01-24 13:22:08,368 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-24 13:22:08,368 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 149 transitions. [2018-01-24 13:22:08,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-01-24 13:22:08,369 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:22:08,369 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:22:08,370 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 13:22:08,370 INFO L82 PathProgramCache]: Analyzing trace with hash 470121776, now seen corresponding path program 6 times [2018-01-24 13:22:08,370 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:22:08,371 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:22:08,371 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 13:22:08,371 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:22:08,371 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:22:08,386 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:22:08,387 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:22:08,659 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:22:08,659 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:22:08,659 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:22:08,677 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-24 13:22:08,678 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-24 13:22:08,714 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:22:08,726 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:22:08,756 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:22:08,968 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command Received shutdown request... [2018-01-24 13:22:09,394 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:22:12,863 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 13:22:12,866 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 13:22:12,871 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:22:12,877 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-24 13:22:12,877 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-24 13:22:12,881 WARN L187 ceAbstractionStarter]: Timeout [2018-01-24 13:22:12,881 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.01 01:22:12 BoogieIcfgContainer [2018-01-24 13:22:12,882 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-24 13:22:12,882 INFO L168 Benchmark]: Toolchain (without parser) took 58058.71 ms. Allocated memory was 304.1 MB in the beginning and 651.7 MB in the end (delta: 347.6 MB). Free memory was 263.1 MB in the beginning and 360.7 MB in the end (delta: -97.6 MB). Peak memory consumption was 250.0 MB. Max. memory is 5.3 GB. [2018-01-24 13:22:12,884 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 304.1 MB. Free memory is still 269.1 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-24 13:22:12,884 INFO L168 Benchmark]: CACSL2BoogieTranslator took 224.08 ms. Allocated memory is still 304.1 MB. Free memory was 263.1 MB in the beginning and 249.2 MB in the end (delta: 14.0 MB). Peak memory consumption was 14.0 MB. Max. memory is 5.3 GB. [2018-01-24 13:22:12,884 INFO L168 Benchmark]: Boogie Preprocessor took 42.33 ms. Allocated memory is still 304.1 MB. Free memory was 249.2 MB in the beginning and 247.2 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-24 13:22:12,885 INFO L168 Benchmark]: RCFGBuilder took 437.45 ms. Allocated memory is still 304.1 MB. Free memory was 247.2 MB in the beginning and 216.7 MB in the end (delta: 30.5 MB). Peak memory consumption was 30.5 MB. Max. memory is 5.3 GB. [2018-01-24 13:22:12,885 INFO L168 Benchmark]: TraceAbstraction took 57346.88 ms. Allocated memory was 304.1 MB in the beginning and 651.7 MB in the end (delta: 347.6 MB). Free memory was 216.7 MB in the beginning and 360.7 MB in the end (delta: -144.0 MB). Peak memory consumption was 203.6 MB. Max. memory is 5.3 GB. [2018-01-24 13:22:12,887 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 304.1 MB. Free memory is still 269.1 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 224.08 ms. Allocated memory is still 304.1 MB. Free memory was 263.1 MB in the beginning and 249.2 MB in the end (delta: 14.0 MB). Peak memory consumption was 14.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 42.33 ms. Allocated memory is still 304.1 MB. Free memory was 249.2 MB in the beginning and 247.2 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 437.45 ms. Allocated memory is still 304.1 MB. Free memory was 247.2 MB in the beginning and 216.7 MB in the end (delta: 30.5 MB). Peak memory consumption was 30.5 MB. Max. memory is 5.3 GB. * TraceAbstraction took 57346.88 ms. Allocated memory was 304.1 MB in the beginning and 651.7 MB in the end (delta: 347.6 MB). Free memory was 216.7 MB in the beginning and 360.7 MB in the end (delta: -144.0 MB). Peak memory consumption was 203.6 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 89 with TraceHistMax 10, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 14 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 89 with TraceHistMax 10, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 14 known predicates. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 89 with TraceHistMax 10, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 14 known predicates. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 89 with TraceHistMax 10, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 14 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 89 with TraceHistMax 10, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 14 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 89 with TraceHistMax 10, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 14 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 89 with TraceHistMax 10, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 14 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 89 with TraceHistMax 10, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 14 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 89 with TraceHistMax 10, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 14 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 89 with TraceHistMax 10, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 14 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 89 with TraceHistMax 10, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 14 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 89 with TraceHistMax 10, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 14 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 89 with TraceHistMax 10, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 14 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 89 with TraceHistMax 10, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 14 known predicates. - TimeoutResultAtElement [Line: 1443]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1443). Cancelled while BasicCegarLoop was analyzing trace of length 89 with TraceHistMax 10, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 14 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 89 with TraceHistMax 10, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 14 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 89 with TraceHistMax 10, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 14 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 89 with TraceHistMax 10, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 14 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 89 with TraceHistMax 10, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 14 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 18 procedures, 119 locations, 19 error locations. TIMEOUT Result, 57.2s OverallTime, 28 OverallIterations, 10 TraceHistogramMax, 6.9s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 2803 SDtfs, 751 SDslu, 16925 SDs, 0 SdLazy, 5923 SolverSat, 208 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 4.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 3569 GetRequests, 3063 SyntacticMatches, 33 SemanticMatches, 473 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2692 ImplicationChecksByTransitivity, 13.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=140occurred in iteration=27, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.4s AutomataMinimizationTime, 27 MinimizatonAttempts, 27 StatesRemovedByMinimization, 7 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.4s SsaConstructionTime, 27.3s SatisfiabilityAnalysisTime, 16.6s InterpolantComputationTime, 3068 NumberOfCodeBlocks, 3054 NumberOfCodeBlocksAsserted, 73 NumberOfCheckSat, 4632 ConstructedInterpolants, 169 QuantifiedInterpolants, 827397 SizeOfPredicates, 88 NumberOfNonLiveVariables, 8075 ConjunctsInSsa, 415 ConjunctsInUnsatCore, 75 InterpolantComputations, 22 PerfectInterpolantSequences, 151/1036 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_3_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_RubberTaipan+AI_EQ.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-24_13-22-12-895.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_3_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_RubberTaipan+AI_EQ.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-24_13-22-12-895.csv Completed graceful shutdown