java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_RubberTaipan+AI_EQ.epf -i ../../../trunk/examples/svcomp/memsafety-ext2/optional_data_creation_test04_false-valid-memtrack.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-24 13:11:45,484 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-24 13:11:45,486 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-24 13:11:45,501 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-24 13:11:45,502 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-24 13:11:45,503 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-24 13:11:45,504 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-24 13:11:45,506 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-24 13:11:45,508 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-24 13:11:45,509 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-24 13:11:45,510 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-24 13:11:45,510 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-24 13:11:45,511 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-24 13:11:45,513 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-24 13:11:45,514 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-24 13:11:45,517 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-24 13:11:45,519 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-24 13:11:45,522 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-24 13:11:45,523 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-24 13:11:45,525 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-24 13:11:45,528 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-24 13:11:45,528 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-24 13:11:45,528 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-24 13:11:45,530 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-24 13:11:45,531 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-24 13:11:45,532 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-24 13:11:45,532 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-24 13:11:45,533 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-24 13:11:45,534 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-24 13:11:45,534 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-24 13:11:45,535 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-24 13:11:45,535 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_RubberTaipan+AI_EQ.epf [2018-01-24 13:11:45,546 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-24 13:11:45,546 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-24 13:11:45,547 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-24 13:11:45,547 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-24 13:11:45,547 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-24 13:11:45,548 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-24 13:11:45,548 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-24 13:11:45,548 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-24 13:11:45,548 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-24 13:11:45,548 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-24 13:11:45,549 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-24 13:11:45,549 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-24 13:11:45,549 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-24 13:11:45,549 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-24 13:11:45,549 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-24 13:11:45,549 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-24 13:11:45,549 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-24 13:11:45,550 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-24 13:11:45,550 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-24 13:11:45,550 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-24 13:11:45,550 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-24 13:11:45,550 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-24 13:11:45,550 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-24 13:11:45,550 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 13:11:45,551 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-24 13:11:45,551 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-24 13:11:45,551 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-24 13:11:45,551 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-24 13:11:45,551 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-01-24 13:11:45,552 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-24 13:11:45,552 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-24 13:11:45,552 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-24 13:11:45,553 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-24 13:11:45,553 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-24 13:11:45,589 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-24 13:11:45,602 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-24 13:11:45,606 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-24 13:11:45,607 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-24 13:11:45,607 INFO L276 PluginConnector]: CDTParser initialized [2018-01-24 13:11:45,608 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety-ext2/optional_data_creation_test04_false-valid-memtrack.i [2018-01-24 13:11:45,775 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-24 13:11:45,779 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-24 13:11:45,780 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-24 13:11:45,780 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-24 13:11:45,785 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-24 13:11:45,786 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 01:11:45" (1/1) ... [2018-01-24 13:11:45,789 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5977c944 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:11:45, skipping insertion in model container [2018-01-24 13:11:45,789 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 01:11:45" (1/1) ... [2018-01-24 13:11:45,803 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 13:11:45,844 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 13:11:45,968 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 13:11:45,986 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 13:11:45,993 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:11:45 WrapperNode [2018-01-24 13:11:45,993 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-24 13:11:45,993 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-24 13:11:45,993 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-24 13:11:45,994 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-24 13:11:46,010 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:11:45" (1/1) ... [2018-01-24 13:11:46,011 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:11:45" (1/1) ... [2018-01-24 13:11:46,023 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:11:45" (1/1) ... [2018-01-24 13:11:46,024 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:11:45" (1/1) ... [2018-01-24 13:11:46,031 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:11:45" (1/1) ... [2018-01-24 13:11:46,036 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:11:45" (1/1) ... [2018-01-24 13:11:46,038 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:11:45" (1/1) ... [2018-01-24 13:11:46,041 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-24 13:11:46,041 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-24 13:11:46,041 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-24 13:11:46,042 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-24 13:11:46,043 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:11:45" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 13:11:46,106 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-24 13:11:46,106 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-24 13:11:46,107 INFO L136 BoogieDeclarations]: Found implementation of procedure create_data [2018-01-24 13:11:46,107 INFO L136 BoogieDeclarations]: Found implementation of procedure freeData [2018-01-24 13:11:46,107 INFO L136 BoogieDeclarations]: Found implementation of procedure append [2018-01-24 13:11:46,107 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-24 13:11:46,107 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-24 13:11:46,107 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-24 13:11:46,108 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-24 13:11:46,108 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-24 13:11:46,108 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-24 13:11:46,108 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-24 13:11:46,108 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-24 13:11:46,108 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-24 13:11:46,109 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-24 13:11:46,109 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-24 13:11:46,109 INFO L128 BoogieDeclarations]: Found specification of procedure create_data [2018-01-24 13:11:46,109 INFO L128 BoogieDeclarations]: Found specification of procedure freeData [2018-01-24 13:11:46,109 INFO L128 BoogieDeclarations]: Found specification of procedure append [2018-01-24 13:11:46,109 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-24 13:11:46,109 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-24 13:11:46,110 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-24 13:11:46,579 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-24 13:11:46,580 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 01:11:46 BoogieIcfgContainer [2018-01-24 13:11:46,580 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-24 13:11:46,581 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-24 13:11:46,582 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-24 13:11:46,584 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-24 13:11:46,585 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.01 01:11:45" (1/3) ... [2018-01-24 13:11:46,586 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1449c7f7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 01:11:46, skipping insertion in model container [2018-01-24 13:11:46,586 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:11:45" (2/3) ... [2018-01-24 13:11:46,587 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1449c7f7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 01:11:46, skipping insertion in model container [2018-01-24 13:11:46,587 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 01:11:46" (3/3) ... [2018-01-24 13:11:46,589 INFO L105 eAbstractionObserver]: Analyzing ICFG optional_data_creation_test04_false-valid-memtrack.i [2018-01-24 13:11:46,598 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-24 13:11:46,607 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 45 error locations. [2018-01-24 13:11:46,662 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-24 13:11:46,662 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-24 13:11:46,662 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-24 13:11:46,663 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-24 13:11:46,663 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-24 13:11:46,663 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-24 13:11:46,663 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-24 13:11:46,663 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-24 13:11:46,664 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-24 13:11:46,689 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states. [2018-01-24 13:11:46,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-01-24 13:11:46,696 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:11:46,698 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:11:46,698 INFO L371 AbstractCegarLoop]: === Iteration 1 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:11:46,704 INFO L82 PathProgramCache]: Analyzing trace with hash -548983798, now seen corresponding path program 1 times [2018-01-24 13:11:46,706 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:11:46,753 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:46,754 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:11:46,778 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:46,778 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:11:46,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:11:46,819 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:11:46,875 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:11:46,877 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:11:46,877 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 13:11:46,878 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:11:46,880 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 13:11:46,891 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 13:11:46,892 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 13:11:46,894 INFO L87 Difference]: Start difference. First operand 121 states. Second operand 3 states. [2018-01-24 13:11:47,156 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:11:47,156 INFO L93 Difference]: Finished difference Result 235 states and 262 transitions. [2018-01-24 13:11:47,157 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 13:11:47,158 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-01-24 13:11:47,159 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:11:47,173 INFO L225 Difference]: With dead ends: 235 [2018-01-24 13:11:47,173 INFO L226 Difference]: Without dead ends: 120 [2018-01-24 13:11:47,178 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 13:11:47,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-01-24 13:11:47,221 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 117. [2018-01-24 13:11:47,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-01-24 13:11:47,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 124 transitions. [2018-01-24 13:11:47,225 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 124 transitions. Word has length 7 [2018-01-24 13:11:47,225 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:11:47,225 INFO L432 AbstractCegarLoop]: Abstraction has 117 states and 124 transitions. [2018-01-24 13:11:47,225 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 13:11:47,226 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 124 transitions. [2018-01-24 13:11:47,226 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-01-24 13:11:47,226 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:11:47,226 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:11:47,226 INFO L371 AbstractCegarLoop]: === Iteration 2 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:11:47,226 INFO L82 PathProgramCache]: Analyzing trace with hash -548983797, now seen corresponding path program 1 times [2018-01-24 13:11:47,227 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:11:47,228 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:47,228 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:11:47,228 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:47,228 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:11:47,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:11:47,245 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:11:47,291 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:11:47,291 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:11:47,291 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 13:11:47,291 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:11:47,292 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 13:11:47,293 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 13:11:47,293 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 13:11:47,293 INFO L87 Difference]: Start difference. First operand 117 states and 124 transitions. Second operand 3 states. [2018-01-24 13:11:47,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:11:47,406 INFO L93 Difference]: Finished difference Result 119 states and 127 transitions. [2018-01-24 13:11:47,408 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 13:11:47,408 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-01-24 13:11:47,409 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:11:47,410 INFO L225 Difference]: With dead ends: 119 [2018-01-24 13:11:47,411 INFO L226 Difference]: Without dead ends: 118 [2018-01-24 13:11:47,412 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 13:11:47,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states. [2018-01-24 13:11:47,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 116. [2018-01-24 13:11:47,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-01-24 13:11:47,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 123 transitions. [2018-01-24 13:11:47,420 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 123 transitions. Word has length 7 [2018-01-24 13:11:47,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:11:47,420 INFO L432 AbstractCegarLoop]: Abstraction has 116 states and 123 transitions. [2018-01-24 13:11:47,420 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 13:11:47,420 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 123 transitions. [2018-01-24 13:11:47,421 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-01-24 13:11:47,421 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:11:47,421 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:11:47,421 INFO L371 AbstractCegarLoop]: === Iteration 3 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:11:47,421 INFO L82 PathProgramCache]: Analyzing trace with hash 1805977305, now seen corresponding path program 1 times [2018-01-24 13:11:47,421 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:11:47,422 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:47,423 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:11:47,423 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:47,423 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:11:47,445 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:11:47,446 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:11:47,515 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:11:47,515 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:11:47,516 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:11:47,516 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:11:47,516 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:11:47,516 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:11:47,516 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:11:47,516 INFO L87 Difference]: Start difference. First operand 116 states and 123 transitions. Second operand 5 states. [2018-01-24 13:11:47,784 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:11:47,784 INFO L93 Difference]: Finished difference Result 130 states and 138 transitions. [2018-01-24 13:11:47,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:11:47,784 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 14 [2018-01-24 13:11:47,785 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:11:47,786 INFO L225 Difference]: With dead ends: 130 [2018-01-24 13:11:47,786 INFO L226 Difference]: Without dead ends: 129 [2018-01-24 13:11:47,787 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:11:47,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-01-24 13:11:47,797 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 122. [2018-01-24 13:11:47,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-01-24 13:11:47,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 131 transitions. [2018-01-24 13:11:47,799 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 131 transitions. Word has length 14 [2018-01-24 13:11:47,799 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:11:47,800 INFO L432 AbstractCegarLoop]: Abstraction has 122 states and 131 transitions. [2018-01-24 13:11:47,800 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:11:47,800 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 131 transitions. [2018-01-24 13:11:47,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-01-24 13:11:47,801 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:11:47,801 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:11:47,801 INFO L371 AbstractCegarLoop]: === Iteration 4 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:11:47,801 INFO L82 PathProgramCache]: Analyzing trace with hash 1805977306, now seen corresponding path program 1 times [2018-01-24 13:11:47,801 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:11:47,802 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:47,802 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:11:47,802 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:47,802 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:11:47,817 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:11:47,818 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:11:47,902 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:11:47,902 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:11:47,902 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 13:11:47,902 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:11:47,902 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 13:11:47,903 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 13:11:47,903 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:11:47,903 INFO L87 Difference]: Start difference. First operand 122 states and 131 transitions. Second operand 7 states. [2018-01-24 13:11:48,107 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:11:48,107 INFO L93 Difference]: Finished difference Result 128 states and 137 transitions. [2018-01-24 13:11:48,108 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 13:11:48,108 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 14 [2018-01-24 13:11:48,108 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:11:48,109 INFO L225 Difference]: With dead ends: 128 [2018-01-24 13:11:48,109 INFO L226 Difference]: Without dead ends: 127 [2018-01-24 13:11:48,109 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-01-24 13:11:48,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-01-24 13:11:48,116 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 122. [2018-01-24 13:11:48,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-01-24 13:11:48,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 130 transitions. [2018-01-24 13:11:48,118 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 130 transitions. Word has length 14 [2018-01-24 13:11:48,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:11:48,118 INFO L432 AbstractCegarLoop]: Abstraction has 122 states and 130 transitions. [2018-01-24 13:11:48,118 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 13:11:48,118 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 130 transitions. [2018-01-24 13:11:48,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-01-24 13:11:48,119 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:11:48,119 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:11:48,119 INFO L371 AbstractCegarLoop]: === Iteration 5 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:11:48,119 INFO L82 PathProgramCache]: Analyzing trace with hash 150721727, now seen corresponding path program 1 times [2018-01-24 13:11:48,120 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:11:48,120 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:48,120 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:11:48,121 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:48,121 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:11:48,133 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:11:48,134 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:11:48,160 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:11:48,161 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:11:48,161 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 13:11:48,161 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:11:48,162 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 13:11:48,162 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 13:11:48,162 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 13:11:48,162 INFO L87 Difference]: Start difference. First operand 122 states and 130 transitions. Second operand 4 states. [2018-01-24 13:11:48,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:11:48,257 INFO L93 Difference]: Finished difference Result 122 states and 130 transitions. [2018-01-24 13:11:48,258 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 13:11:48,258 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-01-24 13:11:48,258 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:11:48,259 INFO L225 Difference]: With dead ends: 122 [2018-01-24 13:11:48,259 INFO L226 Difference]: Without dead ends: 121 [2018-01-24 13:11:48,259 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:11:48,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-01-24 13:11:48,268 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 121. [2018-01-24 13:11:48,268 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121 states. [2018-01-24 13:11:48,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 129 transitions. [2018-01-24 13:11:48,270 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 129 transitions. Word has length 15 [2018-01-24 13:11:48,270 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:11:48,270 INFO L432 AbstractCegarLoop]: Abstraction has 121 states and 129 transitions. [2018-01-24 13:11:48,270 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 13:11:48,270 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 129 transitions. [2018-01-24 13:11:48,270 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-01-24 13:11:48,270 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:11:48,270 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:11:48,270 INFO L371 AbstractCegarLoop]: === Iteration 6 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:11:48,271 INFO L82 PathProgramCache]: Analyzing trace with hash 150721728, now seen corresponding path program 1 times [2018-01-24 13:11:48,271 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:11:48,271 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:48,272 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:11:48,272 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:48,272 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:11:48,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:11:48,285 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:11:48,348 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:11:48,348 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:11:48,349 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 13:11:48,349 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:11:48,349 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 13:11:48,349 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 13:11:48,349 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 13:11:48,350 INFO L87 Difference]: Start difference. First operand 121 states and 129 transitions. Second operand 4 states. [2018-01-24 13:11:48,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:11:48,413 INFO L93 Difference]: Finished difference Result 121 states and 129 transitions. [2018-01-24 13:11:48,414 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 13:11:48,414 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-01-24 13:11:48,414 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:11:48,415 INFO L225 Difference]: With dead ends: 121 [2018-01-24 13:11:48,415 INFO L226 Difference]: Without dead ends: 120 [2018-01-24 13:11:48,415 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:11:48,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-01-24 13:11:48,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 120. [2018-01-24 13:11:48,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-01-24 13:11:48,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 128 transitions. [2018-01-24 13:11:48,422 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 128 transitions. Word has length 15 [2018-01-24 13:11:48,422 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:11:48,422 INFO L432 AbstractCegarLoop]: Abstraction has 120 states and 128 transitions. [2018-01-24 13:11:48,422 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 13:11:48,422 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 128 transitions. [2018-01-24 13:11:48,423 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-24 13:11:48,423 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:11:48,423 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:11:48,423 INFO L371 AbstractCegarLoop]: === Iteration 7 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:11:48,423 INFO L82 PathProgramCache]: Analyzing trace with hash 1247099981, now seen corresponding path program 1 times [2018-01-24 13:11:48,423 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:11:48,424 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:48,424 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:11:48,424 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:48,424 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:11:48,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:11:48,433 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:11:48,467 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:11:48,467 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:11:48,467 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:11:48,467 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:11:48,468 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:11:48,468 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:11:48,468 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:11:48,468 INFO L87 Difference]: Start difference. First operand 120 states and 128 transitions. Second operand 5 states. [2018-01-24 13:11:48,620 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:11:48,621 INFO L93 Difference]: Finished difference Result 136 states and 145 transitions. [2018-01-24 13:11:48,621 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:11:48,621 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-01-24 13:11:48,622 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:11:48,623 INFO L225 Difference]: With dead ends: 136 [2018-01-24 13:11:48,623 INFO L226 Difference]: Without dead ends: 135 [2018-01-24 13:11:48,623 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:11:48,624 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-01-24 13:11:48,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 123. [2018-01-24 13:11:48,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-01-24 13:11:48,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 132 transitions. [2018-01-24 13:11:48,633 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 132 transitions. Word has length 22 [2018-01-24 13:11:48,633 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:11:48,634 INFO L432 AbstractCegarLoop]: Abstraction has 123 states and 132 transitions. [2018-01-24 13:11:48,634 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:11:48,634 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 132 transitions. [2018-01-24 13:11:48,634 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-24 13:11:48,635 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:11:48,635 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:11:48,635 INFO L371 AbstractCegarLoop]: === Iteration 8 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:11:48,635 INFO L82 PathProgramCache]: Analyzing trace with hash 1247099982, now seen corresponding path program 1 times [2018-01-24 13:11:48,635 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:11:48,636 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:48,636 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:11:48,636 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:48,636 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:11:48,647 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:11:48,648 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:11:48,695 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:11:48,695 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:11:48,695 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:11:48,696 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:11:48,696 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:11:48,696 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:11:48,696 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:11:48,696 INFO L87 Difference]: Start difference. First operand 123 states and 132 transitions. Second operand 5 states. [2018-01-24 13:11:48,819 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:11:48,819 INFO L93 Difference]: Finished difference Result 130 states and 139 transitions. [2018-01-24 13:11:48,819 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 13:11:48,819 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-01-24 13:11:48,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:11:48,820 INFO L225 Difference]: With dead ends: 130 [2018-01-24 13:11:48,820 INFO L226 Difference]: Without dead ends: 129 [2018-01-24 13:11:48,820 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:11:48,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-01-24 13:11:48,826 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 123. [2018-01-24 13:11:48,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-01-24 13:11:48,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 131 transitions. [2018-01-24 13:11:48,828 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 131 transitions. Word has length 22 [2018-01-24 13:11:48,828 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:11:48,828 INFO L432 AbstractCegarLoop]: Abstraction has 123 states and 131 transitions. [2018-01-24 13:11:48,828 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:11:48,828 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 131 transitions. [2018-01-24 13:11:48,829 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-24 13:11:48,829 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:11:48,829 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:11:48,830 INFO L371 AbstractCegarLoop]: === Iteration 9 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:11:48,830 INFO L82 PathProgramCache]: Analyzing trace with hash 4873111, now seen corresponding path program 1 times [2018-01-24 13:11:48,830 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:11:48,831 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:48,831 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:11:48,831 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:48,831 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:11:48,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:11:48,844 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:11:48,869 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:11:48,869 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:11:48,869 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 13:11:48,869 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:11:48,870 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 13:11:48,870 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 13:11:48,870 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 13:11:48,870 INFO L87 Difference]: Start difference. First operand 123 states and 131 transitions. Second operand 4 states. [2018-01-24 13:11:48,954 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:11:48,954 INFO L93 Difference]: Finished difference Result 123 states and 131 transitions. [2018-01-24 13:11:48,954 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 13:11:48,954 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2018-01-24 13:11:48,955 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:11:48,955 INFO L225 Difference]: With dead ends: 123 [2018-01-24 13:11:48,956 INFO L226 Difference]: Without dead ends: 119 [2018-01-24 13:11:48,956 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:11:48,956 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2018-01-24 13:11:48,961 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 119. [2018-01-24 13:11:48,961 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-01-24 13:11:48,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 127 transitions. [2018-01-24 13:11:48,963 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 127 transitions. Word has length 23 [2018-01-24 13:11:48,963 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:11:48,963 INFO L432 AbstractCegarLoop]: Abstraction has 119 states and 127 transitions. [2018-01-24 13:11:48,964 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 13:11:48,964 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 127 transitions. [2018-01-24 13:11:48,964 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-24 13:11:48,965 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:11:48,965 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:11:48,965 INFO L371 AbstractCegarLoop]: === Iteration 10 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:11:48,965 INFO L82 PathProgramCache]: Analyzing trace with hash 4873112, now seen corresponding path program 1 times [2018-01-24 13:11:48,965 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:11:48,966 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:48,966 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:11:48,967 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:48,967 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:11:48,979 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:11:48,980 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:11:49,062 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:11:49,062 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:11:49,063 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 13:11:49,063 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:11:49,063 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 13:11:49,063 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 13:11:49,063 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 13:11:49,064 INFO L87 Difference]: Start difference. First operand 119 states and 127 transitions. Second operand 4 states. [2018-01-24 13:11:49,167 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:11:49,168 INFO L93 Difference]: Finished difference Result 125 states and 133 transitions. [2018-01-24 13:11:49,168 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 13:11:49,168 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2018-01-24 13:11:49,168 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:11:49,169 INFO L225 Difference]: With dead ends: 125 [2018-01-24 13:11:49,169 INFO L226 Difference]: Without dead ends: 123 [2018-01-24 13:11:49,170 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:11:49,170 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2018-01-24 13:11:49,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 120. [2018-01-24 13:11:49,177 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-01-24 13:11:49,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 128 transitions. [2018-01-24 13:11:49,178 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 128 transitions. Word has length 23 [2018-01-24 13:11:49,178 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:11:49,178 INFO L432 AbstractCegarLoop]: Abstraction has 120 states and 128 transitions. [2018-01-24 13:11:49,178 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 13:11:49,179 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 128 transitions. [2018-01-24 13:11:49,179 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-24 13:11:49,179 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:11:49,180 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:11:49,180 INFO L371 AbstractCegarLoop]: === Iteration 11 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:11:49,180 INFO L82 PathProgramCache]: Analyzing trace with hash 167210254, now seen corresponding path program 1 times [2018-01-24 13:11:49,180 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:11:49,181 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:49,181 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:11:49,181 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:49,182 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:11:49,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:11:49,195 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:11:49,233 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:11:49,233 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:11:49,233 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 13:11:49,233 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:11:49,234 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 13:11:49,234 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 13:11:49,234 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 13:11:49,234 INFO L87 Difference]: Start difference. First operand 120 states and 128 transitions. Second operand 4 states. [2018-01-24 13:11:49,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:11:49,601 INFO L93 Difference]: Finished difference Result 129 states and 137 transitions. [2018-01-24 13:11:49,601 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 13:11:49,601 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 24 [2018-01-24 13:11:49,602 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:11:49,602 INFO L225 Difference]: With dead ends: 129 [2018-01-24 13:11:49,602 INFO L226 Difference]: Without dead ends: 128 [2018-01-24 13:11:49,603 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 13:11:49,603 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-01-24 13:11:49,609 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 122. [2018-01-24 13:11:49,609 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-01-24 13:11:49,610 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 131 transitions. [2018-01-24 13:11:49,610 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 131 transitions. Word has length 24 [2018-01-24 13:11:49,611 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:11:49,611 INFO L432 AbstractCegarLoop]: Abstraction has 122 states and 131 transitions. [2018-01-24 13:11:49,611 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 13:11:49,611 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 131 transitions. [2018-01-24 13:11:49,612 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-24 13:11:49,612 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:11:49,612 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:11:49,612 INFO L371 AbstractCegarLoop]: === Iteration 12 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:11:49,612 INFO L82 PathProgramCache]: Analyzing trace with hash 167210255, now seen corresponding path program 1 times [2018-01-24 13:11:49,612 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:11:49,613 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:49,613 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:11:49,613 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:49,614 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:11:49,625 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:11:49,626 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:11:49,714 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:11:49,714 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:11:49,715 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 13:11:49,715 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:11:49,715 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 13:11:49,715 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 13:11:49,715 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:11:49,716 INFO L87 Difference]: Start difference. First operand 122 states and 131 transitions. Second operand 7 states. [2018-01-24 13:11:49,940 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:11:49,941 INFO L93 Difference]: Finished difference Result 123 states and 131 transitions. [2018-01-24 13:11:49,941 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 13:11:49,941 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 24 [2018-01-24 13:11:49,941 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:11:49,942 INFO L225 Difference]: With dead ends: 123 [2018-01-24 13:11:49,942 INFO L226 Difference]: Without dead ends: 122 [2018-01-24 13:11:49,942 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2018-01-24 13:11:49,942 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-01-24 13:11:49,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 122. [2018-01-24 13:11:49,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-01-24 13:11:49,947 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 130 transitions. [2018-01-24 13:11:49,947 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 130 transitions. Word has length 24 [2018-01-24 13:11:49,947 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:11:49,947 INFO L432 AbstractCegarLoop]: Abstraction has 122 states and 130 transitions. [2018-01-24 13:11:49,947 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 13:11:49,947 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 130 transitions. [2018-01-24 13:11:49,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-24 13:11:49,948 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:11:49,948 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:11:49,948 INFO L371 AbstractCegarLoop]: === Iteration 13 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:11:49,949 INFO L82 PathProgramCache]: Analyzing trace with hash 151037655, now seen corresponding path program 1 times [2018-01-24 13:11:49,949 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:11:49,950 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:49,950 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:11:49,950 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:49,950 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:11:49,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:11:49,961 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:11:50,042 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:11:50,042 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:11:50,042 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:11:50,042 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:11:50,043 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:11:50,043 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:11:50,043 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:11:50,043 INFO L87 Difference]: Start difference. First operand 122 states and 130 transitions. Second operand 5 states. [2018-01-24 13:11:50,188 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:11:50,189 INFO L93 Difference]: Finished difference Result 122 states and 130 transitions. [2018-01-24 13:11:50,189 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 13:11:50,189 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 24 [2018-01-24 13:11:50,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:11:50,190 INFO L225 Difference]: With dead ends: 122 [2018-01-24 13:11:50,190 INFO L226 Difference]: Without dead ends: 119 [2018-01-24 13:11:50,191 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:11:50,191 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2018-01-24 13:11:50,196 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 117. [2018-01-24 13:11:50,197 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-01-24 13:11:50,198 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 125 transitions. [2018-01-24 13:11:50,198 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 125 transitions. Word has length 24 [2018-01-24 13:11:50,198 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:11:50,198 INFO L432 AbstractCegarLoop]: Abstraction has 117 states and 125 transitions. [2018-01-24 13:11:50,198 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:11:50,199 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 125 transitions. [2018-01-24 13:11:50,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-24 13:11:50,200 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:11:50,200 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:11:50,200 INFO L371 AbstractCegarLoop]: === Iteration 14 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:11:50,200 INFO L82 PathProgramCache]: Analyzing trace with hash 1118005000, now seen corresponding path program 1 times [2018-01-24 13:11:50,200 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:11:50,201 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:50,201 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:11:50,201 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:50,201 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:11:50,213 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:11:50,214 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:11:50,318 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:11:50,318 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:11:50,318 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-24 13:11:50,318 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:11:50,319 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 13:11:50,319 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 13:11:50,319 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-01-24 13:11:50,319 INFO L87 Difference]: Start difference. First operand 117 states and 125 transitions. Second operand 8 states. [2018-01-24 13:11:50,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:11:50,707 INFO L93 Difference]: Finished difference Result 132 states and 141 transitions. [2018-01-24 13:11:50,708 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 13:11:50,708 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 29 [2018-01-24 13:11:50,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:11:50,710 INFO L225 Difference]: With dead ends: 132 [2018-01-24 13:11:50,710 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 13:11:50,710 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2018-01-24 13:11:50,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 13:11:50,720 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 123. [2018-01-24 13:11:50,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-01-24 13:11:50,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 132 transitions. [2018-01-24 13:11:50,721 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 132 transitions. Word has length 29 [2018-01-24 13:11:50,722 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:11:50,722 INFO L432 AbstractCegarLoop]: Abstraction has 123 states and 132 transitions. [2018-01-24 13:11:50,722 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 13:11:50,722 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 132 transitions. [2018-01-24 13:11:50,723 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-24 13:11:50,723 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:11:50,723 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:11:50,724 INFO L371 AbstractCegarLoop]: === Iteration 15 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:11:50,724 INFO L82 PathProgramCache]: Analyzing trace with hash 1118005001, now seen corresponding path program 1 times [2018-01-24 13:11:50,724 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:11:50,725 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:50,725 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:11:50,725 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:50,725 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:11:50,740 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:11:50,741 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:11:50,867 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:11:50,868 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:11:50,868 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 13:11:50,868 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:11:50,868 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 13:11:50,869 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 13:11:50,869 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:11:50,869 INFO L87 Difference]: Start difference. First operand 123 states and 132 transitions. Second operand 7 states. [2018-01-24 13:11:51,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:11:51,258 INFO L93 Difference]: Finished difference Result 132 states and 142 transitions. [2018-01-24 13:11:51,259 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 13:11:51,259 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 29 [2018-01-24 13:11:51,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:11:51,260 INFO L225 Difference]: With dead ends: 132 [2018-01-24 13:11:51,260 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 13:11:51,261 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:11:51,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 13:11:51,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 123. [2018-01-24 13:11:51,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-01-24 13:11:51,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 131 transitions. [2018-01-24 13:11:51,268 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 131 transitions. Word has length 29 [2018-01-24 13:11:51,268 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:11:51,268 INFO L432 AbstractCegarLoop]: Abstraction has 123 states and 131 transitions. [2018-01-24 13:11:51,268 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 13:11:51,268 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 131 transitions. [2018-01-24 13:11:51,269 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-24 13:11:51,269 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:11:51,269 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:11:51,269 INFO L371 AbstractCegarLoop]: === Iteration 16 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:11:51,269 INFO L82 PathProgramCache]: Analyzing trace with hash 1228344885, now seen corresponding path program 1 times [2018-01-24 13:11:51,270 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:11:51,270 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:51,271 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:11:51,271 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:51,271 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:11:51,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:11:51,281 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:11:51,325 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:11:51,325 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:11:51,326 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:11:51,326 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:11:51,326 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:11:51,326 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:11:51,326 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:11:51,327 INFO L87 Difference]: Start difference. First operand 123 states and 131 transitions. Second operand 5 states. [2018-01-24 13:11:51,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:11:51,576 INFO L93 Difference]: Finished difference Result 123 states and 131 transitions. [2018-01-24 13:11:51,576 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:11:51,576 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2018-01-24 13:11:51,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:11:51,577 INFO L225 Difference]: With dead ends: 123 [2018-01-24 13:11:51,577 INFO L226 Difference]: Without dead ends: 121 [2018-01-24 13:11:51,578 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:11:51,578 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-01-24 13:11:51,585 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 119. [2018-01-24 13:11:51,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-01-24 13:11:51,587 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 126 transitions. [2018-01-24 13:11:51,587 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 126 transitions. Word has length 30 [2018-01-24 13:11:51,587 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:11:51,587 INFO L432 AbstractCegarLoop]: Abstraction has 119 states and 126 transitions. [2018-01-24 13:11:51,587 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:11:51,587 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 126 transitions. [2018-01-24 13:11:51,588 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-24 13:11:51,588 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:11:51,588 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:11:51,588 INFO L371 AbstractCegarLoop]: === Iteration 17 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:11:51,589 INFO L82 PathProgramCache]: Analyzing trace with hash 1228344886, now seen corresponding path program 1 times [2018-01-24 13:11:51,589 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:11:51,589 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:51,589 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:11:51,589 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:51,589 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:11:51,601 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:11:51,602 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:11:51,746 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:11:51,746 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:11:51,746 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 13:11:51,746 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:11:51,747 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 13:11:51,747 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 13:11:51,747 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:11:51,747 INFO L87 Difference]: Start difference. First operand 119 states and 126 transitions. Second operand 6 states. [2018-01-24 13:11:51,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:11:51,941 INFO L93 Difference]: Finished difference Result 131 states and 140 transitions. [2018-01-24 13:11:51,942 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 13:11:51,942 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 30 [2018-01-24 13:11:51,942 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:11:51,944 INFO L225 Difference]: With dead ends: 131 [2018-01-24 13:11:51,944 INFO L226 Difference]: Without dead ends: 126 [2018-01-24 13:11:51,944 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:11:51,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-01-24 13:11:51,952 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 119. [2018-01-24 13:11:51,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-01-24 13:11:51,953 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 127 transitions. [2018-01-24 13:11:51,954 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 127 transitions. Word has length 30 [2018-01-24 13:11:51,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:11:51,954 INFO L432 AbstractCegarLoop]: Abstraction has 119 states and 127 transitions. [2018-01-24 13:11:51,954 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 13:11:51,954 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 127 transitions. [2018-01-24 13:11:51,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-24 13:11:51,955 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:11:51,955 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:11:51,955 INFO L371 AbstractCegarLoop]: === Iteration 18 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:11:51,955 INFO L82 PathProgramCache]: Analyzing trace with hash -1343765284, now seen corresponding path program 1 times [2018-01-24 13:11:51,956 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:11:51,956 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:51,956 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:11:51,957 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:51,957 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:11:51,967 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:11:51,968 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:11:52,019 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:11:52,020 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:11:52,020 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:11:52,020 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:11:52,020 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:11:52,020 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:11:52,021 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:11:52,021 INFO L87 Difference]: Start difference. First operand 119 states and 127 transitions. Second operand 5 states. [2018-01-24 13:11:52,226 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:11:52,226 INFO L93 Difference]: Finished difference Result 131 states and 140 transitions. [2018-01-24 13:11:52,226 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:11:52,227 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2018-01-24 13:11:52,227 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:11:52,227 INFO L225 Difference]: With dead ends: 131 [2018-01-24 13:11:52,228 INFO L226 Difference]: Without dead ends: 130 [2018-01-24 13:11:52,228 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-01-24 13:11:52,228 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-01-24 13:11:52,233 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 124. [2018-01-24 13:11:52,233 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-01-24 13:11:52,234 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 134 transitions. [2018-01-24 13:11:52,234 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 134 transitions. Word has length 30 [2018-01-24 13:11:52,235 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:11:52,235 INFO L432 AbstractCegarLoop]: Abstraction has 124 states and 134 transitions. [2018-01-24 13:11:52,235 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:11:52,235 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 134 transitions. [2018-01-24 13:11:52,235 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-24 13:11:52,235 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:11:52,235 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:11:52,235 INFO L371 AbstractCegarLoop]: === Iteration 19 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:11:52,236 INFO L82 PathProgramCache]: Analyzing trace with hash -1343765283, now seen corresponding path program 1 times [2018-01-24 13:11:52,236 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:11:52,236 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:52,236 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:11:52,237 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:52,237 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:11:52,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:11:52,248 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:11:52,343 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:11:52,343 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:11:52,343 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 13:11:52,343 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:11:52,343 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 13:11:52,344 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 13:11:52,344 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:11:52,344 INFO L87 Difference]: Start difference. First operand 124 states and 134 transitions. Second operand 6 states. [2018-01-24 13:11:52,466 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:11:52,466 INFO L93 Difference]: Finished difference Result 235 states and 257 transitions. [2018-01-24 13:11:52,466 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 13:11:52,466 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 30 [2018-01-24 13:11:52,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:11:52,467 INFO L225 Difference]: With dead ends: 235 [2018-01-24 13:11:52,467 INFO L226 Difference]: Without dead ends: 125 [2018-01-24 13:11:52,468 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:11:52,468 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-01-24 13:11:52,474 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 124. [2018-01-24 13:11:52,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-01-24 13:11:52,475 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 132 transitions. [2018-01-24 13:11:52,476 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 132 transitions. Word has length 30 [2018-01-24 13:11:52,476 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:11:52,476 INFO L432 AbstractCegarLoop]: Abstraction has 124 states and 132 transitions. [2018-01-24 13:11:52,476 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 13:11:52,476 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 132 transitions. [2018-01-24 13:11:52,476 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-24 13:11:52,477 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:11:52,477 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:11:52,477 INFO L371 AbstractCegarLoop]: === Iteration 20 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:11:52,477 INFO L82 PathProgramCache]: Analyzing trace with hash 660985097, now seen corresponding path program 1 times [2018-01-24 13:11:52,477 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:11:52,478 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:52,478 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:11:52,478 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:52,478 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:11:52,485 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:11:52,486 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:11:52,765 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:11:52,765 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:11:52,765 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-24 13:11:52,765 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:11:52,766 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 13:11:52,766 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 13:11:52,766 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-01-24 13:11:52,766 INFO L87 Difference]: Start difference. First operand 124 states and 132 transitions. Second operand 8 states. [2018-01-24 13:11:53,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:11:53,013 INFO L93 Difference]: Finished difference Result 135 states and 144 transitions. [2018-01-24 13:11:53,014 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 13:11:53,014 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 31 [2018-01-24 13:11:53,014 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:11:53,015 INFO L225 Difference]: With dead ends: 135 [2018-01-24 13:11:53,015 INFO L226 Difference]: Without dead ends: 134 [2018-01-24 13:11:53,015 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2018-01-24 13:11:53,016 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-01-24 13:11:53,021 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 126. [2018-01-24 13:11:53,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-01-24 13:11:53,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 135 transitions. [2018-01-24 13:11:53,022 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 135 transitions. Word has length 31 [2018-01-24 13:11:53,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:11:53,022 INFO L432 AbstractCegarLoop]: Abstraction has 126 states and 135 transitions. [2018-01-24 13:11:53,022 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 13:11:53,023 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 135 transitions. [2018-01-24 13:11:53,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-24 13:11:53,023 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:11:53,023 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:11:53,023 INFO L371 AbstractCegarLoop]: === Iteration 21 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:11:53,023 INFO L82 PathProgramCache]: Analyzing trace with hash 660985098, now seen corresponding path program 1 times [2018-01-24 13:11:53,023 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:11:53,024 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:53,024 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:11:53,024 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:53,024 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:11:53,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:11:53,035 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:11:53,519 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:11:53,520 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:11:53,520 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 13:11:53,520 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:11:53,520 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 13:11:53,520 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 13:11:53,520 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:11:53,521 INFO L87 Difference]: Start difference. First operand 126 states and 135 transitions. Second operand 10 states. [2018-01-24 13:11:54,051 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:11:54,051 INFO L93 Difference]: Finished difference Result 134 states and 143 transitions. [2018-01-24 13:11:54,051 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-24 13:11:54,051 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 31 [2018-01-24 13:11:54,051 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:11:54,052 INFO L225 Difference]: With dead ends: 134 [2018-01-24 13:11:54,052 INFO L226 Difference]: Without dead ends: 133 [2018-01-24 13:11:54,053 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=73, Invalid=233, Unknown=0, NotChecked=0, Total=306 [2018-01-24 13:11:54,053 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-01-24 13:11:54,060 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 121. [2018-01-24 13:11:54,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121 states. [2018-01-24 13:11:54,061 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 129 transitions. [2018-01-24 13:11:54,062 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 129 transitions. Word has length 31 [2018-01-24 13:11:54,062 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:11:54,062 INFO L432 AbstractCegarLoop]: Abstraction has 121 states and 129 transitions. [2018-01-24 13:11:54,062 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 13:11:54,062 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 129 transitions. [2018-01-24 13:11:54,062 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 13:11:54,062 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:11:54,063 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:11:54,063 INFO L371 AbstractCegarLoop]: === Iteration 22 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:11:54,063 INFO L82 PathProgramCache]: Analyzing trace with hash -184722078, now seen corresponding path program 1 times [2018-01-24 13:11:54,063 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:11:54,063 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:54,064 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:11:54,064 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:11:54,064 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:11:54,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:11:54,074 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:11:54,259 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 13:11:54,260 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:11:54,260 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:11:54,267 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:11:54,267 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:11:54,302 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:11:54,313 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:11:54,491 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:11:54,498 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-01-24 13:11:54,499 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:11:54,514 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:11:54,515 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:11:54,516 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 13:11:54,516 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:11:54,523 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:11:54,523 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:25, output treesize:18 [2018-01-24 13:11:54,575 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:11:54,575 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:11:54,923 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:11:54,923 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:11:54,924 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 16 [2018-01-24 13:11:54,925 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:11:54,935 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 [2018-01-24 13:11:54,936 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:11:54,942 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-01-24 13:11:54,943 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:32, output treesize:7 [2018-01-24 13:11:55,242 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:11:55,242 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:11:55,243 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 3 [2018-01-24 13:11:55,243 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:11:55,252 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:11:55,252 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:11:55,253 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 13 [2018-01-24 13:11:55,254 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:11:55,258 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:11:55,259 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:26, output treesize:3 [2018-01-24 13:11:55,271 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:11:55,307 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:11:55,307 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:11:55,315 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:11:55,316 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:11:55,356 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:11:55,361 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:11:55,387 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:11:55,387 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:11:55,395 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:11:55,396 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:11:55,412 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:11:55,412 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:17 [2018-01-24 13:11:55,647 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:11:55,648 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:11:55,649 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:11:55,650 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 9 [2018-01-24 13:11:55,650 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:11:55,664 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 24 [2018-01-24 13:11:55,664 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:11:55,672 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 13:11:55,672 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:35, output treesize:27 [2018-01-24 13:11:55,708 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:11:55,709 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:11:55,841 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-01-24 13:11:55,841 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:11:55,850 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 8 [2018-01-24 13:11:55,850 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:11:55,852 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:11:55,852 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:11:55,853 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 7 [2018-01-24 13:11:55,853 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 13:11:55,861 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:11:55,861 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 10 variables, input treesize:75, output treesize:3 [2018-01-24 13:11:56,003 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 13:12:01,877 WARN L143 SmtUtils]: Spent 1636ms on a formula simplification that was a NOOP. DAG size: 42 [2018-01-24 13:12:01,881 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 8 [2018-01-24 13:12:01,884 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 8 [2018-01-24 13:12:01,888 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 8 [2018-01-24 13:12:01,972 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:12:01,972 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:12:01,973 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 7 [2018-01-24 13:12:01,973 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:01,975 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 8 [2018-01-24 13:12:01,976 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:01,994 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 21 [2018-01-24 13:12:02,010 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 14 treesize of output 14 [2018-01-24 13:12:02,011 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-01-24 13:12:02,012 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 13:12:02,012 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:02,021 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-01-24 13:12:02,031 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 21 treesize of output 33 [2018-01-24 13:12:02,053 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 12 [2018-01-24 13:12:02,054 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:02,062 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 21 [2018-01-24 13:12:02,063 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-01-24 13:12:02,070 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 21 [2018-01-24 13:12:02,070 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 2 xjuncts. [2018-01-24 13:12:02,102 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 21 [2018-01-24 13:12:02,102 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 2 xjuncts. [2018-01-24 13:12:02,116 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 24 treesize of output 38 [2018-01-24 13:12:02,118 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 8 xjuncts. [2018-01-24 13:12:02,144 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-01-24 13:12:02,168 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 7 xjuncts. [2018-01-24 13:12:02,168 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 4 variables, input treesize:45, output treesize:72 [2018-01-24 13:12:02,229 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:12:02,231 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:12:02,231 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 9, 9, 11, 11] total 39 [2018-01-24 13:12:02,231 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:12:02,231 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-24 13:12:02,231 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-24 13:12:02,232 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=163, Invalid=1389, Unknown=8, NotChecked=0, Total=1560 [2018-01-24 13:12:02,232 INFO L87 Difference]: Start difference. First operand 121 states and 129 transitions. Second operand 20 states. [2018-01-24 13:12:03,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:12:03,379 INFO L93 Difference]: Finished difference Result 183 states and 204 transitions. [2018-01-24 13:12:03,381 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-24 13:12:03,381 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 34 [2018-01-24 13:12:03,381 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:12:03,382 INFO L225 Difference]: With dead ends: 183 [2018-01-24 13:12:03,382 INFO L226 Difference]: Without dead ends: 180 [2018-01-24 13:12:03,383 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 105 SyntacticMatches, 5 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 628 ImplicationChecksByTransitivity, 7.5s TimeCoverageRelationStatistics Valid=295, Invalid=1859, Unknown=8, NotChecked=0, Total=2162 [2018-01-24 13:12:03,383 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-01-24 13:12:03,391 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 113. [2018-01-24 13:12:03,392 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-01-24 13:12:03,392 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 119 transitions. [2018-01-24 13:12:03,392 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 119 transitions. Word has length 34 [2018-01-24 13:12:03,393 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:12:03,393 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 119 transitions. [2018-01-24 13:12:03,393 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-24 13:12:03,393 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 119 transitions. [2018-01-24 13:12:03,393 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-24 13:12:03,393 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:12:03,393 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:12:03,393 INFO L371 AbstractCegarLoop]: === Iteration 23 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:12:03,393 INFO L82 PathProgramCache]: Analyzing trace with hash 501156800, now seen corresponding path program 1 times [2018-01-24 13:12:03,393 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:12:03,394 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:03,394 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:12:03,394 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:03,394 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:12:03,402 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:12:03,403 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:12:03,505 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:12:03,505 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:12:03,505 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 13:12:03,505 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:12:03,505 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 13:12:03,506 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 13:12:03,506 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:12:03,506 INFO L87 Difference]: Start difference. First operand 113 states and 119 transitions. Second operand 7 states. [2018-01-24 13:12:03,668 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:12:03,668 INFO L93 Difference]: Finished difference Result 135 states and 145 transitions. [2018-01-24 13:12:03,668 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 13:12:03,668 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2018-01-24 13:12:03,668 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:12:03,669 INFO L225 Difference]: With dead ends: 135 [2018-01-24 13:12:03,669 INFO L226 Difference]: Without dead ends: 134 [2018-01-24 13:12:03,669 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:12:03,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-01-24 13:12:03,677 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 118. [2018-01-24 13:12:03,678 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-01-24 13:12:03,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 126 transitions. [2018-01-24 13:12:03,679 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 126 transitions. Word has length 33 [2018-01-24 13:12:03,679 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:12:03,679 INFO L432 AbstractCegarLoop]: Abstraction has 118 states and 126 transitions. [2018-01-24 13:12:03,679 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 13:12:03,679 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 126 transitions. [2018-01-24 13:12:03,680 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-24 13:12:03,680 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:12:03,680 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:12:03,680 INFO L371 AbstractCegarLoop]: === Iteration 24 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:12:03,680 INFO L82 PathProgramCache]: Analyzing trace with hash 501156801, now seen corresponding path program 1 times [2018-01-24 13:12:03,680 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:12:03,681 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:03,681 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:12:03,681 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:03,681 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:12:03,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:12:03,692 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:12:03,812 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:12:03,812 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:12:03,813 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-24 13:12:03,813 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:12:03,813 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 13:12:03,813 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 13:12:03,813 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-01-24 13:12:03,814 INFO L87 Difference]: Start difference. First operand 118 states and 126 transitions. Second operand 9 states. [2018-01-24 13:12:04,097 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:12:04,097 INFO L93 Difference]: Finished difference Result 160 states and 174 transitions. [2018-01-24 13:12:04,097 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-24 13:12:04,098 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 33 [2018-01-24 13:12:04,098 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:12:04,099 INFO L225 Difference]: With dead ends: 160 [2018-01-24 13:12:04,099 INFO L226 Difference]: Without dead ends: 159 [2018-01-24 13:12:04,099 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=186, Unknown=0, NotChecked=0, Total=240 [2018-01-24 13:12:04,099 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-01-24 13:12:04,105 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 132. [2018-01-24 13:12:04,105 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-01-24 13:12:04,105 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 142 transitions. [2018-01-24 13:12:04,105 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 142 transitions. Word has length 33 [2018-01-24 13:12:04,105 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:12:04,106 INFO L432 AbstractCegarLoop]: Abstraction has 132 states and 142 transitions. [2018-01-24 13:12:04,106 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 13:12:04,106 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 142 transitions. [2018-01-24 13:12:04,106 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-24 13:12:04,106 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:12:04,106 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:12:04,106 INFO L371 AbstractCegarLoop]: === Iteration 25 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:12:04,106 INFO L82 PathProgramCache]: Analyzing trace with hash 574362333, now seen corresponding path program 1 times [2018-01-24 13:12:04,106 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:12:04,107 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:04,107 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:12:04,107 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:04,107 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:12:04,114 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:12:04,115 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:12:04,196 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:12:04,196 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:12:04,196 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-24 13:12:04,196 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:12:04,197 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 13:12:04,197 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 13:12:04,197 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-01-24 13:12:04,197 INFO L87 Difference]: Start difference. First operand 132 states and 142 transitions. Second operand 8 states. [2018-01-24 13:12:04,360 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:12:04,360 INFO L93 Difference]: Finished difference Result 162 states and 174 transitions. [2018-01-24 13:12:04,360 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 13:12:04,360 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 35 [2018-01-24 13:12:04,361 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:12:04,362 INFO L225 Difference]: With dead ends: 162 [2018-01-24 13:12:04,362 INFO L226 Difference]: Without dead ends: 157 [2018-01-24 13:12:04,362 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-01-24 13:12:04,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-01-24 13:12:04,372 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 132. [2018-01-24 13:12:04,372 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-01-24 13:12:04,373 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 140 transitions. [2018-01-24 13:12:04,373 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 140 transitions. Word has length 35 [2018-01-24 13:12:04,373 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:12:04,373 INFO L432 AbstractCegarLoop]: Abstraction has 132 states and 140 transitions. [2018-01-24 13:12:04,373 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 13:12:04,373 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 140 transitions. [2018-01-24 13:12:04,374 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 13:12:04,374 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:12:04,374 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:12:04,374 INFO L371 AbstractCegarLoop]: === Iteration 26 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:12:04,374 INFO L82 PathProgramCache]: Analyzing trace with hash 655964540, now seen corresponding path program 1 times [2018-01-24 13:12:04,374 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:12:04,375 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:04,375 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:12:04,376 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:04,376 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:12:04,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:12:04,386 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:12:04,419 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:12:04,419 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:12:04,419 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:12:04,419 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:12:04,419 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:12:04,420 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:12:04,420 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:12:04,420 INFO L87 Difference]: Start difference. First operand 132 states and 140 transitions. Second operand 5 states. [2018-01-24 13:12:04,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:12:04,585 INFO L93 Difference]: Finished difference Result 132 states and 140 transitions. [2018-01-24 13:12:04,585 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:12:04,585 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 36 [2018-01-24 13:12:04,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:12:04,586 INFO L225 Difference]: With dead ends: 132 [2018-01-24 13:12:04,586 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 13:12:04,586 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:12:04,587 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 13:12:04,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 131. [2018-01-24 13:12:04,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-01-24 13:12:04,594 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 139 transitions. [2018-01-24 13:12:04,594 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 139 transitions. Word has length 36 [2018-01-24 13:12:04,595 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:12:04,595 INFO L432 AbstractCegarLoop]: Abstraction has 131 states and 139 transitions. [2018-01-24 13:12:04,595 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:12:04,595 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 139 transitions. [2018-01-24 13:12:04,595 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 13:12:04,595 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:12:04,596 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:12:04,596 INFO L371 AbstractCegarLoop]: === Iteration 27 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:12:04,596 INFO L82 PathProgramCache]: Analyzing trace with hash 655964541, now seen corresponding path program 1 times [2018-01-24 13:12:04,596 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:12:04,597 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:04,597 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:12:04,597 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:04,597 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:12:04,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:12:04,607 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:12:04,770 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:12:04,770 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:12:04,770 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 13:12:04,770 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:12:04,771 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 13:12:04,771 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 13:12:04,771 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:12:04,771 INFO L87 Difference]: Start difference. First operand 131 states and 139 transitions. Second operand 10 states. [2018-01-24 13:12:05,249 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:12:05,250 INFO L93 Difference]: Finished difference Result 154 states and 166 transitions. [2018-01-24 13:12:05,250 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-24 13:12:05,250 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 36 [2018-01-24 13:12:05,250 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:12:05,251 INFO L225 Difference]: With dead ends: 154 [2018-01-24 13:12:05,251 INFO L226 Difference]: Without dead ends: 153 [2018-01-24 13:12:05,252 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=57, Invalid=215, Unknown=0, NotChecked=0, Total=272 [2018-01-24 13:12:05,252 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-01-24 13:12:05,262 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 134. [2018-01-24 13:12:05,262 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-01-24 13:12:05,263 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 142 transitions. [2018-01-24 13:12:05,263 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 142 transitions. Word has length 36 [2018-01-24 13:12:05,263 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:12:05,263 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 142 transitions. [2018-01-24 13:12:05,263 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 13:12:05,263 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 142 transitions. [2018-01-24 13:12:05,264 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-24 13:12:05,264 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:12:05,264 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:12:05,264 INFO L371 AbstractCegarLoop]: === Iteration 28 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:12:05,264 INFO L82 PathProgramCache]: Analyzing trace with hash -747720392, now seen corresponding path program 1 times [2018-01-24 13:12:05,265 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:12:05,265 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:05,265 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:12:05,265 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:05,266 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:12:05,284 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:12:05,285 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:12:05,376 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:12:05,376 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:12:05,376 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:12:05,386 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:12:05,386 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:12:05,416 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:12:05,420 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:12:05,429 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:12:05,430 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:05,445 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:05,446 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-24 13:12:05,455 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:12:05,470 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:12:05,471 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-01-24 13:12:05,472 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:05,477 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:05,478 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15 [2018-01-24 13:12:05,508 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-24 13:12:05,510 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-24 13:12:05,510 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:05,512 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:05,519 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:05,520 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:27 [2018-01-24 13:12:05,581 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 57 [2018-01-24 13:12:05,601 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-24 13:12:05,601 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:05,606 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:05,612 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:05,612 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:68, output treesize:27 [2018-01-24 13:12:05,616 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-01-24 13:12:05,619 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 10 [2018-01-24 13:12:05,619 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:05,623 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:05,628 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:12:05,629 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:36, output treesize:15 [2018-01-24 13:12:05,650 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 13:12:05,651 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:12:05,655 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:12:05,670 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:12:05,673 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-01-24 13:12:05,673 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:36, output treesize:23 [2018-01-24 13:12:09,976 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2018-01-24 13:12:09,991 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 13:12:09,992 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:10,014 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 18 [2018-01-24 13:12:10,016 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 5 [2018-01-24 13:12:10,017 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:10,019 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:10,022 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2018-01-24 13:12:10,030 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 13:12:10,030 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:10,034 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:10,046 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-01-24 13:12:10,062 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 3 xjuncts. [2018-01-24 13:12:10,063 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:43, output treesize:25 [2018-01-24 13:12:10,135 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:12:10,168 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:12:10,168 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:12:10,172 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:12:10,172 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:12:10,218 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:12:10,225 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:12:10,242 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:12:10,242 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:10,244 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:10,244 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-24 13:12:10,253 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:12:10,254 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:12:10,255 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-01-24 13:12:10,256 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:10,293 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:10,293 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15 [2018-01-24 13:12:10,310 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-24 13:12:10,312 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-24 13:12:10,313 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:10,325 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:10,331 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:10,332 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:27 [2018-01-24 13:12:10,340 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 57 [2018-01-24 13:12:10,343 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-24 13:12:10,343 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:10,348 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:10,355 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:10,355 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:68, output treesize:27 [2018-01-24 13:12:10,358 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-01-24 13:12:10,360 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 10 [2018-01-24 13:12:10,360 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:10,363 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:10,367 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:12:10,367 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:36, output treesize:15 [2018-01-24 13:12:10,370 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 13:12:10,370 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:12:10,373 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:12:10,375 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:12:10,389 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-01-24 13:12:10,389 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:36, output treesize:23 [2018-01-24 13:12:12,445 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2018-01-24 13:12:12,459 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 13:12:12,459 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:12,473 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 18 [2018-01-24 13:12:12,474 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 5 [2018-01-24 13:12:12,475 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:12,476 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:12,477 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2018-01-24 13:12:12,479 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 13:12:12,479 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:12,482 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:12,495 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-01-24 13:12:12,511 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 3 xjuncts. [2018-01-24 13:12:12,511 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:43, output treesize:25 [2018-01-24 13:12:12,523 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:12:12,525 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:12:12,525 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 8, 7, 8] total 17 [2018-01-24 13:12:12,525 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:12:12,525 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-24 13:12:12,526 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-24 13:12:12,526 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=242, Unknown=2, NotChecked=0, Total=306 [2018-01-24 13:12:12,526 INFO L87 Difference]: Start difference. First operand 134 states and 142 transitions. Second operand 13 states. [2018-01-24 13:12:12,785 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:12:12,785 INFO L93 Difference]: Finished difference Result 134 states and 142 transitions. [2018-01-24 13:12:12,785 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 13:12:12,785 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 37 [2018-01-24 13:12:12,786 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:12:12,786 INFO L225 Difference]: With dead ends: 134 [2018-01-24 13:12:12,786 INFO L226 Difference]: Without dead ends: 133 [2018-01-24 13:12:12,787 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 133 SyntacticMatches, 5 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 91 ImplicationChecksByTransitivity, 6.5s TimeCoverageRelationStatistics Valid=114, Invalid=346, Unknown=2, NotChecked=0, Total=462 [2018-01-24 13:12:12,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-01-24 13:12:12,794 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 133. [2018-01-24 13:12:12,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-01-24 13:12:12,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 141 transitions. [2018-01-24 13:12:12,796 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 141 transitions. Word has length 37 [2018-01-24 13:12:12,796 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:12:12,796 INFO L432 AbstractCegarLoop]: Abstraction has 133 states and 141 transitions. [2018-01-24 13:12:12,796 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-24 13:12:12,796 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 141 transitions. [2018-01-24 13:12:12,797 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-24 13:12:12,797 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:12:12,797 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:12:12,797 INFO L371 AbstractCegarLoop]: === Iteration 29 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:12:12,797 INFO L82 PathProgramCache]: Analyzing trace with hash -747720391, now seen corresponding path program 1 times [2018-01-24 13:12:12,797 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:12:12,798 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:12,798 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:12:12,798 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:12,798 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:12:12,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:12:12,810 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:12:13,060 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:12:13,061 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:12:13,061 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:12:13,070 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:12:13,070 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:12:13,090 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:12:13,093 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:12:13,105 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:12:13,106 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:13,107 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:13,107 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-24 13:12:13,113 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:12:13,113 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:13,119 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:12:13,120 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:12:13,121 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 13:12:13,121 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:13,124 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:13,125 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:20, output treesize:13 [2018-01-24 13:12:13,131 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-24 13:12:13,133 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-24 13:12:13,133 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:13,135 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:13,142 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-24 13:12:13,143 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-24 13:12:13,144 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:13,145 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:13,150 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:13,150 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:36, output treesize:31 [2018-01-24 13:12:13,226 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 52 [2018-01-24 13:12:13,241 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-24 13:12:13,242 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:13,245 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:13,258 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 57 [2018-01-24 13:12:13,260 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-24 13:12:13,261 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:13,264 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:13,270 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:13,270 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:116, output treesize:34 [2018-01-24 13:12:13,305 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-01-24 13:12:13,307 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 10 [2018-01-24 13:12:13,308 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:13,313 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:13,324 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-01-24 13:12:13,338 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-01-24 13:12:13,339 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:13,347 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:13,354 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:13,355 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:52, output treesize:12 [2018-01-24 13:12:13,386 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:12:13,386 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:12:13,487 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:12:13,493 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:12:13,515 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:13,517 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:13,547 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:12:13,555 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:12:13,568 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:12:13,570 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:12:13,577 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 4 dim-2 vars, End of recursive call: 5 dim-0 vars, and 2 xjuncts. [2018-01-24 13:12:13,577 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 6 variables, input treesize:135, output treesize:73 [2018-01-24 13:12:16,752 WARN L143 SmtUtils]: Spent 1076ms on a formula simplification that was a NOOP. DAG size: 42 [2018-01-24 13:12:16,849 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 67 [2018-01-24 13:12:16,869 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 13:12:16,869 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:16,891 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 54 [2018-01-24 13:12:16,894 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 41 [2018-01-24 13:12:16,894 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:16,896 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:16,898 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 19 [2018-01-24 13:12:16,901 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 13:12:16,901 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:16,905 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:16,923 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-01-24 13:12:16,966 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2018-01-24 13:12:16,990 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 13:12:16,991 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,009 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 18 [2018-01-24 13:12:17,011 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 5 [2018-01-24 13:12:17,011 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,012 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,014 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 19 [2018-01-24 13:12:17,015 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 13:12:17,015 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,018 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,027 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-01-24 13:12:17,062 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-01-24 13:12:17,076 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 13:12:17,076 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,081 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2018-01-24 13:12:17,083 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 7 [2018-01-24 13:12:17,083 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,084 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,087 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,089 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 36 [2018-01-24 13:12:17,102 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 13:12:17,102 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,107 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2018-01-24 13:12:17,109 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 7 [2018-01-24 13:12:17,109 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,111 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,113 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,115 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 43 [2018-01-24 13:12:17,138 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 13:12:17,138 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,145 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2018-01-24 13:12:17,147 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 13:12:17,147 INFO L267 ElimStorePlain]: Start of recursive call 25: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,149 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,154 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,177 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 3 dim-2 vars, End of recursive call: and 5 xjuncts. [2018-01-24 13:12:17,177 INFO L202 ElimStorePlain]: Needed 25 recursive calls to eliminate 10 variables, input treesize:115, output treesize:37 [2018-01-24 13:12:17,234 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:12:17,254 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:12:17,254 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:12:17,257 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:12:17,257 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:12:17,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:12:17,305 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:12:17,307 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:12:17,307 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,308 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,308 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-24 13:12:17,314 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:12:17,314 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:12:17,315 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 13:12:17,315 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,320 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:12:17,320 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,323 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,324 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:20, output treesize:13 [2018-01-24 13:12:17,330 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-24 13:12:17,332 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-24 13:12:17,332 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,334 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,341 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-24 13:12:17,343 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-24 13:12:17,343 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,346 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,351 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,352 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:36, output treesize:31 [2018-01-24 13:12:17,366 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 52 [2018-01-24 13:12:17,368 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-24 13:12:17,369 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,373 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,388 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 57 [2018-01-24 13:12:17,391 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-24 13:12:17,391 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,396 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,409 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,409 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:116, output treesize:34 [2018-01-24 13:12:17,434 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-01-24 13:12:17,436 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 10 [2018-01-24 13:12:17,437 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,440 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,448 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-01-24 13:12:17,450 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-01-24 13:12:17,450 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,452 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,457 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,457 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:52, output treesize:12 [2018-01-24 13:12:17,459 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:12:17,459 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:12:17,464 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:12:17,471 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:12:17,493 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:12:17,497 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:12:17,514 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:12:17,523 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:12:17,540 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,542 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:17,548 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 4 dim-2 vars, End of recursive call: 5 dim-0 vars, and 2 xjuncts. [2018-01-24 13:12:17,548 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 6 variables, input treesize:135, output treesize:73 [2018-01-24 13:12:18,588 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 67 [2018-01-24 13:12:18,614 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 13:12:18,614 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:18,633 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 54 [2018-01-24 13:12:18,635 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 41 [2018-01-24 13:12:18,636 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:18,638 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:18,640 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 19 [2018-01-24 13:12:18,643 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 13:12:18,643 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:18,647 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:18,661 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-01-24 13:12:18,689 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2018-01-24 13:12:18,703 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 13:12:18,704 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:18,716 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 18 [2018-01-24 13:12:18,718 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 5 [2018-01-24 13:12:18,719 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:18,720 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:18,722 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 19 [2018-01-24 13:12:18,724 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 13:12:18,724 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:18,727 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:18,737 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-01-24 13:12:18,774 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 36 [2018-01-24 13:12:18,788 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 13:12:18,788 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:18,793 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2018-01-24 13:12:18,795 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 7 [2018-01-24 13:12:18,795 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:18,796 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:18,800 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:18,802 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 43 [2018-01-24 13:12:18,819 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 13:12:18,819 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:18,825 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2018-01-24 13:12:18,827 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 13:12:18,827 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:18,828 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:18,832 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:18,835 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-01-24 13:12:18,851 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 13:12:18,851 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:18,856 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2018-01-24 13:12:18,858 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 7 [2018-01-24 13:12:18,858 INFO L267 ElimStorePlain]: Start of recursive call 25: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:18,859 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:18,862 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:18,885 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 3 dim-2 vars, End of recursive call: and 5 xjuncts. [2018-01-24 13:12:18,885 INFO L202 ElimStorePlain]: Needed 25 recursive calls to eliminate 10 variables, input treesize:115, output treesize:37 [2018-01-24 13:12:18,906 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:12:18,908 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:12:18,908 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 10, 9, 10] total 23 [2018-01-24 13:12:18,908 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:12:18,908 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 13:12:18,908 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 13:12:18,909 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=472, Unknown=0, NotChecked=0, Total=552 [2018-01-24 13:12:18,909 INFO L87 Difference]: Start difference. First operand 133 states and 141 transitions. Second operand 15 states. [2018-01-24 13:12:19,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:12:19,326 INFO L93 Difference]: Finished difference Result 268 states and 290 transitions. [2018-01-24 13:12:19,326 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-24 13:12:19,326 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 37 [2018-01-24 13:12:19,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:12:19,327 INFO L225 Difference]: With dead ends: 268 [2018-01-24 13:12:19,327 INFO L226 Difference]: Without dead ends: 143 [2018-01-24 13:12:19,328 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 166 GetRequests, 122 SyntacticMatches, 12 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 236 ImplicationChecksByTransitivity, 4.9s TimeCoverageRelationStatistics Valid=254, Invalid=868, Unknown=0, NotChecked=0, Total=1122 [2018-01-24 13:12:19,329 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-01-24 13:12:19,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2018-01-24 13:12:19,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-01-24 13:12:19,338 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 151 transitions. [2018-01-24 13:12:19,338 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 151 transitions. Word has length 37 [2018-01-24 13:12:19,339 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:12:19,339 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 151 transitions. [2018-01-24 13:12:19,339 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 13:12:19,339 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 151 transitions. [2018-01-24 13:12:19,339 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-24 13:12:19,340 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:12:19,340 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:12:19,340 INFO L371 AbstractCegarLoop]: === Iteration 30 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:12:19,340 INFO L82 PathProgramCache]: Analyzing trace with hash 484884458, now seen corresponding path program 1 times [2018-01-24 13:12:19,340 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:12:19,341 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:19,341 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:12:19,341 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:19,341 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:12:19,352 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:12:19,353 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:12:19,673 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:12:19,673 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:12:19,673 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-01-24 13:12:19,673 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:12:19,674 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-24 13:12:19,674 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-24 13:12:19,674 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2018-01-24 13:12:19,674 INFO L87 Difference]: Start difference. First operand 143 states and 151 transitions. Second operand 17 states. [2018-01-24 13:12:20,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:12:20,497 INFO L93 Difference]: Finished difference Result 226 states and 243 transitions. [2018-01-24 13:12:20,497 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-24 13:12:20,497 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 40 [2018-01-24 13:12:20,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:12:20,498 INFO L225 Difference]: With dead ends: 226 [2018-01-24 13:12:20,498 INFO L226 Difference]: Without dead ends: 178 [2018-01-24 13:12:20,499 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 198 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=134, Invalid=988, Unknown=0, NotChecked=0, Total=1122 [2018-01-24 13:12:20,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-01-24 13:12:20,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 160. [2018-01-24 13:12:20,508 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-01-24 13:12:20,509 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 171 transitions. [2018-01-24 13:12:20,509 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 171 transitions. Word has length 40 [2018-01-24 13:12:20,509 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:12:20,510 INFO L432 AbstractCegarLoop]: Abstraction has 160 states and 171 transitions. [2018-01-24 13:12:20,510 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-24 13:12:20,510 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 171 transitions. [2018-01-24 13:12:20,510 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-24 13:12:20,511 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:12:20,511 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:12:20,511 INFO L371 AbstractCegarLoop]: === Iteration 31 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:12:20,511 INFO L82 PathProgramCache]: Analyzing trace with hash 1287024166, now seen corresponding path program 1 times [2018-01-24 13:12:20,511 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:12:20,512 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:20,512 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:12:20,512 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:20,512 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:12:20,520 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:12:20,521 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:12:20,695 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:12:20,696 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:12:20,696 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-24 13:12:20,696 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:12:20,696 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-24 13:12:20,696 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-24 13:12:20,696 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2018-01-24 13:12:20,696 INFO L87 Difference]: Start difference. First operand 160 states and 171 transitions. Second operand 12 states. [2018-01-24 13:12:21,230 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:12:21,230 INFO L93 Difference]: Finished difference Result 196 states and 214 transitions. [2018-01-24 13:12:21,231 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-24 13:12:21,231 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 40 [2018-01-24 13:12:21,231 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:12:21,232 INFO L225 Difference]: With dead ends: 196 [2018-01-24 13:12:21,232 INFO L226 Difference]: Without dead ends: 195 [2018-01-24 13:12:21,232 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=107, Invalid=399, Unknown=0, NotChecked=0, Total=506 [2018-01-24 13:12:21,233 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states. [2018-01-24 13:12:21,245 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 169. [2018-01-24 13:12:21,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-01-24 13:12:21,246 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 182 transitions. [2018-01-24 13:12:21,246 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 182 transitions. Word has length 40 [2018-01-24 13:12:21,246 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:12:21,247 INFO L432 AbstractCegarLoop]: Abstraction has 169 states and 182 transitions. [2018-01-24 13:12:21,247 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-24 13:12:21,247 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 182 transitions. [2018-01-24 13:12:21,247 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-24 13:12:21,248 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:12:21,248 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:12:21,248 INFO L371 AbstractCegarLoop]: === Iteration 32 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:12:21,248 INFO L82 PathProgramCache]: Analyzing trace with hash -907645030, now seen corresponding path program 1 times [2018-01-24 13:12:21,248 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:12:21,249 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:21,249 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:12:21,249 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:21,249 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:12:21,258 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:12:21,259 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:12:21,335 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:12:21,336 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:12:21,336 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-24 13:12:21,336 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:12:21,336 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 13:12:21,336 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 13:12:21,337 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-01-24 13:12:21,337 INFO L87 Difference]: Start difference. First operand 169 states and 182 transitions. Second operand 8 states. [2018-01-24 13:12:21,523 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:12:21,523 INFO L93 Difference]: Finished difference Result 186 states and 200 transitions. [2018-01-24 13:12:21,523 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 13:12:21,523 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 44 [2018-01-24 13:12:21,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:12:21,525 INFO L225 Difference]: With dead ends: 186 [2018-01-24 13:12:21,525 INFO L226 Difference]: Without dead ends: 185 [2018-01-24 13:12:21,526 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-01-24 13:12:21,526 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2018-01-24 13:12:21,535 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 178. [2018-01-24 13:12:21,536 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-01-24 13:12:21,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 196 transitions. [2018-01-24 13:12:21,536 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 196 transitions. Word has length 44 [2018-01-24 13:12:21,537 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:12:21,537 INFO L432 AbstractCegarLoop]: Abstraction has 178 states and 196 transitions. [2018-01-24 13:12:21,537 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 13:12:21,537 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 196 transitions. [2018-01-24 13:12:21,537 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-24 13:12:21,537 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:12:21,538 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:12:21,538 INFO L371 AbstractCegarLoop]: === Iteration 33 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:12:21,538 INFO L82 PathProgramCache]: Analyzing trace with hash -907645029, now seen corresponding path program 1 times [2018-01-24 13:12:21,538 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:12:21,539 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:21,539 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:12:21,539 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:21,539 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:12:21,548 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:12:21,548 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:12:21,588 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:12:21,588 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:12:21,588 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 13:12:21,588 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:12:21,589 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 13:12:21,589 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 13:12:21,589 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:12:21,589 INFO L87 Difference]: Start difference. First operand 178 states and 196 transitions. Second operand 6 states. [2018-01-24 13:12:21,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:12:21,710 INFO L93 Difference]: Finished difference Result 185 states and 204 transitions. [2018-01-24 13:12:21,710 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 13:12:21,710 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 44 [2018-01-24 13:12:21,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:12:21,711 INFO L225 Difference]: With dead ends: 185 [2018-01-24 13:12:21,711 INFO L226 Difference]: Without dead ends: 184 [2018-01-24 13:12:21,711 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-24 13:12:21,711 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-01-24 13:12:21,725 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 180. [2018-01-24 13:12:21,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-01-24 13:12:21,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 199 transitions. [2018-01-24 13:12:21,727 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 199 transitions. Word has length 44 [2018-01-24 13:12:21,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:12:21,728 INFO L432 AbstractCegarLoop]: Abstraction has 180 states and 199 transitions. [2018-01-24 13:12:21,728 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 13:12:21,728 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 199 transitions. [2018-01-24 13:12:21,729 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-24 13:12:21,729 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:12:21,729 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:12:21,729 INFO L371 AbstractCegarLoop]: === Iteration 34 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:12:21,729 INFO L82 PathProgramCache]: Analyzing trace with hash 563904760, now seen corresponding path program 1 times [2018-01-24 13:12:21,729 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:12:21,730 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:21,730 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:12:21,730 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:21,730 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:12:21,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:12:21,746 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:12:21,891 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:12:21,891 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:12:21,892 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 13:12:21,892 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:12:21,892 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 13:12:21,892 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 13:12:21,892 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:12:21,892 INFO L87 Difference]: Start difference. First operand 180 states and 199 transitions. Second operand 10 states. [2018-01-24 13:12:22,103 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:12:22,103 INFO L93 Difference]: Finished difference Result 187 states and 202 transitions. [2018-01-24 13:12:22,103 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-24 13:12:22,103 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 43 [2018-01-24 13:12:22,103 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:12:22,104 INFO L225 Difference]: With dead ends: 187 [2018-01-24 13:12:22,104 INFO L226 Difference]: Without dead ends: 186 [2018-01-24 13:12:22,105 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=212, Unknown=0, NotChecked=0, Total=272 [2018-01-24 13:12:22,105 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states. [2018-01-24 13:12:22,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 170. [2018-01-24 13:12:22,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states. [2018-01-24 13:12:22,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 187 transitions. [2018-01-24 13:12:22,119 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 187 transitions. Word has length 43 [2018-01-24 13:12:22,119 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:12:22,119 INFO L432 AbstractCegarLoop]: Abstraction has 170 states and 187 transitions. [2018-01-24 13:12:22,119 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 13:12:22,119 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 187 transitions. [2018-01-24 13:12:22,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-24 13:12:22,120 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:12:22,120 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:12:22,121 INFO L371 AbstractCegarLoop]: === Iteration 35 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:12:22,121 INFO L82 PathProgramCache]: Analyzing trace with hash -368510437, now seen corresponding path program 1 times [2018-01-24 13:12:22,121 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:12:22,122 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:22,122 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:12:22,122 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:22,122 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:12:22,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:12:22,132 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:12:22,342 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:12:22,342 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:12:22,342 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-24 13:12:22,342 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:12:22,343 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-24 13:12:22,343 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-24 13:12:22,343 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-01-24 13:12:22,343 INFO L87 Difference]: Start difference. First operand 170 states and 187 transitions. Second operand 12 states. [2018-01-24 13:12:22,836 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:12:22,836 INFO L93 Difference]: Finished difference Result 205 states and 229 transitions. [2018-01-24 13:12:22,836 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-24 13:12:22,836 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 46 [2018-01-24 13:12:22,837 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:12:22,837 INFO L225 Difference]: With dead ends: 205 [2018-01-24 13:12:22,838 INFO L226 Difference]: Without dead ends: 204 [2018-01-24 13:12:22,838 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=52, Invalid=220, Unknown=0, NotChecked=0, Total=272 [2018-01-24 13:12:22,838 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 204 states. [2018-01-24 13:12:22,848 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 204 to 196. [2018-01-24 13:12:22,848 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 196 states. [2018-01-24 13:12:22,849 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 220 transitions. [2018-01-24 13:12:22,849 INFO L78 Accepts]: Start accepts. Automaton has 196 states and 220 transitions. Word has length 46 [2018-01-24 13:12:22,850 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:12:22,850 INFO L432 AbstractCegarLoop]: Abstraction has 196 states and 220 transitions. [2018-01-24 13:12:22,850 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-24 13:12:22,850 INFO L276 IsEmpty]: Start isEmpty. Operand 196 states and 220 transitions. [2018-01-24 13:12:22,850 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-24 13:12:22,850 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:12:22,851 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:12:22,851 INFO L371 AbstractCegarLoop]: === Iteration 36 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:12:22,851 INFO L82 PathProgramCache]: Analyzing trace with hash 221499877, now seen corresponding path program 1 times [2018-01-24 13:12:22,851 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:12:22,851 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:22,852 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:12:22,852 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:22,852 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:12:22,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:12:22,864 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:12:23,184 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:12:23,184 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:12:23,184 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-01-24 13:12:23,184 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:12:23,184 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-24 13:12:23,184 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-24 13:12:23,184 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=269, Unknown=0, NotChecked=0, Total=306 [2018-01-24 13:12:23,185 INFO L87 Difference]: Start difference. First operand 196 states and 220 transitions. Second operand 18 states. [2018-01-24 13:12:23,949 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:12:23,949 INFO L93 Difference]: Finished difference Result 225 states and 254 transitions. [2018-01-24 13:12:23,950 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-24 13:12:23,950 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 47 [2018-01-24 13:12:23,950 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:12:23,951 INFO L225 Difference]: With dead ends: 225 [2018-01-24 13:12:23,951 INFO L226 Difference]: Without dead ends: 222 [2018-01-24 13:12:23,952 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 200 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=136, Invalid=1054, Unknown=0, NotChecked=0, Total=1190 [2018-01-24 13:12:23,952 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2018-01-24 13:12:23,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 201. [2018-01-24 13:12:23,968 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 201 states. [2018-01-24 13:12:23,969 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201 states to 201 states and 227 transitions. [2018-01-24 13:12:23,969 INFO L78 Accepts]: Start accepts. Automaton has 201 states and 227 transitions. Word has length 47 [2018-01-24 13:12:23,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:12:23,970 INFO L432 AbstractCegarLoop]: Abstraction has 201 states and 227 transitions. [2018-01-24 13:12:23,970 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-24 13:12:23,970 INFO L276 IsEmpty]: Start isEmpty. Operand 201 states and 227 transitions. [2018-01-24 13:12:23,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-24 13:12:23,971 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:12:23,971 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:12:23,971 INFO L371 AbstractCegarLoop]: === Iteration 37 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:12:23,972 INFO L82 PathProgramCache]: Analyzing trace with hash 221499878, now seen corresponding path program 1 times [2018-01-24 13:12:23,972 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:12:23,972 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:23,973 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:12:23,973 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:23,973 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:12:23,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:12:23,986 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:12:24,363 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:12:24,364 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:12:24,364 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2018-01-24 13:12:24,364 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:12:24,364 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-24 13:12:24,364 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-24 13:12:24,364 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=303, Unknown=0, NotChecked=0, Total=342 [2018-01-24 13:12:24,364 INFO L87 Difference]: Start difference. First operand 201 states and 227 transitions. Second operand 19 states. [2018-01-24 13:12:25,404 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:12:25,404 INFO L93 Difference]: Finished difference Result 242 states and 273 transitions. [2018-01-24 13:12:25,404 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-24 13:12:25,404 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 47 [2018-01-24 13:12:25,405 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:12:25,405 INFO L225 Difference]: With dead ends: 242 [2018-01-24 13:12:25,406 INFO L226 Difference]: Without dead ends: 239 [2018-01-24 13:12:25,406 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 247 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=150, Invalid=1256, Unknown=0, NotChecked=0, Total=1406 [2018-01-24 13:12:25,406 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239 states. [2018-01-24 13:12:25,417 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239 to 218. [2018-01-24 13:12:25,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 218 states. [2018-01-24 13:12:25,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 218 states to 218 states and 249 transitions. [2018-01-24 13:12:25,418 INFO L78 Accepts]: Start accepts. Automaton has 218 states and 249 transitions. Word has length 47 [2018-01-24 13:12:25,418 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:12:25,418 INFO L432 AbstractCegarLoop]: Abstraction has 218 states and 249 transitions. [2018-01-24 13:12:25,418 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-24 13:12:25,418 INFO L276 IsEmpty]: Start isEmpty. Operand 218 states and 249 transitions. [2018-01-24 13:12:25,419 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-24 13:12:25,419 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:12:25,419 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:12:25,420 INFO L371 AbstractCegarLoop]: === Iteration 38 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:12:25,420 INFO L82 PathProgramCache]: Analyzing trace with hash 1633162428, now seen corresponding path program 1 times [2018-01-24 13:12:25,420 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:12:25,421 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:25,421 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:12:25,421 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:25,421 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:12:25,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:12:25,428 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:12:25,465 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:12:25,466 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:12:25,466 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:12:25,466 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:12:25,466 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:12:25,466 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:12:25,466 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:12:25,466 INFO L87 Difference]: Start difference. First operand 218 states and 249 transitions. Second operand 5 states. [2018-01-24 13:12:25,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:12:25,534 INFO L93 Difference]: Finished difference Result 223 states and 255 transitions. [2018-01-24 13:12:25,534 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 13:12:25,534 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 50 [2018-01-24 13:12:25,535 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:12:25,535 INFO L225 Difference]: With dead ends: 223 [2018-01-24 13:12:25,535 INFO L226 Difference]: Without dead ends: 222 [2018-01-24 13:12:25,536 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:12:25,536 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2018-01-24 13:12:25,547 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 217. [2018-01-24 13:12:25,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 217 states. [2018-01-24 13:12:25,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 217 states to 217 states and 247 transitions. [2018-01-24 13:12:25,548 INFO L78 Accepts]: Start accepts. Automaton has 217 states and 247 transitions. Word has length 50 [2018-01-24 13:12:25,549 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:12:25,549 INFO L432 AbstractCegarLoop]: Abstraction has 217 states and 247 transitions. [2018-01-24 13:12:25,549 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:12:25,549 INFO L276 IsEmpty]: Start isEmpty. Operand 217 states and 247 transitions. [2018-01-24 13:12:25,549 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-24 13:12:25,549 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:12:25,549 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:12:25,549 INFO L371 AbstractCegarLoop]: === Iteration 39 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:12:25,550 INFO L82 PathProgramCache]: Analyzing trace with hash 1633162429, now seen corresponding path program 1 times [2018-01-24 13:12:25,550 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:12:25,550 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:25,550 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:12:25,550 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:25,551 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:12:25,557 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:12:25,557 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:12:25,598 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:12:25,598 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:12:25,598 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:12:25,598 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:12:25,599 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:12:25,599 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:12:25,599 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:12:25,599 INFO L87 Difference]: Start difference. First operand 217 states and 247 transitions. Second operand 5 states. [2018-01-24 13:12:25,707 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:12:25,707 INFO L93 Difference]: Finished difference Result 222 states and 253 transitions. [2018-01-24 13:12:25,707 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 13:12:25,708 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 50 [2018-01-24 13:12:25,708 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:12:25,709 INFO L225 Difference]: With dead ends: 222 [2018-01-24 13:12:25,709 INFO L226 Difference]: Without dead ends: 221 [2018-01-24 13:12:25,709 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:12:25,710 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states. [2018-01-24 13:12:25,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 216. [2018-01-24 13:12:25,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 216 states. [2018-01-24 13:12:25,720 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 216 states to 216 states and 245 transitions. [2018-01-24 13:12:25,720 INFO L78 Accepts]: Start accepts. Automaton has 216 states and 245 transitions. Word has length 50 [2018-01-24 13:12:25,721 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:12:25,721 INFO L432 AbstractCegarLoop]: Abstraction has 216 states and 245 transitions. [2018-01-24 13:12:25,721 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:12:25,721 INFO L276 IsEmpty]: Start isEmpty. Operand 216 states and 245 transitions. [2018-01-24 13:12:25,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-24 13:12:25,722 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:12:25,722 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:12:25,722 INFO L371 AbstractCegarLoop]: === Iteration 40 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:12:25,722 INFO L82 PathProgramCache]: Analyzing trace with hash -420728712, now seen corresponding path program 1 times [2018-01-24 13:12:25,723 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:12:25,723 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:25,723 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:12:25,723 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:12:25,724 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:12:25,733 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:12:25,734 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:12:26,400 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:12:26,400 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:12:26,400 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:12:26,405 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:12:26,405 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:12:26,432 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:12:26,437 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:12:26,441 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:12:26,441 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:26,445 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:26,445 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 13:12:26,466 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-24 13:12:26,467 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 13:12:26,468 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:26,469 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:26,489 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-24 13:12:26,490 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 13:12:26,490 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:26,492 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:26,496 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:26,496 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:31, output treesize:23 [2018-01-24 13:12:26,754 WARN L1029 $PredicateComparison]: unable to prove that (exists ((|append_#t~ret17.base| Int) (append_~node~12.base Int) (|append_#t~ret17.offset| Int)) (and (= (let ((.cse0 (store |c_old(#memory_$Pointer$.offset)| append_~node~12.base (store (store (select |c_old(#memory_$Pointer$.offset)| append_~node~12.base) 4 (select (select |c_old(#memory_$Pointer$.offset)| |c_append_#in~pointerToList.base|) |c_append_#in~pointerToList.offset|)) 0 |append_#t~ret17.offset|)))) (store .cse0 |c_append_#in~pointerToList.base| (store (select .cse0 |c_append_#in~pointerToList.base|) |c_append_#in~pointerToList.offset| 0))) |c_#memory_$Pointer$.offset|) (= 0 (select |c_old(#valid)| append_~node~12.base)) (= |c_#memory_$Pointer$.base| (let ((.cse1 (store |c_old(#memory_$Pointer$.base)| append_~node~12.base (store (store (select |c_old(#memory_$Pointer$.base)| append_~node~12.base) 4 (select (select |c_old(#memory_$Pointer$.base)| |c_append_#in~pointerToList.base|) |c_append_#in~pointerToList.offset|)) 0 |append_#t~ret17.base|)))) (store .cse1 |c_append_#in~pointerToList.base| (store (select .cse1 |c_append_#in~pointerToList.base|) |c_append_#in~pointerToList.offset| append_~node~12.base)))))) is different from true [2018-01-24 13:12:26,835 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:12:26,836 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:12:26,837 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 13:12:26,837 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:26,860 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 38 [2018-01-24 13:12:26,862 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-01-24 13:12:26,866 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 19 [2018-01-24 13:12:26,866 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:26,871 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:26,886 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 34 [2018-01-24 13:12:26,890 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-01-24 13:12:26,890 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:26,896 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:26,901 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:26,917 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 38 [2018-01-24 13:12:26,919 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-01-24 13:12:26,922 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 19 [2018-01-24 13:12:26,922 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:26,925 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:26,934 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:12:26,936 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 34 [2018-01-24 13:12:26,938 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-01-24 13:12:26,938 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:26,943 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:26,947 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:26,958 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:12:26,958 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 6 variables, input treesize:110, output treesize:44 [2018-01-24 13:12:27,506 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:12:27,507 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:12:27,512 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:12:27,514 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 100 [2018-01-24 13:12:27,517 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 114 [2018-01-24 13:12:27,518 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:27,526 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:27,538 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:12:27,539 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:12:27,544 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 84 [2018-01-24 13:12:27,547 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 77 treesize of output 61 [2018-01-24 13:12:27,548 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:27,554 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:27,562 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:12:27,562 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:94, output treesize:64 [2018-01-24 13:12:27,622 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 30 [2018-01-24 13:12:27,624 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:12:27,624 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 15 [2018-01-24 13:12:27,624 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:27,630 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-01-24 13:12:27,630 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:27,632 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:27,647 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 28 [2018-01-24 13:12:27,649 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:12:27,649 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 0 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 5 [2018-01-24 13:12:27,649 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:27,653 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-01-24 13:12:27,654 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-01-24 13:12:27,655 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:27,658 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:12:27,658 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 4 variables, input treesize:75, output treesize:7 [2018-01-24 13:12:27,698 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:12:27,698 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:12:28,488 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 8 [2018-01-24 13:12:29,226 WARN L143 SmtUtils]: Spent 544ms on a formula simplification that was a NOOP. DAG size: 103 [2018-01-24 13:12:29,239 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 8 [2018-01-24 13:12:31,383 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 32 [2018-01-24 13:12:33,637 WARN L143 SmtUtils]: Spent 2237ms on a formula simplification that was a NOOP. DAG size: 156 [2018-01-24 13:12:33,645 FATAL L265 ToolchainWalker]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: line 162100 column 11: unknown constant v_prenex_25 at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1362) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser.do_action(Parser.java:582) at com.github.jhoenicke.javacup.runtime.LRParser.parse(LRParser.java:419) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parse(Executor.java:206) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Executor.parseSuccess(Executor.java:222) at de.uni_freiburg.informatik.ultimate.smtsolver.external.Scriptor.assertTerm(Scriptor.java:146) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.arrays.DiffWrapperScript.assertTerm(DiffWrapperScript.java:200) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.managedscript.ManagedScript.assertTerm(ManagedScript.java:133) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.IncrementalPlicationChecker.checkPlication(IncrementalPlicationChecker.java:120) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.checkEqualityStatus(Elim1Store.java:667) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.analyzeIndexEqualities(Elim1Store.java:759) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.Elim1Store.elim1(Elim1Store.java:300) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:221) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.elimAllRec(ElimStorePlain.java:199) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.elim(PartialQuantifierElimination.java:270) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.tryToEliminate(PartialQuantifierElimination.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:243) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:445) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:421) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:292) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:328) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:173) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:160) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:237) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:185) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseTaipanRefinementStrategy.getTraceCheck(BaseTaipanRefinementStrategy.java:213) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:231) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:205) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:68) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:368) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:381) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:316) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:294) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:149) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:113) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:117) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:324) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.runToolchainDefault(DefaultToolchainJob.java:221) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.BasicToolchainJob.run(BasicToolchainJob.java:134) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-01-24 13:12:33,648 INFO L168 Benchmark]: Toolchain (without parser) took 47872.28 ms. Allocated memory was 302.5 MB in the beginning and 687.9 MB in the end (delta: 385.4 MB). Free memory was 261.6 MB in the beginning and 582.1 MB in the end (delta: -320.6 MB). Peak memory consumption was 64.8 MB. Max. memory is 5.3 GB. [2018-01-24 13:12:33,649 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 302.5 MB. Free memory is still 267.5 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-24 13:12:33,649 INFO L168 Benchmark]: CACSL2BoogieTranslator took 213.12 ms. Allocated memory is still 302.5 MB. Free memory was 261.6 MB in the beginning and 249.6 MB in the end (delta: 12.0 MB). Peak memory consumption was 12.0 MB. Max. memory is 5.3 GB. [2018-01-24 13:12:33,649 INFO L168 Benchmark]: Boogie Preprocessor took 47.40 ms. Allocated memory is still 302.5 MB. Free memory was 249.6 MB in the beginning and 247.6 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-24 13:12:33,649 INFO L168 Benchmark]: RCFGBuilder took 539.38 ms. Allocated memory is still 302.5 MB. Free memory was 247.6 MB in the beginning and 217.1 MB in the end (delta: 30.5 MB). Peak memory consumption was 30.5 MB. Max. memory is 5.3 GB. [2018-01-24 13:12:33,650 INFO L168 Benchmark]: TraceAbstraction took 47065.70 ms. Allocated memory was 302.5 MB in the beginning and 687.9 MB in the end (delta: 385.4 MB). Free memory was 217.1 MB in the beginning and 582.1 MB in the end (delta: -365.0 MB). Peak memory consumption was 20.3 MB. Max. memory is 5.3 GB. [2018-01-24 13:12:33,652 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 302.5 MB. Free memory is still 267.5 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 213.12 ms. Allocated memory is still 302.5 MB. Free memory was 261.6 MB in the beginning and 249.6 MB in the end (delta: 12.0 MB). Peak memory consumption was 12.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 47.40 ms. Allocated memory is still 302.5 MB. Free memory was 249.6 MB in the beginning and 247.6 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 539.38 ms. Allocated memory is still 302.5 MB. Free memory was 247.6 MB in the beginning and 217.1 MB in the end (delta: 30.5 MB). Peak memory consumption was 30.5 MB. Max. memory is 5.3 GB. * TraceAbstraction took 47065.70 ms. Allocated memory was 302.5 MB in the beginning and 687.9 MB in the end (delta: 385.4 MB). Free memory was 217.1 MB in the beginning and 582.1 MB in the end (delta: -365.0 MB). Peak memory consumption was 20.3 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: SMTLIBException: line 162100 column 11: unknown constant v_prenex_25 de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: line 162100 column 11: unknown constant v_prenex_25: de.uni_freiburg.informatik.ultimate.smtsolver.external.Parser$Action$.CUP$do_action(Parser.java:1362) RESULT: Ultimate could not prove your program: Toolchain returned no result. Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/optional_data_creation_test04_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_RubberTaipan+AI_EQ.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-24_13-12-33-660.csv Received shutdown request...