java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_RubberTaipan+AI_EQ.epf -i ../../../trunk/examples/svcomp/memsafety-ext2/optional_data_creation_test04_true-valid-memsafety.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-24 13:13:31,639 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-24 13:13:31,641 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-24 13:13:31,656 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-24 13:13:31,657 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-24 13:13:31,658 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-24 13:13:31,659 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-24 13:13:31,660 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-24 13:13:31,662 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-24 13:13:31,663 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-24 13:13:31,663 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-24 13:13:31,664 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-24 13:13:31,665 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-24 13:13:31,666 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-24 13:13:31,667 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-24 13:13:31,669 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-24 13:13:31,672 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-24 13:13:31,673 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-24 13:13:31,675 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-24 13:13:31,676 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-24 13:13:31,678 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-01-24 13:13:31,683 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-24 13:13:31,683 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-24 13:13:31,684 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_RubberTaipan+AI_EQ.epf [2018-01-24 13:13:31,693 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-24 13:13:31,694 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-24 13:13:31,695 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-24 13:13:31,695 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-24 13:13:31,695 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-24 13:13:31,695 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-24 13:13:31,695 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-24 13:13:31,696 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-24 13:13:31,696 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-24 13:13:31,696 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-24 13:13:31,697 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-24 13:13:31,697 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-24 13:13:31,697 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-24 13:13:31,697 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-24 13:13:31,697 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-24 13:13:31,697 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-24 13:13:31,698 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-24 13:13:31,698 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-24 13:13:31,698 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-24 13:13:31,698 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-24 13:13:31,698 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-24 13:13:31,699 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-24 13:13:31,699 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-24 13:13:31,699 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 13:13:31,699 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-24 13:13:31,699 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-24 13:13:31,700 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-24 13:13:31,700 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-24 13:13:31,700 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-01-24 13:13:31,700 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-24 13:13:31,700 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-24 13:13:31,701 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-24 13:13:31,701 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-24 13:13:31,702 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-24 13:13:31,736 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-24 13:13:31,749 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-24 13:13:31,754 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-24 13:13:31,755 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-24 13:13:31,756 INFO L276 PluginConnector]: CDTParser initialized [2018-01-24 13:13:31,757 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety-ext2/optional_data_creation_test04_true-valid-memsafety.i [2018-01-24 13:13:31,935 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-24 13:13:31,941 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-24 13:13:31,942 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-24 13:13:31,942 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-24 13:13:31,949 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-24 13:13:31,950 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 01:13:31" (1/1) ... [2018-01-24 13:13:31,952 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5977c944 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:13:31, skipping insertion in model container [2018-01-24 13:13:31,953 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 01:13:31" (1/1) ... [2018-01-24 13:13:31,973 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 13:13:32,015 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 13:13:32,131 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 13:13:32,149 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 13:13:32,155 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:13:32 WrapperNode [2018-01-24 13:13:32,155 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-24 13:13:32,156 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-24 13:13:32,156 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-24 13:13:32,156 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-24 13:13:32,167 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:13:32" (1/1) ... [2018-01-24 13:13:32,167 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:13:32" (1/1) ... [2018-01-24 13:13:32,179 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:13:32" (1/1) ... [2018-01-24 13:13:32,179 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:13:32" (1/1) ... [2018-01-24 13:13:32,185 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:13:32" (1/1) ... [2018-01-24 13:13:32,189 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:13:32" (1/1) ... [2018-01-24 13:13:32,190 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:13:32" (1/1) ... [2018-01-24 13:13:32,192 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-24 13:13:32,192 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-24 13:13:32,192 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-24 13:13:32,193 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-24 13:13:32,194 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:13:32" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 13:13:32,238 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-24 13:13:32,238 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-24 13:13:32,238 INFO L136 BoogieDeclarations]: Found implementation of procedure create_data [2018-01-24 13:13:32,238 INFO L136 BoogieDeclarations]: Found implementation of procedure freeData [2018-01-24 13:13:32,238 INFO L136 BoogieDeclarations]: Found implementation of procedure append [2018-01-24 13:13:32,238 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-24 13:13:32,239 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-24 13:13:32,239 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-24 13:13:32,239 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-24 13:13:32,239 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-24 13:13:32,239 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-24 13:13:32,239 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-24 13:13:32,240 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-24 13:13:32,240 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-24 13:13:32,240 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-24 13:13:32,240 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-24 13:13:32,240 INFO L128 BoogieDeclarations]: Found specification of procedure create_data [2018-01-24 13:13:32,240 INFO L128 BoogieDeclarations]: Found specification of procedure freeData [2018-01-24 13:13:32,241 INFO L128 BoogieDeclarations]: Found specification of procedure append [2018-01-24 13:13:32,241 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-24 13:13:32,241 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-24 13:13:32,241 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-24 13:13:32,676 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-24 13:13:32,677 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 01:13:32 BoogieIcfgContainer [2018-01-24 13:13:32,677 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-24 13:13:32,678 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-24 13:13:32,679 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-24 13:13:32,681 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-24 13:13:32,682 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.01 01:13:31" (1/3) ... [2018-01-24 13:13:32,683 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1449c7f7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 01:13:32, skipping insertion in model container [2018-01-24 13:13:32,683 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:13:32" (2/3) ... [2018-01-24 13:13:32,683 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1449c7f7 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 01:13:32, skipping insertion in model container [2018-01-24 13:13:32,684 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 01:13:32" (3/3) ... [2018-01-24 13:13:32,686 INFO L105 eAbstractionObserver]: Analyzing ICFG optional_data_creation_test04_true-valid-memsafety.i [2018-01-24 13:13:32,695 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-24 13:13:32,704 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 45 error locations. [2018-01-24 13:13:32,758 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-24 13:13:32,758 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-24 13:13:32,758 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-24 13:13:32,758 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-24 13:13:32,758 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-24 13:13:32,759 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-24 13:13:32,759 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-24 13:13:32,759 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-24 13:13:32,760 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-24 13:13:32,785 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states. [2018-01-24 13:13:32,793 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-01-24 13:13:32,793 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:13:32,795 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:13:32,795 INFO L371 AbstractCegarLoop]: === Iteration 1 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:13:32,800 INFO L82 PathProgramCache]: Analyzing trace with hash -548983798, now seen corresponding path program 1 times [2018-01-24 13:13:32,803 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:13:32,867 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:32,867 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:32,867 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:32,868 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:13:32,910 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:32,920 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:13:32,982 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:32,984 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:13:32,984 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 13:13:32,984 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:13:32,986 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 13:13:32,996 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 13:13:32,997 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 13:13:32,999 INFO L87 Difference]: Start difference. First operand 121 states. Second operand 3 states. [2018-01-24 13:13:33,241 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:13:33,242 INFO L93 Difference]: Finished difference Result 235 states and 262 transitions. [2018-01-24 13:13:33,242 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 13:13:33,244 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-01-24 13:13:33,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:13:33,256 INFO L225 Difference]: With dead ends: 235 [2018-01-24 13:13:33,256 INFO L226 Difference]: Without dead ends: 120 [2018-01-24 13:13:33,259 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 13:13:33,273 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-01-24 13:13:33,298 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 117. [2018-01-24 13:13:33,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-01-24 13:13:33,302 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 124 transitions. [2018-01-24 13:13:33,303 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 124 transitions. Word has length 7 [2018-01-24 13:13:33,304 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:13:33,304 INFO L432 AbstractCegarLoop]: Abstraction has 117 states and 124 transitions. [2018-01-24 13:13:33,304 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 13:13:33,304 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 124 transitions. [2018-01-24 13:13:33,305 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-01-24 13:13:33,305 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:13:33,305 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:13:33,305 INFO L371 AbstractCegarLoop]: === Iteration 2 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:13:33,305 INFO L82 PathProgramCache]: Analyzing trace with hash -548983797, now seen corresponding path program 1 times [2018-01-24 13:13:33,306 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:13:33,306 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:33,306 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:33,307 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:33,307 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:13:33,321 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:33,322 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:13:33,364 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:33,364 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:13:33,364 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 13:13:33,364 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:13:33,366 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 13:13:33,366 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 13:13:33,366 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 13:13:33,366 INFO L87 Difference]: Start difference. First operand 117 states and 124 transitions. Second operand 3 states. [2018-01-24 13:13:33,451 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:13:33,452 INFO L93 Difference]: Finished difference Result 119 states and 127 transitions. [2018-01-24 13:13:33,452 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 13:13:33,452 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-01-24 13:13:33,453 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:13:33,454 INFO L225 Difference]: With dead ends: 119 [2018-01-24 13:13:33,454 INFO L226 Difference]: Without dead ends: 118 [2018-01-24 13:13:33,456 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 13:13:33,456 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states. [2018-01-24 13:13:33,464 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 116. [2018-01-24 13:13:33,464 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-01-24 13:13:33,465 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 123 transitions. [2018-01-24 13:13:33,466 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 123 transitions. Word has length 7 [2018-01-24 13:13:33,466 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:13:33,466 INFO L432 AbstractCegarLoop]: Abstraction has 116 states and 123 transitions. [2018-01-24 13:13:33,466 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 13:13:33,466 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 123 transitions. [2018-01-24 13:13:33,466 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-01-24 13:13:33,466 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:13:33,467 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:13:33,467 INFO L371 AbstractCegarLoop]: === Iteration 3 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:13:33,467 INFO L82 PathProgramCache]: Analyzing trace with hash 1805977305, now seen corresponding path program 1 times [2018-01-24 13:13:33,467 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:13:33,468 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:33,468 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:33,468 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:33,469 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:13:33,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:33,490 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:13:33,556 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:33,557 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:13:33,557 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:13:33,557 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:13:33,557 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:13:33,557 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:13:33,557 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:13:33,558 INFO L87 Difference]: Start difference. First operand 116 states and 123 transitions. Second operand 5 states. [2018-01-24 13:13:33,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:13:33,795 INFO L93 Difference]: Finished difference Result 130 states and 138 transitions. [2018-01-24 13:13:33,795 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:13:33,795 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 14 [2018-01-24 13:13:33,795 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:13:33,796 INFO L225 Difference]: With dead ends: 130 [2018-01-24 13:13:33,796 INFO L226 Difference]: Without dead ends: 129 [2018-01-24 13:13:33,797 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:13:33,797 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-01-24 13:13:33,804 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 122. [2018-01-24 13:13:33,805 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-01-24 13:13:33,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 131 transitions. [2018-01-24 13:13:33,806 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 131 transitions. Word has length 14 [2018-01-24 13:13:33,806 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:13:33,806 INFO L432 AbstractCegarLoop]: Abstraction has 122 states and 131 transitions. [2018-01-24 13:13:33,807 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:13:33,807 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 131 transitions. [2018-01-24 13:13:33,807 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-01-24 13:13:33,807 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:13:33,807 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:13:33,807 INFO L371 AbstractCegarLoop]: === Iteration 4 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:13:33,807 INFO L82 PathProgramCache]: Analyzing trace with hash 1805977306, now seen corresponding path program 1 times [2018-01-24 13:13:33,807 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:13:33,808 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:33,808 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:33,809 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:33,809 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:13:33,822 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:33,823 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:13:33,922 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:33,922 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:13:33,942 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 13:13:33,942 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:13:33,942 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 13:13:33,942 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 13:13:33,942 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:13:33,943 INFO L87 Difference]: Start difference. First operand 122 states and 131 transitions. Second operand 7 states. [2018-01-24 13:13:34,133 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:13:34,134 INFO L93 Difference]: Finished difference Result 128 states and 137 transitions. [2018-01-24 13:13:34,134 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 13:13:34,134 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 14 [2018-01-24 13:13:34,135 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:13:34,136 INFO L225 Difference]: With dead ends: 128 [2018-01-24 13:13:34,136 INFO L226 Difference]: Without dead ends: 127 [2018-01-24 13:13:34,137 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-01-24 13:13:34,137 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-01-24 13:13:34,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 122. [2018-01-24 13:13:34,146 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-01-24 13:13:34,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 130 transitions. [2018-01-24 13:13:34,148 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 130 transitions. Word has length 14 [2018-01-24 13:13:34,148 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:13:34,148 INFO L432 AbstractCegarLoop]: Abstraction has 122 states and 130 transitions. [2018-01-24 13:13:34,149 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 13:13:34,149 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 130 transitions. [2018-01-24 13:13:34,149 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-01-24 13:13:34,149 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:13:34,149 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:13:34,150 INFO L371 AbstractCegarLoop]: === Iteration 5 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:13:34,150 INFO L82 PathProgramCache]: Analyzing trace with hash 150721727, now seen corresponding path program 1 times [2018-01-24 13:13:34,150 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:13:34,151 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:34,151 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:34,151 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:34,151 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:13:34,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:34,164 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:13:34,189 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:34,189 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:13:34,189 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 13:13:34,189 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:13:34,190 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 13:13:34,190 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 13:13:34,190 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 13:13:34,190 INFO L87 Difference]: Start difference. First operand 122 states and 130 transitions. Second operand 4 states. [2018-01-24 13:13:34,288 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:13:34,288 INFO L93 Difference]: Finished difference Result 122 states and 130 transitions. [2018-01-24 13:13:34,288 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 13:13:34,288 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-01-24 13:13:34,289 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:13:34,289 INFO L225 Difference]: With dead ends: 122 [2018-01-24 13:13:34,289 INFO L226 Difference]: Without dead ends: 121 [2018-01-24 13:13:34,290 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:13:34,290 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-01-24 13:13:34,295 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 121. [2018-01-24 13:13:34,295 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121 states. [2018-01-24 13:13:34,296 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 129 transitions. [2018-01-24 13:13:34,296 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 129 transitions. Word has length 15 [2018-01-24 13:13:34,297 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:13:34,297 INFO L432 AbstractCegarLoop]: Abstraction has 121 states and 129 transitions. [2018-01-24 13:13:34,297 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 13:13:34,297 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 129 transitions. [2018-01-24 13:13:34,297 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-01-24 13:13:34,297 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:13:34,297 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:13:34,298 INFO L371 AbstractCegarLoop]: === Iteration 6 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:13:34,298 INFO L82 PathProgramCache]: Analyzing trace with hash 150721728, now seen corresponding path program 1 times [2018-01-24 13:13:34,298 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:13:34,299 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:34,299 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:34,299 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:34,300 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:13:34,311 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:34,312 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:13:34,408 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:34,408 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:13:34,408 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 13:13:34,408 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:13:34,409 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 13:13:34,409 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 13:13:34,409 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 13:13:34,409 INFO L87 Difference]: Start difference. First operand 121 states and 129 transitions. Second operand 4 states. [2018-01-24 13:13:34,472 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:13:34,472 INFO L93 Difference]: Finished difference Result 121 states and 129 transitions. [2018-01-24 13:13:34,472 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 13:13:34,473 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-01-24 13:13:34,473 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:13:34,473 INFO L225 Difference]: With dead ends: 121 [2018-01-24 13:13:34,473 INFO L226 Difference]: Without dead ends: 120 [2018-01-24 13:13:34,474 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:13:34,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-01-24 13:13:34,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 120. [2018-01-24 13:13:34,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-01-24 13:13:34,483 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 128 transitions. [2018-01-24 13:13:34,483 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 128 transitions. Word has length 15 [2018-01-24 13:13:34,483 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:13:34,483 INFO L432 AbstractCegarLoop]: Abstraction has 120 states and 128 transitions. [2018-01-24 13:13:34,483 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 13:13:34,483 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 128 transitions. [2018-01-24 13:13:34,484 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-24 13:13:34,484 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:13:34,484 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:13:34,484 INFO L371 AbstractCegarLoop]: === Iteration 7 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:13:34,484 INFO L82 PathProgramCache]: Analyzing trace with hash 1247099981, now seen corresponding path program 1 times [2018-01-24 13:13:34,484 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:13:34,485 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:34,485 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:34,485 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:34,485 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:13:34,498 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:34,499 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:13:34,536 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:34,537 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:13:34,537 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:13:34,537 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:13:34,537 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:13:34,537 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:13:34,537 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:13:34,538 INFO L87 Difference]: Start difference. First operand 120 states and 128 transitions. Second operand 5 states. [2018-01-24 13:13:34,711 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:13:34,711 INFO L93 Difference]: Finished difference Result 136 states and 145 transitions. [2018-01-24 13:13:34,711 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:13:34,712 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-01-24 13:13:34,712 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:13:34,713 INFO L225 Difference]: With dead ends: 136 [2018-01-24 13:13:34,713 INFO L226 Difference]: Without dead ends: 135 [2018-01-24 13:13:34,713 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:13:34,714 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-01-24 13:13:34,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 123. [2018-01-24 13:13:34,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-01-24 13:13:34,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 132 transitions. [2018-01-24 13:13:34,721 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 132 transitions. Word has length 22 [2018-01-24 13:13:34,721 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:13:34,721 INFO L432 AbstractCegarLoop]: Abstraction has 123 states and 132 transitions. [2018-01-24 13:13:34,721 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:13:34,722 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 132 transitions. [2018-01-24 13:13:34,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-24 13:13:34,722 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:13:34,722 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:13:34,723 INFO L371 AbstractCegarLoop]: === Iteration 8 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:13:34,723 INFO L82 PathProgramCache]: Analyzing trace with hash 1247099982, now seen corresponding path program 1 times [2018-01-24 13:13:34,723 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:13:34,724 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:34,724 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:34,724 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:34,724 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:13:34,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:34,737 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:13:34,797 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:34,798 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:13:34,798 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:13:34,798 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:13:34,798 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:13:34,799 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:13:34,799 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:13:34,799 INFO L87 Difference]: Start difference. First operand 123 states and 132 transitions. Second operand 5 states. [2018-01-24 13:13:34,940 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:13:34,940 INFO L93 Difference]: Finished difference Result 130 states and 139 transitions. [2018-01-24 13:13:34,940 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 13:13:34,940 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-01-24 13:13:34,940 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:13:34,941 INFO L225 Difference]: With dead ends: 130 [2018-01-24 13:13:34,941 INFO L226 Difference]: Without dead ends: 129 [2018-01-24 13:13:34,942 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:13:34,942 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-01-24 13:13:34,948 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 123. [2018-01-24 13:13:34,949 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-01-24 13:13:34,950 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 131 transitions. [2018-01-24 13:13:34,950 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 131 transitions. Word has length 22 [2018-01-24 13:13:34,950 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:13:34,950 INFO L432 AbstractCegarLoop]: Abstraction has 123 states and 131 transitions. [2018-01-24 13:13:34,951 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:13:34,951 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 131 transitions. [2018-01-24 13:13:34,951 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-24 13:13:34,951 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:13:34,952 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:13:34,952 INFO L371 AbstractCegarLoop]: === Iteration 9 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:13:34,952 INFO L82 PathProgramCache]: Analyzing trace with hash 4873111, now seen corresponding path program 1 times [2018-01-24 13:13:34,952 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:13:34,953 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:34,953 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:34,953 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:34,953 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:13:34,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:34,967 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:13:34,992 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:34,992 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:13:34,992 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 13:13:34,992 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:13:34,993 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 13:13:34,993 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 13:13:34,993 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 13:13:34,993 INFO L87 Difference]: Start difference. First operand 123 states and 131 transitions. Second operand 4 states. [2018-01-24 13:13:35,086 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:13:35,086 INFO L93 Difference]: Finished difference Result 123 states and 131 transitions. [2018-01-24 13:13:35,086 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 13:13:35,087 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2018-01-24 13:13:35,087 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:13:35,087 INFO L225 Difference]: With dead ends: 123 [2018-01-24 13:13:35,088 INFO L226 Difference]: Without dead ends: 119 [2018-01-24 13:13:35,088 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:13:35,088 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2018-01-24 13:13:35,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 119. [2018-01-24 13:13:35,093 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-01-24 13:13:35,093 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 127 transitions. [2018-01-24 13:13:35,093 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 127 transitions. Word has length 23 [2018-01-24 13:13:35,094 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:13:35,094 INFO L432 AbstractCegarLoop]: Abstraction has 119 states and 127 transitions. [2018-01-24 13:13:35,094 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 13:13:35,094 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 127 transitions. [2018-01-24 13:13:35,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-24 13:13:35,094 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:13:35,095 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:13:35,095 INFO L371 AbstractCegarLoop]: === Iteration 10 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:13:35,095 INFO L82 PathProgramCache]: Analyzing trace with hash 4873112, now seen corresponding path program 1 times [2018-01-24 13:13:35,095 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:13:35,096 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:35,096 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:35,096 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:35,096 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:13:35,109 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:35,109 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:13:35,173 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:35,174 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:13:35,174 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 13:13:35,174 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:13:35,174 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 13:13:35,175 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 13:13:35,175 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 13:13:35,175 INFO L87 Difference]: Start difference. First operand 119 states and 127 transitions. Second operand 4 states. [2018-01-24 13:13:35,283 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:13:35,283 INFO L93 Difference]: Finished difference Result 125 states and 133 transitions. [2018-01-24 13:13:35,283 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 13:13:35,283 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2018-01-24 13:13:35,284 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:13:35,285 INFO L225 Difference]: With dead ends: 125 [2018-01-24 13:13:35,285 INFO L226 Difference]: Without dead ends: 123 [2018-01-24 13:13:35,285 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:13:35,285 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2018-01-24 13:13:35,291 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 120. [2018-01-24 13:13:35,291 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-01-24 13:13:35,292 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 128 transitions. [2018-01-24 13:13:35,292 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 128 transitions. Word has length 23 [2018-01-24 13:13:35,292 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:13:35,293 INFO L432 AbstractCegarLoop]: Abstraction has 120 states and 128 transitions. [2018-01-24 13:13:35,293 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 13:13:35,293 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 128 transitions. [2018-01-24 13:13:35,294 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-24 13:13:35,294 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:13:35,294 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:13:35,294 INFO L371 AbstractCegarLoop]: === Iteration 11 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:13:35,294 INFO L82 PathProgramCache]: Analyzing trace with hash 167210254, now seen corresponding path program 1 times [2018-01-24 13:13:35,294 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:13:35,295 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:35,295 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:35,295 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:35,296 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:13:35,306 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:35,307 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:13:35,356 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:35,356 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:13:35,356 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 13:13:35,356 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:13:35,356 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 13:13:35,356 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 13:13:35,356 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 13:13:35,357 INFO L87 Difference]: Start difference. First operand 120 states and 128 transitions. Second operand 4 states. [2018-01-24 13:13:35,473 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:13:35,473 INFO L93 Difference]: Finished difference Result 129 states and 137 transitions. [2018-01-24 13:13:35,473 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 13:13:35,473 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 24 [2018-01-24 13:13:35,474 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:13:35,474 INFO L225 Difference]: With dead ends: 129 [2018-01-24 13:13:35,475 INFO L226 Difference]: Without dead ends: 128 [2018-01-24 13:13:35,475 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 13:13:35,475 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-01-24 13:13:35,481 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 122. [2018-01-24 13:13:35,481 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-01-24 13:13:35,482 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 131 transitions. [2018-01-24 13:13:35,482 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 131 transitions. Word has length 24 [2018-01-24 13:13:35,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:13:35,483 INFO L432 AbstractCegarLoop]: Abstraction has 122 states and 131 transitions. [2018-01-24 13:13:35,483 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 13:13:35,483 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 131 transitions. [2018-01-24 13:13:35,483 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-24 13:13:35,484 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:13:35,484 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:13:35,484 INFO L371 AbstractCegarLoop]: === Iteration 12 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:13:35,484 INFO L82 PathProgramCache]: Analyzing trace with hash 167210255, now seen corresponding path program 1 times [2018-01-24 13:13:35,484 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:13:35,485 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:35,485 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:35,485 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:35,485 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:13:35,496 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:35,497 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:13:35,555 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:35,555 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:13:35,555 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 13:13:35,555 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:13:35,555 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 13:13:35,556 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 13:13:35,556 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:13:35,556 INFO L87 Difference]: Start difference. First operand 122 states and 131 transitions. Second operand 7 states. [2018-01-24 13:13:35,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:13:35,715 INFO L93 Difference]: Finished difference Result 123 states and 131 transitions. [2018-01-24 13:13:35,715 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 13:13:35,715 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 24 [2018-01-24 13:13:35,715 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:13:35,716 INFO L225 Difference]: With dead ends: 123 [2018-01-24 13:13:35,716 INFO L226 Difference]: Without dead ends: 122 [2018-01-24 13:13:35,716 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2018-01-24 13:13:35,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-01-24 13:13:35,720 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 122. [2018-01-24 13:13:35,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-01-24 13:13:35,721 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 130 transitions. [2018-01-24 13:13:35,721 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 130 transitions. Word has length 24 [2018-01-24 13:13:35,722 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:13:35,722 INFO L432 AbstractCegarLoop]: Abstraction has 122 states and 130 transitions. [2018-01-24 13:13:35,722 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 13:13:35,722 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 130 transitions. [2018-01-24 13:13:35,722 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-24 13:13:35,722 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:13:35,723 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:13:35,723 INFO L371 AbstractCegarLoop]: === Iteration 13 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:13:35,723 INFO L82 PathProgramCache]: Analyzing trace with hash 151037655, now seen corresponding path program 1 times [2018-01-24 13:13:35,723 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:13:35,724 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:35,724 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:35,724 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:35,724 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:13:35,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:35,736 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:13:35,782 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:35,782 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:13:35,782 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:13:35,782 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:13:35,782 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:13:35,783 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:13:35,783 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:13:35,783 INFO L87 Difference]: Start difference. First operand 122 states and 130 transitions. Second operand 5 states. [2018-01-24 13:13:35,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:13:35,932 INFO L93 Difference]: Finished difference Result 122 states and 130 transitions. [2018-01-24 13:13:35,933 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 13:13:35,933 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 24 [2018-01-24 13:13:35,933 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:13:35,933 INFO L225 Difference]: With dead ends: 122 [2018-01-24 13:13:35,934 INFO L226 Difference]: Without dead ends: 119 [2018-01-24 13:13:35,934 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:13:35,934 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2018-01-24 13:13:35,938 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 117. [2018-01-24 13:13:35,939 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-01-24 13:13:35,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 125 transitions. [2018-01-24 13:13:35,939 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 125 transitions. Word has length 24 [2018-01-24 13:13:35,940 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:13:35,940 INFO L432 AbstractCegarLoop]: Abstraction has 117 states and 125 transitions. [2018-01-24 13:13:35,940 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:13:35,940 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 125 transitions. [2018-01-24 13:13:35,941 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-24 13:13:35,941 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:13:35,941 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:13:35,941 INFO L371 AbstractCegarLoop]: === Iteration 14 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:13:35,942 INFO L82 PathProgramCache]: Analyzing trace with hash 1118005000, now seen corresponding path program 1 times [2018-01-24 13:13:35,942 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:13:35,943 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:35,943 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:35,943 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:35,943 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:13:35,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:35,955 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:13:36,047 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:36,048 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:13:36,048 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-24 13:13:36,048 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:13:36,048 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 13:13:36,048 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 13:13:36,048 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-01-24 13:13:36,048 INFO L87 Difference]: Start difference. First operand 117 states and 125 transitions. Second operand 8 states. [2018-01-24 13:13:36,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:13:36,628 INFO L93 Difference]: Finished difference Result 132 states and 141 transitions. [2018-01-24 13:13:36,628 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 13:13:36,629 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 29 [2018-01-24 13:13:36,629 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:13:36,630 INFO L225 Difference]: With dead ends: 132 [2018-01-24 13:13:36,630 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 13:13:36,630 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2018-01-24 13:13:36,631 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 13:13:36,636 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 123. [2018-01-24 13:13:36,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-01-24 13:13:36,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 132 transitions. [2018-01-24 13:13:36,637 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 132 transitions. Word has length 29 [2018-01-24 13:13:36,637 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:13:36,637 INFO L432 AbstractCegarLoop]: Abstraction has 123 states and 132 transitions. [2018-01-24 13:13:36,637 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 13:13:36,638 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 132 transitions. [2018-01-24 13:13:36,638 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-24 13:13:36,638 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:13:36,638 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:13:36,639 INFO L371 AbstractCegarLoop]: === Iteration 15 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:13:36,639 INFO L82 PathProgramCache]: Analyzing trace with hash 1118005001, now seen corresponding path program 1 times [2018-01-24 13:13:36,639 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:13:36,640 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:36,640 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:36,640 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:36,640 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:13:36,651 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:36,652 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:13:36,852 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:36,853 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:13:36,853 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 13:13:36,853 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:13:36,853 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 13:13:36,853 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 13:13:36,853 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:13:36,854 INFO L87 Difference]: Start difference. First operand 123 states and 132 transitions. Second operand 7 states. [2018-01-24 13:13:37,147 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:13:37,147 INFO L93 Difference]: Finished difference Result 132 states and 142 transitions. [2018-01-24 13:13:37,147 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 13:13:37,147 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 29 [2018-01-24 13:13:37,147 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:13:37,148 INFO L225 Difference]: With dead ends: 132 [2018-01-24 13:13:37,148 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 13:13:37,149 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:13:37,149 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 13:13:37,155 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 123. [2018-01-24 13:13:37,155 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-01-24 13:13:37,156 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 131 transitions. [2018-01-24 13:13:37,156 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 131 transitions. Word has length 29 [2018-01-24 13:13:37,156 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:13:37,156 INFO L432 AbstractCegarLoop]: Abstraction has 123 states and 131 transitions. [2018-01-24 13:13:37,156 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 13:13:37,156 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 131 transitions. [2018-01-24 13:13:37,157 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-24 13:13:37,157 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:13:37,157 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:13:37,157 INFO L371 AbstractCegarLoop]: === Iteration 16 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:13:37,158 INFO L82 PathProgramCache]: Analyzing trace with hash 1228344885, now seen corresponding path program 1 times [2018-01-24 13:13:37,158 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:13:37,158 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:37,158 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:37,159 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:37,159 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:13:37,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:37,168 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:13:37,220 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:37,220 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:13:37,220 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:13:37,220 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:13:37,221 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:13:37,221 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:13:37,221 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:13:37,221 INFO L87 Difference]: Start difference. First operand 123 states and 131 transitions. Second operand 5 states. [2018-01-24 13:13:37,351 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:13:37,351 INFO L93 Difference]: Finished difference Result 123 states and 131 transitions. [2018-01-24 13:13:37,351 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:13:37,351 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2018-01-24 13:13:37,352 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:13:37,353 INFO L225 Difference]: With dead ends: 123 [2018-01-24 13:13:37,353 INFO L226 Difference]: Without dead ends: 121 [2018-01-24 13:13:37,353 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:13:37,354 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-01-24 13:13:37,360 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 119. [2018-01-24 13:13:37,360 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-01-24 13:13:37,361 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 126 transitions. [2018-01-24 13:13:37,361 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 126 transitions. Word has length 30 [2018-01-24 13:13:37,362 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:13:37,362 INFO L432 AbstractCegarLoop]: Abstraction has 119 states and 126 transitions. [2018-01-24 13:13:37,362 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:13:37,362 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 126 transitions. [2018-01-24 13:13:37,363 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-24 13:13:37,363 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:13:37,363 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:13:37,363 INFO L371 AbstractCegarLoop]: === Iteration 17 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:13:37,363 INFO L82 PathProgramCache]: Analyzing trace with hash 1228344886, now seen corresponding path program 1 times [2018-01-24 13:13:37,363 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:13:37,364 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:37,364 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:37,364 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:37,364 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:13:37,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:37,375 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:13:37,494 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:37,495 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:13:37,495 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 13:13:37,495 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:13:37,495 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 13:13:37,495 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 13:13:37,496 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:13:37,496 INFO L87 Difference]: Start difference. First operand 119 states and 126 transitions. Second operand 6 states. [2018-01-24 13:13:37,679 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:13:37,679 INFO L93 Difference]: Finished difference Result 131 states and 140 transitions. [2018-01-24 13:13:37,679 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 13:13:37,679 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 30 [2018-01-24 13:13:37,680 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:13:37,680 INFO L225 Difference]: With dead ends: 131 [2018-01-24 13:13:37,680 INFO L226 Difference]: Without dead ends: 126 [2018-01-24 13:13:37,681 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:13:37,681 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-01-24 13:13:37,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 119. [2018-01-24 13:13:37,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-01-24 13:13:37,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 127 transitions. [2018-01-24 13:13:37,689 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 127 transitions. Word has length 30 [2018-01-24 13:13:37,690 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:13:37,690 INFO L432 AbstractCegarLoop]: Abstraction has 119 states and 127 transitions. [2018-01-24 13:13:37,690 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 13:13:37,690 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 127 transitions. [2018-01-24 13:13:37,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-24 13:13:37,691 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:13:37,691 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:13:37,691 INFO L371 AbstractCegarLoop]: === Iteration 18 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:13:37,691 INFO L82 PathProgramCache]: Analyzing trace with hash -1343765284, now seen corresponding path program 1 times [2018-01-24 13:13:37,691 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:13:37,692 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:37,692 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:37,692 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:37,692 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:13:37,703 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:37,704 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:13:37,770 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:37,770 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:13:37,770 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:13:37,770 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:13:37,771 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:13:37,771 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:13:37,771 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:13:37,771 INFO L87 Difference]: Start difference. First operand 119 states and 127 transitions. Second operand 5 states. [2018-01-24 13:13:37,943 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:13:37,943 INFO L93 Difference]: Finished difference Result 131 states and 140 transitions. [2018-01-24 13:13:37,944 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:13:37,944 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2018-01-24 13:13:37,944 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:13:37,945 INFO L225 Difference]: With dead ends: 131 [2018-01-24 13:13:37,945 INFO L226 Difference]: Without dead ends: 130 [2018-01-24 13:13:37,945 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-01-24 13:13:37,945 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-01-24 13:13:37,952 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 124. [2018-01-24 13:13:37,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-01-24 13:13:37,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 134 transitions. [2018-01-24 13:13:37,954 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 134 transitions. Word has length 30 [2018-01-24 13:13:37,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:13:37,954 INFO L432 AbstractCegarLoop]: Abstraction has 124 states and 134 transitions. [2018-01-24 13:13:37,954 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:13:37,955 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 134 transitions. [2018-01-24 13:13:37,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-24 13:13:37,955 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:13:37,955 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:13:37,956 INFO L371 AbstractCegarLoop]: === Iteration 19 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:13:37,956 INFO L82 PathProgramCache]: Analyzing trace with hash -1343765283, now seen corresponding path program 1 times [2018-01-24 13:13:37,956 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:13:37,957 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:37,957 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:37,957 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:37,957 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:13:37,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:37,969 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:13:38,043 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:38,044 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:13:38,044 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 13:13:38,044 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:13:38,044 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 13:13:38,044 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 13:13:38,044 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:13:38,045 INFO L87 Difference]: Start difference. First operand 124 states and 134 transitions. Second operand 6 states. [2018-01-24 13:13:38,152 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:13:38,152 INFO L93 Difference]: Finished difference Result 235 states and 257 transitions. [2018-01-24 13:13:38,152 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 13:13:38,152 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 30 [2018-01-24 13:13:38,152 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:13:38,153 INFO L225 Difference]: With dead ends: 235 [2018-01-24 13:13:38,153 INFO L226 Difference]: Without dead ends: 125 [2018-01-24 13:13:38,154 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:13:38,155 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-01-24 13:13:38,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 124. [2018-01-24 13:13:38,163 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-01-24 13:13:38,164 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 132 transitions. [2018-01-24 13:13:38,164 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 132 transitions. Word has length 30 [2018-01-24 13:13:38,164 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:13:38,164 INFO L432 AbstractCegarLoop]: Abstraction has 124 states and 132 transitions. [2018-01-24 13:13:38,164 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 13:13:38,164 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 132 transitions. [2018-01-24 13:13:38,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-24 13:13:38,165 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:13:38,165 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:13:38,165 INFO L371 AbstractCegarLoop]: === Iteration 20 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:13:38,165 INFO L82 PathProgramCache]: Analyzing trace with hash 660985097, now seen corresponding path program 1 times [2018-01-24 13:13:38,166 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:13:38,166 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:38,166 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:38,167 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:38,167 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:13:38,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:38,178 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:13:38,339 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:38,339 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:13:38,339 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-24 13:13:38,339 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:13:38,340 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 13:13:38,340 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 13:13:38,340 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-01-24 13:13:38,340 INFO L87 Difference]: Start difference. First operand 124 states and 132 transitions. Second operand 8 states. [2018-01-24 13:13:38,592 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:13:38,592 INFO L93 Difference]: Finished difference Result 135 states and 144 transitions. [2018-01-24 13:13:38,592 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 13:13:38,592 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 31 [2018-01-24 13:13:38,593 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:13:38,593 INFO L225 Difference]: With dead ends: 135 [2018-01-24 13:13:38,593 INFO L226 Difference]: Without dead ends: 134 [2018-01-24 13:13:38,594 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2018-01-24 13:13:38,594 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-01-24 13:13:38,599 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 126. [2018-01-24 13:13:38,599 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-01-24 13:13:38,600 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 135 transitions. [2018-01-24 13:13:38,600 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 135 transitions. Word has length 31 [2018-01-24 13:13:38,600 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:13:38,601 INFO L432 AbstractCegarLoop]: Abstraction has 126 states and 135 transitions. [2018-01-24 13:13:38,601 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 13:13:38,601 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 135 transitions. [2018-01-24 13:13:38,601 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-24 13:13:38,601 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:13:38,601 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:13:38,601 INFO L371 AbstractCegarLoop]: === Iteration 21 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:13:38,602 INFO L82 PathProgramCache]: Analyzing trace with hash 660985098, now seen corresponding path program 1 times [2018-01-24 13:13:38,602 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:13:38,602 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:38,602 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:38,602 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:38,602 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:13:38,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:38,612 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:13:38,899 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:38,900 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:13:38,900 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 13:13:38,900 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:13:38,900 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 13:13:38,900 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 13:13:38,901 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:13:38,901 INFO L87 Difference]: Start difference. First operand 126 states and 135 transitions. Second operand 10 states. [2018-01-24 13:13:39,310 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:13:39,310 INFO L93 Difference]: Finished difference Result 134 states and 143 transitions. [2018-01-24 13:13:39,342 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-24 13:13:39,342 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 31 [2018-01-24 13:13:39,342 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:13:39,343 INFO L225 Difference]: With dead ends: 134 [2018-01-24 13:13:39,343 INFO L226 Difference]: Without dead ends: 133 [2018-01-24 13:13:39,343 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=73, Invalid=233, Unknown=0, NotChecked=0, Total=306 [2018-01-24 13:13:39,343 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-01-24 13:13:39,351 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 121. [2018-01-24 13:13:39,351 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121 states. [2018-01-24 13:13:39,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 129 transitions. [2018-01-24 13:13:39,352 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 129 transitions. Word has length 31 [2018-01-24 13:13:39,353 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:13:39,353 INFO L432 AbstractCegarLoop]: Abstraction has 121 states and 129 transitions. [2018-01-24 13:13:39,353 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 13:13:39,353 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 129 transitions. [2018-01-24 13:13:39,353 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 13:13:39,354 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:13:39,354 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:13:39,354 INFO L371 AbstractCegarLoop]: === Iteration 22 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:13:39,354 INFO L82 PathProgramCache]: Analyzing trace with hash -184722078, now seen corresponding path program 1 times [2018-01-24 13:13:39,354 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:13:39,355 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:39,355 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:39,355 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:39,355 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:13:39,368 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:39,369 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:13:39,527 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 13:13:39,527 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:13:39,527 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:13:39,532 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:39,533 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:13:39,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:39,577 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:13:39,783 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:13:39,791 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-01-24 13:13:39,792 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:39,814 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:13:39,822 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:13:39,823 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 13:13:39,824 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:39,873 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:13:39,874 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:25, output treesize:18 [2018-01-24 13:13:39,928 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:39,928 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:13:40,359 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:13:40,360 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:13:40,360 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 16 [2018-01-24 13:13:40,361 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:40,371 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 12 [2018-01-24 13:13:40,372 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:40,379 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-01-24 13:13:40,379 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:32, output treesize:7 [2018-01-24 13:13:40,760 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:13:40,760 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:13:40,761 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 3 [2018-01-24 13:13:40,761 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:40,768 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:13:40,768 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:13:40,769 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 13 [2018-01-24 13:13:40,770 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:40,773 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:13:40,773 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:26, output treesize:3 [2018-01-24 13:13:40,785 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:40,818 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:13:40,818 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:13:40,822 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:40,822 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:13:40,863 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:40,869 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:13:40,912 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:13:40,913 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:40,919 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:13:40,919 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:40,924 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:13:40,924 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:17 [2018-01-24 13:13:41,198 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:13:41,200 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:13:41,206 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:13:41,207 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 9 [2018-01-24 13:13:41,207 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:41,241 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 24 [2018-01-24 13:13:41,241 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:41,249 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 13:13:41,249 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:35, output treesize:27 [2018-01-24 13:13:41,294 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:41,294 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:13:41,441 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-01-24 13:13:41,442 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:41,449 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 8 [2018-01-24 13:13:41,449 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:41,450 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:13:41,451 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:13:41,451 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 7 [2018-01-24 13:13:41,452 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:41,457 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:13:41,458 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 10 variables, input treesize:75, output treesize:3 [2018-01-24 13:13:41,558 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 13:13:46,888 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 8 [2018-01-24 13:13:46,891 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 8 [2018-01-24 13:13:46,895 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 8 [2018-01-24 13:13:47,001 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:13:47,001 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:13:47,002 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 7 [2018-01-24 13:13:47,002 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:47,005 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 8 [2018-01-24 13:13:47,006 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:47,033 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 21 [2018-01-24 13:13:47,058 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 14 treesize of output 14 [2018-01-24 13:13:47,059 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-01-24 13:13:47,062 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 13:13:47,062 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:47,075 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-01-24 13:13:47,089 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 21 treesize of output 33 [2018-01-24 13:13:47,134 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 12 [2018-01-24 13:13:47,135 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:47,147 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 21 [2018-01-24 13:13:47,149 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-01-24 13:13:47,159 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 21 [2018-01-24 13:13:47,160 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 2 xjuncts. [2018-01-24 13:13:47,208 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 21 [2018-01-24 13:13:47,209 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 2 xjuncts. [2018-01-24 13:13:47,228 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 24 treesize of output 38 [2018-01-24 13:13:47,230 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 8 xjuncts. [2018-01-24 13:13:47,264 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: and 5 xjuncts. [2018-01-24 13:13:47,302 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 7 xjuncts. [2018-01-24 13:13:47,303 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 4 variables, input treesize:45, output treesize:72 [2018-01-24 13:13:47,354 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:47,355 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:13:47,355 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 9, 9, 11, 11] total 39 [2018-01-24 13:13:47,355 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:13:47,356 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-24 13:13:47,356 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-24 13:13:47,356 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=163, Invalid=1392, Unknown=5, NotChecked=0, Total=1560 [2018-01-24 13:13:47,357 INFO L87 Difference]: Start difference. First operand 121 states and 129 transitions. Second operand 20 states. [2018-01-24 13:13:48,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:13:48,435 INFO L93 Difference]: Finished difference Result 183 states and 204 transitions. [2018-01-24 13:13:48,437 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-24 13:13:48,437 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 34 [2018-01-24 13:13:48,437 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:13:48,438 INFO L225 Difference]: With dead ends: 183 [2018-01-24 13:13:48,438 INFO L226 Difference]: Without dead ends: 180 [2018-01-24 13:13:48,439 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 105 SyntacticMatches, 5 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 632 ImplicationChecksByTransitivity, 7.0s TimeCoverageRelationStatistics Valid=295, Invalid=1862, Unknown=5, NotChecked=0, Total=2162 [2018-01-24 13:13:48,439 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-01-24 13:13:48,448 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 113. [2018-01-24 13:13:48,448 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-01-24 13:13:48,449 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 119 transitions. [2018-01-24 13:13:48,449 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 119 transitions. Word has length 34 [2018-01-24 13:13:48,449 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:13:48,449 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 119 transitions. [2018-01-24 13:13:48,449 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-24 13:13:48,449 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 119 transitions. [2018-01-24 13:13:48,450 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-24 13:13:48,450 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:13:48,450 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:13:48,450 INFO L371 AbstractCegarLoop]: === Iteration 23 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:13:48,450 INFO L82 PathProgramCache]: Analyzing trace with hash 501156800, now seen corresponding path program 1 times [2018-01-24 13:13:48,450 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:13:48,451 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:48,451 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:48,451 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:48,451 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:13:48,459 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:48,460 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:13:48,643 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:48,643 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:13:48,643 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 13:13:48,643 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:13:48,643 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 13:13:48,644 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 13:13:48,644 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:13:48,644 INFO L87 Difference]: Start difference. First operand 113 states and 119 transitions. Second operand 7 states. [2018-01-24 13:13:49,290 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:13:49,290 INFO L93 Difference]: Finished difference Result 135 states and 145 transitions. [2018-01-24 13:13:49,291 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 13:13:49,291 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2018-01-24 13:13:49,291 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:13:49,291 INFO L225 Difference]: With dead ends: 135 [2018-01-24 13:13:49,292 INFO L226 Difference]: Without dead ends: 134 [2018-01-24 13:13:49,292 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:13:49,292 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-01-24 13:13:49,299 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 118. [2018-01-24 13:13:49,299 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-01-24 13:13:49,300 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 126 transitions. [2018-01-24 13:13:49,300 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 126 transitions. Word has length 33 [2018-01-24 13:13:49,301 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:13:49,301 INFO L432 AbstractCegarLoop]: Abstraction has 118 states and 126 transitions. [2018-01-24 13:13:49,301 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 13:13:49,301 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 126 transitions. [2018-01-24 13:13:49,301 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-24 13:13:49,302 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:13:49,309 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:13:49,310 INFO L371 AbstractCegarLoop]: === Iteration 24 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:13:49,311 INFO L82 PathProgramCache]: Analyzing trace with hash 501156801, now seen corresponding path program 1 times [2018-01-24 13:13:49,311 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:13:49,311 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:49,312 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:49,312 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:49,312 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:13:49,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:49,321 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:13:49,464 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:49,465 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:13:49,487 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-24 13:13:49,487 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:13:49,487 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 13:13:49,487 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 13:13:49,487 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-01-24 13:13:49,488 INFO L87 Difference]: Start difference. First operand 118 states and 126 transitions. Second operand 9 states. [2018-01-24 13:13:49,787 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:13:49,787 INFO L93 Difference]: Finished difference Result 160 states and 174 transitions. [2018-01-24 13:13:49,787 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-24 13:13:49,788 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 33 [2018-01-24 13:13:49,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:13:49,788 INFO L225 Difference]: With dead ends: 160 [2018-01-24 13:13:49,789 INFO L226 Difference]: Without dead ends: 159 [2018-01-24 13:13:49,789 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=186, Unknown=0, NotChecked=0, Total=240 [2018-01-24 13:13:49,789 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-01-24 13:13:49,797 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 132. [2018-01-24 13:13:49,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-01-24 13:13:49,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 142 transitions. [2018-01-24 13:13:49,799 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 142 transitions. Word has length 33 [2018-01-24 13:13:49,799 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:13:49,799 INFO L432 AbstractCegarLoop]: Abstraction has 132 states and 142 transitions. [2018-01-24 13:13:49,799 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 13:13:49,799 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 142 transitions. [2018-01-24 13:13:49,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-24 13:13:49,800 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:13:49,800 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:13:49,800 INFO L371 AbstractCegarLoop]: === Iteration 25 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:13:49,800 INFO L82 PathProgramCache]: Analyzing trace with hash 574362333, now seen corresponding path program 1 times [2018-01-24 13:13:49,800 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:13:49,801 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:49,801 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:49,802 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:49,802 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:13:49,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:49,813 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:13:49,896 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:49,896 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:13:49,897 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-24 13:13:49,897 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:13:49,897 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 13:13:49,897 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 13:13:49,897 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-01-24 13:13:49,898 INFO L87 Difference]: Start difference. First operand 132 states and 142 transitions. Second operand 8 states. [2018-01-24 13:13:50,028 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:13:50,028 INFO L93 Difference]: Finished difference Result 162 states and 174 transitions. [2018-01-24 13:13:50,028 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 13:13:50,028 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 35 [2018-01-24 13:13:50,028 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:13:50,029 INFO L225 Difference]: With dead ends: 162 [2018-01-24 13:13:50,029 INFO L226 Difference]: Without dead ends: 157 [2018-01-24 13:13:50,029 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-01-24 13:13:50,030 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-01-24 13:13:50,038 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 132. [2018-01-24 13:13:50,038 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-01-24 13:13:50,039 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 140 transitions. [2018-01-24 13:13:50,039 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 140 transitions. Word has length 35 [2018-01-24 13:13:50,039 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:13:50,039 INFO L432 AbstractCegarLoop]: Abstraction has 132 states and 140 transitions. [2018-01-24 13:13:50,040 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 13:13:50,040 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 140 transitions. [2018-01-24 13:13:50,040 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 13:13:50,040 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:13:50,040 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:13:50,041 INFO L371 AbstractCegarLoop]: === Iteration 26 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:13:50,041 INFO L82 PathProgramCache]: Analyzing trace with hash 655964540, now seen corresponding path program 1 times [2018-01-24 13:13:50,041 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:13:50,042 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:50,042 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:50,042 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:50,042 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:13:50,051 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:50,052 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:13:50,096 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:50,096 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:13:50,096 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:13:50,096 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:13:50,097 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:13:50,097 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:13:50,097 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:13:50,097 INFO L87 Difference]: Start difference. First operand 132 states and 140 transitions. Second operand 5 states. [2018-01-24 13:13:50,324 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:13:50,324 INFO L93 Difference]: Finished difference Result 132 states and 140 transitions. [2018-01-24 13:13:50,325 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:13:50,325 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 36 [2018-01-24 13:13:50,325 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:13:50,326 INFO L225 Difference]: With dead ends: 132 [2018-01-24 13:13:50,326 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 13:13:50,326 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:13:50,326 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 13:13:50,331 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 131. [2018-01-24 13:13:50,331 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-01-24 13:13:50,332 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 139 transitions. [2018-01-24 13:13:50,332 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 139 transitions. Word has length 36 [2018-01-24 13:13:50,332 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:13:50,332 INFO L432 AbstractCegarLoop]: Abstraction has 131 states and 139 transitions. [2018-01-24 13:13:50,332 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:13:50,332 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 139 transitions. [2018-01-24 13:13:50,333 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 13:13:50,333 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:13:50,333 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:13:50,333 INFO L371 AbstractCegarLoop]: === Iteration 27 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:13:50,333 INFO L82 PathProgramCache]: Analyzing trace with hash 655964541, now seen corresponding path program 1 times [2018-01-24 13:13:50,333 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:13:50,334 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:50,334 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:50,334 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:50,334 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:13:50,343 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:50,343 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:13:50,603 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:50,603 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:13:50,603 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 13:13:50,603 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:13:50,603 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 13:13:50,603 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 13:13:50,603 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:13:50,604 INFO L87 Difference]: Start difference. First operand 131 states and 139 transitions. Second operand 10 states. [2018-01-24 13:13:50,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:13:50,923 INFO L93 Difference]: Finished difference Result 154 states and 166 transitions. [2018-01-24 13:13:50,923 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-24 13:13:50,923 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 36 [2018-01-24 13:13:50,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:13:50,925 INFO L225 Difference]: With dead ends: 154 [2018-01-24 13:13:50,925 INFO L226 Difference]: Without dead ends: 153 [2018-01-24 13:13:50,925 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=57, Invalid=215, Unknown=0, NotChecked=0, Total=272 [2018-01-24 13:13:50,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-01-24 13:13:50,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 134. [2018-01-24 13:13:50,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-01-24 13:13:50,935 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 142 transitions. [2018-01-24 13:13:50,936 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 142 transitions. Word has length 36 [2018-01-24 13:13:50,936 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:13:50,936 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 142 transitions. [2018-01-24 13:13:50,936 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 13:13:50,936 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 142 transitions. [2018-01-24 13:13:50,937 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-24 13:13:50,937 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:13:50,937 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:13:50,937 INFO L371 AbstractCegarLoop]: === Iteration 28 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:13:50,937 INFO L82 PathProgramCache]: Analyzing trace with hash -747720392, now seen corresponding path program 1 times [2018-01-24 13:13:50,937 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:13:50,938 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:50,938 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:50,938 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:13:50,939 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:13:50,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:50,952 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:13:51,028 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:13:51,028 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:13:51,028 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:13:51,036 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:51,036 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:13:51,065 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:51,068 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:13:51,080 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:13:51,081 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:51,085 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:13:51,085 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-24 13:13:51,118 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:13:51,122 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:13:51,122 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-01-24 13:13:51,123 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:51,128 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:13:51,128 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15 [2018-01-24 13:13:51,144 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-24 13:13:51,146 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-24 13:13:51,146 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:51,148 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:13:51,172 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:13:51,173 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:27 [2018-01-24 13:13:51,237 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 57 [2018-01-24 13:13:51,240 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-24 13:13:51,241 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:51,257 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:13:51,276 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:13:51,277 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:68, output treesize:27 [2018-01-24 13:13:51,286 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-01-24 13:13:51,289 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 10 [2018-01-24 13:13:51,289 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:51,301 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:13:51,324 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:13:51,324 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:36, output treesize:15 [2018-01-24 13:13:51,385 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 13:13:51,386 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:13:51,389 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:13:51,399 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:13:51,406 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-01-24 13:13:51,407 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:36, output treesize:23 [2018-01-24 13:13:55,464 WARN L143 SmtUtils]: Spent 2010ms on a formula simplification that was a NOOP. DAG size: 21 [2018-01-24 13:13:57,473 WARN L1007 $PredicateComparison]: unable to prove that (forall ((|create_data_#t~mem6.offset| Int) (v_DerPreprocessor_2 Int) (create_data_~counter~6 Int)) (= 1 (select |c_#valid| (let ((.cse1 (+ c_create_data_~data~4.offset 4))) (select (select (let ((.cse0 (select (select |c_#memory_$Pointer$.base| c_create_data_~data~4.base) .cse1))) (store |c_#memory_$Pointer$.base| .cse0 (store (select |c_#memory_$Pointer$.base| .cse0) (+ |create_data_#t~mem6.offset| (* 4 create_data_~counter~6)) v_DerPreprocessor_2))) c_create_data_~data~4.base) .cse1))))) is different from false [2018-01-24 13:13:57,481 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2018-01-24 13:13:57,495 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 13:13:57,496 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:57,510 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 18 [2018-01-24 13:13:57,512 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 5 [2018-01-24 13:13:57,512 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:57,513 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:13:57,515 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2018-01-24 13:13:57,517 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 13:13:57,517 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:57,520 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:13:57,531 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-01-24 13:13:57,544 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 3 xjuncts. [2018-01-24 13:13:57,544 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:43, output treesize:25 [2018-01-24 13:13:57,606 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 3 not checked. [2018-01-24 13:13:57,629 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:13:57,630 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:13:57,632 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:13:57,633 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:13:57,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:13:57,681 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:13:57,686 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:13:57,686 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:57,696 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:13:57,697 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-24 13:13:57,740 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:13:57,740 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:13:57,741 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-01-24 13:13:57,741 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:57,756 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:13:57,756 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15 [2018-01-24 13:13:57,765 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-24 13:13:57,776 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-24 13:13:57,777 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:57,779 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:13:57,786 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:13:57,786 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:27 [2018-01-24 13:13:57,794 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 57 [2018-01-24 13:13:57,797 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-24 13:13:57,798 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:57,811 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:13:57,829 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:13:57,829 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:68, output treesize:27 [2018-01-24 13:13:57,833 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-01-24 13:13:57,848 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 10 [2018-01-24 13:13:57,849 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:57,859 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:13:57,884 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:13:57,884 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:36, output treesize:15 [2018-01-24 13:13:57,887 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 13:13:57,888 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:13:57,891 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:13:57,894 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:13:57,902 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-01-24 13:13:57,902 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:36, output treesize:23 [2018-01-24 13:13:59,968 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2018-01-24 13:13:59,981 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 13:13:59,982 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:59,994 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 18 [2018-01-24 13:13:59,996 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 5 [2018-01-24 13:13:59,996 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:13:59,997 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:13:59,998 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2018-01-24 13:14:00,000 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 13:14:00,000 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:00,003 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:00,012 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-01-24 13:14:00,028 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 3 xjuncts. [2018-01-24 13:14:00,028 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:43, output treesize:25 [2018-01-24 13:14:00,045 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 3 not checked. [2018-01-24 13:14:00,047 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:14:00,047 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 8, 7, 8] total 17 [2018-01-24 13:14:00,047 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:14:00,048 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-24 13:14:00,048 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-24 13:14:00,048 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=58, Invalid=216, Unknown=2, NotChecked=30, Total=306 [2018-01-24 13:14:00,048 INFO L87 Difference]: Start difference. First operand 134 states and 142 transitions. Second operand 13 states. [2018-01-24 13:14:00,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:14:00,300 INFO L93 Difference]: Finished difference Result 134 states and 142 transitions. [2018-01-24 13:14:00,300 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 13:14:00,300 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 37 [2018-01-24 13:14:00,300 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:14:00,301 INFO L225 Difference]: With dead ends: 134 [2018-01-24 13:14:00,301 INFO L226 Difference]: Without dead ends: 133 [2018-01-24 13:14:00,301 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 133 SyntacticMatches, 5 SemanticMatches, 20 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 74 ImplicationChecksByTransitivity, 8.4s TimeCoverageRelationStatistics Valid=108, Invalid=314, Unknown=2, NotChecked=38, Total=462 [2018-01-24 13:14:00,301 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-01-24 13:14:00,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 133. [2018-01-24 13:14:00,308 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-01-24 13:14:00,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 141 transitions. [2018-01-24 13:14:00,309 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 141 transitions. Word has length 37 [2018-01-24 13:14:00,309 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:14:00,309 INFO L432 AbstractCegarLoop]: Abstraction has 133 states and 141 transitions. [2018-01-24 13:14:00,309 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-24 13:14:00,309 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 141 transitions. [2018-01-24 13:14:00,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-24 13:14:00,309 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:14:00,310 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:14:00,310 INFO L371 AbstractCegarLoop]: === Iteration 29 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:14:00,310 INFO L82 PathProgramCache]: Analyzing trace with hash -747720391, now seen corresponding path program 1 times [2018-01-24 13:14:00,310 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:14:00,311 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:14:00,311 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:14:00,311 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:14:00,311 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:14:00,332 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:14:00,333 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:14:00,511 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:14:00,511 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:14:00,511 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:14:00,516 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:14:00,516 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:14:00,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:14:00,536 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:14:00,539 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:14:00,539 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:00,541 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:00,541 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-24 13:14:00,546 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:14:00,547 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:00,552 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:14:00,553 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:14:00,553 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 13:14:00,554 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:00,557 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:00,557 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:20, output treesize:13 [2018-01-24 13:14:00,564 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-24 13:14:00,565 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-24 13:14:00,565 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:00,567 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:00,574 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-24 13:14:00,576 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-24 13:14:00,576 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:00,577 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:00,582 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:00,582 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:36, output treesize:31 [2018-01-24 13:14:00,625 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 52 [2018-01-24 13:14:00,628 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-24 13:14:00,628 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:00,632 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:00,643 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 57 [2018-01-24 13:14:00,645 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-24 13:14:00,646 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:00,649 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:00,653 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:00,654 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:116, output treesize:34 [2018-01-24 13:14:00,683 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-01-24 13:14:00,685 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 10 [2018-01-24 13:14:00,685 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:00,688 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:00,695 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-01-24 13:14:00,696 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-01-24 13:14:00,696 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:00,697 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:00,702 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:00,702 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:52, output treesize:12 [2018-01-24 13:14:00,716 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:14:00,716 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:14:00,766 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:14:00,772 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:14:00,795 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:00,798 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:00,813 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:14:00,827 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:14:00,839 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:14:00,842 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:14:00,850 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 4 dim-2 vars, End of recursive call: 5 dim-0 vars, and 2 xjuncts. [2018-01-24 13:14:00,850 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 6 variables, input treesize:135, output treesize:73 [2018-01-24 13:14:06,177 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 67 [2018-01-24 13:14:06,201 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 13:14:06,201 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,228 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 54 [2018-01-24 13:14:06,233 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 41 [2018-01-24 13:14:06,234 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,237 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,238 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 19 [2018-01-24 13:14:06,241 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 13:14:06,241 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,245 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,260 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-01-24 13:14:06,300 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2018-01-24 13:14:06,325 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 13:14:06,325 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,341 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 18 [2018-01-24 13:14:06,343 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 5 [2018-01-24 13:14:06,344 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,346 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,349 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 19 [2018-01-24 13:14:06,352 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 13:14:06,352 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,357 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,372 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-01-24 13:14:06,416 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-01-24 13:14:06,434 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 13:14:06,434 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,441 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2018-01-24 13:14:06,450 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 7 [2018-01-24 13:14:06,451 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,456 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,478 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,481 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 36 [2018-01-24 13:14:06,495 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 13:14:06,495 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,501 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2018-01-24 13:14:06,503 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 7 [2018-01-24 13:14:06,503 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,505 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,507 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,510 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 43 [2018-01-24 13:14:06,527 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 13:14:06,527 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,533 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2018-01-24 13:14:06,535 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 13:14:06,535 INFO L267 ElimStorePlain]: Start of recursive call 25: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,536 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,540 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,564 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 3 dim-2 vars, End of recursive call: and 5 xjuncts. [2018-01-24 13:14:06,564 INFO L202 ElimStorePlain]: Needed 25 recursive calls to eliminate 10 variables, input treesize:115, output treesize:37 [2018-01-24 13:14:06,623 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:14:06,643 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:14:06,643 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:14:06,646 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:14:06,647 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:14:06,688 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:14:06,693 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:14:06,695 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:14:06,696 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,697 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,697 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-24 13:14:06,703 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:14:06,703 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:14:06,704 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 13:14:06,704 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,709 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:14:06,709 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,713 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,713 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:20, output treesize:13 [2018-01-24 13:14:06,720 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-24 13:14:06,722 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-24 13:14:06,722 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,724 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,732 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-24 13:14:06,734 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-24 13:14:06,734 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,737 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,742 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,742 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:36, output treesize:31 [2018-01-24 13:14:06,767 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 52 [2018-01-24 13:14:06,770 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-24 13:14:06,770 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,776 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,791 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 57 [2018-01-24 13:14:06,793 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-24 13:14:06,793 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,798 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,804 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,804 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:116, output treesize:34 [2018-01-24 13:14:06,820 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-01-24 13:14:06,822 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 10 [2018-01-24 13:14:06,823 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,826 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,834 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-01-24 13:14:06,835 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-01-24 13:14:06,836 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,837 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,842 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,842 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:52, output treesize:12 [2018-01-24 13:14:06,845 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:14:06,845 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:14:06,850 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:14:06,862 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:14:06,896 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:14:06,899 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:14:06,917 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:14:06,929 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:14:06,950 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,952 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:06,959 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 4 dim-2 vars, End of recursive call: 5 dim-0 vars, and 2 xjuncts. [2018-01-24 13:14:06,959 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 6 variables, input treesize:135, output treesize:73 [2018-01-24 13:14:10,323 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 67 [2018-01-24 13:14:10,342 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 13:14:10,342 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:10,359 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 54 [2018-01-24 13:14:10,362 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 41 [2018-01-24 13:14:10,363 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:10,365 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:10,367 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 19 [2018-01-24 13:14:10,369 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 13:14:10,369 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:10,373 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:10,386 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-01-24 13:14:10,416 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2018-01-24 13:14:10,429 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 13:14:10,429 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:10,441 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 18 [2018-01-24 13:14:10,443 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 5 [2018-01-24 13:14:10,444 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:10,447 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:10,449 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 19 [2018-01-24 13:14:10,451 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 13:14:10,451 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:10,454 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:10,463 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-01-24 13:14:10,499 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 36 [2018-01-24 13:14:10,513 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 13:14:10,513 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:10,518 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2018-01-24 13:14:10,519 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 7 [2018-01-24 13:14:10,520 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:10,521 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:10,523 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:10,526 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 43 [2018-01-24 13:14:10,545 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 13:14:10,545 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:10,553 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2018-01-24 13:14:10,555 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 13:14:10,555 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:10,557 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:10,561 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:10,563 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-01-24 13:14:10,578 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 13:14:10,578 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:10,584 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2018-01-24 13:14:10,586 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 7 [2018-01-24 13:14:10,586 INFO L267 ElimStorePlain]: Start of recursive call 25: End of recursive call: and 1 xjuncts. [2018-01-24 13:14:10,587 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:10,590 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:14:10,613 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 3 dim-2 vars, End of recursive call: and 5 xjuncts. [2018-01-24 13:14:10,614 INFO L202 ElimStorePlain]: Needed 25 recursive calls to eliminate 10 variables, input treesize:115, output treesize:37 [2018-01-24 13:14:10,637 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:14:10,639 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:14:10,639 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 10, 9, 10] total 23 [2018-01-24 13:14:10,639 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:14:10,639 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 13:14:10,640 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 13:14:10,640 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=472, Unknown=0, NotChecked=0, Total=552 [2018-01-24 13:14:10,640 INFO L87 Difference]: Start difference. First operand 133 states and 141 transitions. Second operand 15 states. [2018-01-24 13:14:11,051 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:14:11,051 INFO L93 Difference]: Finished difference Result 268 states and 290 transitions. [2018-01-24 13:14:11,051 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-24 13:14:11,052 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 37 [2018-01-24 13:14:11,052 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:14:11,053 INFO L225 Difference]: With dead ends: 268 [2018-01-24 13:14:11,053 INFO L226 Difference]: Without dead ends: 143 [2018-01-24 13:14:11,054 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 166 GetRequests, 122 SyntacticMatches, 12 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 236 ImplicationChecksByTransitivity, 9.2s TimeCoverageRelationStatistics Valid=254, Invalid=868, Unknown=0, NotChecked=0, Total=1122 [2018-01-24 13:14:11,054 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-01-24 13:14:11,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2018-01-24 13:14:11,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-01-24 13:14:11,064 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 151 transitions. [2018-01-24 13:14:11,064 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 151 transitions. Word has length 37 [2018-01-24 13:14:11,064 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:14:11,064 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 151 transitions. [2018-01-24 13:14:11,065 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 13:14:11,065 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 151 transitions. [2018-01-24 13:14:11,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-24 13:14:11,065 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:14:11,065 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:14:11,066 INFO L371 AbstractCegarLoop]: === Iteration 30 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:14:11,066 INFO L82 PathProgramCache]: Analyzing trace with hash 484884458, now seen corresponding path program 1 times [2018-01-24 13:14:11,066 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:14:11,067 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:14:11,067 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:14:11,067 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:14:11,067 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:14:11,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:14:11,079 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:14:11,535 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:14:11,535 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:14:11,535 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-01-24 13:14:11,535 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:14:11,535 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-24 13:14:11,535 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-24 13:14:11,536 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2018-01-24 13:14:11,536 INFO L87 Difference]: Start difference. First operand 143 states and 151 transitions. Second operand 17 states. [2018-01-24 13:14:12,474 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:14:12,474 INFO L93 Difference]: Finished difference Result 226 states and 243 transitions. [2018-01-24 13:14:12,474 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-24 13:14:12,474 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 40 [2018-01-24 13:14:12,475 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:14:12,475 INFO L225 Difference]: With dead ends: 226 [2018-01-24 13:14:12,475 INFO L226 Difference]: Without dead ends: 178 [2018-01-24 13:14:12,476 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 198 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=134, Invalid=988, Unknown=0, NotChecked=0, Total=1122 [2018-01-24 13:14:12,477 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-01-24 13:14:12,486 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 160. [2018-01-24 13:14:12,486 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-01-24 13:14:12,488 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 171 transitions. [2018-01-24 13:14:12,488 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 171 transitions. Word has length 40 [2018-01-24 13:14:12,488 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:14:12,488 INFO L432 AbstractCegarLoop]: Abstraction has 160 states and 171 transitions. [2018-01-24 13:14:12,488 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-24 13:14:12,488 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 171 transitions. [2018-01-24 13:14:12,489 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-24 13:14:12,489 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:14:12,490 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:14:12,490 INFO L371 AbstractCegarLoop]: === Iteration 31 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:14:12,490 INFO L82 PathProgramCache]: Analyzing trace with hash 1287024166, now seen corresponding path program 1 times [2018-01-24 13:14:12,490 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:14:12,491 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:14:12,491 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:14:12,491 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:14:12,491 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:14:12,503 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:14:12,504 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:14:12,714 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:14:12,714 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:14:12,714 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-24 13:14:12,715 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:14:12,715 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-24 13:14:12,715 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-24 13:14:12,715 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2018-01-24 13:14:12,715 INFO L87 Difference]: Start difference. First operand 160 states and 171 transitions. Second operand 12 states. [2018-01-24 13:14:13,327 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:14:13,327 INFO L93 Difference]: Finished difference Result 196 states and 214 transitions. [2018-01-24 13:14:13,328 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-24 13:14:13,328 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 40 [2018-01-24 13:14:13,328 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:14:13,329 INFO L225 Difference]: With dead ends: 196 [2018-01-24 13:14:13,329 INFO L226 Difference]: Without dead ends: 195 [2018-01-24 13:14:13,329 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=107, Invalid=399, Unknown=0, NotChecked=0, Total=506 [2018-01-24 13:14:13,329 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states. [2018-01-24 13:14:13,337 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 169. [2018-01-24 13:14:13,337 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-01-24 13:14:13,337 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 182 transitions. [2018-01-24 13:14:13,338 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 182 transitions. Word has length 40 [2018-01-24 13:14:13,338 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:14:13,338 INFO L432 AbstractCegarLoop]: Abstraction has 169 states and 182 transitions. [2018-01-24 13:14:13,338 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-24 13:14:13,338 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 182 transitions. [2018-01-24 13:14:13,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-24 13:14:13,338 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:14:13,338 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:14:13,339 INFO L371 AbstractCegarLoop]: === Iteration 32 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:14:13,339 INFO L82 PathProgramCache]: Analyzing trace with hash -907645030, now seen corresponding path program 1 times [2018-01-24 13:14:13,339 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:14:13,339 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:14:13,339 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:14:13,339 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:14:13,339 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:14:13,345 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:14:13,346 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:14:13,425 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:14:13,425 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:14:13,425 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-24 13:14:13,425 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:14:13,426 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 13:14:13,426 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 13:14:13,426 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-01-24 13:14:13,426 INFO L87 Difference]: Start difference. First operand 169 states and 182 transitions. Second operand 8 states. [2018-01-24 13:14:13,600 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:14:13,600 INFO L93 Difference]: Finished difference Result 186 states and 200 transitions. [2018-01-24 13:14:13,600 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 13:14:13,601 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 44 [2018-01-24 13:14:13,601 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:14:13,603 INFO L225 Difference]: With dead ends: 186 [2018-01-24 13:14:13,603 INFO L226 Difference]: Without dead ends: 185 [2018-01-24 13:14:13,603 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-01-24 13:14:13,604 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2018-01-24 13:14:13,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 178. [2018-01-24 13:14:13,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-01-24 13:14:13,616 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 196 transitions. [2018-01-24 13:14:13,616 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 196 transitions. Word has length 44 [2018-01-24 13:14:13,616 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:14:13,616 INFO L432 AbstractCegarLoop]: Abstraction has 178 states and 196 transitions. [2018-01-24 13:14:13,616 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 13:14:13,617 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 196 transitions. [2018-01-24 13:14:13,617 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-24 13:14:13,617 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:14:13,617 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:14:13,617 INFO L371 AbstractCegarLoop]: === Iteration 33 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:14:13,617 INFO L82 PathProgramCache]: Analyzing trace with hash -907645029, now seen corresponding path program 1 times [2018-01-24 13:14:13,617 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:14:13,618 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:14:13,618 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:14:13,618 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:14:13,618 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:14:13,624 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:14:13,625 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:14:13,717 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:14:13,717 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:14:13,718 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 13:14:13,718 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:14:13,718 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 13:14:13,718 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 13:14:13,718 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:14:13,718 INFO L87 Difference]: Start difference. First operand 178 states and 196 transitions. Second operand 6 states. [2018-01-24 13:14:14,128 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:14:14,129 INFO L93 Difference]: Finished difference Result 185 states and 204 transitions. [2018-01-24 13:14:14,129 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 13:14:14,129 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 44 [2018-01-24 13:14:14,130 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:14:14,131 INFO L225 Difference]: With dead ends: 185 [2018-01-24 13:14:14,131 INFO L226 Difference]: Without dead ends: 184 [2018-01-24 13:14:14,131 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-24 13:14:14,132 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-01-24 13:14:14,147 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 180. [2018-01-24 13:14:14,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-01-24 13:14:14,148 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 199 transitions. [2018-01-24 13:14:14,149 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 199 transitions. Word has length 44 [2018-01-24 13:14:14,149 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:14:14,149 INFO L432 AbstractCegarLoop]: Abstraction has 180 states and 199 transitions. [2018-01-24 13:14:14,149 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 13:14:14,149 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 199 transitions. [2018-01-24 13:14:14,150 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-24 13:14:14,150 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:14:14,150 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:14:14,150 INFO L371 AbstractCegarLoop]: === Iteration 34 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:14:14,150 INFO L82 PathProgramCache]: Analyzing trace with hash 563904760, now seen corresponding path program 1 times [2018-01-24 13:14:14,151 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:14:14,151 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:14:14,152 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:14:14,152 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:14:14,152 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:14:14,164 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:14:14,165 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:14:14,302 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:14:14,302 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:14:14,303 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 13:14:14,303 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:14:14,303 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 13:14:14,303 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 13:14:14,303 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:14:14,303 INFO L87 Difference]: Start difference. First operand 180 states and 199 transitions. Second operand 10 states. [2018-01-24 13:14:14,512 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:14:14,512 INFO L93 Difference]: Finished difference Result 187 states and 202 transitions. [2018-01-24 13:14:14,512 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-24 13:14:14,512 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 43 [2018-01-24 13:14:14,512 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:14:14,513 INFO L225 Difference]: With dead ends: 187 [2018-01-24 13:14:14,513 INFO L226 Difference]: Without dead ends: 186 [2018-01-24 13:14:14,514 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=212, Unknown=0, NotChecked=0, Total=272 [2018-01-24 13:14:14,514 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states. [2018-01-24 13:14:14,524 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 170. [2018-01-24 13:14:14,525 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states. [2018-01-24 13:14:14,526 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 187 transitions. [2018-01-24 13:14:14,526 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 187 transitions. Word has length 43 [2018-01-24 13:14:14,526 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:14:14,526 INFO L432 AbstractCegarLoop]: Abstraction has 170 states and 187 transitions. [2018-01-24 13:14:14,526 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 13:14:14,526 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 187 transitions. [2018-01-24 13:14:14,527 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-24 13:14:14,527 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:14:14,527 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:14:14,527 INFO L371 AbstractCegarLoop]: === Iteration 35 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:14:14,527 INFO L82 PathProgramCache]: Analyzing trace with hash -368510437, now seen corresponding path program 1 times [2018-01-24 13:14:14,527 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:14:14,528 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:14:14,528 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:14:14,528 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:14:14,528 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:14:14,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:14:14,536 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:14:15,026 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:14:15,027 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:14:15,027 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-24 13:14:15,027 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:14:15,027 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-24 13:14:15,027 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-24 13:14:15,027 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-01-24 13:14:15,027 INFO L87 Difference]: Start difference. First operand 170 states and 187 transitions. Second operand 12 states. [2018-01-24 13:14:15,470 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:14:15,470 INFO L93 Difference]: Finished difference Result 205 states and 229 transitions. [2018-01-24 13:14:15,470 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-24 13:14:15,471 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 46 [2018-01-24 13:14:15,471 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:14:15,471 INFO L225 Difference]: With dead ends: 205 [2018-01-24 13:14:15,472 INFO L226 Difference]: Without dead ends: 204 [2018-01-24 13:14:15,472 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=52, Invalid=220, Unknown=0, NotChecked=0, Total=272 [2018-01-24 13:14:15,472 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 204 states. [2018-01-24 13:14:15,480 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 204 to 196. [2018-01-24 13:14:15,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 196 states. [2018-01-24 13:14:15,481 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 220 transitions. [2018-01-24 13:14:15,481 INFO L78 Accepts]: Start accepts. Automaton has 196 states and 220 transitions. Word has length 46 [2018-01-24 13:14:15,482 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:14:15,482 INFO L432 AbstractCegarLoop]: Abstraction has 196 states and 220 transitions. [2018-01-24 13:14:15,482 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-24 13:14:15,482 INFO L276 IsEmpty]: Start isEmpty. Operand 196 states and 220 transitions. [2018-01-24 13:14:15,482 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-24 13:14:15,482 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:14:15,482 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:14:15,482 INFO L371 AbstractCegarLoop]: === Iteration 36 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:14:15,483 INFO L82 PathProgramCache]: Analyzing trace with hash 221499877, now seen corresponding path program 1 times [2018-01-24 13:14:15,483 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:14:15,483 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:14:15,483 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:14:15,483 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:14:15,484 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:14:15,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:14:15,494 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:14:15,717 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:14:15,717 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:14:15,717 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-01-24 13:14:15,717 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:14:15,718 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-24 13:14:15,718 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-24 13:14:15,718 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=269, Unknown=0, NotChecked=0, Total=306 [2018-01-24 13:14:15,718 INFO L87 Difference]: Start difference. First operand 196 states and 220 transitions. Second operand 18 states. [2018-01-24 13:14:16,503 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:14:16,503 INFO L93 Difference]: Finished difference Result 225 states and 254 transitions. [2018-01-24 13:14:16,503 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-24 13:14:16,503 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 47 [2018-01-24 13:14:16,504 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:14:16,504 INFO L225 Difference]: With dead ends: 225 [2018-01-24 13:14:16,505 INFO L226 Difference]: Without dead ends: 222 [2018-01-24 13:14:16,505 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 200 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=136, Invalid=1054, Unknown=0, NotChecked=0, Total=1190 [2018-01-24 13:14:16,505 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2018-01-24 13:14:16,519 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 201. [2018-01-24 13:14:16,520 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 201 states. [2018-01-24 13:14:16,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201 states to 201 states and 227 transitions. [2018-01-24 13:14:16,521 INFO L78 Accepts]: Start accepts. Automaton has 201 states and 227 transitions. Word has length 47 [2018-01-24 13:14:16,521 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:14:16,521 INFO L432 AbstractCegarLoop]: Abstraction has 201 states and 227 transitions. [2018-01-24 13:14:16,521 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-24 13:14:16,522 INFO L276 IsEmpty]: Start isEmpty. Operand 201 states and 227 transitions. [2018-01-24 13:14:16,522 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-24 13:14:16,523 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:14:16,523 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:14:16,523 INFO L371 AbstractCegarLoop]: === Iteration 37 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:14:16,523 INFO L82 PathProgramCache]: Analyzing trace with hash 221499878, now seen corresponding path program 1 times [2018-01-24 13:14:16,523 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:14:16,524 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:14:16,524 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:14:16,524 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:14:16,524 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:14:16,538 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:14:16,539 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:14:16,952 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:14:16,952 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:14:16,952 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2018-01-24 13:14:16,952 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:14:16,952 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-24 13:14:16,953 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-24 13:14:16,953 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=303, Unknown=0, NotChecked=0, Total=342 [2018-01-24 13:14:16,953 INFO L87 Difference]: Start difference. First operand 201 states and 227 transitions. Second operand 19 states. [2018-01-24 13:14:17,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:14:17,976 INFO L93 Difference]: Finished difference Result 242 states and 273 transitions. [2018-01-24 13:14:17,976 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-24 13:14:17,976 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 47 [2018-01-24 13:14:17,977 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:14:17,978 INFO L225 Difference]: With dead ends: 242 [2018-01-24 13:14:17,978 INFO L226 Difference]: Without dead ends: 239 [2018-01-24 13:14:17,978 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 247 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=150, Invalid=1256, Unknown=0, NotChecked=0, Total=1406 [2018-01-24 13:14:17,979 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239 states. [2018-01-24 13:14:17,996 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239 to 218. [2018-01-24 13:14:17,996 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 218 states. [2018-01-24 13:14:17,997 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 218 states to 218 states and 249 transitions. [2018-01-24 13:14:17,997 INFO L78 Accepts]: Start accepts. Automaton has 218 states and 249 transitions. Word has length 47 [2018-01-24 13:14:17,998 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:14:17,998 INFO L432 AbstractCegarLoop]: Abstraction has 218 states and 249 transitions. [2018-01-24 13:14:17,998 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-24 13:14:17,998 INFO L276 IsEmpty]: Start isEmpty. Operand 218 states and 249 transitions. [2018-01-24 13:14:17,999 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-24 13:14:17,999 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:14:17,999 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:14:17,999 INFO L371 AbstractCegarLoop]: === Iteration 38 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:14:17,999 INFO L82 PathProgramCache]: Analyzing trace with hash 1633162428, now seen corresponding path program 1 times [2018-01-24 13:14:17,999 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:14:18,000 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:14:18,000 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:14:18,000 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:14:18,000 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:14:18,017 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:14:18,018 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:14:18,563 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:14:18,563 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:14:18,563 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2018-01-24 13:14:18,563 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:14:18,563 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-24 13:14:18,564 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-24 13:14:18,564 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=455, Unknown=0, NotChecked=0, Total=506 [2018-01-24 13:14:18,564 INFO L87 Difference]: Start difference. First operand 218 states and 249 transitions. Second operand 23 states. [2018-01-24 13:14:19,846 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:14:19,846 INFO L93 Difference]: Finished difference Result 276 states and 315 transitions. [2018-01-24 13:14:19,846 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-24 13:14:19,846 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 50 [2018-01-24 13:14:19,847 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:14:19,848 INFO L225 Difference]: With dead ends: 276 [2018-01-24 13:14:19,848 INFO L226 Difference]: Without dead ends: 274 [2018-01-24 13:14:19,848 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 51 GetRequests, 3 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 489 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=213, Invalid=2043, Unknown=0, NotChecked=0, Total=2256 [2018-01-24 13:14:19,849 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 274 states. [2018-01-24 13:14:19,868 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 274 to 242. [2018-01-24 13:14:19,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 242 states. [2018-01-24 13:14:19,870 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 242 states to 242 states and 280 transitions. [2018-01-24 13:14:19,870 INFO L78 Accepts]: Start accepts. Automaton has 242 states and 280 transitions. Word has length 50 [2018-01-24 13:14:19,870 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:14:19,870 INFO L432 AbstractCegarLoop]: Abstraction has 242 states and 280 transitions. [2018-01-24 13:14:19,870 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-24 13:14:19,871 INFO L276 IsEmpty]: Start isEmpty. Operand 242 states and 280 transitions. [2018-01-24 13:14:19,871 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-24 13:14:19,872 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:14:19,872 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:14:19,872 INFO L371 AbstractCegarLoop]: === Iteration 39 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 13:14:19,872 INFO L82 PathProgramCache]: Analyzing trace with hash 1633162429, now seen corresponding path program 1 times [2018-01-24 13:14:19,872 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:14:19,873 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:14:19,873 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:14:19,873 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:14:19,873 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:14:19,891 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:14:19,892 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:14:20,489 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:14:20,489 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:14:20,528 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [22] imperfect sequences [] total 22 [2018-01-24 13:14:20,528 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:14:20,529 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-24 13:14:20,529 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-24 13:14:20,529 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=455, Unknown=0, NotChecked=0, Total=506 [2018-01-24 13:14:20,529 INFO L87 Difference]: Start difference. First operand 242 states and 280 transitions. Second operand 23 states. Received shutdown request... [2018-01-24 13:14:21,195 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-24 13:14:21,195 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-24 13:14:21,201 WARN L187 ceAbstractionStarter]: Timeout [2018-01-24 13:14:21,202 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.01 01:14:21 BoogieIcfgContainer [2018-01-24 13:14:21,202 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-24 13:14:21,202 INFO L168 Benchmark]: Toolchain (without parser) took 49267.36 ms. Allocated memory was 304.6 MB in the beginning and 663.2 MB in the end (delta: 358.6 MB). Free memory was 263.5 MB in the beginning and 339.1 MB in the end (delta: -75.6 MB). Peak memory consumption was 283.1 MB. Max. memory is 5.3 GB. [2018-01-24 13:14:21,203 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 304.6 MB. Free memory is still 269.5 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-24 13:14:21,204 INFO L168 Benchmark]: CACSL2BoogieTranslator took 213.93 ms. Allocated memory is still 304.6 MB. Free memory was 263.5 MB in the beginning and 251.6 MB in the end (delta: 12.0 MB). Peak memory consumption was 12.0 MB. Max. memory is 5.3 GB. [2018-01-24 13:14:21,204 INFO L168 Benchmark]: Boogie Preprocessor took 36.31 ms. Allocated memory is still 304.6 MB. Free memory was 251.6 MB in the beginning and 249.6 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-24 13:14:21,204 INFO L168 Benchmark]: RCFGBuilder took 485.10 ms. Allocated memory is still 304.6 MB. Free memory was 249.6 MB in the beginning and 218.6 MB in the end (delta: 30.9 MB). Peak memory consumption was 30.9 MB. Max. memory is 5.3 GB. [2018-01-24 13:14:21,205 INFO L168 Benchmark]: TraceAbstraction took 48523.37 ms. Allocated memory was 304.6 MB in the beginning and 663.2 MB in the end (delta: 358.6 MB). Free memory was 218.6 MB in the beginning and 339.1 MB in the end (delta: -120.4 MB). Peak memory consumption was 238.2 MB. Max. memory is 5.3 GB. [2018-01-24 13:14:21,206 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 304.6 MB. Free memory is still 269.5 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 213.93 ms. Allocated memory is still 304.6 MB. Free memory was 263.5 MB in the beginning and 251.6 MB in the end (delta: 12.0 MB). Peak memory consumption was 12.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 36.31 ms. Allocated memory is still 304.6 MB. Free memory was 251.6 MB in the beginning and 249.6 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 485.10 ms. Allocated memory is still 304.6 MB. Free memory was 249.6 MB in the beginning and 218.6 MB in the end (delta: 30.9 MB). Peak memory consumption was 30.9 MB. Max. memory is 5.3 GB. * TraceAbstraction took 48523.37 ms. Allocated memory was 304.6 MB in the beginning and 663.2 MB in the end (delta: 358.6 MB). Free memory was 218.6 MB in the beginning and 339.1 MB in the end (delta: -120.4 MB). Peak memory consumption was 238.2 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 547). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 550). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 544). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 547). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 547). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 544). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 550). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 552). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 547). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 552). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 562). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 560). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 560). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 560). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 560). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 559). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 559). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 562). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 577). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 579). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 571). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 580). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 570]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 570). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 571). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 576). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 577). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 579). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 580). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 576). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 577). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 579). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 577). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 579). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 566). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 567). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 568). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 566). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 566). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 566). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 567). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 568). Cancelled while BasicCegarLoop was constructing difference of abstraction (242states) and interpolant automaton (currently 19 states, 23 states before enhancement), while ReachableStatesComputation was computing reachable states (76 states constructedinput type IntersectNwa). - StatisticsResult: Ultimate Automizer benchmark data CFG has 6 procedures, 121 locations, 45 error locations. TIMEOUT Result, 48.4s OverallTime, 39 OverallIterations, 2 TraceHistogramMax, 14.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3462 SDtfs, 2501 SDslu, 11291 SDs, 0 SdLazy, 11582 SolverSat, 559 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 7.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 956 GetRequests, 412 SyntacticMatches, 34 SemanticMatches, 510 ConstructedPredicates, 1 IntricatePredicates, 0 DeprecatedPredicates, 2575 ImplicationChecksByTransitivity, 32.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=242occurred in iteration=38, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.3s AutomataMinimizationTime, 38 MinimizatonAttempts, 405 StatesRemovedByMinimization, 31 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 32.7s InterpolantComputationTime, 1422 NumberOfCodeBlocks, 1422 NumberOfCodeBlocksAsserted, 45 NumberOfCheckSat, 1587 ConstructedInterpolants, 94 QuantifiedInterpolants, 584807 SizeOfPredicates, 74 NumberOfNonLiveVariables, 1026 ConjunctsInSsa, 137 ConjunctsInUnsatCore, 51 InterpolantComputations, 36 PerfectInterpolantSequences, 16/80 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/optional_data_creation_test04_true-valid-memsafety.i_svcomp-DerefFreeMemtrack-32bit-Automizer_RubberTaipan+AI_EQ.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-24_13-14-21-215.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/optional_data_creation_test04_true-valid-memsafety.i_svcomp-DerefFreeMemtrack-32bit-Automizer_RubberTaipan+AI_EQ.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-24_13-14-21-215.csv Completed graceful shutdown