java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_RubberTaipan+AI_EQ.epf -i ../../../trunk/examples/svcomp/memsafety-ext/tree_parent_ptr_true-valid-memsafety_false-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-24 13:09:43,374 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-24 13:09:43,376 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-24 13:09:43,392 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-24 13:09:43,392 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-24 13:09:43,393 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-24 13:09:43,394 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-24 13:09:43,396 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-24 13:09:43,398 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-24 13:09:43,398 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-24 13:09:43,399 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-24 13:09:43,399 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-24 13:09:43,400 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-24 13:09:43,400 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-24 13:09:43,401 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-24 13:09:43,404 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-24 13:09:43,406 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-24 13:09:43,408 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-24 13:09:43,409 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-24 13:09:43,410 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-24 13:09:43,413 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-24 13:09:43,413 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-24 13:09:43,413 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-24 13:09:43,414 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-24 13:09:43,415 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-24 13:09:43,416 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-24 13:09:43,416 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-24 13:09:43,417 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-24 13:09:43,417 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-24 13:09:43,417 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-24 13:09:43,418 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-24 13:09:43,418 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_RubberTaipan+AI_EQ.epf [2018-01-24 13:09:43,428 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-24 13:09:43,428 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-24 13:09:43,429 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-24 13:09:43,429 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-24 13:09:43,430 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-24 13:09:43,430 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-24 13:09:43,430 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-24 13:09:43,431 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-24 13:09:43,431 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-24 13:09:43,431 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-24 13:09:43,431 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-24 13:09:43,431 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-24 13:09:43,432 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-24 13:09:43,432 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-24 13:09:43,432 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-24 13:09:43,432 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-24 13:09:43,432 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-24 13:09:43,433 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-24 13:09:43,433 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-24 13:09:43,433 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-24 13:09:43,433 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-24 13:09:43,433 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-24 13:09:43,434 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-24 13:09:43,434 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 13:09:43,434 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-24 13:09:43,434 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-24 13:09:43,434 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-24 13:09:43,435 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-24 13:09:43,435 INFO L133 SettingsManager]: * Trace refinement strategy=RUBBER_TAIPAN [2018-01-24 13:09:43,435 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-24 13:09:43,435 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-24 13:09:43,435 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-24 13:09:43,436 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-24 13:09:43,436 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-24 13:09:43,472 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-24 13:09:43,484 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-24 13:09:43,488 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-24 13:09:43,490 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-24 13:09:43,490 INFO L276 PluginConnector]: CDTParser initialized [2018-01-24 13:09:43,491 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety-ext/tree_parent_ptr_true-valid-memsafety_false-termination.i [2018-01-24 13:09:43,649 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-24 13:09:43,655 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-24 13:09:43,656 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-24 13:09:43,656 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-24 13:09:43,660 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-24 13:09:43,661 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 01:09:43" (1/1) ... [2018-01-24 13:09:43,664 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7b352040 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:09:43, skipping insertion in model container [2018-01-24 13:09:43,664 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 01:09:43" (1/1) ... [2018-01-24 13:09:43,677 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 13:09:43,716 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 13:09:43,830 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 13:09:43,853 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 13:09:43,864 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:09:43 WrapperNode [2018-01-24 13:09:43,864 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-24 13:09:43,865 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-24 13:09:43,865 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-24 13:09:43,865 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-24 13:09:43,880 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:09:43" (1/1) ... [2018-01-24 13:09:43,880 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:09:43" (1/1) ... [2018-01-24 13:09:43,894 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:09:43" (1/1) ... [2018-01-24 13:09:43,895 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:09:43" (1/1) ... [2018-01-24 13:09:43,902 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:09:43" (1/1) ... [2018-01-24 13:09:43,907 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:09:43" (1/1) ... [2018-01-24 13:09:43,908 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:09:43" (1/1) ... [2018-01-24 13:09:43,910 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-24 13:09:43,911 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-24 13:09:43,911 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-24 13:09:43,911 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-24 13:09:43,912 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:09:43" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 13:09:43,974 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-24 13:09:43,974 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-24 13:09:43,974 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-24 13:09:43,974 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-24 13:09:43,975 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-24 13:09:43,975 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-24 13:09:43,975 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-24 13:09:43,975 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-24 13:09:43,975 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-24 13:09:43,975 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-24 13:09:43,976 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-24 13:09:43,976 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-24 13:09:43,976 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-24 13:09:43,976 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-24 13:09:44,608 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-24 13:09:44,609 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 01:09:44 BoogieIcfgContainer [2018-01-24 13:09:44,609 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-24 13:09:44,609 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-24 13:09:44,610 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-24 13:09:44,611 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-24 13:09:44,612 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.01 01:09:43" (1/3) ... [2018-01-24 13:09:44,612 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7b89c58f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 01:09:44, skipping insertion in model container [2018-01-24 13:09:44,613 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 01:09:43" (2/3) ... [2018-01-24 13:09:44,613 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@7b89c58f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 01:09:44, skipping insertion in model container [2018-01-24 13:09:44,613 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 01:09:44" (3/3) ... [2018-01-24 13:09:44,614 INFO L105 eAbstractionObserver]: Analyzing ICFG tree_parent_ptr_true-valid-memsafety_false-termination.i [2018-01-24 13:09:44,621 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-24 13:09:44,627 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 75 error locations. [2018-01-24 13:09:44,672 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-24 13:09:44,672 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-24 13:09:44,672 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-24 13:09:44,672 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-24 13:09:44,673 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-24 13:09:44,673 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-24 13:09:44,673 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-24 13:09:44,673 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-24 13:09:44,673 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-24 13:09:44,693 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states. [2018-01-24 13:09:44,698 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-01-24 13:09:44,698 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:44,699 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:44,699 INFO L371 AbstractCegarLoop]: === Iteration 1 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:44,703 INFO L82 PathProgramCache]: Analyzing trace with hash -1759036932, now seen corresponding path program 1 times [2018-01-24 13:09:44,704 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:44,746 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:44,747 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:44,747 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:44,747 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:44,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:44,789 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:44,856 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:44,859 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:09:44,859 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 13:09:44,859 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:09:44,863 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 13:09:44,878 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 13:09:44,878 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 13:09:44,881 INFO L87 Difference]: Start difference. First operand 164 states. Second operand 4 states. [2018-01-24 13:09:45,197 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:45,197 INFO L93 Difference]: Finished difference Result 329 states and 357 transitions. [2018-01-24 13:09:45,218 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 13:09:45,219 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 8 [2018-01-24 13:09:45,219 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:45,228 INFO L225 Difference]: With dead ends: 329 [2018-01-24 13:09:45,228 INFO L226 Difference]: Without dead ends: 174 [2018-01-24 13:09:45,232 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:09:45,247 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 174 states. [2018-01-24 13:09:45,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 174 to 158. [2018-01-24 13:09:45,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-01-24 13:09:45,267 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 168 transitions. [2018-01-24 13:09:45,269 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 168 transitions. Word has length 8 [2018-01-24 13:09:45,269 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:45,269 INFO L432 AbstractCegarLoop]: Abstraction has 158 states and 168 transitions. [2018-01-24 13:09:45,269 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 13:09:45,269 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 168 transitions. [2018-01-24 13:09:45,269 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-01-24 13:09:45,270 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:45,270 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:45,270 INFO L371 AbstractCegarLoop]: === Iteration 2 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:45,270 INFO L82 PathProgramCache]: Analyzing trace with hash -1759036931, now seen corresponding path program 1 times [2018-01-24 13:09:45,270 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:45,271 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:45,271 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:45,271 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:45,271 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:45,291 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:45,292 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:45,417 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:45,417 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:09:45,418 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 13:09:45,418 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:09:45,419 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 13:09:45,419 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 13:09:45,420 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 13:09:45,420 INFO L87 Difference]: Start difference. First operand 158 states and 168 transitions. Second operand 4 states. [2018-01-24 13:09:45,604 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:45,605 INFO L93 Difference]: Finished difference Result 158 states and 168 transitions. [2018-01-24 13:09:45,605 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 13:09:45,605 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 8 [2018-01-24 13:09:45,605 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:45,606 INFO L225 Difference]: With dead ends: 158 [2018-01-24 13:09:45,606 INFO L226 Difference]: Without dead ends: 155 [2018-01-24 13:09:45,607 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:09:45,607 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 155 states. [2018-01-24 13:09:45,615 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 155 to 155. [2018-01-24 13:09:45,615 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155 states. [2018-01-24 13:09:45,617 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 165 transitions. [2018-01-24 13:09:45,617 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 165 transitions. Word has length 8 [2018-01-24 13:09:45,617 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:45,618 INFO L432 AbstractCegarLoop]: Abstraction has 155 states and 165 transitions. [2018-01-24 13:09:45,618 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 13:09:45,618 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 165 transitions. [2018-01-24 13:09:45,618 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-01-24 13:09:45,618 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:45,619 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:45,619 INFO L371 AbstractCegarLoop]: === Iteration 3 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:45,619 INFO L82 PathProgramCache]: Analyzing trace with hash -2080332291, now seen corresponding path program 1 times [2018-01-24 13:09:45,619 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:45,620 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:45,620 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:45,620 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:45,621 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:45,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:45,637 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:45,666 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:45,667 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:09:45,667 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 13:09:45,667 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:09:45,667 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 13:09:45,667 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 13:09:45,668 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 13:09:45,668 INFO L87 Difference]: Start difference. First operand 155 states and 165 transitions. Second operand 4 states. [2018-01-24 13:09:45,807 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:45,807 INFO L93 Difference]: Finished difference Result 179 states and 190 transitions. [2018-01-24 13:09:45,807 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 13:09:45,807 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-01-24 13:09:45,808 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:45,809 INFO L225 Difference]: With dead ends: 179 [2018-01-24 13:09:45,809 INFO L226 Difference]: Without dead ends: 161 [2018-01-24 13:09:45,809 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:09:45,809 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2018-01-24 13:09:45,816 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 140. [2018-01-24 13:09:45,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-01-24 13:09:45,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 151 transitions. [2018-01-24 13:09:45,818 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 151 transitions. Word has length 15 [2018-01-24 13:09:45,818 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:45,818 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 151 transitions. [2018-01-24 13:09:45,818 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 13:09:45,818 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 151 transitions. [2018-01-24 13:09:45,818 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-01-24 13:09:45,819 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:45,819 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:45,819 INFO L371 AbstractCegarLoop]: === Iteration 4 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:45,819 INFO L82 PathProgramCache]: Analyzing trace with hash -2080332290, now seen corresponding path program 1 times [2018-01-24 13:09:45,819 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:45,820 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:45,820 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:45,820 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:45,820 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:45,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:45,834 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:45,908 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:45,908 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:09:45,908 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:09:45,908 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:09:45,909 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:09:45,909 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:09:45,909 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:09:45,909 INFO L87 Difference]: Start difference. First operand 140 states and 151 transitions. Second operand 5 states. [2018-01-24 13:09:46,178 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:46,178 INFO L93 Difference]: Finished difference Result 210 states and 228 transitions. [2018-01-24 13:09:46,179 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 13:09:46,179 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 15 [2018-01-24 13:09:46,179 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:46,182 INFO L225 Difference]: With dead ends: 210 [2018-01-24 13:09:46,182 INFO L226 Difference]: Without dead ends: 196 [2018-01-24 13:09:46,182 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:09:46,183 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 196 states. [2018-01-24 13:09:46,192 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 196 to 176. [2018-01-24 13:09:46,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-01-24 13:09:46,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 203 transitions. [2018-01-24 13:09:46,193 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 203 transitions. Word has length 15 [2018-01-24 13:09:46,193 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:46,194 INFO L432 AbstractCegarLoop]: Abstraction has 176 states and 203 transitions. [2018-01-24 13:09:46,194 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:09:46,194 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 203 transitions. [2018-01-24 13:09:46,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-24 13:09:46,194 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:46,194 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:46,195 INFO L371 AbstractCegarLoop]: === Iteration 5 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:46,195 INFO L82 PathProgramCache]: Analyzing trace with hash -2037600517, now seen corresponding path program 1 times [2018-01-24 13:09:46,195 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:46,196 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:46,196 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:46,196 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:46,196 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:46,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:46,210 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:46,239 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:46,239 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:09:46,239 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 13:09:46,239 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:09:46,240 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 13:09:46,240 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 13:09:46,240 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 13:09:46,240 INFO L87 Difference]: Start difference. First operand 176 states and 203 transitions. Second operand 4 states. [2018-01-24 13:09:46,356 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:46,356 INFO L93 Difference]: Finished difference Result 192 states and 219 transitions. [2018-01-24 13:09:46,356 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 13:09:46,356 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 17 [2018-01-24 13:09:46,357 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:46,357 INFO L225 Difference]: With dead ends: 192 [2018-01-24 13:09:46,357 INFO L226 Difference]: Without dead ends: 189 [2018-01-24 13:09:46,358 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:09:46,358 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-01-24 13:09:46,366 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 177. [2018-01-24 13:09:46,366 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-01-24 13:09:46,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 206 transitions. [2018-01-24 13:09:46,368 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 206 transitions. Word has length 17 [2018-01-24 13:09:46,369 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:46,369 INFO L432 AbstractCegarLoop]: Abstraction has 177 states and 206 transitions. [2018-01-24 13:09:46,369 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 13:09:46,369 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 206 transitions. [2018-01-24 13:09:46,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-24 13:09:46,370 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:46,370 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:46,370 INFO L371 AbstractCegarLoop]: === Iteration 6 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:46,370 INFO L82 PathProgramCache]: Analyzing trace with hash -2037600516, now seen corresponding path program 1 times [2018-01-24 13:09:46,370 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:46,371 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:46,371 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:46,371 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:46,371 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:46,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:46,384 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:46,441 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:46,441 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:09:46,441 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 13:09:46,442 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:09:46,442 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 13:09:46,442 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 13:09:46,442 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 13:09:46,442 INFO L87 Difference]: Start difference. First operand 177 states and 206 transitions. Second operand 4 states. [2018-01-24 13:09:46,609 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:46,609 INFO L93 Difference]: Finished difference Result 182 states and 209 transitions. [2018-01-24 13:09:46,610 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 13:09:46,610 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 17 [2018-01-24 13:09:46,610 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:46,611 INFO L225 Difference]: With dead ends: 182 [2018-01-24 13:09:46,611 INFO L226 Difference]: Without dead ends: 179 [2018-01-24 13:09:46,612 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:09:46,612 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-01-24 13:09:46,618 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 175. [2018-01-24 13:09:46,619 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-01-24 13:09:46,620 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 203 transitions. [2018-01-24 13:09:46,620 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 203 transitions. Word has length 17 [2018-01-24 13:09:46,621 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:46,621 INFO L432 AbstractCegarLoop]: Abstraction has 175 states and 203 transitions. [2018-01-24 13:09:46,621 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 13:09:46,621 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 203 transitions. [2018-01-24 13:09:46,622 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-24 13:09:46,622 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:46,622 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:46,622 INFO L371 AbstractCegarLoop]: === Iteration 7 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:46,623 INFO L82 PathProgramCache]: Analyzing trace with hash 1339674347, now seen corresponding path program 1 times [2018-01-24 13:09:46,623 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:46,624 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:46,624 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:46,624 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:46,624 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:46,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:46,637 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:46,668 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:46,668 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:09:46,668 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:09:46,669 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:09:46,669 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 13:09:46,669 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 13:09:46,669 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 13:09:46,670 INFO L87 Difference]: Start difference. First operand 175 states and 203 transitions. Second operand 4 states. [2018-01-24 13:09:46,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:46,709 INFO L93 Difference]: Finished difference Result 179 states and 206 transitions. [2018-01-24 13:09:46,710 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 13:09:46,710 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 22 [2018-01-24 13:09:46,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:46,712 INFO L225 Difference]: With dead ends: 179 [2018-01-24 13:09:46,712 INFO L226 Difference]: Without dead ends: 176 [2018-01-24 13:09:46,712 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:09:46,713 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-01-24 13:09:46,724 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 175. [2018-01-24 13:09:46,724 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 175 states. [2018-01-24 13:09:46,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 175 states to 175 states and 202 transitions. [2018-01-24 13:09:46,726 INFO L78 Accepts]: Start accepts. Automaton has 175 states and 202 transitions. Word has length 22 [2018-01-24 13:09:46,726 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:46,726 INFO L432 AbstractCegarLoop]: Abstraction has 175 states and 202 transitions. [2018-01-24 13:09:46,726 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 13:09:46,726 INFO L276 IsEmpty]: Start isEmpty. Operand 175 states and 202 transitions. [2018-01-24 13:09:46,727 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-24 13:09:46,727 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:46,727 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:46,727 INFO L371 AbstractCegarLoop]: === Iteration 8 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:46,728 INFO L82 PathProgramCache]: Analyzing trace with hash -1419766941, now seen corresponding path program 1 times [2018-01-24 13:09:46,728 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:46,729 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:46,729 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:46,729 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:46,729 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:46,741 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:46,741 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:46,797 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:46,797 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:09:46,798 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:09:46,798 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:09:46,798 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:09:46,798 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:09:46,798 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:09:46,799 INFO L87 Difference]: Start difference. First operand 175 states and 202 transitions. Second operand 5 states. [2018-01-24 13:09:46,919 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:46,919 INFO L93 Difference]: Finished difference Result 194 states and 223 transitions. [2018-01-24 13:09:46,919 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:09:46,920 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 23 [2018-01-24 13:09:46,920 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:46,921 INFO L225 Difference]: With dead ends: 194 [2018-01-24 13:09:46,921 INFO L226 Difference]: Without dead ends: 190 [2018-01-24 13:09:46,921 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=14, Invalid=16, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:09:46,921 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 190 states. [2018-01-24 13:09:46,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 190 to 174. [2018-01-24 13:09:46,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-01-24 13:09:46,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 202 transitions. [2018-01-24 13:09:46,927 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 202 transitions. Word has length 23 [2018-01-24 13:09:46,927 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:46,927 INFO L432 AbstractCegarLoop]: Abstraction has 174 states and 202 transitions. [2018-01-24 13:09:46,927 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:09:46,927 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 202 transitions. [2018-01-24 13:09:46,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-24 13:09:46,928 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:46,928 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:46,928 INFO L371 AbstractCegarLoop]: === Iteration 9 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:46,929 INFO L82 PathProgramCache]: Analyzing trace with hash -1419766940, now seen corresponding path program 1 times [2018-01-24 13:09:46,929 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:46,930 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:46,930 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:46,930 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:46,930 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:46,943 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:46,944 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:46,995 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:46,996 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:09:46,996 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:09:46,996 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:09:46,996 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:09:46,996 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:09:46,997 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:09:46,997 INFO L87 Difference]: Start difference. First operand 174 states and 202 transitions. Second operand 5 states. [2018-01-24 13:09:47,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:47,172 INFO L93 Difference]: Finished difference Result 196 states and 225 transitions. [2018-01-24 13:09:47,172 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:09:47,172 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 23 [2018-01-24 13:09:47,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:47,174 INFO L225 Difference]: With dead ends: 196 [2018-01-24 13:09:47,174 INFO L226 Difference]: Without dead ends: 194 [2018-01-24 13:09:47,175 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-01-24 13:09:47,175 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 194 states. [2018-01-24 13:09:47,179 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 194 to 176. [2018-01-24 13:09:47,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 176 states. [2018-01-24 13:09:47,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 176 states to 176 states and 203 transitions. [2018-01-24 13:09:47,181 INFO L78 Accepts]: Start accepts. Automaton has 176 states and 203 transitions. Word has length 23 [2018-01-24 13:09:47,182 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:47,182 INFO L432 AbstractCegarLoop]: Abstraction has 176 states and 203 transitions. [2018-01-24 13:09:47,182 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:09:47,182 INFO L276 IsEmpty]: Start isEmpty. Operand 176 states and 203 transitions. [2018-01-24 13:09:47,183 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-24 13:09:47,183 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:47,183 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:47,183 INFO L371 AbstractCegarLoop]: === Iteration 10 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:47,184 INFO L82 PathProgramCache]: Analyzing trace with hash 916114990, now seen corresponding path program 1 times [2018-01-24 13:09:47,184 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:47,185 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:47,185 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:47,185 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:47,185 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:47,194 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:47,195 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:47,209 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:47,209 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:09:47,209 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 13:09:47,210 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:09:47,210 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 13:09:47,210 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 13:09:47,210 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 13:09:47,210 INFO L87 Difference]: Start difference. First operand 176 states and 203 transitions. Second operand 3 states. [2018-01-24 13:09:47,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:47,220 INFO L93 Difference]: Finished difference Result 344 states and 400 transitions. [2018-01-24 13:09:47,220 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 13:09:47,220 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 23 [2018-01-24 13:09:47,220 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:47,221 INFO L225 Difference]: With dead ends: 344 [2018-01-24 13:09:47,221 INFO L226 Difference]: Without dead ends: 178 [2018-01-24 13:09:47,222 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 13:09:47,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-01-24 13:09:47,228 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 178. [2018-01-24 13:09:47,229 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-01-24 13:09:47,230 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 205 transitions. [2018-01-24 13:09:47,230 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 205 transitions. Word has length 23 [2018-01-24 13:09:47,230 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:47,230 INFO L432 AbstractCegarLoop]: Abstraction has 178 states and 205 transitions. [2018-01-24 13:09:47,230 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 13:09:47,230 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 205 transitions. [2018-01-24 13:09:47,231 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-24 13:09:47,231 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:47,232 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:47,232 INFO L371 AbstractCegarLoop]: === Iteration 11 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:47,232 INFO L82 PathProgramCache]: Analyzing trace with hash -1108120181, now seen corresponding path program 1 times [2018-01-24 13:09:47,232 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:47,233 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:47,233 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:47,234 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:47,234 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:47,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:47,248 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:47,403 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:47,403 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:09:47,403 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 13:09:47,403 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:09:47,404 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 13:09:47,404 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 13:09:47,404 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:09:47,404 INFO L87 Difference]: Start difference. First operand 178 states and 205 transitions. Second operand 6 states. [2018-01-24 13:09:47,619 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:47,619 INFO L93 Difference]: Finished difference Result 389 states and 450 transitions. [2018-01-24 13:09:47,619 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 13:09:47,619 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2018-01-24 13:09:47,619 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:47,620 INFO L225 Difference]: With dead ends: 389 [2018-01-24 13:09:47,621 INFO L226 Difference]: Without dead ends: 221 [2018-01-24 13:09:47,622 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 2 SyntacticMatches, 3 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-01-24 13:09:47,622 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states. [2018-01-24 13:09:47,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 194. [2018-01-24 13:09:47,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-01-24 13:09:47,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 226 transitions. [2018-01-24 13:09:47,628 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 226 transitions. Word has length 25 [2018-01-24 13:09:47,629 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:47,629 INFO L432 AbstractCegarLoop]: Abstraction has 194 states and 226 transitions. [2018-01-24 13:09:47,629 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 13:09:47,629 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 226 transitions. [2018-01-24 13:09:47,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-24 13:09:47,630 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:47,630 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:47,630 INFO L371 AbstractCegarLoop]: === Iteration 12 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:47,630 INFO L82 PathProgramCache]: Analyzing trace with hash 561139669, now seen corresponding path program 1 times [2018-01-24 13:09:47,630 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:47,631 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:47,631 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:47,631 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:47,631 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:47,646 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:47,647 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:47,871 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:47,872 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:09:47,872 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-24 13:09:47,872 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:09:47,872 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-24 13:09:47,872 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-24 13:09:47,872 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2018-01-24 13:09:47,872 INFO L87 Difference]: Start difference. First operand 194 states and 226 transitions. Second operand 12 states. [2018-01-24 13:09:48,532 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:48,532 INFO L93 Difference]: Finished difference Result 211 states and 246 transitions. [2018-01-24 13:09:48,533 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-24 13:09:48,533 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 26 [2018-01-24 13:09:48,533 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:48,534 INFO L225 Difference]: With dead ends: 211 [2018-01-24 13:09:48,534 INFO L226 Difference]: Without dead ends: 210 [2018-01-24 13:09:48,534 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=144, Invalid=408, Unknown=0, NotChecked=0, Total=552 [2018-01-24 13:09:48,535 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 210 states. [2018-01-24 13:09:48,540 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 210 to 195. [2018-01-24 13:09:48,540 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195 states. [2018-01-24 13:09:48,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 228 transitions. [2018-01-24 13:09:48,541 INFO L78 Accepts]: Start accepts. Automaton has 195 states and 228 transitions. Word has length 26 [2018-01-24 13:09:48,541 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:48,541 INFO L432 AbstractCegarLoop]: Abstraction has 195 states and 228 transitions. [2018-01-24 13:09:48,541 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-24 13:09:48,541 INFO L276 IsEmpty]: Start isEmpty. Operand 195 states and 228 transitions. [2018-01-24 13:09:48,542 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-24 13:09:48,542 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:48,542 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:48,542 INFO L371 AbstractCegarLoop]: === Iteration 13 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:48,543 INFO L82 PathProgramCache]: Analyzing trace with hash 561139670, now seen corresponding path program 1 times [2018-01-24 13:09:48,543 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:48,544 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:48,544 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:48,544 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:48,544 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:48,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:48,562 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:49,141 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:49,141 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:09:49,141 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-01-24 13:09:49,141 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:09:49,142 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-24 13:09:49,142 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-24 13:09:49,142 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=128, Unknown=0, NotChecked=0, Total=156 [2018-01-24 13:09:49,142 INFO L87 Difference]: Start difference. First operand 195 states and 228 transitions. Second operand 13 states. [2018-01-24 13:09:49,880 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:49,880 INFO L93 Difference]: Finished difference Result 266 states and 294 transitions. [2018-01-24 13:09:49,881 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-24 13:09:49,881 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 26 [2018-01-24 13:09:49,881 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:49,882 INFO L225 Difference]: With dead ends: 266 [2018-01-24 13:09:49,883 INFO L226 Difference]: Without dead ends: 263 [2018-01-24 13:09:49,883 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 26 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 100 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=141, Invalid=561, Unknown=0, NotChecked=0, Total=702 [2018-01-24 13:09:49,883 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 263 states. [2018-01-24 13:09:49,888 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 263 to 199. [2018-01-24 13:09:49,889 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 199 states. [2018-01-24 13:09:49,889 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199 states to 199 states and 233 transitions. [2018-01-24 13:09:49,890 INFO L78 Accepts]: Start accepts. Automaton has 199 states and 233 transitions. Word has length 26 [2018-01-24 13:09:49,890 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:49,890 INFO L432 AbstractCegarLoop]: Abstraction has 199 states and 233 transitions. [2018-01-24 13:09:49,890 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-24 13:09:49,890 INFO L276 IsEmpty]: Start isEmpty. Operand 199 states and 233 transitions. [2018-01-24 13:09:49,891 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-24 13:09:49,891 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:49,891 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:49,891 INFO L371 AbstractCegarLoop]: === Iteration 14 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:49,891 INFO L82 PathProgramCache]: Analyzing trace with hash -106162311, now seen corresponding path program 1 times [2018-01-24 13:09:49,891 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:49,892 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:49,892 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:49,893 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:49,893 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:49,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:49,902 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:49,933 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:49,934 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:09:49,934 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:09:49,934 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:09:49,934 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:09:49,935 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:09:49,935 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:09:49,935 INFO L87 Difference]: Start difference. First operand 199 states and 233 transitions. Second operand 5 states. [2018-01-24 13:09:50,165 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:50,165 INFO L93 Difference]: Finished difference Result 293 states and 346 transitions. [2018-01-24 13:09:50,166 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:09:50,166 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2018-01-24 13:09:50,166 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:50,167 INFO L225 Difference]: With dead ends: 293 [2018-01-24 13:09:50,167 INFO L226 Difference]: Without dead ends: 292 [2018-01-24 13:09:50,168 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-01-24 13:09:50,168 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 292 states. [2018-01-24 13:09:50,175 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 292 to 198. [2018-01-24 13:09:50,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 198 states. [2018-01-24 13:09:50,177 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 198 states to 198 states and 231 transitions. [2018-01-24 13:09:50,177 INFO L78 Accepts]: Start accepts. Automaton has 198 states and 231 transitions. Word has length 26 [2018-01-24 13:09:50,177 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:50,178 INFO L432 AbstractCegarLoop]: Abstraction has 198 states and 231 transitions. [2018-01-24 13:09:50,178 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:09:50,178 INFO L276 IsEmpty]: Start isEmpty. Operand 198 states and 231 transitions. [2018-01-24 13:09:50,178 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 27 [2018-01-24 13:09:50,179 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:50,179 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:50,179 INFO L371 AbstractCegarLoop]: === Iteration 15 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:50,179 INFO L82 PathProgramCache]: Analyzing trace with hash -106162310, now seen corresponding path program 1 times [2018-01-24 13:09:50,179 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:50,180 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:50,180 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:50,180 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:50,180 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:50,190 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:50,191 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:50,241 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:50,242 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:09:50,242 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:09:50,242 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:09:50,242 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:09:50,243 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:09:50,243 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:09:50,243 INFO L87 Difference]: Start difference. First operand 198 states and 231 transitions. Second operand 5 states. [2018-01-24 13:09:50,737 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:50,738 INFO L93 Difference]: Finished difference Result 282 states and 334 transitions. [2018-01-24 13:09:50,738 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:09:50,738 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 26 [2018-01-24 13:09:50,738 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:50,739 INFO L225 Difference]: With dead ends: 282 [2018-01-24 13:09:50,739 INFO L226 Difference]: Without dead ends: 281 [2018-01-24 13:09:50,740 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-01-24 13:09:50,740 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 281 states. [2018-01-24 13:09:50,747 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 281 to 197. [2018-01-24 13:09:50,747 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 197 states. [2018-01-24 13:09:50,748 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 197 states to 197 states and 229 transitions. [2018-01-24 13:09:50,748 INFO L78 Accepts]: Start accepts. Automaton has 197 states and 229 transitions. Word has length 26 [2018-01-24 13:09:50,748 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:50,748 INFO L432 AbstractCegarLoop]: Abstraction has 197 states and 229 transitions. [2018-01-24 13:09:50,748 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:09:50,748 INFO L276 IsEmpty]: Start isEmpty. Operand 197 states and 229 transitions. [2018-01-24 13:09:50,749 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-24 13:09:50,749 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:50,749 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:50,749 INFO L371 AbstractCegarLoop]: === Iteration 16 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:50,749 INFO L82 PathProgramCache]: Analyzing trace with hash -1585416537, now seen corresponding path program 1 times [2018-01-24 13:09:50,749 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:50,750 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:50,750 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:50,750 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:50,750 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:50,760 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:50,761 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:50,871 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:50,871 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:09:50,871 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-24 13:09:50,872 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:09:50,872 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 13:09:50,872 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 13:09:50,872 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-01-24 13:09:50,873 INFO L87 Difference]: Start difference. First operand 197 states and 229 transitions. Second operand 9 states. [2018-01-24 13:09:51,366 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:51,366 INFO L93 Difference]: Finished difference Result 244 states and 286 transitions. [2018-01-24 13:09:51,366 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 13:09:51,366 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-01-24 13:09:51,367 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:51,367 INFO L225 Difference]: With dead ends: 244 [2018-01-24 13:09:51,368 INFO L226 Difference]: Without dead ends: 243 [2018-01-24 13:09:51,368 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=67, Invalid=143, Unknown=0, NotChecked=0, Total=210 [2018-01-24 13:09:51,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 243 states. [2018-01-24 13:09:51,376 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 243 to 196. [2018-01-24 13:09:51,376 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 196 states. [2018-01-24 13:09:51,377 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 227 transitions. [2018-01-24 13:09:51,377 INFO L78 Accepts]: Start accepts. Automaton has 196 states and 227 transitions. Word has length 29 [2018-01-24 13:09:51,378 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:51,378 INFO L432 AbstractCegarLoop]: Abstraction has 196 states and 227 transitions. [2018-01-24 13:09:51,378 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 13:09:51,378 INFO L276 IsEmpty]: Start isEmpty. Operand 196 states and 227 transitions. [2018-01-24 13:09:51,378 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-24 13:09:51,379 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:51,379 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:51,379 INFO L371 AbstractCegarLoop]: === Iteration 17 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:51,379 INFO L82 PathProgramCache]: Analyzing trace with hash -1585416536, now seen corresponding path program 1 times [2018-01-24 13:09:51,379 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:51,380 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:51,380 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:51,380 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:51,380 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:51,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:51,395 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:51,549 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:51,550 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:09:51,550 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-24 13:09:51,550 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:09:51,550 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 13:09:51,551 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 13:09:51,551 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-01-24 13:09:51,551 INFO L87 Difference]: Start difference. First operand 196 states and 227 transitions. Second operand 9 states. [2018-01-24 13:09:52,058 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:52,058 INFO L93 Difference]: Finished difference Result 243 states and 284 transitions. [2018-01-24 13:09:52,058 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 13:09:52,058 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-01-24 13:09:52,058 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:52,059 INFO L225 Difference]: With dead ends: 243 [2018-01-24 13:09:52,059 INFO L226 Difference]: Without dead ends: 242 [2018-01-24 13:09:52,060 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 15 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=67, Invalid=143, Unknown=0, NotChecked=0, Total=210 [2018-01-24 13:09:52,060 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 242 states. [2018-01-24 13:09:52,068 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 242 to 195. [2018-01-24 13:09:52,069 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 195 states. [2018-01-24 13:09:52,070 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 195 states to 195 states and 225 transitions. [2018-01-24 13:09:52,070 INFO L78 Accepts]: Start accepts. Automaton has 195 states and 225 transitions. Word has length 29 [2018-01-24 13:09:52,070 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:52,070 INFO L432 AbstractCegarLoop]: Abstraction has 195 states and 225 transitions. [2018-01-24 13:09:52,070 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 13:09:52,070 INFO L276 IsEmpty]: Start isEmpty. Operand 195 states and 225 transitions. [2018-01-24 13:09:52,071 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-24 13:09:52,071 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:52,071 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:52,071 INFO L371 AbstractCegarLoop]: === Iteration 18 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:52,072 INFO L82 PathProgramCache]: Analyzing trace with hash 2109118679, now seen corresponding path program 1 times [2018-01-24 13:09:52,072 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:52,072 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:52,073 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:52,073 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:52,073 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:52,083 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:52,084 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:52,116 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:52,117 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:09:52,117 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 13:09:52,117 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:09:52,117 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 13:09:52,117 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 13:09:52,117 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 13:09:52,118 INFO L87 Difference]: Start difference. First operand 195 states and 225 transitions. Second operand 4 states. [2018-01-24 13:09:52,220 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:52,221 INFO L93 Difference]: Finished difference Result 212 states and 243 transitions. [2018-01-24 13:09:52,221 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 13:09:52,221 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2018-01-24 13:09:52,221 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:52,222 INFO L225 Difference]: With dead ends: 212 [2018-01-24 13:09:52,223 INFO L226 Difference]: Without dead ends: 211 [2018-01-24 13:09:52,223 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:09:52,223 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 211 states. [2018-01-24 13:09:52,230 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 211 to 194. [2018-01-24 13:09:52,230 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-01-24 13:09:52,231 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 224 transitions. [2018-01-24 13:09:52,231 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 224 transitions. Word has length 30 [2018-01-24 13:09:52,231 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:52,231 INFO L432 AbstractCegarLoop]: Abstraction has 194 states and 224 transitions. [2018-01-24 13:09:52,232 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 13:09:52,232 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 224 transitions. [2018-01-24 13:09:52,232 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-24 13:09:52,232 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:52,232 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:52,232 INFO L371 AbstractCegarLoop]: === Iteration 19 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:52,233 INFO L82 PathProgramCache]: Analyzing trace with hash 2109118680, now seen corresponding path program 1 times [2018-01-24 13:09:52,233 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:52,234 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:52,234 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:52,234 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:52,234 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:52,243 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:52,244 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:52,302 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:52,303 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:09:52,303 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 13:09:52,303 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:09:52,303 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 13:09:52,303 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 13:09:52,304 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 13:09:52,304 INFO L87 Difference]: Start difference. First operand 194 states and 224 transitions. Second operand 4 states. [2018-01-24 13:09:52,561 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:52,561 INFO L93 Difference]: Finished difference Result 241 states and 274 transitions. [2018-01-24 13:09:52,561 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 13:09:52,561 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 30 [2018-01-24 13:09:52,561 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:52,562 INFO L225 Difference]: With dead ends: 241 [2018-01-24 13:09:52,562 INFO L226 Difference]: Without dead ends: 239 [2018-01-24 13:09:52,563 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:09:52,563 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239 states. [2018-01-24 13:09:52,567 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239 to 192. [2018-01-24 13:09:52,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192 states. [2018-01-24 13:09:52,568 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192 states to 192 states and 222 transitions. [2018-01-24 13:09:52,568 INFO L78 Accepts]: Start accepts. Automaton has 192 states and 222 transitions. Word has length 30 [2018-01-24 13:09:52,568 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:52,568 INFO L432 AbstractCegarLoop]: Abstraction has 192 states and 222 transitions. [2018-01-24 13:09:52,568 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 13:09:52,568 INFO L276 IsEmpty]: Start isEmpty. Operand 192 states and 222 transitions. [2018-01-24 13:09:52,569 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-24 13:09:52,569 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:52,569 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:52,569 INFO L371 AbstractCegarLoop]: === Iteration 20 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:52,569 INFO L82 PathProgramCache]: Analyzing trace with hash -160241763, now seen corresponding path program 1 times [2018-01-24 13:09:52,569 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:52,570 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:52,570 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:52,570 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:52,570 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:52,577 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:52,578 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:52,626 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:52,626 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:09:52,627 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:09:52,627 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:09:52,627 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:09:52,627 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:09:52,627 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:09:52,627 INFO L87 Difference]: Start difference. First operand 192 states and 222 transitions. Second operand 5 states. [2018-01-24 13:09:52,810 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:52,810 INFO L93 Difference]: Finished difference Result 284 states and 331 transitions. [2018-01-24 13:09:52,810 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:09:52,810 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2018-01-24 13:09:52,811 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:52,812 INFO L225 Difference]: With dead ends: 284 [2018-01-24 13:09:52,812 INFO L226 Difference]: Without dead ends: 283 [2018-01-24 13:09:52,812 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-01-24 13:09:52,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 283 states. [2018-01-24 13:09:52,820 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 283 to 191. [2018-01-24 13:09:52,820 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 191 states. [2018-01-24 13:09:52,821 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191 states to 191 states and 220 transitions. [2018-01-24 13:09:52,821 INFO L78 Accepts]: Start accepts. Automaton has 191 states and 220 transitions. Word has length 30 [2018-01-24 13:09:52,822 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:52,822 INFO L432 AbstractCegarLoop]: Abstraction has 191 states and 220 transitions. [2018-01-24 13:09:52,822 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:09:52,822 INFO L276 IsEmpty]: Start isEmpty. Operand 191 states and 220 transitions. [2018-01-24 13:09:52,822 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-24 13:09:52,822 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:52,822 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:52,823 INFO L371 AbstractCegarLoop]: === Iteration 21 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:52,823 INFO L82 PathProgramCache]: Analyzing trace with hash -160241762, now seen corresponding path program 1 times [2018-01-24 13:09:52,823 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:52,824 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:52,824 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:52,824 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:52,824 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:52,833 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:52,834 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:52,911 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:52,911 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:09:52,911 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:09:52,911 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:09:52,912 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:09:52,912 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:09:52,912 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:09:52,912 INFO L87 Difference]: Start difference. First operand 191 states and 220 transitions. Second operand 5 states. [2018-01-24 13:09:53,157 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:53,158 INFO L93 Difference]: Finished difference Result 273 states and 319 transitions. [2018-01-24 13:09:53,158 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:09:53,158 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2018-01-24 13:09:53,158 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:53,159 INFO L225 Difference]: With dead ends: 273 [2018-01-24 13:09:53,159 INFO L226 Difference]: Without dead ends: 272 [2018-01-24 13:09:53,159 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-01-24 13:09:53,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 272 states. [2018-01-24 13:09:53,164 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 272 to 190. [2018-01-24 13:09:53,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-01-24 13:09:53,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 218 transitions. [2018-01-24 13:09:53,165 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 218 transitions. Word has length 30 [2018-01-24 13:09:53,165 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:53,165 INFO L432 AbstractCegarLoop]: Abstraction has 190 states and 218 transitions. [2018-01-24 13:09:53,165 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:09:53,165 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 218 transitions. [2018-01-24 13:09:53,165 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-24 13:09:53,165 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:53,166 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:53,166 INFO L371 AbstractCegarLoop]: === Iteration 22 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:53,166 INFO L82 PathProgramCache]: Analyzing trace with hash 958169774, now seen corresponding path program 1 times [2018-01-24 13:09:53,166 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:53,166 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:53,166 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:53,167 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:53,167 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:53,175 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:53,175 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:53,269 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:53,269 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:09:53,269 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 13:09:53,269 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:09:53,270 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 13:09:53,270 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 13:09:53,270 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-01-24 13:09:53,270 INFO L87 Difference]: Start difference. First operand 190 states and 218 transitions. Second operand 4 states. [2018-01-24 13:09:53,471 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:53,471 INFO L93 Difference]: Finished difference Result 194 states and 223 transitions. [2018-01-24 13:09:53,472 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 13:09:53,473 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 31 [2018-01-24 13:09:53,473 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:53,473 INFO L225 Difference]: With dead ends: 194 [2018-01-24 13:09:53,474 INFO L226 Difference]: Without dead ends: 187 [2018-01-24 13:09:53,474 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-01-24 13:09:53,474 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 187 states. [2018-01-24 13:09:53,478 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 187 to 182. [2018-01-24 13:09:53,478 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-01-24 13:09:53,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 210 transitions. [2018-01-24 13:09:53,479 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 210 transitions. Word has length 31 [2018-01-24 13:09:53,479 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:53,479 INFO L432 AbstractCegarLoop]: Abstraction has 182 states and 210 transitions. [2018-01-24 13:09:53,479 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 13:09:53,479 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 210 transitions. [2018-01-24 13:09:53,479 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-24 13:09:53,479 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:53,480 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:53,480 INFO L371 AbstractCegarLoop]: === Iteration 23 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:53,480 INFO L82 PathProgramCache]: Analyzing trace with hash 53737817, now seen corresponding path program 1 times [2018-01-24 13:09:53,480 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:53,481 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:53,481 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:53,481 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:53,481 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:53,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:53,488 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:53,570 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:53,570 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:09:53,571 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 13:09:53,571 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:09:53,571 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 13:09:53,571 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 13:09:53,571 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 13:09:53,571 INFO L87 Difference]: Start difference. First operand 182 states and 210 transitions. Second operand 4 states. [2018-01-24 13:09:53,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:53,686 INFO L93 Difference]: Finished difference Result 191 states and 220 transitions. [2018-01-24 13:09:53,686 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 13:09:53,686 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 32 [2018-01-24 13:09:53,687 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:53,688 INFO L225 Difference]: With dead ends: 191 [2018-01-24 13:09:53,688 INFO L226 Difference]: Without dead ends: 190 [2018-01-24 13:09:53,688 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:09:53,689 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 190 states. [2018-01-24 13:09:53,695 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 190 to 181. [2018-01-24 13:09:53,696 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181 states. [2018-01-24 13:09:53,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 209 transitions. [2018-01-24 13:09:53,697 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 209 transitions. Word has length 32 [2018-01-24 13:09:53,697 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:53,697 INFO L432 AbstractCegarLoop]: Abstraction has 181 states and 209 transitions. [2018-01-24 13:09:53,697 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 13:09:53,697 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 209 transitions. [2018-01-24 13:09:53,697 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-24 13:09:53,698 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:53,698 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:53,698 INFO L371 AbstractCegarLoop]: === Iteration 24 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:53,698 INFO L82 PathProgramCache]: Analyzing trace with hash 53737818, now seen corresponding path program 1 times [2018-01-24 13:09:53,698 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:53,699 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:53,699 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:53,699 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:53,699 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:53,709 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:53,710 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:53,752 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:53,752 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:09:53,752 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 13:09:53,752 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:09:53,753 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 13:09:53,753 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 13:09:53,753 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 13:09:53,753 INFO L87 Difference]: Start difference. First operand 181 states and 209 transitions. Second operand 4 states. [2018-01-24 13:09:53,932 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:53,933 INFO L93 Difference]: Finished difference Result 219 states and 249 transitions. [2018-01-24 13:09:53,933 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 13:09:53,933 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 32 [2018-01-24 13:09:53,933 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:53,934 INFO L225 Difference]: With dead ends: 219 [2018-01-24 13:09:53,935 INFO L226 Difference]: Without dead ends: 217 [2018-01-24 13:09:53,935 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:09:53,935 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 217 states. [2018-01-24 13:09:53,942 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 217 to 179. [2018-01-24 13:09:53,942 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-01-24 13:09:53,943 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 207 transitions. [2018-01-24 13:09:53,943 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 207 transitions. Word has length 32 [2018-01-24 13:09:53,944 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:53,944 INFO L432 AbstractCegarLoop]: Abstraction has 179 states and 207 transitions. [2018-01-24 13:09:53,944 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 13:09:53,944 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 207 transitions. [2018-01-24 13:09:53,944 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-24 13:09:53,944 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:53,944 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:53,945 INFO L371 AbstractCegarLoop]: === Iteration 25 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:53,945 INFO L82 PathProgramCache]: Analyzing trace with hash 611367904, now seen corresponding path program 1 times [2018-01-24 13:09:53,945 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:53,946 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:53,946 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:53,946 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:53,946 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:53,958 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:53,959 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:54,105 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:54,105 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:09:54,105 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 13:09:54,105 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:09:54,105 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 13:09:54,106 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 13:09:54,106 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:09:54,106 INFO L87 Difference]: Start difference. First operand 179 states and 207 transitions. Second operand 10 states. [2018-01-24 13:09:54,634 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:54,634 INFO L93 Difference]: Finished difference Result 228 states and 265 transitions. [2018-01-24 13:09:54,634 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-24 13:09:54,634 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 32 [2018-01-24 13:09:54,634 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:54,635 INFO L225 Difference]: With dead ends: 228 [2018-01-24 13:09:54,635 INFO L226 Difference]: Without dead ends: 227 [2018-01-24 13:09:54,636 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=96, Invalid=210, Unknown=0, NotChecked=0, Total=306 [2018-01-24 13:09:54,636 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 227 states. [2018-01-24 13:09:54,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 227 to 178. [2018-01-24 13:09:54,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-01-24 13:09:54,641 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 205 transitions. [2018-01-24 13:09:54,641 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 205 transitions. Word has length 32 [2018-01-24 13:09:54,641 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:54,641 INFO L432 AbstractCegarLoop]: Abstraction has 178 states and 205 transitions. [2018-01-24 13:09:54,641 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 13:09:54,641 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 205 transitions. [2018-01-24 13:09:54,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-24 13:09:54,641 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:54,642 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:54,642 INFO L371 AbstractCegarLoop]: === Iteration 26 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:54,642 INFO L82 PathProgramCache]: Analyzing trace with hash 611367905, now seen corresponding path program 1 times [2018-01-24 13:09:54,642 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:54,642 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:54,642 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:54,643 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:54,643 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:54,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:54,652 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:54,807 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:54,807 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:09:54,808 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 13:09:54,808 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:09:54,808 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 13:09:54,808 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 13:09:54,808 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:09:54,808 INFO L87 Difference]: Start difference. First operand 178 states and 205 transitions. Second operand 10 states. [2018-01-24 13:09:55,180 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:55,180 INFO L93 Difference]: Finished difference Result 223 states and 258 transitions. [2018-01-24 13:09:55,180 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 13:09:55,180 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 32 [2018-01-24 13:09:55,180 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:55,181 INFO L225 Difference]: With dead ends: 223 [2018-01-24 13:09:55,181 INFO L226 Difference]: Without dead ends: 222 [2018-01-24 13:09:55,182 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=82, Invalid=190, Unknown=0, NotChecked=0, Total=272 [2018-01-24 13:09:55,182 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2018-01-24 13:09:55,186 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 177. [2018-01-24 13:09:55,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-01-24 13:09:55,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 203 transitions. [2018-01-24 13:09:55,187 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 203 transitions. Word has length 32 [2018-01-24 13:09:55,187 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:55,187 INFO L432 AbstractCegarLoop]: Abstraction has 177 states and 203 transitions. [2018-01-24 13:09:55,187 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 13:09:55,187 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 203 transitions. [2018-01-24 13:09:55,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-24 13:09:55,188 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:55,188 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:55,188 INFO L371 AbstractCegarLoop]: === Iteration 27 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:55,188 INFO L82 PathProgramCache]: Analyzing trace with hash 1665872513, now seen corresponding path program 1 times [2018-01-24 13:09:55,188 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:55,189 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:55,189 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:55,189 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:55,189 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:55,198 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:55,199 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:55,275 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:55,301 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:09:55,302 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:09:55,302 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:09:55,302 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:09:55,302 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:09:55,302 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:09:55,303 INFO L87 Difference]: Start difference. First operand 177 states and 203 transitions. Second operand 5 states. [2018-01-24 13:09:55,434 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:55,434 INFO L93 Difference]: Finished difference Result 214 states and 245 transitions. [2018-01-24 13:09:55,434 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 13:09:55,434 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 33 [2018-01-24 13:09:55,435 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:55,435 INFO L225 Difference]: With dead ends: 214 [2018-01-24 13:09:55,435 INFO L226 Difference]: Without dead ends: 207 [2018-01-24 13:09:55,436 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-01-24 13:09:55,436 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 207 states. [2018-01-24 13:09:55,440 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 207 to 155. [2018-01-24 13:09:55,441 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155 states. [2018-01-24 13:09:55,441 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 175 transitions. [2018-01-24 13:09:55,441 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 175 transitions. Word has length 33 [2018-01-24 13:09:55,441 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:55,441 INFO L432 AbstractCegarLoop]: Abstraction has 155 states and 175 transitions. [2018-01-24 13:09:55,441 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:09:55,441 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 175 transitions. [2018-01-24 13:09:55,442 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-24 13:09:55,442 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:55,442 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:55,442 INFO L371 AbstractCegarLoop]: === Iteration 28 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:55,442 INFO L82 PathProgramCache]: Analyzing trace with hash 1679203151, now seen corresponding path program 1 times [2018-01-24 13:09:55,442 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:55,443 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:55,443 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:55,443 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:55,443 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:55,451 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:55,452 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:55,570 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:55,570 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:09:55,570 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:09:55,600 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:55,600 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:09:55,633 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:55,641 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:09:55,700 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-24 13:09:55,712 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 13:09:55,713 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:09:55,716 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:09:55,740 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-24 13:09:55,748 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 13:09:55,749 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:09:55,755 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:09:55,773 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:09:55,774 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:23, output treesize:15 [2018-01-24 13:09:55,794 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 21 [2018-01-24 13:09:55,821 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:09:55,825 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-01-24 13:09:55,825 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:09:55,840 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:09:55,885 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 21 [2018-01-24 13:09:55,901 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:09:55,903 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-01-24 13:09:55,904 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:09:55,917 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:09:55,949 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:09:55,949 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:51, output treesize:15 [2018-01-24 13:09:56,006 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2018-01-24 13:09:56,026 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-01-24 13:09:56,027 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:09:56,035 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:09:56,060 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 16 [2018-01-24 13:09:56,079 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-01-24 13:09:56,080 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:09:56,085 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:09:56,102 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:09:56,103 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 6 variables, input treesize:39, output treesize:7 [2018-01-24 13:09:56,127 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:56,127 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:09:56,206 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:56,228 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:09:56,228 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:09:56,239 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:56,239 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:09:56,294 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:56,301 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:09:56,376 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-24 13:09:56,378 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 13:09:56,378 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:09:56,383 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:09:56,390 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-24 13:09:56,393 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 13:09:56,393 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:09:56,394 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:09:56,398 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:09:56,398 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:30, output treesize:22 [2018-01-24 13:09:56,422 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-01-24 13:09:56,424 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:09:56,426 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-01-24 13:09:56,426 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:09:56,431 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:09:56,457 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-01-24 13:09:56,461 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:09:56,461 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-01-24 13:09:56,462 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:09:56,466 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:09:56,473 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:09:56,473 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:48, output treesize:28 [2018-01-24 13:09:56,488 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 17 [2018-01-24 13:09:56,490 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 8 [2018-01-24 13:09:56,491 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:09:56,492 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:09:56,502 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 11 [2018-01-24 13:09:56,504 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 3 [2018-01-24 13:09:56,505 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:09:56,506 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:09:56,509 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:09:56,509 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:37, output treesize:7 [2018-01-24 13:09:56,516 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:56,516 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:09:56,556 WARN L307 Elim1Store]: Array PQE input equivalent to true [2018-01-24 13:09:56,556 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:09:56,558 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:09:56,558 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 5 variables, input treesize:31, output treesize:1 [2018-01-24 13:09:56,564 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 1 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:56,566 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:09:56,566 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 10, 5] total 11 [2018-01-24 13:09:56,566 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:09:56,567 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:09:56,567 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:09:56,567 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-01-24 13:09:56,567 INFO L87 Difference]: Start difference. First operand 155 states and 175 transitions. Second operand 5 states. [2018-01-24 13:09:56,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:56,686 INFO L93 Difference]: Finished difference Result 205 states and 228 transitions. [2018-01-24 13:09:56,686 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 13:09:56,686 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 33 [2018-01-24 13:09:56,687 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:56,687 INFO L225 Difference]: With dead ends: 205 [2018-01-24 13:09:56,688 INFO L226 Difference]: Without dead ends: 169 [2018-01-24 13:09:56,688 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 110 SyntacticMatches, 17 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2018-01-24 13:09:56,689 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-01-24 13:09:56,698 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 157. [2018-01-24 13:09:56,699 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-01-24 13:09:56,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 177 transitions. [2018-01-24 13:09:56,699 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 177 transitions. Word has length 33 [2018-01-24 13:09:56,700 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:56,700 INFO L432 AbstractCegarLoop]: Abstraction has 157 states and 177 transitions. [2018-01-24 13:09:56,700 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:09:56,700 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 177 transitions. [2018-01-24 13:09:56,700 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-24 13:09:56,700 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:56,701 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:56,701 INFO L371 AbstractCegarLoop]: === Iteration 29 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:56,701 INFO L82 PathProgramCache]: Analyzing trace with hash -2053594356, now seen corresponding path program 1 times [2018-01-24 13:09:56,701 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:56,702 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:56,702 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:56,702 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:56,702 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:56,714 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:56,715 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:56,847 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:56,848 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:09:56,848 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-24 13:09:56,848 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:09:56,848 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 13:09:56,848 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 13:09:56,848 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-01-24 13:09:56,849 INFO L87 Difference]: Start difference. First operand 157 states and 177 transitions. Second operand 9 states. [2018-01-24 13:09:57,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:57,169 INFO L93 Difference]: Finished difference Result 165 states and 187 transitions. [2018-01-24 13:09:57,169 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 13:09:57,169 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 33 [2018-01-24 13:09:57,169 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:57,170 INFO L225 Difference]: With dead ends: 165 [2018-01-24 13:09:57,170 INFO L226 Difference]: Without dead ends: 164 [2018-01-24 13:09:57,170 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=67, Invalid=143, Unknown=0, NotChecked=0, Total=210 [2018-01-24 13:09:57,171 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-01-24 13:09:57,177 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 156. [2018-01-24 13:09:57,178 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156 states. [2018-01-24 13:09:57,178 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 176 transitions. [2018-01-24 13:09:57,179 INFO L78 Accepts]: Start accepts. Automaton has 156 states and 176 transitions. Word has length 33 [2018-01-24 13:09:57,179 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:57,179 INFO L432 AbstractCegarLoop]: Abstraction has 156 states and 176 transitions. [2018-01-24 13:09:57,179 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 13:09:57,179 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 176 transitions. [2018-01-24 13:09:57,180 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-24 13:09:57,180 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:57,180 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:57,180 INFO L371 AbstractCegarLoop]: === Iteration 30 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:57,180 INFO L82 PathProgramCache]: Analyzing trace with hash -2053594355, now seen corresponding path program 1 times [2018-01-24 13:09:57,180 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:57,181 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:57,181 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:57,181 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:57,181 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:57,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:57,192 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:57,325 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:57,325 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:09:57,326 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-24 13:09:57,326 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:09:57,326 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 13:09:57,326 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 13:09:57,326 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-01-24 13:09:57,326 INFO L87 Difference]: Start difference. First operand 156 states and 176 transitions. Second operand 9 states. [2018-01-24 13:09:57,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:09:57,616 INFO L93 Difference]: Finished difference Result 164 states and 186 transitions. [2018-01-24 13:09:57,616 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 13:09:57,617 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 33 [2018-01-24 13:09:57,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:09:57,618 INFO L225 Difference]: With dead ends: 164 [2018-01-24 13:09:57,618 INFO L226 Difference]: Without dead ends: 163 [2018-01-24 13:09:57,618 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=67, Invalid=143, Unknown=0, NotChecked=0, Total=210 [2018-01-24 13:09:57,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-01-24 13:09:57,637 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 155. [2018-01-24 13:09:57,637 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155 states. [2018-01-24 13:09:57,638 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 175 transitions. [2018-01-24 13:09:57,638 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 175 transitions. Word has length 33 [2018-01-24 13:09:57,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:09:57,639 INFO L432 AbstractCegarLoop]: Abstraction has 155 states and 175 transitions. [2018-01-24 13:09:57,639 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 13:09:57,639 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 175 transitions. [2018-01-24 13:09:57,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 13:09:57,639 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:09:57,639 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:09:57,640 INFO L371 AbstractCegarLoop]: === Iteration 31 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:09:57,640 INFO L82 PathProgramCache]: Analyzing trace with hash 515690238, now seen corresponding path program 1 times [2018-01-24 13:09:57,640 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:09:57,640 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:57,640 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:57,640 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:09:57,641 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:09:57,652 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:57,653 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:09:58,012 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:58,012 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:09:58,012 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:09:58,017 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:58,017 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:09:58,034 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:09:58,037 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:09:58,145 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-24 13:09:58,147 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-24 13:09:58,147 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:09:58,155 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:09:58,176 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:09:58,176 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:46, output treesize:57 [2018-01-24 13:09:58,305 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 60 treesize of output 50 [2018-01-24 13:09:58,317 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 50 treesize of output 39 [2018-01-24 13:09:58,320 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-01-24 13:09:58,343 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-01-24 13:09:58,376 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 2 xjuncts. [2018-01-24 13:09:58,376 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:70, output treesize:72 [2018-01-24 13:09:58,631 WARN L1029 $PredicateComparison]: unable to prove that (exists ((main_~n~4.base Int) (main_~st~4.base Int)) (let ((.cse0 (store |c_old(#valid)| main_~n~4.base 1))) (and (= 0 (select .cse0 main_~st~4.base)) (not (= 0 main_~n~4.base)) (= |c_#valid| (store (store .cse0 main_~st~4.base 0) main_~n~4.base 0)) (not (= main_~st~4.base 0)) (= 0 (select |c_old(#valid)| main_~n~4.base))))) is different from true [2018-01-24 13:09:58,648 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 2 not checked. [2018-01-24 13:09:58,648 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:09:58,674 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-01-24 13:09:58,682 INFO L477 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 10 treesize of output 14 [2018-01-24 13:09:58,683 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:09:58,687 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:09:58,730 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-01-24 13:09:58,730 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:52, output treesize:33 [2018-01-24 13:09:58,939 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-01-24 13:09:58,949 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 3 [2018-01-24 13:09:58,949 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:09:58,954 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-01-24 13:09:58,956 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 15 [2018-01-24 13:09:58,965 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 1 [2018-01-24 13:09:58,965 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:09:58,966 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:09:58,979 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 20 [2018-01-24 13:09:58,988 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 9 [2018-01-24 13:09:58,989 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:09:58,997 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: 2 dim-0 vars, and 3 xjuncts. [2018-01-24 13:09:59,007 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-01-24 13:09:59,008 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 2 variables, input treesize:87, output treesize:25 [2018-01-24 13:09:59,308 WARN L1007 $PredicateComparison]: unable to prove that (forall ((v_prenex_6 Int) (|v_main_#t~malloc0.base_3| Int)) (let ((.cse0 (store |c_#valid| |v_main_#t~malloc0.base_3| 1))) (or (not (= 0 (select |c_#valid| |v_main_#t~malloc0.base_3|))) (= 0 |v_main_#t~malloc0.base_3|) (not (= 0 (select .cse0 v_prenex_6))) (= v_prenex_6 0) (= |c_old(#valid)| (store (store .cse0 v_prenex_6 0) |v_main_#t~malloc0.base_3| 0))))) is different from false [2018-01-24 13:09:59,316 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:09:59,336 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:09:59,337 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 13:09:59,349 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:09:59,349 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:10:08,562 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:10:08,601 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:10:08,604 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 13:10:08,604 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:10:08,606 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:08,606 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-24 13:10:08,815 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-24 13:10:08,816 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 13:10:08,817 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:10:08,818 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:08,827 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:08,827 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:50, output treesize:46 [2018-01-24 13:10:08,894 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-01-24 13:10:08,897 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:10:08,898 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-01-24 13:10:08,898 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:10:08,903 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:08,916 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:08,916 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:59, output treesize:70 [2018-01-24 13:10:09,036 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 45 [2018-01-24 13:10:09,039 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 27 [2018-01-24 13:10:09,039 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:10:09,045 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:09,053 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:09,054 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:66, output treesize:36 [2018-01-24 13:10:09,324 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:10:09,324 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:10:09,368 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:10:09,369 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 14 [2018-01-24 13:10:09,373 INFO L477 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 1 case distinctions, treesize of input 10 treesize of output 14 [2018-01-24 13:10:09,374 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:10:09,375 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:09,391 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 3 xjuncts. [2018-01-24 13:10:09,391 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:66, output treesize:38 [2018-01-24 13:10:09,730 WARN L1007 $PredicateComparison]: unable to prove that (forall ((v_prenex_6 Int) (|v_main_#t~malloc0.base_4| Int)) (let ((.cse0 (store |c_#valid| |v_main_#t~malloc0.base_4| 1))) (or (not (= (select .cse0 v_prenex_6) 0)) (= 0 |v_main_#t~malloc0.base_4|) (not (= 0 (select |c_#valid| |v_main_#t~malloc0.base_4|))) (= |c_old(#valid)| (store (store .cse0 v_prenex_6 0) |v_main_#t~malloc0.base_4| 0)) (= v_prenex_6 0)))) is different from false [2018-01-24 13:10:09,740 WARN L1007 $PredicateComparison]: unable to prove that (forall ((v_prenex_6 Int) (|v_main_#t~malloc0.base_4| Int)) (let ((.cse0 (store |c_#valid| |v_main_#t~malloc0.base_4| 1))) (or (not (= (select .cse0 v_prenex_6) 0)) (= 0 |v_main_#t~malloc0.base_4|) (= |c_#valid| (store (store .cse0 v_prenex_6 0) |v_main_#t~malloc0.base_4| 0)) (not (= 0 (select |c_#valid| |v_main_#t~malloc0.base_4|))) (= v_prenex_6 0)))) is different from false [2018-01-24 13:10:09,752 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:10:09,755 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 13:10:09,755 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 13, 14, 14, 13] total 56 [2018-01-24 13:10:09,755 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 13:10:09,755 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-24 13:10:09,756 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-24 13:10:09,756 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=201, Invalid=2648, Unknown=25, NotChecked=318, Total=3192 [2018-01-24 13:10:09,757 INFO L87 Difference]: Start difference. First operand 155 states and 175 transitions. Second operand 27 states. [2018-01-24 13:10:11,948 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:10:11,948 INFO L93 Difference]: Finished difference Result 185 states and 207 transitions. [2018-01-24 13:10:11,949 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-24 13:10:11,950 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 34 [2018-01-24 13:10:11,950 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:10:11,951 INFO L225 Difference]: With dead ends: 185 [2018-01-24 13:10:11,951 INFO L226 Difference]: Without dead ends: 179 [2018-01-24 13:10:11,952 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 163 GetRequests, 87 SyntacticMatches, 8 SemanticMatches, 68 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 1219 ImplicationChecksByTransitivity, 3.3s TimeCoverageRelationStatistics Valid=412, Invalid=3997, Unknown=25, NotChecked=396, Total=4830 [2018-01-24 13:10:11,953 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-01-24 13:10:11,962 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 171. [2018-01-24 13:10:11,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2018-01-24 13:10:11,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 192 transitions. [2018-01-24 13:10:11,963 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 192 transitions. Word has length 34 [2018-01-24 13:10:11,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:10:11,964 INFO L432 AbstractCegarLoop]: Abstraction has 171 states and 192 transitions. [2018-01-24 13:10:11,964 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-24 13:10:11,964 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 192 transitions. [2018-01-24 13:10:11,964 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 13:10:11,964 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:10:11,965 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:10:11,965 INFO L371 AbstractCegarLoop]: === Iteration 32 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:10:11,965 INFO L82 PathProgramCache]: Analyzing trace with hash 483224159, now seen corresponding path program 1 times [2018-01-24 13:10:11,965 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:10:11,966 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:10:11,966 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:10:11,966 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:10:11,966 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:10:11,980 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:10:11,981 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:10:12,586 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:10:12,587 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:10:12,587 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [] total 15 [2018-01-24 13:10:12,587 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:10:12,587 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-24 13:10:12,587 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-24 13:10:12,587 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=206, Unknown=0, NotChecked=0, Total=240 [2018-01-24 13:10:12,588 INFO L87 Difference]: Start difference. First operand 171 states and 192 transitions. Second operand 16 states. [2018-01-24 13:10:13,933 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:10:13,933 INFO L93 Difference]: Finished difference Result 277 states and 308 transitions. [2018-01-24 13:10:13,933 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-24 13:10:13,934 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 34 [2018-01-24 13:10:13,934 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:10:13,935 INFO L225 Difference]: With dead ends: 277 [2018-01-24 13:10:13,935 INFO L226 Difference]: Without dead ends: 275 [2018-01-24 13:10:13,935 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 187 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=194, Invalid=1066, Unknown=0, NotChecked=0, Total=1260 [2018-01-24 13:10:13,936 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 275 states. [2018-01-24 13:10:13,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 275 to 186. [2018-01-24 13:10:13,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-01-24 13:10:13,947 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 208 transitions. [2018-01-24 13:10:13,947 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 208 transitions. Word has length 34 [2018-01-24 13:10:13,948 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:10:13,948 INFO L432 AbstractCegarLoop]: Abstraction has 186 states and 208 transitions. [2018-01-24 13:10:13,948 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-24 13:10:13,948 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 208 transitions. [2018-01-24 13:10:13,948 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 13:10:13,949 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:10:13,949 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:10:13,949 INFO L371 AbstractCegarLoop]: === Iteration 33 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:10:13,949 INFO L82 PathProgramCache]: Analyzing trace with hash -1115187100, now seen corresponding path program 1 times [2018-01-24 13:10:13,949 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:10:13,950 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:10:13,950 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:10:13,950 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:10:13,950 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:10:13,961 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:10:13,961 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:10:14,112 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:10:14,113 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:10:14,113 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 13:10:14,113 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:10:14,113 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 13:10:14,114 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 13:10:14,114 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=71, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:10:14,114 INFO L87 Difference]: Start difference. First operand 186 states and 208 transitions. Second operand 10 states. [2018-01-24 13:10:14,710 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:10:14,711 INFO L93 Difference]: Finished difference Result 194 states and 218 transitions. [2018-01-24 13:10:14,711 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-24 13:10:14,711 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 36 [2018-01-24 13:10:14,711 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:10:14,712 INFO L225 Difference]: With dead ends: 194 [2018-01-24 13:10:14,712 INFO L226 Difference]: Without dead ends: 193 [2018-01-24 13:10:14,712 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 20 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 34 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=117, Invalid=263, Unknown=0, NotChecked=0, Total=380 [2018-01-24 13:10:14,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 193 states. [2018-01-24 13:10:14,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 193 to 185. [2018-01-24 13:10:14,719 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 185 states. [2018-01-24 13:10:14,719 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 207 transitions. [2018-01-24 13:10:14,719 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 207 transitions. Word has length 36 [2018-01-24 13:10:14,720 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:10:14,720 INFO L432 AbstractCegarLoop]: Abstraction has 185 states and 207 transitions. [2018-01-24 13:10:14,720 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 13:10:14,720 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 207 transitions. [2018-01-24 13:10:14,720 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 13:10:14,720 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:10:14,720 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:10:14,720 INFO L371 AbstractCegarLoop]: === Iteration 34 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:10:14,721 INFO L82 PathProgramCache]: Analyzing trace with hash -1115187099, now seen corresponding path program 1 times [2018-01-24 13:10:14,721 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:10:14,721 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:10:14,721 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:10:14,721 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:10:14,721 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:10:14,730 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:10:14,731 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:10:15,181 WARN L146 SmtUtils]: Spent 129ms on a formula simplification. DAG size of input: 47 DAG size of output 24 [2018-01-24 13:10:15,302 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:10:15,302 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:10:15,302 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 13:10:15,302 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:10:15,302 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 13:10:15,302 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 13:10:15,303 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=68, Unknown=0, NotChecked=0, Total=90 [2018-01-24 13:10:15,303 INFO L87 Difference]: Start difference. First operand 185 states and 207 transitions. Second operand 10 states. [2018-01-24 13:10:15,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:10:15,818 INFO L93 Difference]: Finished difference Result 193 states and 217 transitions. [2018-01-24 13:10:15,818 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 13:10:15,819 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 36 [2018-01-24 13:10:15,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:10:15,819 INFO L225 Difference]: With dead ends: 193 [2018-01-24 13:10:15,819 INFO L226 Difference]: Without dead ends: 192 [2018-01-24 13:10:15,820 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 3 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=83, Invalid=189, Unknown=0, NotChecked=0, Total=272 [2018-01-24 13:10:15,820 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 192 states. [2018-01-24 13:10:15,825 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 192 to 184. [2018-01-24 13:10:15,826 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-01-24 13:10:15,826 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 206 transitions. [2018-01-24 13:10:15,826 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 206 transitions. Word has length 36 [2018-01-24 13:10:15,826 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:10:15,826 INFO L432 AbstractCegarLoop]: Abstraction has 184 states and 206 transitions. [2018-01-24 13:10:15,826 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 13:10:15,827 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 206 transitions. [2018-01-24 13:10:15,827 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-24 13:10:15,827 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:10:15,827 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:10:15,827 INFO L371 AbstractCegarLoop]: === Iteration 35 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:10:15,827 INFO L82 PathProgramCache]: Analyzing trace with hash 896049480, now seen corresponding path program 1 times [2018-01-24 13:10:15,827 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:10:15,828 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:10:15,828 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:10:15,828 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:10:15,828 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:10:15,840 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:10:15,841 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:10:15,941 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:10:15,942 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:10:15,942 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 13:10:15,942 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:10:15,942 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 13:10:15,942 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 13:10:15,943 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:10:15,943 INFO L87 Difference]: Start difference. First operand 184 states and 206 transitions. Second operand 7 states. [2018-01-24 13:10:16,211 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:10:16,211 INFO L93 Difference]: Finished difference Result 204 states and 227 transitions. [2018-01-24 13:10:16,211 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-24 13:10:16,211 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 39 [2018-01-24 13:10:16,211 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:10:16,212 INFO L225 Difference]: With dead ends: 204 [2018-01-24 13:10:16,212 INFO L226 Difference]: Without dead ends: 202 [2018-01-24 13:10:16,212 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=45, Invalid=87, Unknown=0, NotChecked=0, Total=132 [2018-01-24 13:10:16,213 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 202 states. [2018-01-24 13:10:16,218 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 202 to 191. [2018-01-24 13:10:16,219 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 191 states. [2018-01-24 13:10:16,219 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 191 states to 191 states and 217 transitions. [2018-01-24 13:10:16,219 INFO L78 Accepts]: Start accepts. Automaton has 191 states and 217 transitions. Word has length 39 [2018-01-24 13:10:16,219 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:10:16,219 INFO L432 AbstractCegarLoop]: Abstraction has 191 states and 217 transitions. [2018-01-24 13:10:16,219 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 13:10:16,219 INFO L276 IsEmpty]: Start isEmpty. Operand 191 states and 217 transitions. [2018-01-24 13:10:16,220 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-24 13:10:16,220 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:10:16,220 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:10:16,220 INFO L371 AbstractCegarLoop]: === Iteration 36 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:10:16,220 INFO L82 PathProgramCache]: Analyzing trace with hash 896049481, now seen corresponding path program 1 times [2018-01-24 13:10:16,220 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:10:16,221 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:10:16,221 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:10:16,221 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:10:16,221 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:10:16,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:10:16,231 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:10:16,299 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:10:16,300 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:10:16,300 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:10:16,300 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:10:16,300 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:10:16,300 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:10:16,300 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:10:16,301 INFO L87 Difference]: Start difference. First operand 191 states and 217 transitions. Second operand 5 states. [2018-01-24 13:10:16,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:10:16,467 INFO L93 Difference]: Finished difference Result 249 states and 275 transitions. [2018-01-24 13:10:16,467 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 13:10:16,467 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 39 [2018-01-24 13:10:16,468 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:10:16,468 INFO L225 Difference]: With dead ends: 249 [2018-01-24 13:10:16,468 INFO L226 Difference]: Without dead ends: 246 [2018-01-24 13:10:16,469 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:10:16,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246 states. [2018-01-24 13:10:16,479 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246 to 193. [2018-01-24 13:10:16,480 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193 states. [2018-01-24 13:10:16,480 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193 states to 193 states and 217 transitions. [2018-01-24 13:10:16,481 INFO L78 Accepts]: Start accepts. Automaton has 193 states and 217 transitions. Word has length 39 [2018-01-24 13:10:16,481 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:10:16,481 INFO L432 AbstractCegarLoop]: Abstraction has 193 states and 217 transitions. [2018-01-24 13:10:16,481 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:10:16,481 INFO L276 IsEmpty]: Start isEmpty. Operand 193 states and 217 transitions. [2018-01-24 13:10:16,482 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-24 13:10:16,482 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:10:16,482 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:10:16,482 INFO L371 AbstractCegarLoop]: === Iteration 37 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:10:16,482 INFO L82 PathProgramCache]: Analyzing trace with hash 1751566696, now seen corresponding path program 1 times [2018-01-24 13:10:16,482 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:10:16,483 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:10:16,483 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:10:16,483 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:10:16,484 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:10:16,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:10:16,494 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:10:16,573 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:10:16,573 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:10:16,573 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 13:10:16,574 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:10:16,574 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 13:10:16,574 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 13:10:16,574 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:10:16,574 INFO L87 Difference]: Start difference. First operand 193 states and 217 transitions. Second operand 7 states. [2018-01-24 13:10:16,876 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:10:16,876 INFO L93 Difference]: Finished difference Result 239 states and 265 transitions. [2018-01-24 13:10:16,877 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-24 13:10:16,877 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 39 [2018-01-24 13:10:16,877 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:10:16,878 INFO L225 Difference]: With dead ends: 239 [2018-01-24 13:10:16,878 INFO L226 Difference]: Without dead ends: 237 [2018-01-24 13:10:16,878 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=60, Invalid=122, Unknown=0, NotChecked=0, Total=182 [2018-01-24 13:10:16,878 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 237 states. [2018-01-24 13:10:16,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 237 to 201. [2018-01-24 13:10:16,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 201 states. [2018-01-24 13:10:16,886 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201 states to 201 states and 231 transitions. [2018-01-24 13:10:16,886 INFO L78 Accepts]: Start accepts. Automaton has 201 states and 231 transitions. Word has length 39 [2018-01-24 13:10:16,886 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:10:16,886 INFO L432 AbstractCegarLoop]: Abstraction has 201 states and 231 transitions. [2018-01-24 13:10:16,886 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 13:10:16,886 INFO L276 IsEmpty]: Start isEmpty. Operand 201 states and 231 transitions. [2018-01-24 13:10:16,887 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-24 13:10:16,887 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:10:16,887 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:10:16,887 INFO L371 AbstractCegarLoop]: === Iteration 38 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:10:16,887 INFO L82 PathProgramCache]: Analyzing trace with hash 1751566697, now seen corresponding path program 1 times [2018-01-24 13:10:16,888 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:10:16,888 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:10:16,888 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:10:16,889 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:10:16,889 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:10:16,895 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:10:16,896 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:10:17,059 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:10:17,059 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:10:17,059 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 13:10:17,060 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:10:17,060 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:10:17,060 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:10:17,060 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:10:17,060 INFO L87 Difference]: Start difference. First operand 201 states and 231 transitions. Second operand 5 states. [2018-01-24 13:10:17,229 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:10:17,229 INFO L93 Difference]: Finished difference Result 281 states and 312 transitions. [2018-01-24 13:10:17,229 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:10:17,229 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 39 [2018-01-24 13:10:17,229 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:10:17,230 INFO L225 Difference]: With dead ends: 281 [2018-01-24 13:10:17,230 INFO L226 Difference]: Without dead ends: 278 [2018-01-24 13:10:17,230 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 3 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-01-24 13:10:17,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 278 states. [2018-01-24 13:10:17,238 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 278 to 194. [2018-01-24 13:10:17,238 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-01-24 13:10:17,238 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 220 transitions. [2018-01-24 13:10:17,238 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 220 transitions. Word has length 39 [2018-01-24 13:10:17,238 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:10:17,238 INFO L432 AbstractCegarLoop]: Abstraction has 194 states and 220 transitions. [2018-01-24 13:10:17,239 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:10:17,239 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 220 transitions. [2018-01-24 13:10:17,239 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-24 13:10:17,239 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:10:17,239 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:10:17,239 INFO L371 AbstractCegarLoop]: === Iteration 39 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:10:17,239 INFO L82 PathProgramCache]: Analyzing trace with hash 2007730213, now seen corresponding path program 1 times [2018-01-24 13:10:17,239 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:10:17,240 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:10:17,240 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:10:17,240 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:10:17,240 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:10:17,246 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:10:17,247 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:10:17,295 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:10:17,296 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:10:17,296 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 13:10:17,296 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:10:17,296 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:10:17,296 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:10:17,296 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:10:17,296 INFO L87 Difference]: Start difference. First operand 194 states and 220 transitions. Second operand 5 states. [2018-01-24 13:10:17,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:10:17,359 INFO L93 Difference]: Finished difference Result 266 states and 300 transitions. [2018-01-24 13:10:17,359 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 13:10:17,359 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2018-01-24 13:10:17,359 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:10:17,360 INFO L225 Difference]: With dead ends: 266 [2018-01-24 13:10:17,360 INFO L226 Difference]: Without dead ends: 263 [2018-01-24 13:10:17,360 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-01-24 13:10:17,361 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 263 states. [2018-01-24 13:10:17,367 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 263 to 198. [2018-01-24 13:10:17,368 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 198 states. [2018-01-24 13:10:17,368 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 198 states to 198 states and 225 transitions. [2018-01-24 13:10:17,368 INFO L78 Accepts]: Start accepts. Automaton has 198 states and 225 transitions. Word has length 40 [2018-01-24 13:10:17,368 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:10:17,368 INFO L432 AbstractCegarLoop]: Abstraction has 198 states and 225 transitions. [2018-01-24 13:10:17,368 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:10:17,368 INFO L276 IsEmpty]: Start isEmpty. Operand 198 states and 225 transitions. [2018-01-24 13:10:17,369 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-24 13:10:17,369 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:10:17,369 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:10:17,369 INFO L371 AbstractCegarLoop]: === Iteration 40 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:10:17,369 INFO L82 PathProgramCache]: Analyzing trace with hash -1536007163, now seen corresponding path program 1 times [2018-01-24 13:10:17,369 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:10:17,370 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:10:17,370 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:10:17,370 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:10:17,370 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:10:17,376 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:10:17,376 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:10:17,420 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:10:17,420 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:10:17,420 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 13:10:17,421 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:10:17,421 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 13:10:17,421 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 13:10:17,421 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 13:10:17,421 INFO L87 Difference]: Start difference. First operand 198 states and 225 transitions. Second operand 5 states. [2018-01-24 13:10:17,780 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:10:17,780 INFO L93 Difference]: Finished difference Result 278 states and 307 transitions. [2018-01-24 13:10:17,781 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 13:10:17,781 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 40 [2018-01-24 13:10:17,781 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:10:17,782 INFO L225 Difference]: With dead ends: 278 [2018-01-24 13:10:17,782 INFO L226 Difference]: Without dead ends: 275 [2018-01-24 13:10:17,782 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 4 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-01-24 13:10:17,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 275 states. [2018-01-24 13:10:17,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 275 to 194. [2018-01-24 13:10:17,789 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-01-24 13:10:17,789 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 219 transitions. [2018-01-24 13:10:17,789 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 219 transitions. Word has length 40 [2018-01-24 13:10:17,789 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:10:17,789 INFO L432 AbstractCegarLoop]: Abstraction has 194 states and 219 transitions. [2018-01-24 13:10:17,790 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 13:10:17,790 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 219 transitions. [2018-01-24 13:10:17,790 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-24 13:10:17,790 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:10:17,790 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:10:17,790 INFO L371 AbstractCegarLoop]: === Iteration 41 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:10:17,790 INFO L82 PathProgramCache]: Analyzing trace with hash 720428047, now seen corresponding path program 1 times [2018-01-24 13:10:17,790 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:10:17,791 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:10:17,791 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:10:17,791 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:10:17,791 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:10:17,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:10:17,802 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:10:18,206 WARN L146 SmtUtils]: Spent 122ms on a formula simplification. DAG size of input: 26 DAG size of output 22 [2018-01-24 13:10:18,418 WARN L146 SmtUtils]: Spent 166ms on a formula simplification. DAG size of input: 39 DAG size of output 29 [2018-01-24 13:10:18,591 WARN L146 SmtUtils]: Spent 111ms on a formula simplification. DAG size of input: 37 DAG size of output 27 [2018-01-24 13:10:18,790 WARN L146 SmtUtils]: Spent 154ms on a formula simplification. DAG size of input: 39 DAG size of output 28 [2018-01-24 13:10:18,960 WARN L146 SmtUtils]: Spent 135ms on a formula simplification. DAG size of input: 36 DAG size of output 26 [2018-01-24 13:10:19,144 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:10:19,144 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 13:10:19,144 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-01-24 13:10:19,144 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:10:19,145 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-24 13:10:19,145 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-24 13:10:19,145 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=231, Unknown=0, NotChecked=0, Total=272 [2018-01-24 13:10:19,145 INFO L87 Difference]: Start difference. First operand 194 states and 219 transitions. Second operand 17 states. [2018-01-24 13:10:20,385 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:10:20,385 INFO L93 Difference]: Finished difference Result 266 states and 297 transitions. [2018-01-24 13:10:20,385 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-24 13:10:20,385 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 44 [2018-01-24 13:10:20,385 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:10:20,386 INFO L225 Difference]: With dead ends: 266 [2018-01-24 13:10:20,386 INFO L226 Difference]: Without dead ends: 211 [2018-01-24 13:10:20,386 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 43 GetRequests, 4 SyntacticMatches, 2 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 265 ImplicationChecksByTransitivity, 2.0s TimeCoverageRelationStatistics Valid=302, Invalid=1180, Unknown=0, NotChecked=0, Total=1482 [2018-01-24 13:10:20,387 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 211 states. [2018-01-24 13:10:20,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 211 to 192. [2018-01-24 13:10:20,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 192 states. [2018-01-24 13:10:20,397 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 192 states to 192 states and 216 transitions. [2018-01-24 13:10:20,397 INFO L78 Accepts]: Start accepts. Automaton has 192 states and 216 transitions. Word has length 44 [2018-01-24 13:10:20,397 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:10:20,397 INFO L432 AbstractCegarLoop]: Abstraction has 192 states and 216 transitions. [2018-01-24 13:10:20,397 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-24 13:10:20,397 INFO L276 IsEmpty]: Start isEmpty. Operand 192 states and 216 transitions. [2018-01-24 13:10:20,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-24 13:10:20,398 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:10:20,398 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:10:20,398 INFO L371 AbstractCegarLoop]: === Iteration 42 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:10:20,399 INFO L82 PathProgramCache]: Analyzing trace with hash -1624848401, now seen corresponding path program 1 times [2018-01-24 13:10:20,399 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:10:20,399 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:10:20,399 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:10:20,400 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:10:20,400 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:10:20,417 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:10:20,417 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:10:21,119 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 5 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:10:21,119 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:10:21,119 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:10:21,124 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:10:21,124 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:10:21,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:10:21,153 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:10:21,207 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-24 13:10:21,209 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 13:10:21,209 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:10:21,211 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:21,221 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-24 13:10:21,223 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 13:10:21,224 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:10:21,226 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:21,232 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:21,232 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:34, output treesize:23 [2018-01-24 13:10:21,260 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-01-24 13:10:21,263 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:10:21,263 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-01-24 13:10:21,264 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:10:21,279 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:21,315 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-01-24 13:10:21,317 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:10:21,318 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-01-24 13:10:21,318 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:10:21,322 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:21,329 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:21,329 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:54, output treesize:41 [2018-01-24 13:10:21,359 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 23 [2018-01-24 13:10:21,362 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:10:21,363 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:10:21,364 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:10:21,365 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 46 [2018-01-24 13:10:21,365 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:10:21,372 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:21,386 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 23 [2018-01-24 13:10:21,388 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:10:21,389 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:10:21,389 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:10:21,390 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 46 [2018-01-24 13:10:21,390 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:10:21,397 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:21,429 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:21,430 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:67, output treesize:59 [2018-01-24 13:10:21,459 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:10:21,459 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:10:21,460 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 13:10:21,460 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:10:21,469 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:21,470 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:67, output treesize:61 [2018-01-24 13:10:21,529 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 38 [2018-01-24 13:10:21,531 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 13:10:21,532 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:10:21,537 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:21,556 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 38 [2018-01-24 13:10:21,557 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 13:10:21,558 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:10:21,563 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:21,576 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:21,576 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:86, output treesize:78 [2018-01-24 13:10:21,616 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 41 [2018-01-24 13:10:21,619 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:10:21,620 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-01-24 13:10:21,620 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:10:21,628 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:21,648 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 42 treesize of output 59 [2018-01-24 13:10:21,650 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:10:21,651 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 23 [2018-01-24 13:10:21,651 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 13:10:21,658 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:21,673 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:10:21,674 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:93, output treesize:118 [2018-01-24 13:10:21,913 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:10:21,913 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:10:21,915 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 3 new quantified variables, introduced 0 case distinctions, treesize of input 118 treesize of output 98 [2018-01-24 13:10:21,927 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 21 treesize of output 25 [2018-01-24 13:10:21,928 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 2 xjuncts. [2018-01-24 13:10:21,943 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:10:21,943 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:10:21,944 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:10:21,945 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 48 [2018-01-24 13:10:21,946 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:10:21,959 INFO L267 ElimStorePlain]: Start of recursive call 2: 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 13:10:21,984 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 61 treesize of output 49 [2018-01-24 13:10:21,988 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 6 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 13 [2018-01-24 13:10:21,988 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-01-24 13:10:21,995 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:10:21,996 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 6 [2018-01-24 13:10:21,996 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-01-24 13:10:22,001 INFO L267 ElimStorePlain]: Start of recursive call 5: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:22,003 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 40 [2018-01-24 13:10:22,015 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 3 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 3 case distinctions, treesize of input 21 treesize of output 25 [2018-01-24 13:10:22,016 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 2 xjuncts. [2018-01-24 13:10:22,027 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:10:22,027 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 6 [2018-01-24 13:10:22,027 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-01-24 13:10:22,035 INFO L267 ElimStorePlain]: Start of recursive call 8: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-01-24 13:10:22,053 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 3 xjuncts. [2018-01-24 13:10:22,053 INFO L202 ElimStorePlain]: Needed 10 recursive calls to eliminate 4 variables, input treesize:143, output treesize:46 [2018-01-24 13:10:22,130 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:10:22,130 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 13:10:23,278 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:10:23,278 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:10:23,279 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 69 [2018-01-24 13:10:23,279 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:10:23,309 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:10:23,309 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:10:23,310 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 78 treesize of output 69 [2018-01-24 13:10:23,310 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:10:23,353 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:10:23,357 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 70 [2018-01-24 13:10:23,386 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-01-24 13:10:23,388 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:10:23,389 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 31 [2018-01-24 13:10:23,391 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:10:23,391 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:10:23,391 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:10:23,392 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 46 [2018-01-24 13:10:23,392 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-01-24 13:10:23,399 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:23,403 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:23,416 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:10:23,417 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:10:23,418 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 55 [2018-01-24 13:10:23,421 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:10:23,421 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:10:23,421 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:10:23,422 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 34 [2018-01-24 13:10:23,423 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-01-24 13:10:23,432 INFO L267 ElimStorePlain]: Start of recursive call 8: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:23,440 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:23,463 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:10:23,467 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 70 [2018-01-24 13:10:23,495 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 23 [2018-01-24 13:10:23,497 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:10:23,497 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 31 [2018-01-24 13:10:23,499 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:10:23,500 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:10:23,500 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:10:23,501 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 26 treesize of output 46 [2018-01-24 13:10:23,501 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-01-24 13:10:23,507 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:23,511 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:23,524 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:10:23,525 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 44 [2018-01-24 13:10:23,527 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:10:23,527 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:10:23,527 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 13:10:23,528 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 4 select indices, 4 select index equivalence classes, 7 disjoint index pairs (out of 6 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 34 [2018-01-24 13:10:23,528 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-01-24 13:10:23,534 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:23,541 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:23,571 INFO L267 ElimStorePlain]: Start of recursive call 1: 8 dim-0 vars, 2 dim-1 vars, 3 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:23,572 INFO L202 ElimStorePlain]: Needed 15 recursive calls to eliminate 13 variables, input treesize:241, output treesize:13 [2018-01-24 13:10:23,651 INFO L134 CoverageAnalysis]: Checked inductivity of 8 backedges. 8 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:10:23,671 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 13:10:23,671 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17, 17] imperfect sequences [21] total 51 [2018-01-24 13:10:23,671 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 13:10:23,672 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-24 13:10:23,672 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-24 13:10:23,672 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=198, Invalid=2303, Unknown=49, NotChecked=0, Total=2550 [2018-01-24 13:10:23,673 INFO L87 Difference]: Start difference. First operand 192 states and 216 transitions. Second operand 17 states. [2018-01-24 13:10:26,257 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 13:10:26,257 INFO L93 Difference]: Finished difference Result 257 states and 287 transitions. [2018-01-24 13:10:26,258 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-24 13:10:26,258 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 44 [2018-01-24 13:10:26,258 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 13:10:26,259 INFO L225 Difference]: With dead ends: 257 [2018-01-24 13:10:26,259 INFO L226 Difference]: Without dead ends: 182 [2018-01-24 13:10:26,260 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 131 GetRequests, 61 SyntacticMatches, 4 SemanticMatches, 66 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1298 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=530, Invalid=3977, Unknown=49, NotChecked=0, Total=4556 [2018-01-24 13:10:26,260 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 182 states. [2018-01-24 13:10:26,266 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 182 to 178. [2018-01-24 13:10:26,266 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-01-24 13:10:26,267 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 201 transitions. [2018-01-24 13:10:26,267 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 201 transitions. Word has length 44 [2018-01-24 13:10:26,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 13:10:26,267 INFO L432 AbstractCegarLoop]: Abstraction has 178 states and 201 transitions. [2018-01-24 13:10:26,267 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-24 13:10:26,267 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 201 transitions. [2018-01-24 13:10:26,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-24 13:10:26,268 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 13:10:26,268 INFO L322 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 13:10:26,268 INFO L371 AbstractCegarLoop]: === Iteration 43 === [mainErr51RequiresViolation, mainErr69RequiresViolation, mainErr26RequiresViolation, mainErr54RequiresViolation, mainErr66RequiresViolation, mainErr18RequiresViolation, mainErr23RequiresViolation, mainErr38RequiresViolation, mainErr0RequiresViolation, mainErr31RequiresViolation, mainErr46RequiresViolation, mainErr29RequiresViolation, mainErr3RequiresViolation, mainErr58RequiresViolation, mainErr62RequiresViolation, mainErr15RequiresViolation, mainErr49RequiresViolation, mainErr12RequiresViolation, mainErr71RequiresViolation, mainErr6RequiresViolation, mainErr35RequiresViolation, mainErr55RequiresViolation, mainErr65RequiresViolation, mainErr70RequiresViolation, mainErr17RequiresViolation, mainErr74EnsuresViolation, mainErr42RequiresViolation, mainErr30RequiresViolation, mainErr11RequiresViolation, mainErr57RequiresViolation, mainErr63RequiresViolation, mainErr24RequiresViolation, mainErr44RequiresViolation, mainErr10RequiresViolation, mainErr43RequiresViolation, mainErr4RequiresViolation, mainErr50RequiresViolation, mainErr37RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr36RequiresViolation, mainErr61RequiresViolation, mainErr59RequiresViolation, mainErr28RequiresViolation, mainErr33RequiresViolation, mainErr21RequiresViolation, mainErr41RequiresViolation, mainErr56RequiresViolation, mainErr64RequiresViolation, mainErr48RequiresViolation, mainErr72RequiresViolation, mainErr39RequiresViolation, mainErr16RequiresViolation, mainErr25RequiresViolation, mainErr2RequiresViolation, mainErr52RequiresViolation, mainErr68RequiresViolation, mainErr45RequiresViolation, mainErr19RequiresViolation, mainErr22RequiresViolation, mainErr32RequiresViolation, mainErr27RequiresViolation, mainErr1RequiresViolation, mainErr60RequiresViolation, mainErr9RequiresViolation, mainErr67RequiresViolation, mainErr53RequiresViolation, mainErr7RequiresViolation, mainErr20RequiresViolation, mainErr8RequiresViolation, mainErr34RequiresViolation, mainErr47RequiresViolation, mainErr73RequiresViolation, mainErr14RequiresViolation, mainErr40RequiresViolation]=== [2018-01-24 13:10:26,268 INFO L82 PathProgramCache]: Analyzing trace with hash -1456246469, now seen corresponding path program 1 times [2018-01-24 13:10:26,268 INFO L67 tionRefinementEngine]: Using refinement strategy RubberTaipanRefinementStrategy [2018-01-24 13:10:26,269 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:10:26,269 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:10:26,269 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 13:10:26,269 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 13:10:26,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:10:26,282 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 13:10:26,539 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 13:10:26,540 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 13:10:26,540 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 13:10:26,559 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 13:10:26,560 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 13:10:26,580 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 13:10:26,583 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 13:10:26,597 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:10:26,598 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 13:10:26,598 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 13:10:26,599 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 13:10:26,601 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:26,602 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:11 [2018-01-24 13:10:26,606 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-24 13:10:26,607 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 13:10:26,608 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:10:26,609 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:26,612 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:26,613 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:22, output treesize:15 [2018-01-24 13:10:26,632 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 28 treesize of output 24 [2018-01-24 13:10:26,633 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-01-24 13:10:26,633 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:10:26,636 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:26,641 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 13:10:26,641 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:34, output treesize:26 [2018-01-24 13:10:26,680 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 31 [2018-01-24 13:10:26,682 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 25 [2018-01-24 13:10:26,683 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 13:10:26,686 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 13:10:26,692 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 13:10:26,692 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:47, output treesize:39 Received shutdown request... [2018-01-24 13:10:30,709 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-24 13:10:30,710 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-24 13:10:30,715 WARN L187 ceAbstractionStarter]: Timeout [2018-01-24 13:10:30,715 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.01 01:10:30 BoogieIcfgContainer [2018-01-24 13:10:30,715 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-24 13:10:30,716 INFO L168 Benchmark]: Toolchain (without parser) took 47066.52 ms. Allocated memory was 305.1 MB in the beginning and 773.3 MB in the end (delta: 468.2 MB). Free memory was 264.0 MB in the beginning and 671.6 MB in the end (delta: -407.6 MB). Peak memory consumption was 60.6 MB. Max. memory is 5.3 GB. [2018-01-24 13:10:30,717 INFO L168 Benchmark]: CDTParser took 0.16 ms. Allocated memory is still 305.1 MB. Free memory is still 270.0 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-24 13:10:30,717 INFO L168 Benchmark]: CACSL2BoogieTranslator took 208.60 ms. Allocated memory is still 305.1 MB. Free memory was 264.0 MB in the beginning and 252.1 MB in the end (delta: 12.0 MB). Peak memory consumption was 12.0 MB. Max. memory is 5.3 GB. [2018-01-24 13:10:30,718 INFO L168 Benchmark]: Boogie Preprocessor took 46.00 ms. Allocated memory is still 305.1 MB. Free memory was 252.1 MB in the beginning and 250.1 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-24 13:10:30,718 INFO L168 Benchmark]: RCFGBuilder took 697.99 ms. Allocated memory is still 305.1 MB. Free memory was 250.1 MB in the beginning and 211.0 MB in the end (delta: 39.0 MB). Peak memory consumption was 39.0 MB. Max. memory is 5.3 GB. [2018-01-24 13:10:30,718 INFO L168 Benchmark]: TraceAbstraction took 46105.81 ms. Allocated memory was 305.1 MB in the beginning and 773.3 MB in the end (delta: 468.2 MB). Free memory was 209.1 MB in the beginning and 671.6 MB in the end (delta: -462.6 MB). Peak memory consumption was 5.6 MB. Max. memory is 5.3 GB. [2018-01-24 13:10:30,719 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.16 ms. Allocated memory is still 305.1 MB. Free memory is still 270.0 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 208.60 ms. Allocated memory is still 305.1 MB. Free memory was 264.0 MB in the beginning and 252.1 MB in the end (delta: 12.0 MB). Peak memory consumption was 12.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 46.00 ms. Allocated memory is still 305.1 MB. Free memory was 252.1 MB in the beginning and 250.1 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 697.99 ms. Allocated memory is still 305.1 MB. Free memory was 250.1 MB in the beginning and 211.0 MB in the end (delta: 39.0 MB). Peak memory consumption was 39.0 MB. Max. memory is 5.3 GB. * TraceAbstraction took 46105.81 ms. Allocated memory was 305.1 MB in the beginning and 773.3 MB in the end (delta: 468.2 MB). Free memory was 209.1 MB in the beginning and 671.6 MB in the end (delta: -462.6 MB). Peak memory consumption was 5.6 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 661). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 673). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 646). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 663). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 672). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 644). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 645). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 651). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 631). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 648). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 657). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 646). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 632). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 666). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 667). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 642). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 658). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 640). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 673). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 636). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 650). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 663). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 670). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 673). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 643). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 620]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 620). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 652). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 648). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 638). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 664). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 667). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 645). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 652). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 638). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 652). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 633). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 661). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 650). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 633). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 640). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 650). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 667). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 666). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 646). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 649). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 644). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 651). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 664). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 670). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 658). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 676). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 651). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 643). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 645). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 632). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 662). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 673). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 652). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 644). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 645). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 649). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 646). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 631). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 667). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 636). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 672). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 662). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 636). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 644). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 636). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 650). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 657). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 676). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 642). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 651). Cancelled while BasicCegarLoop was analyzing trace of length 53 with TraceHistMax 3, while TraceCheckSpWp was constructing forward predicates, while PredicateUnifier was unifying predicates, while SimplifyDDAWithTimeout was simplifying term of DAG size 24. - StatisticsResult: Ultimate Automizer benchmark data CFG has 3 procedures, 164 locations, 75 error locations. TIMEOUT Result, 46.0s OverallTime, 43 OverallIterations, 3 TraceHistogramMax, 17.8s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 4465 SDtfs, 6845 SDslu, 11544 SDs, 0 SdLazy, 13369 SolverSat, 699 SolverUnsat, 15 SolverUnknown, 0 SolverNotchecked, 10.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 872 GetRequests, 329 SyntacticMatches, 38 SemanticMatches, 505 ConstructedPredicates, 3 IntricatePredicates, 0 DeprecatedPredicates, 3298 ImplicationChecksByTransitivity, 14.7s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=201occurred in iteration=37, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.3s AutomataMinimizationTime, 42 MinimizatonAttempts, 1416 StatesRemovedByMinimization, 40 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.0s SsaConstructionTime, 9.7s SatisfiabilityAnalysisTime, 13.0s InterpolantComputationTime, 1411 NumberOfCodeBlocks, 1411 NumberOfCodeBlocksAsserted, 47 NumberOfCheckSat, 1537 ConstructedInterpolants, 69 QuantifiedInterpolants, 546756 SizeOfPredicates, 86 NumberOfNonLiveVariables, 868 ConjunctsInSsa, 137 ConjunctsInUnsatCore, 52 InterpolantComputations, 41 PerfectInterpolantSequences, 54/77 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/tree_parent_ptr_true-valid-memsafety_false-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_RubberTaipan+AI_EQ.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-24_13-10-30-729.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/tree_parent_ptr_true-valid-memsafety_false-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_RubberTaipan+AI_EQ.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-24_13-10-30-729.csv Completed graceful shutdown