java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf -i ../../../trunk/examples/svcomp/memsafety/960521-1_false-valid-deref.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-24 15:25:54,309 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-24 15:25:54,310 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-24 15:25:54,325 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-24 15:25:54,326 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-24 15:25:54,327 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-24 15:25:54,328 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-24 15:25:54,329 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-24 15:25:54,331 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-24 15:25:54,332 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-24 15:25:54,333 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-24 15:25:54,333 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-24 15:25:54,334 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-24 15:25:54,336 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-24 15:25:54,337 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-24 15:25:54,339 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-24 15:25:54,341 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-24 15:25:54,343 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-24 15:25:54,344 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-24 15:25:54,346 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-24 15:25:54,348 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-24 15:25:54,348 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-24 15:25:54,348 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-24 15:25:54,349 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-24 15:25:54,350 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-24 15:25:54,351 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-24 15:25:54,352 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-24 15:25:54,352 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-24 15:25:54,353 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-24 15:25:54,353 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-24 15:25:54,353 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-24 15:25:54,354 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf [2018-01-24 15:25:54,362 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-24 15:25:54,362 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-24 15:25:54,363 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-24 15:25:54,363 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-24 15:25:54,363 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-24 15:25:54,363 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-24 15:25:54,364 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-24 15:25:54,364 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-24 15:25:54,364 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-24 15:25:54,364 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-24 15:25:54,364 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-24 15:25:54,364 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-24 15:25:54,365 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-24 15:25:54,365 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-24 15:25:54,365 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-24 15:25:54,365 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-24 15:25:54,365 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-24 15:25:54,365 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-24 15:25:54,365 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-24 15:25:54,365 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-24 15:25:54,366 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-24 15:25:54,366 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-24 15:25:54,366 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-24 15:25:54,366 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 15:25:54,366 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-24 15:25:54,367 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-24 15:25:54,367 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-24 15:25:54,367 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-24 15:25:54,367 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-24 15:25:54,367 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-24 15:25:54,367 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-24 15:25:54,367 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-24 15:25:54,367 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-24 15:25:54,368 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-24 15:25:54,368 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-24 15:25:54,402 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-24 15:25:54,414 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-24 15:25:54,417 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-24 15:25:54,418 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-24 15:25:54,418 INFO L276 PluginConnector]: CDTParser initialized [2018-01-24 15:25:54,419 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety/960521-1_false-valid-deref.i [2018-01-24 15:25:54,592 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-24 15:25:54,596 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-24 15:25:54,597 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-24 15:25:54,597 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-24 15:25:54,602 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-24 15:25:54,603 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 03:25:54" (1/1) ... [2018-01-24 15:25:54,606 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@53037d43 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:25:54, skipping insertion in model container [2018-01-24 15:25:54,606 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 03:25:54" (1/1) ... [2018-01-24 15:25:54,619 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 15:25:54,657 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 15:25:54,772 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 15:25:54,790 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 15:25:54,797 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:25:54 WrapperNode [2018-01-24 15:25:54,797 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-24 15:25:54,798 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-24 15:25:54,798 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-24 15:25:54,798 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-24 15:25:54,809 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:25:54" (1/1) ... [2018-01-24 15:25:54,809 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:25:54" (1/1) ... [2018-01-24 15:25:54,818 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:25:54" (1/1) ... [2018-01-24 15:25:54,818 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:25:54" (1/1) ... [2018-01-24 15:25:54,822 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:25:54" (1/1) ... [2018-01-24 15:25:54,825 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:25:54" (1/1) ... [2018-01-24 15:25:54,827 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:25:54" (1/1) ... [2018-01-24 15:25:54,829 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-24 15:25:54,829 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-24 15:25:54,829 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-24 15:25:54,829 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-24 15:25:54,830 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:25:54" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 15:25:54,881 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-24 15:25:54,882 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-24 15:25:54,882 INFO L136 BoogieDeclarations]: Found implementation of procedure foo [2018-01-24 15:25:54,882 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-24 15:25:54,882 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-24 15:25:54,882 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-24 15:25:54,882 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-24 15:25:54,883 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-24 15:25:54,883 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-24 15:25:54,883 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-24 15:25:54,883 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-24 15:25:54,883 INFO L128 BoogieDeclarations]: Found specification of procedure foo [2018-01-24 15:25:54,883 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-24 15:25:54,884 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-24 15:25:54,884 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-24 15:25:55,117 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-24 15:25:55,117 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 03:25:55 BoogieIcfgContainer [2018-01-24 15:25:55,117 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-24 15:25:55,118 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-24 15:25:55,118 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-24 15:25:55,120 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-24 15:25:55,120 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.01 03:25:54" (1/3) ... [2018-01-24 15:25:55,121 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@32ebad9a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 03:25:55, skipping insertion in model container [2018-01-24 15:25:55,121 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:25:54" (2/3) ... [2018-01-24 15:25:55,121 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@32ebad9a and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 03:25:55, skipping insertion in model container [2018-01-24 15:25:55,121 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 03:25:55" (3/3) ... [2018-01-24 15:25:55,123 INFO L105 eAbstractionObserver]: Analyzing ICFG 960521-1_false-valid-deref.i [2018-01-24 15:25:55,129 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-24 15:25:55,134 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 17 error locations. [2018-01-24 15:25:55,180 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-24 15:25:55,180 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-24 15:25:55,180 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-24 15:25:55,180 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-24 15:25:55,180 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-24 15:25:55,181 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-24 15:25:55,181 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-24 15:25:55,181 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-24 15:25:55,182 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-24 15:25:55,201 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states. [2018-01-24 15:25:55,208 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-01-24 15:25:55,208 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:25:55,209 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:25:55,209 INFO L371 AbstractCegarLoop]: === Iteration 1 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:25:55,215 INFO L82 PathProgramCache]: Analyzing trace with hash 1993989713, now seen corresponding path program 1 times [2018-01-24 15:25:55,217 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:25:55,266 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:25:55,266 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:25:55,266 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:25:55,266 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:25:55,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:25:55,327 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:25:55,417 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:25:55,418 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 15:25:55,419 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 15:25:55,419 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:25:55,421 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 15:25:55,431 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 15:25:55,432 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 15:25:55,434 INFO L87 Difference]: Start difference. First operand 53 states. Second operand 4 states. [2018-01-24 15:25:55,674 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:25:55,675 INFO L93 Difference]: Finished difference Result 84 states and 90 transitions. [2018-01-24 15:25:55,675 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 15:25:55,676 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2018-01-24 15:25:55,677 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:25:55,687 INFO L225 Difference]: With dead ends: 84 [2018-01-24 15:25:55,688 INFO L226 Difference]: Without dead ends: 49 [2018-01-24 15:25:55,691 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 15:25:55,705 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-01-24 15:25:55,719 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2018-01-24 15:25:55,720 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-01-24 15:25:55,722 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 51 transitions. [2018-01-24 15:25:55,723 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 51 transitions. Word has length 11 [2018-01-24 15:25:55,723 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:25:55,723 INFO L432 AbstractCegarLoop]: Abstraction has 49 states and 51 transitions. [2018-01-24 15:25:55,723 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 15:25:55,724 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 51 transitions. [2018-01-24 15:25:55,724 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-01-24 15:25:55,724 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:25:55,724 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:25:55,724 INFO L371 AbstractCegarLoop]: === Iteration 2 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:25:55,725 INFO L82 PathProgramCache]: Analyzing trace with hash 1993989714, now seen corresponding path program 1 times [2018-01-24 15:25:55,725 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:25:55,726 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:25:55,726 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:25:55,726 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:25:55,726 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:25:55,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:25:55,747 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:25:55,844 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:25:55,845 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 15:25:55,845 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 15:25:55,845 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:25:55,847 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 15:25:55,847 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 15:25:55,847 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 15:25:55,847 INFO L87 Difference]: Start difference. First operand 49 states and 51 transitions. Second operand 5 states. [2018-01-24 15:25:55,951 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:25:55,951 INFO L93 Difference]: Finished difference Result 49 states and 51 transitions. [2018-01-24 15:25:55,952 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 15:25:55,952 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 11 [2018-01-24 15:25:55,952 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:25:55,953 INFO L225 Difference]: With dead ends: 49 [2018-01-24 15:25:55,954 INFO L226 Difference]: Without dead ends: 48 [2018-01-24 15:25:55,955 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-01-24 15:25:55,955 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-01-24 15:25:55,960 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-01-24 15:25:55,960 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-24 15:25:55,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 50 transitions. [2018-01-24 15:25:55,962 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 50 transitions. Word has length 11 [2018-01-24 15:25:55,962 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:25:55,962 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 50 transitions. [2018-01-24 15:25:55,963 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 15:25:55,963 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 50 transitions. [2018-01-24 15:25:55,963 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-24 15:25:55,963 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:25:55,964 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:25:55,964 INFO L371 AbstractCegarLoop]: === Iteration 3 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:25:55,964 INFO L82 PathProgramCache]: Analyzing trace with hash -1188525484, now seen corresponding path program 1 times [2018-01-24 15:25:55,964 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:25:55,965 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:25:55,965 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:25:55,966 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:25:55,966 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:25:55,984 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:25:55,985 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:25:56,080 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:25:56,080 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 15:25:56,080 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 15:25:56,081 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:25:56,081 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 15:25:56,081 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 15:25:56,081 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 15:25:56,082 INFO L87 Difference]: Start difference. First operand 48 states and 50 transitions. Second operand 6 states. [2018-01-24 15:25:56,177 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:25:56,177 INFO L93 Difference]: Finished difference Result 48 states and 50 transitions. [2018-01-24 15:25:56,177 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 15:25:56,177 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 17 [2018-01-24 15:25:56,177 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:25:56,178 INFO L225 Difference]: With dead ends: 48 [2018-01-24 15:25:56,178 INFO L226 Difference]: Without dead ends: 45 [2018-01-24 15:25:56,178 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-01-24 15:25:56,179 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-01-24 15:25:56,184 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-01-24 15:25:56,184 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-01-24 15:25:56,185 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 47 transitions. [2018-01-24 15:25:56,186 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 47 transitions. Word has length 17 [2018-01-24 15:25:56,186 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:25:56,186 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 47 transitions. [2018-01-24 15:25:56,186 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 15:25:56,186 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 47 transitions. [2018-01-24 15:25:56,187 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-24 15:25:56,187 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:25:56,187 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:25:56,187 INFO L371 AbstractCegarLoop]: === Iteration 4 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:25:56,188 INFO L82 PathProgramCache]: Analyzing trace with hash -1188525483, now seen corresponding path program 1 times [2018-01-24 15:25:56,188 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:25:56,189 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:25:56,189 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:25:56,189 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:25:56,189 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:25:56,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:25:56,209 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:25:56,404 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:25:56,404 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 15:25:56,405 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 15:25:56,405 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:25:56,405 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 15:25:56,405 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 15:25:56,406 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-01-24 15:25:56,406 INFO L87 Difference]: Start difference. First operand 45 states and 47 transitions. Second operand 7 states. [2018-01-24 15:25:56,530 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:25:56,530 INFO L93 Difference]: Finished difference Result 80 states and 87 transitions. [2018-01-24 15:25:56,530 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 15:25:56,531 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 17 [2018-01-24 15:25:56,531 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:25:56,531 INFO L225 Difference]: With dead ends: 80 [2018-01-24 15:25:56,531 INFO L226 Difference]: Without dead ends: 53 [2018-01-24 15:25:56,532 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-01-24 15:25:56,532 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-01-24 15:25:56,537 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 48. [2018-01-24 15:25:56,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-24 15:25:56,539 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 50 transitions. [2018-01-24 15:25:56,539 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 50 transitions. Word has length 17 [2018-01-24 15:25:56,539 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:25:56,539 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 50 transitions. [2018-01-24 15:25:56,539 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 15:25:56,540 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 50 transitions. [2018-01-24 15:25:56,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-24 15:25:56,540 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:25:56,541 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:25:56,541 INFO L371 AbstractCegarLoop]: === Iteration 5 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:25:56,541 INFO L82 PathProgramCache]: Analyzing trace with hash -2106816852, now seen corresponding path program 1 times [2018-01-24 15:25:56,541 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:25:56,542 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:25:56,543 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:25:56,543 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:25:56,543 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:25:56,561 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:25:56,562 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:25:56,743 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:25:56,743 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:25:56,743 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:25:56,745 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 22 with the following transitions: [2018-01-24 15:25:56,747 INFO L201 CegarAbsIntRunner]: [0], [1], [2], [6], [11], [12], [14], [16], [42], [43], [44], [45], [46], [47], [50], [76], [77], [78], [80] [2018-01-24 15:25:56,799 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 15:25:56,799 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 15:25:58,170 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 15:25:58,171 INFO L268 AbstractInterpreter]: Visited 19 different actions 28 times. Merged at 5 different actions 9 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 26 variables. [2018-01-24 15:25:58,185 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 15:25:58,185 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:25:58,185 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:25:58,200 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:25:58,200 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:25:58,235 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:25:58,243 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:25:58,272 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 15:25:58,273 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:25:58,299 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:25:58,300 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:15, output treesize:14 [2018-01-24 15:25:58,360 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-01-24 15:25:58,361 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:25:58,402 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 15:25:58,402 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:21 [2018-01-24 15:25:58,669 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:25:58,670 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:25:59,168 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 19 [2018-01-24 15:25:59,217 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 5 [2018-01-24 15:25:59,217 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:25:59,224 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:25:59,225 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:25:59,225 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:15, output treesize:5 [2018-01-24 15:25:59,250 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:25:59,272 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:25:59,272 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:25:59,276 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:25:59,276 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:25:59,308 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:25:59,313 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:25:59,319 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 15:25:59,319 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:25:59,328 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:25:59,329 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:25:59,334 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:25:59,334 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:21, output treesize:19 [2018-01-24 15:25:59,384 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:25:59,386 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 19 [2018-01-24 15:25:59,386 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:25:59,399 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:25:59,400 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:25:59,400 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 15:25:59,400 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:25:59,410 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 15:25:59,411 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:32, output treesize:25 [2018-01-24 15:25:59,551 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:25:59,552 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:25:59,652 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 3 [2018-01-24 15:25:59,653 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:25:59,666 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 19 [2018-01-24 15:25:59,678 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 15:25:59,678 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 15:25:59,679 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:25:59,682 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:25:59,682 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:25, output treesize:5 [2018-01-24 15:25:59,695 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:25:59,696 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:25:59,697 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8, 7, 7, 7] total 24 [2018-01-24 15:25:59,697 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:25:59,697 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-24 15:25:59,697 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-24 15:25:59,698 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=477, Unknown=1, NotChecked=0, Total=600 [2018-01-24 15:25:59,698 INFO L87 Difference]: Start difference. First operand 48 states and 50 transitions. Second operand 12 states. [2018-01-24 15:25:59,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:25:59,974 INFO L93 Difference]: Finished difference Result 90 states and 95 transitions. [2018-01-24 15:25:59,974 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-24 15:25:59,975 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 21 [2018-01-24 15:25:59,975 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:25:59,976 INFO L225 Difference]: With dead ends: 90 [2018-01-24 15:25:59,976 INFO L226 Difference]: Without dead ends: 63 [2018-01-24 15:25:59,977 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 64 SyntacticMatches, 4 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 232 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=162, Invalid=593, Unknown=1, NotChecked=0, Total=756 [2018-01-24 15:25:59,977 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2018-01-24 15:25:59,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 56. [2018-01-24 15:25:59,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-01-24 15:25:59,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 60 transitions. [2018-01-24 15:25:59,984 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 60 transitions. Word has length 21 [2018-01-24 15:25:59,984 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:25:59,984 INFO L432 AbstractCegarLoop]: Abstraction has 56 states and 60 transitions. [2018-01-24 15:25:59,984 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-24 15:25:59,985 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 60 transitions. [2018-01-24 15:25:59,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-24 15:25:59,985 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:25:59,986 INFO L322 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:25:59,986 INFO L371 AbstractCegarLoop]: === Iteration 6 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:25:59,986 INFO L82 PathProgramCache]: Analyzing trace with hash -702775421, now seen corresponding path program 2 times [2018-01-24 15:25:59,986 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:25:59,987 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:25:59,987 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:25:59,987 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:25:59,988 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:26:00,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:26:00,006 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:26:00,215 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:26:00,215 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:00,216 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:26:00,216 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:26:00,216 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:26:00,216 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:00,216 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:26:00,221 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:26:00,221 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:26:00,235 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:00,238 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:00,239 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:26:00,241 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:26:00,248 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:26:00,249 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:26:00,265 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 15:26:00,266 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:26:00,277 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:26:00,277 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:21, output treesize:19 [2018-01-24 15:26:00,309 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:26:00,316 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:26:00,317 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 15:26:00,317 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:26:00,346 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 19 [2018-01-24 15:26:00,346 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:26:00,353 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 15:26:00,354 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:32, output treesize:25 [2018-01-24 15:26:00,506 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:26:00,506 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:26:00,643 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 3 [2018-01-24 15:26:00,643 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:26:00,648 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 19 [2018-01-24 15:26:00,660 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 15:26:00,661 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 15:26:00,666 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:26:00,675 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:26:00,676 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:25, output treesize:5 [2018-01-24 15:26:00,700 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:26:00,721 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:00,721 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:26:00,725 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:26:00,726 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:26:00,753 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:00,782 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:00,793 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:26:00,797 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:26:00,801 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 15:26:00,802 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:26:00,811 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:26:00,811 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:26:00,818 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:26:00,819 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:21, output treesize:19 [2018-01-24 15:26:00,827 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:26:00,828 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 19 [2018-01-24 15:26:00,828 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:26:00,862 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:26:00,863 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:26:00,864 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 15:26:00,864 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:26:00,902 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 15:26:00,903 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:32, output treesize:25 [2018-01-24 15:26:00,959 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:26:00,959 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:26:01,008 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 3 [2018-01-24 15:26:01,008 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:26:01,011 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 19 [2018-01-24 15:26:01,021 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 5 [2018-01-24 15:26:01,021 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 15:26:01,022 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:26:01,025 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:26:01,025 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:25, output treesize:5 [2018-01-24 15:26:01,043 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:26:01,044 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:26:01,044 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 8, 8, 8] total 23 [2018-01-24 15:26:01,045 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:26:01,045 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-24 15:26:01,045 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-24 15:26:01,046 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=110, Invalid=442, Unknown=0, NotChecked=0, Total=552 [2018-01-24 15:26:01,046 INFO L87 Difference]: Start difference. First operand 56 states and 60 transitions. Second operand 17 states. [2018-01-24 15:26:01,545 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:26:01,545 INFO L93 Difference]: Finished difference Result 104 states and 111 transitions. [2018-01-24 15:26:01,546 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 15:26:01,546 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 25 [2018-01-24 15:26:01,546 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:26:01,546 INFO L225 Difference]: With dead ends: 104 [2018-01-24 15:26:01,547 INFO L226 Difference]: Without dead ends: 73 [2018-01-24 15:26:01,547 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 83 SyntacticMatches, 3 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 257 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=208, Invalid=722, Unknown=0, NotChecked=0, Total=930 [2018-01-24 15:26:01,548 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2018-01-24 15:26:01,554 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 64. [2018-01-24 15:26:01,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2018-01-24 15:26:01,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 70 transitions. [2018-01-24 15:26:01,556 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 70 transitions. Word has length 25 [2018-01-24 15:26:01,556 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:26:01,556 INFO L432 AbstractCegarLoop]: Abstraction has 64 states and 70 transitions. [2018-01-24 15:26:01,556 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-24 15:26:01,556 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 70 transitions. [2018-01-24 15:26:01,557 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-24 15:26:01,557 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:26:01,558 INFO L322 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:26:01,558 INFO L371 AbstractCegarLoop]: === Iteration 7 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:26:01,558 INFO L82 PathProgramCache]: Analyzing trace with hash 1827026138, now seen corresponding path program 3 times [2018-01-24 15:26:01,558 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:26:01,559 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:26:01,559 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:26:01,559 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:26:01,559 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:26:01,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:26:01,575 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:26:01,781 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:26:01,781 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:01,781 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:26:01,781 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:26:01,782 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:26:01,782 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:01,782 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:26:01,789 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 15:26:01,789 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 15:26:01,802 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:01,805 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:01,806 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:26:01,808 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:26:01,812 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 15:26:01,812 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:26:01,821 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:26:01,821 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:26:01,827 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:26:01,827 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:18, output treesize:16 [2018-01-24 15:26:01,877 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:26:01,884 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:26:01,885 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 15:26:01,885 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:26:01,896 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 19 [2018-01-24 15:26:01,896 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:26:01,906 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:26:01,906 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:29, output treesize:22 [2018-01-24 15:26:02,071 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 15:26:02,072 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:26:02,423 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 15:26:02,443 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:02,443 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:26:02,446 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 15:26:02,446 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 15:26:02,464 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:02,494 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:02,506 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:26:02,511 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:26:02,515 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:26:02,515 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:26:02,520 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 15:26:02,521 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:26:02,524 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:26:02,525 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:18, output treesize:16 [2018-01-24 15:26:02,567 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:26:02,568 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:26:02,568 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 15:26:02,569 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:26:02,580 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 19 [2018-01-24 15:26:02,580 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:26:02,585 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 15:26:02,585 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:29, output treesize:22 [2018-01-24 15:26:02,745 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 15:26:02,745 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:26:02,940 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 15:26:02,942 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:26:02,942 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 7, 7, 7] total 29 [2018-01-24 15:26:02,942 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:26:02,942 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-24 15:26:02,942 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-24 15:26:02,942 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=140, Invalid=730, Unknown=0, NotChecked=0, Total=870 [2018-01-24 15:26:02,943 INFO L87 Difference]: Start difference. First operand 64 states and 70 transitions. Second operand 18 states. [2018-01-24 15:26:03,815 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:26:03,815 INFO L93 Difference]: Finished difference Result 125 states and 137 transitions. [2018-01-24 15:26:03,816 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-24 15:26:03,817 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 29 [2018-01-24 15:26:03,817 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:26:03,820 INFO L225 Difference]: With dead ends: 125 [2018-01-24 15:26:03,820 INFO L226 Difference]: Without dead ends: 90 [2018-01-24 15:26:03,821 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 92 SyntacticMatches, 5 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 460 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=338, Invalid=1302, Unknown=0, NotChecked=0, Total=1640 [2018-01-24 15:26:03,822 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2018-01-24 15:26:03,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 70. [2018-01-24 15:26:03,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70 states. [2018-01-24 15:26:03,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 76 transitions. [2018-01-24 15:26:03,833 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 76 transitions. Word has length 29 [2018-01-24 15:26:03,833 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:26:03,834 INFO L432 AbstractCegarLoop]: Abstraction has 70 states and 76 transitions. [2018-01-24 15:26:03,834 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-24 15:26:03,834 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 76 transitions. [2018-01-24 15:26:03,835 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-24 15:26:03,835 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:26:03,835 INFO L322 BasicCegarLoop]: trace histogram [6, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:26:03,835 INFO L371 AbstractCegarLoop]: === Iteration 8 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:26:03,835 INFO L82 PathProgramCache]: Analyzing trace with hash -645884181, now seen corresponding path program 1 times [2018-01-24 15:26:03,836 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:26:03,836 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:26:03,837 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:26:03,837 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:26:03,837 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:26:03,851 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:26:03,852 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:26:04,027 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:26:04,027 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:04,027 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:26:04,028 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 41 with the following transitions: [2018-01-24 15:26:04,028 INFO L201 CegarAbsIntRunner]: [0], [1], [2], [6], [9], [11], [12], [16], [20], [24], [29], [32], [42], [43], [44], [45], [46], [47], [50], [76], [77], [78], [80] [2018-01-24 15:26:04,029 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 15:26:04,029 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 15:26:05,383 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 15:26:05,383 INFO L268 AbstractInterpreter]: Visited 23 different actions 41 times. Merged at 9 different actions 18 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 26 variables. [2018-01-24 15:26:05,394 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 15:26:05,394 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:05,394 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:26:05,413 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:26:05,413 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:26:05,442 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:26:05,444 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:26:05,832 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:26:05,832 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:26:06,258 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:26:06,279 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:06,279 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:26:06,290 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:26:06,290 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:26:06,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:26:06,332 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:26:06,340 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:26:06,340 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:26:06,378 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:26:06,379 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:26:06,380 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 22 [2018-01-24 15:26:06,380 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:26:06,380 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 15:26:06,380 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 15:26:06,381 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=199, Invalid=263, Unknown=0, NotChecked=0, Total=462 [2018-01-24 15:26:06,381 INFO L87 Difference]: Start difference. First operand 70 states and 76 transitions. Second operand 15 states. [2018-01-24 15:26:06,922 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:26:06,922 INFO L93 Difference]: Finished difference Result 136 states and 147 transitions. [2018-01-24 15:26:06,923 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-24 15:26:06,923 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 40 [2018-01-24 15:26:06,923 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:26:06,924 INFO L225 Difference]: With dead ends: 136 [2018-01-24 15:26:06,924 INFO L226 Difference]: Without dead ends: 102 [2018-01-24 15:26:06,925 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 167 GetRequests, 147 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 164 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=199, Invalid=263, Unknown=0, NotChecked=0, Total=462 [2018-01-24 15:26:06,925 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2018-01-24 15:26:06,935 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 86. [2018-01-24 15:26:06,935 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-01-24 15:26:06,936 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 98 transitions. [2018-01-24 15:26:06,936 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 98 transitions. Word has length 40 [2018-01-24 15:26:06,937 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:26:06,937 INFO L432 AbstractCegarLoop]: Abstraction has 86 states and 98 transitions. [2018-01-24 15:26:06,937 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 15:26:06,937 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 98 transitions. [2018-01-24 15:26:06,938 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-24 15:26:06,938 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:26:06,938 INFO L322 BasicCegarLoop]: trace histogram [7, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:26:06,938 INFO L371 AbstractCegarLoop]: === Iteration 9 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:26:06,939 INFO L82 PathProgramCache]: Analyzing trace with hash -2113361740, now seen corresponding path program 2 times [2018-01-24 15:26:06,939 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:26:06,939 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:26:06,940 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:26:06,940 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:26:06,940 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:26:06,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:26:06,952 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:26:07,297 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:26:07,297 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:07,298 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:26:07,298 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:26:07,298 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:26:07,298 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:07,298 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:26:07,307 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:26:07,307 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:26:07,320 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:07,322 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:26:07,325 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:26:07,344 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 15:26:07,345 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:26:07,392 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 15:26:07,392 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:14 [2018-01-24 15:26:07,637 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 15:26:07,638 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:26:07,844 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 15:26:07,864 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 15:26:07,878 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7, 7] imperfect sequences [10] total 20 [2018-01-24 15:26:07,878 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:26:07,879 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 15:26:07,879 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 15:26:07,879 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=75, Invalid=305, Unknown=0, NotChecked=0, Total=380 [2018-01-24 15:26:07,879 INFO L87 Difference]: Start difference. First operand 86 states and 98 transitions. Second operand 8 states. [2018-01-24 15:26:08,100 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:26:08,100 INFO L93 Difference]: Finished difference Result 86 states and 98 transitions. [2018-01-24 15:26:08,100 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 15:26:08,100 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 44 [2018-01-24 15:26:08,101 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:26:08,102 INFO L225 Difference]: With dead ends: 86 [2018-01-24 15:26:08,103 INFO L226 Difference]: Without dead ends: 73 [2018-01-24 15:26:08,103 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 78 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 120 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=138, Invalid=564, Unknown=0, NotChecked=0, Total=702 [2018-01-24 15:26:08,103 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2018-01-24 15:26:08,116 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 73. [2018-01-24 15:26:08,116 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 73 states. [2018-01-24 15:26:08,117 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 79 transitions. [2018-01-24 15:26:08,117 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 79 transitions. Word has length 44 [2018-01-24 15:26:08,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:26:08,118 INFO L432 AbstractCegarLoop]: Abstraction has 73 states and 79 transitions. [2018-01-24 15:26:08,118 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 15:26:08,118 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 79 transitions. [2018-01-24 15:26:08,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-24 15:26:08,119 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:26:08,119 INFO L322 BasicCegarLoop]: trace histogram [7, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:26:08,119 INFO L371 AbstractCegarLoop]: === Iteration 10 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:26:08,120 INFO L82 PathProgramCache]: Analyzing trace with hash -2113361741, now seen corresponding path program 1 times [2018-01-24 15:26:08,120 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:26:08,120 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:26:08,121 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:26:08,121 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:26:08,121 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:26:08,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:26:08,132 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:26:08,170 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 15:26:08,170 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 15:26:08,171 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 15:26:08,171 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:26:08,171 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 15:26:08,171 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 15:26:08,171 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 15:26:08,171 INFO L87 Difference]: Start difference. First operand 73 states and 79 transitions. Second operand 4 states. [2018-01-24 15:26:08,277 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:26:08,278 INFO L93 Difference]: Finished difference Result 73 states and 79 transitions. [2018-01-24 15:26:08,278 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 15:26:08,278 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 44 [2018-01-24 15:26:08,278 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:26:08,279 INFO L225 Difference]: With dead ends: 73 [2018-01-24 15:26:08,279 INFO L226 Difference]: Without dead ends: 71 [2018-01-24 15:26:08,280 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 15:26:08,280 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states. [2018-01-24 15:26:08,286 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 71. [2018-01-24 15:26:08,286 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71 states. [2018-01-24 15:26:08,287 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 72 transitions. [2018-01-24 15:26:08,287 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 72 transitions. Word has length 44 [2018-01-24 15:26:08,287 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:26:08,287 INFO L432 AbstractCegarLoop]: Abstraction has 71 states and 72 transitions. [2018-01-24 15:26:08,287 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 15:26:08,287 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 72 transitions. [2018-01-24 15:26:08,288 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-01-24 15:26:08,289 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:26:08,289 INFO L322 BasicCegarLoop]: trace histogram [7, 7, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:26:08,289 INFO L371 AbstractCegarLoop]: === Iteration 11 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:26:08,289 INFO L82 PathProgramCache]: Analyzing trace with hash -747893621, now seen corresponding path program 1 times [2018-01-24 15:26:08,289 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:26:08,290 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:26:08,290 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:26:08,290 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:26:08,290 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:26:08,305 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:26:08,306 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:26:08,613 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 15:26:08,613 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:08,613 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:26:08,614 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 71 with the following transitions: [2018-01-24 15:26:08,614 INFO L201 CegarAbsIntRunner]: [0], [1], [2], [6], [9], [11], [12], [16], [20], [24], [27], [29], [30], [34], [38], [42], [43], [44], [45], [46], [47], [50], [54], [76], [77], [78], [80], [81] [2018-01-24 15:26:08,615 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 15:26:08,615 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 15:26:14,148 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 15:26:14,148 INFO L268 AbstractInterpreter]: Visited 28 different actions 74 times. Merged at 14 different actions 41 times. Never widened. Found 7 fixpoints after 4 different actions. Largest state had 26 variables. [2018-01-24 15:26:14,153 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 15:26:14,153 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:14,153 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:26:14,159 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:26:14,159 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:26:14,182 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:26:14,187 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:26:14,343 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 15:26:14,344 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:26:14,600 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 15:26:14,622 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:14,622 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:26:14,625 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:26:14,625 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:26:14,677 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:26:14,682 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:26:14,694 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 15:26:14,695 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:26:14,795 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 15:26:14,797 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:26:14,797 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 11, 10, 11] total 26 [2018-01-24 15:26:14,797 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:26:14,798 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-24 15:26:14,798 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-24 15:26:14,798 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=238, Invalid=412, Unknown=0, NotChecked=0, Total=650 [2018-01-24 15:26:14,799 INFO L87 Difference]: Start difference. First operand 71 states and 72 transitions. Second operand 18 states. [2018-01-24 15:26:15,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:26:15,044 INFO L93 Difference]: Finished difference Result 114 states and 117 transitions. [2018-01-24 15:26:15,044 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 15:26:15,044 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 70 [2018-01-24 15:26:15,044 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:26:15,045 INFO L225 Difference]: With dead ends: 114 [2018-01-24 15:26:15,045 INFO L226 Difference]: Without dead ends: 83 [2018-01-24 15:26:15,046 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 290 GetRequests, 261 SyntacticMatches, 4 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 227 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=263, Invalid=439, Unknown=0, NotChecked=0, Total=702 [2018-01-24 15:26:15,046 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2018-01-24 15:26:15,055 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 79. [2018-01-24 15:26:15,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-01-24 15:26:15,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 80 transitions. [2018-01-24 15:26:15,056 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 80 transitions. Word has length 70 [2018-01-24 15:26:15,056 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:26:15,056 INFO L432 AbstractCegarLoop]: Abstraction has 79 states and 80 transitions. [2018-01-24 15:26:15,056 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-24 15:26:15,057 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 80 transitions. [2018-01-24 15:26:15,058 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-01-24 15:26:15,058 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:26:15,058 INFO L322 BasicCegarLoop]: trace histogram [8, 8, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:26:15,058 INFO L371 AbstractCegarLoop]: === Iteration 12 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:26:15,059 INFO L82 PathProgramCache]: Analyzing trace with hash 1885472427, now seen corresponding path program 2 times [2018-01-24 15:26:15,059 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:26:15,059 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:26:15,060 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:26:15,060 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:26:15,060 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:26:15,078 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:26:15,079 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:26:15,387 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-24 15:26:15,388 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:15,388 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:26:15,388 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:26:15,388 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:26:15,388 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:15,388 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:26:15,396 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:26:15,396 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:26:15,417 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:15,434 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:15,436 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:26:15,439 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:26:15,691 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-24 15:26:15,691 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:26:16,127 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-24 15:26:16,148 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:16,149 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 14 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:26:16,152 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:26:16,152 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:26:16,174 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:16,225 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:16,246 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:26:16,251 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:26:16,262 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-24 15:26:16,263 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:26:16,410 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-24 15:26:16,412 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:26:16,412 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 12, 11, 12] total 29 [2018-01-24 15:26:16,412 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:26:16,413 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-24 15:26:16,413 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-24 15:26:16,413 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=299, Invalid=513, Unknown=0, NotChecked=0, Total=812 [2018-01-24 15:26:16,414 INFO L87 Difference]: Start difference. First operand 79 states and 80 transitions. Second operand 20 states. [2018-01-24 15:26:16,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:26:16,803 INFO L93 Difference]: Finished difference Result 126 states and 129 transitions. [2018-01-24 15:26:16,803 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-24 15:26:16,803 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 78 [2018-01-24 15:26:16,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:26:16,804 INFO L225 Difference]: With dead ends: 126 [2018-01-24 15:26:16,804 INFO L226 Difference]: Without dead ends: 91 [2018-01-24 15:26:16,805 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 323 GetRequests, 291 SyntacticMatches, 4 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 296 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=327, Invalid=543, Unknown=0, NotChecked=0, Total=870 [2018-01-24 15:26:16,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2018-01-24 15:26:16,827 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 87. [2018-01-24 15:26:16,827 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2018-01-24 15:26:16,828 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 88 transitions. [2018-01-24 15:26:16,828 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 88 transitions. Word has length 78 [2018-01-24 15:26:16,828 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:26:16,828 INFO L432 AbstractCegarLoop]: Abstraction has 87 states and 88 transitions. [2018-01-24 15:26:16,829 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-24 15:26:16,829 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 88 transitions. [2018-01-24 15:26:16,830 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-01-24 15:26:16,830 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:26:16,831 INFO L322 BasicCegarLoop]: trace histogram [9, 9, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:26:16,831 INFO L371 AbstractCegarLoop]: === Iteration 13 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:26:16,831 INFO L82 PathProgramCache]: Analyzing trace with hash 2069780427, now seen corresponding path program 3 times [2018-01-24 15:26:16,831 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:26:16,832 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:26:16,832 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:26:16,832 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:26:16,832 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:26:16,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:26:16,858 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:26:17,136 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2018-01-24 15:26:17,164 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:17,164 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:26:17,165 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:26:17,165 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:26:17,165 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:17,165 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:26:17,176 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 15:26:17,176 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 15:26:17,195 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:17,201 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:17,205 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:17,212 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:17,219 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:17,235 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:17,261 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:17,297 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:17,327 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:17,329 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:26:17,334 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:26:17,574 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2018-01-24 15:26:17,574 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:26:17,968 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 0 proven. 158 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-24 15:26:17,989 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:17,989 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 16 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:26:17,996 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 15:26:17,996 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 15:26:18,021 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:18,052 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:18,091 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:18,136 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:18,191 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:18,280 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:18,398 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:18,601 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:18,797 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:18,833 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:26:18,842 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:26:18,860 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2018-01-24 15:26:18,860 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:26:18,973 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2018-01-24 15:26:18,976 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:26:18,976 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 14, 15, 12, 13] total 36 [2018-01-24 15:26:18,976 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:26:18,977 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-24 15:26:18,977 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-24 15:26:18,977 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=418, Invalid=842, Unknown=0, NotChecked=0, Total=1260 [2018-01-24 15:26:18,977 INFO L87 Difference]: Start difference. First operand 87 states and 88 transitions. Second operand 24 states. [2018-01-24 15:26:19,395 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:26:19,395 INFO L93 Difference]: Finished difference Result 138 states and 141 transitions. [2018-01-24 15:26:19,395 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-24 15:26:19,395 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 86 [2018-01-24 15:26:19,396 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:26:19,396 INFO L225 Difference]: With dead ends: 138 [2018-01-24 15:26:19,397 INFO L226 Difference]: Without dead ends: 99 [2018-01-24 15:26:19,397 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 357 GetRequests, 317 SyntacticMatches, 4 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 498 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=457, Invalid=949, Unknown=0, NotChecked=0, Total=1406 [2018-01-24 15:26:19,398 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-01-24 15:26:19,409 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 95. [2018-01-24 15:26:19,410 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95 states. [2018-01-24 15:26:19,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 96 transitions. [2018-01-24 15:26:19,410 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 96 transitions. Word has length 86 [2018-01-24 15:26:19,410 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:26:19,410 INFO L432 AbstractCegarLoop]: Abstraction has 95 states and 96 transitions. [2018-01-24 15:26:19,411 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-24 15:26:19,411 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 96 transitions. [2018-01-24 15:26:19,412 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 95 [2018-01-24 15:26:19,412 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:26:19,412 INFO L322 BasicCegarLoop]: trace histogram [10, 10, 9, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:26:19,412 INFO L371 AbstractCegarLoop]: === Iteration 14 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:26:19,412 INFO L82 PathProgramCache]: Analyzing trace with hash 67534827, now seen corresponding path program 4 times [2018-01-24 15:26:19,413 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:26:19,413 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:26:19,413 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:26:19,414 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:26:19,414 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:26:19,429 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:26:19,430 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:26:19,794 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 0 proven. 162 refuted. 0 times theorem prover too weak. 162 trivial. 0 not checked. [2018-01-24 15:26:19,794 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:19,794 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:26:19,794 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:26:19,795 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:26:19,795 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:19,795 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:26:19,804 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-24 15:26:19,804 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-24 15:26:19,849 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:26:19,853 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:26:19,871 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 15:26:19,872 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:26:19,897 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:26:19,897 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:8, output treesize:7 [2018-01-24 15:26:21,568 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 162 proven. 162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:26:21,568 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:26:22,356 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 15:26:22,514 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 15:26:22,792 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 15:26:23,019 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 15:26:23,096 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:26:23,098 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:26:23,101 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:26:23,105 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 15:26:23,319 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 15:26:23,383 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:26:23,386 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:26:23,388 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:26:23,390 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 15:26:24,109 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 162 proven. 162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:26:24,130 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:24,130 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 18 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:26:24,133 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-24 15:26:24,133 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-24 15:26:24,187 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:26:24,193 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:26:24,195 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 15:26:24,195 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:26:24,201 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:26:24,201 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:12, output treesize:11 [2018-01-24 15:26:24,255 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 162 proven. 162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:26:24,255 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:26:24,637 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 15:26:24,800 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 15:26:25,100 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 15:26:25,103 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:26:25,105 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:26:25,107 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:26:25,109 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 15:26:25,347 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 15:26:25,351 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:26:25,354 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:26:25,356 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-24 15:26:25,360 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 15:26:25,468 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 162 proven. 162 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:26:25,469 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:26:25,469 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 25, 26, 24, 25] total 63 [2018-01-24 15:26:25,470 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:26:25,470 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-01-24 15:26:25,470 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-01-24 15:26:25,471 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=782, Invalid=3124, Unknown=0, NotChecked=0, Total=3906 [2018-01-24 15:26:25,471 INFO L87 Difference]: Start difference. First operand 95 states and 96 transitions. Second operand 37 states. [2018-01-24 15:26:26,035 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:26:26,036 INFO L93 Difference]: Finished difference Result 150 states and 153 transitions. [2018-01-24 15:26:26,036 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-24 15:26:26,036 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 94 [2018-01-24 15:26:26,036 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:26:26,037 INFO L225 Difference]: With dead ends: 150 [2018-01-24 15:26:26,037 INFO L226 Difference]: Without dead ends: 107 [2018-01-24 15:26:26,039 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 404 GetRequests, 284 SyntacticMatches, 44 SemanticMatches, 76 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4563 ImplicationChecksByTransitivity, 5.4s TimeCoverageRelationStatistics Valid=1178, Invalid=4828, Unknown=0, NotChecked=0, Total=6006 [2018-01-24 15:26:26,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2018-01-24 15:26:26,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 103. [2018-01-24 15:26:26,054 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 103 states. [2018-01-24 15:26:26,055 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 103 states to 103 states and 104 transitions. [2018-01-24 15:26:26,055 INFO L78 Accepts]: Start accepts. Automaton has 103 states and 104 transitions. Word has length 94 [2018-01-24 15:26:26,055 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:26:26,056 INFO L432 AbstractCegarLoop]: Abstraction has 103 states and 104 transitions. [2018-01-24 15:26:26,056 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-01-24 15:26:26,056 INFO L276 IsEmpty]: Start isEmpty. Operand 103 states and 104 transitions. [2018-01-24 15:26:26,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-01-24 15:26:26,058 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:26:26,058 INFO L322 BasicCegarLoop]: trace histogram [11, 11, 10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:26:26,058 INFO L371 AbstractCegarLoop]: === Iteration 15 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:26:26,058 INFO L82 PathProgramCache]: Analyzing trace with hash 306183947, now seen corresponding path program 5 times [2018-01-24 15:26:26,058 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:26:26,059 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:26:26,059 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:26:26,060 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:26:26,060 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:26:26,081 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:26:26,083 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:26:26,227 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 0 proven. 200 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2018-01-24 15:26:26,228 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:26,228 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:26:26,228 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:26:26,228 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:26:26,228 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:26,228 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:26:26,234 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-24 15:26:26,234 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:26:26,243 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:26,249 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:26,252 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:26,261 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:26,271 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:26,296 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:26,341 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:26,379 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:26,602 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:26,650 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:27,399 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:27,403 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:26:27,408 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:26:27,420 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 0 proven. 200 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2018-01-24 15:26:27,421 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:26:27,553 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 0 proven. 200 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2018-01-24 15:26:27,575 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:27,576 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 20 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:26:27,578 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-24 15:26:27,579 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:26:27,588 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:27,594 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:27,604 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:27,618 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:27,648 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:27,688 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:27,746 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:27,822 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:28,057 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:28,379 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:28,883 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:28,922 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:26:28,928 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:26:28,936 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 0 proven. 200 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2018-01-24 15:26:28,937 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:26:28,959 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 0 proven. 200 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2018-01-24 15:26:28,961 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:26:28,961 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 13, 13, 13, 13] total 27 [2018-01-24 15:26:28,961 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:26:28,961 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-24 15:26:28,962 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-24 15:26:28,962 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=304, Invalid=398, Unknown=0, NotChecked=0, Total=702 [2018-01-24 15:26:28,962 INFO L87 Difference]: Start difference. First operand 103 states and 104 transitions. Second operand 16 states. [2018-01-24 15:26:29,141 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:26:29,141 INFO L93 Difference]: Finished difference Result 162 states and 165 transitions. [2018-01-24 15:26:29,141 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-24 15:26:29,141 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 102 [2018-01-24 15:26:29,142 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:26:29,142 INFO L225 Difference]: With dead ends: 162 [2018-01-24 15:26:29,142 INFO L226 Difference]: Without dead ends: 115 [2018-01-24 15:26:29,143 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 443 GetRequests, 407 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 114 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=580, Invalid=826, Unknown=0, NotChecked=0, Total=1406 [2018-01-24 15:26:29,143 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-01-24 15:26:29,154 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 111. [2018-01-24 15:26:29,154 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-01-24 15:26:29,155 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 112 transitions. [2018-01-24 15:26:29,155 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 112 transitions. Word has length 102 [2018-01-24 15:26:29,155 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:26:29,155 INFO L432 AbstractCegarLoop]: Abstraction has 111 states and 112 transitions. [2018-01-24 15:26:29,155 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-24 15:26:29,155 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 112 transitions. [2018-01-24 15:26:29,156 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2018-01-24 15:26:29,156 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:26:29,156 INFO L322 BasicCegarLoop]: trace histogram [12, 12, 11, 11, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:26:29,156 INFO L371 AbstractCegarLoop]: === Iteration 16 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:26:29,156 INFO L82 PathProgramCache]: Analyzing trace with hash -2043652821, now seen corresponding path program 6 times [2018-01-24 15:26:29,156 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:26:29,157 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:26:29,157 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:26:29,157 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:26:29,157 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:26:29,177 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:26:29,178 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:26:29,414 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 242 trivial. 0 not checked. [2018-01-24 15:26:29,414 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:29,415 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:26:29,415 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:26:29,415 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:26:29,415 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:29,415 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:26:29,422 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-24 15:26:29,422 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-24 15:26:29,438 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:26:29,442 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:26:29,445 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:26:29,451 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:26:29,462 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:26:29,476 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:26:29,515 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:26:29,614 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:26:29,654 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:26:29,683 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:26:29,755 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:26:29,817 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:26:29,819 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:26:29,824 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:26:29,851 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 242 trivial. 0 not checked. [2018-01-24 15:26:29,851 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:26:30,040 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 242 trivial. 0 not checked. [2018-01-24 15:26:30,076 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:30,076 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 22 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:26:30,081 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-24 15:26:30,082 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-24 15:26:30,117 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:26:30,155 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:26:30,191 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:26:30,252 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:26:30,339 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:26:30,427 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:26:30,518 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:26:30,647 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:26:30,808 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:26:31,059 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:26:31,287 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:26:31,543 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:26:31,571 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:26:31,578 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:26:31,588 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 242 trivial. 0 not checked. [2018-01-24 15:26:31,588 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:26:31,635 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 242 trivial. 0 not checked. [2018-01-24 15:26:31,637 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:26:31,637 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 14, 14, 14, 14] total 29 [2018-01-24 15:26:31,637 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:26:31,638 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-24 15:26:31,638 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-24 15:26:31,638 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=355, Invalid=457, Unknown=0, NotChecked=0, Total=812 [2018-01-24 15:26:31,638 INFO L87 Difference]: Start difference. First operand 111 states and 112 transitions. Second operand 17 states. [2018-01-24 15:26:32,003 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:26:32,003 INFO L93 Difference]: Finished difference Result 174 states and 177 transitions. [2018-01-24 15:26:32,003 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-24 15:26:32,003 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 110 [2018-01-24 15:26:32,004 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:26:32,004 INFO L225 Difference]: With dead ends: 174 [2018-01-24 15:26:32,004 INFO L226 Difference]: Without dead ends: 123 [2018-01-24 15:26:32,005 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 478 GetRequests, 439 SyntacticMatches, 0 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 131 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=680, Invalid=960, Unknown=0, NotChecked=0, Total=1640 [2018-01-24 15:26:32,006 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2018-01-24 15:26:32,020 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 119. [2018-01-24 15:26:32,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-01-24 15:26:32,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 120 transitions. [2018-01-24 15:26:32,020 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 120 transitions. Word has length 110 [2018-01-24 15:26:32,021 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:26:32,021 INFO L432 AbstractCegarLoop]: Abstraction has 119 states and 120 transitions. [2018-01-24 15:26:32,021 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-24 15:26:32,021 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 120 transitions. [2018-01-24 15:26:32,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2018-01-24 15:26:32,022 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:26:32,022 INFO L322 BasicCegarLoop]: trace histogram [13, 13, 12, 12, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:26:32,023 INFO L371 AbstractCegarLoop]: === Iteration 17 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:26:32,023 INFO L82 PathProgramCache]: Analyzing trace with hash -130219445, now seen corresponding path program 7 times [2018-01-24 15:26:32,023 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:26:32,024 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:26:32,024 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:26:32,024 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:26:32,024 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:26:32,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:26:32,045 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:26:32,265 INFO L134 CoverageAnalysis]: Checked inductivity of 576 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 288 trivial. 0 not checked. [2018-01-24 15:26:32,265 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:32,265 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:26:32,265 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:26:32,265 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:26:32,265 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:32,265 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:26:32,282 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:26:32,282 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:26:32,334 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:26:32,338 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:26:32,527 INFO L134 CoverageAnalysis]: Checked inductivity of 576 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 288 trivial. 0 not checked. [2018-01-24 15:26:32,528 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:26:32,839 INFO L134 CoverageAnalysis]: Checked inductivity of 576 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 288 trivial. 0 not checked. [2018-01-24 15:26:32,859 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:32,859 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 24 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:26:32,862 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:26:32,862 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:26:32,930 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:26:32,937 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:26:32,960 INFO L134 CoverageAnalysis]: Checked inductivity of 576 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 288 trivial. 0 not checked. [2018-01-24 15:26:32,960 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:26:33,093 INFO L134 CoverageAnalysis]: Checked inductivity of 576 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 288 trivial. 0 not checked. [2018-01-24 15:26:33,094 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:26:33,095 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 16, 17, 16, 17] total 44 [2018-01-24 15:26:33,095 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:26:33,095 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-24 15:26:33,095 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-24 15:26:33,096 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=709, Invalid=1183, Unknown=0, NotChecked=0, Total=1892 [2018-01-24 15:26:33,096 INFO L87 Difference]: Start difference. First operand 119 states and 120 transitions. Second operand 30 states. [2018-01-24 15:26:33,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:26:33,293 INFO L93 Difference]: Finished difference Result 186 states and 189 transitions. [2018-01-24 15:26:33,293 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-24 15:26:33,293 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 118 [2018-01-24 15:26:33,293 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:26:33,294 INFO L225 Difference]: With dead ends: 186 [2018-01-24 15:26:33,294 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 15:26:33,295 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 488 GetRequests, 441 SyntacticMatches, 4 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 776 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=752, Invalid=1228, Unknown=0, NotChecked=0, Total=1980 [2018-01-24 15:26:33,295 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 15:26:33,305 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 127. [2018-01-24 15:26:33,305 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-01-24 15:26:33,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 128 transitions. [2018-01-24 15:26:33,306 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 128 transitions. Word has length 118 [2018-01-24 15:26:33,306 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:26:33,306 INFO L432 AbstractCegarLoop]: Abstraction has 127 states and 128 transitions. [2018-01-24 15:26:33,306 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-24 15:26:33,306 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 128 transitions. [2018-01-24 15:26:33,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 127 [2018-01-24 15:26:33,307 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:26:33,307 INFO L322 BasicCegarLoop]: trace histogram [14, 14, 13, 13, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:26:33,307 INFO L371 AbstractCegarLoop]: === Iteration 18 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:26:33,308 INFO L82 PathProgramCache]: Analyzing trace with hash -1727297941, now seen corresponding path program 8 times [2018-01-24 15:26:33,308 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:26:33,308 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:26:33,308 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:26:33,308 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:26:33,308 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:26:33,323 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:26:33,324 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:26:33,564 INFO L134 CoverageAnalysis]: Checked inductivity of 676 backedges. 0 proven. 338 refuted. 0 times theorem prover too weak. 338 trivial. 0 not checked. [2018-01-24 15:26:33,564 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:33,564 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:26:33,564 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:26:33,565 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:26:33,565 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:33,565 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:26:33,571 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:26:33,571 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:26:33,588 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:33,606 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:33,609 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:26:33,611 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:26:33,782 INFO L134 CoverageAnalysis]: Checked inductivity of 676 backedges. 0 proven. 338 refuted. 0 times theorem prover too weak. 338 trivial. 0 not checked. [2018-01-24 15:26:33,782 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:26:34,147 INFO L134 CoverageAnalysis]: Checked inductivity of 676 backedges. 0 proven. 338 refuted. 0 times theorem prover too weak. 338 trivial. 0 not checked. [2018-01-24 15:26:34,168 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:34,168 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 26 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:26:34,172 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:26:34,172 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:26:34,195 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:34,248 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:26:34,276 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:26:34,282 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:26:34,300 INFO L134 CoverageAnalysis]: Checked inductivity of 676 backedges. 0 proven. 338 refuted. 0 times theorem prover too weak. 338 trivial. 0 not checked. [2018-01-24 15:26:34,301 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:26:34,488 INFO L134 CoverageAnalysis]: Checked inductivity of 676 backedges. 0 proven. 338 refuted. 0 times theorem prover too weak. 338 trivial. 0 not checked. [2018-01-24 15:26:34,490 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:26:34,490 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 17, 18, 17, 18] total 47 [2018-01-24 15:26:34,490 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:26:34,491 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-24 15:26:34,491 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-24 15:26:34,492 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=812, Invalid=1350, Unknown=0, NotChecked=0, Total=2162 [2018-01-24 15:26:34,492 INFO L87 Difference]: Start difference. First operand 127 states and 128 transitions. Second operand 32 states. [2018-01-24 15:26:34,713 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:26:34,713 INFO L93 Difference]: Finished difference Result 198 states and 201 transitions. [2018-01-24 15:26:34,713 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-24 15:26:34,713 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 126 [2018-01-24 15:26:34,713 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:26:34,714 INFO L225 Difference]: With dead ends: 198 [2018-01-24 15:26:34,714 INFO L226 Difference]: Without dead ends: 139 [2018-01-24 15:26:34,715 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 521 GetRequests, 471 SyntacticMatches, 4 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 899 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=858, Invalid=1398, Unknown=0, NotChecked=0, Total=2256 [2018-01-24 15:26:34,715 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-01-24 15:26:34,726 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 135. [2018-01-24 15:26:34,726 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-01-24 15:26:34,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 136 transitions. [2018-01-24 15:26:34,727 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 136 transitions. Word has length 126 [2018-01-24 15:26:34,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:26:34,727 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 136 transitions. [2018-01-24 15:26:34,727 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-24 15:26:34,727 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 136 transitions. [2018-01-24 15:26:34,729 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2018-01-24 15:26:34,729 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:26:34,729 INFO L322 BasicCegarLoop]: trace histogram [15, 15, 14, 14, 14, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:26:34,729 INFO L371 AbstractCegarLoop]: === Iteration 19 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:26:34,729 INFO L82 PathProgramCache]: Analyzing trace with hash 293691787, now seen corresponding path program 9 times [2018-01-24 15:26:34,730 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:26:34,730 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:26:34,730 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:26:34,730 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:26:34,731 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:26:34,751 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:26:34,752 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:26:35,231 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 392 trivial. 0 not checked. [2018-01-24 15:26:35,231 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:35,231 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:26:35,231 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:26:35,232 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:26:35,232 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:35,232 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:26:35,238 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 15:26:35,238 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 15:26:35,257 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:35,270 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:35,278 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:35,287 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:35,293 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:35,305 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:35,325 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:35,360 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:35,391 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:35,419 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:35,500 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:35,639 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:35,718 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:35,782 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:36,172 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:36,174 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:26:36,180 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:26:36,221 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 392 trivial. 0 not checked. [2018-01-24 15:26:36,222 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:26:36,463 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 392 trivial. 0 not checked. [2018-01-24 15:26:36,500 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:26:36,500 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 28 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:26:36,505 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 15:26:36,505 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 15:26:36,543 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:36,591 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:36,627 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:36,671 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:36,734 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:36,805 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:36,952 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:37,190 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:37,376 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:37,606 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command Received shutdown request... [2018-01-24 15:26:37,912 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:38,307 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:38,704 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:39,253 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:39,853 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:26:39,915 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:26:39,924 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:26:39,927 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-24 15:26:39,927 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-24 15:26:39,930 WARN L187 ceAbstractionStarter]: Timeout [2018-01-24 15:26:39,931 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.01 03:26:39 BoogieIcfgContainer [2018-01-24 15:26:39,931 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-24 15:26:39,931 INFO L168 Benchmark]: Toolchain (without parser) took 45338.94 ms. Allocated memory was 294.1 MB in the beginning and 1.1 GB in the end (delta: 815.8 MB). Free memory was 254.2 MB in the beginning and 939.1 MB in the end (delta: -684.9 MB). Peak memory consumption was 130.9 MB. Max. memory is 5.3 GB. [2018-01-24 15:26:39,932 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 294.1 MB. Free memory is still 260.2 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-24 15:26:39,932 INFO L168 Benchmark]: CACSL2BoogieTranslator took 201.26 ms. Allocated memory is still 294.1 MB. Free memory was 253.2 MB in the beginning and 243.1 MB in the end (delta: 10.1 MB). Peak memory consumption was 10.1 MB. Max. memory is 5.3 GB. [2018-01-24 15:26:39,932 INFO L168 Benchmark]: Boogie Preprocessor took 30.59 ms. Allocated memory is still 294.1 MB. Free memory was 243.1 MB in the beginning and 241.1 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-24 15:26:39,933 INFO L168 Benchmark]: RCFGBuilder took 288.28 ms. Allocated memory is still 294.1 MB. Free memory was 241.1 MB in the beginning and 223.5 MB in the end (delta: 17.6 MB). Peak memory consumption was 17.6 MB. Max. memory is 5.3 GB. [2018-01-24 15:26:39,933 INFO L168 Benchmark]: TraceAbstraction took 44812.91 ms. Allocated memory was 294.1 MB in the beginning and 1.1 GB in the end (delta: 815.8 MB). Free memory was 223.5 MB in the beginning and 939.1 MB in the end (delta: -715.6 MB). Peak memory consumption was 100.2 MB. Max. memory is 5.3 GB. [2018-01-24 15:26:39,935 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 294.1 MB. Free memory is still 260.2 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 201.26 ms. Allocated memory is still 294.1 MB. Free memory was 253.2 MB in the beginning and 243.1 MB in the end (delta: 10.1 MB). Peak memory consumption was 10.1 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 30.59 ms. Allocated memory is still 294.1 MB. Free memory was 243.1 MB in the beginning and 241.1 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 288.28 ms. Allocated memory is still 294.1 MB. Free memory was 241.1 MB in the beginning and 223.5 MB in the end (delta: 17.6 MB). Peak memory consumption was 17.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 44812.91 ms. Allocated memory was 294.1 MB in the beginning and 1.1 GB in the end (delta: 815.8 MB). Free memory was 223.5 MB in the beginning and 939.1 MB in the end (delta: -715.6 MB). Peak memory consumption was 100.2 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 18 LocStat_MAX_WEQGRAPH_SIZE : 8 LocStat_MAX_SIZEOF_WEQEDGELABEL : 2 LocStat_NO_SUPPORTING_EQUALITIES : 263 LocStat_NO_SUPPORTING_DISEQUALITIES : 38 LocStat_NO_DISJUNCTIONS : -36 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 25 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 65 TransStat_NO_SUPPORTING_DISEQUALITIES : 4 TransStat_NO_DISJUNCTIONS : 26 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 6.120725 RENAME_VARIABLES(MILLISECONDS) : 1.077324 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 3.022139 PROJECTAWAY(MILLISECONDS) : 0.099704 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.110949 DISJOIN(MILLISECONDS) : 0.525725 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 1.100761 ADD_EQUALITY(MILLISECONDS) : 0.047391 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.032432 #CONJOIN_DISJUNCTIVE : 48 #RENAME_VARIABLES : 88 #UNFREEZE : 0 #CONJOIN : 107 #PROJECTAWAY : 72 #ADD_WEAK_EQUALITY : 9 #DISJOIN : 9 #RENAME_VARIABLES_DISJUNCTIVE : 83 #ADD_EQUALITY : 67 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 22 LocStat_MAX_WEQGRAPH_SIZE : 8 LocStat_MAX_SIZEOF_WEQEDGELABEL : 2 LocStat_NO_SUPPORTING_EQUALITIES : 337 LocStat_NO_SUPPORTING_DISEQUALITIES : 50 LocStat_NO_DISJUNCTIONS : -44 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 29 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 67 TransStat_NO_SUPPORTING_DISEQUALITIES : 4 TransStat_NO_DISJUNCTIONS : 30 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 7.159943 RENAME_VARIABLES(MILLISECONDS) : 0.996481 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 3.423479 PROJECTAWAY(MILLISECONDS) : 0.075203 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.048787 DISJOIN(MILLISECONDS) : 0.468960 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 1.024567 ADD_EQUALITY(MILLISECONDS) : 0.020566 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.008148 #CONJOIN_DISJUNCTIVE : 69 #RENAME_VARIABLES : 130 #UNFREEZE : 0 #CONJOIN : 128 #PROJECTAWAY : 97 #ADD_WEAK_EQUALITY : 9 #DISJOIN : 13 #RENAME_VARIABLES_DISJUNCTIVE : 125 #ADD_EQUALITY : 69 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 26 LocStat_MAX_WEQGRAPH_SIZE : 8 LocStat_MAX_SIZEOF_WEQEDGELABEL : 2 LocStat_NO_SUPPORTING_EQUALITIES : 389 LocStat_NO_SUPPORTING_DISEQUALITIES : 62 LocStat_NO_DISJUNCTIONS : -52 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 34 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 71 TransStat_NO_SUPPORTING_DISEQUALITIES : 4 TransStat_NO_DISJUNCTIONS : 35 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 3.770124 RENAME_VARIABLES(MILLISECONDS) : 0.116137 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 2.210035 PROJECTAWAY(MILLISECONDS) : 0.037963 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.053352 DISJOIN(MILLISECONDS) : 0.354767 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.133126 ADD_EQUALITY(MILLISECONDS) : 0.016314 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.008723 #CONJOIN_DISJUNCTIVE : 126 #RENAME_VARIABLES : 273 #UNFREEZE : 0 #CONJOIN : 230 #PROJECTAWAY : 200 #ADD_WEAK_EQUALITY : 11 #DISJOIN : 27 #RENAME_VARIABLES_DISJUNCTIVE : 270 #ADD_EQUALITY : 74 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 2 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 625). Cancelled while BasicCegarLoop was analyzing trace of length 135 with TraceHistMax 15, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 35 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 625). Cancelled while BasicCegarLoop was analyzing trace of length 135 with TraceHistMax 15, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 35 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 627). Cancelled while BasicCegarLoop was analyzing trace of length 135 with TraceHistMax 15, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 35 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 627). Cancelled while BasicCegarLoop was analyzing trace of length 135 with TraceHistMax 15, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 35 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 637). Cancelled while BasicCegarLoop was analyzing trace of length 135 with TraceHistMax 15, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 35 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 634). Cancelled while BasicCegarLoop was analyzing trace of length 135 with TraceHistMax 15, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 35 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 639). Cancelled while BasicCegarLoop was analyzing trace of length 135 with TraceHistMax 15, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 35 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 634). Cancelled while BasicCegarLoop was analyzing trace of length 135 with TraceHistMax 15, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 35 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 636). Cancelled while BasicCegarLoop was analyzing trace of length 135 with TraceHistMax 15, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 35 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 637). Cancelled while BasicCegarLoop was analyzing trace of length 135 with TraceHistMax 15, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 35 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 639). Cancelled while BasicCegarLoop was analyzing trace of length 135 with TraceHistMax 15, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 35 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 639). Cancelled while BasicCegarLoop was analyzing trace of length 135 with TraceHistMax 15, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 35 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 639). Cancelled while BasicCegarLoop was analyzing trace of length 135 with TraceHistMax 15, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 35 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 636). Cancelled while BasicCegarLoop was analyzing trace of length 135 with TraceHistMax 15, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 35 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 637). Cancelled while BasicCegarLoop was analyzing trace of length 135 with TraceHistMax 15, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 35 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 637). Cancelled while BasicCegarLoop was analyzing trace of length 135 with TraceHistMax 15, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 35 known predicates. - TimeoutResultAtElement [Line: 629]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 629). Cancelled while BasicCegarLoop was analyzing trace of length 135 with TraceHistMax 15, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 35 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 53 locations, 17 error locations. TIMEOUT Result, 44.7s OverallTime, 19 OverallIterations, 15 TraceHistogramMax, 5.7s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 447 SDtfs, 2498 SDslu, 2367 SDs, 0 SdLazy, 2708 SolverSat, 582 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 3.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 3949 GetRequests, 3381 SyntacticMatches, 78 SemanticMatches, 490 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8740 ImplicationChecksByTransitivity, 14.9s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=135occurred in iteration=18, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 8.3s AbstIntTime, 3 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.2s AutomataMinimizationTime, 18 MinimizatonAttempts, 89 StatesRemovedByMinimization, 13 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 6.3s SatisfiabilityAnalysisTime, 17.8s InterpolantComputationTime, 2885 NumberOfCodeBlocks, 2823 NumberOfCodeBlocksAsserted, 109 NumberOfCheckSat, 4659 ConstructedInterpolants, 374 QuantifiedInterpolants, 2280363 SizeOfPredicates, 86 NumberOfNonLiveVariables, 5957 ConjunctsInSsa, 377 ConjunctsInUnsatCore, 68 InterpolantComputations, 7 PerfectInterpolantSequences, 7882/15988 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/960521-1_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-24_15-26-39-948.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/960521-1_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-24_15-26-39-948.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/960521-1_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-24_15-26-39-948.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/960521-1_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-VPDomainBenchmark-1-2018-01-24_15-26-39-948.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/960521-1_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-1-2018-01-24_15-26-39-948.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/960521-1_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-VPDomainBenchmark-2-2018-01-24_15-26-39-948.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/960521-1_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-2-2018-01-24_15-26-39-948.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/960521-1_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-24_15-26-39-948.csv Completed graceful shutdown