java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf -i ../../../trunk/examples/svcomp/memsafety/960521-1_true-valid-memsafety.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-24 15:31:24,449 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-24 15:31:24,451 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-24 15:31:24,466 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-24 15:31:24,466 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-24 15:31:24,467 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-24 15:31:24,468 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-24 15:31:24,470 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-24 15:31:24,472 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-24 15:31:24,472 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-24 15:31:24,473 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-24 15:31:24,474 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-24 15:31:24,474 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-24 15:31:24,476 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-24 15:31:24,477 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-24 15:31:24,479 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-24 15:31:24,481 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-24 15:31:24,483 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-24 15:31:24,484 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-24 15:31:24,486 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-24 15:31:24,488 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-01-24 15:31:24,493 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-24 15:31:24,493 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-24 15:31:24,494 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf [2018-01-24 15:31:24,502 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-24 15:31:24,502 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-24 15:31:24,503 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-24 15:31:24,503 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-24 15:31:24,503 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-24 15:31:24,503 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-24 15:31:24,504 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-24 15:31:24,504 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-24 15:31:24,504 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-24 15:31:24,504 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-24 15:31:24,504 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-24 15:31:24,504 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-24 15:31:24,505 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-24 15:31:24,505 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-24 15:31:24,505 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-24 15:31:24,505 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-24 15:31:24,505 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-24 15:31:24,505 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-24 15:31:24,505 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-24 15:31:24,505 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-24 15:31:24,506 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-24 15:31:24,506 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-24 15:31:24,506 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-24 15:31:24,506 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 15:31:24,506 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-24 15:31:24,506 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-24 15:31:24,507 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-24 15:31:24,507 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-24 15:31:24,507 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-24 15:31:24,507 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-24 15:31:24,507 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-24 15:31:24,507 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-24 15:31:24,507 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-24 15:31:24,508 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-24 15:31:24,508 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-24 15:31:24,541 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-24 15:31:24,552 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-24 15:31:24,555 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-24 15:31:24,556 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-24 15:31:24,556 INFO L276 PluginConnector]: CDTParser initialized [2018-01-24 15:31:24,557 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety/960521-1_true-valid-memsafety.i [2018-01-24 15:31:24,712 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-24 15:31:24,717 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-24 15:31:24,718 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-24 15:31:24,718 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-24 15:31:24,723 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-24 15:31:24,724 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 03:31:24" (1/1) ... [2018-01-24 15:31:24,727 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@7ef7ce9b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:31:24, skipping insertion in model container [2018-01-24 15:31:24,727 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 03:31:24" (1/1) ... [2018-01-24 15:31:24,741 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 15:31:24,778 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 15:31:24,892 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 15:31:24,909 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 15:31:24,916 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:31:24 WrapperNode [2018-01-24 15:31:24,916 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-24 15:31:24,917 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-24 15:31:24,917 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-24 15:31:24,917 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-24 15:31:24,928 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:31:24" (1/1) ... [2018-01-24 15:31:24,928 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:31:24" (1/1) ... [2018-01-24 15:31:24,936 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:31:24" (1/1) ... [2018-01-24 15:31:24,936 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:31:24" (1/1) ... [2018-01-24 15:31:24,940 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:31:24" (1/1) ... [2018-01-24 15:31:24,943 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:31:24" (1/1) ... [2018-01-24 15:31:24,944 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:31:24" (1/1) ... [2018-01-24 15:31:24,946 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-24 15:31:24,947 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-24 15:31:24,947 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-24 15:31:24,947 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-24 15:31:24,948 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:31:24" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 15:31:24,991 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-24 15:31:24,992 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-24 15:31:24,992 INFO L136 BoogieDeclarations]: Found implementation of procedure foo [2018-01-24 15:31:24,992 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-24 15:31:24,992 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-24 15:31:24,992 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-24 15:31:24,992 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-24 15:31:24,992 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-24 15:31:24,993 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-24 15:31:24,993 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-24 15:31:24,993 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-24 15:31:24,993 INFO L128 BoogieDeclarations]: Found specification of procedure foo [2018-01-24 15:31:24,993 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-24 15:31:24,993 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-24 15:31:24,994 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-24 15:31:25,219 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-24 15:31:25,219 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 03:31:25 BoogieIcfgContainer [2018-01-24 15:31:25,219 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-24 15:31:25,220 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-24 15:31:25,220 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-24 15:31:25,222 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-24 15:31:25,222 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.01 03:31:24" (1/3) ... [2018-01-24 15:31:25,223 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5c157966 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 03:31:25, skipping insertion in model container [2018-01-24 15:31:25,223 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:31:24" (2/3) ... [2018-01-24 15:31:25,223 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5c157966 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 03:31:25, skipping insertion in model container [2018-01-24 15:31:25,224 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 03:31:25" (3/3) ... [2018-01-24 15:31:25,225 INFO L105 eAbstractionObserver]: Analyzing ICFG 960521-1_true-valid-memsafety.i [2018-01-24 15:31:25,232 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-24 15:31:25,239 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 17 error locations. [2018-01-24 15:31:25,286 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-24 15:31:25,286 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-24 15:31:25,286 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-24 15:31:25,286 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-24 15:31:25,286 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-24 15:31:25,286 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-24 15:31:25,287 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-24 15:31:25,287 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-24 15:31:25,288 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-24 15:31:25,309 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states. [2018-01-24 15:31:25,314 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-01-24 15:31:25,315 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:31:25,316 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:31:25,316 INFO L371 AbstractCegarLoop]: === Iteration 1 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:31:25,320 INFO L82 PathProgramCache]: Analyzing trace with hash 1993989713, now seen corresponding path program 1 times [2018-01-24 15:31:25,322 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:31:25,365 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:31:25,365 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:31:25,365 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:31:25,365 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:31:25,422 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:31:25,430 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:31:25,515 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:31:25,517 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 15:31:25,517 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 15:31:25,518 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:31:25,520 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 15:31:25,530 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 15:31:25,531 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 15:31:25,533 INFO L87 Difference]: Start difference. First operand 53 states. Second operand 4 states. [2018-01-24 15:31:25,753 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:31:25,754 INFO L93 Difference]: Finished difference Result 84 states and 90 transitions. [2018-01-24 15:31:25,754 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 15:31:25,756 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 11 [2018-01-24 15:31:25,756 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:31:25,767 INFO L225 Difference]: With dead ends: 84 [2018-01-24 15:31:25,768 INFO L226 Difference]: Without dead ends: 49 [2018-01-24 15:31:25,771 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 15:31:25,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 49 states. [2018-01-24 15:31:25,803 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 49 to 49. [2018-01-24 15:31:25,804 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-01-24 15:31:25,806 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 51 transitions. [2018-01-24 15:31:25,807 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 51 transitions. Word has length 11 [2018-01-24 15:31:25,808 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:31:25,808 INFO L432 AbstractCegarLoop]: Abstraction has 49 states and 51 transitions. [2018-01-24 15:31:25,808 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 15:31:25,808 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 51 transitions. [2018-01-24 15:31:25,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-01-24 15:31:25,808 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:31:25,808 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:31:25,809 INFO L371 AbstractCegarLoop]: === Iteration 2 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:31:25,809 INFO L82 PathProgramCache]: Analyzing trace with hash 1993989714, now seen corresponding path program 1 times [2018-01-24 15:31:25,809 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:31:25,810 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:31:25,810 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:31:25,810 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:31:25,810 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:31:25,830 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:31:25,831 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:31:25,916 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:31:25,916 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 15:31:25,916 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 15:31:25,916 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:31:25,918 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 15:31:25,918 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 15:31:25,919 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 15:31:25,919 INFO L87 Difference]: Start difference. First operand 49 states and 51 transitions. Second operand 5 states. [2018-01-24 15:31:26,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:31:26,021 INFO L93 Difference]: Finished difference Result 49 states and 51 transitions. [2018-01-24 15:31:26,021 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 15:31:26,022 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 11 [2018-01-24 15:31:26,022 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:31:26,023 INFO L225 Difference]: With dead ends: 49 [2018-01-24 15:31:26,023 INFO L226 Difference]: Without dead ends: 48 [2018-01-24 15:31:26,024 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-01-24 15:31:26,024 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 48 states. [2018-01-24 15:31:26,029 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 48 to 48. [2018-01-24 15:31:26,029 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-24 15:31:26,030 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 50 transitions. [2018-01-24 15:31:26,031 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 50 transitions. Word has length 11 [2018-01-24 15:31:26,031 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:31:26,031 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 50 transitions. [2018-01-24 15:31:26,031 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 15:31:26,031 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 50 transitions. [2018-01-24 15:31:26,032 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-24 15:31:26,032 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:31:26,032 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:31:26,032 INFO L371 AbstractCegarLoop]: === Iteration 3 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:31:26,033 INFO L82 PathProgramCache]: Analyzing trace with hash -1188525484, now seen corresponding path program 1 times [2018-01-24 15:31:26,033 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:31:26,034 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:31:26,034 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:31:26,034 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:31:26,034 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:31:26,054 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:31:26,055 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:31:26,124 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:31:26,124 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 15:31:26,124 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 15:31:26,125 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:31:26,125 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 15:31:26,125 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 15:31:26,125 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 15:31:26,126 INFO L87 Difference]: Start difference. First operand 48 states and 50 transitions. Second operand 6 states. [2018-01-24 15:31:26,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:31:26,250 INFO L93 Difference]: Finished difference Result 48 states and 50 transitions. [2018-01-24 15:31:26,251 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 15:31:26,251 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 17 [2018-01-24 15:31:26,251 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:31:26,252 INFO L225 Difference]: With dead ends: 48 [2018-01-24 15:31:26,252 INFO L226 Difference]: Without dead ends: 45 [2018-01-24 15:31:26,252 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=25, Unknown=0, NotChecked=0, Total=42 [2018-01-24 15:31:26,253 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-01-24 15:31:26,258 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 45. [2018-01-24 15:31:26,258 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 45 states. [2018-01-24 15:31:26,259 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 45 states to 45 states and 47 transitions. [2018-01-24 15:31:26,259 INFO L78 Accepts]: Start accepts. Automaton has 45 states and 47 transitions. Word has length 17 [2018-01-24 15:31:26,260 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:31:26,260 INFO L432 AbstractCegarLoop]: Abstraction has 45 states and 47 transitions. [2018-01-24 15:31:26,260 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 15:31:26,261 INFO L276 IsEmpty]: Start isEmpty. Operand 45 states and 47 transitions. [2018-01-24 15:31:26,261 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-24 15:31:26,261 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:31:26,261 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:31:26,262 INFO L371 AbstractCegarLoop]: === Iteration 4 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:31:26,262 INFO L82 PathProgramCache]: Analyzing trace with hash -1188525483, now seen corresponding path program 1 times [2018-01-24 15:31:26,262 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:31:26,263 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:31:26,263 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:31:26,263 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:31:26,264 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:31:26,281 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:31:26,282 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:31:26,416 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:31:26,416 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 15:31:26,416 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 15:31:26,416 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:31:26,416 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 15:31:26,417 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 15:31:26,417 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-01-24 15:31:26,417 INFO L87 Difference]: Start difference. First operand 45 states and 47 transitions. Second operand 7 states. [2018-01-24 15:31:26,538 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:31:26,538 INFO L93 Difference]: Finished difference Result 80 states and 87 transitions. [2018-01-24 15:31:26,539 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 15:31:26,539 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 17 [2018-01-24 15:31:26,540 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:31:26,540 INFO L225 Difference]: With dead ends: 80 [2018-01-24 15:31:26,540 INFO L226 Difference]: Without dead ends: 53 [2018-01-24 15:31:26,541 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=35, Unknown=0, NotChecked=0, Total=56 [2018-01-24 15:31:26,541 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-01-24 15:31:26,547 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 48. [2018-01-24 15:31:26,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 48 states. [2018-01-24 15:31:26,549 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 48 states to 48 states and 50 transitions. [2018-01-24 15:31:26,549 INFO L78 Accepts]: Start accepts. Automaton has 48 states and 50 transitions. Word has length 17 [2018-01-24 15:31:26,549 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:31:26,549 INFO L432 AbstractCegarLoop]: Abstraction has 48 states and 50 transitions. [2018-01-24 15:31:26,549 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 15:31:26,549 INFO L276 IsEmpty]: Start isEmpty. Operand 48 states and 50 transitions. [2018-01-24 15:31:26,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 22 [2018-01-24 15:31:26,550 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:31:26,550 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:31:26,550 INFO L371 AbstractCegarLoop]: === Iteration 5 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:31:26,550 INFO L82 PathProgramCache]: Analyzing trace with hash -2106816852, now seen corresponding path program 1 times [2018-01-24 15:31:26,551 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:31:26,551 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:31:26,552 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:31:26,552 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:31:26,552 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:31:26,570 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:31:26,571 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:31:26,731 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:31:26,731 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:31:26,731 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:31:26,733 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 22 with the following transitions: [2018-01-24 15:31:26,735 INFO L201 CegarAbsIntRunner]: [0], [1], [2], [6], [11], [12], [14], [16], [42], [43], [44], [45], [46], [47], [50], [76], [77], [78], [80] [2018-01-24 15:31:26,780 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 15:31:26,780 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 15:31:28,642 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 15:31:28,643 INFO L268 AbstractInterpreter]: Visited 19 different actions 28 times. Merged at 5 different actions 9 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 26 variables. [2018-01-24 15:31:28,663 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 15:31:28,663 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:31:28,664 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:31:28,674 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:31:28,674 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:31:28,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:31:28,716 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:31:28,746 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 15:31:28,747 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:28,770 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:31:28,770 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:15, output treesize:14 [2018-01-24 15:31:28,789 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 15 [2018-01-24 15:31:28,790 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:28,807 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 15:31:28,807 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:22, output treesize:21 [2018-01-24 15:31:28,946 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:31:28,947 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:31:29,837 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 19 [2018-01-24 15:31:29,854 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 5 [2018-01-24 15:31:29,855 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:29,856 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:31:29,858 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:31:29,858 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:15, output treesize:5 [2018-01-24 15:31:29,887 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:31:29,912 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:31:29,912 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:31:29,916 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:31:29,917 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:31:29,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:31:29,970 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:31:29,975 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 15:31:29,975 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:29,998 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:31:29,998 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:30,003 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:31:30,004 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:21, output treesize:19 [2018-01-24 15:31:30,076 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:31:30,077 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 19 [2018-01-24 15:31:30,078 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:30,096 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:31:30,097 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:31:30,098 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 15:31:30,098 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:30,111 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 15:31:30,112 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:32, output treesize:25 [2018-01-24 15:31:30,273 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:31:30,273 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:31:30,383 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 3 [2018-01-24 15:31:30,383 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:30,388 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 19 [2018-01-24 15:31:30,412 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 15:31:30,412 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:30,414 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:31:30,417 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:31:30,417 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:25, output treesize:5 [2018-01-24 15:31:30,426 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:31:30,428 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:31:30,428 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 8, 7, 7, 7] total 24 [2018-01-24 15:31:30,428 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:31:30,429 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-24 15:31:30,429 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-24 15:31:30,430 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=476, Unknown=2, NotChecked=0, Total=600 [2018-01-24 15:31:30,430 INFO L87 Difference]: Start difference. First operand 48 states and 50 transitions. Second operand 12 states. [2018-01-24 15:31:30,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:31:30,735 INFO L93 Difference]: Finished difference Result 90 states and 95 transitions. [2018-01-24 15:31:30,736 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-24 15:31:30,736 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 21 [2018-01-24 15:31:30,736 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:31:30,737 INFO L225 Difference]: With dead ends: 90 [2018-01-24 15:31:30,737 INFO L226 Difference]: Without dead ends: 63 [2018-01-24 15:31:30,737 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 64 SyntacticMatches, 4 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 232 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=162, Invalid=592, Unknown=2, NotChecked=0, Total=756 [2018-01-24 15:31:30,737 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2018-01-24 15:31:30,743 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 56. [2018-01-24 15:31:30,743 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 56 states. [2018-01-24 15:31:30,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 56 states to 56 states and 60 transitions. [2018-01-24 15:31:30,745 INFO L78 Accepts]: Start accepts. Automaton has 56 states and 60 transitions. Word has length 21 [2018-01-24 15:31:30,745 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:31:30,745 INFO L432 AbstractCegarLoop]: Abstraction has 56 states and 60 transitions. [2018-01-24 15:31:30,745 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-24 15:31:30,745 INFO L276 IsEmpty]: Start isEmpty. Operand 56 states and 60 transitions. [2018-01-24 15:31:30,746 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-24 15:31:30,746 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:31:30,746 INFO L322 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:31:30,747 INFO L371 AbstractCegarLoop]: === Iteration 6 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:31:30,747 INFO L82 PathProgramCache]: Analyzing trace with hash -702775421, now seen corresponding path program 2 times [2018-01-24 15:31:30,747 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:31:30,748 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:31:30,748 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:31:30,748 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:31:30,748 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:31:30,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:31:30,768 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:31:30,954 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:31:30,954 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:31:30,954 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:31:30,954 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:31:30,954 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:31:30,955 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:31:30,955 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:31:30,960 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:31:30,960 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:31:30,975 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:31:30,979 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:31:30,980 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:31:30,983 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:31:30,987 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:31:30,987 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:30,997 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 15:31:30,998 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:31,003 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:31:31,004 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:21, output treesize:19 [2018-01-24 15:31:31,033 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:31:31,042 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:31:31,043 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 15:31:31,043 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:31,052 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 19 [2018-01-24 15:31:31,052 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:31,060 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 15:31:31,060 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:32, output treesize:25 [2018-01-24 15:31:31,219 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:31:31,220 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:31:31,376 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 3 [2018-01-24 15:31:31,377 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:31,382 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 19 [2018-01-24 15:31:31,393 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 15:31:31,393 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:31,394 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:31:31,397 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:31:31,397 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:25, output treesize:5 [2018-01-24 15:31:31,417 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:31:31,438 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:31:31,438 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:31:31,441 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:31:31,441 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:31:31,462 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:31:31,492 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:31:31,504 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:31:31,508 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:31:31,512 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 15:31:31,512 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:31,527 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:31:31,527 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:31,535 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:31:31,535 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:21, output treesize:19 [2018-01-24 15:31:31,539 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:31:31,540 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 19 [2018-01-24 15:31:31,540 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:31,594 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:31:31,601 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:31:31,602 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 15:31:31,602 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:31,629 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 15:31:31,630 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:32, output treesize:25 [2018-01-24 15:31:31,686 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:31:31,687 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:31:31,732 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 3 [2018-01-24 15:31:31,733 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:31,737 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 19 [2018-01-24 15:31:31,747 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 5 [2018-01-24 15:31:31,747 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:31,748 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:31:31,751 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:31:31,752 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 4 variables, input treesize:25, output treesize:5 [2018-01-24 15:31:31,759 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:31:31,763 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:31:31,764 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 8, 8, 8] total 23 [2018-01-24 15:31:31,764 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:31:31,764 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-24 15:31:31,765 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-24 15:31:31,765 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=110, Invalid=442, Unknown=0, NotChecked=0, Total=552 [2018-01-24 15:31:31,765 INFO L87 Difference]: Start difference. First operand 56 states and 60 transitions. Second operand 17 states. [2018-01-24 15:31:32,303 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:31:32,303 INFO L93 Difference]: Finished difference Result 104 states and 111 transitions. [2018-01-24 15:31:32,303 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 15:31:32,303 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 25 [2018-01-24 15:31:32,304 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:31:32,304 INFO L225 Difference]: With dead ends: 104 [2018-01-24 15:31:32,305 INFO L226 Difference]: Without dead ends: 73 [2018-01-24 15:31:32,305 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 83 SyntacticMatches, 3 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 257 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=208, Invalid=722, Unknown=0, NotChecked=0, Total=930 [2018-01-24 15:31:32,306 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 73 states. [2018-01-24 15:31:32,313 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 73 to 64. [2018-01-24 15:31:32,314 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2018-01-24 15:31:32,315 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 70 transitions. [2018-01-24 15:31:32,315 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 70 transitions. Word has length 25 [2018-01-24 15:31:32,315 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:31:32,315 INFO L432 AbstractCegarLoop]: Abstraction has 64 states and 70 transitions. [2018-01-24 15:31:32,315 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-24 15:31:32,316 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 70 transitions. [2018-01-24 15:31:32,316 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-24 15:31:32,317 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:31:32,317 INFO L322 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:31:32,317 INFO L371 AbstractCegarLoop]: === Iteration 7 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:31:32,317 INFO L82 PathProgramCache]: Analyzing trace with hash 1827026138, now seen corresponding path program 3 times [2018-01-24 15:31:32,317 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:31:32,318 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:31:32,318 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:31:32,318 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:31:32,319 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:31:32,335 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:31:32,336 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:31:32,532 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:31:32,533 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:31:32,533 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:31:32,533 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:31:32,533 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:31:32,533 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:31:32,533 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:31:32,544 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 15:31:32,544 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 15:31:32,557 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:31:32,560 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:31:32,562 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:31:32,564 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:31:32,568 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 15:31:32,569 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:32,576 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:31:32,577 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:32,582 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:31:32,583 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:18, output treesize:16 [2018-01-24 15:31:32,624 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:31:32,625 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:31:32,626 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 15:31:32,626 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:32,634 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 19 [2018-01-24 15:31:32,635 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:32,644 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:31:32,645 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:29, output treesize:22 [2018-01-24 15:31:32,776 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 15:31:32,776 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:31:33,465 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 15:31:33,486 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:31:33,486 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:31:33,490 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 15:31:33,490 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 15:31:33,508 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:31:33,537 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:31:33,548 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:31:33,553 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:31:33,556 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:31:33,557 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:33,562 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 15:31:33,562 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:33,566 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:31:33,566 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:18, output treesize:16 [2018-01-24 15:31:33,607 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:31:33,608 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 15:31:33,609 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 15:31:33,609 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:33,616 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 19 [2018-01-24 15:31:33,617 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:33,622 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 15:31:33,622 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:29, output treesize:22 [2018-01-24 15:31:33,799 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 8 proven. 3 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 15:31:33,799 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:31:34,373 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 15:31:34,375 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:31:34,375 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 7, 7, 7] total 29 [2018-01-24 15:31:34,375 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:31:34,376 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-24 15:31:34,376 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-24 15:31:34,376 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=140, Invalid=730, Unknown=0, NotChecked=0, Total=870 [2018-01-24 15:31:34,376 INFO L87 Difference]: Start difference. First operand 64 states and 70 transitions. Second operand 18 states. [2018-01-24 15:31:35,297 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:31:35,297 INFO L93 Difference]: Finished difference Result 125 states and 137 transitions. [2018-01-24 15:31:35,298 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-24 15:31:35,298 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 29 [2018-01-24 15:31:35,298 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:31:35,300 INFO L225 Difference]: With dead ends: 125 [2018-01-24 15:31:35,301 INFO L226 Difference]: Without dead ends: 90 [2018-01-24 15:31:35,301 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 92 SyntacticMatches, 5 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 461 ImplicationChecksByTransitivity, 2.2s TimeCoverageRelationStatistics Valid=338, Invalid=1302, Unknown=0, NotChecked=0, Total=1640 [2018-01-24 15:31:35,302 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 90 states. [2018-01-24 15:31:35,309 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 90 to 70. [2018-01-24 15:31:35,309 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70 states. [2018-01-24 15:31:35,310 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 76 transitions. [2018-01-24 15:31:35,311 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 76 transitions. Word has length 29 [2018-01-24 15:31:35,311 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:31:35,311 INFO L432 AbstractCegarLoop]: Abstraction has 70 states and 76 transitions. [2018-01-24 15:31:35,311 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-24 15:31:35,311 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 76 transitions. [2018-01-24 15:31:35,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-24 15:31:35,312 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:31:35,312 INFO L322 BasicCegarLoop]: trace histogram [6, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:31:35,313 INFO L371 AbstractCegarLoop]: === Iteration 8 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:31:35,313 INFO L82 PathProgramCache]: Analyzing trace with hash -645884181, now seen corresponding path program 1 times [2018-01-24 15:31:35,313 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:31:35,314 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:31:35,314 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:31:35,314 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:31:35,314 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:31:35,328 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:31:35,329 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:31:35,429 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:31:35,429 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:31:35,430 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:31:35,430 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 41 with the following transitions: [2018-01-24 15:31:35,430 INFO L201 CegarAbsIntRunner]: [0], [1], [2], [6], [9], [11], [12], [16], [20], [24], [29], [32], [42], [43], [44], [45], [46], [47], [50], [76], [77], [78], [80] [2018-01-24 15:31:35,432 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 15:31:35,433 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 15:31:37,489 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 15:31:37,489 INFO L268 AbstractInterpreter]: Visited 23 different actions 41 times. Merged at 9 different actions 18 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 26 variables. [2018-01-24 15:31:37,490 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 15:31:37,491 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:31:37,491 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:31:37,498 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:31:37,498 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:31:37,523 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:31:37,526 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:31:37,676 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:31:37,710 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:31:37,855 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:31:37,904 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:31:37,904 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:31:37,908 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:31:37,908 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:31:37,954 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:31:37,960 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:31:37,968 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:31:37,969 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:31:37,981 INFO L134 CoverageAnalysis]: Checked inductivity of 50 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:31:37,986 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:31:37,987 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 22 [2018-01-24 15:31:37,987 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:31:37,987 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 15:31:37,988 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 15:31:37,988 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=199, Invalid=263, Unknown=0, NotChecked=0, Total=462 [2018-01-24 15:31:37,988 INFO L87 Difference]: Start difference. First operand 70 states and 76 transitions. Second operand 15 states. [2018-01-24 15:31:38,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:31:38,379 INFO L93 Difference]: Finished difference Result 136 states and 147 transitions. [2018-01-24 15:31:38,380 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-24 15:31:38,380 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 40 [2018-01-24 15:31:38,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:31:38,381 INFO L225 Difference]: With dead ends: 136 [2018-01-24 15:31:38,381 INFO L226 Difference]: Without dead ends: 102 [2018-01-24 15:31:38,382 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 167 GetRequests, 147 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 164 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=199, Invalid=263, Unknown=0, NotChecked=0, Total=462 [2018-01-24 15:31:38,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 102 states. [2018-01-24 15:31:38,394 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 102 to 86. [2018-01-24 15:31:38,394 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-01-24 15:31:38,395 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 98 transitions. [2018-01-24 15:31:38,395 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 98 transitions. Word has length 40 [2018-01-24 15:31:38,396 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:31:38,396 INFO L432 AbstractCegarLoop]: Abstraction has 86 states and 98 transitions. [2018-01-24 15:31:38,396 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 15:31:38,396 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 98 transitions. [2018-01-24 15:31:38,397 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-24 15:31:38,397 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:31:38,397 INFO L322 BasicCegarLoop]: trace histogram [7, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:31:38,397 INFO L371 AbstractCegarLoop]: === Iteration 9 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:31:38,397 INFO L82 PathProgramCache]: Analyzing trace with hash -2113361740, now seen corresponding path program 2 times [2018-01-24 15:31:38,398 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:31:38,398 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:31:38,398 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:31:38,399 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:31:38,399 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:31:38,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:31:38,412 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:31:38,557 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:31:38,557 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:31:38,557 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:31:38,557 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:31:38,557 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:31:38,557 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:31:38,558 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:31:38,570 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:31:38,570 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:31:38,588 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:31:38,591 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:31:38,594 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:31:38,603 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 15:31:38,604 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:31:38,609 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 15:31:38,610 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 2 variables, input treesize:15, output treesize:14 [2018-01-24 15:31:38,769 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 15:31:38,769 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:31:39,053 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 15:31:39,086 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 15:31:39,087 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7, 7] imperfect sequences [10] total 20 [2018-01-24 15:31:39,087 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:31:39,087 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 15:31:39,087 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 15:31:39,088 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=75, Invalid=305, Unknown=0, NotChecked=0, Total=380 [2018-01-24 15:31:39,088 INFO L87 Difference]: Start difference. First operand 86 states and 98 transitions. Second operand 8 states. [2018-01-24 15:31:39,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:31:39,337 INFO L93 Difference]: Finished difference Result 89 states and 100 transitions. [2018-01-24 15:31:39,337 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 15:31:39,338 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 44 [2018-01-24 15:31:39,338 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:31:39,340 INFO L225 Difference]: With dead ends: 89 [2018-01-24 15:31:39,340 INFO L226 Difference]: Without dead ends: 83 [2018-01-24 15:31:39,341 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 104 GetRequests, 78 SyntacticMatches, 1 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 120 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=138, Invalid=564, Unknown=0, NotChecked=0, Total=702 [2018-01-24 15:31:39,341 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2018-01-24 15:31:39,357 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 83. [2018-01-24 15:31:39,357 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 83 states. [2018-01-24 15:31:39,358 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 83 states to 83 states and 89 transitions. [2018-01-24 15:31:39,358 INFO L78 Accepts]: Start accepts. Automaton has 83 states and 89 transitions. Word has length 44 [2018-01-24 15:31:39,358 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:31:39,358 INFO L432 AbstractCegarLoop]: Abstraction has 83 states and 89 transitions. [2018-01-24 15:31:39,359 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 15:31:39,359 INFO L276 IsEmpty]: Start isEmpty. Operand 83 states and 89 transitions. [2018-01-24 15:31:39,360 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-24 15:31:39,360 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:31:39,360 INFO L322 BasicCegarLoop]: trace histogram [7, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:31:39,360 INFO L371 AbstractCegarLoop]: === Iteration 10 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:31:39,360 INFO L82 PathProgramCache]: Analyzing trace with hash -2113361741, now seen corresponding path program 1 times [2018-01-24 15:31:39,361 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:31:39,361 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:31:39,362 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:31:39,362 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:31:39,362 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:31:39,373 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:31:39,373 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:31:39,416 INFO L134 CoverageAnalysis]: Checked inductivity of 72 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 15:31:39,417 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 15:31:39,417 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 15:31:39,417 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:31:39,417 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 15:31:39,418 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 15:31:39,418 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 15:31:39,418 INFO L87 Difference]: Start difference. First operand 83 states and 89 transitions. Second operand 4 states. [2018-01-24 15:31:39,497 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:31:39,497 INFO L93 Difference]: Finished difference Result 83 states and 89 transitions. [2018-01-24 15:31:39,498 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 15:31:39,498 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 44 [2018-01-24 15:31:39,498 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:31:39,499 INFO L225 Difference]: With dead ends: 83 [2018-01-24 15:31:39,499 INFO L226 Difference]: Without dead ends: 81 [2018-01-24 15:31:39,500 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 15:31:39,500 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81 states. [2018-01-24 15:31:39,513 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81 to 81. [2018-01-24 15:31:39,513 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 81 states. [2018-01-24 15:31:39,514 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 82 transitions. [2018-01-24 15:31:39,514 INFO L78 Accepts]: Start accepts. Automaton has 81 states and 82 transitions. Word has length 44 [2018-01-24 15:31:39,514 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:31:39,515 INFO L432 AbstractCegarLoop]: Abstraction has 81 states and 82 transitions. [2018-01-24 15:31:39,515 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 15:31:39,515 INFO L276 IsEmpty]: Start isEmpty. Operand 81 states and 82 transitions. [2018-01-24 15:31:39,516 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-01-24 15:31:39,516 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:31:39,516 INFO L322 BasicCegarLoop]: trace histogram [7, 7, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:31:39,516 INFO L371 AbstractCegarLoop]: === Iteration 11 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:31:39,517 INFO L82 PathProgramCache]: Analyzing trace with hash 1791473437, now seen corresponding path program 1 times [2018-01-24 15:31:39,517 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:31:39,517 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:31:39,518 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:31:39,518 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:31:39,518 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:31:39,535 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:31:39,536 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:31:39,662 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 15:31:39,663 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:31:39,663 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:31:39,663 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 74 with the following transitions: [2018-01-24 15:31:39,663 INFO L201 CegarAbsIntRunner]: [0], [1], [2], [6], [9], [11], [12], [16], [20], [24], [27], [29], [30], [34], [38], [42], [43], [44], [45], [46], [47], [50], [52], [65], [66], [71], [76], [77], [78], [80], [81] [2018-01-24 15:31:39,665 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 15:31:39,665 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 15:31:45,408 INFO L262 AbstractInterpreter]: Error location(s) were unreachable [2018-01-24 15:31:45,408 INFO L268 AbstractInterpreter]: Visited 31 different actions 83 times. Merged at 16 different actions 45 times. Never widened. Found 7 fixpoints after 4 different actions. Largest state had 27 variables. [2018-01-24 15:31:45,410 INFO L395 sIntCurrentIteration]: Generating AbsInt predicates [2018-01-24 15:31:47,083 INFO L232 lantSequenceWeakener]: Weakened 72 states. On average, predicates are now at 45.19% of their original sizes. [2018-01-24 15:31:47,083 INFO L408 sIntCurrentIteration]: Unifying AI predicates [2018-01-24 15:31:47,916 INFO L419 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-01-24 15:31:47,916 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-24 15:31:47,917 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [11] total 24 [2018-01-24 15:31:47,917 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:31:47,917 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 15:31:47,917 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 15:31:47,917 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=70, Invalid=140, Unknown=0, NotChecked=0, Total=210 [2018-01-24 15:31:47,917 INFO L87 Difference]: Start difference. First operand 81 states and 82 transitions. Second operand 15 states. [2018-01-24 15:31:49,535 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:31:49,535 INFO L93 Difference]: Finished difference Result 81 states and 82 transitions. [2018-01-24 15:31:49,535 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-24 15:31:49,536 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 73 [2018-01-24 15:31:49,536 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:31:49,536 INFO L225 Difference]: With dead ends: 81 [2018-01-24 15:31:49,536 INFO L226 Difference]: Without dead ends: 79 [2018-01-24 15:31:49,537 INFO L525 BasicCegarLoop]: 2 DeclaredPredicates, 81 GetRequests, 36 SyntacticMatches, 23 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 113 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=182, Invalid=370, Unknown=0, NotChecked=0, Total=552 [2018-01-24 15:31:49,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 79 states. [2018-01-24 15:31:49,547 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 79 to 79. [2018-01-24 15:31:49,547 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-01-24 15:31:49,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 80 transitions. [2018-01-24 15:31:49,548 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 80 transitions. Word has length 73 [2018-01-24 15:31:49,549 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:31:49,549 INFO L432 AbstractCegarLoop]: Abstraction has 79 states and 80 transitions. [2018-01-24 15:31:49,549 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 15:31:49,549 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 80 transitions. [2018-01-24 15:31:49,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-01-24 15:31:49,550 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:31:49,550 INFO L322 BasicCegarLoop]: trace histogram [7, 7, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:31:49,550 INFO L371 AbstractCegarLoop]: === Iteration 12 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:31:49,550 INFO L82 PathProgramCache]: Analyzing trace with hash 1791465492, now seen corresponding path program 1 times [2018-01-24 15:31:49,550 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:31:49,551 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:31:49,551 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:31:49,551 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:31:49,551 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:31:49,567 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:31:49,568 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:31:49,710 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 15:31:49,711 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:31:49,711 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:31:49,711 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 74 with the following transitions: [2018-01-24 15:31:49,711 INFO L201 CegarAbsIntRunner]: [0], [1], [2], [6], [9], [11], [12], [16], [20], [24], [27], [29], [30], [34], [38], [42], [43], [44], [45], [46], [47], [50], [52], [57], [58], [62], [76], [77], [78], [80], [81] [2018-01-24 15:31:49,712 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 15:31:49,712 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 15:31:53,933 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 15:31:53,933 INFO L268 AbstractInterpreter]: Visited 31 different actions 83 times. Merged at 17 different actions 47 times. Never widened. Found 7 fixpoints after 4 different actions. Largest state had 27 variables. [2018-01-24 15:31:53,934 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 15:31:53,934 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:31:53,934 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:31:53,940 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:31:53,940 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:31:53,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:31:53,963 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:31:54,013 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 15:31:54,013 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:31:54,137 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 15:31:54,158 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:31:54,158 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:31:54,161 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:31:54,162 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:31:54,206 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:31:54,212 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:31:54,224 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 15:31:54,224 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:31:54,269 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-24 15:31:54,271 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:31:54,271 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 10, 11, 10, 11] total 26 [2018-01-24 15:31:54,271 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:31:54,271 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-24 15:31:54,272 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-24 15:31:54,272 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=238, Invalid=412, Unknown=0, NotChecked=0, Total=650 [2018-01-24 15:31:54,272 INFO L87 Difference]: Start difference. First operand 79 states and 80 transitions. Second operand 18 states. [2018-01-24 15:31:54,384 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:31:54,384 INFO L93 Difference]: Finished difference Result 130 states and 133 transitions. [2018-01-24 15:31:54,384 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 15:31:54,384 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 73 [2018-01-24 15:31:54,385 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:31:54,385 INFO L225 Difference]: With dead ends: 130 [2018-01-24 15:31:54,385 INFO L226 Difference]: Without dead ends: 91 [2018-01-24 15:31:54,386 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 302 GetRequests, 273 SyntacticMatches, 4 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 227 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=263, Invalid=439, Unknown=0, NotChecked=0, Total=702 [2018-01-24 15:31:54,386 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 91 states. [2018-01-24 15:31:54,396 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 91 to 87. [2018-01-24 15:31:54,396 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 87 states. [2018-01-24 15:31:54,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 87 states to 87 states and 88 transitions. [2018-01-24 15:31:54,396 INFO L78 Accepts]: Start accepts. Automaton has 87 states and 88 transitions. Word has length 73 [2018-01-24 15:31:54,397 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:31:54,397 INFO L432 AbstractCegarLoop]: Abstraction has 87 states and 88 transitions. [2018-01-24 15:31:54,397 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-24 15:31:54,397 INFO L276 IsEmpty]: Start isEmpty. Operand 87 states and 88 transitions. [2018-01-24 15:31:54,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 82 [2018-01-24 15:31:54,398 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:31:54,398 INFO L322 BasicCegarLoop]: trace histogram [8, 8, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:31:54,398 INFO L371 AbstractCegarLoop]: === Iteration 13 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:31:54,398 INFO L82 PathProgramCache]: Analyzing trace with hash 526772724, now seen corresponding path program 2 times [2018-01-24 15:31:54,399 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:31:54,399 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:31:54,400 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:31:54,400 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:31:54,400 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:31:54,412 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:31:54,413 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:31:54,636 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-24 15:31:54,636 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:31:54,637 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:31:54,637 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:31:54,637 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:31:54,637 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:31:54,637 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:31:54,642 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:31:54,642 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:31:54,656 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:31:54,666 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:31:54,670 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:31:54,673 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:31:54,754 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-24 15:31:54,754 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:31:54,903 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-24 15:31:54,922 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:31:54,923 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 14 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:31:54,926 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:31:54,926 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:31:54,947 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:31:55,009 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:31:55,027 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:31:55,032 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:31:55,041 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-24 15:31:55,041 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:31:55,091 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-24 15:31:55,093 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:31:55,093 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 11, 12, 11, 12] total 29 [2018-01-24 15:31:55,093 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:31:55,094 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-24 15:31:55,094 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-24 15:31:55,094 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=299, Invalid=513, Unknown=0, NotChecked=0, Total=812 [2018-01-24 15:31:55,094 INFO L87 Difference]: Start difference. First operand 87 states and 88 transitions. Second operand 20 states. [2018-01-24 15:31:55,204 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:31:55,204 INFO L93 Difference]: Finished difference Result 142 states and 145 transitions. [2018-01-24 15:31:55,205 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-24 15:31:55,205 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 81 [2018-01-24 15:31:55,205 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:31:55,206 INFO L225 Difference]: With dead ends: 142 [2018-01-24 15:31:55,206 INFO L226 Difference]: Without dead ends: 99 [2018-01-24 15:31:55,207 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 335 GetRequests, 303 SyntacticMatches, 4 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 296 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=327, Invalid=543, Unknown=0, NotChecked=0, Total=870 [2018-01-24 15:31:55,207 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 99 states. [2018-01-24 15:31:55,222 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 99 to 95. [2018-01-24 15:31:55,222 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95 states. [2018-01-24 15:31:55,223 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 96 transitions. [2018-01-24 15:31:55,223 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 96 transitions. Word has length 81 [2018-01-24 15:31:55,223 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:31:55,224 INFO L432 AbstractCegarLoop]: Abstraction has 95 states and 96 transitions. [2018-01-24 15:31:55,224 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-24 15:31:55,224 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 96 transitions. [2018-01-24 15:31:55,225 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-01-24 15:31:55,225 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:31:55,225 INFO L322 BasicCegarLoop]: trace histogram [9, 9, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:31:55,225 INFO L371 AbstractCegarLoop]: === Iteration 14 === [fooErr1RequiresViolation, fooErr0RequiresViolation, fooErr2RequiresViolation, fooErr3RequiresViolation, mainErr5RequiresViolation, mainErr1RequiresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr6RequiresViolation, mainErr12EnsuresViolation]=== [2018-01-24 15:31:55,226 INFO L82 PathProgramCache]: Analyzing trace with hash -2016770860, now seen corresponding path program 3 times [2018-01-24 15:31:55,226 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:31:55,226 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:31:55,227 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:31:55,227 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:31:55,227 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:31:55,244 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:31:55,245 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:31:55,367 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2018-01-24 15:31:55,367 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:31:55,367 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:31:55,367 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:31:55,367 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:31:55,368 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:31:55,368 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:31:55,378 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 15:31:55,379 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 15:31:55,392 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:31:55,395 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:31:55,398 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:31:55,402 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:31:55,407 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:31:55,416 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:31:55,433 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:31:55,443 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:31:55,471 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:31:55,472 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:31:55,474 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:31:55,579 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2018-01-24 15:31:55,579 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:31:55,819 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 0 proven. 158 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-24 15:31:55,840 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:31:55,840 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 16 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:31:55,843 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 15:31:55,843 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 15:31:55,864 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:31:55,915 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:31:55,974 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:31:56,048 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:31:56,217 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:31:56,504 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:31:56,943 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:32:08,968 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command Received shutdown request... Cannot interrupt operation gracefully because timeout expired. Forcing shutdown