java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/ArraysWithLenghtAtDeclaration_false-valid-deref-write.c -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-24 15:50:15,183 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-24 15:50:15,186 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-24 15:50:15,202 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-24 15:50:15,203 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-24 15:50:15,204 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-24 15:50:15,205 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-24 15:50:15,207 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-24 15:50:15,209 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-24 15:50:15,210 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-24 15:50:15,211 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-24 15:50:15,211 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-24 15:50:15,212 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-24 15:50:15,214 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-24 15:50:15,215 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-24 15:50:15,218 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-24 15:50:15,220 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-24 15:50:15,222 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-24 15:50:15,223 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-24 15:50:15,224 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-24 15:50:15,227 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-01-24 15:50:15,232 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-24 15:50:15,233 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-24 15:50:15,233 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf [2018-01-24 15:50:15,243 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-24 15:50:15,243 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-24 15:50:15,244 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-24 15:50:15,244 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-24 15:50:15,244 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-24 15:50:15,245 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-24 15:50:15,245 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-24 15:50:15,245 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-24 15:50:15,246 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-24 15:50:15,246 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-24 15:50:15,246 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-24 15:50:15,246 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-24 15:50:15,246 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-24 15:50:15,247 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-24 15:50:15,247 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-24 15:50:15,247 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-24 15:50:15,247 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-24 15:50:15,247 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-24 15:50:15,248 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-24 15:50:15,248 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-24 15:50:15,248 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-24 15:50:15,248 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-24 15:50:15,248 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-24 15:50:15,249 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 15:50:15,249 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-24 15:50:15,249 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-24 15:50:15,249 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-24 15:50:15,249 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-24 15:50:15,249 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-24 15:50:15,250 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-24 15:50:15,250 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-24 15:50:15,250 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-24 15:50:15,250 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-24 15:50:15,251 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-24 15:50:15,251 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-24 15:50:15,285 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-24 15:50:15,298 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-24 15:50:15,302 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-24 15:50:15,304 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-24 15:50:15,304 INFO L276 PluginConnector]: CDTParser initialized [2018-01-24 15:50:15,305 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/ArraysWithLenghtAtDeclaration_false-valid-deref-write.c [2018-01-24 15:50:15,439 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-24 15:50:15,445 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-24 15:50:15,445 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-24 15:50:15,445 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-24 15:50:15,451 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-24 15:50:15,452 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 03:50:15" (1/1) ... [2018-01-24 15:50:15,455 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@668f743e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:50:15, skipping insertion in model container [2018-01-24 15:50:15,455 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 03:50:15" (1/1) ... [2018-01-24 15:50:15,468 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 15:50:15,483 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 15:50:15,599 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 15:50:15,615 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 15:50:15,620 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:50:15 WrapperNode [2018-01-24 15:50:15,620 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-24 15:50:15,620 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-24 15:50:15,621 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-24 15:50:15,621 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-24 15:50:15,634 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:50:15" (1/1) ... [2018-01-24 15:50:15,635 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:50:15" (1/1) ... [2018-01-24 15:50:15,643 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:50:15" (1/1) ... [2018-01-24 15:50:15,643 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:50:15" (1/1) ... [2018-01-24 15:50:15,646 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:50:15" (1/1) ... [2018-01-24 15:50:15,649 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:50:15" (1/1) ... [2018-01-24 15:50:15,649 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:50:15" (1/1) ... [2018-01-24 15:50:15,651 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-24 15:50:15,651 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-24 15:50:15,652 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-24 15:50:15,652 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-24 15:50:15,653 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:50:15" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 15:50:15,700 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-24 15:50:15,700 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-24 15:50:15,700 INFO L136 BoogieDeclarations]: Found implementation of procedure foo [2018-01-24 15:50:15,700 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-24 15:50:15,700 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-24 15:50:15,700 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-24 15:50:15,701 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-24 15:50:15,701 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-24 15:50:15,701 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-24 15:50:15,701 INFO L128 BoogieDeclarations]: Found specification of procedure foo [2018-01-24 15:50:15,701 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-24 15:50:15,701 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-24 15:50:15,701 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-24 15:50:15,892 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-24 15:50:15,893 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 03:50:15 BoogieIcfgContainer [2018-01-24 15:50:15,893 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-24 15:50:15,893 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-24 15:50:15,894 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-24 15:50:15,895 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-24 15:50:15,896 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.01 03:50:15" (1/3) ... [2018-01-24 15:50:15,920 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4e182c48 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 03:50:15, skipping insertion in model container [2018-01-24 15:50:15,920 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 03:50:15" (2/3) ... [2018-01-24 15:50:15,921 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4e182c48 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 03:50:15, skipping insertion in model container [2018-01-24 15:50:15,921 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 03:50:15" (3/3) ... [2018-01-24 15:50:15,922 INFO L105 eAbstractionObserver]: Analyzing ICFG ArraysWithLenghtAtDeclaration_false-valid-deref-write.c [2018-01-24 15:50:15,929 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-24 15:50:15,934 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 6 error locations. [2018-01-24 15:50:15,980 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-24 15:50:15,980 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-24 15:50:15,980 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-24 15:50:15,980 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-24 15:50:15,981 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-24 15:50:15,981 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-24 15:50:15,981 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-24 15:50:15,981 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-24 15:50:15,982 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-24 15:50:16,003 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states. [2018-01-24 15:50:16,010 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 12 [2018-01-24 15:50:16,010 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:16,012 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:16,012 INFO L371 AbstractCegarLoop]: === Iteration 1 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:16,017 INFO L82 PathProgramCache]: Analyzing trace with hash -215054890, now seen corresponding path program 1 times [2018-01-24 15:50:16,020 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:16,079 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:16,079 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:16,079 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:16,080 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:16,120 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:16,126 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:50:16,209 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:50:16,211 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 15:50:16,212 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 15:50:16,212 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:50:16,215 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 15:50:16,229 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 15:50:16,230 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 15:50:16,233 INFO L87 Difference]: Start difference. First operand 46 states. Second operand 3 states. [2018-01-24 15:50:16,331 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:50:16,331 INFO L93 Difference]: Finished difference Result 101 states and 123 transitions. [2018-01-24 15:50:16,332 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 15:50:16,333 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 11 [2018-01-24 15:50:16,333 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:50:16,341 INFO L225 Difference]: With dead ends: 101 [2018-01-24 15:50:16,341 INFO L226 Difference]: Without dead ends: 59 [2018-01-24 15:50:16,344 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 15:50:16,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-01-24 15:50:16,446 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 49. [2018-01-24 15:50:16,447 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-01-24 15:50:16,448 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 52 transitions. [2018-01-24 15:50:16,450 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 52 transitions. Word has length 11 [2018-01-24 15:50:16,450 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:50:16,450 INFO L432 AbstractCegarLoop]: Abstraction has 49 states and 52 transitions. [2018-01-24 15:50:16,450 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 15:50:16,450 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 52 transitions. [2018-01-24 15:50:16,451 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-01-24 15:50:16,451 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:16,451 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:16,451 INFO L371 AbstractCegarLoop]: === Iteration 2 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:16,451 INFO L82 PathProgramCache]: Analyzing trace with hash 1100032001, now seen corresponding path program 1 times [2018-01-24 15:50:16,451 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:16,452 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:16,452 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:16,452 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:16,452 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:16,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:16,470 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:50:16,564 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:50:16,565 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 15:50:16,565 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 15:50:16,565 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:50:16,567 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 15:50:16,567 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 15:50:16,567 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-01-24 15:50:16,568 INFO L87 Difference]: Start difference. First operand 49 states and 52 transitions. Second operand 6 states. [2018-01-24 15:50:16,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:50:16,765 INFO L93 Difference]: Finished difference Result 95 states and 102 transitions. [2018-01-24 15:50:16,765 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 15:50:16,765 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 16 [2018-01-24 15:50:16,766 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:50:16,769 INFO L225 Difference]: With dead ends: 95 [2018-01-24 15:50:16,769 INFO L226 Difference]: Without dead ends: 94 [2018-01-24 15:50:16,770 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-01-24 15:50:16,771 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2018-01-24 15:50:16,776 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 52. [2018-01-24 15:50:16,776 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-01-24 15:50:16,777 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 56 transitions. [2018-01-24 15:50:16,777 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 56 transitions. Word has length 16 [2018-01-24 15:50:16,778 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:50:16,778 INFO L432 AbstractCegarLoop]: Abstraction has 52 states and 56 transitions. [2018-01-24 15:50:16,778 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 15:50:16,778 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 56 transitions. [2018-01-24 15:50:16,778 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-24 15:50:16,778 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:16,778 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:16,778 INFO L371 AbstractCegarLoop]: === Iteration 3 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:16,779 INFO L82 PathProgramCache]: Analyzing trace with hash -258746290, now seen corresponding path program 1 times [2018-01-24 15:50:16,779 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:16,780 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:16,780 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:16,780 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:16,780 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:16,793 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:16,794 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:50:16,875 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:50:16,876 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 15:50:16,876 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 15:50:16,876 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:50:16,876 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 15:50:16,877 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 15:50:16,878 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 15:50:16,878 INFO L87 Difference]: Start difference. First operand 52 states and 56 transitions. Second operand 5 states. [2018-01-24 15:50:16,973 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:50:16,973 INFO L93 Difference]: Finished difference Result 60 states and 64 transitions. [2018-01-24 15:50:16,974 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 15:50:16,974 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-01-24 15:50:16,974 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:50:16,975 INFO L225 Difference]: With dead ends: 60 [2018-01-24 15:50:16,976 INFO L226 Difference]: Without dead ends: 59 [2018-01-24 15:50:16,976 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 15:50:16,976 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-01-24 15:50:16,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 53. [2018-01-24 15:50:16,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 53 states. [2018-01-24 15:50:16,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 53 states to 53 states and 58 transitions. [2018-01-24 15:50:16,985 INFO L78 Accepts]: Start accepts. Automaton has 53 states and 58 transitions. Word has length 17 [2018-01-24 15:50:16,985 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:50:16,985 INFO L432 AbstractCegarLoop]: Abstraction has 53 states and 58 transitions. [2018-01-24 15:50:16,985 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 15:50:16,985 INFO L276 IsEmpty]: Start isEmpty. Operand 53 states and 58 transitions. [2018-01-24 15:50:16,986 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-24 15:50:16,986 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:16,986 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:16,986 INFO L371 AbstractCegarLoop]: === Iteration 4 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:16,987 INFO L82 PathProgramCache]: Analyzing trace with hash -258746291, now seen corresponding path program 1 times [2018-01-24 15:50:16,987 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:16,988 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:16,988 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:16,988 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:16,988 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:16,997 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:16,998 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:50:17,039 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:50:17,039 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 15:50:17,039 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 15:50:17,039 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:50:17,040 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 15:50:17,040 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 15:50:17,040 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 15:50:17,040 INFO L87 Difference]: Start difference. First operand 53 states and 58 transitions. Second operand 5 states. [2018-01-24 15:50:17,090 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:50:17,090 INFO L93 Difference]: Finished difference Result 53 states and 58 transitions. [2018-01-24 15:50:17,091 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 15:50:17,091 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-01-24 15:50:17,091 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:50:17,091 INFO L225 Difference]: With dead ends: 53 [2018-01-24 15:50:17,092 INFO L226 Difference]: Without dead ends: 52 [2018-01-24 15:50:17,092 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 15:50:17,092 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 52 states. [2018-01-24 15:50:17,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 52 to 52. [2018-01-24 15:50:17,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 52 states. [2018-01-24 15:50:17,097 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 52 states to 52 states and 56 transitions. [2018-01-24 15:50:17,097 INFO L78 Accepts]: Start accepts. Automaton has 52 states and 56 transitions. Word has length 17 [2018-01-24 15:50:17,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:50:17,098 INFO L432 AbstractCegarLoop]: Abstraction has 52 states and 56 transitions. [2018-01-24 15:50:17,098 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 15:50:17,098 INFO L276 IsEmpty]: Start isEmpty. Operand 52 states and 56 transitions. [2018-01-24 15:50:17,098 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-24 15:50:17,099 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:17,099 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:17,099 INFO L371 AbstractCegarLoop]: === Iteration 5 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:17,099 INFO L82 PathProgramCache]: Analyzing trace with hash -1933852231, now seen corresponding path program 1 times [2018-01-24 15:50:17,099 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:17,100 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:17,100 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:17,100 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:17,100 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:17,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:17,111 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:50:17,201 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:50:17,202 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:17,202 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:50:17,203 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 23 with the following transitions: [2018-01-24 15:50:17,205 INFO L201 CegarAbsIntRunner]: [0], [1], [2], [6], [11], [12], [13], [14], [17], [19], [28], [29], [30], [34], [39], [41], [79], [80], [81], [83] [2018-01-24 15:50:17,254 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 15:50:17,254 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 15:50:17,553 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 15:50:17,555 INFO L268 AbstractInterpreter]: Visited 20 different actions 27 times. Merged at 7 different actions 7 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 20 variables. [2018-01-24 15:50:17,564 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 15:50:17,564 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:17,564 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:50:17,574 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:17,574 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:50:17,597 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:17,607 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:17,627 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:50:17,628 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:17,688 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:50:17,712 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:17,712 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:50:17,716 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:17,716 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:50:17,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:17,739 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:17,759 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:50:17,759 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:17,766 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:50:17,767 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:50:17,768 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 3, 3, 3, 3] total 8 [2018-01-24 15:50:17,768 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:50:17,768 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 15:50:17,768 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 15:50:17,768 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=50, Unknown=0, NotChecked=0, Total=72 [2018-01-24 15:50:17,769 INFO L87 Difference]: Start difference. First operand 52 states and 56 transitions. Second operand 7 states. [2018-01-24 15:50:17,840 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:50:17,840 INFO L93 Difference]: Finished difference Result 68 states and 73 transitions. [2018-01-24 15:50:17,840 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 15:50:17,841 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 22 [2018-01-24 15:50:17,841 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:50:17,842 INFO L225 Difference]: With dead ends: 68 [2018-01-24 15:50:17,842 INFO L226 Difference]: Without dead ends: 67 [2018-01-24 15:50:17,843 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 81 SyntacticMatches, 4 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=35, Invalid=75, Unknown=0, NotChecked=0, Total=110 [2018-01-24 15:50:17,843 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2018-01-24 15:50:17,849 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 57. [2018-01-24 15:50:17,849 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-01-24 15:50:17,850 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 62 transitions. [2018-01-24 15:50:17,851 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 62 transitions. Word has length 22 [2018-01-24 15:50:17,851 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:50:17,851 INFO L432 AbstractCegarLoop]: Abstraction has 57 states and 62 transitions. [2018-01-24 15:50:17,851 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 15:50:17,852 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 62 transitions. [2018-01-24 15:50:17,852 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-24 15:50:17,853 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:17,853 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:17,853 INFO L371 AbstractCegarLoop]: === Iteration 6 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:17,853 INFO L82 PathProgramCache]: Analyzing trace with hash 1974903447, now seen corresponding path program 1 times [2018-01-24 15:50:17,854 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:17,855 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:17,855 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:17,855 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:17,855 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:17,865 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:17,866 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:50:17,900 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:50:17,901 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:17,901 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:50:17,901 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 24 with the following transitions: [2018-01-24 15:50:17,901 INFO L201 CegarAbsIntRunner]: [0], [1], [2], [6], [9], [23], [24], [28], [29], [30], [34], [39], [40], [41], [43], [45], [79], [80], [81], [83], [84] [2018-01-24 15:50:17,902 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 15:50:17,902 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 15:50:18,593 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 15:50:18,594 INFO L268 AbstractInterpreter]: Visited 21 different actions 59 times. Merged at 7 different actions 19 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 17 variables. [2018-01-24 15:50:18,601 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 15:50:18,601 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:18,602 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:50:18,617 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:18,617 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:50:18,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:18,636 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:18,764 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:50:18,764 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:18,876 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:50:18,910 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 15:50:18,911 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5, 5] imperfect sequences [4] total 10 [2018-01-24 15:50:18,911 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:50:18,911 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 15:50:18,912 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 15:50:18,912 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=63, Unknown=0, NotChecked=0, Total=90 [2018-01-24 15:50:18,912 INFO L87 Difference]: Start difference. First operand 57 states and 62 transitions. Second operand 5 states. [2018-01-24 15:50:19,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:50:19,019 INFO L93 Difference]: Finished difference Result 106 states and 116 transitions. [2018-01-24 15:50:19,022 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 15:50:19,023 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 23 [2018-01-24 15:50:19,023 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:50:19,024 INFO L225 Difference]: With dead ends: 106 [2018-01-24 15:50:19,024 INFO L226 Difference]: Without dead ends: 57 [2018-01-24 15:50:19,025 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 50 GetRequests, 39 SyntacticMatches, 2 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2018-01-24 15:50:19,025 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-01-24 15:50:19,030 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 57. [2018-01-24 15:50:19,030 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-01-24 15:50:19,031 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 61 transitions. [2018-01-24 15:50:19,032 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 61 transitions. Word has length 23 [2018-01-24 15:50:19,032 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:50:19,032 INFO L432 AbstractCegarLoop]: Abstraction has 57 states and 61 transitions. [2018-01-24 15:50:19,032 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 15:50:19,032 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 61 transitions. [2018-01-24 15:50:19,033 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-24 15:50:19,033 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:19,034 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:19,034 INFO L371 AbstractCegarLoop]: === Iteration 7 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:19,034 INFO L82 PathProgramCache]: Analyzing trace with hash 180123030, now seen corresponding path program 1 times [2018-01-24 15:50:19,034 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:19,035 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:19,035 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:19,036 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:19,036 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:19,048 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:19,049 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:50:19,219 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:50:19,219 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:19,219 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:50:19,219 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 24 with the following transitions: [2018-01-24 15:50:19,219 INFO L201 CegarAbsIntRunner]: [0], [1], [2], [6], [11], [13], [14], [16], [17], [19], [28], [29], [30], [34], [39], [41], [79], [80], [81], [83] [2018-01-24 15:50:19,221 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 15:50:19,221 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 15:50:19,320 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 15:50:19,320 INFO L268 AbstractInterpreter]: Visited 20 different actions 27 times. Merged at 7 different actions 7 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 20 variables. [2018-01-24 15:50:19,323 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 15:50:19,323 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:19,323 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:50:19,334 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:19,334 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:50:19,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:19,353 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:19,379 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:50:19,381 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:50:19,386 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:50:19,387 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 15:50:19,414 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:50:19,415 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:19,510 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:50:19,544 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:19,544 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:50:19,551 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:19,551 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:50:19,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:19,580 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:19,585 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:50:19,585 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:50:19,590 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:50:19,591 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 15:50:19,613 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:50:19,614 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:19,629 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [MP cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (6)] Exception during sending of exit command (exit): Broken pipe [2018-01-24 15:50:19,633 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:50:19,633 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-24 15:50:19,633 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:50:19,634 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 15:50:19,634 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 15:50:19,634 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=67, Unknown=0, NotChecked=0, Total=90 [2018-01-24 15:50:19,634 INFO L87 Difference]: Start difference. First operand 57 states and 61 transitions. Second operand 6 states. [2018-01-24 15:50:19,764 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:50:19,764 INFO L93 Difference]: Finished difference Result 64 states and 68 transitions. [2018-01-24 15:50:19,764 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 15:50:19,764 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 23 [2018-01-24 15:50:19,765 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:50:19,765 INFO L225 Difference]: With dead ends: 64 [2018-01-24 15:50:19,766 INFO L226 Difference]: Without dead ends: 63 [2018-01-24 15:50:19,766 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 98 GetRequests, 81 SyntacticMatches, 7 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=37, Invalid=95, Unknown=0, NotChecked=0, Total=132 [2018-01-24 15:50:19,766 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2018-01-24 15:50:19,773 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 58. [2018-01-24 15:50:19,773 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58 states. [2018-01-24 15:50:19,774 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 62 transitions. [2018-01-24 15:50:19,775 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 62 transitions. Word has length 23 [2018-01-24 15:50:19,775 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:50:19,775 INFO L432 AbstractCegarLoop]: Abstraction has 58 states and 62 transitions. [2018-01-24 15:50:19,775 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 15:50:19,775 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 62 transitions. [2018-01-24 15:50:19,776 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-24 15:50:19,776 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:19,776 INFO L322 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:19,777 INFO L371 AbstractCegarLoop]: === Iteration 8 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:19,777 INFO L82 PathProgramCache]: Analyzing trace with hash -280350351, now seen corresponding path program 2 times [2018-01-24 15:50:19,777 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:19,778 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:19,778 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:19,778 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:19,778 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:19,788 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:19,789 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:50:19,946 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 2 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:50:19,947 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:19,947 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:50:19,947 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:50:19,947 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:50:19,947 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:19,948 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:50:19,962 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:50:19,962 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:50:19,975 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:19,980 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:19,981 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:19,984 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:20,125 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 12 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:50:20,125 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:20,328 INFO L134 CoverageAnalysis]: Checked inductivity of 12 backedges. 6 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:50:20,349 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 2 imperfect interpolant sequences. [2018-01-24 15:50:20,349 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [10, 7] total 21 [2018-01-24 15:50:20,349 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:50:20,349 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 15:50:20,350 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 15:50:20,350 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=74, Invalid=346, Unknown=0, NotChecked=0, Total=420 [2018-01-24 15:50:20,350 INFO L87 Difference]: Start difference. First operand 58 states and 62 transitions. Second operand 7 states. [2018-01-24 15:50:20,589 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:50:20,589 INFO L93 Difference]: Finished difference Result 136 states and 147 transitions. [2018-01-24 15:50:20,590 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 15:50:20,590 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 28 [2018-01-24 15:50:20,590 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:50:20,591 INFO L225 Difference]: With dead ends: 136 [2018-01-24 15:50:20,591 INFO L226 Difference]: Without dead ends: 89 [2018-01-24 15:50:20,592 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 68 GetRequests, 45 SyntacticMatches, 1 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 106 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=107, Invalid=445, Unknown=0, NotChecked=0, Total=552 [2018-01-24 15:50:20,592 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2018-01-24 15:50:20,602 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 77. [2018-01-24 15:50:20,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-01-24 15:50:20,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 82 transitions. [2018-01-24 15:50:20,604 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 82 transitions. Word has length 28 [2018-01-24 15:50:20,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:50:20,604 INFO L432 AbstractCegarLoop]: Abstraction has 77 states and 82 transitions. [2018-01-24 15:50:20,604 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 15:50:20,605 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 82 transitions. [2018-01-24 15:50:20,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-24 15:50:20,605 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:20,606 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:20,606 INFO L371 AbstractCegarLoop]: === Iteration 9 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:20,606 INFO L82 PathProgramCache]: Analyzing trace with hash 1693854175, now seen corresponding path program 1 times [2018-01-24 15:50:20,606 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:20,607 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:20,607 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:50:20,607 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:20,607 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:20,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:20,617 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:50:20,762 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:50:20,763 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:20,763 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:50:20,763 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 30 with the following transitions: [2018-01-24 15:50:20,763 INFO L201 CegarAbsIntRunner]: [0], [1], [2], [6], [9], [11], [13], [14], [17], [19], [23], [24], [28], [29], [30], [34], [39], [40], [41], [43], [45], [79], [80], [81], [83], [84] [2018-01-24 15:50:20,764 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 15:50:20,764 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 15:50:21,130 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 15:50:21,130 INFO L268 AbstractInterpreter]: Visited 26 different actions 96 times. Merged at 16 different actions 45 times. Never widened. Found 7 fixpoints after 3 different actions. Largest state had 21 variables. [2018-01-24 15:50:21,134 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 15:50:21,134 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:21,134 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:50:21,145 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:21,145 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:50:21,160 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:21,162 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:21,361 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:50:21,361 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:21,737 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:50:21,758 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:21,758 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:50:21,767 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:21,767 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:50:21,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:21,790 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:21,832 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 15:50:21,832 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:21,893 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 3 proven. 0 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 15:50:21,894 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 3 imperfect interpolant sequences. [2018-01-24 15:50:21,895 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4, 4] imperfect sequences [8, 6, 6] total 16 [2018-01-24 15:50:21,895 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 15:50:21,895 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 15:50:21,895 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 15:50:21,896 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=195, Unknown=0, NotChecked=0, Total=240 [2018-01-24 15:50:21,896 INFO L87 Difference]: Start difference. First operand 77 states and 82 transitions. Second operand 5 states. [2018-01-24 15:50:21,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:50:21,941 INFO L93 Difference]: Finished difference Result 88 states and 92 transitions. [2018-01-24 15:50:21,941 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 15:50:21,941 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 29 [2018-01-24 15:50:21,941 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:50:21,942 INFO L225 Difference]: With dead ends: 88 [2018-01-24 15:50:21,942 INFO L226 Difference]: Without dead ends: 86 [2018-01-24 15:50:21,943 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 122 GetRequests, 102 SyntacticMatches, 6 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 32 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=45, Invalid=195, Unknown=0, NotChecked=0, Total=240 [2018-01-24 15:50:21,943 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 86 states. [2018-01-24 15:50:21,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 86 to 74. [2018-01-24 15:50:21,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74 states. [2018-01-24 15:50:21,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 79 transitions. [2018-01-24 15:50:21,952 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 79 transitions. Word has length 29 [2018-01-24 15:50:21,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:50:21,952 INFO L432 AbstractCegarLoop]: Abstraction has 74 states and 79 transitions. [2018-01-24 15:50:21,952 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 15:50:21,952 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 79 transitions. [2018-01-24 15:50:21,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-24 15:50:21,954 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:21,954 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:21,954 INFO L371 AbstractCegarLoop]: === Iteration 10 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:21,954 INFO L82 PathProgramCache]: Analyzing trace with hash 1643098334, now seen corresponding path program 1 times [2018-01-24 15:50:21,954 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:21,955 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:21,955 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:21,955 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:21,956 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:21,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:21,965 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:50:22,155 WARN L146 SmtUtils]: Spent 110ms on a formula simplification. DAG size of input: 17 DAG size of output 16 [2018-01-24 15:50:22,220 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:50:22,221 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:22,221 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:50:22,221 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 38 with the following transitions: [2018-01-24 15:50:22,221 INFO L201 CegarAbsIntRunner]: [0], [1], [2], [6], [9], [11], [13], [14], [17], [19], [23], [24], [28], [29], [30], [34], [37], [39], [41], [43], [45], [49], [53], [58], [60], [63], [65], [66], [67], [78], [79], [80], [81], [83], [84] [2018-01-24 15:50:22,223 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 15:50:22,223 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 15:50:22,789 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 15:50:22,789 INFO L268 AbstractInterpreter]: Visited 35 different actions 123 times. Merged at 25 different actions 62 times. Never widened. Found 7 fixpoints after 3 different actions. Largest state had 21 variables. [2018-01-24 15:50:22,801 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 15:50:22,801 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:22,801 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:50:22,809 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:22,809 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:50:22,827 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:22,829 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:22,904 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:50:22,904 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:23,013 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 2 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 15:50:23,034 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:23,034 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:50:23,041 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:23,041 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:50:23,066 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:23,071 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:23,142 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 15:50:23,142 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:23,164 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 15:50:23,166 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:50:23,166 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 6, 6, 4, 4] total 17 [2018-01-24 15:50:23,166 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:50:23,167 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-24 15:50:23,167 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-24 15:50:23,167 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=50, Invalid=222, Unknown=0, NotChecked=0, Total=272 [2018-01-24 15:50:23,167 INFO L87 Difference]: Start difference. First operand 74 states and 79 transitions. Second operand 13 states. [2018-01-24 15:50:23,562 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:50:23,562 INFO L93 Difference]: Finished difference Result 119 states and 128 transitions. [2018-01-24 15:50:23,563 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-24 15:50:23,563 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 37 [2018-01-24 15:50:23,563 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:50:23,563 INFO L225 Difference]: With dead ends: 119 [2018-01-24 15:50:23,563 INFO L226 Difference]: Without dead ends: 69 [2018-01-24 15:50:23,564 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 166 GetRequests, 135 SyntacticMatches, 5 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 170 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=154, Invalid=602, Unknown=0, NotChecked=0, Total=756 [2018-01-24 15:50:23,564 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2018-01-24 15:50:23,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 58. [2018-01-24 15:50:23,570 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58 states. [2018-01-24 15:50:23,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 59 transitions. [2018-01-24 15:50:23,570 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 59 transitions. Word has length 37 [2018-01-24 15:50:23,571 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:50:23,571 INFO L432 AbstractCegarLoop]: Abstraction has 58 states and 59 transitions. [2018-01-24 15:50:23,571 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-24 15:50:23,571 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 59 transitions. [2018-01-24 15:50:23,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-24 15:50:23,572 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:23,572 INFO L322 BasicCegarLoop]: trace histogram [6, 5, 4, 4, 4, 4, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:23,572 INFO L371 AbstractCegarLoop]: === Iteration 11 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:23,572 INFO L82 PathProgramCache]: Analyzing trace with hash -821508032, now seen corresponding path program 1 times [2018-01-24 15:50:23,572 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:23,573 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:23,573 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:23,573 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:23,573 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:23,588 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:23,589 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:50:23,718 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 37 proven. 12 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-01-24 15:50:23,718 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:23,718 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:50:23,718 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 53 with the following transitions: [2018-01-24 15:50:23,718 INFO L201 CegarAbsIntRunner]: [0], [1], [2], [6], [9], [11], [12], [13], [14], [17], [19], [23], [24], [28], [29], [30], [34], [39], [41], [43], [45], [79], [80], [81], [83], [84] [2018-01-24 15:50:23,719 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 15:50:23,719 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 15:50:23,986 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 15:50:23,986 INFO L268 AbstractInterpreter]: Visited 26 different actions 99 times. Merged at 16 different actions 46 times. Never widened. Found 7 fixpoints after 3 different actions. Largest state had 21 variables. [2018-01-24 15:50:23,994 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 15:50:23,994 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:23,994 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:50:24,004 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:24,005 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:50:24,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:24,027 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:24,090 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 36 proven. 12 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 15:50:24,090 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:24,205 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 36 proven. 12 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 15:50:24,241 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:24,241 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:50:24,246 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:24,247 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:50:24,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:24,292 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:24,297 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 36 proven. 12 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 15:50:24,297 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:24,322 INFO L134 CoverageAnalysis]: Checked inductivity of 63 backedges. 36 proven. 12 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 15:50:24,324 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:50:24,325 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 4, 4, 4, 4] total 15 [2018-01-24 15:50:24,325 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:50:24,325 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-24 15:50:24,326 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-24 15:50:24,326 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=193, Unknown=0, NotChecked=0, Total=240 [2018-01-24 15:50:24,326 INFO L87 Difference]: Start difference. First operand 58 states and 59 transitions. Second operand 13 states. [2018-01-24 15:50:24,529 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:50:24,529 INFO L93 Difference]: Finished difference Result 112 states and 118 transitions. [2018-01-24 15:50:24,530 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-24 15:50:24,530 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 52 [2018-01-24 15:50:24,530 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:50:24,531 INFO L225 Difference]: With dead ends: 112 [2018-01-24 15:50:24,531 INFO L226 Difference]: Without dead ends: 111 [2018-01-24 15:50:24,531 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 223 GetRequests, 203 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=109, Invalid=353, Unknown=0, NotChecked=0, Total=462 [2018-01-24 15:50:24,531 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-01-24 15:50:24,537 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 89. [2018-01-24 15:50:24,537 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-01-24 15:50:24,538 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 93 transitions. [2018-01-24 15:50:24,538 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 93 transitions. Word has length 52 [2018-01-24 15:50:24,538 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:50:24,539 INFO L432 AbstractCegarLoop]: Abstraction has 89 states and 93 transitions. [2018-01-24 15:50:24,539 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-24 15:50:24,539 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 93 transitions. [2018-01-24 15:50:24,540 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-01-24 15:50:24,540 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:24,540 INFO L322 BasicCegarLoop]: trace histogram [6, 5, 5, 4, 4, 4, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:24,540 INFO L371 AbstractCegarLoop]: === Iteration 12 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:24,541 INFO L82 PathProgramCache]: Analyzing trace with hash 303054831, now seen corresponding path program 1 times [2018-01-24 15:50:24,541 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:24,541 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:24,542 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:24,542 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:24,542 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:24,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:24,554 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:50:24,768 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 45 proven. 8 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-01-24 15:50:24,769 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:24,769 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:50:24,769 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 54 with the following transitions: [2018-01-24 15:50:24,769 INFO L201 CegarAbsIntRunner]: [0], [1], [2], [6], [9], [11], [13], [14], [16], [17], [19], [23], [24], [28], [29], [30], [34], [39], [41], [43], [45], [79], [80], [81], [83], [84] [2018-01-24 15:50:24,770 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 15:50:24,770 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 15:50:25,034 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 15:50:25,034 INFO L268 AbstractInterpreter]: Visited 26 different actions 99 times. Merged at 16 different actions 46 times. Never widened. Found 7 fixpoints after 3 different actions. Largest state had 21 variables. [2018-01-24 15:50:25,044 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 15:50:25,044 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:25,044 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:50:25,053 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:25,054 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:50:25,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:25,076 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:25,080 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:50:25,081 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:50:25,085 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:50:25,085 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 15:50:25,193 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 39 proven. 14 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-01-24 15:50:25,194 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:25,349 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 39 proven. 14 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-01-24 15:50:25,369 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:25,369 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:50:25,372 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:25,372 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:50:25,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:25,401 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:25,404 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:50:25,404 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:50:25,417 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:50:25,417 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 15:50:25,438 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 39 proven. 14 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-01-24 15:50:25,438 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:25,456 INFO L134 CoverageAnalysis]: Checked inductivity of 67 backedges. 39 proven. 14 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-01-24 15:50:25,458 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:50:25,458 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 7, 6, 7, 6] total 19 [2018-01-24 15:50:25,458 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:50:25,459 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 15:50:25,459 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 15:50:25,459 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=75, Invalid=305, Unknown=0, NotChecked=0, Total=380 [2018-01-24 15:50:25,459 INFO L87 Difference]: Start difference. First operand 89 states and 93 transitions. Second operand 15 states. [2018-01-24 15:50:25,743 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:50:25,743 INFO L93 Difference]: Finished difference Result 109 states and 115 transitions. [2018-01-24 15:50:25,744 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-24 15:50:25,744 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 53 [2018-01-24 15:50:25,744 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:50:25,745 INFO L225 Difference]: With dead ends: 109 [2018-01-24 15:50:25,745 INFO L226 Difference]: Without dead ends: 108 [2018-01-24 15:50:25,745 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 228 GetRequests, 198 SyntacticMatches, 3 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 207 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=189, Invalid=623, Unknown=0, NotChecked=0, Total=812 [2018-01-24 15:50:25,746 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108 states. [2018-01-24 15:50:25,754 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108 to 88. [2018-01-24 15:50:25,754 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 88 states. [2018-01-24 15:50:25,755 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 91 transitions. [2018-01-24 15:50:25,755 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 91 transitions. Word has length 53 [2018-01-24 15:50:25,756 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:50:25,756 INFO L432 AbstractCegarLoop]: Abstraction has 88 states and 91 transitions. [2018-01-24 15:50:25,756 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 15:50:25,756 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 91 transitions. [2018-01-24 15:50:25,757 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-01-24 15:50:25,757 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:25,757 INFO L322 BasicCegarLoop]: trace histogram [10, 8, 7, 7, 7, 7, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:25,757 INFO L371 AbstractCegarLoop]: === Iteration 13 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:25,757 INFO L82 PathProgramCache]: Analyzing trace with hash 1534196039, now seen corresponding path program 2 times [2018-01-24 15:50:25,757 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:25,758 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:25,758 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:25,758 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:25,758 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:25,772 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:25,773 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:50:25,989 INFO L134 CoverageAnalysis]: Checked inductivity of 201 backedges. 110 proven. 76 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 15:50:25,989 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:26,041 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:50:26,041 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:50:26,041 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:50:26,041 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:26,041 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:50:26,046 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:50:26,047 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:50:26,055 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:26,064 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:26,066 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:26,067 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:26,122 INFO L134 CoverageAnalysis]: Checked inductivity of 201 backedges. 153 proven. 10 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2018-01-24 15:50:26,122 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:26,228 INFO L134 CoverageAnalysis]: Checked inductivity of 201 backedges. 153 proven. 10 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2018-01-24 15:50:26,249 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:26,249 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:50:26,258 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:50:26,259 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:50:26,271 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:26,292 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:26,306 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:26,310 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:26,324 INFO L134 CoverageAnalysis]: Checked inductivity of 201 backedges. 153 proven. 10 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2018-01-24 15:50:26,324 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:26,373 INFO L134 CoverageAnalysis]: Checked inductivity of 201 backedges. 153 proven. 10 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2018-01-24 15:50:26,375 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:50:26,375 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 8, 8, 8, 8] total 24 [2018-01-24 15:50:26,375 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:50:26,376 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-24 15:50:26,376 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-24 15:50:26,376 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=466, Unknown=0, NotChecked=0, Total=552 [2018-01-24 15:50:26,376 INFO L87 Difference]: Start difference. First operand 88 states and 91 transitions. Second operand 21 states. [2018-01-24 15:50:26,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:50:26,641 INFO L93 Difference]: Finished difference Result 147 states and 154 transitions. [2018-01-24 15:50:26,641 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-24 15:50:26,641 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 82 [2018-01-24 15:50:26,641 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:50:26,642 INFO L225 Difference]: With dead ends: 147 [2018-01-24 15:50:26,642 INFO L226 Difference]: Without dead ends: 98 [2018-01-24 15:50:26,643 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 354 GetRequests, 312 SyntacticMatches, 8 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 373 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=224, Invalid=1036, Unknown=0, NotChecked=0, Total=1260 [2018-01-24 15:50:26,643 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-01-24 15:50:26,649 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 94. [2018-01-24 15:50:26,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-01-24 15:50:26,650 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 95 transitions. [2018-01-24 15:50:26,650 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 95 transitions. Word has length 82 [2018-01-24 15:50:26,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:50:26,650 INFO L432 AbstractCegarLoop]: Abstraction has 94 states and 95 transitions. [2018-01-24 15:50:26,651 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-24 15:50:26,651 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 95 transitions. [2018-01-24 15:50:26,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-01-24 15:50:26,651 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:26,652 INFO L322 BasicCegarLoop]: trace histogram [11, 9, 8, 8, 8, 8, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:26,652 INFO L371 AbstractCegarLoop]: === Iteration 14 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:26,652 INFO L82 PathProgramCache]: Analyzing trace with hash -85555777, now seen corresponding path program 3 times [2018-01-24 15:50:26,652 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:26,652 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:26,652 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:50:26,653 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:26,653 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:26,668 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:26,669 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:50:26,844 INFO L134 CoverageAnalysis]: Checked inductivity of 250 backedges. 123 proven. 27 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-01-24 15:50:26,844 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:26,845 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:50:26,845 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:50:26,845 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:50:26,845 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:26,845 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:50:26,851 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 15:50:26,851 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 15:50:26,861 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:26,865 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:26,870 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:26,871 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:26,874 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:26,938 INFO L134 CoverageAnalysis]: Checked inductivity of 250 backedges. 123 proven. 27 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-01-24 15:50:26,938 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:27,118 INFO L134 CoverageAnalysis]: Checked inductivity of 250 backedges. 123 proven. 27 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-01-24 15:50:27,138 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:27,138 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:50:27,143 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 15:50:27,143 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 15:50:27,154 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:27,163 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:27,181 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:27,192 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:27,195 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:27,233 INFO L134 CoverageAnalysis]: Checked inductivity of 250 backedges. 127 proven. 33 refuted. 0 times theorem prover too weak. 90 trivial. 0 not checked. [2018-01-24 15:50:27,233 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:27,405 INFO L134 CoverageAnalysis]: Checked inductivity of 250 backedges. 125 proven. 35 refuted. 0 times theorem prover too weak. 90 trivial. 0 not checked. [2018-01-24 15:50:27,407 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:50:27,407 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 11, 11] total 34 [2018-01-24 15:50:27,407 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:50:27,407 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-24 15:50:27,407 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-24 15:50:27,408 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=185, Invalid=1005, Unknown=0, NotChecked=0, Total=1190 [2018-01-24 15:50:27,408 INFO L87 Difference]: Start difference. First operand 94 states and 95 transitions. Second operand 17 states. [2018-01-24 15:50:27,522 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:50:27,522 INFO L93 Difference]: Finished difference Result 130 states and 132 transitions. [2018-01-24 15:50:27,523 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 15:50:27,523 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 88 [2018-01-24 15:50:27,523 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:50:27,524 INFO L225 Difference]: With dead ends: 130 [2018-01-24 15:50:27,524 INFO L226 Difference]: Without dead ends: 129 [2018-01-24 15:50:27,524 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 364 GetRequests, 328 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 507 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=234, Invalid=1172, Unknown=0, NotChecked=0, Total=1406 [2018-01-24 15:50:27,524 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-01-24 15:50:27,531 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 126. [2018-01-24 15:50:27,531 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-01-24 15:50:27,532 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 129 transitions. [2018-01-24 15:50:27,532 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 129 transitions. Word has length 88 [2018-01-24 15:50:27,533 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:50:27,533 INFO L432 AbstractCegarLoop]: Abstraction has 126 states and 129 transitions. [2018-01-24 15:50:27,533 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-24 15:50:27,533 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 129 transitions. [2018-01-24 15:50:27,534 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-01-24 15:50:27,535 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:27,535 INFO L322 BasicCegarLoop]: trace histogram [11, 9, 9, 8, 8, 8, 3, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:27,535 INFO L371 AbstractCegarLoop]: === Iteration 15 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:27,535 INFO L82 PathProgramCache]: Analyzing trace with hash 1642738256, now seen corresponding path program 2 times [2018-01-24 15:50:27,535 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:27,536 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:27,536 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:50:27,536 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:27,536 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:27,553 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:27,554 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:50:27,780 INFO L134 CoverageAnalysis]: Checked inductivity of 258 backedges. 138 proven. 20 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-01-24 15:50:27,780 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:27,780 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:50:27,781 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:50:27,781 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:50:27,781 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:27,781 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:50:27,789 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:50:27,789 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:50:27,797 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:27,808 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:27,821 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:27,824 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:27,826 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:50:27,827 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:50:27,829 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:50:27,829 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 15:50:27,931 INFO L134 CoverageAnalysis]: Checked inductivity of 258 backedges. 128 proven. 30 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-01-24 15:50:27,931 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:28,028 INFO L134 CoverageAnalysis]: Checked inductivity of 258 backedges. 128 proven. 30 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-01-24 15:50:28,061 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:28,061 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:50:28,064 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:50:28,064 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:50:28,076 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:28,097 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:28,113 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:28,118 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:28,122 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:50:28,123 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:50:28,126 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:50:28,127 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 15:50:28,186 INFO L134 CoverageAnalysis]: Checked inductivity of 258 backedges. 128 proven. 30 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-01-24 15:50:28,186 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:28,212 INFO L134 CoverageAnalysis]: Checked inductivity of 258 backedges. 128 proven. 30 refuted. 0 times theorem prover too weak. 100 trivial. 0 not checked. [2018-01-24 15:50:28,214 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:50:28,214 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 8, 7, 8, 7] total 22 [2018-01-24 15:50:28,214 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:50:28,214 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-24 15:50:28,214 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-24 15:50:28,214 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=96, Invalid=410, Unknown=0, NotChecked=0, Total=506 [2018-01-24 15:50:28,215 INFO L87 Difference]: Start difference. First operand 126 states and 129 transitions. Second operand 17 states. [2018-01-24 15:50:28,526 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:50:28,527 INFO L93 Difference]: Finished difference Result 152 states and 158 transitions. [2018-01-24 15:50:28,527 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-24 15:50:28,527 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 89 [2018-01-24 15:50:28,527 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:50:28,528 INFO L225 Difference]: With dead ends: 152 [2018-01-24 15:50:28,528 INFO L226 Difference]: Without dead ends: 150 [2018-01-24 15:50:28,528 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 375 GetRequests, 336 SyntacticMatches, 7 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 356 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=247, Invalid=875, Unknown=0, NotChecked=0, Total=1122 [2018-01-24 15:50:28,528 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-01-24 15:50:28,537 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 130. [2018-01-24 15:50:28,538 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-01-24 15:50:28,539 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 133 transitions. [2018-01-24 15:50:28,539 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 133 transitions. Word has length 89 [2018-01-24 15:50:28,539 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:50:28,539 INFO L432 AbstractCegarLoop]: Abstraction has 130 states and 133 transitions. [2018-01-24 15:50:28,539 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-24 15:50:28,539 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 133 transitions. [2018-01-24 15:50:28,541 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 125 [2018-01-24 15:50:28,541 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:28,541 INFO L322 BasicCegarLoop]: trace histogram [16, 13, 12, 12, 12, 12, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:28,541 INFO L371 AbstractCegarLoop]: === Iteration 16 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:28,541 INFO L82 PathProgramCache]: Analyzing trace with hash 347418750, now seen corresponding path program 4 times [2018-01-24 15:50:28,542 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:28,542 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:28,542 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:50:28,543 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:28,543 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:28,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:28,561 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:50:28,813 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 321 proven. 138 refuted. 0 times theorem prover too weak. 102 trivial. 0 not checked. [2018-01-24 15:50:28,813 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:28,813 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:50:28,814 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:50:28,814 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:50:28,814 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:28,814 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:50:28,819 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-24 15:50:28,819 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-24 15:50:28,843 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:28,846 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:28,932 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 401 proven. 24 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-01-24 15:50:28,933 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:29,062 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 401 proven. 24 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-01-24 15:50:29,082 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:29,082 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:50:29,087 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-24 15:50:29,087 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-24 15:50:29,142 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:29,146 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:29,165 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 401 proven. 24 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-01-24 15:50:29,165 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:29,245 INFO L134 CoverageAnalysis]: Checked inductivity of 561 backedges. 401 proven. 24 refuted. 0 times theorem prover too weak. 136 trivial. 0 not checked. [2018-01-24 15:50:29,247 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:50:29,247 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 10, 10, 10, 10] total 29 [2018-01-24 15:50:29,247 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:50:29,247 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-24 15:50:29,248 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-24 15:50:29,248 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=124, Invalid=688, Unknown=0, NotChecked=0, Total=812 [2018-01-24 15:50:29,248 INFO L87 Difference]: Start difference. First operand 130 states and 133 transitions. Second operand 25 states. [2018-01-24 15:50:29,671 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:50:29,671 INFO L93 Difference]: Finished difference Result 195 states and 202 transitions. [2018-01-24 15:50:29,672 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-24 15:50:29,672 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 124 [2018-01-24 15:50:29,672 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:50:29,673 INFO L225 Difference]: With dead ends: 195 [2018-01-24 15:50:29,673 INFO L226 Difference]: Without dead ends: 140 [2018-01-24 15:50:29,674 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 529 GetRequests, 475 SyntacticMatches, 10 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 683 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=357, Invalid=1713, Unknown=0, NotChecked=0, Total=2070 [2018-01-24 15:50:29,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-01-24 15:50:29,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 136. [2018-01-24 15:50:29,682 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-01-24 15:50:29,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 137 transitions. [2018-01-24 15:50:29,683 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 137 transitions. Word has length 124 [2018-01-24 15:50:29,683 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:50:29,683 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 137 transitions. [2018-01-24 15:50:29,683 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-24 15:50:29,683 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 137 transitions. [2018-01-24 15:50:29,684 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2018-01-24 15:50:29,684 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:29,684 INFO L322 BasicCegarLoop]: trace histogram [17, 14, 13, 13, 13, 13, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:29,684 INFO L371 AbstractCegarLoop]: === Iteration 17 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:29,684 INFO L82 PathProgramCache]: Analyzing trace with hash 714000310, now seen corresponding path program 5 times [2018-01-24 15:50:29,685 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:29,685 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:29,685 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:50:29,685 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:29,685 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:29,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:29,701 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:50:29,813 INFO L134 CoverageAnalysis]: Checked inductivity of 642 backedges. 276 proven. 48 refuted. 0 times theorem prover too weak. 318 trivial. 0 not checked. [2018-01-24 15:50:29,813 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:29,813 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:50:29,813 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:50:29,813 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:50:29,813 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:29,813 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:50:29,818 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-24 15:50:29,818 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:50:29,827 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:29,831 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:29,836 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:29,840 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:29,845 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:29,850 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:29,851 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:29,853 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:29,891 INFO L134 CoverageAnalysis]: Checked inductivity of 642 backedges. 273 proven. 48 refuted. 0 times theorem prover too weak. 321 trivial. 0 not checked. [2018-01-24 15:50:29,891 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:29,949 INFO L134 CoverageAnalysis]: Checked inductivity of 642 backedges. 273 proven. 48 refuted. 0 times theorem prover too weak. 321 trivial. 0 not checked. [2018-01-24 15:50:29,969 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:29,970 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:50:29,972 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-24 15:50:29,972 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:50:29,986 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:29,996 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:30,016 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:30,046 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:30,088 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:30,163 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:30,184 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:30,189 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:30,199 INFO L134 CoverageAnalysis]: Checked inductivity of 642 backedges. 273 proven. 48 refuted. 0 times theorem prover too weak. 321 trivial. 0 not checked. [2018-01-24 15:50:30,199 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:30,232 INFO L134 CoverageAnalysis]: Checked inductivity of 642 backedges. 273 proven. 48 refuted. 0 times theorem prover too weak. 321 trivial. 0 not checked. [2018-01-24 15:50:30,233 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:50:30,234 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 6, 6, 6, 6] total 21 [2018-01-24 15:50:30,234 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:50:30,234 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-24 15:50:30,234 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-24 15:50:30,234 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=86, Invalid=376, Unknown=0, NotChecked=0, Total=462 [2018-01-24 15:50:30,234 INFO L87 Difference]: Start difference. First operand 136 states and 137 transitions. Second operand 17 states. [2018-01-24 15:50:30,521 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:50:30,521 INFO L93 Difference]: Finished difference Result 202 states and 208 transitions. [2018-01-24 15:50:30,521 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-24 15:50:30,521 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 130 [2018-01-24 15:50:30,522 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:50:30,523 INFO L225 Difference]: With dead ends: 202 [2018-01-24 15:50:30,523 INFO L226 Difference]: Without dead ends: 201 [2018-01-24 15:50:30,523 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 539 GetRequests, 511 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 223 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=188, Invalid=682, Unknown=0, NotChecked=0, Total=870 [2018-01-24 15:50:30,523 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201 states. [2018-01-24 15:50:30,533 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201 to 179. [2018-01-24 15:50:30,533 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 179 states. [2018-01-24 15:50:30,534 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 179 states to 179 states and 183 transitions. [2018-01-24 15:50:30,534 INFO L78 Accepts]: Start accepts. Automaton has 179 states and 183 transitions. Word has length 130 [2018-01-24 15:50:30,534 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:50:30,534 INFO L432 AbstractCegarLoop]: Abstraction has 179 states and 183 transitions. [2018-01-24 15:50:30,534 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-24 15:50:30,534 INFO L276 IsEmpty]: Start isEmpty. Operand 179 states and 183 transitions. [2018-01-24 15:50:30,535 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-01-24 15:50:30,535 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:30,535 INFO L322 BasicCegarLoop]: trace histogram [17, 14, 14, 13, 13, 13, 4, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:30,535 INFO L371 AbstractCegarLoop]: === Iteration 18 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:30,536 INFO L82 PathProgramCache]: Analyzing trace with hash 659173177, now seen corresponding path program 3 times [2018-01-24 15:50:30,536 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:30,536 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:30,536 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:50:30,536 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:30,537 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:30,552 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:30,553 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:50:30,758 INFO L134 CoverageAnalysis]: Checked inductivity of 655 backedges. 299 proven. 38 refuted. 0 times theorem prover too weak. 318 trivial. 0 not checked. [2018-01-24 15:50:30,758 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:30,758 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:50:30,758 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:50:30,758 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:50:30,758 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:30,758 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:50:30,765 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 15:50:30,765 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 15:50:30,777 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:30,781 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:30,785 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:30,790 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:30,791 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:30,793 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:30,797 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:50:30,798 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:50:30,800 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:50:30,800 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 15:50:31,010 INFO L134 CoverageAnalysis]: Checked inductivity of 655 backedges. 299 proven. 38 refuted. 0 times theorem prover too weak. 318 trivial. 0 not checked. [2018-01-24 15:50:31,010 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:31,283 INFO L134 CoverageAnalysis]: Checked inductivity of 655 backedges. 285 proven. 52 refuted. 0 times theorem prover too weak. 318 trivial. 0 not checked. [2018-01-24 15:50:31,303 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:31,303 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:50:31,306 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 15:50:31,306 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 15:50:31,320 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:31,329 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:31,349 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:31,385 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:31,401 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:31,406 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:31,408 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:50:31,409 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:50:31,411 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:50:31,411 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 15:50:31,565 INFO L134 CoverageAnalysis]: Checked inductivity of 655 backedges. 305 proven. 58 refuted. 0 times theorem prover too weak. 292 trivial. 0 not checked. [2018-01-24 15:50:31,565 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:31,802 INFO L134 CoverageAnalysis]: Checked inductivity of 655 backedges. 287 proven. 76 refuted. 0 times theorem prover too weak. 292 trivial. 0 not checked. [2018-01-24 15:50:31,804 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:50:31,804 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 12, 11, 14, 13] total 46 [2018-01-24 15:50:31,804 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:50:31,804 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-24 15:50:31,804 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-24 15:50:31,805 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=337, Invalid=1825, Unknown=0, NotChecked=0, Total=2162 [2018-01-24 15:50:31,805 INFO L87 Difference]: Start difference. First operand 179 states and 183 transitions. Second operand 23 states. [2018-01-24 15:50:32,007 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:50:32,008 INFO L93 Difference]: Finished difference Result 182 states and 185 transitions. [2018-01-24 15:50:32,008 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-24 15:50:32,008 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 131 [2018-01-24 15:50:32,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:50:32,010 INFO L225 Difference]: With dead ends: 182 [2018-01-24 15:50:32,010 INFO L226 Difference]: Without dead ends: 181 [2018-01-24 15:50:32,011 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 536 GetRequests, 477 SyntacticMatches, 11 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1412 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=402, Invalid=2048, Unknown=0, NotChecked=0, Total=2450 [2018-01-24 15:50:32,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states. [2018-01-24 15:50:32,026 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 177. [2018-01-24 15:50:32,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-01-24 15:50:32,028 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 180 transitions. [2018-01-24 15:50:32,028 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 180 transitions. Word has length 131 [2018-01-24 15:50:32,028 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:50:32,028 INFO L432 AbstractCegarLoop]: Abstraction has 177 states and 180 transitions. [2018-01-24 15:50:32,028 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-24 15:50:32,029 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 180 transitions. [2018-01-24 15:50:32,030 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 168 [2018-01-24 15:50:32,030 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:32,030 INFO L322 BasicCegarLoop]: trace histogram [22, 18, 18, 17, 17, 17, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:32,031 INFO L371 AbstractCegarLoop]: === Iteration 19 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:32,031 INFO L82 PathProgramCache]: Analyzing trace with hash 1539464154, now seen corresponding path program 4 times [2018-01-24 15:50:32,031 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:32,032 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:32,032 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:50:32,032 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:32,032 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:32,053 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:32,054 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:50:32,383 INFO L134 CoverageAnalysis]: Checked inductivity of 1120 backedges. 656 proven. 247 refuted. 0 times theorem prover too weak. 217 trivial. 0 not checked. [2018-01-24 15:50:32,383 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:32,383 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:50:32,383 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:50:32,383 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:50:32,384 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:32,384 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:50:32,388 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-24 15:50:32,389 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-24 15:50:32,417 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:32,420 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:32,505 INFO L134 CoverageAnalysis]: Checked inductivity of 1120 backedges. 733 proven. 44 refuted. 0 times theorem prover too weak. 343 trivial. 0 not checked. [2018-01-24 15:50:32,505 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:32,656 INFO L134 CoverageAnalysis]: Checked inductivity of 1120 backedges. 733 proven. 44 refuted. 0 times theorem prover too weak. 343 trivial. 0 not checked. [2018-01-24 15:50:32,676 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:32,676 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:50:32,679 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-24 15:50:32,679 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-24 15:50:32,746 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:32,753 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:32,780 INFO L134 CoverageAnalysis]: Checked inductivity of 1120 backedges. 733 proven. 44 refuted. 0 times theorem prover too weak. 343 trivial. 0 not checked. [2018-01-24 15:50:32,780 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:32,876 INFO L134 CoverageAnalysis]: Checked inductivity of 1120 backedges. 733 proven. 44 refuted. 0 times theorem prover too weak. 343 trivial. 0 not checked. [2018-01-24 15:50:32,877 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:50:32,877 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 12, 12, 12, 12] total 28 [2018-01-24 15:50:32,877 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:50:32,878 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-24 15:50:32,878 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-24 15:50:32,878 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=145, Invalid=611, Unknown=0, NotChecked=0, Total=756 [2018-01-24 15:50:32,878 INFO L87 Difference]: Start difference. First operand 177 states and 180 transitions. Second operand 23 states. [2018-01-24 15:50:33,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:50:33,282 INFO L93 Difference]: Finished difference Result 242 states and 248 transitions. [2018-01-24 15:50:33,282 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-24 15:50:33,282 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 167 [2018-01-24 15:50:33,282 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:50:33,283 INFO L225 Difference]: With dead ends: 242 [2018-01-24 15:50:33,283 INFO L226 Difference]: Without dead ends: 191 [2018-01-24 15:50:33,283 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 699 GetRequests, 648 SyntacticMatches, 12 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 442 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=332, Invalid=1308, Unknown=0, NotChecked=0, Total=1640 [2018-01-24 15:50:33,284 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 191 states. [2018-01-24 15:50:33,298 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 191 to 183. [2018-01-24 15:50:33,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 183 states. [2018-01-24 15:50:33,299 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 183 states to 183 states and 185 transitions. [2018-01-24 15:50:33,299 INFO L78 Accepts]: Start accepts. Automaton has 183 states and 185 transitions. Word has length 167 [2018-01-24 15:50:33,299 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:50:33,299 INFO L432 AbstractCegarLoop]: Abstraction has 183 states and 185 transitions. [2018-01-24 15:50:33,300 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-24 15:50:33,300 INFO L276 IsEmpty]: Start isEmpty. Operand 183 states and 185 transitions. [2018-01-24 15:50:33,300 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 174 [2018-01-24 15:50:33,301 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:33,301 INFO L322 BasicCegarLoop]: trace histogram [23, 19, 19, 18, 18, 18, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:33,301 INFO L371 AbstractCegarLoop]: === Iteration 20 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:33,301 INFO L82 PathProgramCache]: Analyzing trace with hash -679675678, now seen corresponding path program 5 times [2018-01-24 15:50:33,301 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:33,302 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:33,302 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:50:33,302 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:33,302 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:33,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:33,327 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:50:33,603 INFO L134 CoverageAnalysis]: Checked inductivity of 1234 backedges. 436 proven. 52 refuted. 0 times theorem prover too weak. 746 trivial. 0 not checked. [2018-01-24 15:50:33,603 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:33,603 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:50:33,603 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:50:33,603 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:50:33,603 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:33,603 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:50:33,609 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-24 15:50:33,609 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:50:33,623 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:33,637 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:33,656 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:33,673 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:33,690 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:33,706 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:33,718 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:33,723 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:33,727 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:33,734 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:50:33,735 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:50:33,758 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:50:33,758 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 15:50:34,050 INFO L134 CoverageAnalysis]: Checked inductivity of 1234 backedges. 436 proven. 52 refuted. 0 times theorem prover too weak. 746 trivial. 0 not checked. [2018-01-24 15:50:34,050 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:34,193 INFO L134 CoverageAnalysis]: Checked inductivity of 1234 backedges. 436 proven. 52 refuted. 0 times theorem prover too weak. 746 trivial. 0 not checked. [2018-01-24 15:50:34,213 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:34,213 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:50:34,216 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-24 15:50:34,216 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:50:34,235 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:34,248 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:34,277 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:34,317 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:34,395 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:34,494 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:34,697 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:34,732 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:34,740 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:34,742 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:50:34,742 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:50:34,745 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:50:34,745 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 15:50:34,883 INFO L134 CoverageAnalysis]: Checked inductivity of 1234 backedges. 436 proven. 52 refuted. 0 times theorem prover too weak. 746 trivial. 0 not checked. [2018-01-24 15:50:34,883 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:34,939 INFO L134 CoverageAnalysis]: Checked inductivity of 1234 backedges. 436 proven. 52 refuted. 0 times theorem prover too weak. 746 trivial. 0 not checked. [2018-01-24 15:50:34,941 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:50:34,941 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 8, 9, 8] total 21 [2018-01-24 15:50:34,941 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:50:34,942 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 15:50:34,942 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 15:50:34,942 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=111, Invalid=351, Unknown=0, NotChecked=0, Total=462 [2018-01-24 15:50:34,942 INFO L87 Difference]: Start difference. First operand 183 states and 185 transitions. Second operand 15 states. [2018-01-24 15:50:35,104 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:50:35,104 INFO L93 Difference]: Finished difference Result 191 states and 193 transitions. [2018-01-24 15:50:35,104 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-24 15:50:35,104 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 173 [2018-01-24 15:50:35,105 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:50:35,106 INFO L225 Difference]: With dead ends: 191 [2018-01-24 15:50:35,106 INFO L226 Difference]: Without dead ends: 190 [2018-01-24 15:50:35,107 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 704 GetRequests, 660 SyntacticMatches, 19 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 238 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=183, Invalid=519, Unknown=0, NotChecked=0, Total=702 [2018-01-24 15:50:35,107 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 190 states. [2018-01-24 15:50:35,119 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 190 to 184. [2018-01-24 15:50:35,119 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 184 states. [2018-01-24 15:50:35,120 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 184 states to 184 states and 186 transitions. [2018-01-24 15:50:35,120 INFO L78 Accepts]: Start accepts. Automaton has 184 states and 186 transitions. Word has length 173 [2018-01-24 15:50:35,120 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:50:35,120 INFO L432 AbstractCegarLoop]: Abstraction has 184 states and 186 transitions. [2018-01-24 15:50:35,120 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 15:50:35,121 INFO L276 IsEmpty]: Start isEmpty. Operand 184 states and 186 transitions. [2018-01-24 15:50:35,121 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 179 [2018-01-24 15:50:35,121 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:35,122 INFO L322 BasicCegarLoop]: trace histogram [24, 20, 19, 19, 19, 19, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:35,122 INFO L371 AbstractCegarLoop]: === Iteration 21 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:35,122 INFO L82 PathProgramCache]: Analyzing trace with hash 655613349, now seen corresponding path program 6 times [2018-01-24 15:50:35,122 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:35,122 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:35,122 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:50:35,122 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:35,123 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:35,138 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:35,139 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:50:35,428 INFO L134 CoverageAnalysis]: Checked inductivity of 1335 backedges. 514 proven. 75 refuted. 0 times theorem prover too weak. 746 trivial. 0 not checked. [2018-01-24 15:50:35,429 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:35,429 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:50:35,429 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:50:35,429 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:50:35,429 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:35,429 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:50:35,434 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-24 15:50:35,434 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-24 15:50:35,448 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:50:35,452 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:50:35,456 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:50:35,462 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:50:35,467 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:50:35,474 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:50:35,481 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:50:35,482 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:35,485 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:35,622 INFO L134 CoverageAnalysis]: Checked inductivity of 1335 backedges. 558 proven. 360 refuted. 0 times theorem prover too weak. 417 trivial. 0 not checked. [2018-01-24 15:50:35,622 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:35,995 INFO L134 CoverageAnalysis]: Checked inductivity of 1335 backedges. 526 proven. 392 refuted. 0 times theorem prover too weak. 417 trivial. 0 not checked. [2018-01-24 15:50:36,028 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:36,028 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:50:36,066 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-24 15:50:36,066 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-24 15:50:36,081 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:50:36,091 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:50:36,111 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:50:36,145 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:50:36,204 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:50:36,441 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:50:36,695 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:50:36,730 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:36,736 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:36,840 INFO L134 CoverageAnalysis]: Checked inductivity of 1335 backedges. 510 proven. 75 refuted. 0 times theorem prover too weak. 750 trivial. 0 not checked. [2018-01-24 15:50:36,840 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:36,964 INFO L134 CoverageAnalysis]: Checked inductivity of 1335 backedges. 510 proven. 75 refuted. 0 times theorem prover too weak. 750 trivial. 0 not checked. [2018-01-24 15:50:36,966 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:50:36,967 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 16, 16, 7, 7] total 50 [2018-01-24 15:50:36,967 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:50:36,967 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-24 15:50:36,967 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-24 15:50:36,968 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=309, Invalid=2241, Unknown=0, NotChecked=0, Total=2550 [2018-01-24 15:50:36,968 INFO L87 Difference]: Start difference. First operand 184 states and 186 transitions. Second operand 25 states. [2018-01-24 15:50:37,389 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:50:37,390 INFO L93 Difference]: Finished difference Result 250 states and 255 transitions. [2018-01-24 15:50:37,390 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-24 15:50:37,390 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 178 [2018-01-24 15:50:37,390 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:50:37,391 INFO L225 Difference]: With dead ends: 250 [2018-01-24 15:50:37,391 INFO L226 Difference]: Without dead ends: 249 [2018-01-24 15:50:37,392 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 736 GetRequests, 673 SyntacticMatches, 1 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1374 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=694, Invalid=3338, Unknown=0, NotChecked=0, Total=4032 [2018-01-24 15:50:37,392 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 249 states. [2018-01-24 15:50:37,406 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 249 to 228. [2018-01-24 15:50:37,406 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 228 states. [2018-01-24 15:50:37,407 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228 states to 228 states and 232 transitions. [2018-01-24 15:50:37,407 INFO L78 Accepts]: Start accepts. Automaton has 228 states and 232 transitions. Word has length 178 [2018-01-24 15:50:37,407 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:50:37,407 INFO L432 AbstractCegarLoop]: Abstraction has 228 states and 232 transitions. [2018-01-24 15:50:37,407 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-24 15:50:37,408 INFO L276 IsEmpty]: Start isEmpty. Operand 228 states and 232 transitions. [2018-01-24 15:50:37,408 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2018-01-24 15:50:37,408 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:37,408 INFO L322 BasicCegarLoop]: trace histogram [24, 20, 20, 19, 19, 19, 5, 5, 5, 5, 5, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:37,408 INFO L371 AbstractCegarLoop]: === Iteration 22 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:37,409 INFO L82 PathProgramCache]: Analyzing trace with hash -1150822614, now seen corresponding path program 6 times [2018-01-24 15:50:37,409 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:37,409 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:37,409 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:50:37,409 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:37,409 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:37,428 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:37,430 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:50:37,801 INFO L134 CoverageAnalysis]: Checked inductivity of 1354 backedges. 546 proven. 62 refuted. 0 times theorem prover too weak. 746 trivial. 0 not checked. [2018-01-24 15:50:37,802 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:37,802 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:50:37,802 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:50:37,802 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:50:37,802 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:37,802 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:50:37,807 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-24 15:50:37,807 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-24 15:50:37,824 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:50:37,829 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:50:37,836 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:50:37,845 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:50:37,853 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:50:37,864 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:50:37,874 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:50:37,878 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:37,883 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:37,890 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:50:37,891 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:50:37,907 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:50:37,908 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 15:50:38,452 INFO L134 CoverageAnalysis]: Checked inductivity of 1354 backedges. 586 proven. 351 refuted. 0 times theorem prover too weak. 417 trivial. 0 not checked. [2018-01-24 15:50:38,452 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:38,767 INFO L134 CoverageAnalysis]: Checked inductivity of 1354 backedges. 536 proven. 401 refuted. 0 times theorem prover too weak. 417 trivial. 0 not checked. [2018-01-24 15:50:38,788 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:38,788 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:50:38,791 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-24 15:50:38,792 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-24 15:50:38,809 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:50:38,820 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:50:38,841 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:50:38,884 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:50:38,931 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:50:39,056 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:50:39,327 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 15:50:39,356 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:39,363 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:39,365 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:50:39,366 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:50:39,368 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:50:39,368 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 15:50:39,595 INFO L134 CoverageAnalysis]: Checked inductivity of 1354 backedges. 528 proven. 80 refuted. 0 times theorem prover too weak. 746 trivial. 0 not checked. [2018-01-24 15:50:39,595 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:39,817 INFO L134 CoverageAnalysis]: Checked inductivity of 1354 backedges. 528 proven. 80 refuted. 0 times theorem prover too weak. 746 trivial. 0 not checked. [2018-01-24 15:50:39,820 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:50:39,820 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 17, 16, 10, 9] total 57 [2018-01-24 15:50:39,820 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:50:39,820 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-24 15:50:39,821 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-24 15:50:39,821 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=375, Invalid=2931, Unknown=0, NotChecked=0, Total=3306 [2018-01-24 15:50:39,822 INFO L87 Difference]: Start difference. First operand 228 states and 232 transitions. Second operand 29 states. [2018-01-24 15:50:40,508 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:50:40,508 INFO L93 Difference]: Finished difference Result 249 states and 254 transitions. [2018-01-24 15:50:40,509 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-24 15:50:40,509 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 179 [2018-01-24 15:50:40,510 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:50:40,511 INFO L225 Difference]: With dead ends: 249 [2018-01-24 15:50:40,511 INFO L226 Difference]: Without dead ends: 248 [2018-01-24 15:50:40,512 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 739 GetRequests, 655 SyntacticMatches, 15 SemanticMatches, 69 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2380 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=803, Invalid=4167, Unknown=0, NotChecked=0, Total=4970 [2018-01-24 15:50:40,512 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 248 states. [2018-01-24 15:50:40,526 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 248 to 226. [2018-01-24 15:50:40,526 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 226 states. [2018-01-24 15:50:40,527 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 226 states to 226 states and 229 transitions. [2018-01-24 15:50:40,527 INFO L78 Accepts]: Start accepts. Automaton has 226 states and 229 transitions. Word has length 179 [2018-01-24 15:50:40,527 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:50:40,527 INFO L432 AbstractCegarLoop]: Abstraction has 226 states and 229 transitions. [2018-01-24 15:50:40,527 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-24 15:50:40,527 INFO L276 IsEmpty]: Start isEmpty. Operand 226 states and 229 transitions. [2018-01-24 15:50:40,528 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 221 [2018-01-24 15:50:40,528 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:40,528 INFO L322 BasicCegarLoop]: trace histogram [30, 25, 24, 24, 24, 24, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:40,528 INFO L371 AbstractCegarLoop]: === Iteration 23 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:40,529 INFO L82 PathProgramCache]: Analyzing trace with hash 1417597148, now seen corresponding path program 7 times [2018-01-24 15:50:40,529 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:40,529 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:40,529 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:50:40,530 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:40,530 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:40,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:40,547 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:50:40,897 INFO L134 CoverageAnalysis]: Checked inductivity of 2123 backedges. 1185 proven. 370 refuted. 0 times theorem prover too weak. 568 trivial. 0 not checked. [2018-01-24 15:50:40,897 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:40,898 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:50:40,898 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:50:40,898 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:50:40,898 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:40,898 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:50:40,903 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:40,903 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:50:40,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:40,945 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:41,067 INFO L134 CoverageAnalysis]: Checked inductivity of 2123 backedges. 1280 proven. 70 refuted. 0 times theorem prover too weak. 773 trivial. 0 not checked. [2018-01-24 15:50:41,067 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:41,323 INFO L134 CoverageAnalysis]: Checked inductivity of 2123 backedges. 1280 proven. 70 refuted. 0 times theorem prover too weak. 773 trivial. 0 not checked. [2018-01-24 15:50:41,344 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:41,344 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:50:41,347 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:41,348 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:50:41,434 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:41,442 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:41,484 INFO L134 CoverageAnalysis]: Checked inductivity of 2123 backedges. 1280 proven. 70 refuted. 0 times theorem prover too weak. 773 trivial. 0 not checked. [2018-01-24 15:50:41,484 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:41,601 INFO L134 CoverageAnalysis]: Checked inductivity of 2123 backedges. 1280 proven. 70 refuted. 0 times theorem prover too weak. 773 trivial. 0 not checked. [2018-01-24 15:50:41,603 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:50:41,603 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 14, 14, 14, 14] total 32 [2018-01-24 15:50:41,603 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:50:41,603 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-24 15:50:41,604 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-24 15:50:41,604 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=800, Unknown=0, NotChecked=0, Total=992 [2018-01-24 15:50:41,604 INFO L87 Difference]: Start difference. First operand 226 states and 229 transitions. Second operand 26 states. [2018-01-24 15:50:42,299 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:50:42,299 INFO L93 Difference]: Finished difference Result 311 states and 318 transitions. [2018-01-24 15:50:42,300 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-24 15:50:42,300 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 220 [2018-01-24 15:50:42,301 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:50:42,302 INFO L225 Difference]: With dead ends: 311 [2018-01-24 15:50:42,302 INFO L226 Difference]: Without dead ends: 259 [2018-01-24 15:50:42,303 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 917 GetRequests, 856 SyntacticMatches, 14 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 666 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=484, Invalid=1868, Unknown=0, NotChecked=0, Total=2352 [2018-01-24 15:50:42,304 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 259 states. [2018-01-24 15:50:42,327 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 259 to 236. [2018-01-24 15:50:42,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 236 states. [2018-01-24 15:50:42,328 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 236 states to 236 states and 239 transitions. [2018-01-24 15:50:42,328 INFO L78 Accepts]: Start accepts. Automaton has 236 states and 239 transitions. Word has length 220 [2018-01-24 15:50:42,329 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:50:42,329 INFO L432 AbstractCegarLoop]: Abstraction has 236 states and 239 transitions. [2018-01-24 15:50:42,329 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-24 15:50:42,329 INFO L276 IsEmpty]: Start isEmpty. Operand 236 states and 239 transitions. [2018-01-24 15:50:42,330 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 227 [2018-01-24 15:50:42,330 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:42,331 INFO L322 BasicCegarLoop]: trace histogram [31, 26, 25, 25, 25, 25, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:42,331 INFO L371 AbstractCegarLoop]: === Iteration 24 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:42,331 INFO L82 PathProgramCache]: Analyzing trace with hash 11647380, now seen corresponding path program 8 times [2018-01-24 15:50:42,331 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:42,332 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:42,332 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:42,332 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:42,332 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:42,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:42,354 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:50:42,579 INFO L134 CoverageAnalysis]: Checked inductivity of 2280 backedges. 725 proven. 75 refuted. 0 times theorem prover too weak. 1480 trivial. 0 not checked. [2018-01-24 15:50:42,579 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:42,579 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:50:42,579 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:50:42,580 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:50:42,580 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:42,580 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:50:42,589 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:50:42,589 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:50:42,608 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:42,646 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:42,654 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:42,659 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:42,762 INFO L134 CoverageAnalysis]: Checked inductivity of 2280 backedges. 720 proven. 75 refuted. 0 times theorem prover too weak. 1485 trivial. 0 not checked. [2018-01-24 15:50:42,763 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:42,906 INFO L134 CoverageAnalysis]: Checked inductivity of 2280 backedges. 720 proven. 75 refuted. 0 times theorem prover too weak. 1485 trivial. 0 not checked. [2018-01-24 15:50:42,938 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:42,938 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:50:42,942 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:50:42,942 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:50:42,966 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:43,035 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:43,092 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:43,101 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:43,133 INFO L134 CoverageAnalysis]: Checked inductivity of 2280 backedges. 720 proven. 75 refuted. 0 times theorem prover too weak. 1485 trivial. 0 not checked. [2018-01-24 15:50:43,133 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:43,230 INFO L134 CoverageAnalysis]: Checked inductivity of 2280 backedges. 720 proven. 75 refuted. 0 times theorem prover too weak. 1485 trivial. 0 not checked. [2018-01-24 15:50:43,232 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:50:43,232 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 7, 7, 7, 7] total 22 [2018-01-24 15:50:43,233 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:50:43,233 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-24 15:50:43,233 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-24 15:50:43,233 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=119, Invalid=387, Unknown=0, NotChecked=0, Total=506 [2018-01-24 15:50:43,234 INFO L87 Difference]: Start difference. First operand 236 states and 239 transitions. Second operand 17 states. [2018-01-24 15:50:43,634 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:50:43,634 INFO L93 Difference]: Finished difference Result 259 states and 263 transitions. [2018-01-24 15:50:43,634 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 15:50:43,635 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 226 [2018-01-24 15:50:43,635 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:50:43,637 INFO L225 Difference]: With dead ends: 259 [2018-01-24 15:50:43,637 INFO L226 Difference]: Without dead ends: 258 [2018-01-24 15:50:43,638 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 919 GetRequests, 892 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 161 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=204, Invalid=608, Unknown=0, NotChecked=0, Total=812 [2018-01-24 15:50:43,638 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 258 states. [2018-01-24 15:50:43,656 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 258 to 237. [2018-01-24 15:50:43,656 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 237 states. [2018-01-24 15:50:43,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 237 states to 237 states and 240 transitions. [2018-01-24 15:50:43,657 INFO L78 Accepts]: Start accepts. Automaton has 237 states and 240 transitions. Word has length 226 [2018-01-24 15:50:43,658 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:50:43,658 INFO L432 AbstractCegarLoop]: Abstraction has 237 states and 240 transitions. [2018-01-24 15:50:43,658 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-24 15:50:43,658 INFO L276 IsEmpty]: Start isEmpty. Operand 237 states and 240 transitions. [2018-01-24 15:50:43,659 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 228 [2018-01-24 15:50:43,660 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:43,660 INFO L322 BasicCegarLoop]: trace histogram [31, 26, 26, 25, 25, 25, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:43,660 INFO L371 AbstractCegarLoop]: === Iteration 25 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:43,660 INFO L82 PathProgramCache]: Analyzing trace with hash 361068827, now seen corresponding path program 7 times [2018-01-24 15:50:43,660 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:43,661 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:43,661 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:50:43,661 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:43,661 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:43,684 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:43,686 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:50:44,107 INFO L134 CoverageAnalysis]: Checked inductivity of 2305 backedges. 745 proven. 80 refuted. 0 times theorem prover too weak. 1480 trivial. 0 not checked. [2018-01-24 15:50:44,107 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:44,107 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:50:44,108 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:50:44,108 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:50:44,108 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:44,108 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:50:44,113 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:44,113 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:50:44,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:44,172 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:44,183 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:50:44,184 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:50:44,187 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:50:44,188 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 15:50:44,478 INFO L134 CoverageAnalysis]: Checked inductivity of 2305 backedges. 745 proven. 80 refuted. 0 times theorem prover too weak. 1480 trivial. 0 not checked. [2018-01-24 15:50:44,478 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:44,643 INFO L134 CoverageAnalysis]: Checked inductivity of 2305 backedges. 745 proven. 80 refuted. 0 times theorem prover too weak. 1480 trivial. 0 not checked. [2018-01-24 15:50:44,663 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:44,663 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:50:44,666 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:44,666 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 15:50:44,762 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:44,770 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:44,772 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:50:44,772 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:50:44,786 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:50:44,786 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 15:50:44,972 INFO L134 CoverageAnalysis]: Checked inductivity of 2305 backedges. 745 proven. 80 refuted. 0 times theorem prover too weak. 1480 trivial. 0 not checked. [2018-01-24 15:50:44,972 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:45,034 INFO L134 CoverageAnalysis]: Checked inductivity of 2305 backedges. 745 proven. 80 refuted. 0 times theorem prover too weak. 1480 trivial. 0 not checked. [2018-01-24 15:50:45,035 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:50:45,035 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 9, 10, 9] total 24 [2018-01-24 15:50:45,035 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:50:45,036 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-24 15:50:45,036 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-24 15:50:45,036 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=142, Invalid=458, Unknown=0, NotChecked=0, Total=600 [2018-01-24 15:50:45,036 INFO L87 Difference]: Start difference. First operand 237 states and 240 transitions. Second operand 17 states. [2018-01-24 15:50:45,316 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:50:45,316 INFO L93 Difference]: Finished difference Result 258 states and 262 transitions. [2018-01-24 15:50:45,317 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 15:50:45,317 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 227 [2018-01-24 15:50:45,318 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:50:45,319 INFO L225 Difference]: With dead ends: 258 [2018-01-24 15:50:45,319 INFO L226 Difference]: Without dead ends: 257 [2018-01-24 15:50:45,320 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 922 GetRequests, 870 SyntacticMatches, 23 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 332 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=238, Invalid=692, Unknown=0, NotChecked=0, Total=930 [2018-01-24 15:50:45,320 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 257 states. [2018-01-24 15:50:45,340 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 257 to 238. [2018-01-24 15:50:45,340 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 238 states. [2018-01-24 15:50:45,341 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 238 states to 238 states and 241 transitions. [2018-01-24 15:50:45,341 INFO L78 Accepts]: Start accepts. Automaton has 238 states and 241 transitions. Word has length 227 [2018-01-24 15:50:45,342 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:50:45,342 INFO L432 AbstractCegarLoop]: Abstraction has 238 states and 241 transitions. [2018-01-24 15:50:45,342 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-24 15:50:45,342 INFO L276 IsEmpty]: Start isEmpty. Operand 238 states and 241 transitions. [2018-01-24 15:50:45,343 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 233 [2018-01-24 15:50:45,343 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:45,343 INFO L322 BasicCegarLoop]: trace histogram [32, 27, 26, 26, 26, 26, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:45,344 INFO L371 AbstractCegarLoop]: === Iteration 26 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:45,344 INFO L82 PathProgramCache]: Analyzing trace with hash 1000315148, now seen corresponding path program 9 times [2018-01-24 15:50:45,344 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:45,345 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:45,345 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 15:50:45,345 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:45,345 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:45,364 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:45,365 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:50:45,692 INFO L134 CoverageAnalysis]: Checked inductivity of 2443 backedges. 783 proven. 478 refuted. 0 times theorem prover too weak. 1182 trivial. 0 not checked. [2018-01-24 15:50:45,693 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:45,693 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:50:45,693 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:50:45,693 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:50:45,693 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:45,693 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:50:45,698 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 15:50:45,698 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 15:50:45,712 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:45,717 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:45,722 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:45,728 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:45,737 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:45,746 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:45,748 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:45,751 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:45,902 INFO L134 CoverageAnalysis]: Checked inductivity of 2443 backedges. 855 proven. 108 refuted. 0 times theorem prover too weak. 1480 trivial. 0 not checked. [2018-01-24 15:50:45,902 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:46,240 INFO L134 CoverageAnalysis]: Checked inductivity of 2443 backedges. 855 proven. 108 refuted. 0 times theorem prover too weak. 1480 trivial. 0 not checked. [2018-01-24 15:50:46,261 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:46,261 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:50:46,264 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 15:50:46,264 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 15:50:46,283 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:46,293 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:46,313 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:46,350 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:46,415 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:46,560 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:46,592 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:46,599 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:46,680 INFO L134 CoverageAnalysis]: Checked inductivity of 2443 backedges. 885 proven. 144 refuted. 0 times theorem prover too weak. 1414 trivial. 0 not checked. [2018-01-24 15:50:46,680 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:47,026 INFO L134 CoverageAnalysis]: Checked inductivity of 2443 backedges. 879 proven. 150 refuted. 0 times theorem prover too weak. 1414 trivial. 0 not checked. [2018-01-24 15:50:47,028 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:50:47,028 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 13, 13, 16, 16] total 54 [2018-01-24 15:50:47,028 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:50:47,028 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-24 15:50:47,028 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-24 15:50:47,029 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=465, Invalid=2505, Unknown=0, NotChecked=0, Total=2970 [2018-01-24 15:50:47,029 INFO L87 Difference]: Start difference. First operand 238 states and 241 transitions. Second operand 27 states. [2018-01-24 15:50:47,347 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:50:47,347 INFO L93 Difference]: Finished difference Result 292 states and 296 transitions. [2018-01-24 15:50:47,347 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-24 15:50:47,347 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 232 [2018-01-24 15:50:47,348 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:50:47,349 INFO L225 Difference]: With dead ends: 292 [2018-01-24 15:50:47,349 INFO L226 Difference]: Without dead ends: 291 [2018-01-24 15:50:47,351 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 955 GetRequests, 891 SyntacticMatches, 0 SemanticMatches, 64 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1647 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=679, Invalid=3611, Unknown=0, NotChecked=0, Total=4290 [2018-01-24 15:50:47,351 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 291 states. [2018-01-24 15:50:47,378 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 291 to 288. [2018-01-24 15:50:47,379 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 288 states. [2018-01-24 15:50:47,380 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 288 states to 288 states and 293 transitions. [2018-01-24 15:50:47,381 INFO L78 Accepts]: Start accepts. Automaton has 288 states and 293 transitions. Word has length 232 [2018-01-24 15:50:47,381 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:50:47,381 INFO L432 AbstractCegarLoop]: Abstraction has 288 states and 293 transitions. [2018-01-24 15:50:47,381 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-24 15:50:47,382 INFO L276 IsEmpty]: Start isEmpty. Operand 288 states and 293 transitions. [2018-01-24 15:50:47,383 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 234 [2018-01-24 15:50:47,383 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:47,383 INFO L322 BasicCegarLoop]: trace histogram [32, 27, 27, 26, 26, 26, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:47,383 INFO L371 AbstractCegarLoop]: === Iteration 27 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:47,383 INFO L82 PathProgramCache]: Analyzing trace with hash 944998563, now seen corresponding path program 8 times [2018-01-24 15:50:47,384 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:47,384 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:47,384 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:50:47,384 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:47,385 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:47,407 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:47,409 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:50:48,121 INFO L134 CoverageAnalysis]: Checked inductivity of 2469 backedges. 1271 proven. 368 refuted. 0 times theorem prover too weak. 830 trivial. 0 not checked. [2018-01-24 15:50:48,121 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:48,121 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:50:48,121 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:50:48,122 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:50:48,122 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:48,122 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:50:48,129 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:50:48,129 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:50:48,145 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:48,180 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:48,185 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:48,189 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:48,192 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:50:48,192 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:50:48,197 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:50:48,197 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 15:50:48,472 INFO L134 CoverageAnalysis]: Checked inductivity of 2469 backedges. 875 proven. 114 refuted. 0 times theorem prover too weak. 1480 trivial. 0 not checked. [2018-01-24 15:50:48,472 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:48,671 INFO L134 CoverageAnalysis]: Checked inductivity of 2469 backedges. 875 proven. 114 refuted. 0 times theorem prover too weak. 1480 trivial. 0 not checked. [2018-01-24 15:50:48,691 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:48,691 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:50:48,694 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 15:50:48,694 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 15:50:48,711 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:48,760 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 15:50:48,796 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:48,804 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:48,809 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:50:48,810 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:50:48,823 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:50:48,823 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 15:50:49,012 INFO L134 CoverageAnalysis]: Checked inductivity of 2469 backedges. 875 proven. 114 refuted. 0 times theorem prover too weak. 1480 trivial. 0 not checked. [2018-01-24 15:50:49,013 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:49,148 INFO L134 CoverageAnalysis]: Checked inductivity of 2469 backedges. 875 proven. 114 refuted. 0 times theorem prover too weak. 1480 trivial. 0 not checked. [2018-01-24 15:50:49,149 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:50:49,149 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 11, 10, 11, 10] total 35 [2018-01-24 15:50:49,149 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:50:49,150 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-24 15:50:49,150 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-24 15:50:49,151 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=180, Invalid=1080, Unknown=0, NotChecked=0, Total=1260 [2018-01-24 15:50:49,151 INFO L87 Difference]: Start difference. First operand 288 states and 293 transitions. Second operand 27 states. [2018-01-24 15:50:50,039 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:50:50,039 INFO L93 Difference]: Finished difference Result 525 states and 551 transitions. [2018-01-24 15:50:50,039 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-24 15:50:50,039 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 233 [2018-01-24 15:50:50,040 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:50:50,042 INFO L225 Difference]: With dead ends: 525 [2018-01-24 15:50:50,042 INFO L226 Difference]: Without dead ends: 523 [2018-01-24 15:50:50,043 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 971 GetRequests, 894 SyntacticMatches, 19 SemanticMatches, 58 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1035 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=703, Invalid=2837, Unknown=0, NotChecked=0, Total=3540 [2018-01-24 15:50:50,044 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 523 states. [2018-01-24 15:50:50,083 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 523 to 423. [2018-01-24 15:50:50,083 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 423 states. [2018-01-24 15:50:50,084 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 423 states to 423 states and 437 transitions. [2018-01-24 15:50:50,085 INFO L78 Accepts]: Start accepts. Automaton has 423 states and 437 transitions. Word has length 233 [2018-01-24 15:50:50,085 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:50:50,085 INFO L432 AbstractCegarLoop]: Abstraction has 423 states and 437 transitions. [2018-01-24 15:50:50,085 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-24 15:50:50,085 INFO L276 IsEmpty]: Start isEmpty. Operand 423 states and 437 transitions. [2018-01-24 15:50:50,088 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 246 [2018-01-24 15:50:50,088 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:50,088 INFO L322 BasicCegarLoop]: trace histogram [34, 29, 29, 28, 28, 28, 6, 6, 6, 6, 6, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:50,089 INFO L371 AbstractCegarLoop]: === Iteration 28 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:50,089 INFO L82 PathProgramCache]: Analyzing trace with hash -108003725, now seen corresponding path program 9 times [2018-01-24 15:50:50,089 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:50,090 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:50,090 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:50:50,090 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:50,090 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:50,111 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:50,112 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:50:50,449 INFO L134 CoverageAnalysis]: Checked inductivity of 2815 backedges. 1179 proven. 106 refuted. 0 times theorem prover too weak. 1530 trivial. 0 not checked. [2018-01-24 15:50:50,450 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:50,450 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:50:50,450 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:50:50,450 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:50:50,450 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:50,450 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:50:50,454 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 15:50:50,455 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 15:50:50,466 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:50,470 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:50,474 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:50,478 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:50,485 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:50,494 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:50,496 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:50,499 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:50,500 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:50:50,501 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:50:50,503 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:50:50,503 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 15:50:50,873 INFO L134 CoverageAnalysis]: Checked inductivity of 2815 backedges. 1077 proven. 94 refuted. 0 times theorem prover too weak. 1644 trivial. 0 not checked. [2018-01-24 15:50:50,874 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:51,162 INFO L134 CoverageAnalysis]: Checked inductivity of 2815 backedges. 1051 proven. 120 refuted. 0 times theorem prover too weak. 1644 trivial. 0 not checked. [2018-01-24 15:50:51,182 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:51,197 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:50:51,200 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 15:50:51,201 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 15:50:51,220 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:51,234 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:51,259 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:51,296 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:51,363 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:51,492 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 15:50:51,518 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:51,525 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:51,529 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 15:50:51,529 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 15:50:51,533 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 15:50:51,533 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 15:50:51,851 INFO L134 CoverageAnalysis]: Checked inductivity of 2815 backedges. 1091 proven. 164 refuted. 0 times theorem prover too weak. 1560 trivial. 0 not checked. [2018-01-24 15:50:51,851 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:52,252 INFO L134 CoverageAnalysis]: Checked inductivity of 2815 backedges. 1053 proven. 202 refuted. 0 times theorem prover too weak. 1560 trivial. 0 not checked. [2018-01-24 15:50:52,253 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:50:52,253 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 14, 13, 17, 16] total 62 [2018-01-24 15:50:52,254 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:50:52,254 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-24 15:50:52,254 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-24 15:50:52,255 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=413, Invalid=3369, Unknown=0, NotChecked=0, Total=3782 [2018-01-24 15:50:52,256 INFO L87 Difference]: Start difference. First operand 423 states and 437 transitions. Second operand 32 states. [2018-01-24 15:50:53,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:50:53,011 INFO L93 Difference]: Finished difference Result 731 states and 763 transitions. [2018-01-24 15:50:53,011 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-24 15:50:53,011 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 245 [2018-01-24 15:50:53,012 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:50:53,013 INFO L225 Difference]: With dead ends: 731 [2018-01-24 15:50:53,013 INFO L226 Difference]: Without dead ends: 437 [2018-01-24 15:50:53,015 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 1020 GetRequests, 918 SyntacticMatches, 20 SemanticMatches, 82 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3072 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=1026, Invalid=5946, Unknown=0, NotChecked=0, Total=6972 [2018-01-24 15:50:53,015 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 437 states. [2018-01-24 15:50:53,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 437 to 376. [2018-01-24 15:50:53,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 376 states. [2018-01-24 15:50:53,051 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 376 states to 376 states and 385 transitions. [2018-01-24 15:50:53,051 INFO L78 Accepts]: Start accepts. Automaton has 376 states and 385 transitions. Word has length 245 [2018-01-24 15:50:53,051 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:50:53,051 INFO L432 AbstractCegarLoop]: Abstraction has 376 states and 385 transitions. [2018-01-24 15:50:53,052 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-24 15:50:53,052 INFO L276 IsEmpty]: Start isEmpty. Operand 376 states and 385 transitions. [2018-01-24 15:50:53,053 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 293 [2018-01-24 15:50:53,053 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:53,054 INFO L322 BasicCegarLoop]: trace histogram [41, 35, 34, 34, 34, 34, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:53,054 INFO L371 AbstractCegarLoop]: === Iteration 29 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:53,054 INFO L82 PathProgramCache]: Analyzing trace with hash 1441975659, now seen corresponding path program 10 times [2018-01-24 15:50:53,054 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:53,055 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:53,055 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:50:53,055 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:53,055 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:53,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:53,083 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 15:50:53,533 INFO L134 CoverageAnalysis]: Checked inductivity of 4098 backedges. 1317 proven. 147 refuted. 0 times theorem prover too weak. 2634 trivial. 0 not checked. [2018-01-24 15:50:53,533 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:53,533 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 15:50:53,533 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 15:50:53,534 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 15:50:53,534 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:53,534 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 15:50:53,540 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-24 15:50:53,540 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-24 15:50:53,602 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:53,605 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:53,743 INFO L134 CoverageAnalysis]: Checked inductivity of 4098 backedges. 1311 proven. 147 refuted. 0 times theorem prover too weak. 2640 trivial. 0 not checked. [2018-01-24 15:50:53,744 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:53,885 INFO L134 CoverageAnalysis]: Checked inductivity of 4098 backedges. 1311 proven. 147 refuted. 0 times theorem prover too weak. 2640 trivial. 0 not checked. [2018-01-24 15:50:53,905 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 15:50:53,905 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 15:50:53,908 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-24 15:50:53,908 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-24 15:50:54,190 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 15:50:54,200 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 15:50:54,230 INFO L134 CoverageAnalysis]: Checked inductivity of 4098 backedges. 1311 proven. 147 refuted. 0 times theorem prover too weak. 2640 trivial. 0 not checked. [2018-01-24 15:50:54,230 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 15:50:54,289 INFO L134 CoverageAnalysis]: Checked inductivity of 4098 backedges. 1311 proven. 147 refuted. 0 times theorem prover too weak. 2640 trivial. 0 not checked. [2018-01-24 15:50:54,292 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 15:50:54,292 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 9, 9, 9, 9] total 30 [2018-01-24 15:50:54,292 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 15:50:54,292 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-24 15:50:54,293 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-24 15:50:54,293 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=167, Invalid=763, Unknown=0, NotChecked=0, Total=930 [2018-01-24 15:50:54,293 INFO L87 Difference]: Start difference. First operand 376 states and 385 transitions. Second operand 23 states. [2018-01-24 15:50:54,771 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 15:50:54,772 INFO L93 Difference]: Finished difference Result 554 states and 574 transitions. [2018-01-24 15:50:54,772 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-24 15:50:54,772 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 292 [2018-01-24 15:50:54,772 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 15:50:54,774 INFO L225 Difference]: With dead ends: 554 [2018-01-24 15:50:54,774 INFO L226 Difference]: Without dead ends: 553 [2018-01-24 15:50:54,774 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 1194 GetRequests, 1153 SyntacticMatches, 0 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 565 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=359, Invalid=1447, Unknown=0, NotChecked=0, Total=1806 [2018-01-24 15:50:54,775 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 553 states. [2018-01-24 15:50:54,814 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 553 to 494. [2018-01-24 15:50:54,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 494 states. [2018-01-24 15:50:54,815 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 494 states to 494 states and 510 transitions. [2018-01-24 15:50:54,816 INFO L78 Accepts]: Start accepts. Automaton has 494 states and 510 transitions. Word has length 292 [2018-01-24 15:50:54,816 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 15:50:54,816 INFO L432 AbstractCegarLoop]: Abstraction has 494 states and 510 transitions. [2018-01-24 15:50:54,816 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-24 15:50:54,816 INFO L276 IsEmpty]: Start isEmpty. Operand 494 states and 510 transitions. [2018-01-24 15:50:54,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 294 [2018-01-24 15:50:54,817 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 15:50:54,817 INFO L322 BasicCegarLoop]: trace histogram [41, 35, 35, 34, 34, 34, 7, 7, 7, 7, 7, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 15:50:54,818 INFO L371 AbstractCegarLoop]: === Iteration 30 === [fooErr1RequiresViolation, fooErr0AssertViolation, fooErr2RequiresViolation, mainErr0AssertViolation, mainErr2EnsuresViolation, mainErr1AssertViolation]=== [2018-01-24 15:50:54,818 INFO L82 PathProgramCache]: Analyzing trace with hash 1751572516, now seen corresponding path program 10 times [2018-01-24 15:50:54,818 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 15:50:54,818 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:54,818 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 15:50:54,818 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 15:50:54,819 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 15:50:54,843 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 15:50:54,844 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. Received shutdown request... [2018-01-24 15:50:54,904 FATAL L265 ToolchainWalker]: An unrecoverable error occured during an interaction with an SMT solver: de.uni_freiburg.informatik.ultimate.logic.SMTLIBException: Timeout exceeded at de.uni_freiburg.informatik.ultimate.smtinterpol.interpolate.Interpolator.walkLeafNode(Interpolator.java:265) at de.uni_freiburg.informatik.ultimate.smtinterpol.interpolate.Interpolator.access$1(Interpolator.java:263) at de.uni_freiburg.informatik.ultimate.smtinterpol.interpolate.Interpolator$ProofTreeWalker.walk(Interpolator.java:132) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:122) at de.uni_freiburg.informatik.ultimate.logic.NonRecursive.run(NonRecursive.java:113) at de.uni_freiburg.informatik.ultimate.smtinterpol.interpolate.Interpolator.interpolate(Interpolator.java:220) at de.uni_freiburg.informatik.ultimate.smtinterpol.interpolate.Interpolator.getInterpolants(Interpolator.java:201) at de.uni_freiburg.informatik.ultimate.smtinterpol.smtlib2.SMTInterpol.getInterpolants(SMTInterpol.java:915) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.managedscript.ManagedScript.getInterpolants(ManagedScript.java:192) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.NestedInterpolantsBuilder.computeCraigInterpolants(NestedInterpolantsBuilder.java:279) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.NestedInterpolantsBuilder.(NestedInterpolantsBuilder.java:162) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.InterpolatingTraceCheckCraig.computeInterpolantsTree(InterpolatingTraceCheckCraig.java:263) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.InterpolatingTraceCheckCraig.computeInterpolants(InterpolatingTraceCheckCraig.java:199) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.InterpolatingTraceCheckCraig.(InterpolatingTraceCheckCraig.java:106) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructCraig(TraceCheckConstructor.java:222) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:179) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseTaipanRefinementStrategy.getTraceCheck(BaseTaipanRefinementStrategy.java:213) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:231) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:205) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:68) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:368) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:381) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:316) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:294) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:149) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:113) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:117) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:324) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.runToolchainDefault(DefaultToolchainJob.java:221) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.BasicToolchainJob.run(BasicToolchainJob.java:134) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-01-24 15:50:54,908 INFO L168 Benchmark]: Toolchain (without parser) took 39467.79 ms. Allocated memory was 303.0 MB in the beginning and 953.7 MB in the end (delta: 650.6 MB). Free memory was 264.1 MB in the beginning and 369.4 MB in the end (delta: -105.3 MB). Peak memory consumption was 545.3 MB. Max. memory is 5.3 GB. [2018-01-24 15:50:54,908 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 303.0 MB. Free memory is still 268.1 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-24 15:50:54,909 INFO L168 Benchmark]: CACSL2BoogieTranslator took 175.01 ms. Allocated memory is still 303.0 MB. Free memory was 262.1 MB in the beginning and 254.1 MB in the end (delta: 8.0 MB). Peak memory consumption was 8.0 MB. Max. memory is 5.3 GB. [2018-01-24 15:50:54,909 INFO L168 Benchmark]: Boogie Preprocessor took 30.62 ms. Allocated memory is still 303.0 MB. Free memory was 254.1 MB in the beginning and 252.1 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-24 15:50:54,909 INFO L168 Benchmark]: RCFGBuilder took 241.50 ms. Allocated memory is still 303.0 MB. Free memory was 252.1 MB in the beginning and 237.6 MB in the end (delta: 14.6 MB). Peak memory consumption was 14.6 MB. Max. memory is 5.3 GB. [2018-01-24 15:50:54,909 INFO L168 Benchmark]: TraceAbstraction took 39013.22 ms. Allocated memory was 303.0 MB in the beginning and 953.7 MB in the end (delta: 650.6 MB). Free memory was 237.6 MB in the beginning and 369.4 MB in the end (delta: -131.8 MB). Peak memory consumption was 518.8 MB. Max. memory is 5.3 GB. [2018-01-24 15:50:54,912 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 303.0 MB. Free memory is still 268.1 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 175.01 ms. Allocated memory is still 303.0 MB. Free memory was 262.1 MB in the beginning and 254.1 MB in the end (delta: 8.0 MB). Peak memory consumption was 8.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 30.62 ms. Allocated memory is still 303.0 MB. Free memory was 254.1 MB in the beginning and 252.1 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 241.50 ms. Allocated memory is still 303.0 MB. Free memory was 252.1 MB in the beginning and 237.6 MB in the end (delta: 14.6 MB). Peak memory consumption was 14.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 39013.22 ms. Allocated memory was 303.0 MB in the beginning and 953.7 MB in the end (delta: 650.6 MB). Free memory was 237.6 MB in the beginning and 369.4 MB in the end (delta: -131.8 MB). Peak memory consumption was 518.8 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 19 LocStat_MAX_WEQGRAPH_SIZE : 2 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 139 LocStat_NO_SUPPORTING_DISEQUALITIES : 36 LocStat_NO_DISJUNCTIONS : -38 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 26 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 31 TransStat_NO_SUPPORTING_DISEQUALITIES : 4 TransStat_NO_DISJUNCTIONS : 27 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 1.703993 RENAME_VARIABLES(MILLISECONDS) : 0.512893 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 1.629383 PROJECTAWAY(MILLISECONDS) : 0.325517 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.188222 DISJOIN(MILLISECONDS) : 2.524955 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.578317 ADD_EQUALITY(MILLISECONDS) : 0.121217 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.034786 #CONJOIN_DISJUNCTIVE : 36 #RENAME_VARIABLES : 65 #UNFREEZE : 0 #CONJOIN : 59 #PROJECTAWAY : 60 #ADD_WEAK_EQUALITY : 4 #DISJOIN : 1 #RENAME_VARIABLES_DISJUNCTIVE : 63 #ADD_EQUALITY : 31 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 1 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 20 LocStat_MAX_WEQGRAPH_SIZE : 2 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 136 LocStat_NO_SUPPORTING_DISEQUALITIES : 30 LocStat_NO_DISJUNCTIONS : -40 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 27 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 32 TransStat_NO_SUPPORTING_DISEQUALITIES : 4 TransStat_NO_DISJUNCTIONS : 28 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.970436 RENAME_VARIABLES(MILLISECONDS) : 0.132945 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.914076 PROJECTAWAY(MILLISECONDS) : 0.332052 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.126098 DISJOIN(MILLISECONDS) : 0.438325 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.155576 ADD_EQUALITY(MILLISECONDS) : 0.030588 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.100040 #CONJOIN_DISJUNCTIVE : 94 #RENAME_VARIABLES : 231 #UNFREEZE : 0 #CONJOIN : 173 #PROJECTAWAY : 158 #ADD_WEAK_EQUALITY : 4 #DISJOIN : 27 #RENAME_VARIABLES_DISJUNCTIVE : 224 #ADD_EQUALITY : 32 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 1 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 19 LocStat_MAX_WEQGRAPH_SIZE : 2 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 144 LocStat_NO_SUPPORTING_DISEQUALITIES : 36 LocStat_NO_DISJUNCTIONS : -38 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 26 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 31 TransStat_NO_SUPPORTING_DISEQUALITIES : 4 TransStat_NO_DISJUNCTIONS : 27 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.893833 RENAME_VARIABLES(MILLISECONDS) : 0.267958 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.844153 PROJECTAWAY(MILLISECONDS) : 0.207671 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.082389 DISJOIN(MILLISECONDS) : 0.365347 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.299732 ADD_EQUALITY(MILLISECONDS) : 0.029960 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.012934 #CONJOIN_DISJUNCTIVE : 36 #RENAME_VARIABLES : 65 #UNFREEZE : 0 #CONJOIN : 59 #PROJECTAWAY : 60 #ADD_WEAK_EQUALITY : 4 #DISJOIN : 1 #RENAME_VARIABLES_DISJUNCTIVE : 63 #ADD_EQUALITY : 31 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 1 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 24 LocStat_MAX_WEQGRAPH_SIZE : 2 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 175 LocStat_NO_SUPPORTING_DISEQUALITIES : 38 LocStat_NO_DISJUNCTIONS : -48 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 32 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 36 TransStat_NO_SUPPORTING_DISEQUALITIES : 4 TransStat_NO_DISJUNCTIONS : 33 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.542138 RENAME_VARIABLES(MILLISECONDS) : 0.169221 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.514844 PROJECTAWAY(MILLISECONDS) : 0.137027 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.064676 DISJOIN(MILLISECONDS) : 0.156306 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.187991 ADD_EQUALITY(MILLISECONDS) : 0.023233 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.009933 #CONJOIN_DISJUNCTIVE : 118 #RENAME_VARIABLES : 259 #UNFREEZE : 0 #CONJOIN : 182 #PROJECTAWAY : 184 #ADD_WEAK_EQUALITY : 5 #DISJOIN : 27 #RENAME_VARIABLES_DISJUNCTIVE : 255 #ADD_EQUALITY : 36 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 1 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 33 LocStat_MAX_WEQGRAPH_SIZE : 2 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 237 LocStat_NO_SUPPORTING_DISEQUALITIES : 60 LocStat_NO_DISJUNCTIONS : -66 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 41 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 38 TransStat_NO_SUPPORTING_DISEQUALITIES : 6 TransStat_NO_DISJUNCTIONS : 41 TransStat_MAX_NO_DISJUNCTIONS : 1 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.761904 RENAME_VARIABLES(MILLISECONDS) : 0.240269 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.718083 PROJECTAWAY(MILLISECONDS) : 0.184899 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.049517 DISJOIN(MILLISECONDS) : 0.537840 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.267528 ADD_EQUALITY(MILLISECONDS) : 0.019770 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.007752 #CONJOIN_DISJUNCTIVE : 154 #RENAME_VARIABLES : 327 #UNFREEZE : 0 #CONJOIN : 214 #PROJECTAWAY : 222 #ADD_WEAK_EQUALITY : 6 #DISJOIN : 22 #RENAME_VARIABLES_DISJUNCTIVE : 327 #ADD_EQUALITY : 38 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 3 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 24 LocStat_MAX_WEQGRAPH_SIZE : 2 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 179 LocStat_NO_SUPPORTING_DISEQUALITIES : 38 LocStat_NO_DISJUNCTIONS : -48 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 32 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 36 TransStat_NO_SUPPORTING_DISEQUALITIES : 4 TransStat_NO_DISJUNCTIONS : 33 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.515508 RENAME_VARIABLES(MILLISECONDS) : 0.145314 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.484127 PROJECTAWAY(MILLISECONDS) : 0.120025 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.060742 DISJOIN(MILLISECONDS) : 0.155588 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.172482 ADD_EQUALITY(MILLISECONDS) : 0.018260 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.006314 #CONJOIN_DISJUNCTIVE : 120 #RENAME_VARIABLES : 265 #UNFREEZE : 0 #CONJOIN : 186 #PROJECTAWAY : 188 #ADD_WEAK_EQUALITY : 5 #DISJOIN : 27 #RENAME_VARIABLES_DISJUNCTIVE : 259 #ADD_EQUALITY : 36 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 1 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 24 LocStat_MAX_WEQGRAPH_SIZE : 2 LocStat_MAX_SIZEOF_WEQEDGELABEL : 1 LocStat_NO_SUPPORTING_EQUALITIES : 179 LocStat_NO_SUPPORTING_DISEQUALITIES : 38 LocStat_NO_DISJUNCTIONS : -48 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 32 TransStat_MAX_WEQGRAPH_SIZE : 2 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 36 TransStat_NO_SUPPORTING_DISEQUALITIES : 4 TransStat_NO_DISJUNCTIONS : 33 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.734870 RENAME_VARIABLES(MILLISECONDS) : 0.229120 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.698715 PROJECTAWAY(MILLISECONDS) : 0.159458 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.056071 DISJOIN(MILLISECONDS) : 0.174527 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.255332 ADD_EQUALITY(MILLISECONDS) : 0.018834 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.006782 #CONJOIN_DISJUNCTIVE : 120 #RENAME_VARIABLES : 265 #UNFREEZE : 0 #CONJOIN : 186 #PROJECTAWAY : 188 #ADD_WEAK_EQUALITY : 5 #DISJOIN : 27 #RENAME_VARIABLES_DISJUNCTIVE : 259 #ADD_EQUALITY : 36 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 1 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: SMTLIBException: Timeout exceeded de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: SMTLIBException: Timeout exceeded: de.uni_freiburg.informatik.ultimate.smtinterpol.interpolate.Interpolator.walkLeafNode(Interpolator.java:265) RESULT: Ultimate could not prove your program: Toolchain returned no result. Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/ArraysWithLenghtAtDeclaration_false-valid-deref-write.c_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-24_15-50-54-926.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/ArraysWithLenghtAtDeclaration_false-valid-deref-write.c_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-24_15-50-54-926.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/ArraysWithLenghtAtDeclaration_false-valid-deref-write.c_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-24_15-50-54-926.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/ArraysWithLenghtAtDeclaration_false-valid-deref-write.c_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-VPDomainBenchmark-1-2018-01-24_15-50-54-926.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/ArraysWithLenghtAtDeclaration_false-valid-deref-write.c_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-1-2018-01-24_15-50-54-926.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/ArraysWithLenghtAtDeclaration_false-valid-deref-write.c_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-VPDomainBenchmark-2-2018-01-24_15-50-54-926.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/ArraysWithLenghtAtDeclaration_false-valid-deref-write.c_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-2-2018-01-24_15-50-54-926.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/ArraysWithLenghtAtDeclaration_false-valid-deref-write.c_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-VPDomainBenchmark-3-2018-01-24_15-50-54-926.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/ArraysWithLenghtAtDeclaration_false-valid-deref-write.c_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-3-2018-01-24_15-50-54-926.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/ArraysWithLenghtAtDeclaration_false-valid-deref-write.c_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-VPDomainBenchmark-4-2018-01-24_15-50-54-926.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/ArraysWithLenghtAtDeclaration_false-valid-deref-write.c_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-4-2018-01-24_15-50-54-926.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/ArraysWithLenghtAtDeclaration_false-valid-deref-write.c_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-VPDomainBenchmark-5-2018-01-24_15-50-54-926.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/ArraysWithLenghtAtDeclaration_false-valid-deref-write.c_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-5-2018-01-24_15-50-54-926.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/ArraysWithLenghtAtDeclaration_false-valid-deref-write.c_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-VPDomainBenchmark-6-2018-01-24_15-50-54-926.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/ArraysWithLenghtAtDeclaration_false-valid-deref-write.c_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-6-2018-01-24_15-50-54-926.csv Completed graceful shutdown