java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-24 17:22:21,213 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-24 17:22:21,215 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-24 17:22:21,230 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-24 17:22:21,230 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-24 17:22:21,231 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-24 17:22:21,232 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-24 17:22:21,233 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-24 17:22:21,235 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-24 17:22:21,236 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-24 17:22:21,237 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-24 17:22:21,237 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-24 17:22:21,238 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-24 17:22:21,239 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-24 17:22:21,239 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-24 17:22:21,242 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-24 17:22:21,244 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-24 17:22:21,246 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-24 17:22:21,247 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-24 17:22:21,248 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-24 17:22:21,251 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-24 17:22:21,251 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-24 17:22:21,251 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-24 17:22:21,252 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-24 17:22:21,253 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-24 17:22:21,254 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-24 17:22:21,255 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-24 17:22:21,255 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-24 17:22:21,256 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-24 17:22:21,256 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-24 17:22:21,257 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-24 17:22:21,257 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf [2018-01-24 17:22:21,267 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-24 17:22:21,267 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-24 17:22:21,268 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-24 17:22:21,268 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-24 17:22:21,268 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-24 17:22:21,269 INFO L133 SettingsManager]: * Deactivate Weak Equivalences=true [2018-01-24 17:22:21,269 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-24 17:22:21,269 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-24 17:22:21,270 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-24 17:22:21,270 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-24 17:22:21,270 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-24 17:22:21,270 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-24 17:22:21,270 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-24 17:22:21,270 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-24 17:22:21,271 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-24 17:22:21,271 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-24 17:22:21,271 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-24 17:22:21,271 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-24 17:22:21,271 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-24 17:22:21,272 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-24 17:22:21,272 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-24 17:22:21,272 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-24 17:22:21,272 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-24 17:22:21,272 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-24 17:22:21,272 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 17:22:21,273 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-24 17:22:21,273 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-24 17:22:21,273 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-24 17:22:21,273 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-24 17:22:21,273 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-24 17:22:21,274 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-24 17:22:21,274 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-24 17:22:21,274 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-24 17:22:21,274 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-24 17:22:21,275 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-24 17:22:21,275 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-24 17:22:21,310 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-24 17:22:21,323 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-24 17:22:21,327 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-24 17:22:21,328 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-24 17:22:21,329 INFO L276 PluginConnector]: CDTParser initialized [2018-01-24 17:22:21,330 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-01-24 17:22:21,527 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-24 17:22:21,534 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-24 17:22:21,534 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-24 17:22:21,534 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-24 17:22:21,540 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-24 17:22:21,541 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 05:22:21" (1/1) ... [2018-01-24 17:22:21,544 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5d434187 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:22:21, skipping insertion in model container [2018-01-24 17:22:21,545 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 05:22:21" (1/1) ... [2018-01-24 17:22:21,558 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 17:22:21,605 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 17:22:21,723 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 17:22:21,745 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 17:22:21,757 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:22:21 WrapperNode [2018-01-24 17:22:21,757 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-24 17:22:21,758 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-24 17:22:21,758 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-24 17:22:21,759 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-24 17:22:21,775 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:22:21" (1/1) ... [2018-01-24 17:22:21,776 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:22:21" (1/1) ... [2018-01-24 17:22:21,789 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:22:21" (1/1) ... [2018-01-24 17:22:21,789 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:22:21" (1/1) ... [2018-01-24 17:22:21,799 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:22:21" (1/1) ... [2018-01-24 17:22:21,802 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:22:21" (1/1) ... [2018-01-24 17:22:21,804 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:22:21" (1/1) ... [2018-01-24 17:22:21,806 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-24 17:22:21,807 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-24 17:22:21,807 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-24 17:22:21,807 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-24 17:22:21,808 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:22:21" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 17:22:21,857 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-24 17:22:21,857 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-24 17:22:21,857 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-01-24 17:22:21,857 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-01-24 17:22:21,857 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-01-24 17:22:21,857 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-01-24 17:22:21,857 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-01-24 17:22:21,857 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-01-24 17:22:21,858 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-01-24 17:22:21,858 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-01-24 17:22:21,858 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-01-24 17:22:21,858 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-01-24 17:22:21,858 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-01-24 17:22:21,858 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-01-24 17:22:21,858 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-01-24 17:22:21,858 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-01-24 17:22:21,858 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-01-24 17:22:21,859 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-01-24 17:22:21,859 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-01-24 17:22:21,859 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-24 17:22:21,859 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-24 17:22:21,859 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-24 17:22:21,859 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-24 17:22:21,860 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-24 17:22:21,860 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-24 17:22:21,860 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-24 17:22:21,860 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-24 17:22:21,860 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-24 17:22:21,861 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-24 17:22:21,861 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-24 17:22:21,861 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-24 17:22:21,861 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-24 17:22:21,861 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-24 17:22:21,861 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-01-24 17:22:21,861 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-01-24 17:22:21,862 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-01-24 17:22:21,862 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-01-24 17:22:21,862 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-01-24 17:22:21,862 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-01-24 17:22:21,862 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-01-24 17:22:21,862 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-01-24 17:22:21,863 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-01-24 17:22:21,863 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-01-24 17:22:21,863 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-01-24 17:22:21,863 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-01-24 17:22:21,863 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-01-24 17:22:21,863 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-01-24 17:22:21,863 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-01-24 17:22:21,864 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-01-24 17:22:21,864 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-01-24 17:22:21,864 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-24 17:22:21,864 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-24 17:22:21,864 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-24 17:22:22,128 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-01-24 17:22:22,318 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-24 17:22:22,319 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 05:22:22 BoogieIcfgContainer [2018-01-24 17:22:22,319 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-24 17:22:22,320 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-24 17:22:22,320 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-24 17:22:22,323 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-24 17:22:22,323 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.01 05:22:21" (1/3) ... [2018-01-24 17:22:22,324 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@26eeaef5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 05:22:22, skipping insertion in model container [2018-01-24 17:22:22,324 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:22:21" (2/3) ... [2018-01-24 17:22:22,325 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@26eeaef5 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 05:22:22, skipping insertion in model container [2018-01-24 17:22:22,325 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 05:22:22" (3/3) ... [2018-01-24 17:22:22,327 INFO L105 eAbstractionObserver]: Analyzing ICFG memleaks_test22_1_false-valid-memtrack_true-termination.i [2018-01-24 17:22:22,336 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-24 17:22:22,345 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2018-01-24 17:22:22,400 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-24 17:22:22,400 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-24 17:22:22,401 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-24 17:22:22,401 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-24 17:22:22,401 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-24 17:22:22,401 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-24 17:22:22,401 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-24 17:22:22,401 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-24 17:22:22,402 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-24 17:22:22,428 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states. [2018-01-24 17:22:22,435 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-24 17:22:22,435 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:22,436 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:22,437 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:22,442 INFO L82 PathProgramCache]: Analyzing trace with hash -1956546830, now seen corresponding path program 1 times [2018-01-24 17:22:22,445 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:22,515 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:22,515 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:22,515 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:22,516 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:22,573 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:22,584 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:22,787 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:22,789 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:22:22,790 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 17:22:22,790 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:22,794 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 17:22:22,809 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 17:22:22,810 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:22:22,812 INFO L87 Difference]: Start difference. First operand 142 states. Second operand 5 states. [2018-01-24 17:22:22,884 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:22,884 INFO L93 Difference]: Finished difference Result 272 states and 287 transitions. [2018-01-24 17:22:22,885 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 17:22:22,886 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-01-24 17:22:22,887 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:22,902 INFO L225 Difference]: With dead ends: 272 [2018-01-24 17:22:22,902 INFO L226 Difference]: Without dead ends: 145 [2018-01-24 17:22:22,906 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:22:22,920 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-01-24 17:22:22,940 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 143. [2018-01-24 17:22:22,941 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-01-24 17:22:22,944 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 151 transitions. [2018-01-24 17:22:22,945 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 151 transitions. Word has length 17 [2018-01-24 17:22:22,946 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:22,946 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 151 transitions. [2018-01-24 17:22:22,946 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 17:22:22,946 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 151 transitions. [2018-01-24 17:22:22,946 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 17:22:22,947 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:22,947 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:22,947 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:22,947 INFO L82 PathProgramCache]: Analyzing trace with hash 1123892084, now seen corresponding path program 1 times [2018-01-24 17:22:22,947 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:22,949 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:22,950 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:22,950 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:22,950 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:22,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:22,973 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:23,051 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:23,051 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:22:23,051 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 17:22:23,052 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:23,053 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 17:22:23,053 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 17:22:23,053 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 17:22:23,054 INFO L87 Difference]: Start difference. First operand 143 states and 151 transitions. Second operand 6 states. [2018-01-24 17:22:23,261 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:23,261 INFO L93 Difference]: Finished difference Result 145 states and 153 transitions. [2018-01-24 17:22:23,261 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 17:22:23,262 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-01-24 17:22:23,262 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:23,264 INFO L225 Difference]: With dead ends: 145 [2018-01-24 17:22:23,264 INFO L226 Difference]: Without dead ends: 144 [2018-01-24 17:22:23,266 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 17:22:23,266 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 144 states. [2018-01-24 17:22:23,276 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 144 to 142. [2018-01-24 17:22:23,276 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-01-24 17:22:23,278 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 150 transitions. [2018-01-24 17:22:23,278 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 150 transitions. Word has length 19 [2018-01-24 17:22:23,278 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:23,278 INFO L432 AbstractCegarLoop]: Abstraction has 142 states and 150 transitions. [2018-01-24 17:22:23,278 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 17:22:23,279 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 150 transitions. [2018-01-24 17:22:23,279 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 17:22:23,279 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:23,279 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:23,279 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:23,280 INFO L82 PathProgramCache]: Analyzing trace with hash 1123892085, now seen corresponding path program 1 times [2018-01-24 17:22:23,280 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:23,281 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:23,281 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:23,281 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:23,281 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:23,304 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:23,305 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:23,574 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:23,574 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:22:23,574 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 17:22:23,575 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:23,575 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 17:22:23,575 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 17:22:23,575 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 17:22:23,576 INFO L87 Difference]: Start difference. First operand 142 states and 150 transitions. Second operand 7 states. [2018-01-24 17:22:23,844 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:23,844 INFO L93 Difference]: Finished difference Result 144 states and 152 transitions. [2018-01-24 17:22:23,845 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 17:22:23,845 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-01-24 17:22:23,845 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:23,846 INFO L225 Difference]: With dead ends: 144 [2018-01-24 17:22:23,846 INFO L226 Difference]: Without dead ends: 143 [2018-01-24 17:22:23,847 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-01-24 17:22:23,847 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-01-24 17:22:23,857 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 141. [2018-01-24 17:22:23,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-01-24 17:22:23,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 149 transitions. [2018-01-24 17:22:23,860 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 149 transitions. Word has length 19 [2018-01-24 17:22:23,860 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:23,861 INFO L432 AbstractCegarLoop]: Abstraction has 141 states and 149 transitions. [2018-01-24 17:22:23,861 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 17:22:23,861 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 149 transitions. [2018-01-24 17:22:23,862 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-24 17:22:23,862 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:23,862 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:23,863 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:23,864 INFO L82 PathProgramCache]: Analyzing trace with hash -1414777661, now seen corresponding path program 1 times [2018-01-24 17:22:23,864 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:23,865 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:23,866 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:23,866 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:23,866 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:23,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:23,885 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:23,975 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:23,976 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:22:23,976 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-24 17:22:23,976 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:23,977 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 17:22:23,977 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 17:22:23,977 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 17:22:23,977 INFO L87 Difference]: Start difference. First operand 141 states and 149 transitions. Second operand 7 states. [2018-01-24 17:22:24,055 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:24,055 INFO L93 Difference]: Finished difference Result 235 states and 247 transitions. [2018-01-24 17:22:24,056 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 17:22:24,056 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 27 [2018-01-24 17:22:24,056 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:24,058 INFO L225 Difference]: With dead ends: 235 [2018-01-24 17:22:24,059 INFO L226 Difference]: Without dead ends: 157 [2018-01-24 17:22:24,059 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-01-24 17:22:24,060 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-01-24 17:22:24,078 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 150. [2018-01-24 17:22:24,078 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-01-24 17:22:24,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 158 transitions. [2018-01-24 17:22:24,080 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 158 transitions. Word has length 27 [2018-01-24 17:22:24,080 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:24,081 INFO L432 AbstractCegarLoop]: Abstraction has 150 states and 158 transitions. [2018-01-24 17:22:24,081 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 17:22:24,081 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 158 transitions. [2018-01-24 17:22:24,082 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 17:22:24,082 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:24,083 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:24,083 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:24,083 INFO L82 PathProgramCache]: Analyzing trace with hash 1439517623, now seen corresponding path program 1 times [2018-01-24 17:22:24,083 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:24,084 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:24,085 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:24,085 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:24,085 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:24,106 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:24,107 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:24,227 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:24,227 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:22:24,227 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 17:22:24,228 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:24,228 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 17:22:24,228 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 17:22:24,228 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:22:24,229 INFO L87 Difference]: Start difference. First operand 150 states and 158 transitions. Second operand 10 states. [2018-01-24 17:22:24,471 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:24,472 INFO L93 Difference]: Finished difference Result 150 states and 158 transitions. [2018-01-24 17:22:24,472 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 17:22:24,472 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 34 [2018-01-24 17:22:24,472 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:24,474 INFO L225 Difference]: With dead ends: 150 [2018-01-24 17:22:24,474 INFO L226 Difference]: Without dead ends: 149 [2018-01-24 17:22:24,475 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:22:24,475 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-01-24 17:22:24,485 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 149. [2018-01-24 17:22:24,485 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-01-24 17:22:24,487 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 157 transitions. [2018-01-24 17:22:24,487 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 157 transitions. Word has length 34 [2018-01-24 17:22:24,487 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:24,488 INFO L432 AbstractCegarLoop]: Abstraction has 149 states and 157 transitions. [2018-01-24 17:22:24,488 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 17:22:24,488 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 157 transitions. [2018-01-24 17:22:24,489 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 17:22:24,489 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:24,489 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:24,490 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:24,490 INFO L82 PathProgramCache]: Analyzing trace with hash 1439517624, now seen corresponding path program 1 times [2018-01-24 17:22:24,490 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:24,491 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:24,491 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:24,492 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:24,492 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:24,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:24,509 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:24,570 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:24,571 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:22:24,571 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 17:22:24,571 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:24,571 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 17:22:24,571 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 17:22:24,572 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 17:22:24,572 INFO L87 Difference]: Start difference. First operand 149 states and 157 transitions. Second operand 4 states. [2018-01-24 17:22:24,628 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:24,628 INFO L93 Difference]: Finished difference Result 264 states and 278 transitions. [2018-01-24 17:22:24,629 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 17:22:24,629 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2018-01-24 17:22:24,629 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:24,630 INFO L225 Difference]: With dead ends: 264 [2018-01-24 17:22:24,631 INFO L226 Difference]: Without dead ends: 150 [2018-01-24 17:22:24,632 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:22:24,632 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-01-24 17:22:24,640 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-01-24 17:22:24,640 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-01-24 17:22:24,642 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 158 transitions. [2018-01-24 17:22:24,642 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 158 transitions. Word has length 34 [2018-01-24 17:22:24,642 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:24,642 INFO L432 AbstractCegarLoop]: Abstraction has 150 states and 158 transitions. [2018-01-24 17:22:24,643 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 17:22:24,643 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 158 transitions. [2018-01-24 17:22:24,644 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-24 17:22:24,644 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:24,644 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:24,644 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:24,645 INFO L82 PathProgramCache]: Analyzing trace with hash -204456797, now seen corresponding path program 1 times [2018-01-24 17:22:24,645 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:24,646 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:24,647 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:24,647 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:24,647 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:24,664 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:24,665 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:24,717 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:24,717 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:24,717 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:22:24,718 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 36 with the following transitions: [2018-01-24 17:22:24,719 INFO L201 CegarAbsIntRunner]: [0], [2], [6], [10], [31], [36], [52], [59], [63], [67], [70], [72], [73], [77], [79], [80], [130], [133], [134], [135], [137], [138], [139], [157], [158], [159], [160], [161], [163], [169], [173], [179], [193], [194], [195] [2018-01-24 17:22:24,767 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:22:24,768 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:22:24,985 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:22:24,986 INFO L268 AbstractInterpreter]: Visited 35 different actions 39 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 21 variables. [2018-01-24 17:22:25,004 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:22:25,005 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:25,005 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:22:25,019 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:25,019 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:22:25,062 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:25,072 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:25,116 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:25,116 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:25,218 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:25,254 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:25,254 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:22:25,263 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:25,263 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:22:25,327 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:25,334 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:25,341 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:25,341 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:25,378 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:25,381 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:22:25,382 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-24 17:22:25,382 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:22:25,382 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 17:22:25,383 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 17:22:25,383 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-01-24 17:22:25,383 INFO L87 Difference]: Start difference. First operand 150 states and 158 transitions. Second operand 6 states. [2018-01-24 17:22:25,445 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:25,445 INFO L93 Difference]: Finished difference Result 265 states and 279 transitions. [2018-01-24 17:22:25,446 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 17:22:25,446 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-01-24 17:22:25,446 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:25,448 INFO L225 Difference]: With dead ends: 265 [2018-01-24 17:22:25,448 INFO L226 Difference]: Without dead ends: 151 [2018-01-24 17:22:25,449 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 134 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:22:25,449 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-01-24 17:22:25,459 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 151. [2018-01-24 17:22:25,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-01-24 17:22:25,461 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 159 transitions. [2018-01-24 17:22:25,461 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 159 transitions. Word has length 35 [2018-01-24 17:22:25,461 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:25,462 INFO L432 AbstractCegarLoop]: Abstraction has 151 states and 159 transitions. [2018-01-24 17:22:25,462 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 17:22:25,462 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 159 transitions. [2018-01-24 17:22:25,463 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 17:22:25,463 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:25,463 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:25,464 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:25,464 INFO L82 PathProgramCache]: Analyzing trace with hash -1829139958, now seen corresponding path program 1 times [2018-01-24 17:22:25,464 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:25,466 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:25,466 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:25,466 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:25,466 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:25,484 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:25,485 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:25,617 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:25,617 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:22:25,617 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-24 17:22:25,618 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:25,618 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 17:22:25,618 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 17:22:25,618 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 17:22:25,619 INFO L87 Difference]: Start difference. First operand 151 states and 159 transitions. Second operand 7 states. [2018-01-24 17:22:25,703 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:25,703 INFO L93 Difference]: Finished difference Result 215 states and 225 transitions. [2018-01-24 17:22:25,704 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 17:22:25,704 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 36 [2018-01-24 17:22:25,704 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:25,705 INFO L225 Difference]: With dead ends: 215 [2018-01-24 17:22:25,706 INFO L226 Difference]: Without dead ends: 161 [2018-01-24 17:22:25,706 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-01-24 17:22:25,707 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2018-01-24 17:22:25,714 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 157. [2018-01-24 17:22:25,715 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-01-24 17:22:25,716 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 165 transitions. [2018-01-24 17:22:25,716 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 165 transitions. Word has length 36 [2018-01-24 17:22:25,716 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:25,717 INFO L432 AbstractCegarLoop]: Abstraction has 157 states and 165 transitions. [2018-01-24 17:22:25,717 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 17:22:25,717 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 165 transitions. [2018-01-24 17:22:25,718 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 17:22:25,718 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:25,718 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:25,718 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:25,719 INFO L82 PathProgramCache]: Analyzing trace with hash 371943704, now seen corresponding path program 2 times [2018-01-24 17:22:25,719 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:25,720 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:25,720 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:25,720 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:25,720 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:25,736 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:25,737 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:25,827 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:25,827 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:25,827 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:22:25,827 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:22:25,828 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:22:25,828 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:25,828 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:22:25,841 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:22:25,842 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:22:25,868 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:22:25,872 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:22:25,876 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:25,905 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 17:22:25,907 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:22:25,927 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 17:22:25,927 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:22:25,950 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 17:22:25,950 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 17:22:28,179 WARN L143 SmtUtils]: Spent 2020ms on a formula simplification that was a NOOP. DAG size: 27 [2018-01-24 17:22:28,486 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 17:22:28,486 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:31,321 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 17:22:31,341 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 17:22:31,341 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14, 13] imperfect sequences [6] total 31 [2018-01-24 17:22:31,341 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:31,342 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 17:22:31,342 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 17:22:31,342 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=839, Unknown=1, NotChecked=0, Total=930 [2018-01-24 17:22:31,342 INFO L87 Difference]: Start difference. First operand 157 states and 165 transitions. Second operand 15 states. [2018-01-24 17:22:32,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:32,362 INFO L93 Difference]: Finished difference Result 176 states and 183 transitions. [2018-01-24 17:22:32,363 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-24 17:22:32,363 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 36 [2018-01-24 17:22:32,363 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:32,364 INFO L225 Difference]: With dead ends: 176 [2018-01-24 17:22:32,364 INFO L226 Difference]: Without dead ends: 175 [2018-01-24 17:22:32,365 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 244 ImplicationChecksByTransitivity, 5.4s TimeCoverageRelationStatistics Valid=118, Invalid=1071, Unknown=1, NotChecked=0, Total=1190 [2018-01-24 17:22:32,365 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 175 states. [2018-01-24 17:22:32,377 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 175 to 156. [2018-01-24 17:22:32,377 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156 states. [2018-01-24 17:22:32,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 164 transitions. [2018-01-24 17:22:32,379 INFO L78 Accepts]: Start accepts. Automaton has 156 states and 164 transitions. Word has length 36 [2018-01-24 17:22:32,379 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:32,379 INFO L432 AbstractCegarLoop]: Abstraction has 156 states and 164 transitions. [2018-01-24 17:22:32,379 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 17:22:32,379 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 164 transitions. [2018-01-24 17:22:32,380 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 17:22:32,380 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:32,380 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:32,380 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:32,381 INFO L82 PathProgramCache]: Analyzing trace with hash -1983848104, now seen corresponding path program 1 times [2018-01-24 17:22:32,381 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:32,382 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:32,382 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:22:32,382 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:32,383 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:32,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:32,390 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:32,417 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:32,418 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:22:32,418 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 17:22:32,418 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:32,418 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 17:22:32,418 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 17:22:32,419 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 17:22:32,419 INFO L87 Difference]: Start difference. First operand 156 states and 164 transitions. Second operand 3 states. [2018-01-24 17:22:32,663 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:32,663 INFO L93 Difference]: Finished difference Result 174 states and 183 transitions. [2018-01-24 17:22:32,663 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 17:22:32,663 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 34 [2018-01-24 17:22:32,663 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:32,664 INFO L225 Difference]: With dead ends: 174 [2018-01-24 17:22:32,664 INFO L226 Difference]: Without dead ends: 160 [2018-01-24 17:22:32,665 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 17:22:32,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-01-24 17:22:32,682 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 152. [2018-01-24 17:22:32,683 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-01-24 17:22:32,684 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 159 transitions. [2018-01-24 17:22:32,685 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 159 transitions. Word has length 34 [2018-01-24 17:22:32,685 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:32,685 INFO L432 AbstractCegarLoop]: Abstraction has 152 states and 159 transitions. [2018-01-24 17:22:32,685 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 17:22:32,685 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 159 transitions. [2018-01-24 17:22:32,686 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 17:22:32,686 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:32,686 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:32,687 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:32,687 INFO L82 PathProgramCache]: Analyzing trace with hash 515535126, now seen corresponding path program 1 times [2018-01-24 17:22:32,687 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:32,688 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:32,688 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:32,688 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:32,688 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:32,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:32,697 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:32,729 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:32,729 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:22:32,729 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 17:22:32,729 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:32,730 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 17:22:32,730 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 17:22:32,730 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 17:22:32,730 INFO L87 Difference]: Start difference. First operand 152 states and 159 transitions. Second operand 6 states. [2018-01-24 17:22:32,762 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:32,762 INFO L93 Difference]: Finished difference Result 156 states and 162 transitions. [2018-01-24 17:22:32,763 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 17:22:32,763 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 36 [2018-01-24 17:22:32,763 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:32,764 INFO L225 Difference]: With dead ends: 156 [2018-01-24 17:22:32,764 INFO L226 Difference]: Without dead ends: 137 [2018-01-24 17:22:32,765 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 17:22:32,765 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 137 states. [2018-01-24 17:22:32,779 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 137 to 137. [2018-01-24 17:22:32,780 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-01-24 17:22:32,781 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 143 transitions. [2018-01-24 17:22:32,781 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 143 transitions. Word has length 36 [2018-01-24 17:22:32,781 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:32,781 INFO L432 AbstractCegarLoop]: Abstraction has 137 states and 143 transitions. [2018-01-24 17:22:32,782 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 17:22:32,782 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 143 transitions. [2018-01-24 17:22:32,782 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-24 17:22:32,782 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:32,782 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:32,783 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:32,783 INFO L82 PathProgramCache]: Analyzing trace with hash 1666573044, now seen corresponding path program 1 times [2018-01-24 17:22:32,783 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:32,791 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:32,791 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:32,791 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:32,792 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:32,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:32,809 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:32,887 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 17:22:32,887 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:22:32,887 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 17:22:32,887 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:32,888 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 17:22:32,888 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 17:22:32,888 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:22:32,888 INFO L87 Difference]: Start difference. First operand 137 states and 143 transitions. Second operand 10 states. [2018-01-24 17:22:33,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:33,088 INFO L93 Difference]: Finished difference Result 137 states and 143 transitions. [2018-01-24 17:22:33,088 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 17:22:33,088 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 41 [2018-01-24 17:22:33,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:33,089 INFO L225 Difference]: With dead ends: 137 [2018-01-24 17:22:33,089 INFO L226 Difference]: Without dead ends: 135 [2018-01-24 17:22:33,090 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:22:33,090 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-01-24 17:22:33,102 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-01-24 17:22:33,102 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-01-24 17:22:33,103 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 141 transitions. [2018-01-24 17:22:33,104 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 141 transitions. Word has length 41 [2018-01-24 17:22:33,104 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:33,104 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 141 transitions. [2018-01-24 17:22:33,104 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 17:22:33,104 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 141 transitions. [2018-01-24 17:22:33,105 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-24 17:22:33,105 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:33,105 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:33,105 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:33,105 INFO L82 PathProgramCache]: Analyzing trace with hash 1666573045, now seen corresponding path program 1 times [2018-01-24 17:22:33,105 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:33,107 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:33,107 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:33,107 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:33,107 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:33,122 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:33,123 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:33,159 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:33,159 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:33,159 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:22:33,159 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 42 with the following transitions: [2018-01-24 17:22:33,160 INFO L201 CegarAbsIntRunner]: [0], [2], [6], [10], [31], [36], [52], [59], [63], [67], [68], [71], [72], [73], [77], [79], [80], [122], [125], [130], [133], [134], [135], [137], [138], [139], [157], [158], [159], [160], [161], [163], [169], [173], [179], [180], [181], [193], [194], [195] [2018-01-24 17:22:33,161 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:22:33,162 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:22:33,295 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:22:33,295 INFO L268 AbstractInterpreter]: Visited 40 different actions 44 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 21 variables. [2018-01-24 17:22:33,299 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:22:33,299 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:33,299 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:22:33,314 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:33,315 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:22:33,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:33,343 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:33,354 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:33,355 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:33,440 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:33,464 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:33,464 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:22:33,468 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:33,469 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:22:33,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:33,515 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:33,520 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:33,520 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:33,547 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:33,549 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:22:33,549 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-24 17:22:33,549 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:22:33,549 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 17:22:33,549 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 17:22:33,549 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-01-24 17:22:33,550 INFO L87 Difference]: Start difference. First operand 135 states and 141 transitions. Second operand 7 states. [2018-01-24 17:22:33,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:33,579 INFO L93 Difference]: Finished difference Result 247 states and 259 transitions. [2018-01-24 17:22:33,579 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 17:22:33,580 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 41 [2018-01-24 17:22:33,580 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:33,580 INFO L225 Difference]: With dead ends: 247 [2018-01-24 17:22:33,580 INFO L226 Difference]: Without dead ends: 136 [2018-01-24 17:22:33,581 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 157 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=55, Invalid=77, Unknown=0, NotChecked=0, Total=132 [2018-01-24 17:22:33,581 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 136 states. [2018-01-24 17:22:33,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 136 to 136. [2018-01-24 17:22:33,594 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 136 states. [2018-01-24 17:22:33,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 136 states to 136 states and 142 transitions. [2018-01-24 17:22:33,595 INFO L78 Accepts]: Start accepts. Automaton has 136 states and 142 transitions. Word has length 41 [2018-01-24 17:22:33,595 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:33,595 INFO L432 AbstractCegarLoop]: Abstraction has 136 states and 142 transitions. [2018-01-24 17:22:33,596 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 17:22:33,596 INFO L276 IsEmpty]: Start isEmpty. Operand 136 states and 142 transitions. [2018-01-24 17:22:33,596 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-24 17:22:33,596 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:33,597 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:33,597 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:33,597 INFO L82 PathProgramCache]: Analyzing trace with hash -723967062, now seen corresponding path program 2 times [2018-01-24 17:22:33,597 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:33,598 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:33,598 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:33,598 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:33,598 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:33,613 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:33,614 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:33,677 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:33,677 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:33,677 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:22:33,677 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:22:33,678 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:22:33,678 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:33,678 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:22:33,688 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:22:33,688 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:22:33,713 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:22:33,718 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:22:33,722 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:33,735 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 17:22:33,736 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:22:33,763 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 17:22:33,764 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:22:33,776 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 17:22:33,776 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 17:22:35,984 WARN L143 SmtUtils]: Spent 2017ms on a formula simplification that was a NOOP. DAG size: 27 [2018-01-24 17:22:36,289 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 17:22:36,289 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:37,756 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 17:22:37,775 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 17:22:37,776 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15, 13] imperfect sequences [7] total 33 [2018-01-24 17:22:37,776 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:37,776 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-24 17:22:37,776 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-24 17:22:37,777 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=951, Unknown=0, NotChecked=0, Total=1056 [2018-01-24 17:22:37,777 INFO L87 Difference]: Start difference. First operand 136 states and 142 transitions. Second operand 16 states. [2018-01-24 17:22:38,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:38,583 INFO L93 Difference]: Finished difference Result 136 states and 142 transitions. [2018-01-24 17:22:38,583 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-24 17:22:38,583 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 42 [2018-01-24 17:22:38,583 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:38,584 INFO L225 Difference]: With dead ends: 136 [2018-01-24 17:22:38,584 INFO L226 Difference]: Without dead ends: 134 [2018-01-24 17:22:38,584 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 57 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 317 ImplicationChecksByTransitivity, 4.0s TimeCoverageRelationStatistics Valid=136, Invalid=1196, Unknown=0, NotChecked=0, Total=1332 [2018-01-24 17:22:38,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-01-24 17:22:38,595 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-01-24 17:22:38,595 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-01-24 17:22:38,595 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 140 transitions. [2018-01-24 17:22:38,596 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 140 transitions. Word has length 42 [2018-01-24 17:22:38,596 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:38,596 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 140 transitions. [2018-01-24 17:22:38,596 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-24 17:22:38,596 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 140 transitions. [2018-01-24 17:22:38,596 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-24 17:22:38,596 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:38,596 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:38,597 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:38,597 INFO L82 PathProgramCache]: Analyzing trace with hash -2043211584, now seen corresponding path program 1 times [2018-01-24 17:22:38,597 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:38,598 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:38,598 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:22:38,598 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:38,598 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:38,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:38,608 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:38,749 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 17:22:38,750 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:22:38,750 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-24 17:22:38,750 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:38,750 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 17:22:38,750 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 17:22:38,750 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-01-24 17:22:38,751 INFO L87 Difference]: Start difference. First operand 134 states and 140 transitions. Second operand 8 states. [2018-01-24 17:22:38,818 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:38,819 INFO L93 Difference]: Finished difference Result 221 states and 230 transitions. [2018-01-24 17:22:38,819 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 17:22:38,819 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 45 [2018-01-24 17:22:38,819 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:38,820 INFO L225 Difference]: With dead ends: 221 [2018-01-24 17:22:38,820 INFO L226 Difference]: Without dead ends: 134 [2018-01-24 17:22:38,821 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:22:38,821 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-01-24 17:22:38,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-01-24 17:22:38,833 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-01-24 17:22:38,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 139 transitions. [2018-01-24 17:22:38,834 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 139 transitions. Word has length 45 [2018-01-24 17:22:38,834 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:38,834 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 139 transitions. [2018-01-24 17:22:38,834 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 17:22:38,834 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 139 transitions. [2018-01-24 17:22:38,834 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-24 17:22:38,834 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:38,835 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:38,835 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:38,835 INFO L82 PathProgramCache]: Analyzing trace with hash -647760318, now seen corresponding path program 1 times [2018-01-24 17:22:38,835 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:38,836 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:38,836 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:38,836 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:38,836 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:38,844 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:38,846 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:38,921 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 17:22:38,921 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:22:38,921 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-01-24 17:22:38,921 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:38,922 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 17:22:38,922 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 17:22:38,922 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:22:38,922 INFO L87 Difference]: Start difference. First operand 134 states and 139 transitions. Second operand 10 states. [2018-01-24 17:22:39,030 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:39,030 INFO L93 Difference]: Finished difference Result 223 states and 231 transitions. [2018-01-24 17:22:39,031 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 17:22:39,031 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 50 [2018-01-24 17:22:39,031 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:39,032 INFO L225 Difference]: With dead ends: 223 [2018-01-24 17:22:39,032 INFO L226 Difference]: Without dead ends: 134 [2018-01-24 17:22:39,033 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:22:39,033 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-01-24 17:22:39,043 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 134. [2018-01-24 17:22:39,043 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-01-24 17:22:39,044 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 138 transitions. [2018-01-24 17:22:39,044 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 138 transitions. Word has length 50 [2018-01-24 17:22:39,044 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:39,045 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 138 transitions. [2018-01-24 17:22:39,045 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 17:22:39,045 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 138 transitions. [2018-01-24 17:22:39,045 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-01-24 17:22:39,046 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:39,046 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:39,046 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:39,046 INFO L82 PathProgramCache]: Analyzing trace with hash 1953733819, now seen corresponding path program 1 times [2018-01-24 17:22:39,046 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:39,047 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:39,047 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:39,047 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:39,047 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:39,061 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:39,062 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:39,178 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 17:22:39,178 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:22:39,178 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [12] imperfect sequences [] total 12 [2018-01-24 17:22:39,178 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:39,179 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-24 17:22:39,179 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-24 17:22:39,179 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:22:39,179 INFO L87 Difference]: Start difference. First operand 134 states and 138 transitions. Second operand 13 states. [2018-01-24 17:22:39,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:39,414 INFO L93 Difference]: Finished difference Result 134 states and 138 transitions. [2018-01-24 17:22:39,414 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-24 17:22:39,414 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 61 [2018-01-24 17:22:39,414 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:39,415 INFO L225 Difference]: With dead ends: 134 [2018-01-24 17:22:39,415 INFO L226 Difference]: Without dead ends: 132 [2018-01-24 17:22:39,415 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2018-01-24 17:22:39,416 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-01-24 17:22:39,426 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 132. [2018-01-24 17:22:39,427 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-01-24 17:22:39,427 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 136 transitions. [2018-01-24 17:22:39,428 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 136 transitions. Word has length 61 [2018-01-24 17:22:39,428 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:39,428 INFO L432 AbstractCegarLoop]: Abstraction has 132 states and 136 transitions. [2018-01-24 17:22:39,428 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-24 17:22:39,428 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 136 transitions. [2018-01-24 17:22:39,429 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-01-24 17:22:39,429 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:39,429 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:39,429 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:39,429 INFO L82 PathProgramCache]: Analyzing trace with hash 1953733820, now seen corresponding path program 1 times [2018-01-24 17:22:39,429 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:39,430 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:39,430 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:39,430 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:39,430 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:39,443 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:39,444 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:39,508 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:39,508 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:39,508 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:22:39,508 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 62 with the following transitions: [2018-01-24 17:22:39,509 INFO L201 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [17], [31], [36], [38], [52], [54], [59], [63], [66], [67], [68], [71], [72], [73], [77], [79], [80], [91], [94], [122], [123], [126], [129], [130], [133], [134], [135], [137], [138], [139], [144], [147], [157], [158], [159], [160], [161], [162], [163], [165], [169], [170], [173], [174], [175], [179], [180], [181], [182], [191], [193], [194], [195] [2018-01-24 17:22:39,511 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:22:39,511 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:22:39,685 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:22:39,685 INFO L268 AbstractInterpreter]: Visited 59 different actions 63 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 22 variables. [2018-01-24 17:22:39,702 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:22:39,702 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:39,703 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:22:39,713 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:39,713 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:22:39,752 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:39,756 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:39,773 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:39,773 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:39,899 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:39,919 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:39,920 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:22:39,927 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:39,927 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:22:39,985 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:39,990 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:39,995 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:39,995 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:40,050 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [MP cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (9)] Exception during sending of exit command (exit): Broken pipe [2018-01-24 17:22:40,052 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:22:40,052 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-24 17:22:40,052 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:22:40,053 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 17:22:40,053 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 17:22:40,053 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:22:40,054 INFO L87 Difference]: Start difference. First operand 132 states and 136 transitions. Second operand 8 states. [2018-01-24 17:22:40,084 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:40,084 INFO L93 Difference]: Finished difference Result 240 states and 248 transitions. [2018-01-24 17:22:40,085 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 17:22:40,085 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 61 [2018-01-24 17:22:40,085 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:40,086 INFO L225 Difference]: With dead ends: 240 [2018-01-24 17:22:40,086 INFO L226 Difference]: Without dead ends: 133 [2018-01-24 17:22:40,087 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 250 GetRequests, 236 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=77, Invalid=105, Unknown=0, NotChecked=0, Total=182 [2018-01-24 17:22:40,087 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-01-24 17:22:40,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 133. [2018-01-24 17:22:40,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-01-24 17:22:40,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 137 transitions. [2018-01-24 17:22:40,098 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 137 transitions. Word has length 61 [2018-01-24 17:22:40,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:40,098 INFO L432 AbstractCegarLoop]: Abstraction has 133 states and 137 transitions. [2018-01-24 17:22:40,098 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 17:22:40,098 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 137 transitions. [2018-01-24 17:22:40,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-01-24 17:22:40,099 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:40,099 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:40,099 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:40,099 INFO L82 PathProgramCache]: Analyzing trace with hash 737964273, now seen corresponding path program 2 times [2018-01-24 17:22:40,100 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:40,101 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:40,101 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:40,101 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:40,101 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:40,116 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:40,117 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:40,171 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:40,171 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:40,171 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:22:40,171 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:22:40,171 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:22:40,171 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:40,171 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:22:40,178 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:22:40,178 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:22:40,214 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:22:40,219 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:22:40,224 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:40,229 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 17:22:40,230 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:22:40,249 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 17:22:40,250 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:22:40,261 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 17:22:40,261 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 17:22:41,056 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 17:22:41,056 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:44,541 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 17:22:44,561 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 17:22:44,573 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18, 16] imperfect sequences [8] total 40 [2018-01-24 17:22:44,573 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:44,573 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-24 17:22:44,573 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-24 17:22:44,574 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=132, Invalid=1427, Unknown=1, NotChecked=0, Total=1560 [2018-01-24 17:22:44,574 INFO L87 Difference]: Start difference. First operand 133 states and 137 transitions. Second operand 19 states. [2018-01-24 17:22:45,422 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:45,422 INFO L93 Difference]: Finished difference Result 133 states and 137 transitions. [2018-01-24 17:22:45,422 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-24 17:22:45,422 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 62 [2018-01-24 17:22:45,423 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:45,423 INFO L225 Difference]: With dead ends: 133 [2018-01-24 17:22:45,423 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 17:22:45,424 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 136 GetRequests, 91 SyntacticMatches, 2 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 505 ImplicationChecksByTransitivity, 4.2s TimeCoverageRelationStatistics Valid=173, Invalid=1806, Unknown=1, NotChecked=0, Total=1980 [2018-01-24 17:22:45,424 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 17:22:45,435 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 131. [2018-01-24 17:22:45,435 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-01-24 17:22:45,435 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 135 transitions. [2018-01-24 17:22:45,436 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 135 transitions. Word has length 62 [2018-01-24 17:22:45,436 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:45,436 INFO L432 AbstractCegarLoop]: Abstraction has 131 states and 135 transitions. [2018-01-24 17:22:45,436 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-24 17:22:45,436 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 135 transitions. [2018-01-24 17:22:45,437 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 72 [2018-01-24 17:22:45,437 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:45,437 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:45,437 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:45,437 INFO L82 PathProgramCache]: Analyzing trace with hash -1810517891, now seen corresponding path program 1 times [2018-01-24 17:22:45,437 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:45,438 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:45,438 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:22:45,438 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:45,438 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:45,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:45,455 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:45,554 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 17:22:45,554 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:22:45,554 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-24 17:22:45,554 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:45,555 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-24 17:22:45,555 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-24 17:22:45,555 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-01-24 17:22:45,555 INFO L87 Difference]: Start difference. First operand 131 states and 135 transitions. Second operand 11 states. [2018-01-24 17:22:45,635 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:45,636 INFO L93 Difference]: Finished difference Result 192 states and 198 transitions. [2018-01-24 17:22:45,636 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 17:22:45,636 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 71 [2018-01-24 17:22:45,636 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:45,637 INFO L225 Difference]: With dead ends: 192 [2018-01-24 17:22:45,637 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 17:22:45,637 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2018-01-24 17:22:45,637 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 17:22:45,648 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 131. [2018-01-24 17:22:45,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-01-24 17:22:45,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 134 transitions. [2018-01-24 17:22:45,649 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 134 transitions. Word has length 71 [2018-01-24 17:22:45,649 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:45,649 INFO L432 AbstractCegarLoop]: Abstraction has 131 states and 134 transitions. [2018-01-24 17:22:45,649 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-24 17:22:45,649 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 134 transitions. [2018-01-24 17:22:45,650 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-01-24 17:22:45,650 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:45,650 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:45,650 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:45,651 INFO L82 PathProgramCache]: Analyzing trace with hash -1846676097, now seen corresponding path program 1 times [2018-01-24 17:22:45,651 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:45,651 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:45,651 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:45,652 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:45,652 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:45,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:45,667 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:45,929 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 17:22:45,930 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:22:45,930 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-01-24 17:22:45,930 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:45,930 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-24 17:22:45,930 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-24 17:22:45,930 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=271, Unknown=0, NotChecked=0, Total=306 [2018-01-24 17:22:45,930 INFO L87 Difference]: Start difference. First operand 131 states and 134 transitions. Second operand 18 states. [2018-01-24 17:22:46,406 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:46,407 INFO L93 Difference]: Finished difference Result 140 states and 143 transitions. [2018-01-24 17:22:46,407 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-24 17:22:46,407 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 84 [2018-01-24 17:22:46,407 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:46,408 INFO L225 Difference]: With dead ends: 140 [2018-01-24 17:22:46,408 INFO L226 Difference]: Without dead ends: 138 [2018-01-24 17:22:46,409 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=59, Invalid=493, Unknown=0, NotChecked=0, Total=552 [2018-01-24 17:22:46,409 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 138 states. [2018-01-24 17:22:46,420 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 138 to 129. [2018-01-24 17:22:46,420 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-01-24 17:22:46,421 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 132 transitions. [2018-01-24 17:22:46,421 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 132 transitions. Word has length 84 [2018-01-24 17:22:46,422 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:46,422 INFO L432 AbstractCegarLoop]: Abstraction has 129 states and 132 transitions. [2018-01-24 17:22:46,422 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-24 17:22:46,422 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 132 transitions. [2018-01-24 17:22:46,423 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-01-24 17:22:46,423 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:46,423 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:46,423 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:46,423 INFO L82 PathProgramCache]: Analyzing trace with hash -1846676096, now seen corresponding path program 1 times [2018-01-24 17:22:46,424 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:46,424 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:46,424 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:46,425 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:46,425 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:46,438 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:46,440 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:46,577 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:46,577 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:46,577 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:22:46,578 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 85 with the following transitions: [2018-01-24 17:22:46,578 INFO L201 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [17], [19], [20], [21], [24], [31], [36], [38], [39], [42], [52], [54], [56], [59], [63], [66], [67], [68], [71], [72], [73], [77], [79], [80], [81], [91], [92], [95], [96], [99], [100], [122], [123], [126], [129], [130], [133], [134], [135], [137], [138], [139], [140], [144], [147], [152], [153], [157], [158], [159], [160], [161], [162], [163], [165], [166], [167], [169], [170], [173], [174], [175], [176], [177], [179], [180], [181], [182], [183], [189], [191], [192], [193], [194], [195] [2018-01-24 17:22:46,580 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:22:46,581 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:22:46,760 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:22:46,760 INFO L268 AbstractInterpreter]: Visited 81 different actions 85 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 26 variables. [2018-01-24 17:22:46,762 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:22:46,762 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:46,762 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:22:46,770 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:46,770 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:22:46,816 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:46,820 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:46,835 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:46,835 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:46,998 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:47,030 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:47,030 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:22:47,036 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:47,036 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:22:47,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:47,131 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:47,138 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:47,139 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:47,204 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:47,205 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:22:47,205 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-24 17:22:47,205 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:22:47,206 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 17:22:47,206 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 17:22:47,206 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-24 17:22:47,206 INFO L87 Difference]: Start difference. First operand 129 states and 132 transitions. Second operand 9 states. [2018-01-24 17:22:47,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:47,235 INFO L93 Difference]: Finished difference Result 233 states and 239 transitions. [2018-01-24 17:22:47,235 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 17:22:47,235 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 84 [2018-01-24 17:22:47,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:47,236 INFO L225 Difference]: With dead ends: 233 [2018-01-24 17:22:47,236 INFO L226 Difference]: Without dead ends: 130 [2018-01-24 17:22:47,236 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 343 GetRequests, 327 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=103, Invalid=137, Unknown=0, NotChecked=0, Total=240 [2018-01-24 17:22:47,236 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-01-24 17:22:47,247 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 130. [2018-01-24 17:22:47,248 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-01-24 17:22:47,248 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 133 transitions. [2018-01-24 17:22:47,248 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 133 transitions. Word has length 84 [2018-01-24 17:22:47,249 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:47,249 INFO L432 AbstractCegarLoop]: Abstraction has 130 states and 133 transitions. [2018-01-24 17:22:47,249 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 17:22:47,249 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 133 transitions. [2018-01-24 17:22:47,250 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-01-24 17:22:47,250 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:47,250 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:47,250 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:47,250 INFO L82 PathProgramCache]: Analyzing trace with hash 1476998571, now seen corresponding path program 2 times [2018-01-24 17:22:47,251 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:47,252 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:47,252 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:47,252 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:47,252 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:47,272 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:47,274 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:47,352 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:47,352 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:47,352 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:22:47,352 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:22:47,353 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:22:47,353 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:47,353 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:22:47,360 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:22:47,360 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:22:47,411 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:22:47,419 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:22:47,425 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:47,430 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 17:22:47,430 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:22:47,449 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 17:22:47,449 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:22:47,466 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 17:22:47,466 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 17:22:48,316 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 17:22:48,316 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:49,138 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 17:22:49,158 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 17:22:49,158 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20, 18] imperfect sequences [9] total 45 [2018-01-24 17:22:49,158 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:49,158 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-24 17:22:49,158 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-24 17:22:49,159 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=153, Invalid=1827, Unknown=0, NotChecked=0, Total=1980 [2018-01-24 17:22:49,159 INFO L87 Difference]: Start difference. First operand 130 states and 133 transitions. Second operand 21 states. [2018-01-24 17:22:50,221 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:50,221 INFO L93 Difference]: Finished difference Result 130 states and 133 transitions. [2018-01-24 17:22:50,222 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-24 17:22:50,222 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 85 [2018-01-24 17:22:50,222 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:50,223 INFO L225 Difference]: With dead ends: 130 [2018-01-24 17:22:50,223 INFO L226 Difference]: Without dead ends: 128 [2018-01-24 17:22:50,224 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 184 GetRequests, 131 SyntacticMatches, 4 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 686 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=202, Invalid=2348, Unknown=0, NotChecked=0, Total=2550 [2018-01-24 17:22:50,225 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-01-24 17:22:50,246 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 128. [2018-01-24 17:22:50,247 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-01-24 17:22:50,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 131 transitions. [2018-01-24 17:22:50,248 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 131 transitions. Word has length 85 [2018-01-24 17:22:50,248 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:50,248 INFO L432 AbstractCegarLoop]: Abstraction has 128 states and 131 transitions. [2018-01-24 17:22:50,248 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-24 17:22:50,248 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 131 transitions. [2018-01-24 17:22:50,249 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-01-24 17:22:50,249 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:50,249 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:50,249 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:50,250 INFO L82 PathProgramCache]: Analyzing trace with hash -939068168, now seen corresponding path program 1 times [2018-01-24 17:22:50,250 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:50,251 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:50,251 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:22:50,251 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:50,251 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:50,266 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:50,267 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:50,364 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 17:22:50,364 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:22:50,365 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-24 17:22:50,365 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:50,365 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-24 17:22:50,365 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-24 17:22:50,365 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-01-24 17:22:50,365 INFO L87 Difference]: Start difference. First operand 128 states and 131 transitions. Second operand 11 states. [2018-01-24 17:22:50,440 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:50,441 INFO L93 Difference]: Finished difference Result 134 states and 136 transitions. [2018-01-24 17:22:50,441 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 17:22:50,441 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 83 [2018-01-24 17:22:50,442 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:50,442 INFO L225 Difference]: With dead ends: 134 [2018-01-24 17:22:50,443 INFO L226 Difference]: Without dead ends: 128 [2018-01-24 17:22:50,443 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2018-01-24 17:22:50,443 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-01-24 17:22:50,466 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 128. [2018-01-24 17:22:50,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 128 states. [2018-01-24 17:22:50,466 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 128 states to 128 states and 130 transitions. [2018-01-24 17:22:50,467 INFO L78 Accepts]: Start accepts. Automaton has 128 states and 130 transitions. Word has length 83 [2018-01-24 17:22:50,467 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:50,467 INFO L432 AbstractCegarLoop]: Abstraction has 128 states and 130 transitions. [2018-01-24 17:22:50,467 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-24 17:22:50,467 INFO L276 IsEmpty]: Start isEmpty. Operand 128 states and 130 transitions. [2018-01-24 17:22:50,468 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-01-24 17:22:50,468 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:50,468 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:50,468 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:50,469 INFO L82 PathProgramCache]: Analyzing trace with hash 983401723, now seen corresponding path program 1 times [2018-01-24 17:22:50,469 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:50,470 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:50,470 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:50,470 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:50,470 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:50,491 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:50,492 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:50,861 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 17:22:50,862 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:22:50,862 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2018-01-24 17:22:50,862 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:50,862 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-24 17:22:50,862 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-24 17:22:50,863 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=419, Unknown=0, NotChecked=0, Total=462 [2018-01-24 17:22:50,863 INFO L87 Difference]: Start difference. First operand 128 states and 130 transitions. Second operand 22 states. [2018-01-24 17:22:51,622 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:51,622 INFO L93 Difference]: Finished difference Result 133 states and 135 transitions. [2018-01-24 17:22:51,622 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-24 17:22:51,622 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 99 [2018-01-24 17:22:51,623 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:51,624 INFO L225 Difference]: With dead ends: 133 [2018-01-24 17:22:51,624 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 17:22:51,624 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 67 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=75, Invalid=795, Unknown=0, NotChecked=0, Total=870 [2018-01-24 17:22:51,625 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 17:22:51,650 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 126. [2018-01-24 17:22:51,650 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-01-24 17:22:51,651 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 128 transitions. [2018-01-24 17:22:51,651 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 128 transitions. Word has length 99 [2018-01-24 17:22:51,653 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:51,653 INFO L432 AbstractCegarLoop]: Abstraction has 126 states and 128 transitions. [2018-01-24 17:22:51,653 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-24 17:22:51,653 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 128 transitions. [2018-01-24 17:22:51,654 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-01-24 17:22:51,654 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:51,654 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:51,654 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:51,654 INFO L82 PathProgramCache]: Analyzing trace with hash 983401724, now seen corresponding path program 1 times [2018-01-24 17:22:51,654 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:51,655 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:51,655 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:51,655 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:51,655 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:51,675 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:51,677 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:51,747 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:51,748 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:51,748 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:22:51,748 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 100 with the following transitions: [2018-01-24 17:22:51,748 INFO L201 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [17], [19], [20], [21], [24], [31], [36], [38], [39], [40], [43], [44], [47], [48], [49], [52], [54], [56], [59], [63], [66], [67], [68], [71], [72], [73], [77], [79], [80], [81], [83], [86], [91], [92], [95], [96], [99], [100], [101], [104], [107], [122], [123], [126], [129], [130], [133], [134], [135], [137], [138], [139], [140], [144], [147], [152], [153], [157], [158], [159], [160], [161], [162], [163], [165], [166], [167], [169], [170], [171], [173], [174], [175], [176], [177], [179], [180], [181], [182], [183], [184], [185], [187], [189], [191], [192], [193], [194], [195] [2018-01-24 17:22:51,751 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:22:51,751 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:22:51,949 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:22:51,949 INFO L268 AbstractInterpreter]: Visited 95 different actions 99 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 27 variables. [2018-01-24 17:22:51,951 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:22:51,951 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:51,951 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:22:51,959 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:51,959 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:22:52,018 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:52,022 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:52,036 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:52,036 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:52,191 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:52,211 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:52,211 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:22:52,214 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:52,215 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:22:52,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:52,317 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:52,323 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:52,323 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:52,413 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:52,414 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:22:52,415 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-24 17:22:52,415 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:22:52,417 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 17:22:52,418 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 17:22:52,418 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-24 17:22:52,418 INFO L87 Difference]: Start difference. First operand 126 states and 128 transitions. Second operand 10 states. [2018-01-24 17:22:52,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:52,458 INFO L93 Difference]: Finished difference Result 226 states and 230 transitions. [2018-01-24 17:22:52,458 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-24 17:22:52,458 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 99 [2018-01-24 17:22:52,458 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:52,459 INFO L225 Difference]: With dead ends: 226 [2018-01-24 17:22:52,459 INFO L226 Difference]: Without dead ends: 127 [2018-01-24 17:22:52,459 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 404 GetRequests, 386 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=133, Invalid=173, Unknown=0, NotChecked=0, Total=306 [2018-01-24 17:22:52,459 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-01-24 17:22:52,472 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2018-01-24 17:22:52,472 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-01-24 17:22:52,473 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 129 transitions. [2018-01-24 17:22:52,473 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 129 transitions. Word has length 99 [2018-01-24 17:22:52,473 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:52,473 INFO L432 AbstractCegarLoop]: Abstraction has 127 states and 129 transitions. [2018-01-24 17:22:52,473 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 17:22:52,473 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 129 transitions. [2018-01-24 17:22:52,474 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-01-24 17:22:52,474 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:52,474 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:52,474 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:52,475 INFO L82 PathProgramCache]: Analyzing trace with hash 1981450609, now seen corresponding path program 2 times [2018-01-24 17:22:52,475 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:52,476 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:52,476 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:52,476 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:52,476 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:52,499 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:52,501 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:52,597 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:52,597 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:52,597 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:22:52,598 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:22:52,598 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:22:52,598 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:52,598 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:22:52,606 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:22:52,606 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:22:52,660 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:22:52,665 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:22:52,670 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:52,673 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 17:22:52,673 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:22:52,684 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 17:22:52,684 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:22:52,694 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 17:22:52,695 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 17:22:53,649 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-01-24 17:22:53,649 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:23:04,916 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-01-24 17:23:04,937 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 17:23:04,937 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24, 22] imperfect sequences [10] total 54 [2018-01-24 17:23:04,937 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:23:04,937 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-24 17:23:04,938 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-24 17:23:04,938 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=189, Invalid=2668, Unknown=5, NotChecked=0, Total=2862 [2018-01-24 17:23:04,938 INFO L87 Difference]: Start difference. First operand 127 states and 129 transitions. Second operand 25 states. [2018-01-24 17:23:06,338 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:23:06,338 INFO L93 Difference]: Finished difference Result 127 states and 129 transitions. [2018-01-24 17:23:06,338 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-24 17:23:06,338 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 100 [2018-01-24 17:23:06,339 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:23:06,354 INFO L225 Difference]: With dead ends: 127 [2018-01-24 17:23:06,354 INFO L226 Difference]: Without dead ends: 125 [2018-01-24 17:23:06,355 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 217 GetRequests, 151 SyntacticMatches, 6 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1043 ImplicationChecksByTransitivity, 12.4s TimeCoverageRelationStatistics Valid=254, Invalid=3523, Unknown=5, NotChecked=0, Total=3782 [2018-01-24 17:23:06,355 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-01-24 17:23:06,370 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 125. [2018-01-24 17:23:06,370 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-01-24 17:23:06,371 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 127 transitions. [2018-01-24 17:23:06,371 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 127 transitions. Word has length 100 [2018-01-24 17:23:06,371 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:23:06,371 INFO L432 AbstractCegarLoop]: Abstraction has 125 states and 127 transitions. [2018-01-24 17:23:06,371 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-24 17:23:06,371 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 127 transitions. [2018-01-24 17:23:06,372 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-01-24 17:23:06,372 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:23:06,372 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:23:06,372 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:23:06,372 INFO L82 PathProgramCache]: Analyzing trace with hash 1778186610, now seen corresponding path program 1 times [2018-01-24 17:23:06,372 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:23:06,373 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:23:06,373 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:23:06,373 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:23:06,373 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:23:06,388 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:23:06,389 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:23:06,531 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:23:06,531 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:23:06,531 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:23:06,531 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 105 with the following transitions: [2018-01-24 17:23:06,532 INFO L201 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [17], [19], [20], [21], [24], [31], [36], [38], [39], [40], [43], [44], [47], [48], [49], [52], [54], [56], [59], [63], [66], [67], [68], [71], [72], [73], [77], [79], [80], [81], [83], [86], [91], [92], [95], [96], [99], [100], [101], [104], [105], [108], [109], [114], [116], [122], [123], [126], [129], [130], [133], [134], [135], [137], [138], [139], [140], [144], [147], [152], [153], [157], [158], [159], [160], [161], [162], [163], [165], [166], [167], [169], [170], [171], [173], [174], [175], [176], [177], [179], [180], [181], [182], [183], [184], [185], [187], [189], [191], [192], [193], [194], [195] [2018-01-24 17:23:06,534 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:23:06,534 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:23:06,731 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:23:06,731 INFO L268 AbstractInterpreter]: Visited 99 different actions 103 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 27 variables. [2018-01-24 17:23:06,745 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:23:06,745 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:23:06,745 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:23:06,755 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:23:06,755 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:23:06,824 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:23:06,828 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:23:06,840 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:23:06,841 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:23:07,019 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:23:07,038 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:23:07,039 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 18 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:23:07,042 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:23:07,042 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:23:07,141 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:23:07,148 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:23:07,154 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:23:07,155 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:23:07,229 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:23:07,231 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:23:07,231 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-24 17:23:07,231 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:23:07,232 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-24 17:23:07,232 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-24 17:23:07,232 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-24 17:23:07,232 INFO L87 Difference]: Start difference. First operand 125 states and 127 transitions. Second operand 11 states. [2018-01-24 17:23:07,281 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:23:07,282 INFO L93 Difference]: Finished difference Result 223 states and 227 transitions. [2018-01-24 17:23:07,282 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 17:23:07,282 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 104 [2018-01-24 17:23:07,282 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:23:07,283 INFO L225 Difference]: With dead ends: 223 [2018-01-24 17:23:07,283 INFO L226 Difference]: Without dead ends: 126 [2018-01-24 17:23:07,284 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 425 GetRequests, 405 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=167, Invalid=213, Unknown=0, NotChecked=0, Total=380 [2018-01-24 17:23:07,284 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-01-24 17:23:07,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 126. [2018-01-24 17:23:07,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-01-24 17:23:07,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 128 transitions. [2018-01-24 17:23:07,311 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 128 transitions. Word has length 104 [2018-01-24 17:23:07,311 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:23:07,311 INFO L432 AbstractCegarLoop]: Abstraction has 126 states and 128 transitions. [2018-01-24 17:23:07,311 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-24 17:23:07,311 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 128 transitions. [2018-01-24 17:23:07,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-01-24 17:23:07,312 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:23:07,312 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:23:07,312 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:23:07,313 INFO L82 PathProgramCache]: Analyzing trace with hash 1873376797, now seen corresponding path program 2 times [2018-01-24 17:23:07,313 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:23:07,314 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:23:07,314 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:23:07,314 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:23:07,314 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:23:07,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:23:07,337 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:23:07,456 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:23:07,456 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:23:07,456 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:23:07,457 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:23:07,457 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:23:07,457 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:23:07,457 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:23:07,462 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:23:07,462 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:23:07,499 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:23:07,506 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:23:07,512 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:23:07,582 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-24 17:23:07,583 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 17:23:07,583 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:23:07,584 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:23:07,585 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:23:07,586 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-01-24 17:23:07,663 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 17:23:07,665 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 17:23:07,669 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 17:23:07,669 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:26 [2018-01-24 17:23:07,685 WARN L1029 $PredicateComparison]: unable to prove that (exists ((LDV_INIT_LIST_HEAD_~list.offset Int) (v_DerPreprocessor_2 Int)) (and (= |c_#memory_int| (store |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base| (let ((.cse0 (+ LDV_INIT_LIST_HEAD_~list.offset 4))) (store (store (select |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base|) LDV_INIT_LIST_HEAD_~list.offset v_DerPreprocessor_2) .cse0 (select (select |c_#memory_int| |c_LDV_INIT_LIST_HEAD_#in~list.base|) .cse0))))) (<= LDV_INIT_LIST_HEAD_~list.offset |c_LDV_INIT_LIST_HEAD_#in~list.offset|))) is different from true [2018-01-24 17:23:07,691 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2018-01-24 17:23:07,694 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 17:23:07,695 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 35 [2018-01-24 17:23:07,703 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 17:23:07,704 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 17:23:07,708 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 37 [2018-01-24 17:23:07,708 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 17:23:07,714 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:23:07,717 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:23:07,722 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:23:07,722 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9 [2018-01-24 17:23:08,026 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 17:23:08,026 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 36 [2018-01-24 17:23:08,028 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 17:23:08,029 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 17:23:08,029 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 15 [2018-01-24 17:23:08,029 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:23:08,031 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:23:08,034 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:23:08,034 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:13 [2018-01-24 17:23:08,346 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-01-24 17:23:08,347 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-01-24 17:23:08,347 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:23:08,349 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:23:08,350 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:23:08,350 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-01-24 17:23:08,393 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-01-24 17:23:08,394 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:23:09,717 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-01-24 17:23:09,718 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-01-24 17:23:09,718 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:23:09,719 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:23:09,722 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 17:23:09,723 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:43, output treesize:34 [2018-01-24 17:23:13,953 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 17:23:13,954 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 67 treesize of output 73 [2018-01-24 17:23:13,955 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.UnsupportedOperationException: alternation not yet supported at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.applyNonSddEliminations(ElimStorePlain.java:347) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:223) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.elimAllRec(ElimStorePlain.java:199) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.elim(PartialQuantifierElimination.java:270) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.tryToEliminate(PartialQuantifierElimination.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:243) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:445) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:421) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:292) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:328) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:173) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:160) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:237) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:185) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseTaipanRefinementStrategy.getTraceCheck(BaseTaipanRefinementStrategy.java:213) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:231) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:205) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:68) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:368) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:381) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:316) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:294) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:149) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:113) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:117) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:324) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.runToolchainDefault(DefaultToolchainJob.java:221) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.BasicToolchainJob.run(BasicToolchainJob.java:134) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-01-24 17:23:13,957 INFO L168 Benchmark]: Toolchain (without parser) took 52428.54 ms. Allocated memory was 303.6 MB in the beginning and 764.4 MB in the end (delta: 460.8 MB). Free memory was 262.6 MB in the beginning and 599.6 MB in the end (delta: -337.0 MB). Peak memory consumption was 123.9 MB. Max. memory is 5.3 GB. [2018-01-24 17:23:13,958 INFO L168 Benchmark]: CDTParser took 0.20 ms. Allocated memory is still 303.6 MB. Free memory is still 269.6 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-24 17:23:13,959 INFO L168 Benchmark]: CACSL2BoogieTranslator took 223.63 ms. Allocated memory is still 303.6 MB. Free memory was 262.6 MB in the beginning and 248.4 MB in the end (delta: 14.3 MB). Peak memory consumption was 14.3 MB. Max. memory is 5.3 GB. [2018-01-24 17:23:13,959 INFO L168 Benchmark]: Boogie Preprocessor took 48.07 ms. Allocated memory is still 303.6 MB. Free memory was 248.4 MB in the beginning and 246.4 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-24 17:23:13,959 INFO L168 Benchmark]: RCFGBuilder took 512.68 ms. Allocated memory is still 303.6 MB. Free memory was 246.4 MB in the beginning and 211.6 MB in the end (delta: 34.7 MB). Peak memory consumption was 34.7 MB. Max. memory is 5.3 GB. [2018-01-24 17:23:13,960 INFO L168 Benchmark]: TraceAbstraction took 51636.50 ms. Allocated memory was 303.6 MB in the beginning and 764.4 MB in the end (delta: 460.8 MB). Free memory was 211.6 MB in the beginning and 599.6 MB in the end (delta: -388.0 MB). Peak memory consumption was 72.9 MB. Max. memory is 5.3 GB. [2018-01-24 17:23:13,962 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.20 ms. Allocated memory is still 303.6 MB. Free memory is still 269.6 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 223.63 ms. Allocated memory is still 303.6 MB. Free memory was 262.6 MB in the beginning and 248.4 MB in the end (delta: 14.3 MB). Peak memory consumption was 14.3 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 48.07 ms. Allocated memory is still 303.6 MB. Free memory was 248.4 MB in the beginning and 246.4 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 512.68 ms. Allocated memory is still 303.6 MB. Free memory was 246.4 MB in the beginning and 211.6 MB in the end (delta: 34.7 MB). Peak memory consumption was 34.7 MB. Max. memory is 5.3 GB. * TraceAbstraction took 51636.50 ms. Allocated memory was 303.6 MB in the beginning and 764.4 MB in the end (delta: 460.8 MB). Free memory was 211.6 MB in the beginning and 599.6 MB in the end (delta: -388.0 MB). Peak memory consumption was 72.9 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 34 LocStat_MAX_WEQGRAPH_SIZE : 0 LocStat_MAX_SIZEOF_WEQEDGELABEL : 0 LocStat_NO_SUPPORTING_EQUALITIES : 237 LocStat_NO_SUPPORTING_DISEQUALITIES : 25 LocStat_NO_DISJUNCTIONS : -68 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 53 TransStat_MAX_WEQGRAPH_SIZE : 0 TransStat_MAX_SIZEOF_WEQEDGELABEL : 0 TransStat_NO_SUPPORTING_EQUALITIES : 108 TransStat_NO_SUPPORTING_DISEQUALITIES : 9 TransStat_NO_DISJUNCTIONS : 57 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.829545 RENAME_VARIABLES(MILLISECONDS) : 0.209227 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.296794 PROJECTAWAY(MILLISECONDS) : 0.074116 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.001572 DISJOIN(MILLISECONDS) : 2.402761 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.249763 ADD_EQUALITY(MILLISECONDS) : 0.037380 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.015978 #CONJOIN_DISJUNCTIVE : 74 #RENAME_VARIABLES : 112 #UNFREEZE : 0 #CONJOIN : 154 #PROJECTAWAY : 118 #ADD_WEAK_EQUALITY : 9 #DISJOIN : 1 #RENAME_VARIABLES_DISJUNCTIVE : 108 #ADD_EQUALITY : 111 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 8 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 39 LocStat_MAX_WEQGRAPH_SIZE : 0 LocStat_MAX_SIZEOF_WEQEDGELABEL : 0 LocStat_NO_SUPPORTING_EQUALITIES : 272 LocStat_NO_SUPPORTING_DISEQUALITIES : 30 LocStat_NO_DISJUNCTIONS : -78 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 60 TransStat_MAX_WEQGRAPH_SIZE : 0 TransStat_MAX_SIZEOF_WEQEDGELABEL : 0 TransStat_NO_SUPPORTING_EQUALITIES : 120 TransStat_NO_SUPPORTING_DISEQUALITIES : 9 TransStat_NO_DISJUNCTIONS : 64 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.608772 RENAME_VARIABLES(MILLISECONDS) : 0.169538 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.258043 PROJECTAWAY(MILLISECONDS) : 0.074778 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.001270 DISJOIN(MILLISECONDS) : 0.524346 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.210480 ADD_EQUALITY(MILLISECONDS) : 0.028736 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.014000 #CONJOIN_DISJUNCTIVE : 84 #RENAME_VARIABLES : 127 #UNFREEZE : 0 #CONJOIN : 179 #PROJECTAWAY : 135 #ADD_WEAK_EQUALITY : 15 #DISJOIN : 1 #RENAME_VARIABLES_DISJUNCTIVE : 123 #ADD_EQUALITY : 128 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 8 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 58 LocStat_MAX_WEQGRAPH_SIZE : 0 LocStat_MAX_SIZEOF_WEQEDGELABEL : 0 LocStat_NO_SUPPORTING_EQUALITIES : 402 LocStat_NO_SUPPORTING_DISEQUALITIES : 49 LocStat_NO_DISJUNCTIONS : -116 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 85 TransStat_MAX_WEQGRAPH_SIZE : 0 TransStat_MAX_SIZEOF_WEQEDGELABEL : 0 TransStat_NO_SUPPORTING_EQUALITIES : 164 TransStat_NO_SUPPORTING_DISEQUALITIES : 11 TransStat_NO_DISJUNCTIONS : 90 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.423099 RENAME_VARIABLES(MILLISECONDS) : 0.127243 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.179643 PROJECTAWAY(MILLISECONDS) : 0.038555 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.001214 DISJOIN(MILLISECONDS) : 0.358995 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.150382 ADD_EQUALITY(MILLISECONDS) : 0.023547 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.014296 #CONJOIN_DISJUNCTIVE : 120 #RENAME_VARIABLES : 184 #UNFREEZE : 0 #CONJOIN : 260 #PROJECTAWAY : 199 #ADD_WEAK_EQUALITY : 27 #DISJOIN : 1 #RENAME_VARIABLES_DISJUNCTIVE : 179 #ADD_EQUALITY : 180 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 10 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 80 LocStat_MAX_WEQGRAPH_SIZE : 0 LocStat_MAX_SIZEOF_WEQEDGELABEL : 0 LocStat_NO_SUPPORTING_EQUALITIES : 591 LocStat_NO_SUPPORTING_DISEQUALITIES : 71 LocStat_NO_DISJUNCTIONS : -160 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 115 TransStat_MAX_WEQGRAPH_SIZE : 0 TransStat_MAX_SIZEOF_WEQEDGELABEL : 0 TransStat_NO_SUPPORTING_EQUALITIES : 233 TransStat_NO_SUPPORTING_DISEQUALITIES : 13 TransStat_NO_DISJUNCTIONS : 121 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.422334 RENAME_VARIABLES(MILLISECONDS) : 0.102218 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.171761 PROJECTAWAY(MILLISECONDS) : 0.038688 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.001309 DISJOIN(MILLISECONDS) : 0.503883 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.125372 ADD_EQUALITY(MILLISECONDS) : 0.020171 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.010482 #CONJOIN_DISJUNCTIVE : 163 #RENAME_VARIABLES : 246 #UNFREEZE : 0 #CONJOIN : 359 #PROJECTAWAY : 268 #ADD_WEAK_EQUALITY : 33 #DISJOIN : 1 #RENAME_VARIABLES_DISJUNCTIVE : 240 #ADD_EQUALITY : 254 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 12 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 94 LocStat_MAX_WEQGRAPH_SIZE : 0 LocStat_MAX_SIZEOF_WEQEDGELABEL : 0 LocStat_NO_SUPPORTING_EQUALITIES : 720 LocStat_NO_SUPPORTING_DISEQUALITIES : 85 LocStat_NO_DISJUNCTIONS : -188 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 135 TransStat_MAX_WEQGRAPH_SIZE : 0 TransStat_MAX_SIZEOF_WEQEDGELABEL : 0 TransStat_NO_SUPPORTING_EQUALITIES : 265 TransStat_NO_SUPPORTING_DISEQUALITIES : 13 TransStat_NO_DISJUNCTIONS : 141 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.325804 RENAME_VARIABLES(MILLISECONDS) : 0.102644 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.130122 PROJECTAWAY(MILLISECONDS) : 0.038477 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.001437 DISJOIN(MILLISECONDS) : 0.426678 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.127402 ADD_EQUALITY(MILLISECONDS) : 0.017410 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.009943 #CONJOIN_DISJUNCTIVE : 186 #RENAME_VARIABLES : 283 #UNFREEZE : 0 #CONJOIN : 407 #PROJECTAWAY : 309 #ADD_WEAK_EQUALITY : 39 #DISJOIN : 1 #RENAME_VARIABLES_DISJUNCTIVE : 277 #ADD_EQUALITY : 291 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 12 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 98 LocStat_MAX_WEQGRAPH_SIZE : 0 LocStat_MAX_SIZEOF_WEQEDGELABEL : 0 LocStat_NO_SUPPORTING_EQUALITIES : 762 LocStat_NO_SUPPORTING_DISEQUALITIES : 93 LocStat_NO_DISJUNCTIONS : -196 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 139 TransStat_MAX_WEQGRAPH_SIZE : 0 TransStat_MAX_SIZEOF_WEQEDGELABEL : 0 TransStat_NO_SUPPORTING_EQUALITIES : 282 TransStat_NO_SUPPORTING_DISEQUALITIES : 18 TransStat_NO_DISJUNCTIONS : 148 TransStat_MAX_NO_DISJUNCTIONS : 4 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.515747 RENAME_VARIABLES(MILLISECONDS) : 0.185984 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.489730 PROJECTAWAY(MILLISECONDS) : 0.049831 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.002214 DISJOIN(MILLISECONDS) : 0.581783 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.213578 ADD_EQUALITY(MILLISECONDS) : 0.024063 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.019072 #CONJOIN_DISJUNCTIVE : 194 #RENAME_VARIABLES : 296 #UNFREEZE : 0 #CONJOIN : 444 #PROJECTAWAY : 321 #ADD_WEAK_EQUALITY : 40 #DISJOIN : 1 #RENAME_VARIABLES_DISJUNCTIVE : 287 #ADD_EQUALITY : 300 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 16 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: UnsupportedOperationException: alternation not yet supported de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: UnsupportedOperationException: alternation not yet supported: de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.applyNonSddEliminations(ElimStorePlain.java:347) RESULT: Ultimate could not prove your program: Toolchain returned no result. Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_1_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-24_17-23-13-977.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_1_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-24_17-23-13-977.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_1_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-24_17-23-13-977.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_1_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-VPDomainBenchmark-1-2018-01-24_17-23-13-977.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_1_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-1-2018-01-24_17-23-13-977.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_1_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-VPDomainBenchmark-2-2018-01-24_17-23-13-977.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_1_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-2-2018-01-24_17-23-13-977.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_1_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-VPDomainBenchmark-3-2018-01-24_17-23-13-977.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_1_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-3-2018-01-24_17-23-13-977.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_1_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-VPDomainBenchmark-4-2018-01-24_17-23-13-977.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_1_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-4-2018-01-24_17-23-13-977.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_1_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-VPDomainBenchmark-5-2018-01-24_17-23-13-977.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_1_false-valid-memtrack_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-5-2018-01-24_17-23-13-977.csv Received shutdown request...