java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_1_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-24 17:26:23,949 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-24 17:26:23,951 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-24 17:26:23,964 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-24 17:26:23,964 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-24 17:26:23,965 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-24 17:26:23,966 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-24 17:26:23,967 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-24 17:26:23,968 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-24 17:26:23,969 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-24 17:26:23,970 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-24 17:26:23,970 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-24 17:26:23,970 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-24 17:26:23,971 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-24 17:26:23,972 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-24 17:26:23,975 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-24 17:26:23,977 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-24 17:26:23,979 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-24 17:26:23,980 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-24 17:26:23,981 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-24 17:26:23,983 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-24 17:26:23,984 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-24 17:26:23,984 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-24 17:26:23,985 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-24 17:26:23,986 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-24 17:26:23,987 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-24 17:26:23,987 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-24 17:26:23,988 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-24 17:26:23,988 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-24 17:26:23,988 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-24 17:26:23,989 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-24 17:26:23,989 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf [2018-01-24 17:26:23,999 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-24 17:26:24,000 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-24 17:26:24,000 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-24 17:26:24,001 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-24 17:26:24,001 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-24 17:26:24,001 INFO L133 SettingsManager]: * Deactivate Weak Equivalences=true [2018-01-24 17:26:24,001 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-24 17:26:24,001 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-24 17:26:24,002 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-24 17:26:24,002 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-24 17:26:24,002 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-24 17:26:24,003 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-24 17:26:24,003 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-24 17:26:24,003 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-24 17:26:24,003 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-24 17:26:24,003 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-24 17:26:24,004 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-24 17:26:24,004 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-24 17:26:24,004 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-24 17:26:24,004 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-24 17:26:24,004 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-24 17:26:24,005 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-24 17:26:24,005 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-24 17:26:24,005 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-24 17:26:24,005 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 17:26:24,005 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-24 17:26:24,006 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-24 17:26:24,006 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-24 17:26:24,006 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-24 17:26:24,006 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-24 17:26:24,006 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-24 17:26:24,006 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-24 17:26:24,007 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-24 17:26:24,007 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-24 17:26:24,008 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-24 17:26:24,008 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-24 17:26:24,043 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-24 17:26:24,056 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-24 17:26:24,060 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-24 17:26:24,061 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-24 17:26:24,062 INFO L276 PluginConnector]: CDTParser initialized [2018-01-24 17:26:24,063 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_1_true-valid-memsafety_true-termination.i [2018-01-24 17:26:24,259 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-24 17:26:24,265 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-24 17:26:24,266 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-24 17:26:24,266 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-24 17:26:24,273 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-24 17:26:24,274 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 05:26:24" (1/1) ... [2018-01-24 17:26:24,277 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5c336041 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:26:24, skipping insertion in model container [2018-01-24 17:26:24,277 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 05:26:24" (1/1) ... [2018-01-24 17:26:24,295 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 17:26:24,342 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 17:26:24,459 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 17:26:24,480 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 17:26:24,489 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:26:24 WrapperNode [2018-01-24 17:26:24,489 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-24 17:26:24,490 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-24 17:26:24,490 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-24 17:26:24,490 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-24 17:26:24,502 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:26:24" (1/1) ... [2018-01-24 17:26:24,502 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:26:24" (1/1) ... [2018-01-24 17:26:24,511 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:26:24" (1/1) ... [2018-01-24 17:26:24,511 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:26:24" (1/1) ... [2018-01-24 17:26:24,519 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:26:24" (1/1) ... [2018-01-24 17:26:24,523 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:26:24" (1/1) ... [2018-01-24 17:26:24,524 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:26:24" (1/1) ... [2018-01-24 17:26:24,526 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-24 17:26:24,527 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-24 17:26:24,527 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-24 17:26:24,527 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-24 17:26:24,527 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:26:24" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 17:26:24,572 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-24 17:26:24,572 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-24 17:26:24,572 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-01-24 17:26:24,572 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-01-24 17:26:24,572 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-01-24 17:26:24,572 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-01-24 17:26:24,573 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-01-24 17:26:24,573 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-01-24 17:26:24,573 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-01-24 17:26:24,573 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-01-24 17:26:24,573 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-01-24 17:26:24,573 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-01-24 17:26:24,574 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-01-24 17:26:24,574 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-01-24 17:26:24,574 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-01-24 17:26:24,574 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-01-24 17:26:24,574 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-24 17:26:24,574 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-24 17:26:24,575 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-24 17:26:24,575 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-24 17:26:24,575 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-24 17:26:24,575 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-24 17:26:24,575 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-24 17:26:24,576 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-24 17:26:24,576 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-24 17:26:24,576 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-24 17:26:24,576 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-24 17:26:24,576 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-24 17:26:24,576 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-24 17:26:24,577 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-24 17:26:24,577 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-01-24 17:26:24,577 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-01-24 17:26:24,577 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-01-24 17:26:24,577 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-01-24 17:26:24,577 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-01-24 17:26:24,577 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-01-24 17:26:24,578 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-01-24 17:26:24,578 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-01-24 17:26:24,578 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-01-24 17:26:24,578 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-01-24 17:26:24,578 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-01-24 17:26:24,578 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-01-24 17:26:24,578 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-01-24 17:26:24,579 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-01-24 17:26:24,579 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-24 17:26:24,579 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-24 17:26:24,579 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-24 17:26:24,795 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-01-24 17:26:24,940 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-24 17:26:24,941 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 05:26:24 BoogieIcfgContainer [2018-01-24 17:26:24,941 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-24 17:26:24,942 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-24 17:26:24,942 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-24 17:26:24,943 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-24 17:26:24,944 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.01 05:26:24" (1/3) ... [2018-01-24 17:26:24,944 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@15525c1f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 05:26:24, skipping insertion in model container [2018-01-24 17:26:24,945 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:26:24" (2/3) ... [2018-01-24 17:26:24,945 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@15525c1f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 05:26:24, skipping insertion in model container [2018-01-24 17:26:24,945 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 05:26:24" (3/3) ... [2018-01-24 17:26:24,946 INFO L105 eAbstractionObserver]: Analyzing ICFG memleaks_test22_1_true-valid-memsafety_true-termination.i [2018-01-24 17:26:24,952 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-24 17:26:24,958 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 19 error locations. [2018-01-24 17:26:25,003 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-24 17:26:25,003 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-24 17:26:25,003 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-24 17:26:25,003 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-24 17:26:25,003 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-24 17:26:25,004 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-24 17:26:25,004 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-24 17:26:25,004 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-24 17:26:25,005 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-24 17:26:25,024 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states. [2018-01-24 17:26:25,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-24 17:26:25,029 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:26:25,030 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:26:25,030 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:26:25,034 INFO L82 PathProgramCache]: Analyzing trace with hash -401333144, now seen corresponding path program 1 times [2018-01-24 17:26:25,036 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:26:25,082 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:25,082 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:25,082 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:25,082 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:26:25,128 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:25,138 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:26:25,276 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:25,279 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:26:25,279 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 17:26:25,279 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:26:25,282 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 17:26:25,359 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 17:26:25,360 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:26:25,363 INFO L87 Difference]: Start difference. First operand 118 states. Second operand 5 states. [2018-01-24 17:26:25,449 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:26:25,449 INFO L93 Difference]: Finished difference Result 224 states and 237 transitions. [2018-01-24 17:26:25,450 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 17:26:25,451 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-01-24 17:26:25,452 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:26:25,466 INFO L225 Difference]: With dead ends: 224 [2018-01-24 17:26:25,466 INFO L226 Difference]: Without dead ends: 121 [2018-01-24 17:26:25,470 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:26:25,488 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-01-24 17:26:25,508 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 119. [2018-01-24 17:26:25,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-01-24 17:26:25,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 126 transitions. [2018-01-24 17:26:25,512 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 126 transitions. Word has length 17 [2018-01-24 17:26:25,513 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:26:25,513 INFO L432 AbstractCegarLoop]: Abstraction has 119 states and 126 transitions. [2018-01-24 17:26:25,513 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 17:26:25,513 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 126 transitions. [2018-01-24 17:26:25,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 17:26:25,514 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:26:25,514 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:26:25,514 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:26:25,514 INFO L82 PathProgramCache]: Analyzing trace with hash 1306365930, now seen corresponding path program 1 times [2018-01-24 17:26:25,514 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:26:25,516 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:25,516 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:25,516 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:25,516 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:26:25,537 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:25,538 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:26:25,612 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:25,612 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:26:25,612 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 17:26:25,613 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:26:25,614 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 17:26:25,615 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 17:26:25,615 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 17:26:25,615 INFO L87 Difference]: Start difference. First operand 119 states and 126 transitions. Second operand 6 states. [2018-01-24 17:26:25,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:26:25,780 INFO L93 Difference]: Finished difference Result 121 states and 128 transitions. [2018-01-24 17:26:25,780 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 17:26:25,780 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-01-24 17:26:25,781 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:26:25,782 INFO L225 Difference]: With dead ends: 121 [2018-01-24 17:26:25,783 INFO L226 Difference]: Without dead ends: 120 [2018-01-24 17:26:25,784 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 17:26:25,784 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-01-24 17:26:25,791 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 118. [2018-01-24 17:26:25,791 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-01-24 17:26:25,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 125 transitions. [2018-01-24 17:26:25,793 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 125 transitions. Word has length 19 [2018-01-24 17:26:25,793 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:26:25,793 INFO L432 AbstractCegarLoop]: Abstraction has 118 states and 125 transitions. [2018-01-24 17:26:25,793 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 17:26:25,793 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 125 transitions. [2018-01-24 17:26:25,794 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 17:26:25,794 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:26:25,794 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:26:25,794 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:26:25,794 INFO L82 PathProgramCache]: Analyzing trace with hash 1306365931, now seen corresponding path program 1 times [2018-01-24 17:26:25,794 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:26:25,795 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:25,795 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:25,795 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:25,795 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:26:25,814 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:25,815 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:26:26,130 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:26,130 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:26:26,160 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 17:26:26,160 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:26:26,160 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 17:26:26,161 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 17:26:26,161 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 17:26:26,161 INFO L87 Difference]: Start difference. First operand 118 states and 125 transitions. Second operand 7 states. [2018-01-24 17:26:26,332 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:26:26,332 INFO L93 Difference]: Finished difference Result 120 states and 127 transitions. [2018-01-24 17:26:26,332 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 17:26:26,332 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-01-24 17:26:26,333 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:26:26,334 INFO L225 Difference]: With dead ends: 120 [2018-01-24 17:26:26,335 INFO L226 Difference]: Without dead ends: 119 [2018-01-24 17:26:26,335 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-01-24 17:26:26,336 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2018-01-24 17:26:26,345 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 117. [2018-01-24 17:26:26,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-01-24 17:26:26,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 124 transitions. [2018-01-24 17:26:26,348 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 124 transitions. Word has length 19 [2018-01-24 17:26:26,348 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:26:26,348 INFO L432 AbstractCegarLoop]: Abstraction has 117 states and 124 transitions. [2018-01-24 17:26:26,348 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 17:26:26,348 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 124 transitions. [2018-01-24 17:26:26,349 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-24 17:26:26,350 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:26:26,350 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:26:26,350 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:26:26,350 INFO L82 PathProgramCache]: Analyzing trace with hash -860603530, now seen corresponding path program 1 times [2018-01-24 17:26:26,350 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:26:26,351 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:26,352 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:26,352 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:26,352 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:26:26,374 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:26,376 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:26:26,488 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:26,488 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:26:26,488 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-24 17:26:26,488 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:26:26,488 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 17:26:26,489 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 17:26:26,489 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 17:26:26,489 INFO L87 Difference]: Start difference. First operand 117 states and 124 transitions. Second operand 7 states. [2018-01-24 17:26:26,547 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:26:26,547 INFO L93 Difference]: Finished difference Result 183 states and 192 transitions. [2018-01-24 17:26:26,547 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 17:26:26,548 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 29 [2018-01-24 17:26:26,548 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:26:26,550 INFO L225 Difference]: With dead ends: 183 [2018-01-24 17:26:26,550 INFO L226 Difference]: Without dead ends: 129 [2018-01-24 17:26:26,551 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-01-24 17:26:26,551 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-01-24 17:26:26,561 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 125. [2018-01-24 17:26:26,562 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 125 states. [2018-01-24 17:26:26,563 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 125 states to 125 states and 132 transitions. [2018-01-24 17:26:26,563 INFO L78 Accepts]: Start accepts. Automaton has 125 states and 132 transitions. Word has length 29 [2018-01-24 17:26:26,564 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:26:26,564 INFO L432 AbstractCegarLoop]: Abstraction has 125 states and 132 transitions. [2018-01-24 17:26:26,564 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 17:26:26,564 INFO L276 IsEmpty]: Start isEmpty. Operand 125 states and 132 transitions. [2018-01-24 17:26:26,565 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-24 17:26:26,565 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:26:26,565 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:26:26,566 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:26:26,566 INFO L82 PathProgramCache]: Analyzing trace with hash 23284980, now seen corresponding path program 1 times [2018-01-24 17:26:26,566 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:26:26,567 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:26,567 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:26,568 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:26,568 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:26:26,581 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:26,582 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:26:26,621 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:26,622 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:26:26,622 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 17:26:26,622 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:26:26,623 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 17:26:26,623 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 17:26:26,623 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 17:26:26,624 INFO L87 Difference]: Start difference. First operand 125 states and 132 transitions. Second operand 3 states. [2018-01-24 17:26:26,742 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:26:26,742 INFO L93 Difference]: Finished difference Result 141 states and 148 transitions. [2018-01-24 17:26:26,743 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 17:26:26,743 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 27 [2018-01-24 17:26:26,743 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:26:26,744 INFO L225 Difference]: With dead ends: 141 [2018-01-24 17:26:26,744 INFO L226 Difference]: Without dead ends: 129 [2018-01-24 17:26:26,745 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 17:26:26,745 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-01-24 17:26:26,758 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 121. [2018-01-24 17:26:26,758 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121 states. [2018-01-24 17:26:26,759 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 127 transitions. [2018-01-24 17:26:26,759 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 127 transitions. Word has length 27 [2018-01-24 17:26:26,759 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:26:26,759 INFO L432 AbstractCegarLoop]: Abstraction has 121 states and 127 transitions. [2018-01-24 17:26:26,760 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 17:26:26,760 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 127 transitions. [2018-01-24 17:26:26,760 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-24 17:26:26,760 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:26:26,760 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:26:26,761 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:26:26,761 INFO L82 PathProgramCache]: Analyzing trace with hash -1295663626, now seen corresponding path program 1 times [2018-01-24 17:26:26,761 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:26:26,762 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:26,762 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:26,762 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:26,762 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:26:26,771 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:26,772 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:26:26,809 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:26,809 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:26:26,810 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 17:26:26,810 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:26:26,810 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 17:26:26,810 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 17:26:26,810 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 17:26:26,810 INFO L87 Difference]: Start difference. First operand 121 states and 127 transitions. Second operand 6 states. [2018-01-24 17:26:26,837 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:26:26,837 INFO L93 Difference]: Finished difference Result 125 states and 130 transitions. [2018-01-24 17:26:26,839 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 17:26:26,839 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 29 [2018-01-24 17:26:26,839 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:26:26,840 INFO L225 Difference]: With dead ends: 125 [2018-01-24 17:26:26,840 INFO L226 Difference]: Without dead ends: 113 [2018-01-24 17:26:26,841 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 17:26:26,841 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-01-24 17:26:26,846 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2018-01-24 17:26:26,846 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-01-24 17:26:26,846 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 118 transitions. [2018-01-24 17:26:26,847 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 118 transitions. Word has length 29 [2018-01-24 17:26:26,847 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:26:26,847 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 118 transitions. [2018-01-24 17:26:26,847 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 17:26:26,847 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 118 transitions. [2018-01-24 17:26:26,848 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 17:26:26,848 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:26:26,848 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:26:26,848 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:26:26,848 INFO L82 PathProgramCache]: Analyzing trace with hash 522747174, now seen corresponding path program 1 times [2018-01-24 17:26:26,848 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:26:26,849 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:26,849 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:26,849 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:26,849 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:26:26,859 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:26,860 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:26:26,893 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:26,894 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:26:26,894 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 17:26:26,894 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:26:26,895 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 17:26:26,895 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 17:26:26,895 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 17:26:26,895 INFO L87 Difference]: Start difference. First operand 113 states and 118 transitions. Second operand 4 states. [2018-01-24 17:26:26,919 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:26:26,919 INFO L93 Difference]: Finished difference Result 205 states and 215 transitions. [2018-01-24 17:26:26,921 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 17:26:26,921 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2018-01-24 17:26:26,921 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:26:26,922 INFO L225 Difference]: With dead ends: 205 [2018-01-24 17:26:26,922 INFO L226 Difference]: Without dead ends: 114 [2018-01-24 17:26:26,923 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:26:26,924 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-01-24 17:26:26,931 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 114. [2018-01-24 17:26:26,931 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-01-24 17:26:26,932 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 119 transitions. [2018-01-24 17:26:26,932 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 119 transitions. Word has length 34 [2018-01-24 17:26:26,933 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:26:26,933 INFO L432 AbstractCegarLoop]: Abstraction has 114 states and 119 transitions. [2018-01-24 17:26:26,933 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 17:26:26,933 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 119 transitions. [2018-01-24 17:26:26,934 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-24 17:26:26,934 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:26:26,934 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:26:26,934 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:26:26,934 INFO L82 PathProgramCache]: Analyzing trace with hash -1305776369, now seen corresponding path program 1 times [2018-01-24 17:26:26,935 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:26:26,936 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:26,936 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:26,936 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:26,936 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:26:26,951 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:26,952 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:26:26,997 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:26,997 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:26:26,997 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:26:26,998 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 36 with the following transitions: [2018-01-24 17:26:27,001 INFO L201 CegarAbsIntRunner]: [0], [2], [6], [10], [27], [32], [48], [53], [57], [61], [64], [66], [67], [71], [73], [74], [114], [117], [118], [119], [121], [122], [123], [131], [132], [133], [134], [135], [137], [141], [145], [149], [161], [162], [163] [2018-01-24 17:26:27,064 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:26:27,065 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:26:27,271 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:26:27,272 INFO L268 AbstractInterpreter]: Visited 35 different actions 39 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 21 variables. [2018-01-24 17:26:27,301 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:26:27,302 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:26:27,302 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:26:27,309 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:27,309 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:26:27,350 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:27,358 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:26:27,387 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:27,387 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:26:27,450 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:27,480 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:26:27,480 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:26:27,484 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:27,484 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:26:27,528 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:27,534 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:26:27,540 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:27,540 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:26:27,639 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:27,640 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:26:27,641 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-24 17:26:27,641 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:26:27,641 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 17:26:27,641 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 17:26:27,642 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-01-24 17:26:27,642 INFO L87 Difference]: Start difference. First operand 114 states and 119 transitions. Second operand 6 states. [2018-01-24 17:26:27,673 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:26:27,673 INFO L93 Difference]: Finished difference Result 206 states and 216 transitions. [2018-01-24 17:26:27,673 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 17:26:27,673 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-01-24 17:26:27,674 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:26:27,675 INFO L225 Difference]: With dead ends: 206 [2018-01-24 17:26:27,675 INFO L226 Difference]: Without dead ends: 115 [2018-01-24 17:26:27,676 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 134 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:26:27,676 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-01-24 17:26:27,684 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 115. [2018-01-24 17:26:27,684 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-01-24 17:26:27,685 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 120 transitions. [2018-01-24 17:26:27,686 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 120 transitions. Word has length 35 [2018-01-24 17:26:27,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:26:27,686 INFO L432 AbstractCegarLoop]: Abstraction has 115 states and 120 transitions. [2018-01-24 17:26:27,686 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 17:26:27,686 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 120 transitions. [2018-01-24 17:26:27,687 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 17:26:27,687 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:26:27,687 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:26:27,688 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:26:27,688 INFO L82 PathProgramCache]: Analyzing trace with hash 2139535942, now seen corresponding path program 2 times [2018-01-24 17:26:27,688 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:26:27,689 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:27,689 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:27,690 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:27,690 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:26:27,707 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:27,708 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:26:27,776 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:27,776 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:26:27,776 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:26:27,777 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:26:27,777 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:26:27,777 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:26:27,777 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:26:27,786 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:26:27,786 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:26:27,816 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:26:27,820 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:26:27,825 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:26:27,853 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 17:26:27,855 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:26:27,887 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 17:26:27,888 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:26:27,903 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 17:26:27,903 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 17:26:28,469 WARN L146 SmtUtils]: Spent 127ms on a formula simplification. DAG size of input: 45 DAG size of output 17 [2018-01-24 17:26:28,739 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 17:26:28,739 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:26:29,122 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 17:26:29,142 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 17:26:29,142 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14, 13] imperfect sequences [6] total 31 [2018-01-24 17:26:29,142 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:26:29,143 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 17:26:29,143 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 17:26:29,143 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=840, Unknown=0, NotChecked=0, Total=930 [2018-01-24 17:26:29,143 INFO L87 Difference]: Start difference. First operand 115 states and 120 transitions. Second operand 15 states. [2018-01-24 17:26:31,126 WARN L143 SmtUtils]: Spent 1936ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-24 17:26:31,801 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:26:31,801 INFO L93 Difference]: Finished difference Result 115 states and 120 transitions. [2018-01-24 17:26:31,801 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-24 17:26:31,802 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 36 [2018-01-24 17:26:31,802 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:26:31,803 INFO L225 Difference]: With dead ends: 115 [2018-01-24 17:26:31,803 INFO L226 Difference]: Without dead ends: 114 [2018-01-24 17:26:31,804 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 251 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=118, Invalid=1072, Unknown=0, NotChecked=0, Total=1190 [2018-01-24 17:26:31,804 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-01-24 17:26:31,813 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 114. [2018-01-24 17:26:31,814 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-01-24 17:26:31,814 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 119 transitions. [2018-01-24 17:26:31,814 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 119 transitions. Word has length 36 [2018-01-24 17:26:31,815 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:26:31,815 INFO L432 AbstractCegarLoop]: Abstraction has 114 states and 119 transitions. [2018-01-24 17:26:31,815 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 17:26:31,815 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 119 transitions. [2018-01-24 17:26:31,816 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 17:26:31,816 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:26:31,816 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:26:31,817 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:26:31,817 INFO L82 PathProgramCache]: Analyzing trace with hash 2139535941, now seen corresponding path program 1 times [2018-01-24 17:26:31,817 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:26:31,818 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:31,819 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:26:31,819 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:31,819 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:26:31,832 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:31,833 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:26:32,021 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 17:26:32,022 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:26:32,022 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 17:26:32,022 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:26:32,022 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 17:26:32,023 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 17:26:32,023 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:26:32,023 INFO L87 Difference]: Start difference. First operand 114 states and 119 transitions. Second operand 10 states. [2018-01-24 17:26:32,321 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:26:32,321 INFO L93 Difference]: Finished difference Result 114 states and 119 transitions. [2018-01-24 17:26:32,321 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 17:26:32,321 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 36 [2018-01-24 17:26:32,322 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:26:32,322 INFO L225 Difference]: With dead ends: 114 [2018-01-24 17:26:32,322 INFO L226 Difference]: Without dead ends: 113 [2018-01-24 17:26:32,323 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:26:32,323 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-01-24 17:26:32,332 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2018-01-24 17:26:32,332 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-01-24 17:26:32,333 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 118 transitions. [2018-01-24 17:26:32,333 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 118 transitions. Word has length 36 [2018-01-24 17:26:32,333 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:26:32,333 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 118 transitions. [2018-01-24 17:26:32,333 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 17:26:32,333 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 118 transitions. [2018-01-24 17:26:32,334 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-24 17:26:32,334 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:26:32,335 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:26:32,335 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:26:32,335 INFO L82 PathProgramCache]: Analyzing trace with hash 562133952, now seen corresponding path program 1 times [2018-01-24 17:26:32,335 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:26:32,336 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:32,336 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:32,336 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:32,337 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:26:32,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:32,350 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:26:32,469 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 17:26:32,469 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:26:32,469 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 17:26:32,469 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:26:32,470 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 17:26:32,470 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 17:26:32,470 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:26:32,470 INFO L87 Difference]: Start difference. First operand 113 states and 118 transitions. Second operand 10 states. [2018-01-24 17:26:32,657 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:26:32,658 INFO L93 Difference]: Finished difference Result 113 states and 118 transitions. [2018-01-24 17:26:32,658 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 17:26:32,658 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 41 [2018-01-24 17:26:32,658 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:26:32,659 INFO L225 Difference]: With dead ends: 113 [2018-01-24 17:26:32,659 INFO L226 Difference]: Without dead ends: 111 [2018-01-24 17:26:32,659 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:26:32,659 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-01-24 17:26:32,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 111. [2018-01-24 17:26:32,672 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-01-24 17:26:32,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 116 transitions. [2018-01-24 17:26:32,673 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 116 transitions. Word has length 41 [2018-01-24 17:26:32,673 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:26:32,673 INFO L432 AbstractCegarLoop]: Abstraction has 111 states and 116 transitions. [2018-01-24 17:26:32,673 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 17:26:32,673 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 116 transitions. [2018-01-24 17:26:32,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-24 17:26:32,674 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:26:32,674 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:26:32,674 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:26:32,675 INFO L82 PathProgramCache]: Analyzing trace with hash 562133953, now seen corresponding path program 1 times [2018-01-24 17:26:32,675 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:26:32,675 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:32,676 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:32,676 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:32,676 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:26:32,691 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:32,692 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:26:32,749 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:32,749 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:26:32,749 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:26:32,749 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 42 with the following transitions: [2018-01-24 17:26:32,750 INFO L201 CegarAbsIntRunner]: [0], [2], [6], [10], [27], [32], [48], [53], [57], [61], [62], [65], [66], [67], [71], [73], [74], [106], [109], [114], [117], [118], [119], [121], [122], [123], [131], [132], [133], [134], [135], [137], [141], [145], [149], [150], [151], [161], [162], [163] [2018-01-24 17:26:32,751 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:26:32,751 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:26:32,884 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:26:32,884 INFO L268 AbstractInterpreter]: Visited 40 different actions 44 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 21 variables. [2018-01-24 17:26:32,897 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:26:32,897 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:26:32,897 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:26:32,909 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:32,909 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:26:32,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:32,945 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:26:32,957 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:32,958 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:26:33,070 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:33,100 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:26:33,101 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:26:33,105 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:33,105 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:26:33,149 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:33,154 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:26:33,157 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:33,158 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:26:33,200 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:33,202 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:26:33,202 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-24 17:26:33,203 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:26:33,203 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 17:26:33,203 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 17:26:33,203 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-01-24 17:26:33,204 INFO L87 Difference]: Start difference. First operand 111 states and 116 transitions. Second operand 7 states. [2018-01-24 17:26:33,240 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:26:33,241 INFO L93 Difference]: Finished difference Result 199 states and 209 transitions. [2018-01-24 17:26:33,241 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 17:26:33,241 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 41 [2018-01-24 17:26:33,241 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:26:33,242 INFO L225 Difference]: With dead ends: 199 [2018-01-24 17:26:33,242 INFO L226 Difference]: Without dead ends: 112 [2018-01-24 17:26:33,243 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 157 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=77, Unknown=0, NotChecked=0, Total=132 [2018-01-24 17:26:33,243 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2018-01-24 17:26:33,254 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2018-01-24 17:26:33,255 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-01-24 17:26:33,256 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 117 transitions. [2018-01-24 17:26:33,256 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 117 transitions. Word has length 41 [2018-01-24 17:26:33,256 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:26:33,256 INFO L432 AbstractCegarLoop]: Abstraction has 112 states and 117 transitions. [2018-01-24 17:26:33,256 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 17:26:33,256 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 117 transitions. [2018-01-24 17:26:33,257 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-24 17:26:33,257 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:26:33,257 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:26:33,257 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:26:33,258 INFO L82 PathProgramCache]: Analyzing trace with hash 258949560, now seen corresponding path program 2 times [2018-01-24 17:26:33,258 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:26:33,259 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:33,259 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:33,259 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:33,259 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:26:33,274 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:33,275 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:26:33,321 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:33,321 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:26:33,321 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:26:33,322 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:26:33,322 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:26:33,322 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:26:33,322 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:26:33,330 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:26:33,330 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:26:33,357 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:26:33,361 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:26:33,365 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:26:33,370 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 17:26:33,371 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:26:33,388 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 17:26:33,389 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:26:33,402 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 17:26:33,403 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 17:26:35,650 WARN L143 SmtUtils]: Spent 2037ms on a formula simplification that was a NOOP. DAG size: 27 [2018-01-24 17:26:35,964 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 17:26:35,964 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:26:36,330 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 17:26:36,353 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 17:26:36,353 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15, 13] imperfect sequences [7] total 33 [2018-01-24 17:26:36,353 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:26:36,354 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-24 17:26:36,354 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-24 17:26:36,355 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=951, Unknown=0, NotChecked=0, Total=1056 [2018-01-24 17:26:36,355 INFO L87 Difference]: Start difference. First operand 112 states and 117 transitions. Second operand 16 states. [2018-01-24 17:26:36,992 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:26:36,992 INFO L93 Difference]: Finished difference Result 112 states and 117 transitions. [2018-01-24 17:26:37,038 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-24 17:26:37,038 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 42 [2018-01-24 17:26:37,038 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:26:37,039 INFO L225 Difference]: With dead ends: 112 [2018-01-24 17:26:37,039 INFO L226 Difference]: Without dead ends: 110 [2018-01-24 17:26:37,040 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 57 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 317 ImplicationChecksByTransitivity, 3.0s TimeCoverageRelationStatistics Valid=136, Invalid=1196, Unknown=0, NotChecked=0, Total=1332 [2018-01-24 17:26:37,040 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2018-01-24 17:26:37,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 110. [2018-01-24 17:26:37,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110 states. [2018-01-24 17:26:37,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 115 transitions. [2018-01-24 17:26:37,054 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 115 transitions. Word has length 42 [2018-01-24 17:26:37,055 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:26:37,055 INFO L432 AbstractCegarLoop]: Abstraction has 110 states and 115 transitions. [2018-01-24 17:26:37,055 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-24 17:26:37,055 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 115 transitions. [2018-01-24 17:26:37,056 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-24 17:26:37,056 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:26:37,056 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:26:37,056 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:26:37,056 INFO L82 PathProgramCache]: Analyzing trace with hash -916811563, now seen corresponding path program 1 times [2018-01-24 17:26:37,057 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:26:37,058 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:37,058 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:26:37,058 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:37,058 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:26:37,070 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:37,071 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:26:37,134 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 17:26:37,135 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:26:37,135 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-24 17:26:37,135 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:26:37,135 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 17:26:37,135 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 17:26:37,135 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-01-24 17:26:37,135 INFO L87 Difference]: Start difference. First operand 110 states and 115 transitions. Second operand 8 states. [2018-01-24 17:26:37,174 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:26:37,175 INFO L93 Difference]: Finished difference Result 173 states and 180 transitions. [2018-01-24 17:26:37,175 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 17:26:37,175 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 47 [2018-01-24 17:26:37,175 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:26:37,176 INFO L225 Difference]: With dead ends: 173 [2018-01-24 17:26:37,176 INFO L226 Difference]: Without dead ends: 110 [2018-01-24 17:26:37,176 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:26:37,176 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2018-01-24 17:26:37,186 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 110. [2018-01-24 17:26:37,186 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110 states. [2018-01-24 17:26:37,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 114 transitions. [2018-01-24 17:26:37,187 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 114 transitions. Word has length 47 [2018-01-24 17:26:37,187 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:26:37,187 INFO L432 AbstractCegarLoop]: Abstraction has 110 states and 114 transitions. [2018-01-24 17:26:37,187 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 17:26:37,187 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 114 transitions. [2018-01-24 17:26:37,188 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-24 17:26:37,188 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:26:37,188 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:26:37,188 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:26:37,188 INFO L82 PathProgramCache]: Analyzing trace with hash -396278647, now seen corresponding path program 1 times [2018-01-24 17:26:37,188 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:26:37,189 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:37,189 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:37,189 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:37,189 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:26:37,197 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:37,198 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:26:37,252 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 17:26:37,252 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:26:37,252 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-01-24 17:26:37,252 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:26:37,252 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 17:26:37,253 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 17:26:37,253 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:26:37,253 INFO L87 Difference]: Start difference. First operand 110 states and 114 transitions. Second operand 10 states. [2018-01-24 17:26:37,369 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:26:37,369 INFO L93 Difference]: Finished difference Result 175 states and 181 transitions. [2018-01-24 17:26:37,370 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 17:26:37,370 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 52 [2018-01-24 17:26:37,370 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:26:37,371 INFO L225 Difference]: With dead ends: 175 [2018-01-24 17:26:37,371 INFO L226 Difference]: Without dead ends: 110 [2018-01-24 17:26:37,371 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:26:37,372 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2018-01-24 17:26:37,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 110. [2018-01-24 17:26:37,383 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110 states. [2018-01-24 17:26:37,383 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 113 transitions. [2018-01-24 17:26:37,383 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 113 transitions. Word has length 52 [2018-01-24 17:26:37,384 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:26:37,384 INFO L432 AbstractCegarLoop]: Abstraction has 110 states and 113 transitions. [2018-01-24 17:26:37,384 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 17:26:37,384 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 113 transitions. [2018-01-24 17:26:37,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-01-24 17:26:37,384 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:26:37,384 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:26:37,384 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:26:37,385 INFO L82 PathProgramCache]: Analyzing trace with hash 401221152, now seen corresponding path program 1 times [2018-01-24 17:26:37,385 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:26:37,385 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:37,386 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:37,386 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:37,386 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:26:37,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:37,401 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:26:37,621 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 17:26:37,622 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:26:37,622 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2018-01-24 17:26:37,622 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:26:37,622 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-24 17:26:37,622 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-24 17:26:37,622 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=379, Unknown=0, NotChecked=0, Total=420 [2018-01-24 17:26:37,623 INFO L87 Difference]: Start difference. First operand 110 states and 113 transitions. Second operand 21 states. [2018-01-24 17:26:38,019 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:26:38,020 INFO L93 Difference]: Finished difference Result 119 states and 122 transitions. [2018-01-24 17:26:38,020 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-24 17:26:38,020 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 63 [2018-01-24 17:26:38,020 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:26:38,021 INFO L225 Difference]: With dead ends: 119 [2018-01-24 17:26:38,021 INFO L226 Difference]: Without dead ends: 117 [2018-01-24 17:26:38,022 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=69, Invalid=687, Unknown=0, NotChecked=0, Total=756 [2018-01-24 17:26:38,022 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-01-24 17:26:38,032 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 108. [2018-01-24 17:26:38,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-01-24 17:26:38,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 111 transitions. [2018-01-24 17:26:38,034 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 111 transitions. Word has length 63 [2018-01-24 17:26:38,034 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:26:38,034 INFO L432 AbstractCegarLoop]: Abstraction has 108 states and 111 transitions. [2018-01-24 17:26:38,035 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-24 17:26:38,035 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 111 transitions. [2018-01-24 17:26:38,035 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-01-24 17:26:38,035 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:26:38,036 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:26:38,036 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:26:38,036 INFO L82 PathProgramCache]: Analyzing trace with hash 401221153, now seen corresponding path program 1 times [2018-01-24 17:26:38,036 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:26:38,037 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:38,037 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:38,037 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:38,038 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:26:38,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:38,058 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:26:38,118 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:38,118 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:26:38,118 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:26:38,118 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 64 with the following transitions: [2018-01-24 17:26:38,119 INFO L201 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [17], [20], [27], [32], [34], [35], [38], [48], [50], [53], [57], [60], [61], [62], [65], [66], [67], [71], [73], [74], [75], [106], [107], [110], [113], [114], [117], [118], [119], [121], [122], [123], [124], [131], [132], [133], [134], [135], [136], [137], [139], [141], [142], [145], [146], [147], [149], [150], [151], [152], [153], [159], [161], [162], [163] [2018-01-24 17:26:38,120 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:26:38,120 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:26:38,278 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:26:38,279 INFO L268 AbstractInterpreter]: Visited 61 different actions 65 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 26 variables. [2018-01-24 17:26:38,301 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:26:38,301 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:26:38,301 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:26:38,310 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:38,311 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:26:38,347 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:38,349 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:26:38,365 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:38,366 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:26:38,529 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:38,549 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:26:38,549 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:26:38,552 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:38,552 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:26:38,616 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:38,622 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:26:38,626 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:38,626 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:26:38,685 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:38,687 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:26:38,687 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-24 17:26:38,687 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:26:38,687 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 17:26:38,688 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 17:26:38,688 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:26:38,688 INFO L87 Difference]: Start difference. First operand 108 states and 111 transitions. Second operand 8 states. [2018-01-24 17:26:38,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:26:38,715 INFO L93 Difference]: Finished difference Result 192 states and 198 transitions. [2018-01-24 17:26:38,715 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 17:26:38,715 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 63 [2018-01-24 17:26:38,715 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:26:38,716 INFO L225 Difference]: With dead ends: 192 [2018-01-24 17:26:38,716 INFO L226 Difference]: Without dead ends: 109 [2018-01-24 17:26:38,716 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 258 GetRequests, 244 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=77, Invalid=105, Unknown=0, NotChecked=0, Total=182 [2018-01-24 17:26:38,717 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states. [2018-01-24 17:26:38,727 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 109. [2018-01-24 17:26:38,727 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 109 states. [2018-01-24 17:26:38,727 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109 states to 109 states and 112 transitions. [2018-01-24 17:26:38,728 INFO L78 Accepts]: Start accepts. Automaton has 109 states and 112 transitions. Word has length 63 [2018-01-24 17:26:38,728 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:26:38,728 INFO L432 AbstractCegarLoop]: Abstraction has 109 states and 112 transitions. [2018-01-24 17:26:38,728 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 17:26:38,728 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 112 transitions. [2018-01-24 17:26:38,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-01-24 17:26:38,728 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:26:38,729 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:26:38,729 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:26:38,729 INFO L82 PathProgramCache]: Analyzing trace with hash -421459752, now seen corresponding path program 2 times [2018-01-24 17:26:38,729 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:26:38,730 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:38,730 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:38,730 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:38,730 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:26:38,743 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:38,745 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:26:38,850 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:38,850 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:26:38,850 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:26:38,850 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:26:38,850 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:26:38,850 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:26:38,850 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:26:38,856 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:26:38,857 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:26:38,885 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:26:38,889 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:26:38,893 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:26:38,899 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 17:26:38,900 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:26:38,915 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 17:26:38,915 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:26:38,928 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 17:26:38,928 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 17:26:41,134 WARN L143 SmtUtils]: Spent 2022ms on a formula simplification that was a NOOP. DAG size: 27 [2018-01-24 17:26:41,655 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 17:26:41,655 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:26:44,396 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 17:26:44,416 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 17:26:44,416 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20, 18] imperfect sequences [8] total 44 [2018-01-24 17:26:44,416 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:26:44,417 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-24 17:26:44,417 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-24 17:26:44,417 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=146, Invalid=1745, Unknown=1, NotChecked=0, Total=1892 [2018-01-24 17:26:44,418 INFO L87 Difference]: Start difference. First operand 109 states and 112 transitions. Second operand 21 states. [2018-01-24 17:26:46,493 WARN L143 SmtUtils]: Spent 2031ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-24 17:26:47,291 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:26:47,292 INFO L93 Difference]: Finished difference Result 109 states and 112 transitions. [2018-01-24 17:26:47,292 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-24 17:26:47,292 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 64 [2018-01-24 17:26:47,293 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:26:47,293 INFO L225 Difference]: With dead ends: 109 [2018-01-24 17:26:47,293 INFO L226 Difference]: Without dead ends: 107 [2018-01-24 17:26:47,294 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 91 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 628 ImplicationChecksByTransitivity, 7.5s TimeCoverageRelationStatistics Valid=195, Invalid=2254, Unknown=1, NotChecked=0, Total=2450 [2018-01-24 17:26:47,294 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2018-01-24 17:26:47,304 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 107. [2018-01-24 17:26:47,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107 states. [2018-01-24 17:26:47,305 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 110 transitions. [2018-01-24 17:26:47,305 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 110 transitions. Word has length 64 [2018-01-24 17:26:47,305 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:26:47,305 INFO L432 AbstractCegarLoop]: Abstraction has 107 states and 110 transitions. [2018-01-24 17:26:47,306 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-24 17:26:47,306 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 110 transitions. [2018-01-24 17:26:47,306 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-01-24 17:26:47,306 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:26:47,306 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:26:47,307 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:26:47,307 INFO L82 PathProgramCache]: Analyzing trace with hash -713687403, now seen corresponding path program 1 times [2018-01-24 17:26:47,307 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:26:47,308 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:47,308 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:26:47,308 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:47,308 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:26:47,318 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:47,319 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:26:47,457 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 17:26:47,457 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:26:47,457 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-24 17:26:47,457 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:26:47,458 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-24 17:26:47,458 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-24 17:26:47,458 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-01-24 17:26:47,458 INFO L87 Difference]: Start difference. First operand 107 states and 110 transitions. Second operand 11 states. [2018-01-24 17:26:47,551 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:26:47,552 INFO L93 Difference]: Finished difference Result 113 states and 115 transitions. [2018-01-24 17:26:47,552 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 17:26:47,552 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 62 [2018-01-24 17:26:47,552 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:26:47,553 INFO L225 Difference]: With dead ends: 113 [2018-01-24 17:26:47,553 INFO L226 Difference]: Without dead ends: 107 [2018-01-24 17:26:47,553 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=31, Invalid=151, Unknown=0, NotChecked=0, Total=182 [2018-01-24 17:26:47,553 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2018-01-24 17:26:47,569 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 107. [2018-01-24 17:26:47,569 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107 states. [2018-01-24 17:26:47,570 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 109 transitions. [2018-01-24 17:26:47,570 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 109 transitions. Word has length 62 [2018-01-24 17:26:47,570 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:26:47,570 INFO L432 AbstractCegarLoop]: Abstraction has 107 states and 109 transitions. [2018-01-24 17:26:47,570 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-24 17:26:47,570 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 109 transitions. [2018-01-24 17:26:47,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-01-24 17:26:47,571 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:26:47,571 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:26:47,571 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:26:47,571 INFO L82 PathProgramCache]: Analyzing trace with hash -1331716926, now seen corresponding path program 1 times [2018-01-24 17:26:47,571 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:26:47,572 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:47,572 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:47,572 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:47,572 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:26:47,591 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:47,592 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:26:47,985 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 17:26:47,986 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:26:47,986 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [23] imperfect sequences [] total 23 [2018-01-24 17:26:47,986 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:26:47,986 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-24 17:26:47,986 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-24 17:26:47,987 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=507, Unknown=0, NotChecked=0, Total=552 [2018-01-24 17:26:47,987 INFO L87 Difference]: Start difference. First operand 107 states and 109 transitions. Second operand 24 states. [2018-01-24 17:26:48,444 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:26:48,444 INFO L93 Difference]: Finished difference Result 112 states and 114 transitions. [2018-01-24 17:26:48,445 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-24 17:26:48,445 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 78 [2018-01-24 17:26:48,445 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:26:48,445 INFO L225 Difference]: With dead ends: 112 [2018-01-24 17:26:48,446 INFO L226 Difference]: Without dead ends: 110 [2018-01-24 17:26:48,446 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=85, Invalid=1037, Unknown=0, NotChecked=0, Total=1122 [2018-01-24 17:26:48,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 110 states. [2018-01-24 17:26:48,459 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 110 to 105. [2018-01-24 17:26:48,459 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-01-24 17:26:48,460 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 107 transitions. [2018-01-24 17:26:48,460 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 107 transitions. Word has length 78 [2018-01-24 17:26:48,461 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:26:48,461 INFO L432 AbstractCegarLoop]: Abstraction has 105 states and 107 transitions. [2018-01-24 17:26:48,461 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-24 17:26:48,461 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 107 transitions. [2018-01-24 17:26:48,462 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-01-24 17:26:48,462 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:26:48,462 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:26:48,462 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:26:48,462 INFO L82 PathProgramCache]: Analyzing trace with hash -1331716925, now seen corresponding path program 1 times [2018-01-24 17:26:48,462 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:26:48,463 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:48,463 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:48,464 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:48,464 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:26:48,483 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:48,484 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:26:48,568 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:48,568 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:26:48,568 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:26:48,568 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 79 with the following transitions: [2018-01-24 17:26:48,569 INFO L201 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [17], [20], [27], [32], [34], [35], [36], [39], [40], [43], [44], [45], [48], [50], [53], [57], [60], [61], [62], [65], [66], [67], [71], [73], [74], [75], [77], [80], [85], [88], [91], [106], [107], [110], [113], [114], [117], [118], [119], [121], [122], [123], [124], [131], [132], [133], [134], [135], [136], [137], [139], [141], [142], [143], [145], [146], [147], [149], [150], [151], [152], [153], [154], [155], [157], [159], [161], [162], [163] [2018-01-24 17:26:48,571 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:26:48,571 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:26:48,739 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:26:48,740 INFO L268 AbstractInterpreter]: Visited 75 different actions 79 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 27 variables. [2018-01-24 17:26:48,750 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:26:48,750 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:26:48,750 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:26:48,760 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:48,760 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:26:48,807 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:48,810 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:26:48,823 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:48,824 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:26:48,985 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:49,012 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:26:49,012 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:26:49,015 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:49,016 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:26:49,088 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:49,094 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:26:49,099 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:49,099 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:26:49,150 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:49,152 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:26:49,152 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-24 17:26:49,152 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:26:49,152 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 17:26:49,152 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 17:26:49,152 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-24 17:26:49,153 INFO L87 Difference]: Start difference. First operand 105 states and 107 transitions. Second operand 9 states. [2018-01-24 17:26:49,178 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:26:49,178 INFO L93 Difference]: Finished difference Result 185 states and 189 transitions. [2018-01-24 17:26:49,178 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 17:26:49,178 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 78 [2018-01-24 17:26:49,178 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:26:49,179 INFO L225 Difference]: With dead ends: 185 [2018-01-24 17:26:49,179 INFO L226 Difference]: Without dead ends: 106 [2018-01-24 17:26:49,179 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 319 GetRequests, 303 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=103, Invalid=137, Unknown=0, NotChecked=0, Total=240 [2018-01-24 17:26:49,180 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-01-24 17:26:49,189 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 106. [2018-01-24 17:26:49,189 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-01-24 17:26:49,190 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 108 transitions. [2018-01-24 17:26:49,190 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 108 transitions. Word has length 78 [2018-01-24 17:26:49,190 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:26:49,190 INFO L432 AbstractCegarLoop]: Abstraction has 106 states and 108 transitions. [2018-01-24 17:26:49,190 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 17:26:49,191 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 108 transitions. [2018-01-24 17:26:49,191 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-01-24 17:26:49,192 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:26:49,192 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:26:49,192 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:26:49,192 INFO L82 PathProgramCache]: Analyzing trace with hash 1544426796, now seen corresponding path program 2 times [2018-01-24 17:26:49,192 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:26:49,193 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:49,193 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:49,193 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:49,193 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:26:49,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:49,216 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:26:49,302 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:49,303 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:26:49,303 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:26:49,303 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:26:49,303 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:26:49,303 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:26:49,303 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:26:49,312 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:26:49,312 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:26:49,357 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:26:49,365 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:26:49,371 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:26:49,376 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 17:26:49,376 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:26:49,393 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 17:26:49,393 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:26:49,409 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 17:26:49,409 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 17:26:50,547 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 17:26:50,547 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:26:51,352 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 17:26:51,377 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 17:26:51,377 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24, 22] imperfect sequences [9] total 53 [2018-01-24 17:26:51,377 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:26:51,377 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-24 17:26:51,378 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-24 17:26:51,378 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=181, Invalid=2575, Unknown=0, NotChecked=0, Total=2756 [2018-01-24 17:26:51,379 INFO L87 Difference]: Start difference. First operand 106 states and 108 transitions. Second operand 25 states. [2018-01-24 17:26:52,709 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:26:52,709 INFO L93 Difference]: Finished difference Result 106 states and 108 transitions. [2018-01-24 17:26:52,710 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-24 17:26:52,710 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 79 [2018-01-24 17:26:52,710 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:26:52,710 INFO L225 Difference]: With dead ends: 106 [2018-01-24 17:26:52,711 INFO L226 Difference]: Without dead ends: 104 [2018-01-24 17:26:52,712 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 174 GetRequests, 111 SyntacticMatches, 4 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 985 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=246, Invalid=3414, Unknown=0, NotChecked=0, Total=3660 [2018-01-24 17:26:52,712 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 104 states. [2018-01-24 17:26:52,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 104 to 104. [2018-01-24 17:26:52,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 104 states. [2018-01-24 17:26:52,730 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 104 states to 104 states and 106 transitions. [2018-01-24 17:26:52,730 INFO L78 Accepts]: Start accepts. Automaton has 104 states and 106 transitions. Word has length 79 [2018-01-24 17:26:52,730 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:26:52,730 INFO L432 AbstractCegarLoop]: Abstraction has 104 states and 106 transitions. [2018-01-24 17:26:52,730 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-24 17:26:52,730 INFO L276 IsEmpty]: Start isEmpty. Operand 104 states and 106 transitions. [2018-01-24 17:26:52,731 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-01-24 17:26:52,731 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:26:52,731 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:26:52,731 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:26:52,731 INFO L82 PathProgramCache]: Analyzing trace with hash -814306387, now seen corresponding path program 1 times [2018-01-24 17:26:52,732 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:26:52,732 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:52,733 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:26:52,733 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:52,733 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:26:52,753 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:52,755 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:26:52,868 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:52,869 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:26:52,869 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:26:52,869 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 84 with the following transitions: [2018-01-24 17:26:52,869 INFO L201 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [17], [20], [27], [32], [34], [35], [36], [39], [40], [43], [44], [45], [48], [50], [53], [57], [60], [61], [62], [65], [66], [67], [71], [73], [74], [75], [77], [80], [85], [88], [89], [92], [93], [98], [100], [106], [107], [110], [113], [114], [117], [118], [119], [121], [122], [123], [124], [131], [132], [133], [134], [135], [136], [137], [139], [141], [142], [143], [145], [146], [147], [149], [150], [151], [152], [153], [154], [155], [157], [159], [161], [162], [163] [2018-01-24 17:26:52,871 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:26:52,872 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:26:53,033 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:26:53,034 INFO L268 AbstractInterpreter]: Visited 79 different actions 83 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 27 variables. [2018-01-24 17:26:53,035 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:26:53,035 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:26:53,036 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:26:53,043 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:53,043 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:26:53,099 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:53,103 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:26:53,122 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:53,123 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:26:53,270 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:53,290 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:26:53,290 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:26:53,293 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:53,293 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:26:53,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:53,391 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:26:53,396 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:53,396 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:26:53,849 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:53,851 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:26:53,851 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-24 17:26:53,851 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:26:53,851 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 17:26:53,851 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 17:26:53,851 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-24 17:26:53,852 INFO L87 Difference]: Start difference. First operand 104 states and 106 transitions. Second operand 10 states. [2018-01-24 17:26:53,882 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:26:53,882 INFO L93 Difference]: Finished difference Result 182 states and 186 transitions. [2018-01-24 17:26:53,882 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-24 17:26:53,882 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 83 [2018-01-24 17:26:53,883 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:26:53,883 INFO L225 Difference]: With dead ends: 182 [2018-01-24 17:26:53,883 INFO L226 Difference]: Without dead ends: 105 [2018-01-24 17:26:53,883 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 340 GetRequests, 322 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=133, Invalid=173, Unknown=0, NotChecked=0, Total=306 [2018-01-24 17:26:53,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 105 states. [2018-01-24 17:26:53,898 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 105 to 105. [2018-01-24 17:26:53,898 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-01-24 17:26:53,898 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 107 transitions. [2018-01-24 17:26:53,898 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 107 transitions. Word has length 83 [2018-01-24 17:26:53,899 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:26:53,899 INFO L432 AbstractCegarLoop]: Abstraction has 105 states and 107 transitions. [2018-01-24 17:26:53,899 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 17:26:53,899 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 107 transitions. [2018-01-24 17:26:53,899 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-01-24 17:26:53,899 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:26:53,899 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:26:53,899 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:26:53,900 INFO L82 PathProgramCache]: Analyzing trace with hash -1853879068, now seen corresponding path program 2 times [2018-01-24 17:26:53,900 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:26:53,900 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:53,900 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:26:53,901 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:53,901 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:26:53,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:53,918 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:26:54,047 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:54,047 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:26:54,047 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:26:54,047 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:26:54,048 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:26:54,048 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:26:54,048 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:26:54,054 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:26:54,055 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:26:54,089 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:26:54,101 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:26:54,103 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:26:54,105 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:26:54,114 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:54,114 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:26:54,247 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:54,267 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:26:54,267 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:26:54,270 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:26:54,270 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:26:54,320 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:26:54,402 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:26:54,438 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:26:54,447 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:26:54,477 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:54,477 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:26:54,544 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:54,545 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:26:54,545 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-24 17:26:54,545 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:26:54,546 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-24 17:26:54,546 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-24 17:26:54,546 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-24 17:26:54,546 INFO L87 Difference]: Start difference. First operand 105 states and 107 transitions. Second operand 11 states. [2018-01-24 17:26:54,575 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:26:54,575 INFO L93 Difference]: Finished difference Result 183 states and 187 transitions. [2018-01-24 17:26:54,576 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 17:26:54,576 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 84 [2018-01-24 17:26:54,576 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:26:54,576 INFO L225 Difference]: With dead ends: 183 [2018-01-24 17:26:54,576 INFO L226 Difference]: Without dead ends: 106 [2018-01-24 17:26:54,577 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 345 GetRequests, 325 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=167, Invalid=213, Unknown=0, NotChecked=0, Total=380 [2018-01-24 17:26:54,577 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-01-24 17:26:54,590 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 106. [2018-01-24 17:26:54,590 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 106 states. [2018-01-24 17:26:54,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 106 states to 106 states and 108 transitions. [2018-01-24 17:26:54,591 INFO L78 Accepts]: Start accepts. Automaton has 106 states and 108 transitions. Word has length 84 [2018-01-24 17:26:54,591 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:26:54,591 INFO L432 AbstractCegarLoop]: Abstraction has 106 states and 108 transitions. [2018-01-24 17:26:54,591 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-24 17:26:54,591 INFO L276 IsEmpty]: Start isEmpty. Operand 106 states and 108 transitions. [2018-01-24 17:26:54,591 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-01-24 17:26:54,591 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:26:54,592 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:26:54,592 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:26:54,592 INFO L82 PathProgramCache]: Analyzing trace with hash 279106189, now seen corresponding path program 3 times [2018-01-24 17:26:54,592 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:26:54,592 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:54,593 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:26:54,593 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:26:54,593 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:26:54,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:26:54,612 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:26:54,719 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:54,719 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:26:54,719 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:26:54,719 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:26:54,719 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:26:54,719 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:26:54,719 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:26:54,724 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 17:26:54,724 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 17:26:54,753 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:26:54,764 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:26:54,798 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:26:55,039 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:26:55,316 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:26:55,317 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:26:55,321 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:26:55,337 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:55,337 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:26:55,560 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:26:55,580 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:26:55,580 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:26:55,583 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 17:26:55,583 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 17:26:55,632 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:26:55,711 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:26:56,482 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:27:08,516 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:27:10,174 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:27:10,235 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:27:10,253 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:27:10,258 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:10,258 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:27:10,366 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:10,369 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:27:10,370 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 21 [2018-01-24 17:27:10,370 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:27:10,370 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-24 17:27:10,370 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-24 17:27:10,371 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=228, Unknown=0, NotChecked=0, Total=420 [2018-01-24 17:27:10,371 INFO L87 Difference]: Start difference. First operand 106 states and 108 transitions. Second operand 12 states. [2018-01-24 17:27:10,409 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:27:10,409 INFO L93 Difference]: Finished difference Result 184 states and 188 transitions. [2018-01-24 17:27:10,409 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 17:27:10,409 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 85 [2018-01-24 17:27:10,410 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:27:10,410 INFO L225 Difference]: With dead ends: 184 [2018-01-24 17:27:10,410 INFO L226 Difference]: Without dead ends: 107 [2018-01-24 17:27:10,411 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 350 GetRequests, 328 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=205, Invalid=257, Unknown=0, NotChecked=0, Total=462 [2018-01-24 17:27:10,411 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2018-01-24 17:27:10,432 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 107. [2018-01-24 17:27:10,433 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 107 states. [2018-01-24 17:27:10,433 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 107 states to 107 states and 109 transitions. [2018-01-24 17:27:10,434 INFO L78 Accepts]: Start accepts. Automaton has 107 states and 109 transitions. Word has length 85 [2018-01-24 17:27:10,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:27:10,434 INFO L432 AbstractCegarLoop]: Abstraction has 107 states and 109 transitions. [2018-01-24 17:27:10,434 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-24 17:27:10,434 INFO L276 IsEmpty]: Start isEmpty. Operand 107 states and 109 transitions. [2018-01-24 17:27:10,435 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-01-24 17:27:10,435 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:27:10,435 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:27:10,435 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:27:10,435 INFO L82 PathProgramCache]: Analyzing trace with hash 1977139716, now seen corresponding path program 4 times [2018-01-24 17:27:10,435 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:27:10,436 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:10,436 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:27:10,437 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:10,437 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:27:10,456 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:10,458 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:27:10,579 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:10,579 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:10,579 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:27:10,579 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:27:10,580 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:27:10,580 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:10,580 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:27:10,585 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-24 17:27:10,585 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-24 17:27:10,640 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:27:10,644 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:27:10,660 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:10,660 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:27:10,909 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:10,930 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:10,930 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:27:10,936 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-24 17:27:10,936 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-24 17:27:11,084 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:27:11,091 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:27:11,097 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:11,097 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:27:11,211 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:11,213 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:27:11,213 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 23 [2018-01-24 17:27:11,213 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:27:11,213 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-24 17:27:11,213 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-24 17:27:11,213 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=232, Invalid=274, Unknown=0, NotChecked=0, Total=506 [2018-01-24 17:27:11,214 INFO L87 Difference]: Start difference. First operand 107 states and 109 transitions. Second operand 13 states. [2018-01-24 17:27:11,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:27:11,250 INFO L93 Difference]: Finished difference Result 185 states and 189 transitions. [2018-01-24 17:27:11,250 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-24 17:27:11,251 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 86 [2018-01-24 17:27:11,251 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:27:11,251 INFO L225 Difference]: With dead ends: 185 [2018-01-24 17:27:11,251 INFO L226 Difference]: Without dead ends: 108 [2018-01-24 17:27:11,252 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 355 GetRequests, 331 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=246, Invalid=306, Unknown=0, NotChecked=0, Total=552 [2018-01-24 17:27:11,252 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 108 states. [2018-01-24 17:27:11,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 108 to 108. [2018-01-24 17:27:11,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 108 states. [2018-01-24 17:27:11,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 108 states to 108 states and 110 transitions. [2018-01-24 17:27:11,266 INFO L78 Accepts]: Start accepts. Automaton has 108 states and 110 transitions. Word has length 86 [2018-01-24 17:27:11,266 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:27:11,266 INFO L432 AbstractCegarLoop]: Abstraction has 108 states and 110 transitions. [2018-01-24 17:27:11,266 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-24 17:27:11,266 INFO L276 IsEmpty]: Start isEmpty. Operand 108 states and 110 transitions. [2018-01-24 17:27:11,267 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-01-24 17:27:11,267 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:27:11,267 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:27:11,267 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:27:11,267 INFO L82 PathProgramCache]: Analyzing trace with hash -1218395795, now seen corresponding path program 5 times [2018-01-24 17:27:11,267 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:27:11,268 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:11,268 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:27:11,268 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:11,268 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:27:11,289 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:11,290 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:27:11,411 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:11,411 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:11,411 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:27:11,411 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:27:11,411 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:27:11,411 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:11,411 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:27:11,416 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-24 17:27:11,416 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:27:11,429 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:27:11,431 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:27:11,434 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:27:11,449 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:27:11,463 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:27:11,544 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:27:11,549 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:27:11,552 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:27:11,574 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:11,574 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:27:11,836 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:11,856 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:11,856 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:27:11,898 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-24 17:27:11,898 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:27:11,916 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:27:11,920 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:27:11,930 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:27:11,946 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:27:11,974 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:27:12,060 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:27:12,098 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:27:12,106 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:27:12,112 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:12,112 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:27:12,305 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:12,306 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:27:12,307 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 25 [2018-01-24 17:27:12,307 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:27:12,307 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-24 17:27:12,307 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-24 17:27:12,307 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=272, Invalid=328, Unknown=0, NotChecked=0, Total=600 [2018-01-24 17:27:12,308 INFO L87 Difference]: Start difference. First operand 108 states and 110 transitions. Second operand 14 states. [2018-01-24 17:27:12,362 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:27:12,362 INFO L93 Difference]: Finished difference Result 186 states and 190 transitions. [2018-01-24 17:27:12,362 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-24 17:27:12,362 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 87 [2018-01-24 17:27:12,363 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:27:12,363 INFO L225 Difference]: With dead ends: 186 [2018-01-24 17:27:12,363 INFO L226 Difference]: Without dead ends: 109 [2018-01-24 17:27:12,364 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 360 GetRequests, 334 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 84 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=287, Invalid=363, Unknown=0, NotChecked=0, Total=650 [2018-01-24 17:27:12,364 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states. [2018-01-24 17:27:12,378 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 109. [2018-01-24 17:27:12,378 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 109 states. [2018-01-24 17:27:12,378 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 109 states to 109 states and 111 transitions. [2018-01-24 17:27:12,378 INFO L78 Accepts]: Start accepts. Automaton has 109 states and 111 transitions. Word has length 87 [2018-01-24 17:27:12,378 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:27:12,379 INFO L432 AbstractCegarLoop]: Abstraction has 109 states and 111 transitions. [2018-01-24 17:27:12,379 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-24 17:27:12,379 INFO L276 IsEmpty]: Start isEmpty. Operand 109 states and 111 transitions. [2018-01-24 17:27:12,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-01-24 17:27:12,379 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:27:12,379 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:27:12,379 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:27:12,380 INFO L82 PathProgramCache]: Analyzing trace with hash -1495748828, now seen corresponding path program 6 times [2018-01-24 17:27:12,380 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:27:12,380 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:12,381 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:27:12,381 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:12,381 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:27:12,395 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:12,396 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:27:12,883 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:12,883 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:12,883 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:27:12,883 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:27:12,884 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:27:12,884 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:12,884 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:27:12,891 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-24 17:27:12,891 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-24 17:27:12,937 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:27:12,955 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:27:12,981 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:27:13,303 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:27:13,516 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:27:15,092 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:27:15,094 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:27:15,099 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:27:15,121 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:15,121 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:27:15,376 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:15,412 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:15,412 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:27:15,417 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-24 17:27:15,418 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-24 17:27:15,495 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:27:15,581 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:27:16,243 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command Received shutdown request... Cannot interrupt operation gracefully because timeout expired. Forcing shutdown