java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_2_false-valid-memtrack_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-24 17:22:21,233 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-24 17:22:21,235 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-24 17:22:21,247 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-24 17:22:21,248 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-24 17:22:21,249 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-24 17:22:21,250 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-24 17:22:21,252 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-24 17:22:21,254 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-24 17:22:21,255 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-24 17:22:21,256 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... 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[2018-01-24 17:22:21,295 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-24 17:22:21,296 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-24 17:22:21,296 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf [2018-01-24 17:22:21,305 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-24 17:22:21,305 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-24 17:22:21,306 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-24 17:22:21,306 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-24 17:22:21,306 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-24 17:22:21,306 INFO L133 SettingsManager]: * Deactivate Weak Equivalences=true [2018-01-24 17:22:21,307 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-24 17:22:21,307 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-24 17:22:21,307 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-24 17:22:21,307 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-24 17:22:21,307 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-24 17:22:21,307 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-24 17:22:21,308 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-24 17:22:21,308 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-24 17:22:21,308 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-24 17:22:21,308 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-24 17:22:21,308 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-24 17:22:21,308 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-24 17:22:21,308 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-24 17:22:21,308 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-24 17:22:21,309 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-24 17:22:21,309 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-24 17:22:21,309 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-24 17:22:21,309 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-24 17:22:21,309 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 17:22:21,310 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-24 17:22:21,310 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-24 17:22:21,310 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-24 17:22:21,310 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-24 17:22:21,310 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-24 17:22:21,310 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-24 17:22:21,310 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-24 17:22:21,311 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-24 17:22:21,311 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-24 17:22:21,311 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-24 17:22:21,312 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-24 17:22:21,344 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-24 17:22:21,355 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-24 17:22:21,359 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-24 17:22:21,360 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-24 17:22:21,360 INFO L276 PluginConnector]: CDTParser initialized [2018-01-24 17:22:21,361 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_2_false-valid-memtrack_true-termination.i [2018-01-24 17:22:21,543 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-24 17:22:21,548 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-24 17:22:21,549 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-24 17:22:21,549 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-24 17:22:21,554 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-24 17:22:21,555 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 05:22:21" (1/1) ... [2018-01-24 17:22:21,558 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@5d434187 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:22:21, skipping insertion in model container [2018-01-24 17:22:21,558 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 05:22:21" (1/1) ... [2018-01-24 17:22:21,571 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 17:22:21,620 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 17:22:21,733 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 17:22:21,758 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 17:22:21,770 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:22:21 WrapperNode [2018-01-24 17:22:21,770 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-24 17:22:21,771 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-24 17:22:21,771 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-24 17:22:21,771 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-24 17:22:21,785 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:22:21" (1/1) ... [2018-01-24 17:22:21,786 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:22:21" (1/1) ... [2018-01-24 17:22:21,796 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:22:21" (1/1) ... [2018-01-24 17:22:21,796 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:22:21" (1/1) ... [2018-01-24 17:22:21,803 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:22:21" (1/1) ... [2018-01-24 17:22:21,807 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:22:21" (1/1) ... [2018-01-24 17:22:21,809 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:22:21" (1/1) ... [2018-01-24 17:22:21,812 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-24 17:22:21,812 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-24 17:22:21,812 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-24 17:22:21,812 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-24 17:22:21,813 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:22:21" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 17:22:21,859 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-24 17:22:21,859 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-24 17:22:21,859 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-01-24 17:22:21,860 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-01-24 17:22:21,860 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-01-24 17:22:21,860 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-01-24 17:22:21,860 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-01-24 17:22:21,860 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-01-24 17:22:21,860 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-01-24 17:22:21,861 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-24 17:22:21,861 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-24 17:22:21,861 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-24 17:22:21,861 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-24 17:22:21,861 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-24 17:22:21,861 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-24 17:22:21,862 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-24 17:22:21,862 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-24 17:22:21,862 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-24 17:22:21,862 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-24 17:22:21,862 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-24 17:22:21,862 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-24 17:22:21,863 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-24 17:22:21,863 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-01-24 17:22:21,863 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-01-24 17:22:21,863 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-01-24 17:22:21,863 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-01-24 17:22:21,864 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-01-24 17:22:21,864 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-01-24 17:22:21,864 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-01-24 17:22:21,864 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-24 17:22:21,864 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-24 17:22:21,864 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-24 17:22:22,010 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-01-24 17:22:22,106 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-24 17:22:22,106 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 05:22:22 BoogieIcfgContainer [2018-01-24 17:22:22,106 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-24 17:22:22,107 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-24 17:22:22,107 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-24 17:22:22,109 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-24 17:22:22,109 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.01 05:22:21" (1/3) ... [2018-01-24 17:22:22,110 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5f60ef0b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 05:22:22, skipping insertion in model container [2018-01-24 17:22:22,110 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:22:21" (2/3) ... [2018-01-24 17:22:22,110 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5f60ef0b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 05:22:22, skipping insertion in model container [2018-01-24 17:22:22,111 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 05:22:22" (3/3) ... [2018-01-24 17:22:22,113 INFO L105 eAbstractionObserver]: Analyzing ICFG memleaks_test22_2_false-valid-memtrack_true-termination.i [2018-01-24 17:22:22,122 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-24 17:22:22,128 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 9 error locations. [2018-01-24 17:22:22,174 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-24 17:22:22,174 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-24 17:22:22,174 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-24 17:22:22,174 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-24 17:22:22,174 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-24 17:22:22,175 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-24 17:22:22,175 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-24 17:22:22,175 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-24 17:22:22,176 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-24 17:22:22,197 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states. [2018-01-24 17:22:22,201 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-24 17:22:22,202 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:22,203 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:22,203 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:22,208 INFO L82 PathProgramCache]: Analyzing trace with hash 13572496, now seen corresponding path program 1 times [2018-01-24 17:22:22,210 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:22,257 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:22,257 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:22,257 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:22,257 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:22,309 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:22,317 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:22,470 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:22,472 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:22:22,472 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 17:22:22,472 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:22,474 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 17:22:22,559 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 17:22:22,560 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:22:22,562 INFO L87 Difference]: Start difference. First operand 65 states. Second operand 5 states. [2018-01-24 17:22:22,626 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:22,626 INFO L93 Difference]: Finished difference Result 118 states and 125 transitions. [2018-01-24 17:22:22,627 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 17:22:22,628 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-01-24 17:22:22,628 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:22,639 INFO L225 Difference]: With dead ends: 118 [2018-01-24 17:22:22,639 INFO L226 Difference]: Without dead ends: 68 [2018-01-24 17:22:22,643 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:22:22,663 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states. [2018-01-24 17:22:22,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 66. [2018-01-24 17:22:22,686 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 66 states. [2018-01-24 17:22:22,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 66 states to 66 states and 70 transitions. [2018-01-24 17:22:22,691 INFO L78 Accepts]: Start accepts. Automaton has 66 states and 70 transitions. Word has length 17 [2018-01-24 17:22:22,691 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:22,691 INFO L432 AbstractCegarLoop]: Abstraction has 66 states and 70 transitions. [2018-01-24 17:22:22,691 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 17:22:22,692 INFO L276 IsEmpty]: Start isEmpty. Operand 66 states and 70 transitions. [2018-01-24 17:22:22,692 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 17:22:22,693 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:22,693 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:22,693 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:22,693 INFO L82 PathProgramCache]: Analyzing trace with hash 64872882, now seen corresponding path program 1 times [2018-01-24 17:22:22,693 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:22,695 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:22,695 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:22,696 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:22,696 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:22,717 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:22,719 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:22,802 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:22,802 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:22:22,803 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 17:22:22,803 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:22,804 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 17:22:22,805 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 17:22:22,805 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 17:22:22,805 INFO L87 Difference]: Start difference. First operand 66 states and 70 transitions. Second operand 6 states. [2018-01-24 17:22:22,934 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:22,934 INFO L93 Difference]: Finished difference Result 68 states and 72 transitions. [2018-01-24 17:22:22,935 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 17:22:22,935 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-01-24 17:22:22,935 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:22,937 INFO L225 Difference]: With dead ends: 68 [2018-01-24 17:22:22,937 INFO L226 Difference]: Without dead ends: 67 [2018-01-24 17:22:22,938 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 17:22:22,938 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2018-01-24 17:22:22,946 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 65. [2018-01-24 17:22:22,946 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65 states. [2018-01-24 17:22:22,947 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 69 transitions. [2018-01-24 17:22:22,948 INFO L78 Accepts]: Start accepts. Automaton has 65 states and 69 transitions. Word has length 19 [2018-01-24 17:22:22,948 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:22,948 INFO L432 AbstractCegarLoop]: Abstraction has 65 states and 69 transitions. [2018-01-24 17:22:22,948 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 17:22:22,948 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 69 transitions. [2018-01-24 17:22:22,949 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 17:22:22,949 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:22,950 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:22,950 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:22,950 INFO L82 PathProgramCache]: Analyzing trace with hash 64872883, now seen corresponding path program 1 times [2018-01-24 17:22:22,950 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:22,952 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:22,952 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:22,952 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:22,952 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:22,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:22,975 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:23,217 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:23,217 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:22:23,217 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 17:22:23,218 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:23,218 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 17:22:23,218 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 17:22:23,218 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 17:22:23,219 INFO L87 Difference]: Start difference. First operand 65 states and 69 transitions. Second operand 7 states. [2018-01-24 17:22:23,401 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:23,401 INFO L93 Difference]: Finished difference Result 67 states and 71 transitions. [2018-01-24 17:22:23,402 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 17:22:23,402 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-01-24 17:22:23,402 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:23,403 INFO L225 Difference]: With dead ends: 67 [2018-01-24 17:22:23,403 INFO L226 Difference]: Without dead ends: 66 [2018-01-24 17:22:23,403 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-01-24 17:22:23,404 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2018-01-24 17:22:23,409 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 64. [2018-01-24 17:22:23,409 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2018-01-24 17:22:23,410 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 68 transitions. [2018-01-24 17:22:23,410 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 68 transitions. Word has length 19 [2018-01-24 17:22:23,410 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:23,410 INFO L432 AbstractCegarLoop]: Abstraction has 64 states and 68 transitions. [2018-01-24 17:22:23,410 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 17:22:23,411 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 68 transitions. [2018-01-24 17:22:23,411 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-24 17:22:23,411 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:23,411 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:23,411 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:23,412 INFO L82 PathProgramCache]: Analyzing trace with hash -1610907055, now seen corresponding path program 1 times [2018-01-24 17:22:23,412 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:23,413 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:23,413 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:23,413 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:23,413 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:23,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:23,427 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:23,469 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:23,469 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:22:23,469 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 17:22:23,469 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:23,470 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 17:22:23,470 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 17:22:23,470 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 17:22:23,470 INFO L87 Difference]: Start difference. First operand 64 states and 68 transitions. Second operand 3 states. [2018-01-24 17:22:23,540 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:23,540 INFO L93 Difference]: Finished difference Result 71 states and 74 transitions. [2018-01-24 17:22:23,541 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 17:22:23,541 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 22 [2018-01-24 17:22:23,541 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:23,542 INFO L225 Difference]: With dead ends: 71 [2018-01-24 17:22:23,542 INFO L226 Difference]: Without dead ends: 60 [2018-01-24 17:22:23,542 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 7 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 17:22:23,543 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2018-01-24 17:22:23,548 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 60. [2018-01-24 17:22:23,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-01-24 17:22:23,550 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 63 transitions. [2018-01-24 17:22:23,550 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 63 transitions. Word has length 22 [2018-01-24 17:22:23,550 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:23,550 INFO L432 AbstractCegarLoop]: Abstraction has 60 states and 63 transitions. [2018-01-24 17:22:23,550 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 17:22:23,550 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 63 transitions. [2018-01-24 17:22:23,551 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-24 17:22:23,551 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:23,551 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:23,551 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:23,551 INFO L82 PathProgramCache]: Analyzing trace with hash -655458449, now seen corresponding path program 1 times [2018-01-24 17:22:23,552 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:23,552 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:23,553 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:23,553 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:23,553 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:23,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:23,565 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:23,610 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:23,611 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:22:23,611 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 17:22:23,611 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:23,611 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 17:22:23,612 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 17:22:23,612 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 17:22:23,612 INFO L87 Difference]: Start difference. First operand 60 states and 63 transitions. Second operand 6 states. [2018-01-24 17:22:23,645 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:23,646 INFO L93 Difference]: Finished difference Result 67 states and 69 transitions. [2018-01-24 17:22:23,651 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 17:22:23,651 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 24 [2018-01-24 17:22:23,652 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:23,652 INFO L225 Difference]: With dead ends: 67 [2018-01-24 17:22:23,652 INFO L226 Difference]: Without dead ends: 60 [2018-01-24 17:22:23,653 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 17:22:23,653 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2018-01-24 17:22:23,658 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 60. [2018-01-24 17:22:23,658 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-01-24 17:22:23,659 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 62 transitions. [2018-01-24 17:22:23,659 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 62 transitions. Word has length 24 [2018-01-24 17:22:23,659 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:23,659 INFO L432 AbstractCegarLoop]: Abstraction has 60 states and 62 transitions. [2018-01-24 17:22:23,659 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 17:22:23,659 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 62 transitions. [2018-01-24 17:22:23,660 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 17:22:23,660 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:23,660 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:23,660 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:23,660 INFO L82 PathProgramCache]: Analyzing trace with hash -1673666846, now seen corresponding path program 1 times [2018-01-24 17:22:23,660 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:23,662 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:23,662 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:23,662 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:23,662 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:23,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:23,681 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:23,769 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:23,769 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:22:23,770 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 17:22:23,770 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:23,770 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 17:22:23,771 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 17:22:23,771 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:22:23,771 INFO L87 Difference]: Start difference. First operand 60 states and 62 transitions. Second operand 10 states. [2018-01-24 17:22:24,038 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:24,038 INFO L93 Difference]: Finished difference Result 60 states and 62 transitions. [2018-01-24 17:22:24,039 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 17:22:24,039 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 34 [2018-01-24 17:22:24,039 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:24,040 INFO L225 Difference]: With dead ends: 60 [2018-01-24 17:22:24,040 INFO L226 Difference]: Without dead ends: 59 [2018-01-24 17:22:24,041 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:22:24,041 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-01-24 17:22:24,046 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 59. [2018-01-24 17:22:24,046 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59 states. [2018-01-24 17:22:24,047 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 61 transitions. [2018-01-24 17:22:24,047 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 61 transitions. Word has length 34 [2018-01-24 17:22:24,048 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:24,048 INFO L432 AbstractCegarLoop]: Abstraction has 59 states and 61 transitions. [2018-01-24 17:22:24,048 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 17:22:24,048 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 61 transitions. [2018-01-24 17:22:24,049 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 17:22:24,049 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:24,050 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:24,050 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:24,051 INFO L82 PathProgramCache]: Analyzing trace with hash -1673666845, now seen corresponding path program 1 times [2018-01-24 17:22:24,051 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:24,052 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:24,052 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:24,052 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:24,053 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:24,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:24,070 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:24,115 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:24,116 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:22:24,116 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 17:22:24,116 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:24,117 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 17:22:24,117 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 17:22:24,117 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 17:22:24,117 INFO L87 Difference]: Start difference. First operand 59 states and 61 transitions. Second operand 4 states. [2018-01-24 17:22:24,150 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:24,151 INFO L93 Difference]: Finished difference Result 97 states and 101 transitions. [2018-01-24 17:22:24,151 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 17:22:24,151 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2018-01-24 17:22:24,152 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:24,153 INFO L225 Difference]: With dead ends: 97 [2018-01-24 17:22:24,153 INFO L226 Difference]: Without dead ends: 60 [2018-01-24 17:22:24,153 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:22:24,154 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2018-01-24 17:22:24,160 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 60. [2018-01-24 17:22:24,160 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-01-24 17:22:24,161 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 62 transitions. [2018-01-24 17:22:24,161 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 62 transitions. Word has length 34 [2018-01-24 17:22:24,162 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:24,162 INFO L432 AbstractCegarLoop]: Abstraction has 60 states and 62 transitions. [2018-01-24 17:22:24,162 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 17:22:24,162 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 62 transitions. [2018-01-24 17:22:24,163 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-24 17:22:24,163 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:24,163 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:24,164 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:24,164 INFO L82 PathProgramCache]: Analyzing trace with hash -1908152085, now seen corresponding path program 1 times [2018-01-24 17:22:24,164 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:24,165 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:24,165 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:24,165 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:24,165 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:24,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:24,182 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:24,221 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:24,221 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:24,221 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:22:24,222 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 36 with the following transitions: [2018-01-24 17:22:24,225 INFO L201 CegarAbsIntRunner]: [0], [3], [5], [7], [11], [15], [19], [20], [24], [26], [27], [39], [42], [43], [44], [46], [47], [52], [55], [56], [60], [64], [68], [72], [73], [74], [75], [76], [78], [80], [82], [83], [84], [86], [88] [2018-01-24 17:22:24,291 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:22:24,292 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:22:24,510 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:22:24,511 INFO L268 AbstractInterpreter]: Visited 35 different actions 39 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 21 variables. [2018-01-24 17:22:24,531 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:22:24,531 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:24,531 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:22:24,538 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:24,538 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:22:24,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:24,584 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:24,602 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:24,603 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:24,681 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:24,713 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:24,713 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:22:24,717 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:24,717 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:22:24,767 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:24,772 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:24,779 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:24,779 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:24,814 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:24,815 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:22:24,816 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-24 17:22:24,816 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:22:24,816 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 17:22:24,816 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 17:22:24,816 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-01-24 17:22:24,817 INFO L87 Difference]: Start difference. First operand 60 states and 62 transitions. Second operand 6 states. [2018-01-24 17:22:24,850 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:24,850 INFO L93 Difference]: Finished difference Result 98 states and 102 transitions. [2018-01-24 17:22:24,851 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 17:22:24,851 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-01-24 17:22:24,851 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:24,852 INFO L225 Difference]: With dead ends: 98 [2018-01-24 17:22:24,852 INFO L226 Difference]: Without dead ends: 61 [2018-01-24 17:22:24,852 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 134 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:22:24,853 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2018-01-24 17:22:24,859 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 61. [2018-01-24 17:22:24,859 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61 states. [2018-01-24 17:22:24,860 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 63 transitions. [2018-01-24 17:22:24,860 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 63 transitions. Word has length 35 [2018-01-24 17:22:24,860 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:24,860 INFO L432 AbstractCegarLoop]: Abstraction has 61 states and 63 transitions. [2018-01-24 17:22:24,860 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 17:22:24,860 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 63 transitions. [2018-01-24 17:22:24,861 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 17:22:24,861 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:24,862 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:24,862 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:24,862 INFO L82 PathProgramCache]: Analyzing trace with hash -587259933, now seen corresponding path program 2 times [2018-01-24 17:22:24,862 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:24,863 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:24,864 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:24,864 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:24,864 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:24,881 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:24,882 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:24,943 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:24,943 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:24,943 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:22:24,943 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:22:24,944 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:22:24,944 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:24,944 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:22:24,952 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:22:24,952 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:22:24,989 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:22:24,993 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:22:25,000 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:25,036 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 17:22:25,038 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:22:25,079 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 17:22:25,079 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:22:25,104 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 17:22:25,104 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 17:22:25,800 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 17:22:25,800 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:26,432 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 17:22:26,452 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 17:22:26,452 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14, 13] imperfect sequences [6] total 31 [2018-01-24 17:22:26,452 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:26,453 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 17:22:26,453 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 17:22:26,453 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=840, Unknown=0, NotChecked=0, Total=930 [2018-01-24 17:22:26,454 INFO L87 Difference]: Start difference. First operand 61 states and 63 transitions. Second operand 15 states. [2018-01-24 17:22:28,552 WARN L143 SmtUtils]: Spent 2053ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-24 17:22:29,011 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:29,011 INFO L93 Difference]: Finished difference Result 61 states and 63 transitions. [2018-01-24 17:22:29,011 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-24 17:22:29,011 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 36 [2018-01-24 17:22:29,011 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:29,012 INFO L225 Difference]: With dead ends: 61 [2018-01-24 17:22:29,012 INFO L226 Difference]: Without dead ends: 60 [2018-01-24 17:22:29,013 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 251 ImplicationChecksByTransitivity, 3.3s TimeCoverageRelationStatistics Valid=118, Invalid=1072, Unknown=0, NotChecked=0, Total=1190 [2018-01-24 17:22:29,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2018-01-24 17:22:29,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 60. [2018-01-24 17:22:29,019 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-01-24 17:22:29,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 62 transitions. [2018-01-24 17:22:29,020 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 62 transitions. Word has length 36 [2018-01-24 17:22:29,020 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:29,021 INFO L432 AbstractCegarLoop]: Abstraction has 60 states and 62 transitions. [2018-01-24 17:22:29,021 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 17:22:29,021 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 62 transitions. [2018-01-24 17:22:29,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-24 17:22:29,022 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:29,022 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:29,023 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:29,023 INFO L82 PathProgramCache]: Analyzing trace with hash -789525114, now seen corresponding path program 1 times [2018-01-24 17:22:29,023 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:29,024 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:29,024 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:22:29,024 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:29,025 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:29,040 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:29,041 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:29,153 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 17:22:29,154 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:22:29,154 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 17:22:29,154 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:29,154 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 17:22:29,155 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 17:22:29,155 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:22:29,155 INFO L87 Difference]: Start difference. First operand 60 states and 62 transitions. Second operand 10 states. [2018-01-24 17:22:29,372 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:29,372 INFO L93 Difference]: Finished difference Result 60 states and 62 transitions. [2018-01-24 17:22:29,373 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 17:22:29,373 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 41 [2018-01-24 17:22:29,373 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:29,374 INFO L225 Difference]: With dead ends: 60 [2018-01-24 17:22:29,374 INFO L226 Difference]: Without dead ends: 58 [2018-01-24 17:22:29,374 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:22:29,374 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2018-01-24 17:22:29,381 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 58. [2018-01-24 17:22:29,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58 states. [2018-01-24 17:22:29,382 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 60 transitions. [2018-01-24 17:22:29,382 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 60 transitions. Word has length 41 [2018-01-24 17:22:29,383 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:29,383 INFO L432 AbstractCegarLoop]: Abstraction has 58 states and 60 transitions. [2018-01-24 17:22:29,383 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 17:22:29,383 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 60 transitions. [2018-01-24 17:22:29,384 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-24 17:22:29,384 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:29,384 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:29,384 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:29,384 INFO L82 PathProgramCache]: Analyzing trace with hash -789525113, now seen corresponding path program 1 times [2018-01-24 17:22:29,384 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:29,385 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:29,385 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:29,386 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:29,386 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:29,400 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:29,401 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:29,467 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:29,467 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:29,467 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:22:29,467 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 42 with the following transitions: [2018-01-24 17:22:29,468 INFO L201 CegarAbsIntRunner]: [0], [1], [4], [5], [7], [11], [15], [19], [20], [24], [26], [27], [31], [34], [39], [42], [43], [44], [46], [47], [52], [55], [56], [60], [64], [68], [72], [73], [74], [75], [76], [78], [80], [82], [83], [84], [86], [88], [89], [90] [2018-01-24 17:22:29,470 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:22:29,470 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:22:29,589 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:22:29,589 INFO L268 AbstractInterpreter]: Visited 40 different actions 44 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 21 variables. [2018-01-24 17:22:29,599 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:22:29,600 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:29,600 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:22:29,605 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:29,606 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:22:29,628 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:29,631 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:29,644 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:29,644 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:29,720 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:29,755 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:29,755 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:22:29,758 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:29,759 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:22:29,806 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:29,811 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:29,817 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:29,817 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:29,981 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:29,982 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:22:29,983 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-24 17:22:29,983 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:22:29,983 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 17:22:29,983 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 17:22:29,983 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-01-24 17:22:29,984 INFO L87 Difference]: Start difference. First operand 58 states and 60 transitions. Second operand 7 states. [2018-01-24 17:22:30,008 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:30,008 INFO L93 Difference]: Finished difference Result 93 states and 97 transitions. [2018-01-24 17:22:30,009 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 17:22:30,009 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 41 [2018-01-24 17:22:30,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:30,010 INFO L225 Difference]: With dead ends: 93 [2018-01-24 17:22:30,010 INFO L226 Difference]: Without dead ends: 59 [2018-01-24 17:22:30,011 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 157 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=77, Unknown=0, NotChecked=0, Total=132 [2018-01-24 17:22:30,011 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-01-24 17:22:30,019 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 59. [2018-01-24 17:22:30,020 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59 states. [2018-01-24 17:22:30,020 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 61 transitions. [2018-01-24 17:22:30,021 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 61 transitions. Word has length 41 [2018-01-24 17:22:30,021 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:30,021 INFO L432 AbstractCegarLoop]: Abstraction has 59 states and 61 transitions. [2018-01-24 17:22:30,021 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 17:22:30,021 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 61 transitions. [2018-01-24 17:22:30,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-24 17:22:30,022 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:30,022 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:30,022 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:30,023 INFO L82 PathProgramCache]: Analyzing trace with hash -1225463169, now seen corresponding path program 2 times [2018-01-24 17:22:30,023 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:30,024 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:30,024 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:30,024 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:30,024 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:30,038 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:30,039 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:30,092 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:30,093 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:30,093 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:22:30,093 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:22:30,093 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:22:30,093 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:30,093 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:22:30,105 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:22:30,105 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:22:30,126 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:22:30,129 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:22:30,134 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:30,140 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 17:22:30,140 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:22:30,161 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 17:22:30,161 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:22:30,172 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 17:22:30,172 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 17:22:30,475 WARN L143 SmtUtils]: Spent 146ms on a formula simplification that was a NOOP. DAG size: 27 [2018-01-24 17:22:30,796 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 17:22:30,796 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:33,269 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 17:22:33,290 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 17:22:33,290 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15, 13] imperfect sequences [7] total 33 [2018-01-24 17:22:33,290 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:33,290 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-24 17:22:33,290 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-24 17:22:33,291 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=950, Unknown=1, NotChecked=0, Total=1056 [2018-01-24 17:22:33,291 INFO L87 Difference]: Start difference. First operand 59 states and 61 transitions. Second operand 16 states. [2018-01-24 17:22:33,785 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:33,785 INFO L93 Difference]: Finished difference Result 59 states and 61 transitions. [2018-01-24 17:22:33,785 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-24 17:22:33,785 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 42 [2018-01-24 17:22:33,785 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:33,786 INFO L225 Difference]: With dead ends: 59 [2018-01-24 17:22:33,786 INFO L226 Difference]: Without dead ends: 57 [2018-01-24 17:22:33,787 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 57 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 311 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=136, Invalid=1195, Unknown=1, NotChecked=0, Total=1332 [2018-01-24 17:22:33,787 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-01-24 17:22:33,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 57. [2018-01-24 17:22:33,797 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-01-24 17:22:33,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 59 transitions. [2018-01-24 17:22:33,798 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 59 transitions. Word has length 42 [2018-01-24 17:22:33,798 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:33,798 INFO L432 AbstractCegarLoop]: Abstraction has 57 states and 59 transitions. [2018-01-24 17:22:33,798 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-24 17:22:33,798 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 59 transitions. [2018-01-24 17:22:33,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-24 17:22:33,798 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:33,799 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:33,799 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:33,799 INFO L82 PathProgramCache]: Analyzing trace with hash 1869907629, now seen corresponding path program 1 times [2018-01-24 17:22:33,799 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:33,800 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:33,800 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:22:33,800 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:33,800 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:33,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:33,810 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:33,888 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 17:22:33,889 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:22:33,889 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-24 17:22:33,889 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:33,889 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 17:22:33,890 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 17:22:33,890 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-01-24 17:22:33,890 INFO L87 Difference]: Start difference. First operand 57 states and 59 transitions. Second operand 8 states. [2018-01-24 17:22:33,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:33,942 INFO L93 Difference]: Finished difference Result 67 states and 68 transitions. [2018-01-24 17:22:33,942 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 17:22:33,942 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 40 [2018-01-24 17:22:33,943 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:33,943 INFO L225 Difference]: With dead ends: 67 [2018-01-24 17:22:33,943 INFO L226 Difference]: Without dead ends: 57 [2018-01-24 17:22:33,944 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:22:33,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-01-24 17:22:33,951 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 57. [2018-01-24 17:22:33,951 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-01-24 17:22:33,952 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 58 transitions. [2018-01-24 17:22:33,952 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 58 transitions. Word has length 40 [2018-01-24 17:22:33,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:33,952 INFO L432 AbstractCegarLoop]: Abstraction has 57 states and 58 transitions. [2018-01-24 17:22:33,952 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 17:22:33,952 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 58 transitions. [2018-01-24 17:22:33,953 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-24 17:22:33,953 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:33,953 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:33,953 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:33,953 INFO L82 PathProgramCache]: Analyzing trace with hash 946199638, now seen corresponding path program 1 times [2018-01-24 17:22:33,953 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:33,954 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:33,954 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:33,954 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:33,954 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:33,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:33,967 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:34,033 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 17:22:34,034 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:22:34,034 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-01-24 17:22:34,034 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:22:34,034 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 17:22:34,034 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 17:22:34,034 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:22:34,034 INFO L87 Difference]: Start difference. First operand 57 states and 58 transitions. Second operand 10 states. [2018-01-24 17:22:34,110 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:34,111 INFO L93 Difference]: Finished difference Result 69 states and 69 transitions. [2018-01-24 17:22:34,111 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 17:22:34,111 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 45 [2018-01-24 17:22:34,111 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:34,111 INFO L225 Difference]: With dead ends: 69 [2018-01-24 17:22:34,112 INFO L226 Difference]: Without dead ends: 57 [2018-01-24 17:22:34,112 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:22:34,112 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 57 states. [2018-01-24 17:22:34,118 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 57 to 57. [2018-01-24 17:22:34,118 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-01-24 17:22:34,119 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 57 transitions. [2018-01-24 17:22:34,119 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 57 transitions. Word has length 45 [2018-01-24 17:22:34,119 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:34,119 INFO L432 AbstractCegarLoop]: Abstraction has 57 states and 57 transitions. [2018-01-24 17:22:34,120 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 17:22:34,120 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 57 transitions. [2018-01-24 17:22:34,120 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-24 17:22:34,120 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:34,121 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:34,121 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:34,121 INFO L82 PathProgramCache]: Analyzing trace with hash -1294061430, now seen corresponding path program 1 times [2018-01-24 17:22:34,121 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:34,122 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:34,122 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:34,122 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:34,122 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:34,136 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:34,137 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:34,196 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:34,196 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:34,196 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:22:34,196 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 57 with the following transitions: [2018-01-24 17:22:34,197 INFO L201 CegarAbsIntRunner]: [0], [1], [4], [5], [7], [11], [15], [17], [18], [19], [20], [24], [26], [27], [30], [31], [32], [35], [38], [39], [42], [43], [44], [46], [47], [52], [54], [55], [56], [60], [62], [63], [64], [68], [71], [72], [73], [74], [75], [76], [77], [78], [79], [80], [81], [82], [83], [84], [86], [87], [88], [89], [90], [91] [2018-01-24 17:22:34,199 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:22:34,199 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:22:34,329 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:22:34,330 INFO L268 AbstractInterpreter]: Visited 54 different actions 58 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 22 variables. [2018-01-24 17:22:34,331 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:22:34,331 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:34,332 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:22:34,340 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:34,340 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:22:34,367 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:34,369 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:34,383 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:34,384 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:34,490 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:34,510 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:34,510 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:22:34,513 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:34,513 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:22:34,559 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:34,563 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:34,569 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:34,569 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:34,647 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:34,649 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:22:34,649 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-24 17:22:34,649 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:22:34,657 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 17:22:34,658 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 17:22:34,658 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:22:34,658 INFO L87 Difference]: Start difference. First operand 57 states and 57 transitions. Second operand 8 states. [2018-01-24 17:22:34,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:34,684 INFO L93 Difference]: Finished difference Result 90 states and 90 transitions. [2018-01-24 17:22:34,684 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 17:22:34,684 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 56 [2018-01-24 17:22:34,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:34,685 INFO L225 Difference]: With dead ends: 90 [2018-01-24 17:22:34,685 INFO L226 Difference]: Without dead ends: 58 [2018-01-24 17:22:34,685 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 230 GetRequests, 216 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=77, Invalid=105, Unknown=0, NotChecked=0, Total=182 [2018-01-24 17:22:34,686 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2018-01-24 17:22:34,694 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 58. [2018-01-24 17:22:34,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58 states. [2018-01-24 17:22:34,695 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 58 transitions. [2018-01-24 17:22:34,695 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 58 transitions. Word has length 56 [2018-01-24 17:22:34,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:34,695 INFO L432 AbstractCegarLoop]: Abstraction has 58 states and 58 transitions. [2018-01-24 17:22:34,696 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 17:22:34,696 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 58 transitions. [2018-01-24 17:22:34,696 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-01-24 17:22:34,696 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:34,697 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:34,697 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:34,697 INFO L82 PathProgramCache]: Analyzing trace with hash -34765678, now seen corresponding path program 2 times [2018-01-24 17:22:34,697 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:34,698 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:34,698 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:22:34,698 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:34,698 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:34,713 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:34,714 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:34,771 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:34,772 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:34,772 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:22:34,772 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:22:34,772 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:22:34,772 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:34,772 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:22:34,777 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:22:34,777 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:22:34,795 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:22:34,802 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:22:34,803 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:22:34,805 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:34,817 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:34,817 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:34,963 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:34,983 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:34,983 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:22:34,986 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:22:34,986 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:22:35,015 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:22:35,042 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:22:35,058 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:22:35,063 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:35,067 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:35,067 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:35,262 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:35,264 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:22:35,264 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-24 17:22:35,264 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:22:35,265 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 17:22:35,265 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 17:22:35,265 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-24 17:22:35,265 INFO L87 Difference]: Start difference. First operand 58 states and 58 transitions. Second operand 9 states. [2018-01-24 17:22:35,289 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:35,289 INFO L93 Difference]: Finished difference Result 91 states and 91 transitions. [2018-01-24 17:22:35,289 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 17:22:35,289 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 57 [2018-01-24 17:22:35,290 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:35,290 INFO L225 Difference]: With dead ends: 91 [2018-01-24 17:22:35,290 INFO L226 Difference]: Without dead ends: 59 [2018-01-24 17:22:35,291 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 235 GetRequests, 219 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=103, Invalid=137, Unknown=0, NotChecked=0, Total=240 [2018-01-24 17:22:35,291 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-01-24 17:22:35,297 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 59. [2018-01-24 17:22:35,298 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59 states. [2018-01-24 17:22:35,298 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 59 transitions. [2018-01-24 17:22:35,298 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 59 transitions. Word has length 57 [2018-01-24 17:22:35,298 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:35,298 INFO L432 AbstractCegarLoop]: Abstraction has 59 states and 59 transitions. [2018-01-24 17:22:35,298 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 17:22:35,298 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 59 transitions. [2018-01-24 17:22:35,299 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-01-24 17:22:35,299 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:35,299 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:35,299 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:35,299 INFO L82 PathProgramCache]: Analyzing trace with hash 348696970, now seen corresponding path program 3 times [2018-01-24 17:22:35,299 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:35,300 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:35,300 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:22:35,301 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:35,301 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:35,312 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:35,313 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:35,504 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:35,504 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:35,504 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:22:35,504 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:22:35,505 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:22:35,505 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:35,505 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:22:35,516 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 17:22:35,516 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 17:22:35,539 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:22:35,549 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:22:35,579 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:22:35,741 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:22:35,742 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:22:35,745 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:35,762 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:35,763 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:35,928 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:35,948 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:35,948 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:22:35,951 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 17:22:35,952 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 17:22:35,993 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:22:36,021 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:22:36,137 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:22:36,430 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:22:36,455 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:22:36,460 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:36,465 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:36,465 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:36,560 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:36,562 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:22:36,562 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-24 17:22:36,562 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:22:36,562 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 17:22:36,562 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 17:22:36,562 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-24 17:22:36,563 INFO L87 Difference]: Start difference. First operand 59 states and 59 transitions. Second operand 10 states. [2018-01-24 17:22:36,583 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:36,583 INFO L93 Difference]: Finished difference Result 92 states and 92 transitions. [2018-01-24 17:22:36,584 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-24 17:22:36,584 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 58 [2018-01-24 17:22:36,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:36,584 INFO L225 Difference]: With dead ends: 92 [2018-01-24 17:22:36,584 INFO L226 Difference]: Without dead ends: 60 [2018-01-24 17:22:36,585 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 240 GetRequests, 222 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=133, Invalid=173, Unknown=0, NotChecked=0, Total=306 [2018-01-24 17:22:36,585 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 60 states. [2018-01-24 17:22:36,591 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 60 to 60. [2018-01-24 17:22:36,591 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-01-24 17:22:36,591 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 60 transitions. [2018-01-24 17:22:36,592 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 60 transitions. Word has length 58 [2018-01-24 17:22:36,592 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:36,592 INFO L432 AbstractCegarLoop]: Abstraction has 60 states and 60 transitions. [2018-01-24 17:22:36,592 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 17:22:36,592 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 60 transitions. [2018-01-24 17:22:36,592 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-01-24 17:22:36,592 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:36,592 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:36,592 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:36,593 INFO L82 PathProgramCache]: Analyzing trace with hash -648862830, now seen corresponding path program 4 times [2018-01-24 17:22:36,593 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:36,593 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:36,593 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:22:36,593 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:36,593 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:36,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:36,609 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:36,677 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:36,678 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:36,678 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:22:36,678 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:22:36,678 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:22:36,678 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:36,678 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:22:36,689 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-24 17:22:36,690 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-24 17:22:36,731 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:22:36,734 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:36,742 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:36,742 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:36,908 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:36,928 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:36,928 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:22:36,931 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-24 17:22:36,931 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-24 17:22:36,998 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:22:37,002 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:37,007 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:37,007 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:37,094 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:37,095 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:22:37,095 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-24 17:22:37,096 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:22:37,096 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-24 17:22:37,096 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-24 17:22:37,096 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-24 17:22:37,096 INFO L87 Difference]: Start difference. First operand 60 states and 60 transitions. Second operand 11 states. [2018-01-24 17:22:37,123 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:37,123 INFO L93 Difference]: Finished difference Result 93 states and 93 transitions. [2018-01-24 17:22:37,123 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 17:22:37,123 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 59 [2018-01-24 17:22:37,123 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:37,124 INFO L225 Difference]: With dead ends: 93 [2018-01-24 17:22:37,124 INFO L226 Difference]: Without dead ends: 61 [2018-01-24 17:22:37,124 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 245 GetRequests, 225 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=167, Invalid=213, Unknown=0, NotChecked=0, Total=380 [2018-01-24 17:22:37,124 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2018-01-24 17:22:37,134 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 61. [2018-01-24 17:22:37,135 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61 states. [2018-01-24 17:22:37,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 61 transitions. [2018-01-24 17:22:37,136 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 61 transitions. Word has length 59 [2018-01-24 17:22:37,136 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:37,136 INFO L432 AbstractCegarLoop]: Abstraction has 61 states and 61 transitions. [2018-01-24 17:22:37,136 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-24 17:22:37,136 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 61 transitions. [2018-01-24 17:22:37,137 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-01-24 17:22:37,137 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:37,137 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:37,137 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:37,137 INFO L82 PathProgramCache]: Analyzing trace with hash -1508445558, now seen corresponding path program 5 times [2018-01-24 17:22:37,137 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:37,138 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:37,138 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:22:37,139 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:37,139 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:37,154 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:37,156 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:37,355 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:37,355 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:37,355 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:22:37,356 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:22:37,356 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:22:37,356 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:37,356 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:22:37,382 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-24 17:22:37,382 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:22:37,393 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:22:37,407 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:22:37,421 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:22:37,436 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:22:37,477 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:22:37,479 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:22:37,482 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:37,525 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:37,525 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:37,753 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:37,773 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:37,773 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:22:37,779 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-24 17:22:37,779 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:22:37,790 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:22:37,795 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:22:37,804 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:22:37,820 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:22:37,868 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:22:37,892 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:22:37,898 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:37,905 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:37,905 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:38,018 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:38,019 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:22:38,019 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 21 [2018-01-24 17:22:38,019 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:22:38,020 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-24 17:22:38,020 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-24 17:22:38,020 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=192, Invalid=228, Unknown=0, NotChecked=0, Total=420 [2018-01-24 17:22:38,020 INFO L87 Difference]: Start difference. First operand 61 states and 61 transitions. Second operand 12 states. [2018-01-24 17:22:38,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:22:38,057 INFO L93 Difference]: Finished difference Result 94 states and 94 transitions. [2018-01-24 17:22:38,057 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 17:22:38,057 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 60 [2018-01-24 17:22:38,057 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:22:38,057 INFO L225 Difference]: With dead ends: 94 [2018-01-24 17:22:38,058 INFO L226 Difference]: Without dead ends: 62 [2018-01-24 17:22:38,058 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 250 GetRequests, 228 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=205, Invalid=257, Unknown=0, NotChecked=0, Total=462 [2018-01-24 17:22:38,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states. [2018-01-24 17:22:38,065 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 62. [2018-01-24 17:22:38,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62 states. [2018-01-24 17:22:38,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 62 transitions. [2018-01-24 17:22:38,065 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 62 transitions. Word has length 60 [2018-01-24 17:22:38,065 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:22:38,065 INFO L432 AbstractCegarLoop]: Abstraction has 62 states and 62 transitions. [2018-01-24 17:22:38,066 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-24 17:22:38,066 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 62 transitions. [2018-01-24 17:22:38,066 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 62 [2018-01-24 17:22:38,066 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:22:38,066 INFO L322 BasicCegarLoop]: trace histogram [8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:22:38,066 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:22:38,067 INFO L82 PathProgramCache]: Analyzing trace with hash 1909260946, now seen corresponding path program 6 times [2018-01-24 17:22:38,067 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:22:38,068 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:38,068 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:22:38,068 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:22:38,068 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:22:38,079 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:22:38,080 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:22:38,167 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:38,167 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:38,167 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:22:38,167 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:22:38,168 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:22:38,168 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:38,168 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:22:38,173 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-24 17:22:38,173 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-24 17:22:38,196 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:22:38,203 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:22:38,223 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:22:38,320 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:22:38,670 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:22:38,671 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:22:38,674 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:22:38,682 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:38,682 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:22:39,022 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:22:39,043 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:22:39,043 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:22:39,046 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-24 17:22:39,047 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-24 17:22:39,086 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:22:39,115 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:22:39,808 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:22:51,829 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:23:03,884 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-24 17:23:03,939 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:23:03,945 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:23:03,950 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:23:03,951 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:23:04,073 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:23:04,075 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:23:04,075 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 23 [2018-01-24 17:23:04,075 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:23:04,076 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-24 17:23:04,076 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-24 17:23:04,076 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=232, Invalid=274, Unknown=0, NotChecked=0, Total=506 [2018-01-24 17:23:04,076 INFO L87 Difference]: Start difference. First operand 62 states and 62 transitions. Second operand 13 states. [2018-01-24 17:23:04,106 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:23:04,106 INFO L93 Difference]: Finished difference Result 95 states and 95 transitions. [2018-01-24 17:23:04,108 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-24 17:23:04,108 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 61 [2018-01-24 17:23:04,108 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:23:04,109 INFO L225 Difference]: With dead ends: 95 [2018-01-24 17:23:04,109 INFO L226 Difference]: Without dead ends: 63 [2018-01-24 17:23:04,109 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 255 GetRequests, 231 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 59 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=246, Invalid=306, Unknown=0, NotChecked=0, Total=552 [2018-01-24 17:23:04,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2018-01-24 17:23:04,117 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 63. [2018-01-24 17:23:04,117 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-01-24 17:23:04,118 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 63 transitions. [2018-01-24 17:23:04,118 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 63 transitions. Word has length 61 [2018-01-24 17:23:04,118 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:23:04,118 INFO L432 AbstractCegarLoop]: Abstraction has 63 states and 63 transitions. [2018-01-24 17:23:04,118 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-24 17:23:04,118 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 63 transitions. [2018-01-24 17:23:04,119 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-01-24 17:23:04,119 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:23:04,119 INFO L322 BasicCegarLoop]: trace histogram [9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:23:04,119 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:23:04,119 INFO L82 PathProgramCache]: Analyzing trace with hash 483980170, now seen corresponding path program 7 times [2018-01-24 17:23:04,119 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:23:04,120 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:23:04,120 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:23:04,120 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:23:04,120 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:23:04,131 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:23:04,132 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:23:04,306 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:23:04,306 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:23:04,306 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:23:04,306 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:23:04,306 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:23:04,306 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:23:04,306 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:23:04,311 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:23:04,312 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:23:04,339 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:23:04,341 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:23:04,349 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:23:04,349 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:23:04,610 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:23:04,631 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:23:04,631 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:23:04,634 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:23:04,634 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:23:04,689 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:23:04,694 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:23:04,699 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:23:04,699 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:23:04,835 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:23:04,837 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:23:04,837 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 25 [2018-01-24 17:23:04,837 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:23:04,837 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-24 17:23:04,837 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-24 17:23:04,838 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=272, Invalid=328, Unknown=0, NotChecked=0, Total=600 [2018-01-24 17:23:04,838 INFO L87 Difference]: Start difference. First operand 63 states and 63 transitions. Second operand 14 states. [2018-01-24 17:23:04,898 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:23:04,898 INFO L93 Difference]: Finished difference Result 96 states and 96 transitions. [2018-01-24 17:23:04,901 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-24 17:23:04,902 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 62 [2018-01-24 17:23:04,902 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:23:04,903 INFO L225 Difference]: With dead ends: 96 [2018-01-24 17:23:04,903 INFO L226 Difference]: Without dead ends: 64 [2018-01-24 17:23:04,903 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 260 GetRequests, 234 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 84 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=287, Invalid=363, Unknown=0, NotChecked=0, Total=650 [2018-01-24 17:23:04,904 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2018-01-24 17:23:04,916 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 64. [2018-01-24 17:23:04,916 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 64 states. [2018-01-24 17:23:04,917 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 64 states to 64 states and 64 transitions. [2018-01-24 17:23:04,917 INFO L78 Accepts]: Start accepts. Automaton has 64 states and 64 transitions. Word has length 62 [2018-01-24 17:23:04,917 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:23:04,917 INFO L432 AbstractCegarLoop]: Abstraction has 64 states and 64 transitions. [2018-01-24 17:23:04,917 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-24 17:23:04,917 INFO L276 IsEmpty]: Start isEmpty. Operand 64 states and 64 transitions. [2018-01-24 17:23:04,918 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-01-24 17:23:04,918 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:23:04,918 INFO L322 BasicCegarLoop]: trace histogram [10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:23:04,918 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:23:04,919 INFO L82 PathProgramCache]: Analyzing trace with hash -750050926, now seen corresponding path program 8 times [2018-01-24 17:23:04,919 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:23:04,920 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:23:04,920 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:23:04,920 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:23:04,920 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:23:04,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:23:04,938 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:23:05,081 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:23:05,081 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:23:05,081 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:23:05,081 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:23:05,081 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:23:05,081 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:23:05,081 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:23:05,092 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:23:05,092 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:23:05,114 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:23:05,128 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:23:05,130 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:23:05,133 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:23:05,141 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:23:05,142 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:23:05,545 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:23:05,566 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:23:05,566 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:23:05,573 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:23:05,573 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:23:05,608 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:23:05,645 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:23:05,675 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:23:05,683 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:23:05,688 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:23:05,688 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:23:05,889 INFO L134 CoverageAnalysis]: Checked inductivity of 55 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:23:05,891 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:23:05,891 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 27 [2018-01-24 17:23:05,891 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:23:05,892 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 17:23:05,892 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 17:23:05,892 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=312, Invalid=390, Unknown=0, NotChecked=0, Total=702 [2018-01-24 17:23:05,893 INFO L87 Difference]: Start difference. First operand 64 states and 64 transitions. Second operand 15 states. [2018-01-24 17:23:05,972 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:23:05,972 INFO L93 Difference]: Finished difference Result 97 states and 97 transitions. [2018-01-24 17:23:05,974 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-24 17:23:05,974 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 63 [2018-01-24 17:23:05,974 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:23:05,975 INFO L225 Difference]: With dead ends: 97 [2018-01-24 17:23:05,975 INFO L226 Difference]: Without dead ends: 65 [2018-01-24 17:23:05,975 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 265 GetRequests, 237 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 113 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=328, Invalid=428, Unknown=0, NotChecked=0, Total=756 [2018-01-24 17:23:05,975 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 65 states. [2018-01-24 17:23:05,983 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 65 to 65. [2018-01-24 17:23:05,983 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65 states. [2018-01-24 17:23:05,984 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 65 transitions. [2018-01-24 17:23:05,984 INFO L78 Accepts]: Start accepts. Automaton has 65 states and 65 transitions. Word has length 63 [2018-01-24 17:23:05,984 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:23:05,984 INFO L432 AbstractCegarLoop]: Abstraction has 65 states and 65 transitions. [2018-01-24 17:23:05,984 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 17:23:05,984 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 65 transitions. [2018-01-24 17:23:05,985 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-01-24 17:23:05,985 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:23:05,985 INFO L322 BasicCegarLoop]: trace histogram [11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:23:05,985 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:23:05,986 INFO L82 PathProgramCache]: Analyzing trace with hash -350309238, now seen corresponding path program 9 times [2018-01-24 17:23:05,986 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:23:05,986 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:23:05,987 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:23:05,987 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:23:05,987 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:23:05,999 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:23:06,000 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:23:06,188 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:23:06,188 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:23:06,188 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:23:06,188 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:23:06,188 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:23:06,188 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:23:06,188 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:23:06,206 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 17:23:06,206 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 17:23:06,228 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:23:06,234 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:23:06,253 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:23:06,400 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:23:06,969 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:23:07,963 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:23:08,755 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:23:08,757 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:23:08,762 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:23:08,771 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:23:08,771 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:23:09,096 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:23:09,117 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:23:09,129 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:23:09,132 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 17:23:09,132 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 17:23:09,164 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:23:09,190 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:23:09,305 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:23:09,603 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:23:21,618 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command Received shutdown request... Cannot interrupt operation gracefully because timeout expired. Forcing shutdown