java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_3_false-valid-deref.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-24 17:16:13,498 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-24 17:16:13,499 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-24 17:16:13,513 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-24 17:16:13,514 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-24 17:16:13,515 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-24 17:16:13,516 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-24 17:16:13,518 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-24 17:16:13,520 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-24 17:16:13,520 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-24 17:16:13,521 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-24 17:16:13,522 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-24 17:16:13,523 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-24 17:16:13,524 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-24 17:16:13,525 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-24 17:16:13,528 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-24 17:16:13,531 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-24 17:16:13,532 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-24 17:16:13,534 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-24 17:16:13,535 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-24 17:16:13,538 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-24 17:16:13,538 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-24 17:16:13,538 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-24 17:16:13,539 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-24 17:16:13,540 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-24 17:16:13,541 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-24 17:16:13,541 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-24 17:16:13,542 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-24 17:16:13,542 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-24 17:16:13,542 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-24 17:16:13,543 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-24 17:16:13,543 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf [2018-01-24 17:16:13,553 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-24 17:16:13,554 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-24 17:16:13,554 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-24 17:16:13,555 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-24 17:16:13,555 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-24 17:16:13,555 INFO L133 SettingsManager]: * Deactivate Weak Equivalences=true [2018-01-24 17:16:13,555 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-24 17:16:13,556 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-24 17:16:13,556 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-24 17:16:13,556 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-24 17:16:13,557 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-24 17:16:13,557 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-24 17:16:13,557 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-24 17:16:13,557 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-24 17:16:13,557 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-24 17:16:13,558 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-24 17:16:13,558 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-24 17:16:13,558 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-24 17:16:13,558 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-24 17:16:13,558 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-24 17:16:13,559 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-24 17:16:13,559 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-24 17:16:13,559 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-24 17:16:13,559 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-24 17:16:13,559 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 17:16:13,560 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-24 17:16:13,560 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-24 17:16:13,560 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-24 17:16:13,560 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-24 17:16:13,560 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-24 17:16:13,561 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-24 17:16:13,561 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-24 17:16:13,561 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-24 17:16:13,561 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-24 17:16:13,562 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-24 17:16:13,562 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-24 17:16:13,599 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-24 17:16:13,612 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-24 17:16:13,616 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-24 17:16:13,618 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-24 17:16:13,619 INFO L276 PluginConnector]: CDTParser initialized [2018-01-24 17:16:13,619 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_3_false-valid-deref.i [2018-01-24 17:16:13,826 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-24 17:16:13,833 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-24 17:16:13,834 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-24 17:16:13,834 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-24 17:16:13,842 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-24 17:16:13,843 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 05:16:13" (1/1) ... [2018-01-24 17:16:13,847 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@388a8c3f and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:16:13, skipping insertion in model container [2018-01-24 17:16:13,847 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 05:16:13" (1/1) ... [2018-01-24 17:16:13,866 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 17:16:13,918 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 17:16:14,034 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 17:16:14,057 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 17:16:14,068 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:16:14 WrapperNode [2018-01-24 17:16:14,069 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-24 17:16:14,069 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-24 17:16:14,069 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-24 17:16:14,070 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-24 17:16:14,081 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:16:14" (1/1) ... [2018-01-24 17:16:14,081 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:16:14" (1/1) ... [2018-01-24 17:16:14,092 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:16:14" (1/1) ... [2018-01-24 17:16:14,092 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:16:14" (1/1) ... [2018-01-24 17:16:14,103 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:16:14" (1/1) ... [2018-01-24 17:16:14,107 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:16:14" (1/1) ... [2018-01-24 17:16:14,108 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:16:14" (1/1) ... [2018-01-24 17:16:14,111 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-24 17:16:14,111 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-24 17:16:14,111 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-24 17:16:14,112 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-24 17:16:14,112 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:16:14" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 17:16:14,157 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-24 17:16:14,157 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-24 17:16:14,158 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-01-24 17:16:14,158 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-01-24 17:16:14,158 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-01-24 17:16:14,158 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-01-24 17:16:14,158 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-01-24 17:16:14,158 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-01-24 17:16:14,158 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-01-24 17:16:14,158 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-01-24 17:16:14,158 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-01-24 17:16:14,158 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-01-24 17:16:14,159 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-01-24 17:16:14,159 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-01-24 17:16:14,159 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-01-24 17:16:14,159 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-01-24 17:16:14,159 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-24 17:16:14,159 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-24 17:16:14,159 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-24 17:16:14,160 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-24 17:16:14,160 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-24 17:16:14,160 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-24 17:16:14,160 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-24 17:16:14,160 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-24 17:16:14,160 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-24 17:16:14,161 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-24 17:16:14,161 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-24 17:16:14,161 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-24 17:16:14,161 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-24 17:16:14,161 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-24 17:16:14,162 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-01-24 17:16:14,162 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-01-24 17:16:14,162 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-01-24 17:16:14,162 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-01-24 17:16:14,162 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-01-24 17:16:14,162 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-01-24 17:16:14,162 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-01-24 17:16:14,163 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-01-24 17:16:14,163 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-01-24 17:16:14,163 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-01-24 17:16:14,163 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-01-24 17:16:14,163 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-01-24 17:16:14,163 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-01-24 17:16:14,163 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-01-24 17:16:14,164 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-24 17:16:14,164 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-24 17:16:14,164 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-24 17:16:14,402 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-01-24 17:16:14,577 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-24 17:16:14,577 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 05:16:14 BoogieIcfgContainer [2018-01-24 17:16:14,578 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-24 17:16:14,578 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-24 17:16:14,578 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-24 17:16:14,580 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-24 17:16:14,581 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.01 05:16:13" (1/3) ... [2018-01-24 17:16:14,582 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1c06a003 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 05:16:14, skipping insertion in model container [2018-01-24 17:16:14,582 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:16:14" (2/3) ... [2018-01-24 17:16:14,582 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@1c06a003 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 05:16:14, skipping insertion in model container [2018-01-24 17:16:14,582 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 05:16:14" (3/3) ... [2018-01-24 17:16:14,584 INFO L105 eAbstractionObserver]: Analyzing ICFG memleaks_test22_3_false-valid-deref.i [2018-01-24 17:16:14,592 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-24 17:16:14,598 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 19 error locations. [2018-01-24 17:16:14,651 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-24 17:16:14,652 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-24 17:16:14,652 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-24 17:16:14,652 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-24 17:16:14,652 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-24 17:16:14,652 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-24 17:16:14,652 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-24 17:16:14,653 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-24 17:16:14,654 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-24 17:16:14,676 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states. [2018-01-24 17:16:14,682 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-24 17:16:14,683 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:14,684 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:14,684 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:14,688 INFO L82 PathProgramCache]: Analyzing trace with hash 556227080, now seen corresponding path program 1 times [2018-01-24 17:16:14,689 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:14,738 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:14,739 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:14,739 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:14,739 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:14,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:14,794 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:15,017 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:15,019 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:16:15,020 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 17:16:15,020 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:15,022 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 17:16:15,033 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 17:16:15,034 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:16:15,036 INFO L87 Difference]: Start difference. First operand 119 states. Second operand 5 states. [2018-01-24 17:16:15,127 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:15,128 INFO L93 Difference]: Finished difference Result 226 states and 241 transitions. [2018-01-24 17:16:15,128 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 17:16:15,130 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-01-24 17:16:15,130 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:15,144 INFO L225 Difference]: With dead ends: 226 [2018-01-24 17:16:15,145 INFO L226 Difference]: Without dead ends: 122 [2018-01-24 17:16:15,149 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:16:15,164 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-01-24 17:16:15,191 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 120. [2018-01-24 17:16:15,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-01-24 17:16:15,196 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 128 transitions. [2018-01-24 17:16:15,197 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 128 transitions. Word has length 17 [2018-01-24 17:16:15,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:15,198 INFO L432 AbstractCegarLoop]: Abstraction has 120 states and 128 transitions. [2018-01-24 17:16:15,198 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 17:16:15,198 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 128 transitions. [2018-01-24 17:16:15,198 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 17:16:15,198 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:15,199 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:15,199 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:15,199 INFO L82 PathProgramCache]: Analyzing trace with hash -1895274134, now seen corresponding path program 1 times [2018-01-24 17:16:15,199 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:15,201 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:15,201 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:15,201 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:15,201 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:15,224 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:15,225 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:15,295 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:15,296 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:16:15,296 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 17:16:15,296 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:15,297 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 17:16:15,297 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 17:16:15,298 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 17:16:15,298 INFO L87 Difference]: Start difference. First operand 120 states and 128 transitions. Second operand 6 states. [2018-01-24 17:16:15,482 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:15,482 INFO L93 Difference]: Finished difference Result 122 states and 130 transitions. [2018-01-24 17:16:15,482 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 17:16:15,482 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-01-24 17:16:15,483 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:15,485 INFO L225 Difference]: With dead ends: 122 [2018-01-24 17:16:15,485 INFO L226 Difference]: Without dead ends: 121 [2018-01-24 17:16:15,486 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 17:16:15,486 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-01-24 17:16:15,497 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 119. [2018-01-24 17:16:15,497 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-01-24 17:16:15,499 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 127 transitions. [2018-01-24 17:16:15,499 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 127 transitions. Word has length 19 [2018-01-24 17:16:15,500 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:15,500 INFO L432 AbstractCegarLoop]: Abstraction has 119 states and 127 transitions. [2018-01-24 17:16:15,500 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 17:16:15,500 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 127 transitions. [2018-01-24 17:16:15,501 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 17:16:15,501 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:15,501 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:15,501 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:15,502 INFO L82 PathProgramCache]: Analyzing trace with hash -1895274133, now seen corresponding path program 1 times [2018-01-24 17:16:15,502 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:15,503 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:15,503 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:15,503 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:15,504 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:15,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:15,525 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:15,730 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:15,730 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:16:15,730 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 17:16:15,730 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:15,731 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 17:16:15,731 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 17:16:15,731 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 17:16:15,731 INFO L87 Difference]: Start difference. First operand 119 states and 127 transitions. Second operand 7 states. [2018-01-24 17:16:15,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:15,976 INFO L93 Difference]: Finished difference Result 121 states and 129 transitions. [2018-01-24 17:16:15,977 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 17:16:15,978 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-01-24 17:16:15,978 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:15,980 INFO L225 Difference]: With dead ends: 121 [2018-01-24 17:16:15,980 INFO L226 Difference]: Without dead ends: 120 [2018-01-24 17:16:15,981 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-01-24 17:16:15,981 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-01-24 17:16:15,992 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 118. [2018-01-24 17:16:15,992 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-01-24 17:16:15,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 126 transitions. [2018-01-24 17:16:15,995 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 126 transitions. Word has length 19 [2018-01-24 17:16:15,995 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:15,995 INFO L432 AbstractCegarLoop]: Abstraction has 118 states and 126 transitions. [2018-01-24 17:16:15,995 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 17:16:15,996 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 126 transitions. [2018-01-24 17:16:15,997 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-24 17:16:15,997 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:15,997 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:15,998 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:15,998 INFO L82 PathProgramCache]: Analyzing trace with hash 1715794329, now seen corresponding path program 1 times [2018-01-24 17:16:15,998 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:15,999 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:15,999 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:16,000 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:16,000 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:16,025 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:16,026 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:16,143 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:16,144 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:16:16,144 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-24 17:16:16,144 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:16,145 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 17:16:16,145 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 17:16:16,145 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 17:16:16,145 INFO L87 Difference]: Start difference. First operand 118 states and 126 transitions. Second operand 7 states. [2018-01-24 17:16:16,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:16,228 INFO L93 Difference]: Finished difference Result 188 states and 203 transitions. [2018-01-24 17:16:16,228 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 17:16:16,228 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 29 [2018-01-24 17:16:16,229 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:16,230 INFO L225 Difference]: With dead ends: 188 [2018-01-24 17:16:16,230 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 17:16:16,231 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-01-24 17:16:16,231 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 17:16:16,243 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 127. [2018-01-24 17:16:16,243 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-01-24 17:16:16,244 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 136 transitions. [2018-01-24 17:16:16,245 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 136 transitions. Word has length 29 [2018-01-24 17:16:16,246 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:16,246 INFO L432 AbstractCegarLoop]: Abstraction has 127 states and 136 transitions. [2018-01-24 17:16:16,246 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 17:16:16,246 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 136 transitions. [2018-01-24 17:16:16,247 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 17:16:16,247 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:16,247 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:16,247 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:16,247 INFO L82 PathProgramCache]: Analyzing trace with hash -785661208, now seen corresponding path program 1 times [2018-01-24 17:16:16,248 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:16,249 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:16,249 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:16,249 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:16,249 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:16,268 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:16,269 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:16,395 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:16,395 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:16:16,396 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 17:16:16,396 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:16,396 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 17:16:16,397 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 17:16:16,397 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:16:16,397 INFO L87 Difference]: Start difference. First operand 127 states and 136 transitions. Second operand 10 states. [2018-01-24 17:16:16,623 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:16,623 INFO L93 Difference]: Finished difference Result 127 states and 136 transitions. [2018-01-24 17:16:16,624 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 17:16:16,624 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 34 [2018-01-24 17:16:16,624 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:16,625 INFO L225 Difference]: With dead ends: 127 [2018-01-24 17:16:16,626 INFO L226 Difference]: Without dead ends: 126 [2018-01-24 17:16:16,626 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:16:16,627 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-01-24 17:16:16,637 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 126. [2018-01-24 17:16:16,638 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-01-24 17:16:16,639 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 135 transitions. [2018-01-24 17:16:16,639 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 135 transitions. Word has length 34 [2018-01-24 17:16:16,640 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:16,640 INFO L432 AbstractCegarLoop]: Abstraction has 126 states and 135 transitions. [2018-01-24 17:16:16,640 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 17:16:16,640 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 135 transitions. [2018-01-24 17:16:16,641 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 17:16:16,641 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:16,642 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:16,642 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:16,642 INFO L82 PathProgramCache]: Analyzing trace with hash -785661207, now seen corresponding path program 1 times [2018-01-24 17:16:16,642 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:16,644 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:16,644 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:16,644 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:16,644 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:16,658 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:16,659 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:16,693 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:16,694 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:16:16,694 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 17:16:16,694 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:16,694 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 17:16:16,694 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 17:16:16,694 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 17:16:16,694 INFO L87 Difference]: Start difference. First operand 126 states and 135 transitions. Second operand 4 states. [2018-01-24 17:16:16,715 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:16,715 INFO L93 Difference]: Finished difference Result 218 states and 233 transitions. [2018-01-24 17:16:16,722 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 17:16:16,722 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2018-01-24 17:16:16,723 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:16,723 INFO L225 Difference]: With dead ends: 218 [2018-01-24 17:16:16,724 INFO L226 Difference]: Without dead ends: 127 [2018-01-24 17:16:16,724 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:16:16,724 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-01-24 17:16:16,733 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 127. [2018-01-24 17:16:16,733 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 127 states. [2018-01-24 17:16:16,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 127 states to 127 states and 136 transitions. [2018-01-24 17:16:16,735 INFO L78 Accepts]: Start accepts. Automaton has 127 states and 136 transitions. Word has length 34 [2018-01-24 17:16:16,735 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:16,735 INFO L432 AbstractCegarLoop]: Abstraction has 127 states and 136 transitions. [2018-01-24 17:16:16,735 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 17:16:16,736 INFO L276 IsEmpty]: Start isEmpty. Operand 127 states and 136 transitions. [2018-01-24 17:16:16,737 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-24 17:16:16,737 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:16,737 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:16,737 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:16,737 INFO L82 PathProgramCache]: Analyzing trace with hash -1322241719, now seen corresponding path program 1 times [2018-01-24 17:16:16,738 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:16,739 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:16,739 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:16,739 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:16,739 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:16,749 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:16,750 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:16,787 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-24 17:16:16,788 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:16:16,788 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 17:16:16,788 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:16,788 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 17:16:16,788 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 17:16:16,789 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 17:16:16,789 INFO L87 Difference]: Start difference. First operand 127 states and 136 transitions. Second operand 3 states. [2018-01-24 17:16:16,923 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:16,923 INFO L93 Difference]: Finished difference Result 144 states and 155 transitions. [2018-01-24 17:16:16,924 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 17:16:16,924 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 32 [2018-01-24 17:16:16,924 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:16,925 INFO L225 Difference]: With dead ends: 144 [2018-01-24 17:16:16,925 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 17:16:16,926 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 11 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 17:16:16,926 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 17:16:16,937 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 123. [2018-01-24 17:16:16,937 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-01-24 17:16:16,939 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 131 transitions. [2018-01-24 17:16:16,939 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 131 transitions. Word has length 32 [2018-01-24 17:16:16,939 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:16,939 INFO L432 AbstractCegarLoop]: Abstraction has 123 states and 131 transitions. [2018-01-24 17:16:16,939 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 17:16:16,939 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 131 transitions. [2018-01-24 17:16:16,940 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-24 17:16:16,940 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:16,941 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:16,941 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:16,941 INFO L82 PathProgramCache]: Analyzing trace with hash 1082750419, now seen corresponding path program 1 times [2018-01-24 17:16:16,941 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:16,943 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:16,943 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:16,943 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:16,943 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:16,956 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:16,958 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:17,035 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:17,035 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:17,035 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:16:17,036 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 36 with the following transitions: [2018-01-24 17:16:17,038 INFO L201 CegarAbsIntRunner]: [0], [2], [6], [10], [27], [32], [48], [54], [58], [62], [65], [67], [68], [72], [74], [75], [115], [118], [119], [120], [122], [123], [124], [132], [133], [134], [135], [136], [138], [142], [146], [152], [164], [165], [166] [2018-01-24 17:16:17,088 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:16:17,088 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:16:17,315 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:16:17,316 INFO L268 AbstractInterpreter]: Visited 35 different actions 39 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 21 variables. [2018-01-24 17:16:17,330 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:16:17,330 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:17,330 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:16:17,344 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:17,344 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:16:17,383 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:17,391 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:17,427 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:17,428 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:17,521 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:17,555 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:17,555 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:16:17,562 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:17,562 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:16:17,610 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:17,616 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:17,623 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:17,623 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:17,735 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:17,737 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:16:17,737 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-24 17:16:17,737 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:16:17,738 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 17:16:17,738 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 17:16:17,738 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-01-24 17:16:17,738 INFO L87 Difference]: Start difference. First operand 123 states and 131 transitions. Second operand 6 states. [2018-01-24 17:16:17,794 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:17,794 INFO L93 Difference]: Finished difference Result 215 states and 229 transitions. [2018-01-24 17:16:17,794 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 17:16:17,795 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-01-24 17:16:17,795 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:17,796 INFO L225 Difference]: With dead ends: 215 [2018-01-24 17:16:17,796 INFO L226 Difference]: Without dead ends: 124 [2018-01-24 17:16:17,797 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 134 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:16:17,797 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 124 states. [2018-01-24 17:16:17,807 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 124 to 124. [2018-01-24 17:16:17,807 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-01-24 17:16:17,809 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 132 transitions. [2018-01-24 17:16:17,809 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 132 transitions. Word has length 35 [2018-01-24 17:16:17,809 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:17,810 INFO L432 AbstractCegarLoop]: Abstraction has 124 states and 132 transitions. [2018-01-24 17:16:17,810 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 17:16:17,810 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 132 transitions. [2018-01-24 17:16:17,811 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 17:16:17,811 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:17,811 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:17,811 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:17,811 INFO L82 PathProgramCache]: Analyzing trace with hash -1962528345, now seen corresponding path program 1 times [2018-01-24 17:16:17,812 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:17,813 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:17,813 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:17,813 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:17,813 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:17,823 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:17,825 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:17,924 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-24 17:16:17,924 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:16:17,924 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 17:16:17,924 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:17,925 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 17:16:17,925 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 17:16:17,925 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 17:16:17,925 INFO L87 Difference]: Start difference. First operand 124 states and 132 transitions. Second operand 6 states. [2018-01-24 17:16:17,975 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:17,976 INFO L93 Difference]: Finished difference Result 128 states and 135 transitions. [2018-01-24 17:16:17,976 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 17:16:17,976 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 34 [2018-01-24 17:16:17,976 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:17,977 INFO L225 Difference]: With dead ends: 128 [2018-01-24 17:16:17,977 INFO L226 Difference]: Without dead ends: 115 [2018-01-24 17:16:17,978 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 17:16:17,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 115 states. [2018-01-24 17:16:17,985 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 115 to 115. [2018-01-24 17:16:17,985 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 115 states. [2018-01-24 17:16:17,986 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 115 states to 115 states and 121 transitions. [2018-01-24 17:16:17,986 INFO L78 Accepts]: Start accepts. Automaton has 115 states and 121 transitions. Word has length 34 [2018-01-24 17:16:17,987 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:17,987 INFO L432 AbstractCegarLoop]: Abstraction has 115 states and 121 transitions. [2018-01-24 17:16:17,987 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 17:16:17,987 INFO L276 IsEmpty]: Start isEmpty. Operand 115 states and 121 transitions. [2018-01-24 17:16:17,988 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 17:16:17,988 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:17,988 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:17,988 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:17,988 INFO L82 PathProgramCache]: Analyzing trace with hash -1126031319, now seen corresponding path program 2 times [2018-01-24 17:16:17,989 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:17,990 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:17,990 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:17,990 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:17,991 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:18,005 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:18,006 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:18,083 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:18,084 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:18,084 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:16:18,084 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:16:18,084 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:16:18,084 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:18,084 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:16:18,095 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:16:18,095 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:16:18,118 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:16:18,128 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:16:18,132 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:18,159 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 17:16:18,161 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:16:18,199 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 17:16:18,200 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:16:18,221 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 17:16:18,222 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 17:16:18,845 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 17:16:18,845 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:23,248 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 17:16:23,269 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 17:16:23,269 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14, 13] imperfect sequences [6] total 31 [2018-01-24 17:16:23,270 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:23,270 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 17:16:23,270 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 17:16:23,270 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=838, Unknown=2, NotChecked=0, Total=930 [2018-01-24 17:16:23,271 INFO L87 Difference]: Start difference. First operand 115 states and 121 transitions. Second operand 15 states. [2018-01-24 17:16:24,099 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:24,100 INFO L93 Difference]: Finished difference Result 115 states and 121 transitions. [2018-01-24 17:16:24,100 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-24 17:16:24,100 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 36 [2018-01-24 17:16:24,100 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:24,101 INFO L225 Difference]: With dead ends: 115 [2018-01-24 17:16:24,101 INFO L226 Difference]: Without dead ends: 114 [2018-01-24 17:16:24,102 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 237 ImplicationChecksByTransitivity, 5.1s TimeCoverageRelationStatistics Valid=118, Invalid=1070, Unknown=2, NotChecked=0, Total=1190 [2018-01-24 17:16:24,102 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 114 states. [2018-01-24 17:16:24,114 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 114 to 114. [2018-01-24 17:16:24,114 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-01-24 17:16:24,115 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 120 transitions. [2018-01-24 17:16:24,116 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 120 transitions. Word has length 36 [2018-01-24 17:16:24,116 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:24,116 INFO L432 AbstractCegarLoop]: Abstraction has 114 states and 120 transitions. [2018-01-24 17:16:24,116 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 17:16:24,116 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 120 transitions. [2018-01-24 17:16:24,117 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-24 17:16:24,117 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:24,117 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:24,117 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:24,117 INFO L82 PathProgramCache]: Analyzing trace with hash -504837186, now seen corresponding path program 1 times [2018-01-24 17:16:24,117 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:24,118 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:24,119 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:16:24,119 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:24,119 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:24,134 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:24,135 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:24,227 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 17:16:24,228 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:16:24,228 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 17:16:24,228 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:24,228 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 17:16:24,228 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 17:16:24,228 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:16:24,228 INFO L87 Difference]: Start difference. First operand 114 states and 120 transitions. Second operand 10 states. [2018-01-24 17:16:24,431 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:24,431 INFO L93 Difference]: Finished difference Result 114 states and 120 transitions. [2018-01-24 17:16:24,431 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 17:16:24,431 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 41 [2018-01-24 17:16:24,432 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:24,433 INFO L225 Difference]: With dead ends: 114 [2018-01-24 17:16:24,433 INFO L226 Difference]: Without dead ends: 112 [2018-01-24 17:16:24,433 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:16:24,434 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 112 states. [2018-01-24 17:16:24,445 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 112 to 112. [2018-01-24 17:16:24,445 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 112 states. [2018-01-24 17:16:24,446 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 112 states to 112 states and 118 transitions. [2018-01-24 17:16:24,446 INFO L78 Accepts]: Start accepts. Automaton has 112 states and 118 transitions. Word has length 41 [2018-01-24 17:16:24,447 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:24,447 INFO L432 AbstractCegarLoop]: Abstraction has 112 states and 118 transitions. [2018-01-24 17:16:24,447 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 17:16:24,447 INFO L276 IsEmpty]: Start isEmpty. Operand 112 states and 118 transitions. [2018-01-24 17:16:24,448 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-24 17:16:24,448 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:24,448 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:24,448 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:24,448 INFO L82 PathProgramCache]: Analyzing trace with hash -504837185, now seen corresponding path program 1 times [2018-01-24 17:16:24,449 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:24,450 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:24,450 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:24,450 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:24,450 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:24,461 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:24,462 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:24,534 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:24,534 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:24,534 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:16:24,534 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 42 with the following transitions: [2018-01-24 17:16:24,534 INFO L201 CegarAbsIntRunner]: [0], [2], [6], [10], [27], [32], [48], [54], [58], [62], [63], [66], [67], [68], [72], [74], [75], [107], [110], [115], [118], [119], [120], [122], [123], [124], [132], [133], [134], [135], [136], [138], [142], [146], [152], [153], [154], [164], [165], [166] [2018-01-24 17:16:24,536 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:16:24,537 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:16:24,654 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:16:24,654 INFO L268 AbstractInterpreter]: Visited 40 different actions 44 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 21 variables. [2018-01-24 17:16:24,659 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:16:24,659 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:24,659 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:16:24,670 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:24,671 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:16:24,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:24,704 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:24,724 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:24,725 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:24,902 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:24,923 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:24,923 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:16:24,927 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:24,927 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:16:24,972 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:24,978 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:24,983 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:24,984 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:25,007 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:25,009 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:16:25,009 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-24 17:16:25,009 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:16:25,009 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 17:16:25,010 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 17:16:25,010 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-01-24 17:16:25,010 INFO L87 Difference]: Start difference. First operand 112 states and 118 transitions. Second operand 7 states. [2018-01-24 17:16:25,043 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:25,044 INFO L93 Difference]: Finished difference Result 201 states and 213 transitions. [2018-01-24 17:16:25,044 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 17:16:25,044 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 41 [2018-01-24 17:16:25,045 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:25,046 INFO L225 Difference]: With dead ends: 201 [2018-01-24 17:16:25,046 INFO L226 Difference]: Without dead ends: 113 [2018-01-24 17:16:25,046 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 157 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=77, Unknown=0, NotChecked=0, Total=132 [2018-01-24 17:16:25,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 113 states. [2018-01-24 17:16:25,060 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 113 to 113. [2018-01-24 17:16:25,060 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-01-24 17:16:25,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 119 transitions. [2018-01-24 17:16:25,062 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 119 transitions. Word has length 41 [2018-01-24 17:16:25,062 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:25,062 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 119 transitions. [2018-01-24 17:16:25,062 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 17:16:25,063 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 119 transitions. [2018-01-24 17:16:25,063 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-24 17:16:25,063 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:25,064 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:25,064 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:25,064 INFO L82 PathProgramCache]: Analyzing trace with hash 1693572501, now seen corresponding path program 2 times [2018-01-24 17:16:25,064 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:25,065 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:25,066 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:25,066 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:25,066 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:25,082 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:25,083 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:25,149 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:25,149 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:25,149 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:16:25,149 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:16:25,149 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:16:25,149 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:25,149 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:16:25,157 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:16:25,157 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:16:25,177 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:16:25,185 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:16:25,189 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:25,194 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 17:16:25,195 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:16:25,207 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 17:16:25,208 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:16:25,222 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 17:16:25,222 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 17:16:25,840 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 17:16:25,840 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:26,236 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 17:16:26,258 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 17:16:26,258 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15, 13] imperfect sequences [7] total 33 [2018-01-24 17:16:26,259 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:26,259 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-24 17:16:26,259 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-24 17:16:26,260 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=951, Unknown=0, NotChecked=0, Total=1056 [2018-01-24 17:16:26,260 INFO L87 Difference]: Start difference. First operand 113 states and 119 transitions. Second operand 16 states. [2018-01-24 17:16:28,351 WARN L143 SmtUtils]: Spent 2046ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-24 17:16:28,971 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:28,971 INFO L93 Difference]: Finished difference Result 113 states and 119 transitions. [2018-01-24 17:16:28,971 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-24 17:16:28,971 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 42 [2018-01-24 17:16:28,972 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:28,972 INFO L225 Difference]: With dead ends: 113 [2018-01-24 17:16:28,972 INFO L226 Difference]: Without dead ends: 111 [2018-01-24 17:16:28,973 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 57 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 317 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=136, Invalid=1196, Unknown=0, NotChecked=0, Total=1332 [2018-01-24 17:16:28,973 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-01-24 17:16:28,984 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 111. [2018-01-24 17:16:28,984 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-01-24 17:16:28,985 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 117 transitions. [2018-01-24 17:16:28,985 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 117 transitions. Word has length 42 [2018-01-24 17:16:28,985 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:28,985 INFO L432 AbstractCegarLoop]: Abstraction has 111 states and 117 transitions. [2018-01-24 17:16:28,986 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-24 17:16:28,986 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 117 transitions. [2018-01-24 17:16:28,986 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-24 17:16:28,987 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:28,987 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:28,987 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:28,987 INFO L82 PathProgramCache]: Analyzing trace with hash 1966889947, now seen corresponding path program 1 times [2018-01-24 17:16:28,987 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:28,988 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:28,988 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:16:28,989 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:28,989 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:29,002 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:29,003 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:29,080 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 17:16:29,080 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:16:29,081 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-24 17:16:29,081 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:29,081 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 17:16:29,081 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 17:16:29,081 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-01-24 17:16:29,081 INFO L87 Difference]: Start difference. First operand 111 states and 117 transitions. Second operand 8 states. [2018-01-24 17:16:29,127 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:29,127 INFO L93 Difference]: Finished difference Result 175 states and 184 transitions. [2018-01-24 17:16:29,127 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 17:16:29,127 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 47 [2018-01-24 17:16:29,128 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:29,128 INFO L225 Difference]: With dead ends: 175 [2018-01-24 17:16:29,129 INFO L226 Difference]: Without dead ends: 111 [2018-01-24 17:16:29,129 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:16:29,129 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-01-24 17:16:29,145 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 111. [2018-01-24 17:16:29,145 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-01-24 17:16:29,146 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 116 transitions. [2018-01-24 17:16:29,147 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 116 transitions. Word has length 47 [2018-01-24 17:16:29,147 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:29,147 INFO L432 AbstractCegarLoop]: Abstraction has 111 states and 116 transitions. [2018-01-24 17:16:29,147 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 17:16:29,147 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 116 transitions. [2018-01-24 17:16:29,148 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-24 17:16:29,148 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:29,148 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:29,148 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:29,149 INFO L82 PathProgramCache]: Analyzing trace with hash 2136929804, now seen corresponding path program 1 times [2018-01-24 17:16:29,149 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:29,150 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:29,150 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:29,150 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:29,150 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:29,162 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:29,163 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:29,288 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 17:16:29,289 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:16:29,289 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-01-24 17:16:29,289 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:29,289 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 17:16:29,290 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 17:16:29,290 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:16:29,290 INFO L87 Difference]: Start difference. First operand 111 states and 116 transitions. Second operand 10 states. [2018-01-24 17:16:29,465 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:29,466 INFO L93 Difference]: Finished difference Result 177 states and 185 transitions. [2018-01-24 17:16:29,466 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 17:16:29,466 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 52 [2018-01-24 17:16:29,466 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:29,467 INFO L225 Difference]: With dead ends: 177 [2018-01-24 17:16:29,468 INFO L226 Difference]: Without dead ends: 111 [2018-01-24 17:16:29,468 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:16:29,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-01-24 17:16:29,483 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 111. [2018-01-24 17:16:29,483 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 111 states. [2018-01-24 17:16:29,484 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 111 states to 111 states and 115 transitions. [2018-01-24 17:16:29,484 INFO L78 Accepts]: Start accepts. Automaton has 111 states and 115 transitions. Word has length 52 [2018-01-24 17:16:29,484 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:29,485 INFO L432 AbstractCegarLoop]: Abstraction has 111 states and 115 transitions. [2018-01-24 17:16:29,485 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 17:16:29,485 INFO L276 IsEmpty]: Start isEmpty. Operand 111 states and 115 transitions. [2018-01-24 17:16:29,485 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-01-24 17:16:29,486 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:29,486 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:29,486 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:29,486 INFO L82 PathProgramCache]: Analyzing trace with hash -1070951830, now seen corresponding path program 1 times [2018-01-24 17:16:29,486 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:29,487 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:29,487 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:29,487 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:29,488 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:29,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:29,508 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:29,736 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 17:16:29,736 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:16:29,736 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2018-01-24 17:16:29,736 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:29,737 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-24 17:16:29,737 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-24 17:16:29,737 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=379, Unknown=0, NotChecked=0, Total=420 [2018-01-24 17:16:29,737 INFO L87 Difference]: Start difference. First operand 111 states and 115 transitions. Second operand 21 states. [2018-01-24 17:16:30,143 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:30,143 INFO L93 Difference]: Finished difference Result 141 states and 153 transitions. [2018-01-24 17:16:30,143 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-24 17:16:30,143 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 63 [2018-01-24 17:16:30,144 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:30,144 INFO L225 Difference]: With dead ends: 141 [2018-01-24 17:16:30,144 INFO L226 Difference]: Without dead ends: 139 [2018-01-24 17:16:30,145 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 27 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 57 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=69, Invalid=687, Unknown=0, NotChecked=0, Total=756 [2018-01-24 17:16:30,145 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 139 states. [2018-01-24 17:16:30,160 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 139 to 134. [2018-01-24 17:16:30,160 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-01-24 17:16:30,162 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 146 transitions. [2018-01-24 17:16:30,162 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 146 transitions. Word has length 63 [2018-01-24 17:16:30,162 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:30,162 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 146 transitions. [2018-01-24 17:16:30,162 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-24 17:16:30,163 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 146 transitions. [2018-01-24 17:16:30,163 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-01-24 17:16:30,163 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:30,163 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:30,164 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:30,164 INFO L82 PathProgramCache]: Analyzing trace with hash -1070951829, now seen corresponding path program 1 times [2018-01-24 17:16:30,164 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:30,165 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:30,165 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:30,165 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:30,165 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:30,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:30,185 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:30,253 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:30,253 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:30,253 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:16:30,253 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 64 with the following transitions: [2018-01-24 17:16:30,254 INFO L201 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [17], [20], [27], [32], [34], [35], [38], [48], [50], [54], [58], [61], [62], [63], [66], [67], [68], [72], [74], [75], [76], [107], [108], [111], [114], [115], [118], [119], [120], [122], [123], [124], [125], [132], [133], [134], [135], [136], [137], [138], [140], [142], [143], [146], [147], [148], [152], [153], [154], [155], [156], [162], [164], [165], [166] [2018-01-24 17:16:30,256 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:16:30,256 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:16:30,443 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:16:30,444 INFO L268 AbstractInterpreter]: Visited 61 different actions 65 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 26 variables. [2018-01-24 17:16:30,445 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:16:30,445 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:30,445 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:16:30,459 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:30,459 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:16:30,494 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:30,498 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:30,511 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:30,511 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:30,611 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:30,631 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:30,631 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:16:30,634 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:30,635 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:16:30,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:30,704 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:30,709 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:30,709 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:30,773 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:30,775 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:16:30,775 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-24 17:16:30,775 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:16:30,776 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 17:16:30,776 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 17:16:30,776 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:16:30,777 INFO L87 Difference]: Start difference. First operand 134 states and 146 transitions. Second operand 8 states. [2018-01-24 17:16:30,809 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:30,810 INFO L93 Difference]: Finished difference Result 244 states and 268 transitions. [2018-01-24 17:16:30,810 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 17:16:30,810 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 63 [2018-01-24 17:16:30,810 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:30,811 INFO L225 Difference]: With dead ends: 244 [2018-01-24 17:16:30,812 INFO L226 Difference]: Without dead ends: 135 [2018-01-24 17:16:30,812 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 258 GetRequests, 244 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=77, Invalid=105, Unknown=0, NotChecked=0, Total=182 [2018-01-24 17:16:30,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-01-24 17:16:30,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 135. [2018-01-24 17:16:30,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-01-24 17:16:30,833 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 147 transitions. [2018-01-24 17:16:30,833 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 147 transitions. Word has length 63 [2018-01-24 17:16:30,834 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:30,834 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 147 transitions. [2018-01-24 17:16:30,834 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 17:16:30,834 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 147 transitions. [2018-01-24 17:16:30,835 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-01-24 17:16:30,835 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:30,835 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:30,835 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:30,835 INFO L82 PathProgramCache]: Analyzing trace with hash -1223229503, now seen corresponding path program 2 times [2018-01-24 17:16:30,835 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:30,836 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:30,837 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:30,837 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:30,837 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:30,856 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:30,857 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:30,946 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:30,947 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:30,947 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:16:30,947 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:16:30,947 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:16:30,947 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:30,947 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:16:30,955 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:16:30,955 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:16:30,986 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:16:30,998 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:16:31,002 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:31,021 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 17:16:31,021 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:16:31,093 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 17:16:31,093 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:16:31,104 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 17:16:31,105 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 17:16:31,784 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 17:16:31,785 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:32,622 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 17:16:32,649 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 17:16:32,649 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20, 18] imperfect sequences [8] total 44 [2018-01-24 17:16:32,649 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:32,649 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-24 17:16:32,650 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-24 17:16:32,650 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=146, Invalid=1746, Unknown=0, NotChecked=0, Total=1892 [2018-01-24 17:16:32,650 INFO L87 Difference]: Start difference. First operand 135 states and 147 transitions. Second operand 21 states. [2018-01-24 17:16:33,590 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:33,591 INFO L93 Difference]: Finished difference Result 135 states and 147 transitions. [2018-01-24 17:16:33,591 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-24 17:16:33,591 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 64 [2018-01-24 17:16:33,591 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:33,592 INFO L225 Difference]: With dead ends: 135 [2018-01-24 17:16:33,592 INFO L226 Difference]: Without dead ends: 133 [2018-01-24 17:16:33,593 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 91 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 630 ImplicationChecksByTransitivity, 1.4s TimeCoverageRelationStatistics Valid=195, Invalid=2255, Unknown=0, NotChecked=0, Total=2450 [2018-01-24 17:16:33,593 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-01-24 17:16:33,613 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 133. [2018-01-24 17:16:33,613 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-01-24 17:16:33,613 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 143 transitions. [2018-01-24 17:16:33,614 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 143 transitions. Word has length 64 [2018-01-24 17:16:33,614 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:33,614 INFO L432 AbstractCegarLoop]: Abstraction has 133 states and 143 transitions. [2018-01-24 17:16:33,614 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-24 17:16:33,614 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 143 transitions. [2018-01-24 17:16:33,615 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-01-24 17:16:33,615 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:33,615 INFO L322 BasicCegarLoop]: trace histogram [4, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:33,615 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:33,615 INFO L82 PathProgramCache]: Analyzing trace with hash -577954366, now seen corresponding path program 1 times [2018-01-24 17:16:33,615 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:33,616 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:33,616 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:16:33,616 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:33,616 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:33,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:33,630 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:33,723 INFO L134 CoverageAnalysis]: Checked inductivity of 14 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 11 trivial. 0 not checked. [2018-01-24 17:16:33,723 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:33,724 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:16:33,724 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 68 with the following transitions: [2018-01-24 17:16:33,724 INFO L201 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [16], [17], [24], [26], [27], [32], [34], [48], [50], [53], [54], [58], [61], [62], [63], [66], [67], [68], [72], [74], [75], [107], [108], [111], [114], [115], [118], [119], [120], [122], [123], [124], [132], [133], [134], [135], [136], [137], [138], [139], [142], [143], [146], [147], [148], [149], [150], [151], [152], [153], [154], [155], [164], [165], [166] [2018-01-24 17:16:33,727 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:16:33,727 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:16:33,843 INFO L262 AbstractInterpreter]: Error location(s) were unreachable [2018-01-24 17:16:33,844 INFO L268 AbstractInterpreter]: Visited 54 different actions 58 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 22 variables. [2018-01-24 17:16:33,845 INFO L395 sIntCurrentIteration]: Generating AbsInt predicates [2018-01-24 17:16:34,002 INFO L232 lantSequenceWeakener]: Weakened 32 states. On average, predicates are now at 71.24% of their original sizes. [2018-01-24 17:16:34,002 INFO L408 sIntCurrentIteration]: Unifying AI predicates [2018-01-24 17:16:34,485 INFO L419 sIntCurrentIteration]: Finished generation of AbsInt predicates [2018-01-24 17:16:34,486 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-24 17:16:34,486 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [33] imperfect sequences [11] total 42 [2018-01-24 17:16:34,487 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:34,487 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-01-24 17:16:34,487 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-01-24 17:16:34,488 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=84, Invalid=972, Unknown=0, NotChecked=0, Total=1056 [2018-01-24 17:16:34,488 INFO L87 Difference]: Start difference. First operand 133 states and 143 transitions. Second operand 33 states. [2018-01-24 17:16:42,118 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:42,118 INFO L93 Difference]: Finished difference Result 207 states and 224 transitions. [2018-01-24 17:16:42,118 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-24 17:16:42,118 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 67 [2018-01-24 17:16:42,119 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:42,119 INFO L225 Difference]: With dead ends: 207 [2018-01-24 17:16:42,119 INFO L226 Difference]: Without dead ends: 147 [2018-01-24 17:16:42,120 INFO L525 BasicCegarLoop]: 2 DeclaredPredicates, 93 GetRequests, 35 SyntacticMatches, 1 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 726 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=256, Invalid=3166, Unknown=0, NotChecked=0, Total=3422 [2018-01-24 17:16:42,121 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 147 states. [2018-01-24 17:16:42,141 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 147 to 145. [2018-01-24 17:16:42,141 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-01-24 17:16:42,142 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 156 transitions. [2018-01-24 17:16:42,142 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 156 transitions. Word has length 67 [2018-01-24 17:16:42,143 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:42,143 INFO L432 AbstractCegarLoop]: Abstraction has 145 states and 156 transitions. [2018-01-24 17:16:42,143 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-01-24 17:16:42,143 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 156 transitions. [2018-01-24 17:16:42,144 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-01-24 17:16:42,144 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:42,144 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:42,144 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:42,145 INFO L82 PathProgramCache]: Analyzing trace with hash -1733951442, now seen corresponding path program 1 times [2018-01-24 17:16:42,145 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:42,146 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:42,146 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:42,146 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:42,146 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:42,165 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:42,167 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:42,511 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 17:16:42,512 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:16:42,512 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2018-01-24 17:16:42,512 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:42,512 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-24 17:16:42,512 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-24 17:16:42,512 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=551, Unknown=0, NotChecked=0, Total=600 [2018-01-24 17:16:42,513 INFO L87 Difference]: Start difference. First operand 145 states and 156 transitions. Second operand 25 states. [2018-01-24 17:16:43,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:43,502 INFO L93 Difference]: Finished difference Result 157 states and 172 transitions. [2018-01-24 17:16:43,502 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-24 17:16:43,502 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 78 [2018-01-24 17:16:43,502 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:43,503 INFO L225 Difference]: With dead ends: 157 [2018-01-24 17:16:43,504 INFO L226 Difference]: Without dead ends: 155 [2018-01-24 17:16:43,504 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 33 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 82 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=85, Invalid=1037, Unknown=0, NotChecked=0, Total=1122 [2018-01-24 17:16:43,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 155 states. [2018-01-24 17:16:43,522 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 155 to 151. [2018-01-24 17:16:43,523 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-01-24 17:16:43,523 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 166 transitions. [2018-01-24 17:16:43,523 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 166 transitions. Word has length 78 [2018-01-24 17:16:43,524 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:43,524 INFO L432 AbstractCegarLoop]: Abstraction has 151 states and 166 transitions. [2018-01-24 17:16:43,524 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-24 17:16:43,524 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 166 transitions. [2018-01-24 17:16:43,524 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-01-24 17:16:43,524 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:43,525 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:43,525 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:43,525 INFO L82 PathProgramCache]: Analyzing trace with hash -1733951441, now seen corresponding path program 1 times [2018-01-24 17:16:43,525 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:43,526 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:43,526 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:43,526 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:43,526 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:43,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:43,540 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:43,703 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:43,703 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:43,703 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:16:43,703 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 79 with the following transitions: [2018-01-24 17:16:43,704 INFO L201 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [17], [20], [27], [32], [34], [35], [36], [39], [40], [43], [44], [45], [48], [50], [54], [58], [61], [62], [63], [66], [67], [68], [72], [74], [75], [76], [78], [81], [86], [89], [92], [107], [108], [111], [114], [115], [118], [119], [120], [122], [123], [124], [125], [132], [133], [134], [135], [136], [137], [138], [140], [142], [143], [144], [146], [147], [148], [152], [153], [154], [155], [156], [157], [158], [160], [162], [164], [165], [166] [2018-01-24 17:16:43,706 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:16:43,706 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:16:43,793 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:16:43,793 INFO L268 AbstractInterpreter]: Visited 75 different actions 79 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 27 variables. [2018-01-24 17:16:43,795 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:16:43,795 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:43,795 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:16:43,808 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:43,809 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:16:43,861 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:43,864 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:43,977 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:43,977 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:44,113 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:44,134 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:44,134 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:16:44,139 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:44,139 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:16:44,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:44,221 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:44,227 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:44,227 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:44,293 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:44,295 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:16:44,295 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-24 17:16:44,296 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:16:44,296 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 17:16:44,296 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 17:16:44,296 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-24 17:16:44,297 INFO L87 Difference]: Start difference. First operand 151 states and 166 transitions. Second operand 9 states. [2018-01-24 17:16:44,364 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:44,364 INFO L93 Difference]: Finished difference Result 277 states and 307 transitions. [2018-01-24 17:16:44,365 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 17:16:44,365 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 78 [2018-01-24 17:16:44,365 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:44,366 INFO L225 Difference]: With dead ends: 277 [2018-01-24 17:16:44,366 INFO L226 Difference]: Without dead ends: 152 [2018-01-24 17:16:44,367 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 319 GetRequests, 303 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=103, Invalid=137, Unknown=0, NotChecked=0, Total=240 [2018-01-24 17:16:44,367 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-01-24 17:16:44,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 152. [2018-01-24 17:16:44,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-01-24 17:16:44,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 167 transitions. [2018-01-24 17:16:44,397 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 167 transitions. Word has length 78 [2018-01-24 17:16:44,397 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:44,397 INFO L432 AbstractCegarLoop]: Abstraction has 152 states and 167 transitions. [2018-01-24 17:16:44,397 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 17:16:44,397 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 167 transitions. [2018-01-24 17:16:44,398 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-01-24 17:16:44,398 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:44,398 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:44,398 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:44,399 INFO L82 PathProgramCache]: Analyzing trace with hash 1320320025, now seen corresponding path program 2 times [2018-01-24 17:16:44,399 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:44,399 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:44,400 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:44,400 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:44,400 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:44,420 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:44,421 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:44,507 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:44,507 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:44,508 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:16:44,508 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:16:44,508 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:16:44,508 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:44,508 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:16:44,516 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:16:44,516 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:16:44,564 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:16:44,572 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:16:44,578 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:44,583 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 17:16:44,584 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:16:44,601 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 17:16:44,602 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:16:44,625 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 17:16:44,626 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 17:16:45,504 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 17:16:45,505 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:48,388 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 17:16:48,408 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 17:16:48,408 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24, 22] imperfect sequences [9] total 53 [2018-01-24 17:16:48,409 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:16:48,409 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-24 17:16:48,409 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-24 17:16:48,410 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=181, Invalid=2574, Unknown=1, NotChecked=0, Total=2756 [2018-01-24 17:16:48,410 INFO L87 Difference]: Start difference. First operand 152 states and 167 transitions. Second operand 25 states. [2018-01-24 17:16:50,507 WARN L143 SmtUtils]: Spent 2042ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-24 17:16:51,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:51,649 INFO L93 Difference]: Finished difference Result 152 states and 167 transitions. [2018-01-24 17:16:51,650 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-24 17:16:51,650 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 79 [2018-01-24 17:16:51,650 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:51,651 INFO L225 Difference]: With dead ends: 152 [2018-01-24 17:16:51,651 INFO L226 Difference]: Without dead ends: 150 [2018-01-24 17:16:51,652 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 174 GetRequests, 111 SyntacticMatches, 4 SemanticMatches, 59 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 983 ImplicationChecksByTransitivity, 5.9s TimeCoverageRelationStatistics Valid=246, Invalid=3413, Unknown=1, NotChecked=0, Total=3660 [2018-01-24 17:16:51,652 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-01-24 17:16:51,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 150. [2018-01-24 17:16:51,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-01-24 17:16:51,675 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 164 transitions. [2018-01-24 17:16:51,675 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 164 transitions. Word has length 79 [2018-01-24 17:16:51,676 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:51,676 INFO L432 AbstractCegarLoop]: Abstraction has 150 states and 164 transitions. [2018-01-24 17:16:51,676 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-24 17:16:51,676 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 164 transitions. [2018-01-24 17:16:51,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-01-24 17:16:51,676 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:51,677 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:51,677 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:51,677 INFO L82 PathProgramCache]: Analyzing trace with hash 2055490650, now seen corresponding path program 1 times [2018-01-24 17:16:51,677 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:51,678 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:51,678 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:16:51,678 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:51,678 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:51,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:51,700 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:51,796 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:51,797 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:51,797 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:16:51,797 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 84 with the following transitions: [2018-01-24 17:16:51,797 INFO L201 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [17], [20], [27], [32], [34], [35], [36], [39], [40], [43], [44], [45], [48], [50], [54], [58], [61], [62], [63], [66], [67], [68], [72], [74], [75], [76], [78], [81], [86], [89], [90], [93], [94], [99], [101], [107], [108], [111], [114], [115], [118], [119], [120], [122], [123], [124], [125], [132], [133], [134], [135], [136], [137], [138], [140], [142], [143], [144], [146], [147], [148], [152], [153], [154], [155], [156], [157], [158], [160], [162], [164], [165], [166] [2018-01-24 17:16:51,799 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:16:51,799 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:16:51,917 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:16:51,918 INFO L268 AbstractInterpreter]: Visited 79 different actions 83 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 27 variables. [2018-01-24 17:16:51,930 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:16:51,930 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:51,930 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:16:51,946 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:51,946 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:16:52,001 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:52,005 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:52,030 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:52,030 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:52,196 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:52,217 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:52,217 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:16:52,223 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:52,223 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:16:52,359 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:52,369 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:52,377 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:52,378 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:52,472 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:52,474 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:16:52,475 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-24 17:16:52,475 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:16:52,475 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 17:16:52,476 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 17:16:52,476 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-24 17:16:52,476 INFO L87 Difference]: Start difference. First operand 150 states and 164 transitions. Second operand 10 states. [2018-01-24 17:16:52,543 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:52,543 INFO L93 Difference]: Finished difference Result 274 states and 302 transitions. [2018-01-24 17:16:52,543 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-24 17:16:52,543 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 83 [2018-01-24 17:16:52,544 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:52,545 INFO L225 Difference]: With dead ends: 274 [2018-01-24 17:16:52,545 INFO L226 Difference]: Without dead ends: 151 [2018-01-24 17:16:52,546 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 340 GetRequests, 322 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=133, Invalid=173, Unknown=0, NotChecked=0, Total=306 [2018-01-24 17:16:52,546 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-01-24 17:16:52,585 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 151. [2018-01-24 17:16:52,585 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-01-24 17:16:52,586 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 165 transitions. [2018-01-24 17:16:52,586 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 165 transitions. Word has length 83 [2018-01-24 17:16:52,586 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:52,587 INFO L432 AbstractCegarLoop]: Abstraction has 151 states and 165 transitions. [2018-01-24 17:16:52,587 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 17:16:52,587 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 165 transitions. [2018-01-24 17:16:52,587 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-01-24 17:16:52,588 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:52,588 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:52,588 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:52,588 INFO L82 PathProgramCache]: Analyzing trace with hash 526037680, now seen corresponding path program 2 times [2018-01-24 17:16:52,588 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:52,589 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:52,589 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:16:52,589 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:52,589 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:52,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:52,613 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:52,861 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:52,861 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:52,861 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:16:52,862 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:16:52,862 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:16:52,862 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:52,862 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:16:52,877 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:16:52,877 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:16:52,917 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:16:52,934 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:16:52,947 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:16:52,950 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:53,061 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:53,062 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:53,323 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:53,345 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:53,345 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:16:53,348 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:16:53,348 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:16:53,406 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:16:53,507 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:16:53,543 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:16:53,550 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:53,556 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:53,556 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:53,665 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:53,667 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:16:53,667 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-24 17:16:53,668 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:16:53,668 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-24 17:16:53,668 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-24 17:16:53,668 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-24 17:16:53,668 INFO L87 Difference]: Start difference. First operand 151 states and 165 transitions. Second operand 11 states. [2018-01-24 17:16:53,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:16:53,704 INFO L93 Difference]: Finished difference Result 275 states and 303 transitions. [2018-01-24 17:16:53,705 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 17:16:53,705 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 84 [2018-01-24 17:16:53,705 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:16:53,706 INFO L225 Difference]: With dead ends: 275 [2018-01-24 17:16:53,706 INFO L226 Difference]: Without dead ends: 152 [2018-01-24 17:16:53,706 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 345 GetRequests, 325 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=167, Invalid=213, Unknown=0, NotChecked=0, Total=380 [2018-01-24 17:16:53,707 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-01-24 17:16:53,727 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 152. [2018-01-24 17:16:53,727 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-01-24 17:16:53,728 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 166 transitions. [2018-01-24 17:16:53,728 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 166 transitions. Word has length 84 [2018-01-24 17:16:53,728 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:16:53,729 INFO L432 AbstractCegarLoop]: Abstraction has 152 states and 166 transitions. [2018-01-24 17:16:53,729 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-24 17:16:53,729 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 166 transitions. [2018-01-24 17:16:53,729 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 86 [2018-01-24 17:16:53,729 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:16:53,729 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:16:53,729 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:16:53,730 INFO L82 PathProgramCache]: Analyzing trace with hash 357635866, now seen corresponding path program 3 times [2018-01-24 17:16:53,730 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:16:53,730 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:53,731 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:16:53,731 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:16:53,731 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:16:53,745 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:16:53,746 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:16:53,926 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:53,926 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:53,927 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:16:53,927 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:16:53,927 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:16:53,927 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:53,927 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:16:53,934 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 17:16:53,934 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 17:16:53,971 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:16:53,989 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:16:54,042 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:16:54,157 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:16:54,488 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:16:54,489 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:16:54,507 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:16:54,537 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:54,537 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:16:54,746 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:16:54,770 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:16:54,771 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:16:54,775 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-24 17:16:54,775 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-24 17:16:54,834 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:16:54,936 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-24 17:16:55,507 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command Received shutdown request... Cannot interrupt operation gracefully because timeout expired. Forcing shutdown