java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_3_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-24 17:27:27,091 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-24 17:27:27,093 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-24 17:27:27,105 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-24 17:27:27,106 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-24 17:27:27,106 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-24 17:27:27,108 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-24 17:27:27,109 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-24 17:27:27,112 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-24 17:27:27,112 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-24 17:27:27,113 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-24 17:27:27,113 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-24 17:27:27,114 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-24 17:27:27,115 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-24 17:27:27,115 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-24 17:27:27,118 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-24 17:27:27,121 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-24 17:27:27,123 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-24 17:27:27,124 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-24 17:27:27,125 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-24 17:27:27,128 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-24 17:27:27,128 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-24 17:27:27,128 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-24 17:27:27,129 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-24 17:27:27,130 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-24 17:27:27,131 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-24 17:27:27,132 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-24 17:27:27,132 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-24 17:27:27,133 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-24 17:27:27,133 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-24 17:27:27,133 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-24 17:27:27,134 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf [2018-01-24 17:27:27,144 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-24 17:27:27,144 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-24 17:27:27,145 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-24 17:27:27,145 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-24 17:27:27,145 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-24 17:27:27,145 INFO L133 SettingsManager]: * Deactivate Weak Equivalences=true [2018-01-24 17:27:27,146 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-24 17:27:27,146 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-24 17:27:27,146 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-24 17:27:27,147 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-24 17:27:27,147 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-24 17:27:27,147 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-24 17:27:27,147 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-24 17:27:27,147 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-24 17:27:27,148 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-24 17:27:27,148 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-24 17:27:27,148 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-24 17:27:27,148 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-24 17:27:27,148 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-24 17:27:27,149 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-24 17:27:27,149 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-24 17:27:27,149 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-24 17:27:27,149 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-24 17:27:27,149 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-24 17:27:27,150 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 17:27:27,150 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-24 17:27:27,150 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-24 17:27:27,150 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-24 17:27:27,150 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-24 17:27:27,151 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-24 17:27:27,151 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-24 17:27:27,151 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-24 17:27:27,151 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-24 17:27:27,151 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-24 17:27:27,152 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-24 17:27:27,153 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-24 17:27:27,186 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-24 17:27:27,197 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-24 17:27:27,200 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-24 17:27:27,201 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-24 17:27:27,202 INFO L276 PluginConnector]: CDTParser initialized [2018-01-24 17:27:27,202 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_3_true-valid-memsafety_true-termination.i [2018-01-24 17:27:27,382 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-24 17:27:27,388 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-24 17:27:27,415 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-24 17:27:27,415 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-24 17:27:27,423 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-24 17:27:27,424 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 05:27:27" (1/1) ... [2018-01-24 17:27:27,427 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@42577689 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:27:27, skipping insertion in model container [2018-01-24 17:27:27,427 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 05:27:27" (1/1) ... [2018-01-24 17:27:27,447 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 17:27:27,501 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 17:27:27,627 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 17:27:27,652 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 17:27:27,665 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:27:27 WrapperNode [2018-01-24 17:27:27,665 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-24 17:27:27,666 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-24 17:27:27,666 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-24 17:27:27,666 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-24 17:27:27,681 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:27:27" (1/1) ... [2018-01-24 17:27:27,681 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:27:27" (1/1) ... [2018-01-24 17:27:27,697 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:27:27" (1/1) ... [2018-01-24 17:27:27,697 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:27:27" (1/1) ... [2018-01-24 17:27:27,706 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:27:27" (1/1) ... [2018-01-24 17:27:27,709 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:27:27" (1/1) ... [2018-01-24 17:27:27,711 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:27:27" (1/1) ... [2018-01-24 17:27:27,714 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-24 17:27:27,714 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-24 17:27:27,714 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-24 17:27:27,714 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-24 17:27:27,715 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:27:27" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 17:27:27,762 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-24 17:27:27,762 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-24 17:27:27,762 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-01-24 17:27:27,762 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-01-24 17:27:27,762 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-01-24 17:27:27,762 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_add_return [2018-01-24 17:27:27,763 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-01-24 17:27:27,763 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-01-24 17:27:27,763 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-01-24 17:27:27,763 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_get [2018-01-24 17:27:27,763 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-01-24 17:27:27,763 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-01-24 17:27:27,764 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-01-24 17:27:27,764 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-01-24 17:27:27,764 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_get [2018-01-24 17:27:27,764 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-01-24 17:27:27,764 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-01-24 17:27:27,764 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-01-24 17:27:27,765 INFO L136 BoogieDeclarations]: Found implementation of procedure f_22_get [2018-01-24 17:27:27,765 INFO L136 BoogieDeclarations]: Found implementation of procedure f_22_put [2018-01-24 17:27:27,765 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-01-24 17:27:27,765 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-24 17:27:27,765 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-24 17:27:27,766 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-24 17:27:27,766 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-24 17:27:27,766 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-24 17:27:27,766 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-24 17:27:27,766 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-24 17:27:27,766 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-24 17:27:27,767 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-24 17:27:27,767 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-24 17:27:27,767 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-24 17:27:27,767 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-24 17:27:27,767 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-24 17:27:27,767 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-24 17:27:27,767 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-01-24 17:27:27,768 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-01-24 17:27:27,768 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_add_return [2018-01-24 17:27:27,768 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-01-24 17:27:27,768 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-01-24 17:27:27,768 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-01-24 17:27:27,768 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-01-24 17:27:27,769 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_get [2018-01-24 17:27:27,769 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-01-24 17:27:27,769 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-01-24 17:27:27,769 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-01-24 17:27:27,769 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-01-24 17:27:27,769 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_get [2018-01-24 17:27:27,769 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-01-24 17:27:27,770 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-01-24 17:27:27,770 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-01-24 17:27:27,770 INFO L128 BoogieDeclarations]: Found specification of procedure f_22_get [2018-01-24 17:27:27,770 INFO L128 BoogieDeclarations]: Found specification of procedure f_22_put [2018-01-24 17:27:27,770 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-01-24 17:27:27,770 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-24 17:27:27,770 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-24 17:27:27,770 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-24 17:27:28,049 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-01-24 17:27:28,241 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-24 17:27:28,241 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 05:27:28 BoogieIcfgContainer [2018-01-24 17:27:28,242 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-24 17:27:28,243 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-24 17:27:28,243 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-24 17:27:28,245 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-24 17:27:28,245 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.01 05:27:27" (1/3) ... [2018-01-24 17:27:28,246 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4ea20477 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 05:27:28, skipping insertion in model container [2018-01-24 17:27:28,246 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:27:27" (2/3) ... [2018-01-24 17:27:28,247 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@4ea20477 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 05:27:28, skipping insertion in model container [2018-01-24 17:27:28,247 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 05:27:28" (3/3) ... [2018-01-24 17:27:28,248 INFO L105 eAbstractionObserver]: Analyzing ICFG memleaks_test22_3_true-valid-memsafety_true-termination.i [2018-01-24 17:27:28,255 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-24 17:27:28,262 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 23 error locations. [2018-01-24 17:27:28,303 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-24 17:27:28,303 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-24 17:27:28,303 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-24 17:27:28,303 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-24 17:27:28,303 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-24 17:27:28,303 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-24 17:27:28,303 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-24 17:27:28,303 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-24 17:27:28,304 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-24 17:27:28,324 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states. [2018-01-24 17:27:28,329 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-24 17:27:28,330 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:27:28,331 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:27:28,331 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:27:28,335 INFO L82 PathProgramCache]: Analyzing trace with hash 1245228870, now seen corresponding path program 1 times [2018-01-24 17:27:28,337 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:27:28,384 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:28,385 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:28,385 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:28,385 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:27:28,431 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:28,439 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:27:28,654 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:28,656 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:27:28,657 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 17:27:28,657 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:27:28,660 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 17:27:28,676 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 17:27:28,677 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:27:28,679 INFO L87 Difference]: Start difference. First operand 151 states. Second operand 5 states. [2018-01-24 17:27:28,756 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:27:28,756 INFO L93 Difference]: Finished difference Result 290 states and 307 transitions. [2018-01-24 17:27:28,757 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 17:27:28,758 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-01-24 17:27:28,758 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:27:28,772 INFO L225 Difference]: With dead ends: 290 [2018-01-24 17:27:28,772 INFO L226 Difference]: Without dead ends: 154 [2018-01-24 17:27:28,777 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:27:28,791 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-01-24 17:27:28,821 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 152. [2018-01-24 17:27:28,822 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-01-24 17:27:28,825 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 161 transitions. [2018-01-24 17:27:28,827 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 161 transitions. Word has length 17 [2018-01-24 17:27:28,828 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:27:28,828 INFO L432 AbstractCegarLoop]: Abstraction has 152 states and 161 transitions. [2018-01-24 17:27:28,828 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 17:27:28,828 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 161 transitions. [2018-01-24 17:27:28,829 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 17:27:28,829 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:27:28,829 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:27:28,830 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:27:28,830 INFO L82 PathProgramCache]: Analyzing trace with hash -1572748952, now seen corresponding path program 1 times [2018-01-24 17:27:28,830 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:27:28,832 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:28,832 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:28,832 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:28,833 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:27:28,855 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:28,857 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:27:28,932 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:28,932 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:27:28,932 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 17:27:28,932 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:27:28,934 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 17:27:28,934 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 17:27:28,934 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 17:27:28,934 INFO L87 Difference]: Start difference. First operand 152 states and 161 transitions. Second operand 6 states. [2018-01-24 17:27:29,158 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:27:29,158 INFO L93 Difference]: Finished difference Result 154 states and 163 transitions. [2018-01-24 17:27:29,158 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 17:27:29,158 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 19 [2018-01-24 17:27:29,159 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:27:29,161 INFO L225 Difference]: With dead ends: 154 [2018-01-24 17:27:29,161 INFO L226 Difference]: Without dead ends: 153 [2018-01-24 17:27:29,162 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 17:27:29,163 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-01-24 17:27:29,176 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 151. [2018-01-24 17:27:29,176 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-01-24 17:27:29,179 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 160 transitions. [2018-01-24 17:27:29,179 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 160 transitions. Word has length 19 [2018-01-24 17:27:29,180 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:27:29,180 INFO L432 AbstractCegarLoop]: Abstraction has 151 states and 160 transitions. [2018-01-24 17:27:29,180 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 17:27:29,180 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 160 transitions. [2018-01-24 17:27:29,181 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-24 17:27:29,181 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:27:29,181 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:27:29,181 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:27:29,182 INFO L82 PathProgramCache]: Analyzing trace with hash -1572748951, now seen corresponding path program 1 times [2018-01-24 17:27:29,182 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:27:29,183 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:29,183 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:29,184 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:29,184 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:27:29,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:29,210 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:27:29,476 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:29,476 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:27:29,476 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 17:27:29,476 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:27:29,477 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 17:27:29,477 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 17:27:29,477 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 17:27:29,477 INFO L87 Difference]: Start difference. First operand 151 states and 160 transitions. Second operand 7 states. [2018-01-24 17:27:29,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:27:29,714 INFO L93 Difference]: Finished difference Result 153 states and 162 transitions. [2018-01-24 17:27:29,714 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 17:27:29,715 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 19 [2018-01-24 17:27:29,715 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:27:29,717 INFO L225 Difference]: With dead ends: 153 [2018-01-24 17:27:29,717 INFO L226 Difference]: Without dead ends: 152 [2018-01-24 17:27:29,717 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=21, Invalid=51, Unknown=0, NotChecked=0, Total=72 [2018-01-24 17:27:29,718 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-01-24 17:27:29,729 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 150. [2018-01-24 17:27:29,729 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 150 states. [2018-01-24 17:27:29,733 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 150 states to 150 states and 159 transitions. [2018-01-24 17:27:29,734 INFO L78 Accepts]: Start accepts. Automaton has 150 states and 159 transitions. Word has length 19 [2018-01-24 17:27:29,734 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:27:29,734 INFO L432 AbstractCegarLoop]: Abstraction has 150 states and 159 transitions. [2018-01-24 17:27:29,734 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 17:27:29,734 INFO L276 IsEmpty]: Start isEmpty. Operand 150 states and 159 transitions. [2018-01-24 17:27:29,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-24 17:27:29,736 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:27:29,736 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:27:29,736 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:27:29,736 INFO L82 PathProgramCache]: Analyzing trace with hash -336004596, now seen corresponding path program 1 times [2018-01-24 17:27:29,736 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:27:29,738 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:29,738 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:29,738 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:29,739 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:27:29,757 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:29,758 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:27:29,875 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:29,875 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:27:29,875 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 17:27:29,876 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:27:29,876 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 17:27:29,876 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 17:27:29,877 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-01-24 17:27:29,877 INFO L87 Difference]: Start difference. First operand 150 states and 159 transitions. Second operand 9 states. [2018-01-24 17:27:30,013 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:27:30,013 INFO L93 Difference]: Finished difference Result 256 states and 271 transitions. [2018-01-24 17:27:30,014 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 17:27:30,014 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 29 [2018-01-24 17:27:30,015 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:27:30,017 INFO L225 Difference]: With dead ends: 256 [2018-01-24 17:27:30,017 INFO L226 Difference]: Without dead ends: 171 [2018-01-24 17:27:30,018 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-01-24 17:27:30,018 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-01-24 17:27:30,032 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 164. [2018-01-24 17:27:30,033 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2018-01-24 17:27:30,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 173 transitions. [2018-01-24 17:27:30,035 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 173 transitions. Word has length 29 [2018-01-24 17:27:30,035 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:27:30,036 INFO L432 AbstractCegarLoop]: Abstraction has 164 states and 173 transitions. [2018-01-24 17:27:30,036 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 17:27:30,036 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 173 transitions. [2018-01-24 17:27:30,038 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 17:27:30,038 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:27:30,038 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:27:30,038 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:27:30,038 INFO L82 PathProgramCache]: Analyzing trace with hash 610577100, now seen corresponding path program 1 times [2018-01-24 17:27:30,038 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:27:30,040 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:30,040 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:30,040 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:30,040 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:27:30,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:30,060 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:27:30,153 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:30,153 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:27:30,154 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 17:27:30,154 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:27:30,154 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 17:27:30,154 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 17:27:30,155 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:27:30,155 INFO L87 Difference]: Start difference. First operand 164 states and 173 transitions. Second operand 10 states. [2018-01-24 17:27:30,391 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:27:30,391 INFO L93 Difference]: Finished difference Result 164 states and 173 transitions. [2018-01-24 17:27:30,391 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 17:27:30,392 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 34 [2018-01-24 17:27:30,392 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:27:30,393 INFO L225 Difference]: With dead ends: 164 [2018-01-24 17:27:30,393 INFO L226 Difference]: Without dead ends: 163 [2018-01-24 17:27:30,393 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:27:30,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-01-24 17:27:30,404 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 163. [2018-01-24 17:27:30,404 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-01-24 17:27:30,406 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 172 transitions. [2018-01-24 17:27:30,406 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 172 transitions. Word has length 34 [2018-01-24 17:27:30,407 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:27:30,407 INFO L432 AbstractCegarLoop]: Abstraction has 163 states and 172 transitions. [2018-01-24 17:27:30,407 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 17:27:30,407 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 172 transitions. [2018-01-24 17:27:30,408 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 17:27:30,408 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:27:30,408 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:27:30,409 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:27:30,409 INFO L82 PathProgramCache]: Analyzing trace with hash 610577101, now seen corresponding path program 1 times [2018-01-24 17:27:30,409 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:27:30,410 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:30,410 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:30,410 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:30,410 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:27:30,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:30,428 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:27:30,463 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:30,463 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:27:30,463 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 17:27:30,463 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:27:30,464 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 17:27:30,464 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 17:27:30,464 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 17:27:30,464 INFO L87 Difference]: Start difference. First operand 163 states and 172 transitions. Second operand 4 states. [2018-01-24 17:27:30,494 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:27:30,494 INFO L93 Difference]: Finished difference Result 287 states and 303 transitions. [2018-01-24 17:27:30,495 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 17:27:30,495 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 34 [2018-01-24 17:27:30,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:27:30,497 INFO L225 Difference]: With dead ends: 287 [2018-01-24 17:27:30,497 INFO L226 Difference]: Without dead ends: 164 [2018-01-24 17:27:30,498 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:27:30,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-01-24 17:27:30,509 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 164. [2018-01-24 17:27:30,509 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2018-01-24 17:27:30,511 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 173 transitions. [2018-01-24 17:27:30,511 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 173 transitions. Word has length 34 [2018-01-24 17:27:30,511 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:27:30,511 INFO L432 AbstractCegarLoop]: Abstraction has 164 states and 173 transitions. [2018-01-24 17:27:30,511 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 17:27:30,512 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 173 transitions. [2018-01-24 17:27:30,513 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-24 17:27:30,513 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:27:30,513 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:27:30,513 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:27:30,513 INFO L82 PathProgramCache]: Analyzing trace with hash -838244594, now seen corresponding path program 1 times [2018-01-24 17:27:30,514 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:27:30,515 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:30,515 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:30,515 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:30,515 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:27:30,531 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:30,533 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:27:30,578 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:30,579 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:30,579 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:27:30,580 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 36 with the following transitions: [2018-01-24 17:27:30,582 INFO L201 CegarAbsIntRunner]: [0], [2], [6], [10], [31], [36], [52], [59], [63], [67], [70], [72], [73], [77], [79], [80], [133], [136], [137], [138], [140], [141], [142], [164], [165], [166], [167], [168], [170], [176], [180], [188], [206], [207], [208] [2018-01-24 17:27:30,648 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:27:30,648 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:27:30,888 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:27:30,889 INFO L268 AbstractInterpreter]: Visited 35 different actions 39 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 21 variables. [2018-01-24 17:27:30,899 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:27:30,899 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:30,899 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:27:30,919 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:30,919 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:27:30,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:30,972 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:27:30,992 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:30,992 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:27:31,080 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:31,104 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:31,104 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:27:31,108 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:31,108 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:27:31,167 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:31,173 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:27:31,178 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:31,178 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:27:31,304 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:31,306 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:27:31,306 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-24 17:27:31,306 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:27:31,306 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 17:27:31,307 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 17:27:31,307 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=30, Invalid=42, Unknown=0, NotChecked=0, Total=72 [2018-01-24 17:27:31,307 INFO L87 Difference]: Start difference. First operand 164 states and 173 transitions. Second operand 6 states. [2018-01-24 17:27:31,359 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:27:31,359 INFO L93 Difference]: Finished difference Result 288 states and 304 transitions. [2018-01-24 17:27:31,360 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 17:27:31,360 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-01-24 17:27:31,360 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:27:31,361 INFO L225 Difference]: With dead ends: 288 [2018-01-24 17:27:31,361 INFO L226 Difference]: Without dead ends: 165 [2018-01-24 17:27:31,362 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 134 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=37, Invalid=53, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:27:31,362 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-01-24 17:27:31,368 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 165. [2018-01-24 17:27:31,369 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-01-24 17:27:31,370 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 174 transitions. [2018-01-24 17:27:31,370 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 174 transitions. Word has length 35 [2018-01-24 17:27:31,370 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:27:31,370 INFO L432 AbstractCegarLoop]: Abstraction has 165 states and 174 transitions. [2018-01-24 17:27:31,370 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 17:27:31,370 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 174 transitions. [2018-01-24 17:27:31,371 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 17:27:31,371 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:27:31,371 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:27:31,371 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:27:31,371 INFO L82 PathProgramCache]: Analyzing trace with hash 1492923117, now seen corresponding path program 2 times [2018-01-24 17:27:31,372 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:27:31,372 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:31,373 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:31,373 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:31,373 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:27:31,385 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:31,386 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:27:31,457 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:31,457 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:31,457 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:27:31,458 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:27:31,458 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:27:31,458 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:31,458 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:27:31,467 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:27:31,468 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:27:31,497 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:27:31,501 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:27:31,505 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:27:31,537 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 17:27:31,539 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:27:31,552 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 17:27:31,553 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:27:31,566 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 17:27:31,566 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 17:27:32,168 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 17:27:32,169 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:27:32,555 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 17:27:32,575 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 17:27:32,576 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14, 13] imperfect sequences [6] total 31 [2018-01-24 17:27:32,576 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:27:32,576 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 17:27:32,576 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 17:27:32,576 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=90, Invalid=840, Unknown=0, NotChecked=0, Total=930 [2018-01-24 17:27:32,577 INFO L87 Difference]: Start difference. First operand 165 states and 174 transitions. Second operand 15 states. [2018-01-24 17:27:35,879 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:27:35,879 INFO L93 Difference]: Finished difference Result 241 states and 253 transitions. [2018-01-24 17:27:35,880 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-24 17:27:35,880 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 36 [2018-01-24 17:27:35,881 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:27:35,882 INFO L225 Difference]: With dead ends: 241 [2018-01-24 17:27:35,882 INFO L226 Difference]: Without dead ends: 240 [2018-01-24 17:27:35,883 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 81 GetRequests, 47 SyntacticMatches, 1 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 251 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=118, Invalid=1072, Unknown=0, NotChecked=0, Total=1190 [2018-01-24 17:27:35,884 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 240 states. [2018-01-24 17:27:35,899 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 240 to 164. [2018-01-24 17:27:35,899 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2018-01-24 17:27:35,901 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 173 transitions. [2018-01-24 17:27:35,901 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 173 transitions. Word has length 36 [2018-01-24 17:27:35,901 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:27:35,901 INFO L432 AbstractCegarLoop]: Abstraction has 164 states and 173 transitions. [2018-01-24 17:27:35,902 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 17:27:35,902 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 173 transitions. [2018-01-24 17:27:35,903 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-24 17:27:35,903 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:27:35,903 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:27:35,903 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:27:35,903 INFO L82 PathProgramCache]: Analyzing trace with hash 278126369, now seen corresponding path program 1 times [2018-01-24 17:27:35,903 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:27:35,904 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:35,904 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:27:35,905 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:35,905 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:27:35,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:35,917 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:27:36,027 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:36,028 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:27:36,028 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 17:27:36,028 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:27:36,028 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 17:27:36,028 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 17:27:36,028 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=57, Unknown=0, NotChecked=0, Total=72 [2018-01-24 17:27:36,029 INFO L87 Difference]: Start difference. First operand 164 states and 173 transitions. Second operand 9 states. [2018-01-24 17:27:36,231 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:27:36,231 INFO L93 Difference]: Finished difference Result 237 states and 253 transitions. [2018-01-24 17:27:36,231 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 17:27:36,232 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 42 [2018-01-24 17:27:36,232 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:27:36,233 INFO L225 Difference]: With dead ends: 237 [2018-01-24 17:27:36,233 INFO L226 Difference]: Without dead ends: 178 [2018-01-24 17:27:36,233 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-01-24 17:27:36,234 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-01-24 17:27:36,245 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 174. [2018-01-24 17:27:36,245 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 174 states. [2018-01-24 17:27:36,246 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 174 states to 174 states and 184 transitions. [2018-01-24 17:27:36,247 INFO L78 Accepts]: Start accepts. Automaton has 174 states and 184 transitions. Word has length 42 [2018-01-24 17:27:36,247 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:27:36,247 INFO L432 AbstractCegarLoop]: Abstraction has 174 states and 184 transitions. [2018-01-24 17:27:36,247 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 17:27:36,247 INFO L276 IsEmpty]: Start isEmpty. Operand 174 states and 184 transitions. [2018-01-24 17:27:36,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-24 17:27:36,248 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:27:36,249 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:27:36,249 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:27:36,249 INFO L82 PathProgramCache]: Analyzing trace with hash -870895777, now seen corresponding path program 1 times [2018-01-24 17:27:36,249 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:27:36,250 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:36,250 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:36,250 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:36,251 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:27:36,265 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:36,266 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:27:36,459 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 17:27:36,459 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:27:36,459 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 17:27:36,459 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:27:36,460 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 17:27:36,460 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 17:27:36,460 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:27:36,460 INFO L87 Difference]: Start difference. First operand 174 states and 184 transitions. Second operand 10 states. [2018-01-24 17:27:36,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:27:36,662 INFO L93 Difference]: Finished difference Result 174 states and 184 transitions. [2018-01-24 17:27:36,662 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 17:27:36,662 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 41 [2018-01-24 17:27:36,662 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:27:36,663 INFO L225 Difference]: With dead ends: 174 [2018-01-24 17:27:36,663 INFO L226 Difference]: Without dead ends: 172 [2018-01-24 17:27:36,664 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:27:36,664 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2018-01-24 17:27:36,677 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 172. [2018-01-24 17:27:36,677 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-01-24 17:27:36,678 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 182 transitions. [2018-01-24 17:27:36,679 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 182 transitions. Word has length 41 [2018-01-24 17:27:36,679 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:27:36,679 INFO L432 AbstractCegarLoop]: Abstraction has 172 states and 182 transitions. [2018-01-24 17:27:36,679 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 17:27:36,679 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 182 transitions. [2018-01-24 17:27:36,680 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-24 17:27:36,681 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:27:36,681 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:27:36,681 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:27:36,681 INFO L82 PathProgramCache]: Analyzing trace with hash -870895776, now seen corresponding path program 1 times [2018-01-24 17:27:36,681 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:27:36,682 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:36,683 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:36,683 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:36,683 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:27:36,699 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:36,701 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:27:36,784 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:36,785 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:36,785 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:27:36,785 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 42 with the following transitions: [2018-01-24 17:27:36,785 INFO L201 CegarAbsIntRunner]: [0], [2], [6], [10], [31], [36], [52], [59], [63], [67], [68], [71], [72], [73], [77], [79], [80], [122], [125], [133], [136], [137], [138], [140], [141], [142], [164], [165], [166], [167], [168], [170], [176], [180], [188], [189], [190], [206], [207], [208] [2018-01-24 17:27:36,786 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:27:36,787 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:27:36,925 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:27:36,926 INFO L268 AbstractInterpreter]: Visited 40 different actions 44 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 21 variables. [2018-01-24 17:27:36,928 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:27:36,928 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:36,928 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:27:36,935 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:36,936 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:27:36,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:36,963 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:27:37,026 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:37,027 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:27:37,122 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:37,153 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:37,153 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:27:37,157 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:37,157 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:27:37,205 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:37,210 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:27:37,214 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:37,214 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:27:37,235 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:37,237 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:27:37,237 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-24 17:27:37,237 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:27:37,237 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 17:27:37,238 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 17:27:37,238 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=63, Unknown=0, NotChecked=0, Total=110 [2018-01-24 17:27:37,238 INFO L87 Difference]: Start difference. First operand 172 states and 182 transitions. Second operand 7 states. [2018-01-24 17:27:37,266 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:27:37,266 INFO L93 Difference]: Finished difference Result 293 states and 310 transitions. [2018-01-24 17:27:37,267 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 17:27:37,267 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 41 [2018-01-24 17:27:37,267 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:27:37,268 INFO L225 Difference]: With dead ends: 293 [2018-01-24 17:27:37,268 INFO L226 Difference]: Without dead ends: 173 [2018-01-24 17:27:37,269 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 157 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=77, Unknown=0, NotChecked=0, Total=132 [2018-01-24 17:27:37,269 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2018-01-24 17:27:37,280 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 173. [2018-01-24 17:27:37,280 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-01-24 17:27:37,281 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 183 transitions. [2018-01-24 17:27:37,281 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 183 transitions. Word has length 41 [2018-01-24 17:27:37,281 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:27:37,281 INFO L432 AbstractCegarLoop]: Abstraction has 173 states and 183 transitions. [2018-01-24 17:27:37,281 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 17:27:37,281 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 183 transitions. [2018-01-24 17:27:37,282 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-24 17:27:37,282 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:27:37,282 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:27:37,282 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:27:37,283 INFO L82 PathProgramCache]: Analyzing trace with hash 2131974143, now seen corresponding path program 2 times [2018-01-24 17:27:37,283 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:27:37,284 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:37,284 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:37,284 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:37,284 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:27:37,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:37,301 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:27:37,394 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:37,395 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:37,395 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:27:37,395 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:27:37,395 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:27:37,395 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:37,396 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:27:37,412 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:27:37,412 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:27:37,430 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:27:37,433 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:27:37,436 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:27:37,441 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 17:27:37,441 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:27:37,452 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 17:27:37,453 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:27:37,463 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 17:27:37,463 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 17:27:39,615 WARN L143 SmtUtils]: Spent 2031ms on a formula simplification that was a NOOP. DAG size: 21 [2018-01-24 17:27:40,076 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 17:27:40,076 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:27:40,470 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 17:27:40,490 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 17:27:40,490 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15, 13] imperfect sequences [7] total 33 [2018-01-24 17:27:40,490 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:27:40,491 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-24 17:27:40,491 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-24 17:27:40,491 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=951, Unknown=0, NotChecked=0, Total=1056 [2018-01-24 17:27:40,491 INFO L87 Difference]: Start difference. First operand 173 states and 183 transitions. Second operand 16 states. [2018-01-24 17:27:41,614 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:27:41,615 INFO L93 Difference]: Finished difference Result 205 states and 214 transitions. [2018-01-24 17:27:41,615 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-24 17:27:41,615 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 42 [2018-01-24 17:27:41,616 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:27:41,617 INFO L225 Difference]: With dead ends: 205 [2018-01-24 17:27:41,617 INFO L226 Difference]: Without dead ends: 203 [2018-01-24 17:27:41,618 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 94 GetRequests, 57 SyntacticMatches, 2 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 317 ImplicationChecksByTransitivity, 3.1s TimeCoverageRelationStatistics Valid=136, Invalid=1196, Unknown=0, NotChecked=0, Total=1332 [2018-01-24 17:27:41,618 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 203 states. [2018-01-24 17:27:41,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 203 to 171. [2018-01-24 17:27:41,636 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2018-01-24 17:27:41,637 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 181 transitions. [2018-01-24 17:27:41,637 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 181 transitions. Word has length 42 [2018-01-24 17:27:41,638 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:27:41,638 INFO L432 AbstractCegarLoop]: Abstraction has 171 states and 181 transitions. [2018-01-24 17:27:41,638 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-24 17:27:41,638 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 181 transitions. [2018-01-24 17:27:41,639 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-24 17:27:41,639 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:27:41,639 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:27:41,639 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:27:41,639 INFO L82 PathProgramCache]: Analyzing trace with hash 799197829, now seen corresponding path program 1 times [2018-01-24 17:27:41,640 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:27:41,641 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:41,641 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:27:41,641 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:41,641 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:27:41,653 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:41,654 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:27:41,726 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 17:27:41,727 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:27:41,727 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-24 17:27:41,727 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:27:41,727 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 17:27:41,727 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 17:27:41,728 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-01-24 17:27:41,728 INFO L87 Difference]: Start difference. First operand 171 states and 181 transitions. Second operand 8 states. [2018-01-24 17:27:41,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:27:41,830 INFO L93 Difference]: Finished difference Result 291 states and 306 transitions. [2018-01-24 17:27:41,834 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 17:27:41,834 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 47 [2018-01-24 17:27:41,835 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:27:41,836 INFO L225 Difference]: With dead ends: 291 [2018-01-24 17:27:41,836 INFO L226 Difference]: Without dead ends: 171 [2018-01-24 17:27:41,837 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=69, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:27:41,837 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-01-24 17:27:41,853 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 171. [2018-01-24 17:27:41,853 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 171 states. [2018-01-24 17:27:41,854 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 171 states to 171 states and 179 transitions. [2018-01-24 17:27:41,855 INFO L78 Accepts]: Start accepts. Automaton has 171 states and 179 transitions. Word has length 47 [2018-01-24 17:27:41,855 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:27:41,855 INFO L432 AbstractCegarLoop]: Abstraction has 171 states and 179 transitions. [2018-01-24 17:27:41,855 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 17:27:41,855 INFO L276 IsEmpty]: Start isEmpty. Operand 171 states and 179 transitions. [2018-01-24 17:27:41,856 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-24 17:27:41,856 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:27:41,856 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:27:41,856 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:27:41,856 INFO L82 PathProgramCache]: Analyzing trace with hash 689381786, now seen corresponding path program 1 times [2018-01-24 17:27:41,856 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:27:41,857 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:41,857 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:41,857 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:41,858 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:27:41,866 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:41,867 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:27:41,900 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-24 17:27:41,900 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:27:41,900 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 17:27:41,900 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:27:41,901 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 17:27:41,901 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 17:27:41,901 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 17:27:41,902 INFO L87 Difference]: Start difference. First operand 171 states and 179 transitions. Second operand 3 states. [2018-01-24 17:27:42,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:27:42,045 INFO L93 Difference]: Finished difference Result 185 states and 193 transitions. [2018-01-24 17:27:42,045 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 17:27:42,046 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 47 [2018-01-24 17:27:42,046 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:27:42,047 INFO L225 Difference]: With dead ends: 185 [2018-01-24 17:27:42,047 INFO L226 Difference]: Without dead ends: 153 [2018-01-24 17:27:42,047 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 13 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 17:27:42,048 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-01-24 17:27:42,061 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 143. [2018-01-24 17:27:42,061 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-01-24 17:27:42,062 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 149 transitions. [2018-01-24 17:27:42,063 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 149 transitions. Word has length 47 [2018-01-24 17:27:42,063 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:27:42,063 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 149 transitions. [2018-01-24 17:27:42,063 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 17:27:42,063 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 149 transitions. [2018-01-24 17:27:42,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-24 17:27:42,064 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:27:42,065 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:27:42,065 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:27:42,065 INFO L82 PathProgramCache]: Analyzing trace with hash 1696219427, now seen corresponding path program 1 times [2018-01-24 17:27:42,065 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:27:42,066 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:42,066 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:42,066 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:42,066 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:27:42,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:42,077 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:27:42,170 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 17:27:42,171 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:27:42,171 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-01-24 17:27:42,171 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:27:42,171 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 17:27:42,172 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 17:27:42,172 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:27:42,172 INFO L87 Difference]: Start difference. First operand 143 states and 149 transitions. Second operand 10 states. [2018-01-24 17:27:42,234 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:27:42,234 INFO L93 Difference]: Finished difference Result 241 states and 251 transitions. [2018-01-24 17:27:42,235 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 17:27:42,235 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 52 [2018-01-24 17:27:42,235 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:27:42,236 INFO L225 Difference]: With dead ends: 241 [2018-01-24 17:27:42,237 INFO L226 Difference]: Without dead ends: 143 [2018-01-24 17:27:42,237 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:27:42,238 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-01-24 17:27:42,253 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2018-01-24 17:27:42,254 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-01-24 17:27:42,255 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 148 transitions. [2018-01-24 17:27:42,255 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 148 transitions. Word has length 52 [2018-01-24 17:27:42,255 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:27:42,255 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 148 transitions. [2018-01-24 17:27:42,256 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 17:27:42,256 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 148 transitions. [2018-01-24 17:27:42,256 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-01-24 17:27:42,256 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:27:42,257 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:27:42,257 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:27:42,257 INFO L82 PathProgramCache]: Analyzing trace with hash 381457938, now seen corresponding path program 1 times [2018-01-24 17:27:42,257 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:27:42,258 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:42,258 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:42,258 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:42,258 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:27:42,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:42,278 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:27:42,499 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-24 17:27:42,499 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:27:42,500 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [] total 14 [2018-01-24 17:27:42,500 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:27:42,500 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 17:27:42,500 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 17:27:42,500 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=183, Unknown=0, NotChecked=0, Total=210 [2018-01-24 17:27:42,500 INFO L87 Difference]: Start difference. First operand 143 states and 148 transitions. Second operand 15 states. [2018-01-24 17:27:42,848 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:27:42,848 INFO L93 Difference]: Finished difference Result 143 states and 148 transitions. [2018-01-24 17:27:42,849 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-24 17:27:42,849 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 63 [2018-01-24 17:27:42,849 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:27:42,850 INFO L225 Difference]: With dead ends: 143 [2018-01-24 17:27:42,850 INFO L226 Difference]: Without dead ends: 141 [2018-01-24 17:27:42,850 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 19 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=47, Invalid=333, Unknown=0, NotChecked=0, Total=380 [2018-01-24 17:27:42,851 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-01-24 17:27:42,860 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 141. [2018-01-24 17:27:42,860 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 141 states. [2018-01-24 17:27:42,861 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 141 states to 141 states and 146 transitions. [2018-01-24 17:27:42,861 INFO L78 Accepts]: Start accepts. Automaton has 141 states and 146 transitions. Word has length 63 [2018-01-24 17:27:42,861 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:27:42,862 INFO L432 AbstractCegarLoop]: Abstraction has 141 states and 146 transitions. [2018-01-24 17:27:42,862 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 17:27:42,862 INFO L276 IsEmpty]: Start isEmpty. Operand 141 states and 146 transitions. [2018-01-24 17:27:42,862 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-01-24 17:27:42,862 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:27:42,862 INFO L322 BasicCegarLoop]: trace histogram [3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:27:42,862 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:27:42,862 INFO L82 PathProgramCache]: Analyzing trace with hash 381457939, now seen corresponding path program 1 times [2018-01-24 17:27:42,863 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:27:42,863 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:42,864 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:42,864 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:42,864 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:27:42,877 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:42,878 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:27:42,941 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:42,942 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:42,942 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:27:42,942 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 64 with the following transitions: [2018-01-24 17:27:42,942 INFO L201 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [17], [31], [36], [38], [52], [54], [59], [63], [66], [67], [68], [71], [72], [73], [77], [79], [80], [91], [94], [122], [123], [126], [129], [133], [136], [137], [138], [140], [141], [142], [147], [150], [157], [164], [165], [166], [167], [168], [169], [170], [172], [176], [177], [180], [181], [182], [188], [189], [190], [191], [202], [204], [206], [207], [208] [2018-01-24 17:27:42,945 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:27:42,945 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:27:43,085 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:27:43,085 INFO L268 AbstractInterpreter]: Visited 61 different actions 65 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 22 variables. [2018-01-24 17:27:43,091 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:27:43,091 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:43,091 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:27:43,099 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:43,099 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:27:43,142 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:43,145 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:27:43,242 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:43,242 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:27:43,509 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:43,531 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:43,531 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:27:43,536 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:43,536 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:27:43,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:43,611 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:27:43,618 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:43,618 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:27:43,719 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:43,720 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:27:43,721 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-24 17:27:43,721 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:27:43,721 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 17:27:43,721 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 17:27:43,722 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=68, Invalid=88, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:27:43,722 INFO L87 Difference]: Start difference. First operand 141 states and 146 transitions. Second operand 8 states. [2018-01-24 17:27:43,751 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:27:43,751 INFO L93 Difference]: Finished difference Result 258 states and 268 transitions. [2018-01-24 17:27:43,752 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 17:27:43,752 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 63 [2018-01-24 17:27:43,752 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:27:43,753 INFO L225 Difference]: With dead ends: 258 [2018-01-24 17:27:43,753 INFO L226 Difference]: Without dead ends: 142 [2018-01-24 17:27:43,753 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 258 GetRequests, 244 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=77, Invalid=105, Unknown=0, NotChecked=0, Total=182 [2018-01-24 17:27:43,754 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 142 states. [2018-01-24 17:27:43,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 142 to 142. [2018-01-24 17:27:43,764 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-01-24 17:27:43,764 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 147 transitions. [2018-01-24 17:27:43,765 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 147 transitions. Word has length 63 [2018-01-24 17:27:43,765 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:27:43,765 INFO L432 AbstractCegarLoop]: Abstraction has 142 states and 147 transitions. [2018-01-24 17:27:43,765 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 17:27:43,765 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 147 transitions. [2018-01-24 17:27:43,765 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 65 [2018-01-24 17:27:43,765 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:27:43,766 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:27:43,766 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:27:43,766 INFO L82 PathProgramCache]: Analyzing trace with hash -109515406, now seen corresponding path program 2 times [2018-01-24 17:27:43,766 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:27:43,767 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:43,767 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:43,767 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:43,768 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:27:43,782 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:43,783 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:27:43,845 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:43,845 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:43,846 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:27:43,846 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:27:43,846 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:27:43,846 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:43,846 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:27:43,853 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:27:43,853 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:27:43,882 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:27:43,885 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:27:43,889 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:27:43,909 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 17:27:43,909 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:27:43,939 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 17:27:43,939 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:27:43,952 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 17:27:43,953 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 17:27:44,781 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 17:27:44,814 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:27:47,853 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 17:27:47,874 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 17:27:47,874 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20, 18] imperfect sequences [8] total 44 [2018-01-24 17:27:47,874 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:27:47,875 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-24 17:27:47,875 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-24 17:27:47,875 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=146, Invalid=1745, Unknown=1, NotChecked=0, Total=1892 [2018-01-24 17:27:47,875 INFO L87 Difference]: Start difference. First operand 142 states and 147 transitions. Second operand 21 states. [2018-01-24 17:27:49,617 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:27:49,617 INFO L93 Difference]: Finished difference Result 142 states and 147 transitions. [2018-01-24 17:27:49,618 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-24 17:27:49,618 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 64 [2018-01-24 17:27:49,618 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:27:49,619 INFO L225 Difference]: With dead ends: 142 [2018-01-24 17:27:49,619 INFO L226 Difference]: Without dead ends: 140 [2018-01-24 17:27:49,620 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 141 GetRequests, 91 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 628 ImplicationChecksByTransitivity, 3.7s TimeCoverageRelationStatistics Valid=195, Invalid=2254, Unknown=1, NotChecked=0, Total=2450 [2018-01-24 17:27:49,620 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-01-24 17:27:49,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-01-24 17:27:49,632 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-01-24 17:27:49,632 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 145 transitions. [2018-01-24 17:27:49,633 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 145 transitions. Word has length 64 [2018-01-24 17:27:49,633 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:27:49,633 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 145 transitions. [2018-01-24 17:27:49,633 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-24 17:27:49,633 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 145 transitions. [2018-01-24 17:27:49,634 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-01-24 17:27:49,634 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:27:49,634 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:27:49,634 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:27:49,634 INFO L82 PathProgramCache]: Analyzing trace with hash -866691108, now seen corresponding path program 1 times [2018-01-24 17:27:49,635 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:27:49,635 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:49,635 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:27:49,635 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:49,635 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:27:49,648 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:49,649 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:27:49,863 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 17:27:49,863 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:27:49,882 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-01-24 17:27:49,882 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:27:49,882 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-24 17:27:49,883 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-24 17:27:49,883 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:27:49,883 INFO L87 Difference]: Start difference. First operand 140 states and 145 transitions. Second operand 13 states. [2018-01-24 17:27:49,984 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:27:49,985 INFO L93 Difference]: Finished difference Result 208 states and 216 transitions. [2018-01-24 17:27:49,985 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-24 17:27:49,985 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 77 [2018-01-24 17:27:49,985 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:27:49,986 INFO L225 Difference]: With dead ends: 208 [2018-01-24 17:27:49,986 INFO L226 Difference]: Without dead ends: 140 [2018-01-24 17:27:49,986 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2018-01-24 17:27:49,987 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 140 states. [2018-01-24 17:27:49,998 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 140 to 140. [2018-01-24 17:27:49,999 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 140 states. [2018-01-24 17:27:49,999 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 140 states to 140 states and 144 transitions. [2018-01-24 17:27:49,999 INFO L78 Accepts]: Start accepts. Automaton has 140 states and 144 transitions. Word has length 77 [2018-01-24 17:27:50,000 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:27:50,000 INFO L432 AbstractCegarLoop]: Abstraction has 140 states and 144 transitions. [2018-01-24 17:27:50,000 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-24 17:27:50,000 INFO L276 IsEmpty]: Start isEmpty. Operand 140 states and 144 transitions. [2018-01-24 17:27:50,001 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-01-24 17:27:50,001 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:27:50,001 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:27:50,001 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:27:50,001 INFO L82 PathProgramCache]: Analyzing trace with hash -1579109870, now seen corresponding path program 1 times [2018-01-24 17:27:50,001 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:27:50,002 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:50,002 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:50,002 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:50,002 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:27:50,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:50,020 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:27:50,305 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-24 17:27:50,306 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:27:50,306 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [21] imperfect sequences [] total 21 [2018-01-24 17:27:50,306 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:27:50,306 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-24 17:27:50,306 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-24 17:27:50,306 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=43, Invalid=419, Unknown=0, NotChecked=0, Total=462 [2018-01-24 17:27:50,307 INFO L87 Difference]: Start difference. First operand 140 states and 144 transitions. Second operand 22 states. [2018-01-24 17:27:51,396 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:27:51,396 INFO L93 Difference]: Finished difference Result 169 states and 179 transitions. [2018-01-24 17:27:51,397 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-24 17:27:51,397 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 90 [2018-01-24 17:27:51,397 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:27:51,398 INFO L225 Difference]: With dead ends: 169 [2018-01-24 17:27:51,398 INFO L226 Difference]: Without dead ends: 167 [2018-01-24 17:27:51,399 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 29 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=75, Invalid=795, Unknown=0, NotChecked=0, Total=870 [2018-01-24 17:27:51,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 167 states. [2018-01-24 17:27:51,413 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 167 to 162. [2018-01-24 17:27:51,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-01-24 17:27:51,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 172 transitions. [2018-01-24 17:27:51,414 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 172 transitions. Word has length 90 [2018-01-24 17:27:51,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:27:51,415 INFO L432 AbstractCegarLoop]: Abstraction has 162 states and 172 transitions. [2018-01-24 17:27:51,415 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-24 17:27:51,415 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 172 transitions. [2018-01-24 17:27:51,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-01-24 17:27:51,416 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:27:51,416 INFO L322 BasicCegarLoop]: trace histogram [4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:27:51,416 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:27:51,416 INFO L82 PathProgramCache]: Analyzing trace with hash -1579109869, now seen corresponding path program 1 times [2018-01-24 17:27:51,416 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:27:51,417 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:51,417 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:51,417 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:51,417 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:27:51,433 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:51,434 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:27:51,571 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:51,571 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:51,571 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:27:51,571 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 91 with the following transitions: [2018-01-24 17:27:51,572 INFO L201 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [17], [19], [20], [21], [24], [31], [36], [38], [39], [42], [52], [54], [59], [63], [66], [67], [68], [71], [72], [73], [77], [79], [80], [81], [91], [92], [95], [96], [99], [100], [122], [123], [126], [129], [130], [133], [136], [137], [138], [140], [141], [142], [143], [147], [150], [155], [156], [157], [159], [160], [164], [165], [166], [167], [168], [169], [170], [172], [173], [174], [176], [177], [180], [181], [182], [183], [184], [188], [189], [190], [191], [192], [198], [200], [202], [203], [204], [205], [206], [207], [208] [2018-01-24 17:27:51,575 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:27:51,575 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:27:51,725 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:27:51,725 INFO L268 AbstractInterpreter]: Visited 87 different actions 91 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 26 variables. [2018-01-24 17:27:51,733 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:27:51,733 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:51,733 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:27:51,751 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:51,751 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:27:51,801 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:51,806 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:27:51,837 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:51,838 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:27:52,123 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:52,144 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:52,144 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:27:52,147 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:52,147 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:27:52,236 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:52,244 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:27:52,253 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:52,253 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:27:52,344 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:52,345 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:27:52,346 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-24 17:27:52,346 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:27:52,346 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 17:27:52,346 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 17:27:52,346 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-24 17:27:52,347 INFO L87 Difference]: Start difference. First operand 162 states and 172 transitions. Second operand 9 states. [2018-01-24 17:27:52,379 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:27:52,380 INFO L93 Difference]: Finished difference Result 299 states and 319 transitions. [2018-01-24 17:27:52,380 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 17:27:52,380 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 90 [2018-01-24 17:27:52,380 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:27:52,381 INFO L225 Difference]: With dead ends: 299 [2018-01-24 17:27:52,381 INFO L226 Difference]: Without dead ends: 163 [2018-01-24 17:27:52,381 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 367 GetRequests, 351 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=103, Invalid=137, Unknown=0, NotChecked=0, Total=240 [2018-01-24 17:27:52,382 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-01-24 17:27:52,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 163. [2018-01-24 17:27:52,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-01-24 17:27:52,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 173 transitions. [2018-01-24 17:27:52,396 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 173 transitions. Word has length 90 [2018-01-24 17:27:52,396 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:27:52,397 INFO L432 AbstractCegarLoop]: Abstraction has 163 states and 173 transitions. [2018-01-24 17:27:52,397 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 17:27:52,397 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 173 transitions. [2018-01-24 17:27:52,397 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-01-24 17:27:52,397 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:27:52,397 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:27:52,398 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:27:52,398 INFO L82 PathProgramCache]: Analyzing trace with hash 1354217300, now seen corresponding path program 2 times [2018-01-24 17:27:52,398 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:27:52,398 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:52,399 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:52,399 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:52,399 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:27:52,415 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:52,417 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:27:52,554 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:52,554 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:52,554 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:27:52,554 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:27:52,554 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:27:52,554 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:52,554 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:27:52,560 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:27:52,560 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:27:52,594 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:27:52,599 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:27:52,604 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:27:52,607 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 17:27:52,608 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:27:52,632 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 17:27:52,632 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:27:52,644 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 17:27:52,644 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 17:27:53,543 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 17:27:53,543 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:27:54,297 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 17:27:54,318 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 17:27:54,318 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [22, 20] imperfect sequences [9] total 49 [2018-01-24 17:27:54,318 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:27:54,318 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-24 17:27:54,319 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-24 17:27:54,319 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=167, Invalid=2185, Unknown=0, NotChecked=0, Total=2352 [2018-01-24 17:27:54,319 INFO L87 Difference]: Start difference. First operand 163 states and 173 transitions. Second operand 23 states. [2018-01-24 17:27:55,625 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:27:55,626 INFO L93 Difference]: Finished difference Result 163 states and 173 transitions. [2018-01-24 17:27:55,626 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-24 17:27:55,626 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 91 [2018-01-24 17:27:55,626 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:27:55,627 INFO L225 Difference]: With dead ends: 163 [2018-01-24 17:27:55,627 INFO L226 Difference]: Without dead ends: 161 [2018-01-24 17:27:55,628 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 197 GetRequests, 139 SyntacticMatches, 4 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 826 ImplicationChecksByTransitivity, 1.8s TimeCoverageRelationStatistics Valid=224, Invalid=2856, Unknown=0, NotChecked=0, Total=3080 [2018-01-24 17:27:55,629 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2018-01-24 17:27:55,645 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 161. [2018-01-24 17:27:55,645 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-01-24 17:27:55,646 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 169 transitions. [2018-01-24 17:27:55,646 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 169 transitions. Word has length 91 [2018-01-24 17:27:55,646 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:27:55,646 INFO L432 AbstractCegarLoop]: Abstraction has 161 states and 169 transitions. [2018-01-24 17:27:55,646 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-24 17:27:55,646 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 169 transitions. [2018-01-24 17:27:55,647 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-01-24 17:27:55,647 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:27:55,647 INFO L322 BasicCegarLoop]: trace histogram [5, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:27:55,647 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:27:55,647 INFO L82 PathProgramCache]: Analyzing trace with hash 1220226594, now seen corresponding path program 1 times [2018-01-24 17:27:55,647 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:27:55,648 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:55,648 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:27:55,648 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:55,648 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:27:55,667 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:55,669 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:27:55,794 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 2 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 17:27:55,794 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:27:55,794 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [13] imperfect sequences [] total 13 [2018-01-24 17:27:55,794 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:27:55,795 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-24 17:27:55,795 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-24 17:27:55,795 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=133, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:27:55,795 INFO L87 Difference]: Start difference. First operand 161 states and 169 transitions. Second operand 13 states. [2018-01-24 17:27:55,896 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:27:55,896 INFO L93 Difference]: Finished difference Result 219 states and 229 transitions. [2018-01-24 17:27:55,896 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-24 17:27:55,896 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 98 [2018-01-24 17:27:55,896 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:27:55,897 INFO L225 Difference]: With dead ends: 219 [2018-01-24 17:27:55,897 INFO L226 Difference]: Without dead ends: 159 [2018-01-24 17:27:55,898 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=39, Invalid=233, Unknown=0, NotChecked=0, Total=272 [2018-01-24 17:27:55,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-01-24 17:27:55,914 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 159. [2018-01-24 17:27:55,914 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 159 states. [2018-01-24 17:27:55,915 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 159 states to 159 states and 165 transitions. [2018-01-24 17:27:55,915 INFO L78 Accepts]: Start accepts. Automaton has 159 states and 165 transitions. Word has length 98 [2018-01-24 17:27:55,915 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:27:55,915 INFO L432 AbstractCegarLoop]: Abstraction has 159 states and 165 transitions. [2018-01-24 17:27:55,915 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-24 17:27:55,915 INFO L276 IsEmpty]: Start isEmpty. Operand 159 states and 165 transitions. [2018-01-24 17:27:55,916 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-01-24 17:27:55,916 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:27:55,916 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:27:55,916 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:27:55,916 INFO L82 PathProgramCache]: Analyzing trace with hash -1069596524, now seen corresponding path program 1 times [2018-01-24 17:27:55,916 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:27:55,917 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:55,917 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:55,917 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:55,917 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:27:55,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:55,942 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:27:56,395 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-24 17:27:56,395 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:27:56,395 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [24] imperfect sequences [] total 24 [2018-01-24 17:27:56,395 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:27:56,395 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-24 17:27:56,396 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-24 17:27:56,396 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=47, Invalid=553, Unknown=0, NotChecked=0, Total=600 [2018-01-24 17:27:56,396 INFO L87 Difference]: Start difference. First operand 159 states and 165 transitions. Second operand 25 states. [2018-01-24 17:27:56,942 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:27:56,942 INFO L93 Difference]: Finished difference Result 171 states and 181 transitions. [2018-01-24 17:27:56,943 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-24 17:27:56,943 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 105 [2018-01-24 17:27:56,943 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:27:56,944 INFO L225 Difference]: With dead ends: 171 [2018-01-24 17:27:56,944 INFO L226 Difference]: Without dead ends: 169 [2018-01-24 17:27:56,944 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 55 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=91, Invalid=1169, Unknown=0, NotChecked=0, Total=1260 [2018-01-24 17:27:56,945 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 169 states. [2018-01-24 17:27:56,962 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 169 to 165. [2018-01-24 17:27:56,963 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-01-24 17:27:56,963 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 175 transitions. [2018-01-24 17:27:56,963 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 175 transitions. Word has length 105 [2018-01-24 17:27:56,964 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:27:56,964 INFO L432 AbstractCegarLoop]: Abstraction has 165 states and 175 transitions. [2018-01-24 17:27:56,964 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-24 17:27:56,964 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 175 transitions. [2018-01-24 17:27:56,965 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 106 [2018-01-24 17:27:56,965 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:27:56,965 INFO L322 BasicCegarLoop]: trace histogram [5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:27:56,965 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:27:56,965 INFO L82 PathProgramCache]: Analyzing trace with hash -1069596523, now seen corresponding path program 1 times [2018-01-24 17:27:56,965 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:27:56,966 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:56,966 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:56,966 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:56,966 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:27:56,982 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:56,983 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:27:57,095 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:57,095 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:57,095 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:27:57,096 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 106 with the following transitions: [2018-01-24 17:27:57,096 INFO L201 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [17], [19], [20], [21], [24], [31], [36], [38], [39], [40], [43], [44], [47], [48], [49], [52], [54], [59], [63], [66], [67], [68], [71], [72], [73], [77], [79], [80], [81], [83], [86], [91], [92], [95], [96], [99], [100], [101], [104], [107], [122], [123], [126], [129], [130], [133], [136], [137], [138], [140], [141], [142], [143], [147], [150], [155], [156], [157], [159], [160], [164], [165], [166], [167], [168], [169], [170], [172], [173], [174], [176], [177], [178], [180], [181], [182], [183], [184], [188], [189], [190], [191], [192], [193], [194], [196], [198], [200], [202], [203], [204], [205], [206], [207], [208] [2018-01-24 17:27:57,099 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:27:57,099 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:27:57,285 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:27:57,285 INFO L268 AbstractInterpreter]: Visited 101 different actions 105 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 27 variables. [2018-01-24 17:27:57,291 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:27:57,291 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:57,291 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:27:57,307 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:57,307 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:27:57,371 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:57,375 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:27:57,425 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:57,425 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:27:57,585 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:57,606 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:57,606 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:27:57,609 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:57,610 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:27:57,712 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:57,721 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:27:57,732 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:57,732 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:27:57,898 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:57,900 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:27:57,900 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-24 17:27:57,900 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:27:57,901 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 17:27:57,901 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 17:27:57,901 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-24 17:27:57,901 INFO L87 Difference]: Start difference. First operand 165 states and 175 transitions. Second operand 10 states. [2018-01-24 17:27:57,937 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:27:57,937 INFO L93 Difference]: Finished difference Result 304 states and 324 transitions. [2018-01-24 17:27:57,938 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-24 17:27:57,938 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 105 [2018-01-24 17:27:57,938 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:27:57,939 INFO L225 Difference]: With dead ends: 304 [2018-01-24 17:27:57,939 INFO L226 Difference]: Without dead ends: 166 [2018-01-24 17:27:57,939 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 428 GetRequests, 410 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 33 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=133, Invalid=173, Unknown=0, NotChecked=0, Total=306 [2018-01-24 17:27:57,939 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 166 states. [2018-01-24 17:27:57,957 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 166 to 166. [2018-01-24 17:27:57,957 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 166 states. [2018-01-24 17:27:57,958 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 166 states to 166 states and 176 transitions. [2018-01-24 17:27:57,958 INFO L78 Accepts]: Start accepts. Automaton has 166 states and 176 transitions. Word has length 105 [2018-01-24 17:27:57,958 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:27:57,958 INFO L432 AbstractCegarLoop]: Abstraction has 166 states and 176 transitions. [2018-01-24 17:27:57,958 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 17:27:57,959 INFO L276 IsEmpty]: Start isEmpty. Operand 166 states and 176 transitions. [2018-01-24 17:27:57,960 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 107 [2018-01-24 17:27:57,960 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:27:57,960 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:27:57,960 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:27:57,960 INFO L82 PathProgramCache]: Analyzing trace with hash -941166284, now seen corresponding path program 2 times [2018-01-24 17:27:57,960 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:27:57,961 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:57,961 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:27:57,961 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:27:57,961 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:27:57,986 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:27:57,987 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:27:58,078 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:27:58,079 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:58,079 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:27:58,079 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:27:58,079 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:27:58,079 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:27:58,079 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:27:58,087 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:27:58,087 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:27:58,141 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:27:58,147 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:27:58,155 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:27:58,159 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-24 17:27:58,160 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:27:58,194 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-24 17:27:58,194 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:27:58,228 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-24 17:27:58,229 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-24 17:27:59,494 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-01-24 17:27:59,494 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:28:00,628 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-01-24 17:28:00,649 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-24 17:28:00,660 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [26, 24] imperfect sequences [10] total 58 [2018-01-24 17:28:00,660 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:28:00,660 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-24 17:28:00,661 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-24 17:28:00,661 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=203, Invalid=3103, Unknown=0, NotChecked=0, Total=3306 [2018-01-24 17:28:00,661 INFO L87 Difference]: Start difference. First operand 166 states and 176 transitions. Second operand 27 states. [2018-01-24 17:28:02,381 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:28:02,381 INFO L93 Difference]: Finished difference Result 166 states and 176 transitions. [2018-01-24 17:28:02,381 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-24 17:28:02,381 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 106 [2018-01-24 17:28:02,382 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:28:02,382 INFO L225 Difference]: With dead ends: 166 [2018-01-24 17:28:02,382 INFO L226 Difference]: Without dead ends: 164 [2018-01-24 17:28:02,383 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 230 GetRequests, 159 SyntacticMatches, 6 SemanticMatches, 65 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1225 ImplicationChecksByTransitivity, 2.6s TimeCoverageRelationStatistics Valid=276, Invalid=4146, Unknown=0, NotChecked=0, Total=4422 [2018-01-24 17:28:02,384 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-01-24 17:28:02,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 164. [2018-01-24 17:28:02,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 164 states. [2018-01-24 17:28:02,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 164 states to 164 states and 173 transitions. [2018-01-24 17:28:02,404 INFO L78 Accepts]: Start accepts. Automaton has 164 states and 173 transitions. Word has length 106 [2018-01-24 17:28:02,405 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:28:02,405 INFO L432 AbstractCegarLoop]: Abstraction has 164 states and 173 transitions. [2018-01-24 17:28:02,405 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-24 17:28:02,405 INFO L276 IsEmpty]: Start isEmpty. Operand 164 states and 173 transitions. [2018-01-24 17:28:02,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 111 [2018-01-24 17:28:02,405 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:28:02,406 INFO L322 BasicCegarLoop]: trace histogram [6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:28:02,406 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:28:02,406 INFO L82 PathProgramCache]: Analyzing trace with hash -1409693771, now seen corresponding path program 1 times [2018-01-24 17:28:02,406 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:28:02,407 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:28:02,407 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-24 17:28:02,407 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:28:02,407 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:28:02,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:28:02,429 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:28:02,542 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:28:02,543 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:28:02,543 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:28:02,543 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 111 with the following transitions: [2018-01-24 17:28:02,544 INFO L201 CegarAbsIntRunner]: [0], [2], [6], [10], [12], [13], [17], [19], [20], [21], [24], [31], [36], [38], [39], [40], [43], [44], [47], [48], [49], [52], [54], [59], [63], [66], [67], [68], [71], [72], [73], [77], [79], [80], [81], [83], [86], [91], [92], [95], [96], [99], [100], [101], [104], [105], [108], [109], [114], [116], [122], [123], [126], [129], [130], [133], [136], [137], [138], [140], [141], [142], [143], [147], [150], [155], [156], [157], [159], [160], [164], [165], [166], [167], [168], [169], [170], [172], [173], [174], [176], [177], [178], [180], [181], [182], [183], [184], [188], [189], [190], [191], [192], [193], [194], [196], [198], [200], [202], [203], [204], [205], [206], [207], [208] [2018-01-24 17:28:02,546 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:28:02,546 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:28:02,701 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:28:02,701 INFO L268 AbstractInterpreter]: Visited 105 different actions 109 times. Merged at 3 different actions 3 times. Never widened. Found 2 fixpoints after 2 different actions. Largest state had 27 variables. [2018-01-24 17:28:02,716 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:28:02,716 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:28:02,716 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:28:02,727 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:28:02,727 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:28:02,785 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:28:02,788 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:28:02,886 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:28:02,886 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:28:03,107 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:28:03,126 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:28:03,127 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 18 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:28:03,132 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:28:03,133 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:28:03,238 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:28:03,246 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:28:03,253 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:28:03,253 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:28:03,354 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:28:03,355 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:28:03,356 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-24 17:28:03,356 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:28:03,356 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-24 17:28:03,356 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-24 17:28:03,356 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-24 17:28:03,356 INFO L87 Difference]: Start difference. First operand 164 states and 173 transitions. Second operand 11 states. [2018-01-24 17:28:03,409 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:28:03,409 INFO L93 Difference]: Finished difference Result 301 states and 319 transitions. [2018-01-24 17:28:03,409 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 17:28:03,409 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 110 [2018-01-24 17:28:03,409 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:28:03,410 INFO L225 Difference]: With dead ends: 301 [2018-01-24 17:28:03,410 INFO L226 Difference]: Without dead ends: 165 [2018-01-24 17:28:03,411 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 449 GetRequests, 429 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=167, Invalid=213, Unknown=0, NotChecked=0, Total=380 [2018-01-24 17:28:03,411 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-01-24 17:28:03,431 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 165. [2018-01-24 17:28:03,431 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-01-24 17:28:03,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 174 transitions. [2018-01-24 17:28:03,432 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 174 transitions. Word has length 110 [2018-01-24 17:28:03,432 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:28:03,432 INFO L432 AbstractCegarLoop]: Abstraction has 165 states and 174 transitions. [2018-01-24 17:28:03,432 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-24 17:28:03,432 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 174 transitions. [2018-01-24 17:28:03,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 112 [2018-01-24 17:28:03,433 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:28:03,433 INFO L322 BasicCegarLoop]: trace histogram [7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:28:03,433 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_atomic_add_returnErr0RequiresViolation, ldv_atomic_add_returnErr1RequiresViolation, ldv_atomic_add_returnErr2RequiresViolation, ldv_atomic_add_returnErr3RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-24 17:28:03,434 INFO L82 PathProgramCache]: Analyzing trace with hash -1192058250, now seen corresponding path program 2 times [2018-01-24 17:28:03,434 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:28:03,435 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:28:03,435 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:28:03,435 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:28:03,435 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:28:03,458 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:28:03,459 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:28:03,594 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:28:03,594 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:28:03,594 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:28:03,594 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-24 17:28:03,594 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-24 17:28:03,594 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:28:03,594 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:28:03,599 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-24 17:28:03,599 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-24 17:28:03,638 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-24 17:28:03,645 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-24 17:28:03,652 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:28:03,701 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-24 17:28:03,702 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 17:28:03,703 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:28:03,703 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:28:03,705 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:28:03,705 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:11, output treesize:7 [2018-01-24 17:28:03,783 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 17:28:03,787 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 17:28:03,793 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 17:28:03,793 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:38, output treesize:26 [2018-01-24 17:28:03,802 WARN L1029 $PredicateComparison]: unable to prove that (exists ((LDV_INIT_LIST_HEAD_~list.offset Int) (v_DerPreprocessor_2 Int)) (and (= |c_#memory_int| (store |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base| (let ((.cse0 (+ LDV_INIT_LIST_HEAD_~list.offset 4))) (store (store (select |c_old(#memory_int)| |c_LDV_INIT_LIST_HEAD_#in~list.base|) LDV_INIT_LIST_HEAD_~list.offset v_DerPreprocessor_2) .cse0 (select (select |c_#memory_int| |c_LDV_INIT_LIST_HEAD_#in~list.base|) .cse0))))) (<= LDV_INIT_LIST_HEAD_~list.offset |c_LDV_INIT_LIST_HEAD_#in~list.offset|))) is different from true [2018-01-24 17:28:03,809 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 27 [2018-01-24 17:28:03,812 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 17:28:03,813 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 27 treesize of output 35 [2018-01-24 17:28:03,818 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 17:28:03,819 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 17:28:03,822 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 37 [2018-01-24 17:28:03,823 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 17:28:03,829 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:28:03,832 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:28:03,836 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:28:03,837 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 3 variables, input treesize:37, output treesize:9 [2018-01-24 17:28:04,467 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 17:28:04,468 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 36 [2018-01-24 17:28:04,469 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 17:28:04,470 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 17:28:04,470 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 15 [2018-01-24 17:28:04,470 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:28:04,472 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:28:04,475 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:28:04,475 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:32, output treesize:13 [2018-01-24 17:28:04,870 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 13 [2018-01-24 17:28:04,871 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 5 [2018-01-24 17:28:04,871 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:28:04,872 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:28:04,872 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:28:04,873 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:17, output treesize:5 [2018-01-24 17:28:04,915 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-01-24 17:28:04,915 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:28:06,249 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 9 treesize of output 7 [2018-01-24 17:28:06,251 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 3 [2018-01-24 17:28:06,286 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:28:06,287 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:28:06,291 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 17:28:06,291 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:47, output treesize:38 [2018-01-24 17:28:10,544 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 17:28:10,544 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 93 treesize of output 87 [2018-01-24 17:28:10,546 FATAL L292 ToolchainWalker]: The Plugin de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction has thrown an exception: java.lang.UnsupportedOperationException: alternation not yet supported at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.applyNonSddEliminations(ElimStorePlain.java:347) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimOneRec(ElimStorePlain.java:223) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.doElimAllRec(ElimStorePlain.java:247) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.elimAllRec(ElimStorePlain.java:199) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.elim(PartialQuantifierElimination.java:270) at de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.PartialQuantifierElimination.tryToEliminate(PartialQuantifierElimination.java:101) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer$QuantifierEliminationPostprocessor.postprocess(IterativePredicateTransformer.java:243) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.applyPostprocessors(IterativePredicateTransformer.java:445) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeBackwardSequence(IterativePredicateTransformer.java:421) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.predicates.IterativePredicateTransformer.computeWeakestPreconditionSequence(IterativePredicateTransformer.java:292) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolantsUsingUnsatCore(TraceCheckSpWp.java:328) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.computeInterpolants(TraceCheckSpWp.java:173) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.singletracecheck.TraceCheckSpWp.(TraceCheckSpWp.java:160) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.constructForwardBackward(TraceCheckConstructor.java:237) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceCheckConstructor.get(TraceCheckConstructor.java:185) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseTaipanRefinementStrategy.getTraceCheck(BaseTaipanRefinementStrategy.java:213) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.checkFeasibility(BaseRefinementStrategy.java:231) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.BaseRefinementStrategy.executeStrategy(BaseRefinementStrategy.java:205) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.tracehandling.TraceAbstractionRefinementEngine.(TraceAbstractionRefinementEngine.java:68) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.BasicCegarLoop.isCounterexampleFeasible(BasicCegarLoop.java:368) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterateInternal(AbstractCegarLoop.java:381) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.AbstractCegarLoop.iterate(AbstractCegarLoop.java:316) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.iterate(TraceAbstractionStarter.java:294) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.runCegarLoops(TraceAbstractionStarter.java:149) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionStarter.(TraceAbstractionStarter.java:113) at de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver.finish(TraceAbstractionObserver.java:117) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runObserver(PluginConnector.java:168) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.runTool(PluginConnector.java:151) at de.uni_freiburg.informatik.ultimate.core.coreplugin.PluginConnector.run(PluginConnector.java:128) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.executePluginConnector(ToolchainWalker.java:232) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.processPlugin(ToolchainWalker.java:226) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walkUnprotected(ToolchainWalker.java:142) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainWalker.walk(ToolchainWalker.java:104) at de.uni_freiburg.informatik.ultimate.core.coreplugin.ToolchainManager$Toolchain.processToolchain(ToolchainManager.java:324) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.DefaultToolchainJob.runToolchainDefault(DefaultToolchainJob.java:221) at de.uni_freiburg.informatik.ultimate.core.coreplugin.toolchain.BasicToolchainJob.run(BasicToolchainJob.java:134) at org.eclipse.core.internal.jobs.Worker.run(Worker.java:55) [2018-01-24 17:28:10,548 INFO L168 Benchmark]: Toolchain (without parser) took 43166.07 ms. Allocated memory was 304.1 MB in the beginning and 721.9 MB in the end (delta: 417.9 MB). Free memory was 263.1 MB in the beginning and 340.8 MB in the end (delta: -77.7 MB). Peak memory consumption was 340.2 MB. Max. memory is 5.3 GB. [2018-01-24 17:28:10,549 INFO L168 Benchmark]: CDTParser took 0.13 ms. Allocated memory is still 304.1 MB. Free memory is still 270.1 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-24 17:28:10,549 INFO L168 Benchmark]: CACSL2BoogieTranslator took 250.22 ms. Allocated memory is still 304.1 MB. Free memory was 263.1 MB in the beginning and 248.9 MB in the end (delta: 14.3 MB). Peak memory consumption was 14.3 MB. Max. memory is 5.3 GB. [2018-01-24 17:28:10,550 INFO L168 Benchmark]: Boogie Preprocessor took 48.18 ms. Allocated memory is still 304.1 MB. Free memory was 248.9 MB in the beginning and 246.9 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-24 17:28:10,550 INFO L168 Benchmark]: RCFGBuilder took 527.53 ms. Allocated memory is still 304.1 MB. Free memory was 246.9 MB in the beginning and 211.0 MB in the end (delta: 35.9 MB). Peak memory consumption was 35.9 MB. Max. memory is 5.3 GB. [2018-01-24 17:28:10,550 INFO L168 Benchmark]: TraceAbstraction took 42304.89 ms. Allocated memory was 304.1 MB in the beginning and 721.9 MB in the end (delta: 417.9 MB). Free memory was 211.0 MB in the beginning and 340.8 MB in the end (delta: -129.9 MB). Peak memory consumption was 288.0 MB. Max. memory is 5.3 GB. [2018-01-24 17:28:10,552 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.13 ms. Allocated memory is still 304.1 MB. Free memory is still 270.1 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 250.22 ms. Allocated memory is still 304.1 MB. Free memory was 263.1 MB in the beginning and 248.9 MB in the end (delta: 14.3 MB). Peak memory consumption was 14.3 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 48.18 ms. Allocated memory is still 304.1 MB. Free memory was 248.9 MB in the beginning and 246.9 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 527.53 ms. Allocated memory is still 304.1 MB. Free memory was 246.9 MB in the beginning and 211.0 MB in the end (delta: 35.9 MB). Peak memory consumption was 35.9 MB. Max. memory is 5.3 GB. * TraceAbstraction took 42304.89 ms. Allocated memory was 304.1 MB in the beginning and 721.9 MB in the end (delta: 417.9 MB). Free memory was 211.0 MB in the beginning and 340.8 MB in the end (delta: -129.9 MB). Peak memory consumption was 288.0 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 34 LocStat_MAX_WEQGRAPH_SIZE : 0 LocStat_MAX_SIZEOF_WEQEDGELABEL : 0 LocStat_NO_SUPPORTING_EQUALITIES : 237 LocStat_NO_SUPPORTING_DISEQUALITIES : 25 LocStat_NO_DISJUNCTIONS : -68 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 53 TransStat_MAX_WEQGRAPH_SIZE : 0 TransStat_MAX_SIZEOF_WEQEDGELABEL : 0 TransStat_NO_SUPPORTING_EQUALITIES : 108 TransStat_NO_SUPPORTING_DISEQUALITIES : 9 TransStat_NO_DISJUNCTIONS : 57 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.471909 RENAME_VARIABLES(MILLISECONDS) : 0.125985 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.168849 PROJECTAWAY(MILLISECONDS) : 0.044624 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.001376 DISJOIN(MILLISECONDS) : 2.655783 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.153994 ADD_EQUALITY(MILLISECONDS) : 0.021859 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.014552 #CONJOIN_DISJUNCTIVE : 74 #RENAME_VARIABLES : 112 #UNFREEZE : 0 #CONJOIN : 154 #PROJECTAWAY : 118 #ADD_WEAK_EQUALITY : 9 #DISJOIN : 1 #RENAME_VARIABLES_DISJUNCTIVE : 108 #ADD_EQUALITY : 111 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 8 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 39 LocStat_MAX_WEQGRAPH_SIZE : 0 LocStat_MAX_SIZEOF_WEQEDGELABEL : 0 LocStat_NO_SUPPORTING_EQUALITIES : 272 LocStat_NO_SUPPORTING_DISEQUALITIES : 30 LocStat_NO_DISJUNCTIONS : -78 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 60 TransStat_MAX_WEQGRAPH_SIZE : 0 TransStat_MAX_SIZEOF_WEQEDGELABEL : 0 TransStat_NO_SUPPORTING_EQUALITIES : 120 TransStat_NO_SUPPORTING_DISEQUALITIES : 9 TransStat_NO_DISJUNCTIONS : 64 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.741285 RENAME_VARIABLES(MILLISECONDS) : 0.170256 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.226220 PROJECTAWAY(MILLISECONDS) : 0.060358 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.001207 DISJOIN(MILLISECONDS) : 0.440717 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.202654 ADD_EQUALITY(MILLISECONDS) : 0.031474 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.013264 #CONJOIN_DISJUNCTIVE : 84 #RENAME_VARIABLES : 127 #UNFREEZE : 0 #CONJOIN : 179 #PROJECTAWAY : 135 #ADD_WEAK_EQUALITY : 15 #DISJOIN : 1 #RENAME_VARIABLES_DISJUNCTIVE : 123 #ADD_EQUALITY : 128 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 8 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 60 LocStat_MAX_WEQGRAPH_SIZE : 0 LocStat_MAX_SIZEOF_WEQEDGELABEL : 0 LocStat_NO_SUPPORTING_EQUALITIES : 418 LocStat_NO_SUPPORTING_DISEQUALITIES : 51 LocStat_NO_DISJUNCTIONS : -120 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 89 TransStat_MAX_WEQGRAPH_SIZE : 0 TransStat_MAX_SIZEOF_WEQEDGELABEL : 0 TransStat_NO_SUPPORTING_EQUALITIES : 174 TransStat_NO_SUPPORTING_DISEQUALITIES : 11 TransStat_NO_DISJUNCTIONS : 94 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.410286 RENAME_VARIABLES(MILLISECONDS) : 0.073189 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.126533 PROJECTAWAY(MILLISECONDS) : 0.027197 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.001267 DISJOIN(MILLISECONDS) : 0.396016 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.090353 ADD_EQUALITY(MILLISECONDS) : 0.017079 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.009793 #CONJOIN_DISJUNCTIVE : 126 #RENAME_VARIABLES : 190 #UNFREEZE : 0 #CONJOIN : 270 #PROJECTAWAY : 206 #ADD_WEAK_EQUALITY : 27 #DISJOIN : 1 #RENAME_VARIABLES_DISJUNCTIVE : 185 #ADD_EQUALITY : 190 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 10 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 86 LocStat_MAX_WEQGRAPH_SIZE : 0 LocStat_MAX_SIZEOF_WEQEDGELABEL : 0 LocStat_NO_SUPPORTING_EQUALITIES : 639 LocStat_NO_SUPPORTING_DISEQUALITIES : 77 LocStat_NO_DISJUNCTIONS : -172 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 125 TransStat_MAX_WEQGRAPH_SIZE : 0 TransStat_MAX_SIZEOF_WEQEDGELABEL : 0 TransStat_NO_SUPPORTING_EQUALITIES : 255 TransStat_NO_SUPPORTING_DISEQUALITIES : 13 TransStat_NO_DISJUNCTIONS : 131 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.426173 RENAME_VARIABLES(MILLISECONDS) : 0.133659 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.175074 PROJECTAWAY(MILLISECONDS) : 0.025875 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.001046 DISJOIN(MILLISECONDS) : 0.543582 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.160730 ADD_EQUALITY(MILLISECONDS) : 0.021365 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.006997 #CONJOIN_DISJUNCTIVE : 177 #RENAME_VARIABLES : 265 #UNFREEZE : 0 #CONJOIN : 387 #PROJECTAWAY : 290 #ADD_WEAK_EQUALITY : 33 #DISJOIN : 1 #RENAME_VARIABLES_DISJUNCTIVE : 259 #ADD_EQUALITY : 276 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 12 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 100 LocStat_MAX_WEQGRAPH_SIZE : 0 LocStat_MAX_SIZEOF_WEQEDGELABEL : 0 LocStat_NO_SUPPORTING_EQUALITIES : 768 LocStat_NO_SUPPORTING_DISEQUALITIES : 91 LocStat_NO_DISJUNCTIONS : -200 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 145 TransStat_MAX_WEQGRAPH_SIZE : 0 TransStat_MAX_SIZEOF_WEQEDGELABEL : 0 TransStat_NO_SUPPORTING_EQUALITIES : 287 TransStat_NO_SUPPORTING_DISEQUALITIES : 13 TransStat_NO_DISJUNCTIONS : 151 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.201049 RENAME_VARIABLES(MILLISECONDS) : 0.059633 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.081481 PROJECTAWAY(MILLISECONDS) : 0.021631 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.000915 DISJOIN(MILLISECONDS) : 0.326112 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.078481 ADD_EQUALITY(MILLISECONDS) : 0.012423 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.005948 #CONJOIN_DISJUNCTIVE : 200 #RENAME_VARIABLES : 302 #UNFREEZE : 0 #CONJOIN : 435 #PROJECTAWAY : 331 #ADD_WEAK_EQUALITY : 39 #DISJOIN : 1 #RENAME_VARIABLES_DISJUNCTIVE : 296 #ADD_EQUALITY : 313 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 12 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 104 LocStat_MAX_WEQGRAPH_SIZE : 0 LocStat_MAX_SIZEOF_WEQEDGELABEL : 0 LocStat_NO_SUPPORTING_EQUALITIES : 810 LocStat_NO_SUPPORTING_DISEQUALITIES : 99 LocStat_NO_DISJUNCTIONS : -208 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 149 TransStat_MAX_WEQGRAPH_SIZE : 0 TransStat_MAX_SIZEOF_WEQEDGELABEL : 0 TransStat_NO_SUPPORTING_EQUALITIES : 304 TransStat_NO_SUPPORTING_DISEQUALITIES : 18 TransStat_NO_DISJUNCTIONS : 158 TransStat_MAX_NO_DISJUNCTIONS : 4 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.623040 RENAME_VARIABLES(MILLISECONDS) : 0.254441 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.596332 PROJECTAWAY(MILLISECONDS) : 0.053271 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.001786 DISJOIN(MILLISECONDS) : 0.482211 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.281546 ADD_EQUALITY(MILLISECONDS) : 0.008822 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.011368 #CONJOIN_DISJUNCTIVE : 208 #RENAME_VARIABLES : 315 #UNFREEZE : 0 #CONJOIN : 472 #PROJECTAWAY : 343 #ADD_WEAK_EQUALITY : 40 #DISJOIN : 1 #RENAME_VARIABLES_DISJUNCTIVE : 306 #ADD_EQUALITY : 322 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 16 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - ExceptionOrErrorResult: UnsupportedOperationException: alternation not yet supported de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: UnsupportedOperationException: alternation not yet supported: de.uni_freiburg.informatik.ultimate.modelcheckerutils.smt.ElimStorePlain.applyNonSddEliminations(ElimStorePlain.java:347) RESULT: Ultimate could not prove your program: Toolchain returned no result. Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_3_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-24_17-28-10-564.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_3_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-24_17-28-10-564.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_3_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-24_17-28-10-564.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_3_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-VPDomainBenchmark-1-2018-01-24_17-28-10-564.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_3_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-1-2018-01-24_17-28-10-564.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_3_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-VPDomainBenchmark-2-2018-01-24_17-28-10-564.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_3_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-2-2018-01-24_17-28-10-564.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_3_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-VPDomainBenchmark-3-2018-01-24_17-28-10-564.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_3_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-3-2018-01-24_17-28-10-564.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_3_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-VPDomainBenchmark-4-2018-01-24_17-28-10-564.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_3_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-4-2018-01-24_17-28-10-564.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_3_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-VPDomainBenchmark-5-2018-01-24_17-28-10-564.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_3_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-5-2018-01-24_17-28-10-564.csv Received shutdown request...