java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf -i ../../../trunk/examples/svcomp/memsafety-ext2/optional_data_creation_test04_false-valid-memtrack.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-24 17:06:51,558 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-24 17:06:51,560 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-24 17:06:51,574 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-24 17:06:51,574 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-24 17:06:51,575 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-24 17:06:51,576 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-24 17:06:51,578 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-24 17:06:51,580 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-24 17:06:51,580 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-24 17:06:51,581 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-24 17:06:51,581 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-24 17:06:51,582 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-24 17:06:51,583 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-24 17:06:51,584 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-24 17:06:51,587 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-24 17:06:51,589 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-24 17:06:51,591 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-24 17:06:51,592 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-24 17:06:51,593 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-24 17:06:51,595 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-24 17:06:51,595 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-24 17:06:51,596 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-24 17:06:51,597 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-24 17:06:51,597 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-24 17:06:51,598 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-24 17:06:51,599 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-24 17:06:51,599 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-24 17:06:51,599 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-24 17:06:51,600 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-24 17:06:51,600 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-24 17:06:51,601 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf [2018-01-24 17:06:51,610 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-24 17:06:51,611 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-24 17:06:51,611 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-24 17:06:51,612 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-24 17:06:51,612 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-24 17:06:51,612 INFO L133 SettingsManager]: * Deactivate Weak Equivalences=true [2018-01-24 17:06:51,612 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-24 17:06:51,612 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-24 17:06:51,613 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-24 17:06:51,613 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-24 17:06:51,614 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-24 17:06:51,614 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-24 17:06:51,614 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-24 17:06:51,614 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-24 17:06:51,614 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-24 17:06:51,615 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-24 17:06:51,615 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-24 17:06:51,615 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-24 17:06:51,615 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-24 17:06:51,615 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-24 17:06:51,616 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-24 17:06:51,616 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-24 17:06:51,616 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-24 17:06:51,616 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-24 17:06:51,616 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 17:06:51,617 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-24 17:06:51,617 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-24 17:06:51,617 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-24 17:06:51,617 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-24 17:06:51,617 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-24 17:06:51,617 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-24 17:06:51,618 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-24 17:06:51,618 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-24 17:06:51,618 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-24 17:06:51,619 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-24 17:06:51,619 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-24 17:06:51,655 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-24 17:06:51,667 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-24 17:06:51,671 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-24 17:06:51,673 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-24 17:06:51,673 INFO L276 PluginConnector]: CDTParser initialized [2018-01-24 17:06:51,674 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety-ext2/optional_data_creation_test04_false-valid-memtrack.i [2018-01-24 17:06:51,854 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-24 17:06:51,860 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-24 17:06:51,861 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-24 17:06:51,861 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-24 17:06:51,867 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-24 17:06:51,868 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 05:06:51" (1/1) ... [2018-01-24 17:06:51,870 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@153f7457 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:06:51, skipping insertion in model container [2018-01-24 17:06:51,870 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 24.01 05:06:51" (1/1) ... [2018-01-24 17:06:51,889 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 17:06:51,927 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-24 17:06:52,042 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 17:06:52,059 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-24 17:06:52,069 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:06:52 WrapperNode [2018-01-24 17:06:52,070 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-24 17:06:52,070 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-24 17:06:52,071 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-24 17:06:52,071 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-24 17:06:52,086 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:06:52" (1/1) ... [2018-01-24 17:06:52,086 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:06:52" (1/1) ... [2018-01-24 17:06:52,097 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:06:52" (1/1) ... [2018-01-24 17:06:52,097 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:06:52" (1/1) ... [2018-01-24 17:06:52,103 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:06:52" (1/1) ... [2018-01-24 17:06:52,107 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:06:52" (1/1) ... [2018-01-24 17:06:52,108 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:06:52" (1/1) ... [2018-01-24 17:06:52,110 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-24 17:06:52,111 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-24 17:06:52,111 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-24 17:06:52,111 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-24 17:06:52,112 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:06:52" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-24 17:06:52,165 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-24 17:06:52,166 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-24 17:06:52,166 INFO L136 BoogieDeclarations]: Found implementation of procedure create_data [2018-01-24 17:06:52,166 INFO L136 BoogieDeclarations]: Found implementation of procedure freeData [2018-01-24 17:06:52,166 INFO L136 BoogieDeclarations]: Found implementation of procedure append [2018-01-24 17:06:52,166 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-24 17:06:52,166 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-24 17:06:52,167 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-24 17:06:52,167 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-24 17:06:52,167 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-24 17:06:52,167 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-24 17:06:52,167 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-24 17:06:52,167 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-24 17:06:52,167 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-24 17:06:52,168 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-24 17:06:52,168 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-24 17:06:52,168 INFO L128 BoogieDeclarations]: Found specification of procedure create_data [2018-01-24 17:06:52,168 INFO L128 BoogieDeclarations]: Found specification of procedure freeData [2018-01-24 17:06:52,168 INFO L128 BoogieDeclarations]: Found specification of procedure append [2018-01-24 17:06:52,168 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-24 17:06:52,169 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-24 17:06:52,169 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-24 17:06:52,558 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-24 17:06:52,558 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 05:06:52 BoogieIcfgContainer [2018-01-24 17:06:52,558 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-24 17:06:52,559 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-24 17:06:52,560 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-24 17:06:52,561 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-24 17:06:52,562 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 24.01 05:06:51" (1/3) ... [2018-01-24 17:06:52,563 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5ad48302 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 05:06:52, skipping insertion in model container [2018-01-24 17:06:52,563 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 24.01 05:06:52" (2/3) ... [2018-01-24 17:06:52,563 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5ad48302 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 24.01 05:06:52, skipping insertion in model container [2018-01-24 17:06:52,563 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 24.01 05:06:52" (3/3) ... [2018-01-24 17:06:52,564 INFO L105 eAbstractionObserver]: Analyzing ICFG optional_data_creation_test04_false-valid-memtrack.i [2018-01-24 17:06:52,571 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-24 17:06:52,578 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 45 error locations. [2018-01-24 17:06:52,617 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-24 17:06:52,617 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-24 17:06:52,617 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-24 17:06:52,617 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-24 17:06:52,617 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-24 17:06:52,618 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-24 17:06:52,618 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-24 17:06:52,618 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-24 17:06:52,618 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-24 17:06:52,636 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states. [2018-01-24 17:06:52,642 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-01-24 17:06:52,642 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:06:52,643 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:06:52,643 INFO L371 AbstractCegarLoop]: === Iteration 1 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:06:52,647 INFO L82 PathProgramCache]: Analyzing trace with hash -548983798, now seen corresponding path program 1 times [2018-01-24 17:06:52,649 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:06:52,688 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:52,688 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:06:52,689 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:52,689 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:06:52,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:06:52,728 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:06:52,776 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:06:52,778 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:06:52,778 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 17:06:52,778 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:06:52,781 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 17:06:52,791 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 17:06:52,791 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 17:06:52,793 INFO L87 Difference]: Start difference. First operand 121 states. Second operand 3 states. [2018-01-24 17:06:53,087 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:06:53,088 INFO L93 Difference]: Finished difference Result 235 states and 262 transitions. [2018-01-24 17:06:53,088 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 17:06:53,090 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-01-24 17:06:53,090 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:06:53,102 INFO L225 Difference]: With dead ends: 235 [2018-01-24 17:06:53,102 INFO L226 Difference]: Without dead ends: 120 [2018-01-24 17:06:53,106 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 17:06:53,120 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-01-24 17:06:53,146 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 117. [2018-01-24 17:06:53,147 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-01-24 17:06:53,150 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 124 transitions. [2018-01-24 17:06:53,152 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 124 transitions. Word has length 7 [2018-01-24 17:06:53,152 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:06:53,152 INFO L432 AbstractCegarLoop]: Abstraction has 117 states and 124 transitions. [2018-01-24 17:06:53,152 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 17:06:53,152 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 124 transitions. [2018-01-24 17:06:53,153 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-01-24 17:06:53,153 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:06:53,153 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:06:53,153 INFO L371 AbstractCegarLoop]: === Iteration 2 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:06:53,154 INFO L82 PathProgramCache]: Analyzing trace with hash -548983797, now seen corresponding path program 1 times [2018-01-24 17:06:53,154 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:06:53,154 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:53,155 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:06:53,155 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:53,155 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:06:53,168 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:06:53,169 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:06:53,212 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:06:53,212 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:06:53,213 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-24 17:06:53,213 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:06:53,214 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-24 17:06:53,214 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-24 17:06:53,214 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 17:06:53,215 INFO L87 Difference]: Start difference. First operand 117 states and 124 transitions. Second operand 3 states. [2018-01-24 17:06:53,291 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:06:53,291 INFO L93 Difference]: Finished difference Result 119 states and 127 transitions. [2018-01-24 17:06:53,292 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-24 17:06:53,292 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-01-24 17:06:53,292 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:06:53,294 INFO L225 Difference]: With dead ends: 119 [2018-01-24 17:06:53,294 INFO L226 Difference]: Without dead ends: 118 [2018-01-24 17:06:53,295 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-24 17:06:53,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 118 states. [2018-01-24 17:06:53,303 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 118 to 116. [2018-01-24 17:06:53,304 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-01-24 17:06:53,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 123 transitions. [2018-01-24 17:06:53,306 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 123 transitions. Word has length 7 [2018-01-24 17:06:53,306 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:06:53,306 INFO L432 AbstractCegarLoop]: Abstraction has 116 states and 123 transitions. [2018-01-24 17:06:53,306 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-24 17:06:53,307 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 123 transitions. [2018-01-24 17:06:53,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-01-24 17:06:53,307 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:06:53,307 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:06:53,307 INFO L371 AbstractCegarLoop]: === Iteration 3 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:06:53,308 INFO L82 PathProgramCache]: Analyzing trace with hash 1805977305, now seen corresponding path program 1 times [2018-01-24 17:06:53,308 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:06:53,309 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:53,309 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:06:53,309 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:53,309 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:06:53,329 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:06:53,330 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:06:53,401 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:06:53,401 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:06:53,401 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 17:06:53,402 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:06:53,402 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 17:06:53,402 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 17:06:53,402 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:06:53,403 INFO L87 Difference]: Start difference. First operand 116 states and 123 transitions. Second operand 5 states. [2018-01-24 17:06:53,642 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:06:53,642 INFO L93 Difference]: Finished difference Result 130 states and 138 transitions. [2018-01-24 17:06:53,642 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 17:06:53,642 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 14 [2018-01-24 17:06:53,643 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:06:53,644 INFO L225 Difference]: With dead ends: 130 [2018-01-24 17:06:53,644 INFO L226 Difference]: Without dead ends: 129 [2018-01-24 17:06:53,645 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 17:06:53,645 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-01-24 17:06:53,655 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 122. [2018-01-24 17:06:53,655 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-01-24 17:06:53,657 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 131 transitions. [2018-01-24 17:06:53,657 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 131 transitions. Word has length 14 [2018-01-24 17:06:53,657 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:06:53,658 INFO L432 AbstractCegarLoop]: Abstraction has 122 states and 131 transitions. [2018-01-24 17:06:53,658 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 17:06:53,658 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 131 transitions. [2018-01-24 17:06:53,658 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 15 [2018-01-24 17:06:53,658 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:06:53,659 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:06:53,659 INFO L371 AbstractCegarLoop]: === Iteration 4 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:06:53,659 INFO L82 PathProgramCache]: Analyzing trace with hash 1805977306, now seen corresponding path program 1 times [2018-01-24 17:06:53,659 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:06:53,660 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:53,660 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:06:53,661 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:53,661 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:06:53,676 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:06:53,678 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:06:53,773 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:06:53,773 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:06:53,773 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 17:06:53,773 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:06:53,773 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 17:06:53,774 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 17:06:53,774 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 17:06:53,774 INFO L87 Difference]: Start difference. First operand 122 states and 131 transitions. Second operand 7 states. [2018-01-24 17:06:53,961 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:06:53,962 INFO L93 Difference]: Finished difference Result 128 states and 137 transitions. [2018-01-24 17:06:54,002 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 17:06:54,003 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 14 [2018-01-24 17:06:54,003 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:06:54,004 INFO L225 Difference]: With dead ends: 128 [2018-01-24 17:06:54,004 INFO L226 Difference]: Without dead ends: 127 [2018-01-24 17:06:54,004 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=18, Invalid=38, Unknown=0, NotChecked=0, Total=56 [2018-01-24 17:06:54,005 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 127 states. [2018-01-24 17:06:54,013 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 127 to 122. [2018-01-24 17:06:54,013 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-01-24 17:06:54,015 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 130 transitions. [2018-01-24 17:06:54,015 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 130 transitions. Word has length 14 [2018-01-24 17:06:54,015 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:06:54,015 INFO L432 AbstractCegarLoop]: Abstraction has 122 states and 130 transitions. [2018-01-24 17:06:54,015 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 17:06:54,015 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 130 transitions. [2018-01-24 17:06:54,016 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-01-24 17:06:54,016 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:06:54,016 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:06:54,016 INFO L371 AbstractCegarLoop]: === Iteration 5 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:06:54,016 INFO L82 PathProgramCache]: Analyzing trace with hash 150721727, now seen corresponding path program 1 times [2018-01-24 17:06:54,016 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:06:54,017 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:54,017 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:06:54,017 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:54,017 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:06:54,030 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:06:54,031 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:06:54,055 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:06:54,055 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:06:54,055 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 17:06:54,055 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:06:54,056 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 17:06:54,056 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 17:06:54,056 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 17:06:54,056 INFO L87 Difference]: Start difference. First operand 122 states and 130 transitions. Second operand 4 states. [2018-01-24 17:06:54,153 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:06:54,153 INFO L93 Difference]: Finished difference Result 122 states and 130 transitions. [2018-01-24 17:06:54,153 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 17:06:54,154 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-01-24 17:06:54,154 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:06:54,155 INFO L225 Difference]: With dead ends: 122 [2018-01-24 17:06:54,155 INFO L226 Difference]: Without dead ends: 121 [2018-01-24 17:06:54,156 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:06:54,156 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-01-24 17:06:54,164 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 121. [2018-01-24 17:06:54,164 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121 states. [2018-01-24 17:06:54,165 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 129 transitions. [2018-01-24 17:06:54,165 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 129 transitions. Word has length 15 [2018-01-24 17:06:54,165 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:06:54,165 INFO L432 AbstractCegarLoop]: Abstraction has 121 states and 129 transitions. [2018-01-24 17:06:54,165 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 17:06:54,166 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 129 transitions. [2018-01-24 17:06:54,166 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 16 [2018-01-24 17:06:54,166 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:06:54,166 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:06:54,166 INFO L371 AbstractCegarLoop]: === Iteration 6 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:06:54,167 INFO L82 PathProgramCache]: Analyzing trace with hash 150721728, now seen corresponding path program 1 times [2018-01-24 17:06:54,167 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:06:54,168 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:54,168 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:06:54,168 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:54,168 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:06:54,179 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:06:54,180 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:06:54,263 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:06:54,263 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:06:54,263 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 17:06:54,263 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:06:54,264 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 17:06:54,264 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 17:06:54,264 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 17:06:54,265 INFO L87 Difference]: Start difference. First operand 121 states and 129 transitions. Second operand 4 states. [2018-01-24 17:06:54,326 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:06:54,327 INFO L93 Difference]: Finished difference Result 121 states and 129 transitions. [2018-01-24 17:06:54,327 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 17:06:54,327 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 15 [2018-01-24 17:06:54,327 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:06:54,328 INFO L225 Difference]: With dead ends: 121 [2018-01-24 17:06:54,328 INFO L226 Difference]: Without dead ends: 120 [2018-01-24 17:06:54,329 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:06:54,329 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 120 states. [2018-01-24 17:06:54,333 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 120 to 120. [2018-01-24 17:06:54,334 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-01-24 17:06:54,335 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 128 transitions. [2018-01-24 17:06:54,336 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 128 transitions. Word has length 15 [2018-01-24 17:06:54,337 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:06:54,337 INFO L432 AbstractCegarLoop]: Abstraction has 120 states and 128 transitions. [2018-01-24 17:06:54,337 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 17:06:54,337 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 128 transitions. [2018-01-24 17:06:54,338 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-24 17:06:54,338 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:06:54,338 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:06:54,338 INFO L371 AbstractCegarLoop]: === Iteration 7 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:06:54,338 INFO L82 PathProgramCache]: Analyzing trace with hash 1247099981, now seen corresponding path program 1 times [2018-01-24 17:06:54,339 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:06:54,339 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:54,340 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:06:54,340 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:54,340 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:06:54,349 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:06:54,349 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:06:54,385 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:06:54,385 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:06:54,386 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 17:06:54,386 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:06:54,386 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 17:06:54,387 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 17:06:54,387 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:06:54,387 INFO L87 Difference]: Start difference. First operand 120 states and 128 transitions. Second operand 5 states. [2018-01-24 17:06:54,584 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:06:54,584 INFO L93 Difference]: Finished difference Result 136 states and 145 transitions. [2018-01-24 17:06:54,584 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 17:06:54,584 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-01-24 17:06:54,585 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:06:54,586 INFO L225 Difference]: With dead ends: 136 [2018-01-24 17:06:54,586 INFO L226 Difference]: Without dead ends: 135 [2018-01-24 17:06:54,586 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 17:06:54,587 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 135 states. [2018-01-24 17:06:54,593 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 135 to 123. [2018-01-24 17:06:54,593 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-01-24 17:06:54,594 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 132 transitions. [2018-01-24 17:06:54,595 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 132 transitions. Word has length 22 [2018-01-24 17:06:54,595 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:06:54,595 INFO L432 AbstractCegarLoop]: Abstraction has 123 states and 132 transitions. [2018-01-24 17:06:54,595 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 17:06:54,595 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 132 transitions. [2018-01-24 17:06:54,596 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-24 17:06:54,596 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:06:54,596 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:06:54,596 INFO L371 AbstractCegarLoop]: === Iteration 8 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:06:54,596 INFO L82 PathProgramCache]: Analyzing trace with hash 1247099982, now seen corresponding path program 1 times [2018-01-24 17:06:54,596 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:06:54,597 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:54,597 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:06:54,597 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:54,597 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:06:54,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:06:54,609 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:06:54,652 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:06:54,652 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:06:54,653 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 17:06:54,653 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:06:54,653 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 17:06:54,653 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 17:06:54,654 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:06:54,654 INFO L87 Difference]: Start difference. First operand 123 states and 132 transitions. Second operand 5 states. [2018-01-24 17:06:54,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:06:54,788 INFO L93 Difference]: Finished difference Result 130 states and 139 transitions. [2018-01-24 17:06:54,788 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 17:06:54,788 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-01-24 17:06:54,788 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:06:54,789 INFO L225 Difference]: With dead ends: 130 [2018-01-24 17:06:54,789 INFO L226 Difference]: Without dead ends: 129 [2018-01-24 17:06:54,789 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 17:06:54,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 129 states. [2018-01-24 17:06:54,795 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 129 to 123. [2018-01-24 17:06:54,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-01-24 17:06:54,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 131 transitions. [2018-01-24 17:06:54,797 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 131 transitions. Word has length 22 [2018-01-24 17:06:54,797 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:06:54,797 INFO L432 AbstractCegarLoop]: Abstraction has 123 states and 131 transitions. [2018-01-24 17:06:54,797 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 17:06:54,797 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 131 transitions. [2018-01-24 17:06:54,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-24 17:06:54,798 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:06:54,798 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:06:54,798 INFO L371 AbstractCegarLoop]: === Iteration 9 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:06:54,798 INFO L82 PathProgramCache]: Analyzing trace with hash 4873111, now seen corresponding path program 1 times [2018-01-24 17:06:54,799 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:06:54,799 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:54,799 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:06:54,800 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:54,800 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:06:54,812 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:06:54,813 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:06:54,840 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:06:54,840 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:06:54,841 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 17:06:54,841 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:06:54,841 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 17:06:54,841 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 17:06:54,841 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 17:06:54,842 INFO L87 Difference]: Start difference. First operand 123 states and 131 transitions. Second operand 4 states. [2018-01-24 17:06:54,943 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:06:54,943 INFO L93 Difference]: Finished difference Result 123 states and 131 transitions. [2018-01-24 17:06:54,943 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 17:06:54,944 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2018-01-24 17:06:54,944 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:06:54,944 INFO L225 Difference]: With dead ends: 123 [2018-01-24 17:06:54,944 INFO L226 Difference]: Without dead ends: 119 [2018-01-24 17:06:54,945 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:06:54,945 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2018-01-24 17:06:54,949 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 119. [2018-01-24 17:06:54,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-01-24 17:06:54,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 127 transitions. [2018-01-24 17:06:54,951 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 127 transitions. Word has length 23 [2018-01-24 17:06:54,951 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:06:54,951 INFO L432 AbstractCegarLoop]: Abstraction has 119 states and 127 transitions. [2018-01-24 17:06:54,952 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 17:06:54,952 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 127 transitions. [2018-01-24 17:06:54,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-24 17:06:54,953 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:06:54,953 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:06:54,953 INFO L371 AbstractCegarLoop]: === Iteration 10 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:06:54,953 INFO L82 PathProgramCache]: Analyzing trace with hash 4873112, now seen corresponding path program 1 times [2018-01-24 17:06:54,953 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:06:54,954 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:54,955 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:06:54,955 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:54,955 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:06:54,966 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:06:54,967 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:06:55,018 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:06:55,018 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:06:55,018 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 17:06:55,019 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:06:55,019 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 17:06:55,019 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 17:06:55,019 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 17:06:55,019 INFO L87 Difference]: Start difference. First operand 119 states and 127 transitions. Second operand 4 states. [2018-01-24 17:06:55,090 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:06:55,090 INFO L93 Difference]: Finished difference Result 125 states and 133 transitions. [2018-01-24 17:06:55,090 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 17:06:55,091 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 23 [2018-01-24 17:06:55,091 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:06:55,092 INFO L225 Difference]: With dead ends: 125 [2018-01-24 17:06:55,092 INFO L226 Difference]: Without dead ends: 123 [2018-01-24 17:06:55,092 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:06:55,092 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 123 states. [2018-01-24 17:06:55,096 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 123 to 120. [2018-01-24 17:06:55,096 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 120 states. [2018-01-24 17:06:55,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 120 states to 120 states and 128 transitions. [2018-01-24 17:06:55,098 INFO L78 Accepts]: Start accepts. Automaton has 120 states and 128 transitions. Word has length 23 [2018-01-24 17:06:55,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:06:55,098 INFO L432 AbstractCegarLoop]: Abstraction has 120 states and 128 transitions. [2018-01-24 17:06:55,098 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 17:06:55,098 INFO L276 IsEmpty]: Start isEmpty. Operand 120 states and 128 transitions. [2018-01-24 17:06:55,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-24 17:06:55,099 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:06:55,099 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:06:55,099 INFO L371 AbstractCegarLoop]: === Iteration 11 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:06:55,100 INFO L82 PathProgramCache]: Analyzing trace with hash 167210254, now seen corresponding path program 1 times [2018-01-24 17:06:55,100 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:06:55,101 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:55,101 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:06:55,101 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:55,101 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:06:55,112 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:06:55,113 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:06:55,156 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:06:55,156 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:06:55,157 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-24 17:06:55,157 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:06:55,157 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-24 17:06:55,157 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-24 17:06:55,157 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 17:06:55,157 INFO L87 Difference]: Start difference. First operand 120 states and 128 transitions. Second operand 4 states. [2018-01-24 17:06:55,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:06:55,374 INFO L93 Difference]: Finished difference Result 129 states and 137 transitions. [2018-01-24 17:06:55,374 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 17:06:55,374 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 24 [2018-01-24 17:06:55,374 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:06:55,375 INFO L225 Difference]: With dead ends: 129 [2018-01-24 17:06:55,375 INFO L226 Difference]: Without dead ends: 128 [2018-01-24 17:06:55,376 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-24 17:06:55,376 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 128 states. [2018-01-24 17:06:55,380 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 128 to 122. [2018-01-24 17:06:55,380 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-01-24 17:06:55,381 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 131 transitions. [2018-01-24 17:06:55,381 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 131 transitions. Word has length 24 [2018-01-24 17:06:55,381 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:06:55,381 INFO L432 AbstractCegarLoop]: Abstraction has 122 states and 131 transitions. [2018-01-24 17:06:55,381 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-24 17:06:55,381 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 131 transitions. [2018-01-24 17:06:55,382 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-24 17:06:55,382 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:06:55,382 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:06:55,382 INFO L371 AbstractCegarLoop]: === Iteration 12 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:06:55,383 INFO L82 PathProgramCache]: Analyzing trace with hash 167210255, now seen corresponding path program 1 times [2018-01-24 17:06:55,383 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:06:55,383 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:55,384 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:06:55,384 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:55,384 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:06:55,394 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:06:55,395 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:06:55,494 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:06:55,495 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:06:55,495 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 17:06:55,495 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:06:55,495 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 17:06:55,495 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 17:06:55,495 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-24 17:06:55,496 INFO L87 Difference]: Start difference. First operand 122 states and 131 transitions. Second operand 7 states. [2018-01-24 17:06:55,693 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:06:55,693 INFO L93 Difference]: Finished difference Result 123 states and 131 transitions. [2018-01-24 17:06:55,693 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 17:06:55,693 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 24 [2018-01-24 17:06:55,693 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:06:55,694 INFO L225 Difference]: With dead ends: 123 [2018-01-24 17:06:55,694 INFO L226 Difference]: Without dead ends: 122 [2018-01-24 17:06:55,694 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=32, Invalid=78, Unknown=0, NotChecked=0, Total=110 [2018-01-24 17:06:55,695 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 122 states. [2018-01-24 17:06:55,698 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 122 to 122. [2018-01-24 17:06:55,698 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-01-24 17:06:55,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 130 transitions. [2018-01-24 17:06:55,699 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 130 transitions. Word has length 24 [2018-01-24 17:06:55,699 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:06:55,699 INFO L432 AbstractCegarLoop]: Abstraction has 122 states and 130 transitions. [2018-01-24 17:06:55,699 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 17:06:55,699 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 130 transitions. [2018-01-24 17:06:55,700 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 25 [2018-01-24 17:06:55,700 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:06:55,700 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:06:55,700 INFO L371 AbstractCegarLoop]: === Iteration 13 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:06:55,700 INFO L82 PathProgramCache]: Analyzing trace with hash 151037655, now seen corresponding path program 1 times [2018-01-24 17:06:55,700 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:06:55,701 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:55,701 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:06:55,701 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:55,701 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:06:55,710 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:06:55,711 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:06:55,780 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:06:55,780 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:06:55,780 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 17:06:55,780 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:06:55,781 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 17:06:55,781 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 17:06:55,781 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=8, Invalid=12, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:06:55,781 INFO L87 Difference]: Start difference. First operand 122 states and 130 transitions. Second operand 5 states. [2018-01-24 17:06:55,917 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:06:55,917 INFO L93 Difference]: Finished difference Result 122 states and 130 transitions. [2018-01-24 17:06:55,917 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-24 17:06:55,917 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 24 [2018-01-24 17:06:55,918 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:06:55,918 INFO L225 Difference]: With dead ends: 122 [2018-01-24 17:06:55,919 INFO L226 Difference]: Without dead ends: 119 [2018-01-24 17:06:55,919 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-01-24 17:06:55,919 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2018-01-24 17:06:55,925 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 117. [2018-01-24 17:06:55,925 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 117 states. [2018-01-24 17:06:55,926 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 117 states to 117 states and 125 transitions. [2018-01-24 17:06:55,926 INFO L78 Accepts]: Start accepts. Automaton has 117 states and 125 transitions. Word has length 24 [2018-01-24 17:06:55,926 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:06:55,927 INFO L432 AbstractCegarLoop]: Abstraction has 117 states and 125 transitions. [2018-01-24 17:06:55,927 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 17:06:55,927 INFO L276 IsEmpty]: Start isEmpty. Operand 117 states and 125 transitions. [2018-01-24 17:06:55,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-24 17:06:55,928 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:06:55,928 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:06:55,928 INFO L371 AbstractCegarLoop]: === Iteration 14 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:06:55,929 INFO L82 PathProgramCache]: Analyzing trace with hash 1118005000, now seen corresponding path program 1 times [2018-01-24 17:06:55,929 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:06:55,929 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:55,930 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:06:55,930 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:55,930 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:06:55,942 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:06:55,943 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:06:56,066 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:06:56,066 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:06:56,066 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-24 17:06:56,066 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:06:56,067 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 17:06:56,067 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 17:06:56,067 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-01-24 17:06:56,067 INFO L87 Difference]: Start difference. First operand 117 states and 125 transitions. Second operand 8 states. [2018-01-24 17:06:56,423 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:06:56,423 INFO L93 Difference]: Finished difference Result 132 states and 141 transitions. [2018-01-24 17:06:56,423 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 17:06:56,423 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 29 [2018-01-24 17:06:56,424 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:06:56,425 INFO L225 Difference]: With dead ends: 132 [2018-01-24 17:06:56,425 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 17:06:56,426 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2018-01-24 17:06:56,426 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 17:06:56,432 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 123. [2018-01-24 17:06:56,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-01-24 17:06:56,434 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 132 transitions. [2018-01-24 17:06:56,434 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 132 transitions. Word has length 29 [2018-01-24 17:06:56,434 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:06:56,434 INFO L432 AbstractCegarLoop]: Abstraction has 123 states and 132 transitions. [2018-01-24 17:06:56,434 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 17:06:56,434 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 132 transitions. [2018-01-24 17:06:56,435 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 30 [2018-01-24 17:06:56,435 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:06:56,436 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:06:56,436 INFO L371 AbstractCegarLoop]: === Iteration 15 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:06:56,436 INFO L82 PathProgramCache]: Analyzing trace with hash 1118005001, now seen corresponding path program 1 times [2018-01-24 17:06:56,436 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:06:56,437 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:56,437 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:06:56,437 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:56,437 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:06:56,450 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:06:56,451 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:06:56,556 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:06:56,556 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:06:56,556 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 17:06:56,556 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:06:56,557 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 17:06:56,557 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 17:06:56,557 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=29, Unknown=0, NotChecked=0, Total=42 [2018-01-24 17:06:56,557 INFO L87 Difference]: Start difference. First operand 123 states and 132 transitions. Second operand 7 states. [2018-01-24 17:06:57,055 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:06:57,055 INFO L93 Difference]: Finished difference Result 132 states and 142 transitions. [2018-01-24 17:06:57,055 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 17:06:57,055 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 29 [2018-01-24 17:06:57,056 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:06:57,056 INFO L225 Difference]: With dead ends: 132 [2018-01-24 17:06:57,057 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 17:06:57,057 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=28, Invalid=62, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:06:57,057 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 17:06:57,063 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 123. [2018-01-24 17:06:57,063 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 123 states. [2018-01-24 17:06:57,063 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 123 states to 123 states and 131 transitions. [2018-01-24 17:06:57,064 INFO L78 Accepts]: Start accepts. Automaton has 123 states and 131 transitions. Word has length 29 [2018-01-24 17:06:57,064 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:06:57,064 INFO L432 AbstractCegarLoop]: Abstraction has 123 states and 131 transitions. [2018-01-24 17:06:57,064 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 17:06:57,064 INFO L276 IsEmpty]: Start isEmpty. Operand 123 states and 131 transitions. [2018-01-24 17:06:57,065 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-24 17:06:57,065 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:06:57,065 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:06:57,065 INFO L371 AbstractCegarLoop]: === Iteration 16 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:06:57,065 INFO L82 PathProgramCache]: Analyzing trace with hash 1228344885, now seen corresponding path program 1 times [2018-01-24 17:06:57,066 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:06:57,066 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:57,066 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:06:57,067 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:57,067 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:06:57,076 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:06:57,077 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:06:57,137 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:06:57,137 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:06:57,137 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 17:06:57,137 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:06:57,138 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 17:06:57,138 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 17:06:57,138 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:06:57,138 INFO L87 Difference]: Start difference. First operand 123 states and 131 transitions. Second operand 5 states. [2018-01-24 17:06:57,293 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:06:57,293 INFO L93 Difference]: Finished difference Result 123 states and 131 transitions. [2018-01-24 17:06:57,294 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 17:06:57,294 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2018-01-24 17:06:57,294 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:06:57,295 INFO L225 Difference]: With dead ends: 123 [2018-01-24 17:06:57,295 INFO L226 Difference]: Without dead ends: 121 [2018-01-24 17:06:57,295 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 17:06:57,296 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 121 states. [2018-01-24 17:06:57,300 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 121 to 119. [2018-01-24 17:06:57,300 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-01-24 17:06:57,301 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 126 transitions. [2018-01-24 17:06:57,301 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 126 transitions. Word has length 30 [2018-01-24 17:06:57,301 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:06:57,301 INFO L432 AbstractCegarLoop]: Abstraction has 119 states and 126 transitions. [2018-01-24 17:06:57,302 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 17:06:57,302 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 126 transitions. [2018-01-24 17:06:57,302 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-24 17:06:57,302 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:06:57,302 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:06:57,303 INFO L371 AbstractCegarLoop]: === Iteration 17 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:06:57,303 INFO L82 PathProgramCache]: Analyzing trace with hash 1228344886, now seen corresponding path program 1 times [2018-01-24 17:06:57,303 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:06:57,304 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:57,304 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:06:57,304 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:57,304 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:06:57,313 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:06:57,313 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:06:57,437 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:06:57,437 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:06:57,438 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 17:06:57,438 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:06:57,438 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 17:06:57,438 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 17:06:57,438 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-01-24 17:06:57,438 INFO L87 Difference]: Start difference. First operand 119 states and 126 transitions. Second operand 6 states. [2018-01-24 17:06:57,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:06:57,595 INFO L93 Difference]: Finished difference Result 131 states and 140 transitions. [2018-01-24 17:06:57,595 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 17:06:57,595 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 30 [2018-01-24 17:06:57,595 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:06:57,597 INFO L225 Difference]: With dead ends: 131 [2018-01-24 17:06:57,597 INFO L226 Difference]: Without dead ends: 126 [2018-01-24 17:06:57,597 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=14, Invalid=28, Unknown=0, NotChecked=0, Total=42 [2018-01-24 17:06:57,597 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-01-24 17:06:57,605 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 119. [2018-01-24 17:06:57,605 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 119 states. [2018-01-24 17:06:57,606 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 119 states to 119 states and 127 transitions. [2018-01-24 17:06:57,606 INFO L78 Accepts]: Start accepts. Automaton has 119 states and 127 transitions. Word has length 30 [2018-01-24 17:06:57,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:06:57,607 INFO L432 AbstractCegarLoop]: Abstraction has 119 states and 127 transitions. [2018-01-24 17:06:57,607 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 17:06:57,607 INFO L276 IsEmpty]: Start isEmpty. Operand 119 states and 127 transitions. [2018-01-24 17:06:57,607 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-24 17:06:57,607 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:06:57,608 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:06:57,608 INFO L371 AbstractCegarLoop]: === Iteration 18 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:06:57,608 INFO L82 PathProgramCache]: Analyzing trace with hash -1343765284, now seen corresponding path program 1 times [2018-01-24 17:06:57,608 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:06:57,609 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:57,609 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:06:57,609 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:57,609 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:06:57,619 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:06:57,619 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:06:57,677 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:06:57,678 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:06:57,678 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 17:06:57,685 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:06:57,685 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 17:06:57,685 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 17:06:57,685 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:06:57,686 INFO L87 Difference]: Start difference. First operand 119 states and 127 transitions. Second operand 5 states. [2018-01-24 17:06:57,788 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:06:57,789 INFO L93 Difference]: Finished difference Result 131 states and 140 transitions. [2018-01-24 17:06:57,789 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 17:06:57,789 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 30 [2018-01-24 17:06:57,789 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:06:57,790 INFO L225 Difference]: With dead ends: 131 [2018-01-24 17:06:57,790 INFO L226 Difference]: Without dead ends: 130 [2018-01-24 17:06:57,790 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-01-24 17:06:57,790 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 130 states. [2018-01-24 17:06:57,796 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 130 to 124. [2018-01-24 17:06:57,796 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-01-24 17:06:57,797 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 134 transitions. [2018-01-24 17:06:57,798 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 134 transitions. Word has length 30 [2018-01-24 17:06:57,798 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:06:57,798 INFO L432 AbstractCegarLoop]: Abstraction has 124 states and 134 transitions. [2018-01-24 17:06:57,798 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 17:06:57,798 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 134 transitions. [2018-01-24 17:06:57,798 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 31 [2018-01-24 17:06:57,798 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:06:57,799 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:06:57,799 INFO L371 AbstractCegarLoop]: === Iteration 19 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:06:57,799 INFO L82 PathProgramCache]: Analyzing trace with hash -1343765283, now seen corresponding path program 1 times [2018-01-24 17:06:57,799 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:06:57,799 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:57,800 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:06:57,800 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:57,800 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:06:57,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:06:57,811 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:06:57,902 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:06:57,902 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:06:57,902 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 17:06:57,902 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:06:57,903 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 17:06:57,903 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 17:06:57,903 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=20, Unknown=0, NotChecked=0, Total=30 [2018-01-24 17:06:57,903 INFO L87 Difference]: Start difference. First operand 124 states and 134 transitions. Second operand 6 states. [2018-01-24 17:06:58,041 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:06:58,042 INFO L93 Difference]: Finished difference Result 235 states and 257 transitions. [2018-01-24 17:06:58,042 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 17:06:58,042 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 30 [2018-01-24 17:06:58,042 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:06:58,043 INFO L225 Difference]: With dead ends: 235 [2018-01-24 17:06:58,043 INFO L226 Difference]: Without dead ends: 125 [2018-01-24 17:06:58,044 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:06:58,044 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-01-24 17:06:58,053 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 124. [2018-01-24 17:06:58,053 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 124 states. [2018-01-24 17:06:58,054 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 124 states to 124 states and 132 transitions. [2018-01-24 17:06:58,054 INFO L78 Accepts]: Start accepts. Automaton has 124 states and 132 transitions. Word has length 30 [2018-01-24 17:06:58,054 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:06:58,054 INFO L432 AbstractCegarLoop]: Abstraction has 124 states and 132 transitions. [2018-01-24 17:06:58,054 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 17:06:58,055 INFO L276 IsEmpty]: Start isEmpty. Operand 124 states and 132 transitions. [2018-01-24 17:06:58,055 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-24 17:06:58,055 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:06:58,055 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:06:58,055 INFO L371 AbstractCegarLoop]: === Iteration 20 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:06:58,056 INFO L82 PathProgramCache]: Analyzing trace with hash 660985097, now seen corresponding path program 1 times [2018-01-24 17:06:58,056 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:06:58,056 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:58,057 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:06:58,057 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:58,057 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:06:58,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:06:58,069 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:06:58,168 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:06:58,169 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:06:58,169 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-24 17:06:58,169 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:06:58,169 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 17:06:58,170 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 17:06:58,170 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=37, Unknown=0, NotChecked=0, Total=56 [2018-01-24 17:06:58,170 INFO L87 Difference]: Start difference. First operand 124 states and 132 transitions. Second operand 8 states. [2018-01-24 17:06:58,732 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:06:58,732 INFO L93 Difference]: Finished difference Result 135 states and 144 transitions. [2018-01-24 17:06:58,732 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-24 17:06:58,733 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 31 [2018-01-24 17:06:58,733 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:06:58,734 INFO L225 Difference]: With dead ends: 135 [2018-01-24 17:06:58,734 INFO L226 Difference]: Without dead ends: 134 [2018-01-24 17:06:58,734 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=36, Invalid=74, Unknown=0, NotChecked=0, Total=110 [2018-01-24 17:06:58,734 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-01-24 17:06:58,742 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 126. [2018-01-24 17:06:58,742 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 126 states. [2018-01-24 17:06:58,744 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 126 states to 126 states and 135 transitions. [2018-01-24 17:06:58,744 INFO L78 Accepts]: Start accepts. Automaton has 126 states and 135 transitions. Word has length 31 [2018-01-24 17:06:58,744 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:06:58,744 INFO L432 AbstractCegarLoop]: Abstraction has 126 states and 135 transitions. [2018-01-24 17:06:58,744 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 17:06:58,744 INFO L276 IsEmpty]: Start isEmpty. Operand 126 states and 135 transitions. [2018-01-24 17:06:58,745 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 32 [2018-01-24 17:06:58,745 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:06:58,745 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:06:58,745 INFO L371 AbstractCegarLoop]: === Iteration 21 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:06:58,745 INFO L82 PathProgramCache]: Analyzing trace with hash 660985098, now seen corresponding path program 1 times [2018-01-24 17:06:58,745 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:06:58,746 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:58,746 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:06:58,746 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:58,746 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:06:58,758 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:06:58,759 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:06:58,908 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:06:58,908 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:06:58,909 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 17:06:58,909 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:06:58,909 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 17:06:58,909 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 17:06:58,909 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:06:58,909 INFO L87 Difference]: Start difference. First operand 126 states and 135 transitions. Second operand 10 states. [2018-01-24 17:06:59,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:06:59,267 INFO L93 Difference]: Finished difference Result 134 states and 143 transitions. [2018-01-24 17:06:59,311 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-24 17:06:59,311 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 31 [2018-01-24 17:06:59,311 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:06:59,312 INFO L225 Difference]: With dead ends: 134 [2018-01-24 17:06:59,312 INFO L226 Difference]: Without dead ends: 133 [2018-01-24 17:06:59,312 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=73, Invalid=233, Unknown=0, NotChecked=0, Total=306 [2018-01-24 17:06:59,312 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-01-24 17:06:59,319 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 121. [2018-01-24 17:06:59,320 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121 states. [2018-01-24 17:06:59,321 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 129 transitions. [2018-01-24 17:06:59,321 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 129 transitions. Word has length 31 [2018-01-24 17:06:59,321 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:06:59,321 INFO L432 AbstractCegarLoop]: Abstraction has 121 states and 129 transitions. [2018-01-24 17:06:59,321 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 17:06:59,321 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 129 transitions. [2018-01-24 17:06:59,322 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-24 17:06:59,322 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:06:59,322 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:06:59,322 INFO L371 AbstractCegarLoop]: === Iteration 22 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:06:59,322 INFO L82 PathProgramCache]: Analyzing trace with hash -184722078, now seen corresponding path program 1 times [2018-01-24 17:06:59,323 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:06:59,323 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:59,323 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:06:59,323 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:06:59,324 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:06:59,336 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:06:59,337 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:06:59,517 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-24 17:06:59,518 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:06:59,518 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:06:59,518 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 35 with the following transitions: [2018-01-24 17:06:59,520 INFO L201 CegarAbsIntRunner]: [0], [3], [48], [49], [50], [53], [57], [60], [65], [139], [140], [144], [145], [146], [147], [149], [150], [153], [155], [158], [159], [162], [163], [164], [167], [168], [169], [171], [172] [2018-01-24 17:06:59,564 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:06:59,565 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:06:59,975 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:06:59,976 INFO L268 AbstractInterpreter]: Visited 29 different actions 48 times. Merged at 2 different actions 2 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 26 variables. [2018-01-24 17:07:00,005 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:07:00,006 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:07:00,006 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:07:00,016 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:07:00,017 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:07:00,057 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:07:00,068 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:07:00,306 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 17:07:00,307 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 17:07:00,313 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 17:07:00,314 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:00,337 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 15 [2018-01-24 17:07:00,338 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:00,353 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 17:07:00,353 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:25, output treesize:18 [2018-01-24 17:07:00,408 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:07:00,409 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:07:00,734 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 21 [2018-01-24 17:07:00,735 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:00,748 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 17:07:00,749 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 17:07:00,749 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 7 [2018-01-24 17:07:00,750 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:00,754 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-01-24 17:07:00,755 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:32, output treesize:7 [2018-01-24 17:07:01,095 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 17:07:01,096 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 17:07:01,097 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 3 [2018-01-24 17:07:01,097 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:01,105 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 17:07:01,106 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 17:07:01,107 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 4 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 13 [2018-01-24 17:07:01,108 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:01,113 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:01,114 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:26, output treesize:3 [2018-01-24 17:07:01,125 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:07:01,160 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:07:01,160 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:07:01,166 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:07:01,166 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:07:01,228 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:07:01,236 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:07:01,274 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 17:07:01,274 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:01,281 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 17:07:01,281 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:01,287 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 17:07:01,287 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:19, output treesize:17 [2018-01-24 17:07:01,503 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 17:07:01,503 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 17:07:01,506 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 1 case distinctions, treesize of input 17 treesize of output 24 [2018-01-24 17:07:01,507 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:01,519 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 17:07:01,520 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 17:07:01,520 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 17:07:01,521 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 9 [2018-01-24 17:07:01,521 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:01,528 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-24 17:07:01,528 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:35, output treesize:27 [2018-01-24 17:07:01,564 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 3 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:07:01,564 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:07:01,721 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 8 [2018-01-24 17:07:01,721 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:01,722 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 17:07:01,723 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 17:07:01,723 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 7 [2018-01-24 17:07:01,723 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:01,735 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 7 treesize of output 5 [2018-01-24 17:07:01,735 INFO L267 ElimStorePlain]: Start of recursive call 4: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:01,738 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:01,739 INFO L202 ElimStorePlain]: Needed 4 recursive calls to eliminate 10 variables, input treesize:75, output treesize:3 [2018-01-24 17:07:01,861 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 16 [2018-01-24 17:07:06,518 WARN L143 SmtUtils]: Spent 410ms on a formula simplification that was a NOOP. DAG size: 42 [2018-01-24 17:07:06,521 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 8 [2018-01-24 17:07:06,524 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 8 [2018-01-24 17:07:06,527 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 8 [2018-01-24 17:07:06,643 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 17:07:06,643 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 17:07:06,644 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 7 [2018-01-24 17:07:06,644 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:06,660 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 14 treesize of output 8 [2018-01-24 17:07:06,661 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:06,732 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 2 case distinctions, treesize of input 21 treesize of output 33 [2018-01-24 17:07:06,774 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 21 treesize of output 21 [2018-01-24 17:07:06,774 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 2 xjuncts. [2018-01-24 17:07:06,790 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 3 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 24 treesize of output 38 [2018-01-24 17:07:06,793 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 8 xjuncts. [2018-01-24 17:07:06,810 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 3 select indices, 3 select index equivalence classes, 2 disjoint index pairs (out of 3 index pairs), introduced 2 new quantified variables, introduced 3 case distinctions, treesize of input 24 treesize of output 38 [2018-01-24 17:07:06,812 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 8 xjuncts. [2018-01-24 17:07:06,870 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 4 xjuncts. [2018-01-24 17:07:06,873 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 21 [2018-01-24 17:07:06,886 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 17:07:06,886 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:06,892 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 1 case distinctions, treesize of input 14 treesize of output 14 [2018-01-24 17:07:06,893 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 2 xjuncts. [2018-01-24 17:07:06,902 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-01-24 17:07:06,928 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: and 7 xjuncts. [2018-01-24 17:07:06,928 INFO L202 ElimStorePlain]: Needed 10 recursive calls to eliminate 4 variables, input treesize:45, output treesize:72 [2018-01-24 17:07:06,994 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 1 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:07:06,996 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:07:06,997 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 9, 9, 11, 11] total 39 [2018-01-24 17:07:06,997 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:07:06,997 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-24 17:07:06,998 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-24 17:07:06,998 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=163, Invalid=1391, Unknown=6, NotChecked=0, Total=1560 [2018-01-24 17:07:06,999 INFO L87 Difference]: Start difference. First operand 121 states and 129 transitions. Second operand 20 states. [2018-01-24 17:07:08,165 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:07:08,165 INFO L93 Difference]: Finished difference Result 183 states and 204 transitions. [2018-01-24 17:07:08,168 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-24 17:07:08,168 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 34 [2018-01-24 17:07:08,168 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:07:08,169 INFO L225 Difference]: With dead ends: 183 [2018-01-24 17:07:08,169 INFO L226 Difference]: Without dead ends: 180 [2018-01-24 17:07:08,170 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 105 SyntacticMatches, 5 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 632 ImplicationChecksByTransitivity, 6.3s TimeCoverageRelationStatistics Valid=295, Invalid=1861, Unknown=6, NotChecked=0, Total=2162 [2018-01-24 17:07:08,170 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-01-24 17:07:08,180 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 113. [2018-01-24 17:07:08,180 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-01-24 17:07:08,181 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 119 transitions. [2018-01-24 17:07:08,181 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 119 transitions. Word has length 34 [2018-01-24 17:07:08,181 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:07:08,181 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 119 transitions. [2018-01-24 17:07:08,181 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-24 17:07:08,182 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 119 transitions. [2018-01-24 17:07:08,182 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-24 17:07:08,182 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:07:08,182 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:07:08,182 INFO L371 AbstractCegarLoop]: === Iteration 23 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:07:08,183 INFO L82 PathProgramCache]: Analyzing trace with hash 501156800, now seen corresponding path program 1 times [2018-01-24 17:07:08,183 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:07:08,184 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:08,184 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:07:08,184 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:08,184 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:07:08,195 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:07:08,195 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:07:08,356 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:07:08,356 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:07:08,356 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-24 17:07:08,356 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:07:08,356 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-24 17:07:08,357 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-24 17:07:08,357 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=30, Unknown=0, NotChecked=0, Total=42 [2018-01-24 17:07:08,357 INFO L87 Difference]: Start difference. First operand 113 states and 119 transitions. Second operand 7 states. [2018-01-24 17:07:08,996 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:07:08,997 INFO L93 Difference]: Finished difference Result 135 states and 145 transitions. [2018-01-24 17:07:08,997 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 17:07:08,997 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 33 [2018-01-24 17:07:08,997 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:07:08,998 INFO L225 Difference]: With dead ends: 135 [2018-01-24 17:07:08,998 INFO L226 Difference]: Without dead ends: 134 [2018-01-24 17:07:08,998 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=26, Invalid=64, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:07:08,998 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-01-24 17:07:09,005 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 118. [2018-01-24 17:07:09,005 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-01-24 17:07:09,006 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 126 transitions. [2018-01-24 17:07:09,006 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 126 transitions. Word has length 33 [2018-01-24 17:07:09,006 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:07:09,006 INFO L432 AbstractCegarLoop]: Abstraction has 118 states and 126 transitions. [2018-01-24 17:07:09,006 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-24 17:07:09,006 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 126 transitions. [2018-01-24 17:07:09,006 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-24 17:07:09,007 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:07:09,007 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:07:09,007 INFO L371 AbstractCegarLoop]: === Iteration 24 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:07:09,007 INFO L82 PathProgramCache]: Analyzing trace with hash 501156801, now seen corresponding path program 1 times [2018-01-24 17:07:09,007 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:07:09,008 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:09,008 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:07:09,008 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:09,008 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:07:09,016 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:07:09,017 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:07:09,252 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:07:09,252 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:07:09,252 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-24 17:07:09,252 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:07:09,253 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-24 17:07:09,253 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-24 17:07:09,253 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=55, Unknown=0, NotChecked=0, Total=72 [2018-01-24 17:07:09,253 INFO L87 Difference]: Start difference. First operand 118 states and 126 transitions. Second operand 9 states. [2018-01-24 17:07:09,686 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:07:09,687 INFO L93 Difference]: Finished difference Result 160 states and 174 transitions. [2018-01-24 17:07:09,687 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-24 17:07:09,687 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 33 [2018-01-24 17:07:09,687 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:07:09,688 INFO L225 Difference]: With dead ends: 160 [2018-01-24 17:07:09,688 INFO L226 Difference]: Without dead ends: 159 [2018-01-24 17:07:09,688 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 30 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=54, Invalid=186, Unknown=0, NotChecked=0, Total=240 [2018-01-24 17:07:09,688 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 159 states. [2018-01-24 17:07:09,694 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 159 to 132. [2018-01-24 17:07:09,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-01-24 17:07:09,694 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 142 transitions. [2018-01-24 17:07:09,695 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 142 transitions. Word has length 33 [2018-01-24 17:07:09,695 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:07:09,695 INFO L432 AbstractCegarLoop]: Abstraction has 132 states and 142 transitions. [2018-01-24 17:07:09,695 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-24 17:07:09,695 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 142 transitions. [2018-01-24 17:07:09,695 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-24 17:07:09,695 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:07:09,695 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:07:09,696 INFO L371 AbstractCegarLoop]: === Iteration 25 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:07:09,696 INFO L82 PathProgramCache]: Analyzing trace with hash 574362333, now seen corresponding path program 1 times [2018-01-24 17:07:09,696 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:07:09,696 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:09,697 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:07:09,697 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:09,697 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:07:09,704 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:07:09,705 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:07:09,820 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:07:09,820 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:07:09,820 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-24 17:07:09,821 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:07:09,821 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 17:07:09,821 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 17:07:09,821 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-01-24 17:07:09,822 INFO L87 Difference]: Start difference. First operand 132 states and 142 transitions. Second operand 8 states. [2018-01-24 17:07:09,982 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:07:09,982 INFO L93 Difference]: Finished difference Result 162 states and 174 transitions. [2018-01-24 17:07:09,982 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-24 17:07:09,982 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 35 [2018-01-24 17:07:09,983 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:07:09,984 INFO L225 Difference]: With dead ends: 162 [2018-01-24 17:07:09,984 INFO L226 Difference]: Without dead ends: 157 [2018-01-24 17:07:09,984 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 13 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:07:09,984 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-01-24 17:07:09,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 132. [2018-01-24 17:07:09,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 132 states. [2018-01-24 17:07:09,995 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 132 states to 132 states and 140 transitions. [2018-01-24 17:07:09,995 INFO L78 Accepts]: Start accepts. Automaton has 132 states and 140 transitions. Word has length 35 [2018-01-24 17:07:09,995 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:07:09,995 INFO L432 AbstractCegarLoop]: Abstraction has 132 states and 140 transitions. [2018-01-24 17:07:09,995 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 17:07:09,995 INFO L276 IsEmpty]: Start isEmpty. Operand 132 states and 140 transitions. [2018-01-24 17:07:09,996 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 17:07:09,996 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:07:09,996 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:07:09,996 INFO L371 AbstractCegarLoop]: === Iteration 26 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:07:09,996 INFO L82 PathProgramCache]: Analyzing trace with hash 655964540, now seen corresponding path program 1 times [2018-01-24 17:07:09,997 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:07:09,997 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:09,998 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:07:09,998 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:09,998 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:07:10,007 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:07:10,007 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:07:10,057 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:07:10,058 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:07:10,058 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 17:07:10,058 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:07:10,058 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 17:07:10,058 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 17:07:10,059 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:07:10,059 INFO L87 Difference]: Start difference. First operand 132 states and 140 transitions. Second operand 5 states. [2018-01-24 17:07:10,214 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:07:10,214 INFO L93 Difference]: Finished difference Result 132 states and 140 transitions. [2018-01-24 17:07:10,214 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-24 17:07:10,215 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 36 [2018-01-24 17:07:10,215 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:07:10,216 INFO L225 Difference]: With dead ends: 132 [2018-01-24 17:07:10,216 INFO L226 Difference]: Without dead ends: 131 [2018-01-24 17:07:10,216 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=27, Unknown=0, NotChecked=0, Total=42 [2018-01-24 17:07:10,217 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 131 states. [2018-01-24 17:07:10,224 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 131 to 131. [2018-01-24 17:07:10,239 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-01-24 17:07:10,239 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 139 transitions. [2018-01-24 17:07:10,240 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 139 transitions. Word has length 36 [2018-01-24 17:07:10,240 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:07:10,240 INFO L432 AbstractCegarLoop]: Abstraction has 131 states and 139 transitions. [2018-01-24 17:07:10,240 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 17:07:10,240 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 139 transitions. [2018-01-24 17:07:10,240 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-24 17:07:10,240 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:07:10,240 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:07:10,241 INFO L371 AbstractCegarLoop]: === Iteration 27 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:07:10,241 INFO L82 PathProgramCache]: Analyzing trace with hash 655964541, now seen corresponding path program 1 times [2018-01-24 17:07:10,241 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:07:10,241 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:10,242 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:07:10,242 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:10,242 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:07:10,251 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:07:10,252 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:07:10,703 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:07:10,704 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:07:10,704 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 17:07:10,704 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:07:10,704 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 17:07:10,704 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 17:07:10,704 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:07:10,705 INFO L87 Difference]: Start difference. First operand 131 states and 139 transitions. Second operand 10 states. [2018-01-24 17:07:11,755 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:07:11,755 INFO L93 Difference]: Finished difference Result 154 states and 166 transitions. [2018-01-24 17:07:11,755 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-24 17:07:11,755 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 36 [2018-01-24 17:07:11,755 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:07:11,756 INFO L225 Difference]: With dead ends: 154 [2018-01-24 17:07:11,756 INFO L226 Difference]: Without dead ends: 153 [2018-01-24 17:07:11,756 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 2 SyntacticMatches, 1 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 42 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=57, Invalid=215, Unknown=0, NotChecked=0, Total=272 [2018-01-24 17:07:11,757 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 153 states. [2018-01-24 17:07:11,763 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 153 to 134. [2018-01-24 17:07:11,763 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-01-24 17:07:11,763 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 142 transitions. [2018-01-24 17:07:11,764 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 142 transitions. Word has length 36 [2018-01-24 17:07:11,764 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:07:11,764 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 142 transitions. [2018-01-24 17:07:11,764 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 17:07:11,764 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 142 transitions. [2018-01-24 17:07:11,764 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-24 17:07:11,764 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:07:11,764 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:07:11,764 INFO L371 AbstractCegarLoop]: === Iteration 28 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:07:11,765 INFO L82 PathProgramCache]: Analyzing trace with hash -747720392, now seen corresponding path program 1 times [2018-01-24 17:07:11,765 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:07:11,765 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:11,765 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:07:11,765 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:11,766 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:07:11,774 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:07:11,775 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:07:12,036 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:07:12,037 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:07:12,037 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:07:12,037 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 38 with the following transitions: [2018-01-24 17:07:12,037 INFO L201 CegarAbsIntRunner]: [0], [4], [5], [6], [9], [10], [11], [14], [18], [23], [24], [27], [28], [29], [31], [33], [49], [50], [53], [57], [139], [140], [144], [145], [146], [147], [150], [153], [163], [167], [168], [169], [171] [2018-01-24 17:07:12,039 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:07:12,039 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:07:12,120 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:07:12,121 INFO L268 AbstractInterpreter]: Visited 33 different actions 41 times. Merged at 7 different actions 7 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 27 variables. [2018-01-24 17:07:12,123 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:07:12,123 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:07:12,123 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:07:12,134 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:07:12,134 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:07:12,166 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:07:12,169 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:07:12,180 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 17:07:12,180 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:12,190 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:12,190 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-24 17:07:12,259 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 17:07:12,260 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 17:07:12,261 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-01-24 17:07:12,261 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:12,278 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:12,279 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15 [2018-01-24 17:07:12,354 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-24 17:07:12,361 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-24 17:07:12,362 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:12,364 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:12,399 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:12,399 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:27 [2018-01-24 17:07:12,587 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 57 [2018-01-24 17:07:12,589 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-24 17:07:12,589 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:12,602 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:12,621 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:12,622 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:68, output treesize:27 [2018-01-24 17:07:12,630 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-01-24 17:07:12,644 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 10 [2018-01-24 17:07:12,645 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:12,655 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:12,697 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 17:07:12,697 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:36, output treesize:15 [2018-01-24 17:07:12,776 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 17:07:12,777 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:07:12,780 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 17:07:12,785 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 17:07:12,796 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-01-24 17:07:12,796 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:36, output treesize:23 [2018-01-24 17:07:16,888 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2018-01-24 17:07:16,903 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 17:07:16,903 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:16,916 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 18 [2018-01-24 17:07:16,917 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 5 [2018-01-24 17:07:16,918 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:16,919 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:16,920 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2018-01-24 17:07:16,922 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 17:07:16,922 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:16,926 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:16,936 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-01-24 17:07:16,949 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 3 xjuncts. [2018-01-24 17:07:16,949 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:43, output treesize:25 [2018-01-24 17:07:17,011 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:07:17,031 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:07:17,031 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:07:17,034 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:07:17,034 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:07:17,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:07:17,078 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:07:17,082 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 17:07:17,082 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:17,084 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:17,084 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-24 17:07:17,122 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 17:07:17,151 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 17:07:17,152 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 21 [2018-01-24 17:07:17,152 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:17,158 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:17,158 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:17, output treesize:15 [2018-01-24 17:07:17,172 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-24 17:07:17,174 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-24 17:07:17,174 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:17,176 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:17,182 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:17,183 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:28, output treesize:27 [2018-01-24 17:07:17,191 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 57 [2018-01-24 17:07:17,194 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-24 17:07:17,195 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:17,206 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:17,213 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:17,213 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:68, output treesize:27 [2018-01-24 17:07:17,216 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-01-24 17:07:17,217 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 10 [2018-01-24 17:07:17,217 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:17,220 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:17,233 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 17:07:17,234 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:36, output treesize:15 [2018-01-24 17:07:17,238 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-24 17:07:17,238 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:07:17,242 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 17:07:17,252 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 17:07:17,257 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-01-24 17:07:17,258 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 3 variables, input treesize:36, output treesize:23 [2018-01-24 17:07:19,300 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 43 treesize of output 35 [2018-01-24 17:07:19,314 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 17:07:19,314 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:19,330 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 18 [2018-01-24 17:07:19,332 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 5 [2018-01-24 17:07:19,332 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:19,333 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:19,335 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 23 [2018-01-24 17:07:19,336 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 17:07:19,336 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:19,339 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:19,349 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-01-24 17:07:19,361 INFO L267 ElimStorePlain]: Start of recursive call 1: 4 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 3 xjuncts. [2018-01-24 17:07:19,361 INFO L202 ElimStorePlain]: Needed 7 recursive calls to eliminate 5 variables, input treesize:43, output treesize:25 [2018-01-24 17:07:19,368 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:07:19,369 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:07:19,370 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 7, 8, 7, 8] total 17 [2018-01-24 17:07:19,370 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:07:19,370 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-24 17:07:19,370 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-24 17:07:19,370 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=62, Invalid=242, Unknown=2, NotChecked=0, Total=306 [2018-01-24 17:07:19,370 INFO L87 Difference]: Start difference. First operand 134 states and 142 transitions. Second operand 13 states. [2018-01-24 17:07:19,675 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:07:19,675 INFO L93 Difference]: Finished difference Result 134 states and 142 transitions. [2018-01-24 17:07:19,676 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 17:07:19,676 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 37 [2018-01-24 17:07:19,676 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:07:19,676 INFO L225 Difference]: With dead ends: 134 [2018-01-24 17:07:19,676 INFO L226 Difference]: Without dead ends: 133 [2018-01-24 17:07:19,677 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 133 SyntacticMatches, 5 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 91 ImplicationChecksByTransitivity, 6.8s TimeCoverageRelationStatistics Valid=114, Invalid=346, Unknown=2, NotChecked=0, Total=462 [2018-01-24 17:07:19,677 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-01-24 17:07:19,685 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 133. [2018-01-24 17:07:19,685 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 133 states. [2018-01-24 17:07:19,686 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 133 states to 133 states and 141 transitions. [2018-01-24 17:07:19,686 INFO L78 Accepts]: Start accepts. Automaton has 133 states and 141 transitions. Word has length 37 [2018-01-24 17:07:19,686 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:07:19,686 INFO L432 AbstractCegarLoop]: Abstraction has 133 states and 141 transitions. [2018-01-24 17:07:19,686 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-24 17:07:19,686 INFO L276 IsEmpty]: Start isEmpty. Operand 133 states and 141 transitions. [2018-01-24 17:07:19,687 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-24 17:07:19,687 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:07:19,687 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:07:19,687 INFO L371 AbstractCegarLoop]: === Iteration 29 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:07:19,688 INFO L82 PathProgramCache]: Analyzing trace with hash -747720391, now seen corresponding path program 1 times [2018-01-24 17:07:19,688 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:07:19,688 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:19,688 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:07:19,689 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:19,689 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:07:19,700 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:07:19,701 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:07:19,890 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:07:19,890 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:07:19,890 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:07:19,890 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 38 with the following transitions: [2018-01-24 17:07:19,890 INFO L201 CegarAbsIntRunner]: [0], [4], [5], [6], [9], [10], [11], [14], [18], [23], [24], [27], [28], [30], [31], [33], [49], [50], [53], [57], [139], [140], [144], [145], [146], [147], [150], [153], [163], [167], [168], [169], [171] [2018-01-24 17:07:19,892 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:07:19,892 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:07:19,973 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:07:19,973 INFO L268 AbstractInterpreter]: Visited 33 different actions 41 times. Merged at 8 different actions 8 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 27 variables. [2018-01-24 17:07:19,975 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:07:19,975 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:07:19,975 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:07:19,985 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:07:19,985 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:07:20,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:07:20,009 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:07:20,012 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 17:07:20,013 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:20,014 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:20,015 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-24 17:07:20,020 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 17:07:20,021 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 17:07:20,021 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 17:07:20,021 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:20,025 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 17:07:20,025 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:20,029 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:20,029 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:20, output treesize:13 [2018-01-24 17:07:20,035 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-24 17:07:20,037 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-24 17:07:20,037 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:20,038 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:20,045 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-24 17:07:20,047 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-24 17:07:20,047 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:20,048 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:20,053 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:20,053 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:36, output treesize:31 [2018-01-24 17:07:20,094 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 104 treesize of output 98 [2018-01-24 17:07:20,096 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-24 17:07:20,097 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:20,101 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:20,112 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 52 [2018-01-24 17:07:20,114 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-24 17:07:20,114 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:20,119 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:20,125 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:20,125 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:116, output treesize:34 [2018-01-24 17:07:20,158 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-01-24 17:07:20,161 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 10 [2018-01-24 17:07:20,161 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:20,166 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:20,178 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-01-24 17:07:20,180 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-01-24 17:07:20,180 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:20,189 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:20,195 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:20,195 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:52, output treesize:12 [2018-01-24 17:07:20,213 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:07:20,213 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:07:20,280 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 17:07:20,286 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 17:07:20,309 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:20,311 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:20,326 INFO L267 ElimStorePlain]: Start of recursive call 7: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 17:07:20,332 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 17:07:20,344 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 17:07:20,347 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 17:07:20,353 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 4 dim-2 vars, End of recursive call: 5 dim-0 vars, and 2 xjuncts. [2018-01-24 17:07:20,353 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 6 variables, input treesize:135, output treesize:73 [2018-01-24 17:07:21,955 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 67 [2018-01-24 17:07:21,977 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 17:07:21,992 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,009 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 54 [2018-01-24 17:07:22,012 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 41 [2018-01-24 17:07:22,012 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,016 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,018 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 19 [2018-01-24 17:07:22,021 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 17:07:22,021 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,026 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,048 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-01-24 17:07:22,088 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2018-01-24 17:07:22,109 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 17:07:22,110 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,129 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 18 [2018-01-24 17:07:22,132 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 5 [2018-01-24 17:07:22,132 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,134 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,137 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 19 [2018-01-24 17:07:22,140 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 17:07:22,140 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,144 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,156 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-01-24 17:07:22,189 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-01-24 17:07:22,203 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 17:07:22,203 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,208 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2018-01-24 17:07:22,209 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 7 [2018-01-24 17:07:22,209 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,211 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,213 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,216 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 36 [2018-01-24 17:07:22,243 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 17:07:22,243 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,248 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2018-01-24 17:07:22,249 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 7 [2018-01-24 17:07:22,250 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,251 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,253 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,256 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 43 [2018-01-24 17:07:22,289 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 17:07:22,289 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,296 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2018-01-24 17:07:22,298 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 17:07:22,298 INFO L267 ElimStorePlain]: Start of recursive call 25: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,300 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,304 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,331 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 3 dim-2 vars, End of recursive call: and 5 xjuncts. [2018-01-24 17:07:22,331 INFO L202 ElimStorePlain]: Needed 25 recursive calls to eliminate 10 variables, input treesize:115, output treesize:37 [2018-01-24 17:07:22,404 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:07:22,438 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:07:22,439 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-24 17:07:22,443 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:07:22,443 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:07:22,492 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:07:22,498 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:07:22,503 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 17:07:22,503 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,504 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,504 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:6, output treesize:5 [2018-01-24 17:07:22,509 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 17:07:22,509 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,515 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 17:07:22,516 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 17:07:22,516 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 17:07:22,516 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,520 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,520 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:20, output treesize:13 [2018-01-24 17:07:22,526 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-24 17:07:22,528 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-24 17:07:22,528 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,529 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,537 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 13 treesize of output 10 [2018-01-24 17:07:22,538 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 9 [2018-01-24 17:07:22,538 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,543 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,549 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,549 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:36, output treesize:31 [2018-01-24 17:07:22,563 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 52 [2018-01-24 17:07:22,571 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-24 17:07:22,572 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,576 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,591 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 63 treesize of output 57 [2018-01-24 17:07:22,594 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 32 treesize of output 1 [2018-01-24 17:07:22,594 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,599 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,607 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,607 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 3 variables, input treesize:116, output treesize:34 [2018-01-24 17:07:22,628 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 31 treesize of output 25 [2018-01-24 17:07:22,630 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 10 [2018-01-24 17:07:22,630 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,633 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,640 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 19 treesize of output 15 [2018-01-24 17:07:22,642 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 3 [2018-01-24 17:07:22,643 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,645 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,658 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,658 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 4 variables, input treesize:52, output treesize:12 [2018-01-24 17:07:22,661 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:07:22,661 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-24 17:07:22,665 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 17:07:22,670 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 17:07:22,688 INFO L267 ElimStorePlain]: Start of recursive call 5: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 17:07:22,694 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 17:07:22,715 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,728 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:22,739 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 17:07:22,742 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 17:07:22,751 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 4 dim-2 vars, End of recursive call: 5 dim-0 vars, and 2 xjuncts. [2018-01-24 17:07:22,751 INFO L202 ElimStorePlain]: Needed 9 recursive calls to eliminate 6 variables, input treesize:135, output treesize:73 [2018-01-24 17:07:24,664 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 75 treesize of output 67 [2018-01-24 17:07:24,689 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 17:07:24,689 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:24,711 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 54 [2018-01-24 17:07:24,714 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 54 treesize of output 41 [2018-01-24 17:07:24,714 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:24,716 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:24,718 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 19 [2018-01-24 17:07:24,720 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 17:07:24,720 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:24,724 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:24,740 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-01-24 17:07:24,777 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 31 [2018-01-24 17:07:24,794 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 17:07:24,794 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:24,806 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 22 treesize of output 18 [2018-01-24 17:07:24,807 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 5 [2018-01-24 17:07:24,808 INFO L267 ElimStorePlain]: Start of recursive call 11: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:24,809 INFO L267 ElimStorePlain]: Start of recursive call 10: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:24,810 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 19 [2018-01-24 17:07:24,811 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 17:07:24,811 INFO L267 ElimStorePlain]: Start of recursive call 13: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:24,814 INFO L267 ElimStorePlain]: Start of recursive call 12: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:24,823 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 4 xjuncts. [2018-01-24 17:07:24,857 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 45 treesize of output 36 [2018-01-24 17:07:24,885 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 17:07:24,885 INFO L267 ElimStorePlain]: Start of recursive call 15: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:24,891 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2018-01-24 17:07:24,893 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 7 [2018-01-24 17:07:24,893 INFO L267 ElimStorePlain]: Start of recursive call 17: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:24,894 INFO L267 ElimStorePlain]: Start of recursive call 16: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:24,896 INFO L267 ElimStorePlain]: Start of recursive call 14: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:24,898 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 52 treesize of output 43 [2018-01-24 17:07:24,914 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 17:07:24,914 INFO L267 ElimStorePlain]: Start of recursive call 19: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:24,920 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 10 treesize of output 8 [2018-01-24 17:07:24,921 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 1 [2018-01-24 17:07:24,921 INFO L267 ElimStorePlain]: Start of recursive call 21: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:24,922 INFO L267 ElimStorePlain]: Start of recursive call 20: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:24,926 INFO L267 ElimStorePlain]: Start of recursive call 18: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:24,929 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-01-24 17:07:24,942 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 10 [2018-01-24 17:07:24,943 INFO L267 ElimStorePlain]: Start of recursive call 23: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:24,948 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 24 treesize of output 20 [2018-01-24 17:07:24,950 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 7 [2018-01-24 17:07:24,951 INFO L267 ElimStorePlain]: Start of recursive call 25: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:24,954 INFO L267 ElimStorePlain]: Start of recursive call 24: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:24,957 INFO L267 ElimStorePlain]: Start of recursive call 22: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:24,985 INFO L267 ElimStorePlain]: Start of recursive call 1: 7 dim-0 vars, 3 dim-2 vars, End of recursive call: and 5 xjuncts. [2018-01-24 17:07:24,985 INFO L202 ElimStorePlain]: Needed 25 recursive calls to eliminate 10 variables, input treesize:115, output treesize:37 [2018-01-24 17:07:25,025 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:07:25,027 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-24 17:07:25,027 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 9, 10, 9, 10] total 23 [2018-01-24 17:07:25,027 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-24 17:07:25,028 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-24 17:07:25,028 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-24 17:07:25,028 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=472, Unknown=0, NotChecked=0, Total=552 [2018-01-24 17:07:25,028 INFO L87 Difference]: Start difference. First operand 133 states and 141 transitions. Second operand 15 states. [2018-01-24 17:07:25,450 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:07:25,450 INFO L93 Difference]: Finished difference Result 268 states and 290 transitions. [2018-01-24 17:07:25,450 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-24 17:07:25,450 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 37 [2018-01-24 17:07:25,450 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:07:25,451 INFO L225 Difference]: With dead ends: 268 [2018-01-24 17:07:25,451 INFO L226 Difference]: Without dead ends: 143 [2018-01-24 17:07:25,452 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 166 GetRequests, 122 SyntacticMatches, 12 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 236 ImplicationChecksByTransitivity, 4.0s TimeCoverageRelationStatistics Valid=254, Invalid=868, Unknown=0, NotChecked=0, Total=1122 [2018-01-24 17:07:25,452 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-01-24 17:07:25,458 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2018-01-24 17:07:25,458 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-01-24 17:07:25,459 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 151 transitions. [2018-01-24 17:07:25,459 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 151 transitions. Word has length 37 [2018-01-24 17:07:25,459 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:07:25,459 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 151 transitions. [2018-01-24 17:07:25,459 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-24 17:07:25,459 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 151 transitions. [2018-01-24 17:07:25,459 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-24 17:07:25,459 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:07:25,460 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:07:25,460 INFO L371 AbstractCegarLoop]: === Iteration 30 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:07:25,460 INFO L82 PathProgramCache]: Analyzing trace with hash 484884458, now seen corresponding path program 1 times [2018-01-24 17:07:25,460 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:07:25,461 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:25,461 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:07:25,461 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:25,461 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:07:25,468 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:07:25,469 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:07:25,758 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:07:25,759 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:07:25,759 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-01-24 17:07:25,759 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:07:25,759 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-24 17:07:25,759 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-24 17:07:25,759 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=35, Invalid=237, Unknown=0, NotChecked=0, Total=272 [2018-01-24 17:07:25,760 INFO L87 Difference]: Start difference. First operand 143 states and 151 transitions. Second operand 17 states. [2018-01-24 17:07:26,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:07:26,496 INFO L93 Difference]: Finished difference Result 226 states and 243 transitions. [2018-01-24 17:07:26,496 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-24 17:07:26,496 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 40 [2018-01-24 17:07:26,496 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:07:26,497 INFO L225 Difference]: With dead ends: 226 [2018-01-24 17:07:26,497 INFO L226 Difference]: Without dead ends: 178 [2018-01-24 17:07:26,498 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 34 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 198 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=134, Invalid=988, Unknown=0, NotChecked=0, Total=1122 [2018-01-24 17:07:26,498 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 178 states. [2018-01-24 17:07:26,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 178 to 160. [2018-01-24 17:07:26,506 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 160 states. [2018-01-24 17:07:26,507 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 160 states to 160 states and 171 transitions. [2018-01-24 17:07:26,507 INFO L78 Accepts]: Start accepts. Automaton has 160 states and 171 transitions. Word has length 40 [2018-01-24 17:07:26,507 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:07:26,507 INFO L432 AbstractCegarLoop]: Abstraction has 160 states and 171 transitions. [2018-01-24 17:07:26,508 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-24 17:07:26,508 INFO L276 IsEmpty]: Start isEmpty. Operand 160 states and 171 transitions. [2018-01-24 17:07:26,509 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 41 [2018-01-24 17:07:26,509 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:07:26,509 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:07:26,509 INFO L371 AbstractCegarLoop]: === Iteration 31 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:07:26,509 INFO L82 PathProgramCache]: Analyzing trace with hash 1287024166, now seen corresponding path program 1 times [2018-01-24 17:07:26,509 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:07:26,510 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:26,510 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:07:26,510 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:26,510 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:07:26,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:07:26,523 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:07:26,684 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:07:26,684 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:07:26,684 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-24 17:07:26,684 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:07:26,684 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-24 17:07:26,684 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-24 17:07:26,684 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=27, Invalid=105, Unknown=0, NotChecked=0, Total=132 [2018-01-24 17:07:26,685 INFO L87 Difference]: Start difference. First operand 160 states and 171 transitions. Second operand 12 states. [2018-01-24 17:07:27,157 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:07:27,157 INFO L93 Difference]: Finished difference Result 196 states and 214 transitions. [2018-01-24 17:07:27,192 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-24 17:07:27,192 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 40 [2018-01-24 17:07:27,192 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:07:27,193 INFO L225 Difference]: With dead ends: 196 [2018-01-24 17:07:27,193 INFO L226 Difference]: Without dead ends: 195 [2018-01-24 17:07:27,194 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 23 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 74 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=107, Invalid=399, Unknown=0, NotChecked=0, Total=506 [2018-01-24 17:07:27,194 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 195 states. [2018-01-24 17:07:27,201 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 195 to 169. [2018-01-24 17:07:27,201 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-01-24 17:07:27,201 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 182 transitions. [2018-01-24 17:07:27,202 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 182 transitions. Word has length 40 [2018-01-24 17:07:27,202 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:07:27,202 INFO L432 AbstractCegarLoop]: Abstraction has 169 states and 182 transitions. [2018-01-24 17:07:27,202 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-24 17:07:27,202 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 182 transitions. [2018-01-24 17:07:27,202 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-24 17:07:27,202 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:07:27,202 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:07:27,203 INFO L371 AbstractCegarLoop]: === Iteration 32 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:07:27,203 INFO L82 PathProgramCache]: Analyzing trace with hash -907645030, now seen corresponding path program 1 times [2018-01-24 17:07:27,203 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:07:27,203 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:27,203 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:07:27,203 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:27,203 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:07:27,209 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:07:27,210 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:07:27,292 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:07:27,292 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:07:27,292 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-24 17:07:27,293 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:07:27,293 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-24 17:07:27,293 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-24 17:07:27,293 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=41, Unknown=0, NotChecked=0, Total=56 [2018-01-24 17:07:27,293 INFO L87 Difference]: Start difference. First operand 169 states and 182 transitions. Second operand 8 states. [2018-01-24 17:07:27,402 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:07:27,402 INFO L93 Difference]: Finished difference Result 186 states and 200 transitions. [2018-01-24 17:07:27,402 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-24 17:07:27,402 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 44 [2018-01-24 17:07:27,403 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:07:27,404 INFO L225 Difference]: With dead ends: 186 [2018-01-24 17:07:27,404 INFO L226 Difference]: Without dead ends: 185 [2018-01-24 17:07:27,405 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=43, Invalid=113, Unknown=0, NotChecked=0, Total=156 [2018-01-24 17:07:27,405 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 185 states. [2018-01-24 17:07:27,413 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 185 to 178. [2018-01-24 17:07:27,413 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 178 states. [2018-01-24 17:07:27,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 178 states to 178 states and 196 transitions. [2018-01-24 17:07:27,414 INFO L78 Accepts]: Start accepts. Automaton has 178 states and 196 transitions. Word has length 44 [2018-01-24 17:07:27,414 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:07:27,414 INFO L432 AbstractCegarLoop]: Abstraction has 178 states and 196 transitions. [2018-01-24 17:07:27,414 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-24 17:07:27,414 INFO L276 IsEmpty]: Start isEmpty. Operand 178 states and 196 transitions. [2018-01-24 17:07:27,415 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 45 [2018-01-24 17:07:27,415 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:07:27,415 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:07:27,415 INFO L371 AbstractCegarLoop]: === Iteration 33 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:07:27,415 INFO L82 PathProgramCache]: Analyzing trace with hash -907645029, now seen corresponding path program 1 times [2018-01-24 17:07:27,415 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:07:27,415 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:27,416 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:07:27,416 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:27,416 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:07:27,423 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:07:27,424 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:07:27,470 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:07:27,470 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:07:27,470 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-24 17:07:27,471 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:07:27,471 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-24 17:07:27,471 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-24 17:07:27,471 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-24 17:07:27,471 INFO L87 Difference]: Start difference. First operand 178 states and 196 transitions. Second operand 6 states. [2018-01-24 17:07:27,654 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:07:27,654 INFO L93 Difference]: Finished difference Result 185 states and 204 transitions. [2018-01-24 17:07:27,655 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-24 17:07:27,655 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 44 [2018-01-24 17:07:27,655 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:07:27,656 INFO L225 Difference]: With dead ends: 185 [2018-01-24 17:07:27,656 INFO L226 Difference]: Without dead ends: 184 [2018-01-24 17:07:27,656 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-24 17:07:27,656 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-01-24 17:07:27,664 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 180. [2018-01-24 17:07:27,664 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 180 states. [2018-01-24 17:07:27,665 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 180 states to 180 states and 199 transitions. [2018-01-24 17:07:27,665 INFO L78 Accepts]: Start accepts. Automaton has 180 states and 199 transitions. Word has length 44 [2018-01-24 17:07:27,666 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:07:27,666 INFO L432 AbstractCegarLoop]: Abstraction has 180 states and 199 transitions. [2018-01-24 17:07:27,666 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-24 17:07:27,666 INFO L276 IsEmpty]: Start isEmpty. Operand 180 states and 199 transitions. [2018-01-24 17:07:27,666 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-24 17:07:27,666 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:07:27,666 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:07:27,667 INFO L371 AbstractCegarLoop]: === Iteration 34 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:07:27,667 INFO L82 PathProgramCache]: Analyzing trace with hash 563904760, now seen corresponding path program 1 times [2018-01-24 17:07:27,667 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:07:27,667 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:27,667 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:07:27,668 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:27,668 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:07:27,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:07:27,682 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:07:27,995 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:07:27,996 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:07:27,996 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-24 17:07:27,996 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:07:27,996 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-24 17:07:27,996 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-24 17:07:27,996 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=20, Invalid=70, Unknown=0, NotChecked=0, Total=90 [2018-01-24 17:07:27,996 INFO L87 Difference]: Start difference. First operand 180 states and 199 transitions. Second operand 10 states. [2018-01-24 17:07:28,194 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:07:28,194 INFO L93 Difference]: Finished difference Result 187 states and 202 transitions. [2018-01-24 17:07:28,194 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-24 17:07:28,194 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 43 [2018-01-24 17:07:28,194 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:07:28,195 INFO L225 Difference]: With dead ends: 187 [2018-01-24 17:07:28,195 INFO L226 Difference]: Without dead ends: 186 [2018-01-24 17:07:28,196 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 39 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=60, Invalid=212, Unknown=0, NotChecked=0, Total=272 [2018-01-24 17:07:28,196 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states. [2018-01-24 17:07:28,205 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 170. [2018-01-24 17:07:28,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states. [2018-01-24 17:07:28,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 187 transitions. [2018-01-24 17:07:28,206 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 187 transitions. Word has length 43 [2018-01-24 17:07:28,206 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:07:28,206 INFO L432 AbstractCegarLoop]: Abstraction has 170 states and 187 transitions. [2018-01-24 17:07:28,206 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-24 17:07:28,206 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 187 transitions. [2018-01-24 17:07:28,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 47 [2018-01-24 17:07:28,207 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:07:28,207 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:07:28,207 INFO L371 AbstractCegarLoop]: === Iteration 35 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:07:28,207 INFO L82 PathProgramCache]: Analyzing trace with hash -368510437, now seen corresponding path program 1 times [2018-01-24 17:07:28,207 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:07:28,208 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:28,208 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:07:28,208 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:28,208 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:07:28,215 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:07:28,216 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:07:28,395 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:07:28,395 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:07:28,395 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-24 17:07:28,396 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:07:28,396 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-24 17:07:28,396 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-24 17:07:28,396 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=25, Invalid=107, Unknown=0, NotChecked=0, Total=132 [2018-01-24 17:07:28,396 INFO L87 Difference]: Start difference. First operand 170 states and 187 transitions. Second operand 12 states. [2018-01-24 17:07:28,683 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:07:28,683 INFO L93 Difference]: Finished difference Result 205 states and 229 transitions. [2018-01-24 17:07:28,683 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-24 17:07:28,683 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 46 [2018-01-24 17:07:28,684 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:07:28,684 INFO L225 Difference]: With dead ends: 205 [2018-01-24 17:07:28,685 INFO L226 Difference]: Without dead ends: 204 [2018-01-24 17:07:28,685 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 17 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 28 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=52, Invalid=220, Unknown=0, NotChecked=0, Total=272 [2018-01-24 17:07:28,685 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 204 states. [2018-01-24 17:07:28,695 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 204 to 196. [2018-01-24 17:07:28,695 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 196 states. [2018-01-24 17:07:28,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 196 states to 196 states and 220 transitions. [2018-01-24 17:07:28,696 INFO L78 Accepts]: Start accepts. Automaton has 196 states and 220 transitions. Word has length 46 [2018-01-24 17:07:28,696 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:07:28,696 INFO L432 AbstractCegarLoop]: Abstraction has 196 states and 220 transitions. [2018-01-24 17:07:28,696 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-24 17:07:28,696 INFO L276 IsEmpty]: Start isEmpty. Operand 196 states and 220 transitions. [2018-01-24 17:07:28,697 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-24 17:07:28,697 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:07:28,697 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:07:28,697 INFO L371 AbstractCegarLoop]: === Iteration 36 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:07:28,697 INFO L82 PathProgramCache]: Analyzing trace with hash 221499877, now seen corresponding path program 1 times [2018-01-24 17:07:28,697 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:07:28,698 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:28,698 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:07:28,698 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:28,698 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:07:28,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:07:28,707 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:07:28,963 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:07:28,964 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:07:28,964 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [17] imperfect sequences [] total 17 [2018-01-24 17:07:28,964 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:07:28,964 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-24 17:07:28,964 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-24 17:07:28,964 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=37, Invalid=269, Unknown=0, NotChecked=0, Total=306 [2018-01-24 17:07:28,964 INFO L87 Difference]: Start difference. First operand 196 states and 220 transitions. Second operand 18 states. [2018-01-24 17:07:29,857 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:07:29,857 INFO L93 Difference]: Finished difference Result 225 states and 254 transitions. [2018-01-24 17:07:29,857 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-24 17:07:29,857 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 47 [2018-01-24 17:07:29,857 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:07:29,858 INFO L225 Difference]: With dead ends: 225 [2018-01-24 17:07:29,858 INFO L226 Difference]: Without dead ends: 222 [2018-01-24 17:07:29,859 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 35 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 200 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=136, Invalid=1054, Unknown=0, NotChecked=0, Total=1190 [2018-01-24 17:07:29,859 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2018-01-24 17:07:29,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 201. [2018-01-24 17:07:29,868 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 201 states. [2018-01-24 17:07:29,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201 states to 201 states and 227 transitions. [2018-01-24 17:07:29,868 INFO L78 Accepts]: Start accepts. Automaton has 201 states and 227 transitions. Word has length 47 [2018-01-24 17:07:29,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:07:29,869 INFO L432 AbstractCegarLoop]: Abstraction has 201 states and 227 transitions. [2018-01-24 17:07:29,869 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-24 17:07:29,869 INFO L276 IsEmpty]: Start isEmpty. Operand 201 states and 227 transitions. [2018-01-24 17:07:29,869 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-24 17:07:29,869 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:07:29,869 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:07:29,870 INFO L371 AbstractCegarLoop]: === Iteration 37 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:07:29,870 INFO L82 PathProgramCache]: Analyzing trace with hash 221499878, now seen corresponding path program 1 times [2018-01-24 17:07:29,870 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:07:29,870 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:29,871 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:07:29,871 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:29,871 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:07:29,882 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:07:29,882 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:07:31,497 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:07:31,497 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:07:31,497 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [18] imperfect sequences [] total 18 [2018-01-24 17:07:31,497 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:07:31,497 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-24 17:07:31,498 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-24 17:07:31,498 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=39, Invalid=303, Unknown=0, NotChecked=0, Total=342 [2018-01-24 17:07:31,498 INFO L87 Difference]: Start difference. First operand 201 states and 227 transitions. Second operand 19 states. [2018-01-24 17:07:32,461 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:07:32,461 INFO L93 Difference]: Finished difference Result 242 states and 273 transitions. [2018-01-24 17:07:32,502 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-24 17:07:32,502 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 47 [2018-01-24 17:07:32,502 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:07:32,503 INFO L225 Difference]: With dead ends: 242 [2018-01-24 17:07:32,503 INFO L226 Difference]: Without dead ends: 239 [2018-01-24 17:07:32,504 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 1 SyntacticMatches, 1 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 247 ImplicationChecksByTransitivity, 1.9s TimeCoverageRelationStatistics Valid=150, Invalid=1256, Unknown=0, NotChecked=0, Total=1406 [2018-01-24 17:07:32,504 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 239 states. [2018-01-24 17:07:32,518 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 239 to 218. [2018-01-24 17:07:32,518 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 218 states. [2018-01-24 17:07:32,520 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 218 states to 218 states and 249 transitions. [2018-01-24 17:07:32,520 INFO L78 Accepts]: Start accepts. Automaton has 218 states and 249 transitions. Word has length 47 [2018-01-24 17:07:32,520 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:07:32,520 INFO L432 AbstractCegarLoop]: Abstraction has 218 states and 249 transitions. [2018-01-24 17:07:32,520 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-24 17:07:32,521 INFO L276 IsEmpty]: Start isEmpty. Operand 218 states and 249 transitions. [2018-01-24 17:07:32,521 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-24 17:07:32,521 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:07:32,522 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:07:32,522 INFO L371 AbstractCegarLoop]: === Iteration 38 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:07:32,522 INFO L82 PathProgramCache]: Analyzing trace with hash 1633162428, now seen corresponding path program 1 times [2018-01-24 17:07:32,522 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:07:32,523 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:32,523 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:07:32,523 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:32,523 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:07:32,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:07:32,534 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:07:32,563 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:07:32,563 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:07:32,563 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 17:07:32,563 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:07:32,564 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 17:07:32,564 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 17:07:32,564 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:07:32,564 INFO L87 Difference]: Start difference. First operand 218 states and 249 transitions. Second operand 5 states. [2018-01-24 17:07:32,636 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:07:32,636 INFO L93 Difference]: Finished difference Result 223 states and 255 transitions. [2018-01-24 17:07:32,636 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 17:07:32,636 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 50 [2018-01-24 17:07:32,637 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:07:32,637 INFO L225 Difference]: With dead ends: 223 [2018-01-24 17:07:32,637 INFO L226 Difference]: Without dead ends: 222 [2018-01-24 17:07:32,638 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 17:07:32,638 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 222 states. [2018-01-24 17:07:32,653 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 222 to 217. [2018-01-24 17:07:32,653 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 217 states. [2018-01-24 17:07:32,654 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 217 states to 217 states and 247 transitions. [2018-01-24 17:07:32,654 INFO L78 Accepts]: Start accepts. Automaton has 217 states and 247 transitions. Word has length 50 [2018-01-24 17:07:32,655 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:07:32,655 INFO L432 AbstractCegarLoop]: Abstraction has 217 states and 247 transitions. [2018-01-24 17:07:32,655 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 17:07:32,655 INFO L276 IsEmpty]: Start isEmpty. Operand 217 states and 247 transitions. [2018-01-24 17:07:32,656 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 51 [2018-01-24 17:07:32,656 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:07:32,656 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:07:32,656 INFO L371 AbstractCegarLoop]: === Iteration 39 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:07:32,656 INFO L82 PathProgramCache]: Analyzing trace with hash 1633162429, now seen corresponding path program 1 times [2018-01-24 17:07:32,656 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:07:32,657 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:32,657 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:07:32,657 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:32,657 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:07:32,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:07:32,667 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:07:32,706 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:07:32,707 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-24 17:07:32,707 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-24 17:07:32,707 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-24 17:07:32,707 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-24 17:07:32,707 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-24 17:07:32,708 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-24 17:07:32,708 INFO L87 Difference]: Start difference. First operand 217 states and 247 transitions. Second operand 5 states. [2018-01-24 17:07:32,783 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-24 17:07:32,784 INFO L93 Difference]: Finished difference Result 222 states and 253 transitions. [2018-01-24 17:07:32,784 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-24 17:07:32,784 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 50 [2018-01-24 17:07:32,784 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-24 17:07:32,785 INFO L225 Difference]: With dead ends: 222 [2018-01-24 17:07:32,785 INFO L226 Difference]: Without dead ends: 221 [2018-01-24 17:07:32,785 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-24 17:07:32,785 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states. [2018-01-24 17:07:32,795 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 216. [2018-01-24 17:07:32,795 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 216 states. [2018-01-24 17:07:32,796 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 216 states to 216 states and 245 transitions. [2018-01-24 17:07:32,796 INFO L78 Accepts]: Start accepts. Automaton has 216 states and 245 transitions. Word has length 50 [2018-01-24 17:07:32,797 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-24 17:07:32,797 INFO L432 AbstractCegarLoop]: Abstraction has 216 states and 245 transitions. [2018-01-24 17:07:32,797 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-24 17:07:32,797 INFO L276 IsEmpty]: Start isEmpty. Operand 216 states and 245 transitions. [2018-01-24 17:07:32,797 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-24 17:07:32,798 INFO L314 BasicCegarLoop]: Found error trace [2018-01-24 17:07:32,798 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-24 17:07:32,798 INFO L371 AbstractCegarLoop]: === Iteration 40 === [create_dataErr4RequiresViolation, create_dataErr6RequiresViolation, create_dataErr0RequiresViolation, create_dataErr5RequiresViolation, create_dataErr3RequiresViolation, create_dataErr1RequiresViolation, create_dataErr7RequiresViolation, create_dataErr9RequiresViolation, create_dataErr2RequiresViolation, create_dataErr8RequiresViolation, freeDataErr6RequiresViolation, freeDataErr2RequiresViolation, freeDataErr4RequiresViolation, freeDataErr5RequiresViolation, freeDataErr3RequiresViolation, freeDataErr0RequiresViolation, freeDataErr1RequiresViolation, freeDataErr7RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr17RequiresViolation, mainErr9RequiresViolation, mainErr18EnsuresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr16RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation, appendErr0RequiresViolation, appendErr4RequiresViolation, appendErr7RequiresViolation, appendErr3RequiresViolation, appendErr2RequiresViolation, appendErr1RequiresViolation, appendErr5RequiresViolation, appendErr6RequiresViolation]=== [2018-01-24 17:07:32,798 INFO L82 PathProgramCache]: Analyzing trace with hash -420728712, now seen corresponding path program 1 times [2018-01-24 17:07:32,798 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-24 17:07:32,799 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:32,799 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:07:32,799 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-24 17:07:32,799 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-24 17:07:32,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:07:32,810 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-24 17:07:33,191 WARN L146 SmtUtils]: Spent 140ms on a formula simplification. DAG size of input: 35 DAG size of output 34 [2018-01-24 17:07:33,533 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 2 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-24 17:07:33,533 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:07:33,533 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-24 17:07:33,533 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 52 with the following transitions: [2018-01-24 17:07:33,533 INFO L201 CegarAbsIntRunner]: [0], [3], [48], [49], [50], [53], [57], [60], [63], [71], [73], [80], [81], [84], [85], [87], [88], [91], [95], [96], [99], [102], [103], [114], [117], [138], [139], [140], [144], [145], [146], [147], [150], [153], [155], [158], [159], [162], [163], [164], [165], [166], [167], [168], [169], [171], [172] [2018-01-24 17:07:33,535 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-24 17:07:33,535 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-24 17:07:33,706 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-24 17:07:33,706 INFO L268 AbstractInterpreter]: Visited 47 different actions 85 times. Merged at 15 different actions 29 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 32 variables. [2018-01-24 17:07:33,711 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-24 17:07:33,711 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-24 17:07:33,711 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-24 17:07:33,717 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-24 17:07:33,717 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-24 17:07:33,744 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-24 17:07:33,749 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-24 17:07:33,752 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-24 17:07:33,752 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:33,757 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:33,758 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-24 17:07:33,781 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-24 17:07:33,782 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 17:07:33,783 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:33,784 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:33,790 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-24 17:07:33,792 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-24 17:07:33,792 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:33,793 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:33,797 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:33,797 INFO L202 ElimStorePlain]: Needed 5 recursive calls to eliminate 2 variables, input treesize:31, output treesize:23 [2018-01-24 17:07:34,040 WARN L1029 $PredicateComparison]: unable to prove that (exists ((|append_#t~ret17.base| Int) (append_~node~12.base Int) (|append_#t~ret17.offset| Int)) (and (= (let ((.cse0 (store |c_old(#memory_$Pointer$.offset)| append_~node~12.base (store (store (select |c_old(#memory_$Pointer$.offset)| append_~node~12.base) 4 (select (select |c_old(#memory_$Pointer$.offset)| |c_append_#in~pointerToList.base|) |c_append_#in~pointerToList.offset|)) 0 |append_#t~ret17.offset|)))) (store .cse0 |c_append_#in~pointerToList.base| (store (select .cse0 |c_append_#in~pointerToList.base|) |c_append_#in~pointerToList.offset| 0))) |c_#memory_$Pointer$.offset|) (= 0 (select |c_old(#valid)| append_~node~12.base)) (= |c_#memory_$Pointer$.base| (let ((.cse1 (store |c_old(#memory_$Pointer$.base)| append_~node~12.base (store (store (select |c_old(#memory_$Pointer$.base)| append_~node~12.base) 4 (select (select |c_old(#memory_$Pointer$.base)| |c_append_#in~pointerToList.base|) |c_append_#in~pointerToList.offset|)) 0 |append_#t~ret17.base|)))) (store .cse1 |c_append_#in~pointerToList.base| (store (select .cse1 |c_append_#in~pointerToList.base|) |c_append_#in~pointerToList.offset| append_~node~12.base)))))) is different from true [2018-01-24 17:07:34,142 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 17:07:34,144 INFO L700 Elim1Store]: detected not equals via solver [2018-01-24 17:07:34,144 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 2 select indices, 2 select index equivalence classes, 2 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 4 [2018-01-24 17:07:34,145 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:34,181 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 38 [2018-01-24 17:07:34,184 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-01-24 17:07:34,189 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 19 [2018-01-24 17:07:34,189 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:34,195 INFO L267 ElimStorePlain]: Start of recursive call 4: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:34,210 INFO L682 Elim1Store]: detected equality via solver [2018-01-24 17:07:34,212 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 34 [2018-01-24 17:07:34,215 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-01-24 17:07:34,215 INFO L267 ElimStorePlain]: Start of recursive call 7: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:34,222 INFO L267 ElimStorePlain]: Start of recursive call 6: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:34,228 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:34,268 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 2 new quantified variables, introduced 0 case distinctions, treesize of input 34 treesize of output 38 [2018-01-24 17:07:34,270 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 18 [2018-01-24 17:07:34,273 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 18 treesize of output 19 [2018-01-24 17:07:34,273 INFO L267 ElimStorePlain]: Start of recursive call 10: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:34,277 INFO L267 ElimStorePlain]: Start of recursive call 9: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:34,289 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 2 select indices, 2 select index equivalence classes, 1 disjoint index pairs (out of 1 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 34 [2018-01-24 17:07:34,292 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 19 [2018-01-24 17:07:34,292 INFO L267 ElimStorePlain]: Start of recursive call 12: End of recursive call: and 1 xjuncts. [2018-01-24 17:07:34,297 INFO L267 ElimStorePlain]: Start of recursive call 11: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:34,302 INFO L267 ElimStorePlain]: Start of recursive call 8: 1 dim-1 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-24 17:07:34,313 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-1 vars, 2 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-24 17:07:34,314 INFO L202 ElimStorePlain]: Needed 12 recursive calls to eliminate 6 variables, input treesize:110, output treesize:44 Received shutdown request... [2018-01-24 17:07:34,648 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-24 17:07:34,648 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-24 17:07:34,651 WARN L187 ceAbstractionStarter]: Timeout [2018-01-24 17:07:34,651 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 24.01 05:07:34 BoogieIcfgContainer [2018-01-24 17:07:34,651 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-24 17:07:34,652 INFO L168 Benchmark]: Toolchain (without parser) took 42797.93 ms. Allocated memory was 304.6 MB in the beginning and 685.8 MB in the end (delta: 381.2 MB). Free memory was 263.5 MB in the beginning and 567.7 MB in the end (delta: -304.1 MB). Peak memory consumption was 77.0 MB. Max. memory is 5.3 GB. [2018-01-24 17:07:34,652 INFO L168 Benchmark]: CDTParser took 0.17 ms. Allocated memory is still 304.6 MB. Free memory is still 269.5 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-24 17:07:34,653 INFO L168 Benchmark]: CACSL2BoogieTranslator took 208.98 ms. Allocated memory is still 304.6 MB. Free memory was 263.5 MB in the beginning and 251.6 MB in the end (delta: 12.0 MB). Peak memory consumption was 12.0 MB. Max. memory is 5.3 GB. [2018-01-24 17:07:34,653 INFO L168 Benchmark]: Boogie Preprocessor took 40.01 ms. Allocated memory is still 304.6 MB. Free memory was 251.6 MB in the beginning and 249.6 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-24 17:07:34,653 INFO L168 Benchmark]: RCFGBuilder took 447.74 ms. Allocated memory is still 304.6 MB. Free memory was 249.6 MB in the beginning and 218.6 MB in the end (delta: 30.9 MB). Peak memory consumption was 30.9 MB. Max. memory is 5.3 GB. [2018-01-24 17:07:34,653 INFO L168 Benchmark]: TraceAbstraction took 42092.04 ms. Allocated memory was 304.6 MB in the beginning and 685.8 MB in the end (delta: 381.2 MB). Free memory was 218.6 MB in the beginning and 567.7 MB in the end (delta: -349.0 MB). Peak memory consumption was 32.1 MB. Max. memory is 5.3 GB. [2018-01-24 17:07:34,654 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.17 ms. Allocated memory is still 304.6 MB. Free memory is still 269.5 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 208.98 ms. Allocated memory is still 304.6 MB. Free memory was 263.5 MB in the beginning and 251.6 MB in the end (delta: 12.0 MB). Peak memory consumption was 12.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 40.01 ms. Allocated memory is still 304.6 MB. Free memory was 251.6 MB in the beginning and 249.6 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 447.74 ms. Allocated memory is still 304.6 MB. Free memory was 249.6 MB in the beginning and 218.6 MB in the end (delta: 30.9 MB). Peak memory consumption was 30.9 MB. Max. memory is 5.3 GB. * TraceAbstraction took 42092.04 ms. Allocated memory was 304.6 MB in the beginning and 685.8 MB in the end (delta: 381.2 MB). Free memory was 218.6 MB in the beginning and 567.7 MB in the end (delta: -349.0 MB). Peak memory consumption was 32.1 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 28 LocStat_MAX_WEQGRAPH_SIZE : 0 LocStat_MAX_SIZEOF_WEQEDGELABEL : 0 LocStat_NO_SUPPORTING_EQUALITIES : 307 LocStat_NO_SUPPORTING_DISEQUALITIES : 116 LocStat_NO_DISJUNCTIONS : -56 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 37 TransStat_MAX_WEQGRAPH_SIZE : 0 TransStat_MAX_SIZEOF_WEQEDGELABEL : 0 TransStat_NO_SUPPORTING_EQUALITIES : 75 TransStat_NO_SUPPORTING_DISEQUALITIES : 10 TransStat_NO_DISJUNCTIONS : 38 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 1.307220 RENAME_VARIABLES(MILLISECONDS) : 0.013376 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.718245 PROJECTAWAY(MILLISECONDS) : 2.499170 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.001369 DISJOIN(MILLISECONDS) : 0.458008 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.032861 ADD_EQUALITY(MILLISECONDS) : 0.041641 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.025453 #CONJOIN_DISJUNCTIVE : 88 #RENAME_VARIABLES : 178 #UNFREEZE : 0 #CONJOIN : 202 #PROJECTAWAY : 141 #ADD_WEAK_EQUALITY : 29 #DISJOIN : 31 #RENAME_VARIABLES_DISJUNCTIVE : 175 #ADD_EQUALITY : 91 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 4 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 32 LocStat_MAX_WEQGRAPH_SIZE : 0 LocStat_MAX_SIZEOF_WEQEDGELABEL : 0 LocStat_NO_SUPPORTING_EQUALITIES : 356 LocStat_NO_SUPPORTING_DISEQUALITIES : 140 LocStat_NO_DISJUNCTIONS : -64 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 41 TransStat_MAX_WEQGRAPH_SIZE : 0 TransStat_MAX_SIZEOF_WEQEDGELABEL : 0 TransStat_NO_SUPPORTING_EQUALITIES : 84 TransStat_NO_SUPPORTING_DISEQUALITIES : 18 TransStat_NO_DISJUNCTIONS : 41 TransStat_MAX_NO_DISJUNCTIONS : 1 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.275736 RENAME_VARIABLES(MILLISECONDS) : 0.126383 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.250090 PROJECTAWAY(MILLISECONDS) : 0.103793 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.001358 DISJOIN(MILLISECONDS) : 0.000000 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.147124 ADD_EQUALITY(MILLISECONDS) : 0.031666 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.019733 #CONJOIN_DISJUNCTIVE : 66 #RENAME_VARIABLES : 93 #UNFREEZE : 0 #CONJOIN : 147 #PROJECTAWAY : 86 #ADD_WEAK_EQUALITY : 33 #DISJOIN : 0 #RENAME_VARIABLES_DISJUNCTIVE : 93 #ADD_EQUALITY : 101 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 6 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 32 LocStat_MAX_WEQGRAPH_SIZE : 0 LocStat_MAX_SIZEOF_WEQEDGELABEL : 0 LocStat_NO_SUPPORTING_EQUALITIES : 356 LocStat_NO_SUPPORTING_DISEQUALITIES : 137 LocStat_NO_DISJUNCTIONS : -64 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 41 TransStat_MAX_WEQGRAPH_SIZE : 0 TransStat_MAX_SIZEOF_WEQEDGELABEL : 0 TransStat_NO_SUPPORTING_EQUALITIES : 86 TransStat_NO_SUPPORTING_DISEQUALITIES : 17 TransStat_NO_DISJUNCTIONS : 42 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.242287 RENAME_VARIABLES(MILLISECONDS) : 0.109458 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.215437 PROJECTAWAY(MILLISECONDS) : 0.114052 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.001493 DISJOIN(MILLISECONDS) : 0.411446 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.129889 ADD_EQUALITY(MILLISECONDS) : 0.042466 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.010366 #CONJOIN_DISJUNCTIVE : 66 #RENAME_VARIABLES : 95 #UNFREEZE : 0 #CONJOIN : 149 #PROJECTAWAY : 90 #ADD_WEAK_EQUALITY : 33 #DISJOIN : 1 #RENAME_VARIABLES_DISJUNCTIVE : 93 #ADD_EQUALITY : 103 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 5 - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 46 LocStat_MAX_WEQGRAPH_SIZE : 0 LocStat_MAX_SIZEOF_WEQEDGELABEL : 0 LocStat_NO_SUPPORTING_EQUALITIES : 457 LocStat_NO_SUPPORTING_DISEQUALITIES : 123 LocStat_NO_DISJUNCTIONS : -92 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 57 TransStat_MAX_WEQGRAPH_SIZE : 0 TransStat_MAX_SIZEOF_WEQEDGELABEL : 0 TransStat_NO_SUPPORTING_EQUALITIES : 119 TransStat_NO_SUPPORTING_DISEQUALITIES : 14 TransStat_NO_DISJUNCTIONS : 61 TransStat_MAX_NO_DISJUNCTIONS : 4 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.326740 RENAME_VARIABLES(MILLISECONDS) : 0.262297 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.305302 PROJECTAWAY(MILLISECONDS) : 0.312845 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.001565 DISJOIN(MILLISECONDS) : 0.090103 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.284217 ADD_EQUALITY(MILLISECONDS) : 0.028549 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.006596 #CONJOIN_DISJUNCTIVE : 132 #RENAME_VARIABLES : 240 #UNFREEZE : 0 #CONJOIN : 291 #PROJECTAWAY : 191 #ADD_WEAK_EQUALITY : 36 #DISJOIN : 16 #RENAME_VARIABLES_DISJUNCTIVE : 226 #ADD_EQUALITY : 131 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 7 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 547). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 550). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 544). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 547). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 547). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 544). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 550). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 552). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 547). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 552). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 562). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 560). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 560). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 560). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 560). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 559). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 559). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 562). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 577). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 579). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 571). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 580). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 570]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 570). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 571). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 576). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 577). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 578). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 579). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 580). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 576). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 577). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 579). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 577). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 579). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 566). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 567). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 568). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 566). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 566). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 566). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 567). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 568). Cancelled while BasicCegarLoop was analyzing trace of length 52 with TraceHistMax 2, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantified with 0quantifier alternations) to 34 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 6 procedures, 121 locations, 45 error locations. TIMEOUT Result, 42.0s OverallTime, 40 OverallIterations, 2 TraceHistogramMax, 12.9s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3532 SDtfs, 2257 SDslu, 10391 SDs, 0 SdLazy, 10118 SolverSat, 489 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 7.5s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 877 GetRequests, 407 SyntacticMatches, 31 SemanticMatches, 439 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1912 ImplicationChecksByTransitivity, 24.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=218occurred in iteration=37, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.8s AbstIntTime, 4 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.3s AutomataMinimizationTime, 39 MinimizatonAttempts, 383 StatesRemovedByMinimization, 32 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 0.5s SatisfiabilityAnalysisTime, 25.0s InterpolantComputationTime, 1422 NumberOfCodeBlocks, 1422 NumberOfCodeBlocksAsserted, 45 NumberOfCheckSat, 1587 ConstructedInterpolants, 94 QuantifiedInterpolants, 498763 SizeOfPredicates, 74 NumberOfNonLiveVariables, 1026 ConjunctsInSsa, 137 ConjunctsInUnsatCore, 51 InterpolantComputations, 36 PerfectInterpolantSequences, 16/80 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/optional_data_creation_test04_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-24_17-07-34-663.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/optional_data_creation_test04_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-24_17-07-34-663.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/optional_data_creation_test04_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-24_17-07-34-663.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/optional_data_creation_test04_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-VPDomainBenchmark-1-2018-01-24_17-07-34-663.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/optional_data_creation_test04_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-1-2018-01-24_17-07-34-663.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/optional_data_creation_test04_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-VPDomainBenchmark-2-2018-01-24_17-07-34-663.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/optional_data_creation_test04_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-2-2018-01-24_17-07-34-663.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/optional_data_creation_test04_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-VPDomainBenchmark-3-2018-01-24_17-07-34-663.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/optional_data_creation_test04_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-3-2018-01-24_17-07-34-663.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/optional_data_creation_test04_false-valid-memtrack.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_imprecise.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-24_17-07-34-663.csv Completed graceful shutdown