java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf -i ../../../trunk/examples/svcomp/loop-acceleration/array3_false-valid-deref.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-25 03:56:00,452 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-25 03:56:00,454 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-25 03:56:00,468 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-25 03:56:00,469 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-25 03:56:00,470 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-25 03:56:00,471 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-25 03:56:00,472 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-25 03:56:00,474 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-25 03:56:00,475 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-25 03:56:00,476 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-25 03:56:00,476 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-25 03:56:00,477 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-25 03:56:00,478 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-25 03:56:00,479 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-25 03:56:00,482 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-25 03:56:00,484 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-25 03:56:00,486 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-25 03:56:00,487 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-25 03:56:00,489 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-25 03:56:00,491 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-25 03:56:00,491 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-25 03:56:00,492 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-25 03:56:00,493 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-25 03:56:00,493 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-25 03:56:00,495 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-25 03:56:00,495 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-25 03:56:00,496 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-25 03:56:00,496 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-25 03:56:00,496 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-25 03:56:00,497 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-25 03:56:00,497 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf [2018-01-25 03:56:00,505 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-25 03:56:00,506 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-25 03:56:00,506 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-25 03:56:00,506 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-25 03:56:00,507 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-25 03:56:00,507 INFO L133 SettingsManager]: * Weq Fattening=true [2018-01-25 03:56:00,507 INFO L133 SettingsManager]: * Flatten before fatten=true [2018-01-25 03:56:00,507 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-25 03:56:00,507 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-25 03:56:00,508 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-25 03:56:00,508 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-25 03:56:00,508 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-25 03:56:00,508 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-25 03:56:00,508 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-25 03:56:00,508 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-25 03:56:00,509 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-25 03:56:00,509 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-25 03:56:00,509 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-25 03:56:00,509 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-25 03:56:00,509 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-25 03:56:00,509 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-25 03:56:00,509 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-25 03:56:00,510 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-25 03:56:00,510 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-25 03:56:00,510 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-25 03:56:00,510 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-25 03:56:00,510 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-25 03:56:00,510 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-25 03:56:00,511 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-25 03:56:00,511 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-25 03:56:00,511 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-25 03:56:00,511 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-25 03:56:00,511 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-25 03:56:00,511 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-25 03:56:00,511 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-25 03:56:00,512 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-25 03:56:00,512 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-25 03:56:00,544 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-25 03:56:00,554 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-25 03:56:00,557 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-25 03:56:00,558 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-25 03:56:00,559 INFO L276 PluginConnector]: CDTParser initialized [2018-01-25 03:56:00,559 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/loop-acceleration/array3_false-valid-deref.i [2018-01-25 03:56:00,691 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-25 03:56:00,696 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-25 03:56:00,697 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-25 03:56:00,697 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-25 03:56:00,701 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-25 03:56:00,702 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.01 03:56:00" (1/1) ... [2018-01-25 03:56:00,705 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@12fc949e and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 03:56:00, skipping insertion in model container [2018-01-25 03:56:00,705 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.01 03:56:00" (1/1) ... [2018-01-25 03:56:00,717 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-25 03:56:00,731 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-25 03:56:00,838 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-25 03:56:00,850 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-25 03:56:00,854 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 03:56:00 WrapperNode [2018-01-25 03:56:00,855 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-25 03:56:00,855 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-25 03:56:00,855 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-25 03:56:00,855 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-25 03:56:00,866 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 03:56:00" (1/1) ... [2018-01-25 03:56:00,867 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 03:56:00" (1/1) ... [2018-01-25 03:56:00,873 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 03:56:00" (1/1) ... [2018-01-25 03:56:00,873 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 03:56:00" (1/1) ... [2018-01-25 03:56:00,875 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 03:56:00" (1/1) ... [2018-01-25 03:56:00,879 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 03:56:00" (1/1) ... [2018-01-25 03:56:00,880 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 03:56:00" (1/1) ... [2018-01-25 03:56:00,881 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-25 03:56:00,881 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-25 03:56:00,881 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-25 03:56:00,881 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-25 03:56:00,882 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 03:56:00" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-25 03:56:00,937 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-25 03:56:00,937 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-25 03:56:00,937 INFO L136 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-01-25 03:56:00,937 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-25 03:56:00,938 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-01-25 03:56:00,938 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-25 03:56:00,938 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-01-25 03:56:00,938 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-25 03:56:00,938 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-25 03:56:00,938 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-25 03:56:01,068 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-25 03:56:01,069 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.01 03:56:01 BoogieIcfgContainer [2018-01-25 03:56:01,069 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-25 03:56:01,070 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-25 03:56:01,070 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-25 03:56:01,072 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-25 03:56:01,072 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 25.01 03:56:00" (1/3) ... [2018-01-25 03:56:01,073 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@675151fd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 25.01 03:56:01, skipping insertion in model container [2018-01-25 03:56:01,073 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 03:56:00" (2/3) ... [2018-01-25 03:56:01,074 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@675151fd and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 25.01 03:56:01, skipping insertion in model container [2018-01-25 03:56:01,074 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.01 03:56:01" (3/3) ... [2018-01-25 03:56:01,076 INFO L105 eAbstractionObserver]: Analyzing ICFG array3_false-valid-deref.i [2018-01-25 03:56:01,082 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-25 03:56:01,088 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 2 error locations. [2018-01-25 03:56:01,121 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-25 03:56:01,122 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-25 03:56:01,122 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-25 03:56:01,122 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-25 03:56:01,122 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-25 03:56:01,122 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-25 03:56:01,122 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-25 03:56:01,122 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-25 03:56:01,123 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-25 03:56:01,139 INFO L276 IsEmpty]: Start isEmpty. Operand 27 states. [2018-01-25 03:56:01,143 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-01-25 03:56:01,144 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:01,144 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:01,145 INFO L371 AbstractCegarLoop]: === Iteration 1 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:01,148 INFO L82 PathProgramCache]: Analyzing trace with hash 1213833872, now seen corresponding path program 1 times [2018-01-25 03:56:01,150 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:01,190 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:01,190 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 03:56:01,190 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:01,190 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:01,216 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:01,223 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:01,315 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 03:56:01,318 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-25 03:56:01,318 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-25 03:56:01,318 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-25 03:56:01,321 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-25 03:56:01,336 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-25 03:56:01,336 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-01-25 03:56:01,339 INFO L87 Difference]: Start difference. First operand 27 states. Second operand 4 states. [2018-01-25 03:56:01,488 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:01,489 INFO L93 Difference]: Finished difference Result 69 states and 95 transitions. [2018-01-25 03:56:01,489 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-25 03:56:01,490 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 8 [2018-01-25 03:56:01,491 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:01,497 INFO L225 Difference]: With dead ends: 69 [2018-01-25 03:56:01,498 INFO L226 Difference]: Without dead ends: 35 [2018-01-25 03:56:01,501 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-01-25 03:56:01,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 35 states. [2018-01-25 03:56:01,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 35 to 31. [2018-01-25 03:56:01,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 31 states. [2018-01-25 03:56:01,590 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 31 states to 31 states and 32 transitions. [2018-01-25 03:56:01,592 INFO L78 Accepts]: Start accepts. Automaton has 31 states and 32 transitions. Word has length 8 [2018-01-25 03:56:01,593 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:01,593 INFO L432 AbstractCegarLoop]: Abstraction has 31 states and 32 transitions. [2018-01-25 03:56:01,593 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-25 03:56:01,593 INFO L276 IsEmpty]: Start isEmpty. Operand 31 states and 32 transitions. [2018-01-25 03:56:01,594 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 17 [2018-01-25 03:56:01,594 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:01,594 INFO L322 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:01,594 INFO L371 AbstractCegarLoop]: === Iteration 2 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:01,595 INFO L82 PathProgramCache]: Analyzing trace with hash -863334142, now seen corresponding path program 1 times [2018-01-25 03:56:01,595 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:01,596 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:01,596 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 03:56:01,596 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:01,597 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:01,611 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:01,612 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:01,676 INFO L134 CoverageAnalysis]: Checked inductivity of 10 backedges. 10 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 03:56:01,677 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-25 03:56:01,677 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-25 03:56:01,677 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-25 03:56:01,679 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-25 03:56:01,679 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-25 03:56:01,679 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-01-25 03:56:01,679 INFO L87 Difference]: Start difference. First operand 31 states and 32 transitions. Second operand 6 states. [2018-01-25 03:56:01,802 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:01,802 INFO L93 Difference]: Finished difference Result 35 states and 36 transitions. [2018-01-25 03:56:01,803 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-25 03:56:01,803 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 16 [2018-01-25 03:56:01,803 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:01,804 INFO L225 Difference]: With dead ends: 35 [2018-01-25 03:56:01,804 INFO L226 Difference]: Without dead ends: 34 [2018-01-25 03:56:01,805 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-01-25 03:56:01,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 34 states. [2018-01-25 03:56:01,809 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 34 to 29. [2018-01-25 03:56:01,809 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-01-25 03:56:01,810 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 30 transitions. [2018-01-25 03:56:01,810 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 30 transitions. Word has length 16 [2018-01-25 03:56:01,810 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:01,811 INFO L432 AbstractCegarLoop]: Abstraction has 29 states and 30 transitions. [2018-01-25 03:56:01,811 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-25 03:56:01,811 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 30 transitions. [2018-01-25 03:56:01,812 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-25 03:56:01,812 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:01,812 INFO L322 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:01,812 INFO L371 AbstractCegarLoop]: === Iteration 3 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:01,813 INFO L82 PathProgramCache]: Analyzing trace with hash -1135364244, now seen corresponding path program 1 times [2018-01-25 03:56:01,813 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:01,814 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:01,814 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 03:56:01,814 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:01,814 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:01,825 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:01,826 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:01,880 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-01-25 03:56:01,880 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:01,881 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:01,882 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 29 with the following transitions: [2018-01-25 03:56:01,884 INFO L201 CegarAbsIntRunner]: [0], [4], [8], [11], [13], [15], [17], [21], [25], [26], [27], [32], [37], [39], [55], [56], [57] [2018-01-25 03:56:01,926 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-25 03:56:01,926 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-25 03:56:02,042 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-25 03:56:02,044 INFO L268 AbstractInterpreter]: Visited 17 different actions 29 times. Merged at 11 different actions 11 times. Never widened. Found 3 fixpoints after 3 different actions. Largest state had 5 variables. [2018-01-25 03:56:02,057 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-25 03:56:02,057 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:02,057 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:02,075 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 03:56:02,075 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 03:56:02,092 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:02,101 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:02,112 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-01-25 03:56:02,113 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:02,149 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-01-25 03:56:02,169 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:02,169 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:02,194 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 03:56:02,194 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 03:56:02,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:02,211 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:02,216 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-01-25 03:56:02,216 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:02,241 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-01-25 03:56:02,243 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:02,243 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 8 [2018-01-25 03:56:02,243 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:02,243 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-25 03:56:02,244 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-25 03:56:02,244 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-01-25 03:56:02,244 INFO L87 Difference]: Start difference. First operand 29 states and 30 transitions. Second operand 5 states. [2018-01-25 03:56:02,302 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:02,302 INFO L93 Difference]: Finished difference Result 58 states and 60 transitions. [2018-01-25 03:56:02,302 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-25 03:56:02,302 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 28 [2018-01-25 03:56:02,302 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:02,303 INFO L225 Difference]: With dead ends: 58 [2018-01-25 03:56:02,303 INFO L226 Difference]: Without dead ends: 44 [2018-01-25 03:56:02,304 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 115 GetRequests, 109 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-01-25 03:56:02,304 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 44 states. [2018-01-25 03:56:02,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 44 to 33. [2018-01-25 03:56:02,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-01-25 03:56:02,307 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 34 transitions. [2018-01-25 03:56:02,307 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 34 transitions. Word has length 28 [2018-01-25 03:56:02,308 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:02,308 INFO L432 AbstractCegarLoop]: Abstraction has 33 states and 34 transitions. [2018-01-25 03:56:02,308 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-25 03:56:02,308 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 34 transitions. [2018-01-25 03:56:02,308 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-25 03:56:02,309 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:02,309 INFO L322 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:02,309 INFO L371 AbstractCegarLoop]: === Iteration 4 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:02,309 INFO L82 PathProgramCache]: Analyzing trace with hash 1230203493, now seen corresponding path program 2 times [2018-01-25 03:56:02,309 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:02,310 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:02,310 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 03:56:02,310 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:02,310 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:02,319 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:02,320 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:02,363 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-01-25 03:56:02,364 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:02,364 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:02,364 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:02,364 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:02,364 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:02,364 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:02,374 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 03:56:02,375 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 03:56:02,380 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:02,394 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:02,396 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:02,398 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:02,406 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-01-25 03:56:02,406 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:02,465 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-01-25 03:56:02,491 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:02,491 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:02,494 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 03:56:02,494 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 03:56:02,502 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:02,508 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:02,513 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:02,516 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:02,523 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-01-25 03:56:02,523 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:02,545 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-01-25 03:56:02,546 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:02,546 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 10 [2018-01-25 03:56:02,546 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:02,547 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-25 03:56:02,547 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-25 03:56:02,547 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-01-25 03:56:02,548 INFO L87 Difference]: Start difference. First operand 33 states and 34 transitions. Second operand 6 states. [2018-01-25 03:56:02,640 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:02,641 INFO L93 Difference]: Finished difference Result 67 states and 70 transitions. [2018-01-25 03:56:02,641 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-25 03:56:02,641 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 32 [2018-01-25 03:56:02,641 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:02,642 INFO L225 Difference]: With dead ends: 67 [2018-01-25 03:56:02,642 INFO L226 Difference]: Without dead ends: 53 [2018-01-25 03:56:02,643 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 132 GetRequests, 124 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-01-25 03:56:02,643 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-01-25 03:56:02,648 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 37. [2018-01-25 03:56:02,648 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 37 states. [2018-01-25 03:56:02,649 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 37 states to 37 states and 38 transitions. [2018-01-25 03:56:02,650 INFO L78 Accepts]: Start accepts. Automaton has 37 states and 38 transitions. Word has length 32 [2018-01-25 03:56:02,650 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:02,650 INFO L432 AbstractCegarLoop]: Abstraction has 37 states and 38 transitions. [2018-01-25 03:56:02,650 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-25 03:56:02,650 INFO L276 IsEmpty]: Start isEmpty. Operand 37 states and 38 transitions. [2018-01-25 03:56:02,651 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 37 [2018-01-25 03:56:02,652 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:02,652 INFO L322 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:02,652 INFO L371 AbstractCegarLoop]: === Iteration 5 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:02,652 INFO L82 PathProgramCache]: Analyzing trace with hash 417265886, now seen corresponding path program 3 times [2018-01-25 03:56:02,652 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:02,653 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:02,653 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 03:56:02,653 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:02,653 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:02,666 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:02,667 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:02,718 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 9 trivial. 0 not checked. [2018-01-25 03:56:02,718 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:02,718 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:02,718 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:02,718 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:02,719 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:02,719 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:02,728 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 03:56:02,729 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 03:56:02,733 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:02,735 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:02,737 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:02,738 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:02,740 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:02,756 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-01-25 03:56:02,757 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:02,853 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-01-25 03:56:02,885 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:02,885 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:02,907 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 03:56:02,907 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 03:56:02,912 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:02,914 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:02,920 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:02,924 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:02,926 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:02,930 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-01-25 03:56:02,930 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:02,941 INFO L134 CoverageAnalysis]: Checked inductivity of 41 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-01-25 03:56:02,942 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:02,943 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 4, 4, 4, 4] total 13 [2018-01-25 03:56:02,943 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:02,943 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-25 03:56:02,943 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-25 03:56:02,943 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2018-01-25 03:56:02,943 INFO L87 Difference]: Start difference. First operand 37 states and 38 transitions. Second operand 10 states. [2018-01-25 03:56:03,018 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:03,018 INFO L93 Difference]: Finished difference Result 76 states and 80 transitions. [2018-01-25 03:56:03,018 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-25 03:56:03,019 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 36 [2018-01-25 03:56:03,019 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:03,020 INFO L225 Difference]: With dead ends: 76 [2018-01-25 03:56:03,020 INFO L226 Difference]: Without dead ends: 62 [2018-01-25 03:56:03,021 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 138 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 45 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=54, Invalid=102, Unknown=0, NotChecked=0, Total=156 [2018-01-25 03:56:03,021 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 62 states. [2018-01-25 03:56:03,025 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 62 to 46. [2018-01-25 03:56:03,026 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-01-25 03:56:03,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 47 transitions. [2018-01-25 03:56:03,027 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 47 transitions. Word has length 36 [2018-01-25 03:56:03,027 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:03,027 INFO L432 AbstractCegarLoop]: Abstraction has 46 states and 47 transitions. [2018-01-25 03:56:03,028 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-25 03:56:03,028 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 47 transitions. [2018-01-25 03:56:03,029 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-25 03:56:03,029 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:03,029 INFO L322 BasicCegarLoop]: trace histogram [6, 5, 5, 5, 4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:03,029 INFO L371 AbstractCegarLoop]: === Iteration 6 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:03,029 INFO L82 PathProgramCache]: Analyzing trace with hash 576961419, now seen corresponding path program 4 times [2018-01-25 03:56:03,030 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:03,030 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:03,031 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 03:56:03,031 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:03,031 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:03,044 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:03,045 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:03,106 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-01-25 03:56:03,106 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:03,107 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:03,107 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:03,107 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:03,107 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:03,107 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:03,113 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 03:56:03,113 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 03:56:03,125 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:03,128 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:03,136 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-01-25 03:56:03,136 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:03,218 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-01-25 03:56:03,238 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:03,239 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:03,242 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 03:56:03,242 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 03:56:03,262 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:03,266 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:03,273 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-01-25 03:56:03,274 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:03,283 INFO L134 CoverageAnalysis]: Checked inductivity of 71 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-01-25 03:56:03,284 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:03,284 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 14 [2018-01-25 03:56:03,285 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:03,285 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-25 03:56:03,285 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-25 03:56:03,285 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-01-25 03:56:03,286 INFO L87 Difference]: Start difference. First operand 46 states and 47 transitions. Second operand 8 states. [2018-01-25 03:56:03,344 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:03,345 INFO L93 Difference]: Finished difference Result 90 states and 94 transitions. [2018-01-25 03:56:03,345 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-25 03:56:03,345 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 45 [2018-01-25 03:56:03,345 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:03,346 INFO L225 Difference]: With dead ends: 90 [2018-01-25 03:56:03,346 INFO L226 Difference]: Without dead ends: 71 [2018-01-25 03:56:03,347 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 186 GetRequests, 174 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-01-25 03:56:03,347 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 71 states. [2018-01-25 03:56:03,353 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 71 to 50. [2018-01-25 03:56:03,353 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-01-25 03:56:03,354 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 51 transitions. [2018-01-25 03:56:03,354 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 51 transitions. Word has length 45 [2018-01-25 03:56:03,354 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:03,354 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 51 transitions. [2018-01-25 03:56:03,355 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-25 03:56:03,355 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 51 transitions. [2018-01-25 03:56:03,355 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-01-25 03:56:03,356 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:03,356 INFO L322 BasicCegarLoop]: trace histogram [7, 6, 6, 6, 4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:03,356 INFO L371 AbstractCegarLoop]: === Iteration 7 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:03,356 INFO L82 PathProgramCache]: Analyzing trace with hash -194823758, now seen corresponding path program 5 times [2018-01-25 03:56:03,356 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:03,357 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:03,357 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 03:56:03,357 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:03,357 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:03,369 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:03,370 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:03,506 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-01-25 03:56:03,507 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:03,507 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:03,507 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:03,507 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:03,507 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:03,507 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:03,522 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 03:56:03,523 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 03:56:03,528 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:03,542 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:03,544 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:03,546 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:03,551 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:03,556 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:03,560 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:03,561 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:03,563 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:03,571 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-01-25 03:56:03,571 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:03,678 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-01-25 03:56:03,698 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:03,699 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:03,702 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 03:56:03,702 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 03:56:03,706 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:03,708 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:03,712 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:03,718 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:03,725 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:03,734 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:03,753 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:03,762 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:03,771 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:03,779 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-01-25 03:56:03,779 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:03,789 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-01-25 03:56:03,790 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:03,791 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 16 [2018-01-25 03:56:03,791 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:03,791 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-25 03:56:03,791 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-25 03:56:03,792 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-01-25 03:56:03,792 INFO L87 Difference]: Start difference. First operand 50 states and 51 transitions. Second operand 9 states. [2018-01-25 03:56:03,847 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:03,848 INFO L93 Difference]: Finished difference Result 99 states and 104 transitions. [2018-01-25 03:56:03,848 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-25 03:56:03,848 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 49 [2018-01-25 03:56:03,848 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:03,850 INFO L225 Difference]: With dead ends: 99 [2018-01-25 03:56:03,850 INFO L226 Difference]: Without dead ends: 80 [2018-01-25 03:56:03,851 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 203 GetRequests, 189 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-01-25 03:56:03,851 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2018-01-25 03:56:03,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 54. [2018-01-25 03:56:03,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 54 states. [2018-01-25 03:56:03,859 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 54 states to 54 states and 55 transitions. [2018-01-25 03:56:03,859 INFO L78 Accepts]: Start accepts. Automaton has 54 states and 55 transitions. Word has length 49 [2018-01-25 03:56:03,860 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:03,860 INFO L432 AbstractCegarLoop]: Abstraction has 54 states and 55 transitions. [2018-01-25 03:56:03,860 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-25 03:56:03,860 INFO L276 IsEmpty]: Start isEmpty. Operand 54 states and 55 transitions. [2018-01-25 03:56:03,861 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-01-25 03:56:03,861 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:03,861 INFO L322 BasicCegarLoop]: trace histogram [8, 7, 7, 7, 4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:03,861 INFO L371 AbstractCegarLoop]: === Iteration 8 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:03,862 INFO L82 PathProgramCache]: Analyzing trace with hash -1600566183, now seen corresponding path program 6 times [2018-01-25 03:56:03,862 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:03,863 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:03,863 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 03:56:03,863 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:03,863 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:03,874 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:03,875 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:03,954 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 21 trivial. 0 not checked. [2018-01-25 03:56:03,954 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:03,954 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:03,954 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:03,955 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:03,955 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:03,955 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:03,960 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 03:56:03,960 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 03:56:03,965 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:03,967 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:03,969 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:03,971 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:03,973 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:03,976 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:03,978 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:03,979 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:03,982 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:04,010 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-25 03:56:04,010 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:04,055 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-25 03:56:04,075 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:04,075 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:04,078 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 03:56:04,078 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 03:56:04,084 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:04,085 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:04,090 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:04,095 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:04,102 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:04,112 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:04,123 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:04,129 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:04,132 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:04,136 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-25 03:56:04,136 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:04,144 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-25 03:56:04,146 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:04,146 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 5, 5, 5, 5] total 18 [2018-01-25 03:56:04,146 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:04,147 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-25 03:56:04,147 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-25 03:56:04,147 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=103, Invalid=203, Unknown=0, NotChecked=0, Total=306 [2018-01-25 03:56:04,147 INFO L87 Difference]: Start difference. First operand 54 states and 55 transitions. Second operand 14 states. [2018-01-25 03:56:04,272 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:04,272 INFO L93 Difference]: Finished difference Result 108 states and 114 transitions. [2018-01-25 03:56:04,272 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-25 03:56:04,272 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 53 [2018-01-25 03:56:04,273 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:04,273 INFO L225 Difference]: With dead ends: 108 [2018-01-25 03:56:04,273 INFO L226 Difference]: Without dead ends: 89 [2018-01-25 03:56:04,274 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 220 GetRequests, 204 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 100 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=103, Invalid=203, Unknown=0, NotChecked=0, Total=306 [2018-01-25 03:56:04,274 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 89 states. [2018-01-25 03:56:04,281 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 89 to 63. [2018-01-25 03:56:04,281 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-01-25 03:56:04,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 64 transitions. [2018-01-25 03:56:04,282 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 64 transitions. Word has length 53 [2018-01-25 03:56:04,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:04,283 INFO L432 AbstractCegarLoop]: Abstraction has 63 states and 64 transitions. [2018-01-25 03:56:04,283 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-25 03:56:04,283 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 64 transitions. [2018-01-25 03:56:04,284 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-01-25 03:56:04,284 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:04,284 INFO L322 BasicCegarLoop]: trace histogram [9, 8, 8, 8, 5, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:04,285 INFO L371 AbstractCegarLoop]: === Iteration 9 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:04,285 INFO L82 PathProgramCache]: Analyzing trace with hash 1495641218, now seen corresponding path program 7 times [2018-01-25 03:56:04,285 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:04,286 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:04,286 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 03:56:04,286 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:04,286 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:04,298 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:04,299 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:04,374 INFO L134 CoverageAnalysis]: Checked inductivity of 166 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2018-01-25 03:56:04,374 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:04,374 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:04,375 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:04,375 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:04,375 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:04,375 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:04,382 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 03:56:04,382 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 03:56:04,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:04,399 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:04,411 INFO L134 CoverageAnalysis]: Checked inductivity of 166 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2018-01-25 03:56:04,412 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:04,582 INFO L134 CoverageAnalysis]: Checked inductivity of 166 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2018-01-25 03:56:04,609 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:04,609 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:04,612 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 03:56:04,613 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 03:56:04,637 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:04,641 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:04,653 INFO L134 CoverageAnalysis]: Checked inductivity of 166 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2018-01-25 03:56:04,653 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:04,685 INFO L134 CoverageAnalysis]: Checked inductivity of 166 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2018-01-25 03:56:04,687 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:04,687 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 20 [2018-01-25 03:56:04,688 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:04,688 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-25 03:56:04,688 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-25 03:56:04,688 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=190, Invalid=190, Unknown=0, NotChecked=0, Total=380 [2018-01-25 03:56:04,689 INFO L87 Difference]: Start difference. First operand 63 states and 64 transitions. Second operand 11 states. [2018-01-25 03:56:04,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:04,778 INFO L93 Difference]: Finished difference Result 122 states and 128 transitions. [2018-01-25 03:56:04,779 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-25 03:56:04,779 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 62 [2018-01-25 03:56:04,779 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:04,780 INFO L225 Difference]: With dead ends: 122 [2018-01-25 03:56:04,780 INFO L226 Difference]: Without dead ends: 98 [2018-01-25 03:56:04,781 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 257 GetRequests, 239 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=190, Invalid=190, Unknown=0, NotChecked=0, Total=380 [2018-01-25 03:56:04,781 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 98 states. [2018-01-25 03:56:04,793 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 98 to 67. [2018-01-25 03:56:04,794 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67 states. [2018-01-25 03:56:04,795 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 68 transitions. [2018-01-25 03:56:04,795 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 68 transitions. Word has length 62 [2018-01-25 03:56:04,795 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:04,795 INFO L432 AbstractCegarLoop]: Abstraction has 67 states and 68 transitions. [2018-01-25 03:56:04,795 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-25 03:56:04,795 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 68 transitions. [2018-01-25 03:56:04,796 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 67 [2018-01-25 03:56:04,796 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:04,796 INFO L322 BasicCegarLoop]: trace histogram [10, 9, 9, 9, 5, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:04,796 INFO L371 AbstractCegarLoop]: === Iteration 10 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:04,797 INFO L82 PathProgramCache]: Analyzing trace with hash -1534369477, now seen corresponding path program 8 times [2018-01-25 03:56:04,797 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:04,798 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:04,798 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 03:56:04,798 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:04,798 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:04,809 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:04,810 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:04,938 INFO L134 CoverageAnalysis]: Checked inductivity of 200 backedges. 0 proven. 162 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2018-01-25 03:56:04,938 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:04,938 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:04,939 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:04,939 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:04,939 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:04,939 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:04,944 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 03:56:04,945 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 03:56:04,949 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:04,956 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:04,958 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:04,960 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:04,971 INFO L134 CoverageAnalysis]: Checked inductivity of 200 backedges. 0 proven. 162 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2018-01-25 03:56:04,971 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:05,113 INFO L134 CoverageAnalysis]: Checked inductivity of 200 backedges. 0 proven. 162 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2018-01-25 03:56:05,133 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:05,133 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:05,136 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 03:56:05,136 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 03:56:05,143 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:05,153 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:05,160 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:05,163 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:05,172 INFO L134 CoverageAnalysis]: Checked inductivity of 200 backedges. 0 proven. 162 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2018-01-25 03:56:05,172 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:05,193 INFO L134 CoverageAnalysis]: Checked inductivity of 200 backedges. 0 proven. 162 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2018-01-25 03:56:05,195 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:05,196 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 22 [2018-01-25 03:56:05,196 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:05,196 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-25 03:56:05,196 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-25 03:56:05,197 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=231, Invalid=231, Unknown=0, NotChecked=0, Total=462 [2018-01-25 03:56:05,197 INFO L87 Difference]: Start difference. First operand 67 states and 68 transitions. Second operand 12 states. [2018-01-25 03:56:05,275 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:05,275 INFO L93 Difference]: Finished difference Result 131 states and 138 transitions. [2018-01-25 03:56:05,275 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-25 03:56:05,275 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 66 [2018-01-25 03:56:05,276 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:05,276 INFO L225 Difference]: With dead ends: 131 [2018-01-25 03:56:05,276 INFO L226 Difference]: Without dead ends: 107 [2018-01-25 03:56:05,277 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 274 GetRequests, 254 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=231, Invalid=231, Unknown=0, NotChecked=0, Total=462 [2018-01-25 03:56:05,277 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 107 states. [2018-01-25 03:56:05,283 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 107 to 71. [2018-01-25 03:56:05,283 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 71 states. [2018-01-25 03:56:05,284 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 71 states to 71 states and 72 transitions. [2018-01-25 03:56:05,284 INFO L78 Accepts]: Start accepts. Automaton has 71 states and 72 transitions. Word has length 66 [2018-01-25 03:56:05,285 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:05,285 INFO L432 AbstractCegarLoop]: Abstraction has 71 states and 72 transitions. [2018-01-25 03:56:05,285 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-25 03:56:05,285 INFO L276 IsEmpty]: Start isEmpty. Operand 71 states and 72 transitions. [2018-01-25 03:56:05,286 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 71 [2018-01-25 03:56:05,286 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:05,286 INFO L322 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 5, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:05,286 INFO L371 AbstractCegarLoop]: === Iteration 11 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:05,287 INFO L82 PathProgramCache]: Analyzing trace with hash -1473900172, now seen corresponding path program 9 times [2018-01-25 03:56:05,287 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:05,287 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:05,288 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 03:56:05,288 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:05,288 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:05,299 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:05,300 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:05,405 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 0 proven. 200 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2018-01-25 03:56:05,405 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:05,406 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:05,406 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:05,406 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:05,406 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:05,406 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:05,415 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 03:56:05,415 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 03:56:05,419 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:05,421 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:05,422 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:05,423 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:05,425 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:05,425 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:05,427 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:05,447 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2018-01-25 03:56:05,447 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:05,500 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2018-01-25 03:56:05,521 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:05,521 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:05,524 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 03:56:05,524 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 03:56:05,529 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:05,532 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:05,537 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:05,545 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:05,554 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:05,559 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:05,563 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:05,570 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2018-01-25 03:56:05,570 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:05,591 INFO L134 CoverageAnalysis]: Checked inductivity of 238 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2018-01-25 03:56:05,594 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:05,594 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 6, 6, 6, 6] total 23 [2018-01-25 03:56:05,594 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:05,595 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-25 03:56:05,595 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-25 03:56:05,595 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=168, Invalid=338, Unknown=0, NotChecked=0, Total=506 [2018-01-25 03:56:05,596 INFO L87 Difference]: Start difference. First operand 71 states and 72 transitions. Second operand 18 states. [2018-01-25 03:56:05,781 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:05,782 INFO L93 Difference]: Finished difference Result 140 states and 148 transitions. [2018-01-25 03:56:05,782 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-25 03:56:05,782 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 70 [2018-01-25 03:56:05,782 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:05,783 INFO L225 Difference]: With dead ends: 140 [2018-01-25 03:56:05,783 INFO L226 Difference]: Without dead ends: 116 [2018-01-25 03:56:05,783 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 291 GetRequests, 270 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 175 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=168, Invalid=338, Unknown=0, NotChecked=0, Total=506 [2018-01-25 03:56:05,783 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 116 states. [2018-01-25 03:56:05,792 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 116 to 80. [2018-01-25 03:56:05,792 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 80 states. [2018-01-25 03:56:05,793 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 80 states to 80 states and 81 transitions. [2018-01-25 03:56:05,793 INFO L78 Accepts]: Start accepts. Automaton has 80 states and 81 transitions. Word has length 70 [2018-01-25 03:56:05,794 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:05,794 INFO L432 AbstractCegarLoop]: Abstraction has 80 states and 81 transitions. [2018-01-25 03:56:05,794 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-25 03:56:05,794 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states and 81 transitions. [2018-01-25 03:56:05,795 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 80 [2018-01-25 03:56:05,795 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:05,796 INFO L322 BasicCegarLoop]: trace histogram [12, 11, 11, 11, 6, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:05,796 INFO L371 AbstractCegarLoop]: === Iteration 12 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:05,796 INFO L82 PathProgramCache]: Analyzing trace with hash -1757583627, now seen corresponding path program 10 times [2018-01-25 03:56:05,796 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:05,797 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:05,797 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 03:56:05,797 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:05,797 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:05,808 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:05,809 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:05,912 INFO L134 CoverageAnalysis]: Checked inductivity of 302 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-01-25 03:56:05,912 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:05,912 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:05,912 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:05,913 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:05,913 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:05,913 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:05,921 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 03:56:05,921 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 03:56:05,934 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:05,936 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:05,946 INFO L134 CoverageAnalysis]: Checked inductivity of 302 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-01-25 03:56:05,946 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:06,091 INFO L134 CoverageAnalysis]: Checked inductivity of 302 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-01-25 03:56:06,111 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:06,111 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:06,115 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 03:56:06,115 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 03:56:06,141 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:06,145 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:06,154 INFO L134 CoverageAnalysis]: Checked inductivity of 302 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-01-25 03:56:06,154 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:06,165 INFO L134 CoverageAnalysis]: Checked inductivity of 302 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-01-25 03:56:06,166 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:06,166 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 26 [2018-01-25 03:56:06,166 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:06,167 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-25 03:56:06,167 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-25 03:56:06,167 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=325, Invalid=325, Unknown=0, NotChecked=0, Total=650 [2018-01-25 03:56:06,167 INFO L87 Difference]: Start difference. First operand 80 states and 81 transitions. Second operand 14 states. [2018-01-25 03:56:06,264 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:06,264 INFO L93 Difference]: Finished difference Result 154 states and 162 transitions. [2018-01-25 03:56:06,265 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-25 03:56:06,265 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 79 [2018-01-25 03:56:06,265 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:06,266 INFO L225 Difference]: With dead ends: 154 [2018-01-25 03:56:06,266 INFO L226 Difference]: Without dead ends: 125 [2018-01-25 03:56:06,266 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 328 GetRequests, 304 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=325, Invalid=325, Unknown=0, NotChecked=0, Total=650 [2018-01-25 03:56:06,266 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-01-25 03:56:06,272 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 84. [2018-01-25 03:56:06,272 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-01-25 03:56:06,273 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 85 transitions. [2018-01-25 03:56:06,273 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 85 transitions. Word has length 79 [2018-01-25 03:56:06,274 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:06,274 INFO L432 AbstractCegarLoop]: Abstraction has 84 states and 85 transitions. [2018-01-25 03:56:06,274 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-25 03:56:06,274 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 85 transitions. [2018-01-25 03:56:06,275 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-01-25 03:56:06,275 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:06,275 INFO L322 BasicCegarLoop]: trace histogram [13, 12, 12, 12, 6, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:06,275 INFO L371 AbstractCegarLoop]: === Iteration 13 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:06,275 INFO L82 PathProgramCache]: Analyzing trace with hash -2099078308, now seen corresponding path program 11 times [2018-01-25 03:56:06,275 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:06,276 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:06,276 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 03:56:06,276 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:06,276 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:06,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:06,286 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:06,379 INFO L134 CoverageAnalysis]: Checked inductivity of 348 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-01-25 03:56:06,379 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:06,379 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:06,379 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:06,379 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:06,379 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:06,379 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:06,386 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 03:56:06,386 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 03:56:06,391 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:06,392 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:06,394 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:06,395 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:06,396 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:06,397 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:06,406 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:06,408 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:06,410 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:06,412 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:06,414 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:06,417 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:06,421 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:06,422 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:06,423 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:06,436 INFO L134 CoverageAnalysis]: Checked inductivity of 348 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-01-25 03:56:06,436 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:06,662 INFO L134 CoverageAnalysis]: Checked inductivity of 348 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-01-25 03:56:06,681 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:06,682 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:06,684 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 03:56:06,684 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 03:56:06,689 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:06,692 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:06,696 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:06,701 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:06,706 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:06,713 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:06,720 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:06,730 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:06,742 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:06,757 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:06,776 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:06,799 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:06,885 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:06,896 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:06,900 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:06,914 INFO L134 CoverageAnalysis]: Checked inductivity of 348 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-01-25 03:56:06,915 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:06,931 INFO L134 CoverageAnalysis]: Checked inductivity of 348 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-01-25 03:56:06,933 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:06,933 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 28 [2018-01-25 03:56:06,933 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:06,934 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-25 03:56:06,934 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-25 03:56:06,934 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=378, Invalid=378, Unknown=0, NotChecked=0, Total=756 [2018-01-25 03:56:06,934 INFO L87 Difference]: Start difference. First operand 84 states and 85 transitions. Second operand 15 states. [2018-01-25 03:56:07,020 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:07,020 INFO L93 Difference]: Finished difference Result 163 states and 172 transitions. [2018-01-25 03:56:07,021 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-25 03:56:07,021 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 83 [2018-01-25 03:56:07,021 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:07,021 INFO L225 Difference]: With dead ends: 163 [2018-01-25 03:56:07,022 INFO L226 Difference]: Without dead ends: 134 [2018-01-25 03:56:07,022 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 345 GetRequests, 319 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=378, Invalid=378, Unknown=0, NotChecked=0, Total=756 [2018-01-25 03:56:07,022 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 134 states. [2018-01-25 03:56:07,027 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 134 to 88. [2018-01-25 03:56:07,027 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 88 states. [2018-01-25 03:56:07,027 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 89 transitions. [2018-01-25 03:56:07,027 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 89 transitions. Word has length 83 [2018-01-25 03:56:07,028 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:07,028 INFO L432 AbstractCegarLoop]: Abstraction has 88 states and 89 transitions. [2018-01-25 03:56:07,028 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-25 03:56:07,028 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 89 transitions. [2018-01-25 03:56:07,028 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-01-25 03:56:07,028 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:07,028 INFO L322 BasicCegarLoop]: trace histogram [14, 13, 13, 13, 6, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:07,028 INFO L371 AbstractCegarLoop]: === Iteration 14 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:07,029 INFO L82 PathProgramCache]: Analyzing trace with hash -159824829, now seen corresponding path program 12 times [2018-01-25 03:56:07,029 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:07,029 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:07,029 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 03:56:07,029 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:07,029 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:07,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:07,040 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:07,203 INFO L134 CoverageAnalysis]: Checked inductivity of 398 backedges. 0 proven. 338 refuted. 0 times theorem prover too weak. 60 trivial. 0 not checked. [2018-01-25 03:56:07,203 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:07,203 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:07,203 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:07,203 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:07,203 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:07,204 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:07,210 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 03:56:07,210 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 03:56:07,216 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:07,217 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:07,218 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:07,220 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:07,221 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:07,222 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:07,224 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:07,226 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:07,228 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:07,230 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:07,233 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:07,234 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:07,235 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:07,275 INFO L134 CoverageAnalysis]: Checked inductivity of 398 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 338 trivial. 0 not checked. [2018-01-25 03:56:07,276 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:07,352 INFO L134 CoverageAnalysis]: Checked inductivity of 398 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 338 trivial. 0 not checked. [2018-01-25 03:56:07,381 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:07,381 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:07,384 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 03:56:07,384 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 03:56:07,391 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:07,394 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:07,400 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:07,408 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:07,418 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:07,432 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:07,443 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:07,455 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:07,469 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:07,500 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:07,525 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:07,533 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:07,537 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:07,546 INFO L134 CoverageAnalysis]: Checked inductivity of 398 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 338 trivial. 0 not checked. [2018-01-25 03:56:07,546 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:07,561 INFO L134 CoverageAnalysis]: Checked inductivity of 398 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 338 trivial. 0 not checked. [2018-01-25 03:56:07,562 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:07,562 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 7, 7, 7, 7] total 28 [2018-01-25 03:56:07,563 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:07,563 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-25 03:56:07,563 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-25 03:56:07,564 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=249, Invalid=507, Unknown=0, NotChecked=0, Total=756 [2018-01-25 03:56:07,564 INFO L87 Difference]: Start difference. First operand 88 states and 89 transitions. Second operand 22 states. [2018-01-25 03:56:07,779 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:07,779 INFO L93 Difference]: Finished difference Result 172 states and 182 transitions. [2018-01-25 03:56:07,780 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-25 03:56:07,780 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 87 [2018-01-25 03:56:07,780 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:07,781 INFO L225 Difference]: With dead ends: 172 [2018-01-25 03:56:07,781 INFO L226 Difference]: Without dead ends: 143 [2018-01-25 03:56:07,782 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 362 GetRequests, 336 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 270 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=249, Invalid=507, Unknown=0, NotChecked=0, Total=756 [2018-01-25 03:56:07,782 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-01-25 03:56:07,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 97. [2018-01-25 03:56:07,789 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-01-25 03:56:07,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 98 transitions. [2018-01-25 03:56:07,790 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 98 transitions. Word has length 87 [2018-01-25 03:56:07,790 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:07,790 INFO L432 AbstractCegarLoop]: Abstraction has 97 states and 98 transitions. [2018-01-25 03:56:07,790 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-25 03:56:07,790 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 98 transitions. [2018-01-25 03:56:07,791 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 97 [2018-01-25 03:56:07,791 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:07,791 INFO L322 BasicCegarLoop]: trace histogram [15, 14, 14, 14, 7, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:07,791 INFO L371 AbstractCegarLoop]: === Iteration 15 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:07,791 INFO L82 PathProgramCache]: Analyzing trace with hash -2110093160, now seen corresponding path program 13 times [2018-01-25 03:56:07,791 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:07,792 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:07,792 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 03:56:07,792 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:07,792 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:07,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:07,803 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:07,950 INFO L134 CoverageAnalysis]: Checked inductivity of 479 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 87 trivial. 0 not checked. [2018-01-25 03:56:07,950 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:07,964 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:07,964 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:07,964 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:07,964 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:07,964 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:07,969 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 03:56:07,969 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 03:56:07,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:07,985 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:07,994 INFO L134 CoverageAnalysis]: Checked inductivity of 479 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 87 trivial. 0 not checked. [2018-01-25 03:56:07,994 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:08,206 INFO L134 CoverageAnalysis]: Checked inductivity of 479 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 87 trivial. 0 not checked. [2018-01-25 03:56:08,226 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:08,226 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:08,229 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 03:56:08,229 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 03:56:08,254 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:08,258 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:08,272 INFO L134 CoverageAnalysis]: Checked inductivity of 479 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 87 trivial. 0 not checked. [2018-01-25 03:56:08,272 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:08,288 INFO L134 CoverageAnalysis]: Checked inductivity of 479 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 87 trivial. 0 not checked. [2018-01-25 03:56:08,290 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:08,290 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 32 [2018-01-25 03:56:08,290 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:08,290 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-25 03:56:08,291 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-25 03:56:08,291 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=496, Invalid=496, Unknown=0, NotChecked=0, Total=992 [2018-01-25 03:56:08,295 INFO L87 Difference]: Start difference. First operand 97 states and 98 transitions. Second operand 17 states. [2018-01-25 03:56:08,422 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:08,422 INFO L93 Difference]: Finished difference Result 186 states and 196 transitions. [2018-01-25 03:56:08,423 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-25 03:56:08,423 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 96 [2018-01-25 03:56:08,423 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:08,424 INFO L225 Difference]: With dead ends: 186 [2018-01-25 03:56:08,424 INFO L226 Difference]: Without dead ends: 152 [2018-01-25 03:56:08,424 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 399 GetRequests, 369 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=496, Invalid=496, Unknown=0, NotChecked=0, Total=992 [2018-01-25 03:56:08,425 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-01-25 03:56:08,432 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 101. [2018-01-25 03:56:08,432 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 101 states. [2018-01-25 03:56:08,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 101 states to 101 states and 102 transitions. [2018-01-25 03:56:08,432 INFO L78 Accepts]: Start accepts. Automaton has 101 states and 102 transitions. Word has length 96 [2018-01-25 03:56:08,433 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:08,433 INFO L432 AbstractCegarLoop]: Abstraction has 101 states and 102 transitions. [2018-01-25 03:56:08,433 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-25 03:56:08,433 INFO L276 IsEmpty]: Start isEmpty. Operand 101 states and 102 transitions. [2018-01-25 03:56:08,433 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 101 [2018-01-25 03:56:08,433 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:08,434 INFO L322 BasicCegarLoop]: trace histogram [16, 15, 15, 15, 7, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:08,434 INFO L371 AbstractCegarLoop]: === Iteration 16 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:08,434 INFO L82 PathProgramCache]: Analyzing trace with hash 1842728721, now seen corresponding path program 14 times [2018-01-25 03:56:08,434 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:08,434 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:08,435 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 03:56:08,435 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:08,435 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:08,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:08,448 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:08,649 INFO L134 CoverageAnalysis]: Checked inductivity of 537 backedges. 0 proven. 450 refuted. 0 times theorem prover too weak. 87 trivial. 0 not checked. [2018-01-25 03:56:08,649 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:08,649 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:08,649 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:08,649 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:08,649 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:08,649 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:08,655 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 03:56:08,655 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 03:56:08,660 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:08,668 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:08,670 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:08,672 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:08,682 INFO L134 CoverageAnalysis]: Checked inductivity of 537 backedges. 0 proven. 450 refuted. 0 times theorem prover too weak. 87 trivial. 0 not checked. [2018-01-25 03:56:08,682 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:08,934 INFO L134 CoverageAnalysis]: Checked inductivity of 537 backedges. 0 proven. 450 refuted. 0 times theorem prover too weak. 87 trivial. 0 not checked. [2018-01-25 03:56:08,969 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:08,969 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:08,972 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 03:56:08,972 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 03:56:08,981 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:08,994 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:09,004 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:09,008 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:09,020 INFO L134 CoverageAnalysis]: Checked inductivity of 537 backedges. 0 proven. 450 refuted. 0 times theorem prover too weak. 87 trivial. 0 not checked. [2018-01-25 03:56:09,020 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:09,048 INFO L134 CoverageAnalysis]: Checked inductivity of 537 backedges. 0 proven. 450 refuted. 0 times theorem prover too weak. 87 trivial. 0 not checked. [2018-01-25 03:56:09,050 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:09,051 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 34 [2018-01-25 03:56:09,051 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:09,051 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-25 03:56:09,051 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-25 03:56:09,052 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=561, Invalid=561, Unknown=0, NotChecked=0, Total=1122 [2018-01-25 03:56:09,052 INFO L87 Difference]: Start difference. First operand 101 states and 102 transitions. Second operand 18 states. [2018-01-25 03:56:09,252 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:09,252 INFO L93 Difference]: Finished difference Result 195 states and 206 transitions. [2018-01-25 03:56:09,252 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-25 03:56:09,252 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 100 [2018-01-25 03:56:09,252 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:09,253 INFO L225 Difference]: With dead ends: 195 [2018-01-25 03:56:09,253 INFO L226 Difference]: Without dead ends: 161 [2018-01-25 03:56:09,254 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 416 GetRequests, 384 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=561, Invalid=561, Unknown=0, NotChecked=0, Total=1122 [2018-01-25 03:56:09,254 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2018-01-25 03:56:09,265 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 105. [2018-01-25 03:56:09,265 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-01-25 03:56:09,266 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 106 transitions. [2018-01-25 03:56:09,266 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 106 transitions. Word has length 100 [2018-01-25 03:56:09,267 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:09,267 INFO L432 AbstractCegarLoop]: Abstraction has 105 states and 106 transitions. [2018-01-25 03:56:09,267 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-25 03:56:09,267 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 106 transitions. [2018-01-25 03:56:09,268 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 105 [2018-01-25 03:56:09,268 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:09,268 INFO L322 BasicCegarLoop]: trace histogram [17, 16, 16, 16, 7, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:09,268 INFO L371 AbstractCegarLoop]: === Iteration 17 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:09,268 INFO L82 PathProgramCache]: Analyzing trace with hash -184078070, now seen corresponding path program 15 times [2018-01-25 03:56:09,268 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:09,269 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:09,269 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 03:56:09,269 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:09,269 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:09,282 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:09,283 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:09,473 INFO L134 CoverageAnalysis]: Checked inductivity of 599 backedges. 0 proven. 512 refuted. 0 times theorem prover too weak. 87 trivial. 0 not checked. [2018-01-25 03:56:09,473 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:09,473 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:09,473 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:09,474 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:09,474 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:09,474 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:09,479 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 03:56:09,479 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 03:56:09,484 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:09,485 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:09,486 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:09,487 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:09,489 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:09,491 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:09,493 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:09,494 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:09,496 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:09,531 INFO L134 CoverageAnalysis]: Checked inductivity of 599 backedges. 0 proven. 87 refuted. 0 times theorem prover too weak. 512 trivial. 0 not checked. [2018-01-25 03:56:09,531 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:09,625 INFO L134 CoverageAnalysis]: Checked inductivity of 599 backedges. 0 proven. 87 refuted. 0 times theorem prover too weak. 512 trivial. 0 not checked. [2018-01-25 03:56:09,645 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:09,646 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:09,649 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 03:56:09,649 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 03:56:09,656 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:09,659 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:09,666 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:09,677 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:09,691 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:09,706 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:09,726 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:09,734 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:09,738 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:09,744 INFO L134 CoverageAnalysis]: Checked inductivity of 599 backedges. 0 proven. 87 refuted. 0 times theorem prover too weak. 512 trivial. 0 not checked. [2018-01-25 03:56:09,745 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:09,759 INFO L134 CoverageAnalysis]: Checked inductivity of 599 backedges. 0 proven. 87 refuted. 0 times theorem prover too weak. 512 trivial. 0 not checked. [2018-01-25 03:56:09,760 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:09,760 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 8, 8, 8, 8] total 33 [2018-01-25 03:56:09,760 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:09,761 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-25 03:56:09,761 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-25 03:56:09,761 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=346, Invalid=710, Unknown=0, NotChecked=0, Total=1056 [2018-01-25 03:56:09,761 INFO L87 Difference]: Start difference. First operand 105 states and 106 transitions. Second operand 26 states. [2018-01-25 03:56:10,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:10,056 INFO L93 Difference]: Finished difference Result 204 states and 216 transitions. [2018-01-25 03:56:10,056 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-25 03:56:10,056 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 104 [2018-01-25 03:56:10,057 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:10,057 INFO L225 Difference]: With dead ends: 204 [2018-01-25 03:56:10,058 INFO L226 Difference]: Without dead ends: 170 [2018-01-25 03:56:10,058 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 433 GetRequests, 402 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 385 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=346, Invalid=710, Unknown=0, NotChecked=0, Total=1056 [2018-01-25 03:56:10,058 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 170 states. [2018-01-25 03:56:10,066 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 170 to 114. [2018-01-25 03:56:10,066 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 114 states. [2018-01-25 03:56:10,067 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 114 states to 114 states and 115 transitions. [2018-01-25 03:56:10,067 INFO L78 Accepts]: Start accepts. Automaton has 114 states and 115 transitions. Word has length 104 [2018-01-25 03:56:10,067 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:10,067 INFO L432 AbstractCegarLoop]: Abstraction has 114 states and 115 transitions. [2018-01-25 03:56:10,067 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-25 03:56:10,067 INFO L276 IsEmpty]: Start isEmpty. Operand 114 states and 115 transitions. [2018-01-25 03:56:10,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-01-25 03:56:10,068 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:10,068 INFO L322 BasicCegarLoop]: trace histogram [18, 17, 17, 17, 8, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:10,068 INFO L371 AbstractCegarLoop]: === Iteration 18 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:10,068 INFO L82 PathProgramCache]: Analyzing trace with hash 950262623, now seen corresponding path program 16 times [2018-01-25 03:56:10,068 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:10,069 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:10,069 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 03:56:10,069 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:10,069 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:10,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:10,081 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:10,227 INFO L134 CoverageAnalysis]: Checked inductivity of 697 backedges. 0 proven. 578 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-01-25 03:56:10,227 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:10,227 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:10,227 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:10,227 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:10,228 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:10,228 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:10,232 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 03:56:10,232 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 03:56:10,249 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:10,251 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:10,267 INFO L134 CoverageAnalysis]: Checked inductivity of 697 backedges. 0 proven. 578 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-01-25 03:56:10,267 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:10,623 INFO L134 CoverageAnalysis]: Checked inductivity of 697 backedges. 0 proven. 578 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-01-25 03:56:10,643 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:10,643 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:10,647 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 03:56:10,647 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 03:56:10,689 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:10,694 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:10,711 INFO L134 CoverageAnalysis]: Checked inductivity of 697 backedges. 0 proven. 578 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-01-25 03:56:10,711 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:10,744 INFO L134 CoverageAnalysis]: Checked inductivity of 697 backedges. 0 proven. 578 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-01-25 03:56:10,746 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:10,746 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 38 [2018-01-25 03:56:10,746 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:10,747 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-25 03:56:10,747 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-25 03:56:10,747 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=703, Invalid=703, Unknown=0, NotChecked=0, Total=1406 [2018-01-25 03:56:10,748 INFO L87 Difference]: Start difference. First operand 114 states and 115 transitions. Second operand 20 states. [2018-01-25 03:56:10,997 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:10,997 INFO L93 Difference]: Finished difference Result 218 states and 230 transitions. [2018-01-25 03:56:10,997 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-25 03:56:10,997 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 113 [2018-01-25 03:56:10,997 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:10,998 INFO L225 Difference]: With dead ends: 218 [2018-01-25 03:56:10,998 INFO L226 Difference]: Without dead ends: 179 [2018-01-25 03:56:10,999 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 470 GetRequests, 434 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=703, Invalid=703, Unknown=0, NotChecked=0, Total=1406 [2018-01-25 03:56:11,000 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 179 states. [2018-01-25 03:56:11,008 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 179 to 118. [2018-01-25 03:56:11,009 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 118 states. [2018-01-25 03:56:11,009 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 118 states to 118 states and 119 transitions. [2018-01-25 03:56:11,009 INFO L78 Accepts]: Start accepts. Automaton has 118 states and 119 transitions. Word has length 113 [2018-01-25 03:56:11,009 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:11,009 INFO L432 AbstractCegarLoop]: Abstraction has 118 states and 119 transitions. [2018-01-25 03:56:11,009 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-25 03:56:11,010 INFO L276 IsEmpty]: Start isEmpty. Operand 118 states and 119 transitions. [2018-01-25 03:56:11,010 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2018-01-25 03:56:11,010 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:11,010 INFO L322 BasicCegarLoop]: trace histogram [19, 18, 18, 18, 8, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:11,011 INFO L371 AbstractCegarLoop]: === Iteration 19 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:11,011 INFO L82 PathProgramCache]: Analyzing trace with hash 1664169478, now seen corresponding path program 17 times [2018-01-25 03:56:11,011 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:11,012 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:11,012 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 03:56:11,012 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:11,012 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:11,024 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:11,025 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:11,276 INFO L134 CoverageAnalysis]: Checked inductivity of 767 backedges. 0 proven. 648 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-01-25 03:56:11,277 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:11,277 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:11,277 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:11,277 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:11,277 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:11,277 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:11,282 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 03:56:11,282 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 03:56:11,288 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,293 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,294 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,295 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,296 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,298 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,300 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,302 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,305 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,307 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,311 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,315 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,319 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,324 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,329 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,336 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,343 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,351 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,370 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,371 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:11,374 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:11,391 INFO L134 CoverageAnalysis]: Checked inductivity of 767 backedges. 0 proven. 648 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-01-25 03:56:11,391 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:11,712 INFO L134 CoverageAnalysis]: Checked inductivity of 767 backedges. 0 proven. 648 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-01-25 03:56:11,732 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:11,732 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:11,735 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 03:56:11,735 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 03:56:11,741 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,743 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,747 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,751 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,757 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,763 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,771 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,781 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,792 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,805 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,821 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,840 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,864 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,892 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,924 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:11,964 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:12,013 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:12,071 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:12,405 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:12,424 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:12,429 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:12,440 INFO L134 CoverageAnalysis]: Checked inductivity of 767 backedges. 0 proven. 648 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-01-25 03:56:12,440 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:12,457 INFO L134 CoverageAnalysis]: Checked inductivity of 767 backedges. 0 proven. 648 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-01-25 03:56:12,459 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:12,459 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 40 [2018-01-25 03:56:12,459 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:12,459 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-25 03:56:12,460 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-25 03:56:12,460 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=780, Invalid=780, Unknown=0, NotChecked=0, Total=1560 [2018-01-25 03:56:12,460 INFO L87 Difference]: Start difference. First operand 118 states and 119 transitions. Second operand 21 states. [2018-01-25 03:56:12,587 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:12,587 INFO L93 Difference]: Finished difference Result 227 states and 240 transitions. [2018-01-25 03:56:12,587 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-25 03:56:12,587 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 117 [2018-01-25 03:56:12,588 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:12,588 INFO L225 Difference]: With dead ends: 227 [2018-01-25 03:56:12,588 INFO L226 Difference]: Without dead ends: 188 [2018-01-25 03:56:12,589 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 487 GetRequests, 449 SyntacticMatches, 0 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=780, Invalid=780, Unknown=0, NotChecked=0, Total=1560 [2018-01-25 03:56:12,589 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states. [2018-01-25 03:56:12,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 122. [2018-01-25 03:56:12,601 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-01-25 03:56:12,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 123 transitions. [2018-01-25 03:56:12,602 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 123 transitions. Word has length 117 [2018-01-25 03:56:12,602 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:12,603 INFO L432 AbstractCegarLoop]: Abstraction has 122 states and 123 transitions. [2018-01-25 03:56:12,603 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-25 03:56:12,603 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 123 transitions. [2018-01-25 03:56:12,603 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 122 [2018-01-25 03:56:12,603 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:12,603 INFO L322 BasicCegarLoop]: trace histogram [20, 19, 19, 19, 8, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:12,604 INFO L371 AbstractCegarLoop]: === Iteration 20 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:12,604 INFO L82 PathProgramCache]: Analyzing trace with hash 2092098861, now seen corresponding path program 18 times [2018-01-25 03:56:12,604 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:12,604 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:12,604 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 03:56:12,604 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:12,604 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:12,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:12,613 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:12,835 INFO L134 CoverageAnalysis]: Checked inductivity of 841 backedges. 0 proven. 722 refuted. 0 times theorem prover too weak. 119 trivial. 0 not checked. [2018-01-25 03:56:12,835 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:12,835 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:12,835 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:12,835 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:12,835 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:12,835 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:12,840 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 03:56:12,841 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 03:56:12,847 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:12,849 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:12,850 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:12,851 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:12,852 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:12,853 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:12,854 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:12,856 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:12,857 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:12,859 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:12,861 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:12,863 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:12,865 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:12,867 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:12,870 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:12,871 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:12,873 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:12,928 INFO L134 CoverageAnalysis]: Checked inductivity of 841 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 722 trivial. 0 not checked. [2018-01-25 03:56:12,928 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:13,045 INFO L134 CoverageAnalysis]: Checked inductivity of 841 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 722 trivial. 0 not checked. [2018-01-25 03:56:13,065 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:13,065 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:13,068 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 03:56:13,068 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 03:56:13,075 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:13,077 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:13,081 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:13,087 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:13,093 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:13,103 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:13,114 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:13,131 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:13,146 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:13,168 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:13,195 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:13,230 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:13,271 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:13,345 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:13,403 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:13,415 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:13,420 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:13,428 INFO L134 CoverageAnalysis]: Checked inductivity of 841 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 722 trivial. 0 not checked. [2018-01-25 03:56:13,428 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:13,450 INFO L134 CoverageAnalysis]: Checked inductivity of 841 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 722 trivial. 0 not checked. [2018-01-25 03:56:13,452 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:13,452 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 9, 9, 9, 9] total 38 [2018-01-25 03:56:13,452 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:13,453 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-25 03:56:13,453 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-25 03:56:13,453 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=459, Invalid=947, Unknown=0, NotChecked=0, Total=1406 [2018-01-25 03:56:13,453 INFO L87 Difference]: Start difference. First operand 122 states and 123 transitions. Second operand 30 states. [2018-01-25 03:56:13,813 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:13,813 INFO L93 Difference]: Finished difference Result 236 states and 250 transitions. [2018-01-25 03:56:13,813 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-25 03:56:13,813 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 121 [2018-01-25 03:56:13,814 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:13,815 INFO L225 Difference]: With dead ends: 236 [2018-01-25 03:56:13,815 INFO L226 Difference]: Without dead ends: 197 [2018-01-25 03:56:13,816 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 504 GetRequests, 468 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 520 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=459, Invalid=947, Unknown=0, NotChecked=0, Total=1406 [2018-01-25 03:56:13,816 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2018-01-25 03:56:13,832 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 131. [2018-01-25 03:56:13,832 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 131 states. [2018-01-25 03:56:13,832 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 131 states to 131 states and 132 transitions. [2018-01-25 03:56:13,832 INFO L78 Accepts]: Start accepts. Automaton has 131 states and 132 transitions. Word has length 121 [2018-01-25 03:56:13,833 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:13,833 INFO L432 AbstractCegarLoop]: Abstraction has 131 states and 132 transitions. [2018-01-25 03:56:13,833 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-25 03:56:13,833 INFO L276 IsEmpty]: Start isEmpty. Operand 131 states and 132 transitions. [2018-01-25 03:56:13,833 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 131 [2018-01-25 03:56:13,833 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:13,834 INFO L322 BasicCegarLoop]: trace histogram [21, 20, 20, 20, 9, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:13,834 INFO L371 AbstractCegarLoop]: === Iteration 21 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:13,834 INFO L82 PathProgramCache]: Analyzing trace with hash 734718894, now seen corresponding path program 19 times [2018-01-25 03:56:13,834 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:13,835 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:13,835 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 03:56:13,835 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:13,835 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:13,848 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:13,849 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:14,096 INFO L134 CoverageAnalysis]: Checked inductivity of 956 backedges. 0 proven. 800 refuted. 0 times theorem prover too weak. 156 trivial. 0 not checked. [2018-01-25 03:56:14,096 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:14,096 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:14,096 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:14,096 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:14,096 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:14,096 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:14,101 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 03:56:14,101 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 03:56:14,119 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:14,121 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:14,135 INFO L134 CoverageAnalysis]: Checked inductivity of 956 backedges. 0 proven. 800 refuted. 0 times theorem prover too weak. 156 trivial. 0 not checked. [2018-01-25 03:56:14,135 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:14,546 INFO L134 CoverageAnalysis]: Checked inductivity of 956 backedges. 0 proven. 800 refuted. 0 times theorem prover too weak. 156 trivial. 0 not checked. [2018-01-25 03:56:14,565 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:14,565 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:14,568 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 03:56:14,568 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 03:56:14,602 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:14,606 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:14,623 INFO L134 CoverageAnalysis]: Checked inductivity of 956 backedges. 0 proven. 800 refuted. 0 times theorem prover too weak. 156 trivial. 0 not checked. [2018-01-25 03:56:14,623 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:14,645 INFO L134 CoverageAnalysis]: Checked inductivity of 956 backedges. 0 proven. 800 refuted. 0 times theorem prover too weak. 156 trivial. 0 not checked. [2018-01-25 03:56:14,646 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:14,646 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 44 [2018-01-25 03:56:14,646 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:14,646 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-25 03:56:14,647 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-25 03:56:14,647 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=946, Invalid=946, Unknown=0, NotChecked=0, Total=1892 [2018-01-25 03:56:14,647 INFO L87 Difference]: Start difference. First operand 131 states and 132 transitions. Second operand 23 states. [2018-01-25 03:56:14,948 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:14,948 INFO L93 Difference]: Finished difference Result 250 states and 264 transitions. [2018-01-25 03:56:14,949 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-25 03:56:14,949 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 130 [2018-01-25 03:56:14,949 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:14,950 INFO L225 Difference]: With dead ends: 250 [2018-01-25 03:56:14,950 INFO L226 Difference]: Without dead ends: 206 [2018-01-25 03:56:14,951 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 541 GetRequests, 499 SyntacticMatches, 0 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=946, Invalid=946, Unknown=0, NotChecked=0, Total=1892 [2018-01-25 03:56:14,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 206 states. [2018-01-25 03:56:14,968 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 206 to 135. [2018-01-25 03:56:14,969 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 135 states. [2018-01-25 03:56:14,970 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 135 states to 135 states and 136 transitions. [2018-01-25 03:56:14,970 INFO L78 Accepts]: Start accepts. Automaton has 135 states and 136 transitions. Word has length 130 [2018-01-25 03:56:14,970 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:14,970 INFO L432 AbstractCegarLoop]: Abstraction has 135 states and 136 transitions. [2018-01-25 03:56:14,970 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-25 03:56:14,970 INFO L276 IsEmpty]: Start isEmpty. Operand 135 states and 136 transitions. [2018-01-25 03:56:14,971 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 135 [2018-01-25 03:56:14,971 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:14,971 INFO L322 BasicCegarLoop]: trace histogram [22, 21, 21, 21, 9, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:14,971 INFO L371 AbstractCegarLoop]: === Iteration 22 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:14,972 INFO L82 PathProgramCache]: Analyzing trace with hash 1367823335, now seen corresponding path program 20 times [2018-01-25 03:56:14,972 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:14,972 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:14,973 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 03:56:14,973 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:14,973 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:14,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:14,988 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:15,318 INFO L134 CoverageAnalysis]: Checked inductivity of 1038 backedges. 0 proven. 882 refuted. 0 times theorem prover too weak. 156 trivial. 0 not checked. [2018-01-25 03:56:15,318 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:15,318 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:15,318 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:15,318 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:15,318 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:15,318 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:15,323 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 03:56:15,323 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 03:56:15,330 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:15,340 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:15,342 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:15,344 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:15,358 INFO L134 CoverageAnalysis]: Checked inductivity of 1038 backedges. 0 proven. 882 refuted. 0 times theorem prover too weak. 156 trivial. 0 not checked. [2018-01-25 03:56:15,358 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:15,813 INFO L134 CoverageAnalysis]: Checked inductivity of 1038 backedges. 0 proven. 882 refuted. 0 times theorem prover too weak. 156 trivial. 0 not checked. [2018-01-25 03:56:15,834 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:15,835 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:15,838 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 03:56:15,838 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 03:56:15,846 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:15,867 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:15,882 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:15,888 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:15,911 INFO L134 CoverageAnalysis]: Checked inductivity of 1038 backedges. 0 proven. 882 refuted. 0 times theorem prover too weak. 156 trivial. 0 not checked. [2018-01-25 03:56:15,911 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:15,944 INFO L134 CoverageAnalysis]: Checked inductivity of 1038 backedges. 0 proven. 882 refuted. 0 times theorem prover too weak. 156 trivial. 0 not checked. [2018-01-25 03:56:15,946 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:15,946 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 46 [2018-01-25 03:56:15,946 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:15,946 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-25 03:56:15,947 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-25 03:56:15,947 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1035, Invalid=1035, Unknown=0, NotChecked=0, Total=2070 [2018-01-25 03:56:15,947 INFO L87 Difference]: Start difference. First operand 135 states and 136 transitions. Second operand 24 states. [2018-01-25 03:56:16,254 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:16,255 INFO L93 Difference]: Finished difference Result 259 states and 274 transitions. [2018-01-25 03:56:16,255 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-25 03:56:16,255 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 134 [2018-01-25 03:56:16,255 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:16,256 INFO L225 Difference]: With dead ends: 259 [2018-01-25 03:56:16,257 INFO L226 Difference]: Without dead ends: 215 [2018-01-25 03:56:16,257 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 558 GetRequests, 514 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1035, Invalid=1035, Unknown=0, NotChecked=0, Total=2070 [2018-01-25 03:56:16,258 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 215 states. [2018-01-25 03:56:16,268 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 215 to 139. [2018-01-25 03:56:16,268 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 139 states. [2018-01-25 03:56:16,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 139 states to 139 states and 140 transitions. [2018-01-25 03:56:16,269 INFO L78 Accepts]: Start accepts. Automaton has 139 states and 140 transitions. Word has length 134 [2018-01-25 03:56:16,269 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:16,269 INFO L432 AbstractCegarLoop]: Abstraction has 139 states and 140 transitions. [2018-01-25 03:56:16,269 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-25 03:56:16,269 INFO L276 IsEmpty]: Start isEmpty. Operand 139 states and 140 transitions. [2018-01-25 03:56:16,270 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2018-01-25 03:56:16,270 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:16,270 INFO L322 BasicCegarLoop]: trace histogram [23, 22, 22, 22, 9, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:16,270 INFO L371 AbstractCegarLoop]: === Iteration 23 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:16,270 INFO L82 PathProgramCache]: Analyzing trace with hash -168626272, now seen corresponding path program 21 times [2018-01-25 03:56:16,270 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:16,271 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:16,271 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 03:56:16,271 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:16,271 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:16,280 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:16,281 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:16,823 INFO L134 CoverageAnalysis]: Checked inductivity of 1124 backedges. 0 proven. 968 refuted. 0 times theorem prover too weak. 156 trivial. 0 not checked. [2018-01-25 03:56:16,823 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:16,823 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:16,823 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:16,823 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:16,823 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:16,823 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:16,828 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 03:56:16,829 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 03:56:16,836 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:16,837 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:16,839 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:16,841 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:16,843 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:16,845 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:16,849 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:16,853 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:16,858 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:16,859 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:16,862 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:16,926 INFO L134 CoverageAnalysis]: Checked inductivity of 1124 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 968 trivial. 0 not checked. [2018-01-25 03:56:16,926 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:17,107 INFO L134 CoverageAnalysis]: Checked inductivity of 1124 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 968 trivial. 0 not checked. [2018-01-25 03:56:17,127 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:17,128 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:17,131 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 03:56:17,131 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 03:56:17,141 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:17,144 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:17,152 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:17,163 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:17,176 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:17,196 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:17,222 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:17,247 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:17,281 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:17,290 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:17,294 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:17,309 INFO L134 CoverageAnalysis]: Checked inductivity of 1124 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 968 trivial. 0 not checked. [2018-01-25 03:56:17,310 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:17,332 INFO L134 CoverageAnalysis]: Checked inductivity of 1124 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 968 trivial. 0 not checked. [2018-01-25 03:56:17,333 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:17,333 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 10, 10, 10, 10] total 43 [2018-01-25 03:56:17,334 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:17,334 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-01-25 03:56:17,334 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-01-25 03:56:17,335 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=588, Invalid=1218, Unknown=0, NotChecked=0, Total=1806 [2018-01-25 03:56:17,335 INFO L87 Difference]: Start difference. First operand 139 states and 140 transitions. Second operand 34 states. [2018-01-25 03:56:17,900 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:17,900 INFO L93 Difference]: Finished difference Result 268 states and 284 transitions. [2018-01-25 03:56:17,900 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-25 03:56:17,900 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 138 [2018-01-25 03:56:17,901 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:17,902 INFO L225 Difference]: With dead ends: 268 [2018-01-25 03:56:17,902 INFO L226 Difference]: Without dead ends: 224 [2018-01-25 03:56:17,902 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 575 GetRequests, 534 SyntacticMatches, 0 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 675 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=588, Invalid=1218, Unknown=0, NotChecked=0, Total=1806 [2018-01-25 03:56:17,903 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 224 states. [2018-01-25 03:56:17,927 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 224 to 148. [2018-01-25 03:56:17,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-01-25 03:56:17,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 149 transitions. [2018-01-25 03:56:17,929 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 149 transitions. Word has length 138 [2018-01-25 03:56:17,929 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:17,929 INFO L432 AbstractCegarLoop]: Abstraction has 148 states and 149 transitions. [2018-01-25 03:56:17,929 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-01-25 03:56:17,929 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 149 transitions. [2018-01-25 03:56:17,930 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2018-01-25 03:56:17,930 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:17,931 INFO L322 BasicCegarLoop]: trace histogram [24, 23, 23, 23, 10, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:17,931 INFO L371 AbstractCegarLoop]: === Iteration 24 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:17,931 INFO L82 PathProgramCache]: Analyzing trace with hash -219252535, now seen corresponding path program 22 times [2018-01-25 03:56:17,931 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:17,932 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:17,932 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 03:56:17,932 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:17,932 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:17,946 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:17,947 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:18,240 INFO L134 CoverageAnalysis]: Checked inductivity of 1256 backedges. 0 proven. 1058 refuted. 0 times theorem prover too weak. 198 trivial. 0 not checked. [2018-01-25 03:56:18,240 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:18,259 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:18,260 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:18,260 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:18,260 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:18,260 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:18,265 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 03:56:18,265 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 03:56:18,285 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:18,287 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:18,310 INFO L134 CoverageAnalysis]: Checked inductivity of 1256 backedges. 0 proven. 1058 refuted. 0 times theorem prover too weak. 198 trivial. 0 not checked. [2018-01-25 03:56:18,311 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:18,781 INFO L134 CoverageAnalysis]: Checked inductivity of 1256 backedges. 0 proven. 1058 refuted. 0 times theorem prover too weak. 198 trivial. 0 not checked. [2018-01-25 03:56:18,802 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:18,802 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:18,805 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 03:56:18,805 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 03:56:18,853 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:18,857 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:18,873 INFO L134 CoverageAnalysis]: Checked inductivity of 1256 backedges. 0 proven. 1058 refuted. 0 times theorem prover too weak. 198 trivial. 0 not checked. [2018-01-25 03:56:18,873 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:18,891 INFO L134 CoverageAnalysis]: Checked inductivity of 1256 backedges. 0 proven. 1058 refuted. 0 times theorem prover too weak. 198 trivial. 0 not checked. [2018-01-25 03:56:18,892 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:18,892 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 50 [2018-01-25 03:56:18,892 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:18,893 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-25 03:56:18,893 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-25 03:56:18,893 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1225, Invalid=1225, Unknown=0, NotChecked=0, Total=2450 [2018-01-25 03:56:18,893 INFO L87 Difference]: Start difference. First operand 148 states and 149 transitions. Second operand 26 states. [2018-01-25 03:56:19,457 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:19,458 INFO L93 Difference]: Finished difference Result 282 states and 298 transitions. [2018-01-25 03:56:19,458 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-25 03:56:19,458 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 147 [2018-01-25 03:56:19,458 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:19,459 INFO L225 Difference]: With dead ends: 282 [2018-01-25 03:56:19,459 INFO L226 Difference]: Without dead ends: 233 [2018-01-25 03:56:19,460 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 612 GetRequests, 564 SyntacticMatches, 0 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1225, Invalid=1225, Unknown=0, NotChecked=0, Total=2450 [2018-01-25 03:56:19,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 233 states. [2018-01-25 03:56:19,475 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 233 to 152. [2018-01-25 03:56:19,475 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 152 states. [2018-01-25 03:56:19,476 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 152 states to 152 states and 153 transitions. [2018-01-25 03:56:19,476 INFO L78 Accepts]: Start accepts. Automaton has 152 states and 153 transitions. Word has length 147 [2018-01-25 03:56:19,477 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:19,477 INFO L432 AbstractCegarLoop]: Abstraction has 152 states and 153 transitions. [2018-01-25 03:56:19,477 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-25 03:56:19,477 INFO L276 IsEmpty]: Start isEmpty. Operand 152 states and 153 transitions. [2018-01-25 03:56:19,477 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2018-01-25 03:56:19,477 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:19,477 INFO L322 BasicCegarLoop]: trace histogram [25, 24, 24, 24, 10, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:19,478 INFO L371 AbstractCegarLoop]: === Iteration 25 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:19,478 INFO L82 PathProgramCache]: Analyzing trace with hash -2062915152, now seen corresponding path program 23 times [2018-01-25 03:56:19,478 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:19,478 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:19,478 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 03:56:19,478 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:19,479 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:19,488 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:19,489 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:19,962 INFO L134 CoverageAnalysis]: Checked inductivity of 1350 backedges. 0 proven. 1152 refuted. 0 times theorem prover too weak. 198 trivial. 0 not checked. [2018-01-25 03:56:19,962 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:19,962 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:19,962 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:19,962 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:19,963 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:19,963 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:19,970 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 03:56:19,970 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 03:56:19,977 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:19,979 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:19,980 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:19,982 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:19,985 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:19,987 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:19,988 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:19,990 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:19,994 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:19,996 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:19,998 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,000 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,003 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,006 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,009 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,014 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,019 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,024 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,030 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,037 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,046 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,057 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,070 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,084 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,103 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,104 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:20,107 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:20,124 INFO L134 CoverageAnalysis]: Checked inductivity of 1350 backedges. 0 proven. 1152 refuted. 0 times theorem prover too weak. 198 trivial. 0 not checked. [2018-01-25 03:56:20,125 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:20,638 INFO L134 CoverageAnalysis]: Checked inductivity of 1350 backedges. 0 proven. 1152 refuted. 0 times theorem prover too weak. 198 trivial. 0 not checked. [2018-01-25 03:56:20,659 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:20,659 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:20,662 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 03:56:20,662 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 03:56:20,670 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,672 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,676 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,681 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,687 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,693 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,701 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,710 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,722 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,735 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,751 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,768 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,790 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,814 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,843 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,876 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,913 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:20,957 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:21,010 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:21,072 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:21,146 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:21,229 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:21,334 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:21,454 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:22,402 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:22,443 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:22,449 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:22,466 INFO L134 CoverageAnalysis]: Checked inductivity of 1350 backedges. 0 proven. 1152 refuted. 0 times theorem prover too weak. 198 trivial. 0 not checked. [2018-01-25 03:56:22,466 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:22,495 INFO L134 CoverageAnalysis]: Checked inductivity of 1350 backedges. 0 proven. 1152 refuted. 0 times theorem prover too weak. 198 trivial. 0 not checked. [2018-01-25 03:56:22,497 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:22,497 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 52 [2018-01-25 03:56:22,497 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:22,497 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-25 03:56:22,498 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-25 03:56:22,498 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-01-25 03:56:22,498 INFO L87 Difference]: Start difference. First operand 152 states and 153 transitions. Second operand 27 states. [2018-01-25 03:56:22,706 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:22,706 INFO L93 Difference]: Finished difference Result 291 states and 308 transitions. [2018-01-25 03:56:22,706 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-25 03:56:22,706 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 151 [2018-01-25 03:56:22,707 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:22,708 INFO L225 Difference]: With dead ends: 291 [2018-01-25 03:56:22,708 INFO L226 Difference]: Without dead ends: 242 [2018-01-25 03:56:22,709 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 629 GetRequests, 579 SyntacticMatches, 0 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-01-25 03:56:22,709 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 242 states. [2018-01-25 03:56:22,734 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 242 to 156. [2018-01-25 03:56:22,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 156 states. [2018-01-25 03:56:22,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 156 states to 156 states and 157 transitions. [2018-01-25 03:56:22,735 INFO L78 Accepts]: Start accepts. Automaton has 156 states and 157 transitions. Word has length 151 [2018-01-25 03:56:22,736 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:22,736 INFO L432 AbstractCegarLoop]: Abstraction has 156 states and 157 transitions. [2018-01-25 03:56:22,736 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-25 03:56:22,736 INFO L276 IsEmpty]: Start isEmpty. Operand 156 states and 157 transitions. [2018-01-25 03:56:22,736 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-01-25 03:56:22,736 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:22,736 INFO L322 BasicCegarLoop]: trace histogram [26, 25, 25, 25, 10, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:22,736 INFO L371 AbstractCegarLoop]: === Iteration 26 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:22,737 INFO L82 PathProgramCache]: Analyzing trace with hash -731541737, now seen corresponding path program 24 times [2018-01-25 03:56:22,737 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:22,737 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:22,737 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 03:56:22,737 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:22,737 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:22,750 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:22,751 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:23,439 INFO L134 CoverageAnalysis]: Checked inductivity of 1448 backedges. 0 proven. 1250 refuted. 0 times theorem prover too weak. 198 trivial. 0 not checked. [2018-01-25 03:56:23,453 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:23,454 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:23,454 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:23,454 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:23,454 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:23,454 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:23,460 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 03:56:23,460 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 03:56:23,467 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:23,478 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:23,487 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:23,493 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:23,494 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:23,496 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:23,498 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:23,499 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:23,501 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:23,503 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:23,506 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:23,508 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:23,511 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:23,514 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:23,517 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:23,520 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:23,524 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:23,528 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:23,532 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:23,534 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:23,537 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:23,603 INFO L134 CoverageAnalysis]: Checked inductivity of 1448 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 1250 trivial. 0 not checked. [2018-01-25 03:56:23,603 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:23,794 INFO L134 CoverageAnalysis]: Checked inductivity of 1448 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 1250 trivial. 0 not checked. [2018-01-25 03:56:23,814 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:23,814 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:23,817 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 03:56:23,818 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 03:56:23,825 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:23,827 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:23,831 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:23,836 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:23,843 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:23,853 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:23,864 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:23,877 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:23,893 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:23,928 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:23,955 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:24,000 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:24,041 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:24,113 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:24,174 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:24,451 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:24,812 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:25,262 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:25,915 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:25,945 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:25,950 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:25,968 INFO L134 CoverageAnalysis]: Checked inductivity of 1448 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 1250 trivial. 0 not checked. [2018-01-25 03:56:25,968 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:25,999 INFO L134 CoverageAnalysis]: Checked inductivity of 1448 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 1250 trivial. 0 not checked. [2018-01-25 03:56:26,001 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:26,001 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 11, 11, 11, 11] total 48 [2018-01-25 03:56:26,001 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:26,001 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-25 03:56:26,002 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-25 03:56:26,002 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=733, Invalid=1523, Unknown=0, NotChecked=0, Total=2256 [2018-01-25 03:56:26,002 INFO L87 Difference]: Start difference. First operand 156 states and 157 transitions. Second operand 38 states. [2018-01-25 03:56:26,507 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:26,507 INFO L93 Difference]: Finished difference Result 300 states and 318 transitions. [2018-01-25 03:56:26,507 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-25 03:56:26,507 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 155 [2018-01-25 03:56:26,507 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:26,508 INFO L225 Difference]: With dead ends: 300 [2018-01-25 03:56:26,508 INFO L226 Difference]: Without dead ends: 251 [2018-01-25 03:56:26,509 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 646 GetRequests, 600 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 850 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=733, Invalid=1523, Unknown=0, NotChecked=0, Total=2256 [2018-01-25 03:56:26,509 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 251 states. [2018-01-25 03:56:26,528 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 251 to 165. [2018-01-25 03:56:26,528 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-01-25 03:56:26,529 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 166 transitions. [2018-01-25 03:56:26,529 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 166 transitions. Word has length 155 [2018-01-25 03:56:26,529 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:26,529 INFO L432 AbstractCegarLoop]: Abstraction has 165 states and 166 transitions. [2018-01-25 03:56:26,529 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-25 03:56:26,529 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 166 transitions. [2018-01-25 03:56:26,530 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 165 [2018-01-25 03:56:26,530 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:26,530 INFO L322 BasicCegarLoop]: trace histogram [27, 26, 26, 26, 11, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:26,530 INFO L371 AbstractCegarLoop]: === Iteration 27 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:26,530 INFO L82 PathProgramCache]: Analyzing trace with hash 7304644, now seen corresponding path program 25 times [2018-01-25 03:56:26,530 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:26,531 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:26,531 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 03:56:26,531 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:26,531 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:26,542 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:26,543 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:27,504 INFO L134 CoverageAnalysis]: Checked inductivity of 1597 backedges. 0 proven. 1352 refuted. 0 times theorem prover too weak. 245 trivial. 0 not checked. [2018-01-25 03:56:27,505 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:27,505 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:27,505 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:27,505 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:27,505 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:27,505 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:27,512 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 03:56:27,512 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 03:56:27,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:27,537 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:27,554 INFO L134 CoverageAnalysis]: Checked inductivity of 1597 backedges. 0 proven. 1352 refuted. 0 times theorem prover too weak. 245 trivial. 0 not checked. [2018-01-25 03:56:27,555 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:28,439 INFO L134 CoverageAnalysis]: Checked inductivity of 1597 backedges. 0 proven. 1352 refuted. 0 times theorem prover too weak. 245 trivial. 0 not checked. [2018-01-25 03:56:28,473 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:28,482 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:28,485 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 03:56:28,486 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 03:56:28,534 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:28,539 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:28,569 INFO L134 CoverageAnalysis]: Checked inductivity of 1597 backedges. 0 proven. 1352 refuted. 0 times theorem prover too weak. 245 trivial. 0 not checked. [2018-01-25 03:56:28,569 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:28,608 INFO L134 CoverageAnalysis]: Checked inductivity of 1597 backedges. 0 proven. 1352 refuted. 0 times theorem prover too weak. 245 trivial. 0 not checked. [2018-01-25 03:56:28,609 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:28,609 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29, 29, 29, 29] total 56 [2018-01-25 03:56:28,610 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:28,610 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-25 03:56:28,610 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-25 03:56:28,611 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1540, Invalid=1540, Unknown=0, NotChecked=0, Total=3080 [2018-01-25 03:56:28,611 INFO L87 Difference]: Start difference. First operand 165 states and 166 transitions. Second operand 29 states. [2018-01-25 03:56:28,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:28,999 INFO L93 Difference]: Finished difference Result 314 states and 332 transitions. [2018-01-25 03:56:28,999 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-25 03:56:28,999 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 164 [2018-01-25 03:56:28,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:29,000 INFO L225 Difference]: With dead ends: 314 [2018-01-25 03:56:29,000 INFO L226 Difference]: Without dead ends: 260 [2018-01-25 03:56:29,001 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 683 GetRequests, 629 SyntacticMatches, 0 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.6s TimeCoverageRelationStatistics Valid=1540, Invalid=1540, Unknown=0, NotChecked=0, Total=3080 [2018-01-25 03:56:29,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 260 states. [2018-01-25 03:56:29,020 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 260 to 169. [2018-01-25 03:56:29,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-01-25 03:56:29,021 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 170 transitions. [2018-01-25 03:56:29,022 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 170 transitions. Word has length 164 [2018-01-25 03:56:29,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:29,022 INFO L432 AbstractCegarLoop]: Abstraction has 169 states and 170 transitions. [2018-01-25 03:56:29,022 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-25 03:56:29,022 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 170 transitions. [2018-01-25 03:56:29,022 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 169 [2018-01-25 03:56:29,022 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:29,023 INFO L322 BasicCegarLoop]: trace histogram [28, 27, 27, 27, 11, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:29,023 INFO L371 AbstractCegarLoop]: === Iteration 28 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:29,023 INFO L82 PathProgramCache]: Analyzing trace with hash -1420521539, now seen corresponding path program 26 times [2018-01-25 03:56:29,023 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:29,023 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:29,023 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 03:56:29,024 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:29,024 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:29,036 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:29,037 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:29,684 INFO L134 CoverageAnalysis]: Checked inductivity of 1703 backedges. 0 proven. 1458 refuted. 0 times theorem prover too weak. 245 trivial. 0 not checked. [2018-01-25 03:56:29,684 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:29,685 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:29,685 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:29,685 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:29,685 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:29,685 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:29,693 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 03:56:29,694 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 03:56:29,701 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:29,716 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:29,720 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:29,723 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:29,743 INFO L134 CoverageAnalysis]: Checked inductivity of 1703 backedges. 0 proven. 1458 refuted. 0 times theorem prover too weak. 245 trivial. 0 not checked. [2018-01-25 03:56:29,743 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:30,388 INFO L134 CoverageAnalysis]: Checked inductivity of 1703 backedges. 0 proven. 1458 refuted. 0 times theorem prover too weak. 245 trivial. 0 not checked. [2018-01-25 03:56:30,407 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:30,407 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:30,410 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 03:56:30,410 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 03:56:30,418 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:30,441 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:30,459 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:30,463 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:30,486 INFO L134 CoverageAnalysis]: Checked inductivity of 1703 backedges. 0 proven. 1458 refuted. 0 times theorem prover too weak. 245 trivial. 0 not checked. [2018-01-25 03:56:30,487 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:30,516 INFO L134 CoverageAnalysis]: Checked inductivity of 1703 backedges. 0 proven. 1458 refuted. 0 times theorem prover too weak. 245 trivial. 0 not checked. [2018-01-25 03:56:30,517 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:30,518 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30, 30, 30, 30] total 58 [2018-01-25 03:56:30,518 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:30,518 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-25 03:56:30,518 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-25 03:56:30,519 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1653, Invalid=1653, Unknown=0, NotChecked=0, Total=3306 [2018-01-25 03:56:30,519 INFO L87 Difference]: Start difference. First operand 169 states and 170 transitions. Second operand 30 states. [2018-01-25 03:56:30,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:30,830 INFO L93 Difference]: Finished difference Result 323 states and 342 transitions. [2018-01-25 03:56:30,830 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-01-25 03:56:30,830 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 168 [2018-01-25 03:56:30,831 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:30,832 INFO L225 Difference]: With dead ends: 323 [2018-01-25 03:56:30,832 INFO L226 Difference]: Without dead ends: 269 [2018-01-25 03:56:30,832 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 700 GetRequests, 644 SyntacticMatches, 0 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=1653, Invalid=1653, Unknown=0, NotChecked=0, Total=3306 [2018-01-25 03:56:30,833 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 269 states. [2018-01-25 03:56:30,867 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 269 to 173. [2018-01-25 03:56:30,867 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-01-25 03:56:30,868 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 174 transitions. [2018-01-25 03:56:30,868 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 174 transitions. Word has length 168 [2018-01-25 03:56:30,869 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:30,869 INFO L432 AbstractCegarLoop]: Abstraction has 173 states and 174 transitions. [2018-01-25 03:56:30,869 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-25 03:56:30,869 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 174 transitions. [2018-01-25 03:56:30,870 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 173 [2018-01-25 03:56:30,870 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:30,870 INFO L322 BasicCegarLoop]: trace histogram [29, 28, 28, 28, 11, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:30,870 INFO L371 AbstractCegarLoop]: === Iteration 29 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:30,870 INFO L82 PathProgramCache]: Analyzing trace with hash -910555850, now seen corresponding path program 27 times [2018-01-25 03:56:30,870 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:30,871 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:30,871 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 03:56:30,871 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:30,871 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:30,884 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:30,885 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:31,360 INFO L134 CoverageAnalysis]: Checked inductivity of 1813 backedges. 0 proven. 1568 refuted. 0 times theorem prover too weak. 245 trivial. 0 not checked. [2018-01-25 03:56:31,360 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:31,361 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:31,361 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:31,361 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:31,361 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:31,361 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:31,366 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 03:56:31,366 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 03:56:31,372 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:31,374 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:31,375 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:31,377 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:31,378 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:31,381 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:31,383 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:31,386 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:31,389 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:31,393 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:31,398 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:31,399 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:31,402 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:31,473 INFO L134 CoverageAnalysis]: Checked inductivity of 1813 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 1568 trivial. 0 not checked. [2018-01-25 03:56:31,473 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:31,677 INFO L134 CoverageAnalysis]: Checked inductivity of 1813 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 1568 trivial. 0 not checked. [2018-01-25 03:56:31,697 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:31,697 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:31,700 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 03:56:31,700 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 03:56:31,708 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:31,710 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:31,716 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:31,723 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:31,732 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:31,746 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:31,765 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:31,792 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:31,829 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:31,874 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:31,938 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 03:56:31,950 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:31,955 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:31,977 INFO L134 CoverageAnalysis]: Checked inductivity of 1813 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 1568 trivial. 0 not checked. [2018-01-25 03:56:31,977 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:32,014 INFO L134 CoverageAnalysis]: Checked inductivity of 1813 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 1568 trivial. 0 not checked. [2018-01-25 03:56:32,016 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:32,016 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 12, 12, 12, 12] total 53 [2018-01-25 03:56:32,016 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:32,016 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-01-25 03:56:32,016 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-01-25 03:56:32,017 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=894, Invalid=1862, Unknown=0, NotChecked=0, Total=2756 [2018-01-25 03:56:32,017 INFO L87 Difference]: Start difference. First operand 173 states and 174 transitions. Second operand 42 states. [2018-01-25 03:56:32,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:32,465 INFO L93 Difference]: Finished difference Result 332 states and 352 transitions. [2018-01-25 03:56:32,465 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-25 03:56:32,465 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 172 [2018-01-25 03:56:32,465 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:32,466 INFO L225 Difference]: With dead ends: 332 [2018-01-25 03:56:32,466 INFO L226 Difference]: Without dead ends: 278 [2018-01-25 03:56:32,466 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 717 GetRequests, 666 SyntacticMatches, 0 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1045 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=894, Invalid=1862, Unknown=0, NotChecked=0, Total=2756 [2018-01-25 03:56:32,467 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 278 states. [2018-01-25 03:56:32,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 278 to 182. [2018-01-25 03:56:32,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-01-25 03:56:32,492 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 183 transitions. [2018-01-25 03:56:32,493 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 183 transitions. Word has length 172 [2018-01-25 03:56:32,493 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:32,493 INFO L432 AbstractCegarLoop]: Abstraction has 182 states and 183 transitions. [2018-01-25 03:56:32,493 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-01-25 03:56:32,493 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 183 transitions. [2018-01-25 03:56:32,493 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 182 [2018-01-25 03:56:32,494 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:32,494 INFO L322 BasicCegarLoop]: trace histogram [30, 29, 29, 29, 12, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:32,494 INFO L371 AbstractCegarLoop]: === Iteration 30 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:32,494 INFO L82 PathProgramCache]: Analyzing trace with hash 1830068019, now seen corresponding path program 28 times [2018-01-25 03:56:32,494 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:32,494 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:32,495 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 03:56:32,495 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:32,495 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:32,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:32,508 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:32,928 INFO L134 CoverageAnalysis]: Checked inductivity of 1979 backedges. 0 proven. 1682 refuted. 0 times theorem prover too weak. 297 trivial. 0 not checked. [2018-01-25 03:56:32,928 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:32,928 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:32,928 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:32,928 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:32,928 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:32,928 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:32,933 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 03:56:32,933 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 03:56:32,957 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:32,960 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:32,994 INFO L134 CoverageAnalysis]: Checked inductivity of 1979 backedges. 0 proven. 1682 refuted. 0 times theorem prover too weak. 297 trivial. 0 not checked. [2018-01-25 03:56:32,994 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:33,760 INFO L134 CoverageAnalysis]: Checked inductivity of 1979 backedges. 0 proven. 1682 refuted. 0 times theorem prover too weak. 297 trivial. 0 not checked. [2018-01-25 03:56:33,781 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:33,781 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:33,784 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 03:56:33,784 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 03:56:33,847 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:33,853 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:33,888 INFO L134 CoverageAnalysis]: Checked inductivity of 1979 backedges. 0 proven. 1682 refuted. 0 times theorem prover too weak. 297 trivial. 0 not checked. [2018-01-25 03:56:33,888 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:33,932 INFO L134 CoverageAnalysis]: Checked inductivity of 1979 backedges. 0 proven. 1682 refuted. 0 times theorem prover too weak. 297 trivial. 0 not checked. [2018-01-25 03:56:33,934 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:33,934 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32, 32, 32, 32] total 62 [2018-01-25 03:56:33,934 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:33,935 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-25 03:56:33,935 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-25 03:56:33,935 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1891, Invalid=1891, Unknown=0, NotChecked=0, Total=3782 [2018-01-25 03:56:33,935 INFO L87 Difference]: Start difference. First operand 182 states and 183 transitions. Second operand 32 states. [2018-01-25 03:56:34,492 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:34,492 INFO L93 Difference]: Finished difference Result 346 states and 366 transitions. [2018-01-25 03:56:34,493 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-25 03:56:34,493 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 181 [2018-01-25 03:56:34,493 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:34,494 INFO L225 Difference]: With dead ends: 346 [2018-01-25 03:56:34,494 INFO L226 Difference]: Without dead ends: 287 [2018-01-25 03:56:34,495 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 754 GetRequests, 694 SyntacticMatches, 0 SemanticMatches, 60 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=1891, Invalid=1891, Unknown=0, NotChecked=0, Total=3782 [2018-01-25 03:56:34,495 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 287 states. [2018-01-25 03:56:34,521 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 287 to 186. [2018-01-25 03:56:34,521 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-01-25 03:56:34,521 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 187 transitions. [2018-01-25 03:56:34,522 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 187 transitions. Word has length 181 [2018-01-25 03:56:34,522 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:34,522 INFO L432 AbstractCegarLoop]: Abstraction has 186 states and 187 transitions. [2018-01-25 03:56:34,522 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-25 03:56:34,522 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 187 transitions. [2018-01-25 03:56:34,523 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 186 [2018-01-25 03:56:34,523 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:34,523 INFO L322 BasicCegarLoop]: trace histogram [31, 30, 30, 30, 12, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:34,523 INFO L371 AbstractCegarLoop]: === Iteration 31 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:34,523 INFO L82 PathProgramCache]: Analyzing trace with hash -1177971110, now seen corresponding path program 29 times [2018-01-25 03:56:34,523 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:34,524 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:34,524 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 03:56:34,524 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:34,524 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:34,533 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:34,534 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:35,077 INFO L134 CoverageAnalysis]: Checked inductivity of 2097 backedges. 0 proven. 1800 refuted. 0 times theorem prover too weak. 297 trivial. 0 not checked. [2018-01-25 03:56:35,078 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:35,078 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:35,078 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:35,078 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:35,078 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:35,078 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:35,085 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 03:56:35,085 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 03:56:35,095 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,105 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,119 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,120 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,134 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,135 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,141 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,148 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,156 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,163 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,177 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,187 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,194 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,199 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,203 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,207 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,214 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,221 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,229 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,238 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,246 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,257 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,266 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,275 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,285 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,296 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,309 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,322 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,336 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,351 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,378 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:35,379 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:35,382 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:35,416 INFO L134 CoverageAnalysis]: Checked inductivity of 2097 backedges. 0 proven. 1800 refuted. 0 times theorem prover too weak. 297 trivial. 0 not checked. [2018-01-25 03:56:35,416 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:36,307 INFO L134 CoverageAnalysis]: Checked inductivity of 2097 backedges. 0 proven. 1800 refuted. 0 times theorem prover too weak. 297 trivial. 0 not checked. [2018-01-25 03:56:36,327 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:36,328 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 59 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:36,331 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 03:56:36,331 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 03:56:36,339 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:36,341 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:36,344 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:36,349 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:36,355 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:36,361 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:36,369 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:36,379 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:36,390 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:36,404 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:36,419 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:36,438 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:36,461 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:36,486 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:36,515 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:36,549 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:36,586 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:36,629 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:36,676 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:36,729 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:36,792 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:36,865 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:36,945 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:37,034 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:37,149 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:37,280 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:37,423 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:37,579 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:37,755 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:37,963 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:40,447 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 03:56:40,519 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:40,525 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:40,547 INFO L134 CoverageAnalysis]: Checked inductivity of 2097 backedges. 0 proven. 1800 refuted. 0 times theorem prover too weak. 297 trivial. 0 not checked. [2018-01-25 03:56:40,547 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:40,571 INFO L134 CoverageAnalysis]: Checked inductivity of 2097 backedges. 0 proven. 1800 refuted. 0 times theorem prover too weak. 297 trivial. 0 not checked. [2018-01-25 03:56:40,574 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:40,574 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33, 33, 33, 33] total 64 [2018-01-25 03:56:40,575 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:40,575 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-01-25 03:56:40,575 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-01-25 03:56:40,576 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=2016, Invalid=2016, Unknown=0, NotChecked=0, Total=4032 [2018-01-25 03:56:40,576 INFO L87 Difference]: Start difference. First operand 186 states and 187 transitions. Second operand 33 states. [2018-01-25 03:56:40,966 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:40,966 INFO L93 Difference]: Finished difference Result 355 states and 376 transitions. [2018-01-25 03:56:40,966 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-25 03:56:40,967 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 185 [2018-01-25 03:56:40,967 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:40,968 INFO L225 Difference]: With dead ends: 355 [2018-01-25 03:56:40,968 INFO L226 Difference]: Without dead ends: 296 [2018-01-25 03:56:40,968 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 771 GetRequests, 709 SyntacticMatches, 0 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=2016, Invalid=2016, Unknown=0, NotChecked=0, Total=4032 [2018-01-25 03:56:40,968 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 296 states. [2018-01-25 03:56:40,994 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 296 to 190. [2018-01-25 03:56:40,994 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 190 states. [2018-01-25 03:56:40,994 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 190 states to 190 states and 191 transitions. [2018-01-25 03:56:40,994 INFO L78 Accepts]: Start accepts. Automaton has 190 states and 191 transitions. Word has length 185 [2018-01-25 03:56:40,995 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:40,995 INFO L432 AbstractCegarLoop]: Abstraction has 190 states and 191 transitions. [2018-01-25 03:56:40,995 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-01-25 03:56:40,995 INFO L276 IsEmpty]: Start isEmpty. Operand 190 states and 191 transitions. [2018-01-25 03:56:40,995 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 190 [2018-01-25 03:56:40,995 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:40,996 INFO L322 BasicCegarLoop]: trace histogram [32, 31, 31, 31, 12, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:40,996 INFO L371 AbstractCegarLoop]: === Iteration 32 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:40,996 INFO L82 PathProgramCache]: Analyzing trace with hash 659595777, now seen corresponding path program 30 times [2018-01-25 03:56:40,996 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:40,996 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:40,996 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 03:56:40,997 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:40,997 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:41,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:41,007 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:41,543 INFO L134 CoverageAnalysis]: Checked inductivity of 2219 backedges. 0 proven. 1922 refuted. 0 times theorem prover too weak. 297 trivial. 0 not checked. [2018-01-25 03:56:41,543 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:41,543 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:41,544 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:41,544 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:41,544 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:41,544 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 60 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:41,548 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 03:56:41,549 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 03:56:41,556 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:41,557 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:41,558 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:41,559 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:41,560 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:41,561 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:41,563 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:41,564 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:41,566 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:41,567 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:41,569 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:41,571 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:41,573 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:41,576 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:41,578 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:41,581 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:41,584 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:41,587 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:41,590 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:41,593 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:41,598 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:41,603 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:41,607 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:41,609 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:41,611 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:41,679 INFO L134 CoverageAnalysis]: Checked inductivity of 2219 backedges. 0 proven. 297 refuted. 0 times theorem prover too weak. 1922 trivial. 0 not checked. [2018-01-25 03:56:41,680 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:41,941 INFO L134 CoverageAnalysis]: Checked inductivity of 2219 backedges. 0 proven. 297 refuted. 0 times theorem prover too weak. 1922 trivial. 0 not checked. [2018-01-25 03:56:41,962 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:41,962 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 61 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 03:56:41,965 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 03:56:41,965 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 03:56:41,974 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:41,976 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:41,981 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:41,987 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:41,993 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:42,003 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:42,014 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:42,030 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:42,046 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:42,068 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:42,096 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:42,131 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:42,171 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:42,244 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:42,304 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:42,571 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:42,892 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:43,482 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:44,115 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:45,132 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:46,394 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:47,844 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:48,306 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 03:56:48,328 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 03:56:48,333 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:48,353 INFO L134 CoverageAnalysis]: Checked inductivity of 2219 backedges. 0 proven. 297 refuted. 0 times theorem prover too weak. 1922 trivial. 0 not checked. [2018-01-25 03:56:48,354 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 03:56:48,386 INFO L134 CoverageAnalysis]: Checked inductivity of 2219 backedges. 0 proven. 297 refuted. 0 times theorem prover too weak. 1922 trivial. 0 not checked. [2018-01-25 03:56:48,389 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 03:56:48,389 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 13, 13, 13, 13] total 58 [2018-01-25 03:56:48,389 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 03:56:48,390 INFO L409 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-01-25 03:56:48,390 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-01-25 03:56:48,390 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1071, Invalid=2235, Unknown=0, NotChecked=0, Total=3306 [2018-01-25 03:56:48,390 INFO L87 Difference]: Start difference. First operand 190 states and 191 transitions. Second operand 46 states. [2018-01-25 03:56:48,976 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 03:56:48,976 INFO L93 Difference]: Finished difference Result 364 states and 386 transitions. [2018-01-25 03:56:48,976 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-25 03:56:48,977 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 189 [2018-01-25 03:56:48,977 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 03:56:48,978 INFO L225 Difference]: With dead ends: 364 [2018-01-25 03:56:48,978 INFO L226 Difference]: Without dead ends: 305 [2018-01-25 03:56:48,978 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 788 GetRequests, 732 SyntacticMatches, 0 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1260 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1071, Invalid=2235, Unknown=0, NotChecked=0, Total=3306 [2018-01-25 03:56:48,978 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 305 states. [2018-01-25 03:56:49,011 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 305 to 199. [2018-01-25 03:56:49,021 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 199 states. [2018-01-25 03:56:49,022 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 199 states to 199 states and 200 transitions. [2018-01-25 03:56:49,022 INFO L78 Accepts]: Start accepts. Automaton has 199 states and 200 transitions. Word has length 189 [2018-01-25 03:56:49,022 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 03:56:49,022 INFO L432 AbstractCegarLoop]: Abstraction has 199 states and 200 transitions. [2018-01-25 03:56:49,022 INFO L433 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-01-25 03:56:49,022 INFO L276 IsEmpty]: Start isEmpty. Operand 199 states and 200 transitions. [2018-01-25 03:56:49,023 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 199 [2018-01-25 03:56:49,023 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 03:56:49,023 INFO L322 BasicCegarLoop]: trace histogram [33, 32, 32, 32, 13, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 03:56:49,023 INFO L371 AbstractCegarLoop]: === Iteration 33 === [mainErr0AssertViolation, mainErr1AssertViolation]=== [2018-01-25 03:56:49,023 INFO L82 PathProgramCache]: Analyzing trace with hash -1088370982, now seen corresponding path program 31 times [2018-01-25 03:56:49,024 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 03:56:49,024 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:49,024 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 03:56:49,024 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 03:56:49,024 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 03:56:49,035 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:49,036 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 03:56:49,536 INFO L134 CoverageAnalysis]: Checked inductivity of 2402 backedges. 0 proven. 2048 refuted. 0 times theorem prover too weak. 354 trivial. 0 not checked. [2018-01-25 03:56:49,536 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:49,536 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 03:56:49,536 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 03:56:49,536 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 03:56:49,536 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 03:56:49,536 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 62 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 03:56:49,541 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 03:56:49,541 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 03:56:49,565 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 03:56:49,567 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 03:56:49,614 INFO L134 CoverageAnalysis]: Checked inductivity of 2402 backedges. 0 proven. 2048 refuted. 0 times theorem prover too weak. 354 trivial. 0 not checked. [2018-01-25 03:56:49,615 INFO L314 TraceCheckSpWp]: Computing backward predicates... Received shutdown request... [2018-01-25 03:56:50,185 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-25 03:56:50,185 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-25 03:56:50,188 WARN L187 ceAbstractionStarter]: Timeout [2018-01-25 03:56:50,189 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 25.01 03:56:50 BoogieIcfgContainer [2018-01-25 03:56:50,189 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-25 03:56:50,190 INFO L168 Benchmark]: Toolchain (without parser) took 49498.58 ms. Allocated memory was 309.3 MB in the beginning and 779.6 MB in the end (delta: 470.3 MB). Free memory was 270.2 MB in the beginning and 535.8 MB in the end (delta: -265.5 MB). Peak memory consumption was 204.8 MB. Max. memory is 5.3 GB. [2018-01-25 03:56:50,191 INFO L168 Benchmark]: CDTParser took 0.14 ms. Allocated memory is still 309.3 MB. Free memory is still 275.2 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-25 03:56:50,191 INFO L168 Benchmark]: CACSL2BoogieTranslator took 158.45 ms. Allocated memory is still 309.3 MB. Free memory was 269.2 MB in the beginning and 262.1 MB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 5.3 GB. [2018-01-25 03:56:50,191 INFO L168 Benchmark]: Boogie Preprocessor took 25.57 ms. Allocated memory is still 309.3 MB. Free memory was 262.1 MB in the beginning and 260.1 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-25 03:56:50,192 INFO L168 Benchmark]: RCFGBuilder took 188.40 ms. Allocated memory is still 309.3 MB. Free memory was 260.1 MB in the beginning and 248.1 MB in the end (delta: 12.0 MB). Peak memory consumption was 12.0 MB. Max. memory is 5.3 GB. [2018-01-25 03:56:50,192 INFO L168 Benchmark]: TraceAbstraction took 49118.58 ms. Allocated memory was 309.3 MB in the beginning and 779.6 MB in the end (delta: 470.3 MB). Free memory was 248.1 MB in the beginning and 535.8 MB in the end (delta: -287.6 MB). Peak memory consumption was 182.7 MB. Max. memory is 5.3 GB. [2018-01-25 03:56:50,194 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.14 ms. Allocated memory is still 309.3 MB. Free memory is still 275.2 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 158.45 ms. Allocated memory is still 309.3 MB. Free memory was 269.2 MB in the beginning and 262.1 MB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 25.57 ms. Allocated memory is still 309.3 MB. Free memory was 262.1 MB in the beginning and 260.1 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 188.40 ms. Allocated memory is still 309.3 MB. Free memory was 260.1 MB in the beginning and 248.1 MB in the end (delta: 12.0 MB). Peak memory consumption was 12.0 MB. Max. memory is 5.3 GB. * TraceAbstraction took 49118.58 ms. Allocated memory was 309.3 MB in the beginning and 779.6 MB in the end (delta: 470.3 MB). Free memory was 248.1 MB in the beginning and 535.8 MB in the end (delta: -287.6 MB). Peak memory consumption was 182.7 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 15 LocStat_MAX_WEQGRAPH_SIZE : 0 LocStat_MAX_SIZEOF_WEQEDGELABEL : 0 LocStat_NO_SUPPORTING_EQUALITIES : 2 LocStat_NO_SUPPORTING_DISEQUALITIES : 4 LocStat_NO_DISJUNCTIONS : -30 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 21 TransStat_MAX_WEQGRAPH_SIZE : 1 TransStat_MAX_SIZEOF_WEQEDGELABEL : 1 TransStat_NO_SUPPORTING_EQUALITIES : 9 TransStat_NO_SUPPORTING_DISEQUALITIES : 1 TransStat_NO_DISJUNCTIONS : 22 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.247589 RENAME_VARIABLES(MILLISECONDS) : 0.276296 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.210523 PROJECTAWAY(MILLISECONDS) : 0.271977 ADD_WEAK_EQUALITY(MILLISECONDS) : 3.300600 DISJOIN(MILLISECONDS) : 0.178340 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.304745 ADD_EQUALITY(MILLISECONDS) : 0.056829 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.091212 #CONJOIN_DISJUNCTIVE : 34 #RENAME_VARIABLES : 76 #UNFREEZE : 0 #CONJOIN : 45 #PROJECTAWAY : 59 #ADD_WEAK_EQUALITY : 1 #DISJOIN : 6 #RENAME_VARIABLES_DISJUNCTIVE : 73 #ADD_EQUALITY : 9 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 1 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 13]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 13). Cancelled while BasicCegarLoop was analyzing trace of length 199 with TraceHistMax 33, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 57 known predicates. - TimeoutResultAtElement [Line: 15]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 15). Cancelled while BasicCegarLoop was analyzing trace of length 199 with TraceHistMax 33, while TraceCheckSpWp was constructing backward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 57 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 27 locations, 2 error locations. TIMEOUT Result, 49.0s OverallTime, 33 OverallIterations, 33 TraceHistogramMax, 8.0s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 534 SDtfs, 3943 SDslu, 4942 SDs, 0 SdLazy, 8216 SolverSat, 1248 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 4.9s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 13553 GetRequests, 12532 SyntacticMatches, 0 SemanticMatches, 1021 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5325 ImplicationChecksByTransitivity, 14.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=199occurred in iteration=32, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.1s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.5s AutomataMinimizationTime, 32 MinimizatonAttempts, 1789 StatesRemovedByMinimization, 32 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 18.2s SatisfiabilityAnalysisTime, 18.9s InterpolantComputationTime, 9789 NumberOfCodeBlocks, 9189 NumberOfCodeBlocksAsserted, 492 NumberOfCheckSat, 16147 ConstructedInterpolants, 0 QuantifiedInterpolants, 4918365 SizeOfPredicates, 40 NumberOfNonLiveVariables, 9300 ConjunctsInSsa, 1040 ConjunctsInUnsatCore, 152 InterpolantComputations, 2 PerfectInterpolantSequences, 43980/122610 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/array3_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-25_03-56-50-203.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/array3_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-25_03-56-50-203.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/array3_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-25_03-56-50-203.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/array3_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-25_03-56-50-203.csv Completed graceful shutdown