java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf -i ../../../trunk/examples/svcomp/array-examples/standard_strcpy_original_false-valid-deref.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-25 02:50:45,170 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-25 02:50:45,173 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-25 02:50:45,192 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-25 02:50:45,192 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-25 02:50:45,193 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-25 02:50:45,195 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-25 02:50:45,196 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-25 02:50:45,199 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-25 02:50:45,200 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-25 02:50:45,201 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-25 02:50:45,201 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-25 02:50:45,202 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-25 02:50:45,204 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-25 02:50:45,205 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-25 02:50:45,208 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-25 02:50:45,210 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-25 02:50:45,212 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-25 02:50:45,213 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-25 02:50:45,215 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-25 02:50:45,218 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-25 02:50:45,218 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-25 02:50:45,218 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-25 02:50:45,219 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-25 02:50:45,220 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-25 02:50:45,222 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-25 02:50:45,222 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-25 02:50:45,223 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-25 02:50:45,223 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-25 02:50:45,223 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-25 02:50:45,224 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-25 02:50:45,224 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf [2018-01-25 02:50:45,236 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-25 02:50:45,237 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-25 02:50:45,238 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-25 02:50:45,238 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-25 02:50:45,238 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-25 02:50:45,238 INFO L133 SettingsManager]: * Weq Fattening=true [2018-01-25 02:50:45,239 INFO L133 SettingsManager]: * Flatten before fatten=true [2018-01-25 02:50:45,239 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-25 02:50:45,239 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-25 02:50:45,240 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-25 02:50:45,240 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-25 02:50:45,240 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-25 02:50:45,240 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-25 02:50:45,241 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-25 02:50:45,241 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-25 02:50:45,241 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-25 02:50:45,241 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-25 02:50:45,242 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-25 02:50:45,242 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-25 02:50:45,242 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-25 02:50:45,242 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-25 02:50:45,242 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-25 02:50:45,243 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-25 02:50:45,243 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-25 02:50:45,244 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-25 02:50:45,244 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-25 02:50:45,245 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-25 02:50:45,245 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-25 02:50:45,245 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-25 02:50:45,245 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-25 02:50:45,245 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-25 02:50:45,246 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-25 02:50:45,246 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-25 02:50:45,246 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-25 02:50:45,246 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-25 02:50:45,247 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-25 02:50:45,248 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-25 02:50:45,307 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-25 02:50:45,322 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-25 02:50:45,330 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-25 02:50:45,332 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-25 02:50:45,332 INFO L276 PluginConnector]: CDTParser initialized [2018-01-25 02:50:45,333 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-examples/standard_strcpy_original_false-valid-deref.i [2018-01-25 02:50:45,496 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-25 02:50:45,505 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-25 02:50:45,506 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-25 02:50:45,507 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-25 02:50:45,515 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-25 02:50:45,516 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.01 02:50:45" (1/1) ... [2018-01-25 02:50:45,521 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@6228d26b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:50:45, skipping insertion in model container [2018-01-25 02:50:45,521 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.01 02:50:45" (1/1) ... [2018-01-25 02:50:45,541 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-25 02:50:45,563 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-25 02:50:45,693 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-25 02:50:45,704 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-25 02:50:45,709 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:50:45 WrapperNode [2018-01-25 02:50:45,709 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-25 02:50:45,710 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-25 02:50:45,710 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-25 02:50:45,710 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-25 02:50:45,722 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:50:45" (1/1) ... [2018-01-25 02:50:45,723 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:50:45" (1/1) ... [2018-01-25 02:50:45,730 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:50:45" (1/1) ... [2018-01-25 02:50:45,730 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:50:45" (1/1) ... [2018-01-25 02:50:45,731 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:50:45" (1/1) ... [2018-01-25 02:50:45,736 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:50:45" (1/1) ... [2018-01-25 02:50:45,738 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:50:45" (1/1) ... [2018-01-25 02:50:45,739 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-25 02:50:45,740 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-25 02:50:45,740 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-25 02:50:45,740 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-25 02:50:45,742 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:50:45" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-25 02:50:45,797 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-25 02:50:45,797 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-25 02:50:45,797 INFO L136 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-01-25 02:50:45,797 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-25 02:50:45,797 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-01-25 02:50:45,798 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-01-25 02:50:45,798 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-25 02:50:45,798 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-25 02:50:45,798 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-25 02:50:45,940 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-25 02:50:45,941 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.01 02:50:45 BoogieIcfgContainer [2018-01-25 02:50:45,941 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-25 02:50:45,942 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-25 02:50:45,942 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-25 02:50:45,944 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-25 02:50:45,945 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 25.01 02:50:45" (1/3) ... [2018-01-25 02:50:45,946 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@225d3877 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 25.01 02:50:45, skipping insertion in model container [2018-01-25 02:50:45,946 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 02:50:45" (2/3) ... [2018-01-25 02:50:45,947 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@225d3877 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 25.01 02:50:45, skipping insertion in model container [2018-01-25 02:50:45,947 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.01 02:50:45" (3/3) ... [2018-01-25 02:50:45,949 INFO L105 eAbstractionObserver]: Analyzing ICFG standard_strcpy_original_false-valid-deref.i [2018-01-25 02:50:45,959 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-25 02:50:45,968 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 6 error locations. [2018-01-25 02:50:46,030 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-25 02:50:46,030 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-25 02:50:46,031 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-25 02:50:46,031 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-25 02:50:46,031 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-25 02:50:46,031 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-25 02:50:46,031 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-25 02:50:46,032 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-25 02:50:46,033 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-25 02:50:46,056 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states. [2018-01-25 02:50:46,064 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 8 [2018-01-25 02:50:46,064 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:46,066 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:46,066 INFO L371 AbstractCegarLoop]: === Iteration 1 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:46,073 INFO L82 PathProgramCache]: Analyzing trace with hash 1734695582, now seen corresponding path program 1 times [2018-01-25 02:50:46,077 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:46,142 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:46,143 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:46,143 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:46,143 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:46,188 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:46,200 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:46,339 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:46,345 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-25 02:50:46,346 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-25 02:50:46,346 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-25 02:50:46,349 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-25 02:50:46,366 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-25 02:50:46,367 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-25 02:50:46,369 INFO L87 Difference]: Start difference. First operand 34 states. Second operand 3 states. [2018-01-25 02:50:46,478 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:46,478 INFO L93 Difference]: Finished difference Result 74 states and 90 transitions. [2018-01-25 02:50:46,479 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-25 02:50:46,480 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 7 [2018-01-25 02:50:46,481 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:46,491 INFO L225 Difference]: With dead ends: 74 [2018-01-25 02:50:46,491 INFO L226 Difference]: Without dead ends: 41 [2018-01-25 02:50:46,496 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-25 02:50:46,513 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 41 states. [2018-01-25 02:50:46,611 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 41 to 38. [2018-01-25 02:50:46,613 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 38 states. [2018-01-25 02:50:46,614 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 38 states to 38 states and 40 transitions. [2018-01-25 02:50:46,616 INFO L78 Accepts]: Start accepts. Automaton has 38 states and 40 transitions. Word has length 7 [2018-01-25 02:50:46,617 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:46,617 INFO L432 AbstractCegarLoop]: Abstraction has 38 states and 40 transitions. [2018-01-25 02:50:46,617 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-25 02:50:46,617 INFO L276 IsEmpty]: Start isEmpty. Operand 38 states and 40 transitions. [2018-01-25 02:50:46,618 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 13 [2018-01-25 02:50:46,618 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:46,618 INFO L322 BasicCegarLoop]: trace histogram [2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:46,618 INFO L371 AbstractCegarLoop]: === Iteration 2 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:46,619 INFO L82 PathProgramCache]: Analyzing trace with hash 337601429, now seen corresponding path program 1 times [2018-01-25 02:50:46,619 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:46,620 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:46,621 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:46,621 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:46,621 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:46,634 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:46,635 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:46,698 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:46,698 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:46,698 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:46,700 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 13 with the following transitions: [2018-01-25 02:50:46,702 INFO L201 CegarAbsIntRunner]: [0], [4], [8], [10], [11], [16], [18], [20], [58], [59], [60] [2018-01-25 02:50:46,768 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-25 02:50:46,768 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-25 02:50:47,137 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-25 02:50:47,139 INFO L268 AbstractInterpreter]: Visited 11 different actions 23 times. Merged at 6 different actions 12 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 3 variables. [2018-01-25 02:50:47,153 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-25 02:50:47,153 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:47,153 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:47,160 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:47,160 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:50:47,171 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:47,179 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:47,202 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:47,202 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:47,250 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:47,275 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:47,275 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:47,280 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:47,280 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:50:47,286 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:47,289 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:47,296 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:47,296 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:47,316 INFO L134 CoverageAnalysis]: Checked inductivity of 2 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:47,318 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:47,318 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3, 3, 3] total 5 [2018-01-25 02:50:47,318 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:47,319 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-25 02:50:47,319 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-25 02:50:47,319 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-01-25 02:50:47,320 INFO L87 Difference]: Start difference. First operand 38 states and 40 transitions. Second operand 4 states. [2018-01-25 02:50:47,463 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:47,463 INFO L93 Difference]: Finished difference Result 60 states and 65 transitions. [2018-01-25 02:50:47,465 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-25 02:50:47,466 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 12 [2018-01-25 02:50:47,468 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:47,469 INFO L225 Difference]: With dead ends: 60 [2018-01-25 02:50:47,469 INFO L226 Difference]: Without dead ends: 54 [2018-01-25 02:50:47,470 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 49 GetRequests, 43 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-01-25 02:50:47,471 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 54 states. [2018-01-25 02:50:47,491 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 54 to 50. [2018-01-25 02:50:47,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 50 states. [2018-01-25 02:50:47,493 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 50 states to 50 states and 54 transitions. [2018-01-25 02:50:47,501 INFO L78 Accepts]: Start accepts. Automaton has 50 states and 54 transitions. Word has length 12 [2018-01-25 02:50:47,502 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:47,502 INFO L432 AbstractCegarLoop]: Abstraction has 50 states and 54 transitions. [2018-01-25 02:50:47,502 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-25 02:50:47,502 INFO L276 IsEmpty]: Start isEmpty. Operand 50 states and 54 transitions. [2018-01-25 02:50:47,503 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-25 02:50:47,503 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:47,503 INFO L322 BasicCegarLoop]: trace histogram [3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:47,504 INFO L371 AbstractCegarLoop]: === Iteration 3 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:47,504 INFO L82 PathProgramCache]: Analyzing trace with hash -1746445058, now seen corresponding path program 2 times [2018-01-25 02:50:47,504 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:47,508 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:47,508 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:47,508 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:47,509 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:47,524 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:47,525 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:47,603 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:47,603 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:47,603 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:47,603 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:47,604 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:47,604 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:47,604 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:47,611 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:50:47,611 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:47,616 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:47,620 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:47,621 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:47,623 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:47,629 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:47,629 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:47,714 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:47,747 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:47,747 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:47,757 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:50:47,757 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:47,762 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:47,765 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:47,770 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:47,774 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:47,781 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:47,781 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:47,809 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 9 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:47,811 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:47,811 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 4, 4] total 7 [2018-01-25 02:50:47,811 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:47,813 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-25 02:50:47,813 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-25 02:50:47,813 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-01-25 02:50:47,814 INFO L87 Difference]: Start difference. First operand 50 states and 54 transitions. Second operand 5 states. [2018-01-25 02:50:47,896 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:47,896 INFO L93 Difference]: Finished difference Result 73 states and 80 transitions. [2018-01-25 02:50:47,897 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-25 02:50:47,897 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 17 [2018-01-25 02:50:47,897 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:47,898 INFO L225 Difference]: With dead ends: 73 [2018-01-25 02:50:47,898 INFO L226 Difference]: Without dead ends: 67 [2018-01-25 02:50:47,899 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 70 GetRequests, 62 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-01-25 02:50:47,899 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2018-01-25 02:50:47,905 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 62. [2018-01-25 02:50:47,905 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62 states. [2018-01-25 02:50:47,906 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 68 transitions. [2018-01-25 02:50:47,907 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 68 transitions. Word has length 17 [2018-01-25 02:50:47,907 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:47,907 INFO L432 AbstractCegarLoop]: Abstraction has 62 states and 68 transitions. [2018-01-25 02:50:47,907 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-25 02:50:47,907 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 68 transitions. [2018-01-25 02:50:47,908 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-25 02:50:47,908 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:47,908 INFO L322 BasicCegarLoop]: trace histogram [4, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:47,908 INFO L371 AbstractCegarLoop]: === Iteration 4 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:47,908 INFO L82 PathProgramCache]: Analyzing trace with hash -228598475, now seen corresponding path program 3 times [2018-01-25 02:50:47,908 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:47,909 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:47,909 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:47,909 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:47,909 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:47,917 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:47,918 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:47,988 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:47,988 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:47,989 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:47,989 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:47,989 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:47,989 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:47,989 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:47,995 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 02:50:47,995 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 02:50:47,999 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:48,002 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:48,004 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:48,009 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:48,013 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:48,015 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:48,029 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:48,029 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:48,108 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:48,143 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:48,143 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:48,153 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 02:50:48,153 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 02:50:48,157 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:48,159 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:48,165 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:48,171 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:48,175 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:48,178 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:48,193 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:48,193 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:48,201 INFO L134 CoverageAnalysis]: Checked inductivity of 21 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:48,203 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:48,203 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-25 02:50:48,203 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:48,203 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-25 02:50:48,204 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-25 02:50:48,204 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-01-25 02:50:48,204 INFO L87 Difference]: Start difference. First operand 62 states and 68 transitions. Second operand 6 states. [2018-01-25 02:50:48,365 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:48,366 INFO L93 Difference]: Finished difference Result 86 states and 95 transitions. [2018-01-25 02:50:48,366 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-25 02:50:48,366 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 22 [2018-01-25 02:50:48,366 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:48,367 INFO L225 Difference]: With dead ends: 86 [2018-01-25 02:50:48,367 INFO L226 Difference]: Without dead ends: 80 [2018-01-25 02:50:48,368 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 91 GetRequests, 81 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-01-25 02:50:48,368 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2018-01-25 02:50:48,376 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 74. [2018-01-25 02:50:48,376 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74 states. [2018-01-25 02:50:48,377 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 82 transitions. [2018-01-25 02:50:48,378 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 82 transitions. Word has length 22 [2018-01-25 02:50:48,378 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:48,378 INFO L432 AbstractCegarLoop]: Abstraction has 74 states and 82 transitions. [2018-01-25 02:50:48,378 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-25 02:50:48,378 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 82 transitions. [2018-01-25 02:50:48,379 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-25 02:50:48,380 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:48,380 INFO L322 BasicCegarLoop]: trace histogram [5, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:48,380 INFO L371 AbstractCegarLoop]: === Iteration 5 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:48,380 INFO L82 PathProgramCache]: Analyzing trace with hash 756148062, now seen corresponding path program 4 times [2018-01-25 02:50:48,380 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:48,381 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:48,382 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:48,382 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:48,382 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:48,389 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:48,390 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:48,466 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:48,466 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:48,466 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:48,466 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:48,467 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:48,467 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:48,467 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:48,477 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 02:50:48,478 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 02:50:48,486 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:48,487 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:48,497 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:48,497 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:48,588 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:48,609 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:48,609 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:48,613 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 02:50:48,613 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 02:50:48,629 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:48,633 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:48,641 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:48,641 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:48,649 INFO L134 CoverageAnalysis]: Checked inductivity of 38 backedges. 0 proven. 38 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:48,650 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:48,651 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-25 02:50:48,651 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:48,651 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-25 02:50:48,651 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-25 02:50:48,652 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-01-25 02:50:48,652 INFO L87 Difference]: Start difference. First operand 74 states and 82 transitions. Second operand 7 states. [2018-01-25 02:50:48,820 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:48,821 INFO L93 Difference]: Finished difference Result 99 states and 110 transitions. [2018-01-25 02:50:48,821 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-25 02:50:48,821 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 27 [2018-01-25 02:50:48,821 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:48,822 INFO L225 Difference]: With dead ends: 99 [2018-01-25 02:50:48,822 INFO L226 Difference]: Without dead ends: 93 [2018-01-25 02:50:48,822 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 112 GetRequests, 100 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-01-25 02:50:48,823 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2018-01-25 02:50:48,828 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 86. [2018-01-25 02:50:48,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 86 states. [2018-01-25 02:50:48,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 86 states to 86 states and 96 transitions. [2018-01-25 02:50:48,830 INFO L78 Accepts]: Start accepts. Automaton has 86 states and 96 transitions. Word has length 27 [2018-01-25 02:50:48,830 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:48,830 INFO L432 AbstractCegarLoop]: Abstraction has 86 states and 96 transitions. [2018-01-25 02:50:48,830 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-25 02:50:48,830 INFO L276 IsEmpty]: Start isEmpty. Operand 86 states and 96 transitions. [2018-01-25 02:50:48,831 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 33 [2018-01-25 02:50:48,831 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:48,831 INFO L322 BasicCegarLoop]: trace histogram [6, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:48,831 INFO L371 AbstractCegarLoop]: === Iteration 6 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:48,831 INFO L82 PathProgramCache]: Analyzing trace with hash 671928021, now seen corresponding path program 5 times [2018-01-25 02:50:48,831 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:48,832 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:48,832 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:48,832 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:48,832 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:48,838 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:48,838 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:48,922 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:48,922 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:48,923 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:48,923 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:48,923 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:48,923 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:48,923 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:48,931 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 02:50:48,931 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:48,936 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:48,938 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:48,941 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:48,943 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:48,945 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:48,948 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:48,962 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:48,964 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:49,040 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:49,045 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:49,255 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:49,286 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:49,286 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:49,297 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 02:50:49,297 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:49,308 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:49,312 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:49,318 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:49,324 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:49,336 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:49,351 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:49,361 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:49,369 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:49,401 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:49,401 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:49,419 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 60 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:49,422 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:49,422 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-25 02:50:49,422 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:49,423 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-25 02:50:49,423 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-25 02:50:49,423 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-01-25 02:50:49,424 INFO L87 Difference]: Start difference. First operand 86 states and 96 transitions. Second operand 8 states. [2018-01-25 02:50:49,798 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:49,798 INFO L93 Difference]: Finished difference Result 112 states and 125 transitions. [2018-01-25 02:50:49,799 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-25 02:50:49,799 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 32 [2018-01-25 02:50:49,800 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:49,801 INFO L225 Difference]: With dead ends: 112 [2018-01-25 02:50:49,801 INFO L226 Difference]: Without dead ends: 106 [2018-01-25 02:50:49,801 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 133 GetRequests, 119 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-01-25 02:50:49,802 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 106 states. [2018-01-25 02:50:49,810 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 106 to 98. [2018-01-25 02:50:49,810 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 98 states. [2018-01-25 02:50:49,811 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 98 states to 98 states and 110 transitions. [2018-01-25 02:50:49,812 INFO L78 Accepts]: Start accepts. Automaton has 98 states and 110 transitions. Word has length 32 [2018-01-25 02:50:49,812 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:49,812 INFO L432 AbstractCegarLoop]: Abstraction has 98 states and 110 transitions. [2018-01-25 02:50:49,812 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-25 02:50:49,812 INFO L276 IsEmpty]: Start isEmpty. Operand 98 states and 110 transitions. [2018-01-25 02:50:49,813 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 38 [2018-01-25 02:50:49,813 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:49,813 INFO L322 BasicCegarLoop]: trace histogram [7, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:49,813 INFO L371 AbstractCegarLoop]: === Iteration 7 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:49,814 INFO L82 PathProgramCache]: Analyzing trace with hash -203753026, now seen corresponding path program 6 times [2018-01-25 02:50:49,814 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:49,814 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:49,814 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:49,815 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:49,815 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:49,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:49,822 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:49,989 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 0 proven. 87 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:49,990 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:49,990 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:49,990 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:49,990 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:49,990 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:49,990 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:50,003 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 02:50:50,003 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 02:50:50,008 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:50,010 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:50,011 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:50,012 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:50,014 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:50,015 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:50,016 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:50,016 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:50,018 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:50,028 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 0 proven. 87 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:50,028 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:50,219 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 0 proven. 87 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:50,243 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:50,243 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:50,248 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 02:50:50,248 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 02:50:50,253 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:50,255 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:50,259 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:50,264 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:50,270 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:50,278 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:50,288 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:50,292 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:50,296 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:50,304 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 0 proven. 87 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:50,304 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:50,312 INFO L134 CoverageAnalysis]: Checked inductivity of 87 backedges. 0 proven. 87 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:50,313 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:50,313 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-25 02:50:50,313 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:50,314 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-25 02:50:50,314 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-25 02:50:50,314 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=162, Unknown=0, NotChecked=0, Total=240 [2018-01-25 02:50:50,314 INFO L87 Difference]: Start difference. First operand 98 states and 110 transitions. Second operand 9 states. [2018-01-25 02:50:50,479 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:50,480 INFO L93 Difference]: Finished difference Result 125 states and 140 transitions. [2018-01-25 02:50:50,480 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-25 02:50:50,480 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 37 [2018-01-25 02:50:50,480 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:50,481 INFO L225 Difference]: With dead ends: 125 [2018-01-25 02:50:50,481 INFO L226 Difference]: Without dead ends: 119 [2018-01-25 02:50:50,482 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 154 GetRequests, 138 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=78, Invalid=162, Unknown=0, NotChecked=0, Total=240 [2018-01-25 02:50:50,482 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 119 states. [2018-01-25 02:50:50,492 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 119 to 110. [2018-01-25 02:50:50,492 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 110 states. [2018-01-25 02:50:50,494 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 110 states to 110 states and 124 transitions. [2018-01-25 02:50:50,494 INFO L78 Accepts]: Start accepts. Automaton has 110 states and 124 transitions. Word has length 37 [2018-01-25 02:50:50,494 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:50,494 INFO L432 AbstractCegarLoop]: Abstraction has 110 states and 124 transitions. [2018-01-25 02:50:50,495 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-25 02:50:50,495 INFO L276 IsEmpty]: Start isEmpty. Operand 110 states and 124 transitions. [2018-01-25 02:50:50,496 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-25 02:50:50,496 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:50,496 INFO L322 BasicCegarLoop]: trace histogram [8, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:50,496 INFO L371 AbstractCegarLoop]: === Iteration 8 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:50,497 INFO L82 PathProgramCache]: Analyzing trace with hash -1846527883, now seen corresponding path program 7 times [2018-01-25 02:50:50,497 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:50,498 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:50,498 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:50,498 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:50,498 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:50,507 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:50,508 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:50,655 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:50,655 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:50,655 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:50,656 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:50,656 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:50,656 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:50,656 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:50,663 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:50,663 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:50:50,670 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:50,672 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:50,726 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:50,727 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:50,858 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:50,879 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:50,879 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:50,882 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:50,882 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:50:50,893 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:50,896 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:50,908 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:50,908 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:50,917 INFO L134 CoverageAnalysis]: Checked inductivity of 119 backedges. 0 proven. 119 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:50,919 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:50,919 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-25 02:50:50,919 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:50,920 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-25 02:50:50,920 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-25 02:50:50,921 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=97, Invalid=209, Unknown=0, NotChecked=0, Total=306 [2018-01-25 02:50:50,921 INFO L87 Difference]: Start difference. First operand 110 states and 124 transitions. Second operand 10 states. [2018-01-25 02:50:51,160 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:51,161 INFO L93 Difference]: Finished difference Result 138 states and 155 transitions. [2018-01-25 02:50:51,161 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-25 02:50:51,161 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 42 [2018-01-25 02:50:51,161 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:51,162 INFO L225 Difference]: With dead ends: 138 [2018-01-25 02:50:51,162 INFO L226 Difference]: Without dead ends: 132 [2018-01-25 02:50:51,162 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 175 GetRequests, 157 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=97, Invalid=209, Unknown=0, NotChecked=0, Total=306 [2018-01-25 02:50:51,162 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 132 states. [2018-01-25 02:50:51,171 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 132 to 122. [2018-01-25 02:50:51,171 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 122 states. [2018-01-25 02:50:51,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 122 states to 122 states and 138 transitions. [2018-01-25 02:50:51,172 INFO L78 Accepts]: Start accepts. Automaton has 122 states and 138 transitions. Word has length 42 [2018-01-25 02:50:51,172 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:51,172 INFO L432 AbstractCegarLoop]: Abstraction has 122 states and 138 transitions. [2018-01-25 02:50:51,173 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-25 02:50:51,173 INFO L276 IsEmpty]: Start isEmpty. Operand 122 states and 138 transitions. [2018-01-25 02:50:51,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-25 02:50:51,174 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:51,174 INFO L322 BasicCegarLoop]: trace histogram [9, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:51,174 INFO L371 AbstractCegarLoop]: === Iteration 9 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:51,174 INFO L82 PathProgramCache]: Analyzing trace with hash 2109248542, now seen corresponding path program 8 times [2018-01-25 02:50:51,175 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:51,175 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:51,175 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:51,176 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:51,176 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:51,184 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:51,185 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:51,289 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:51,290 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:51,290 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:51,290 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:51,290 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:51,290 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:51,290 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:51,297 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:50:51,297 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:51,303 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:51,308 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:51,309 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:51,311 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:51,324 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:51,324 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:51,474 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:51,494 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:51,494 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:51,497 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:50:51,497 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:51,500 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:51,507 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:51,513 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:51,516 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:51,524 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:51,524 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:51,534 INFO L134 CoverageAnalysis]: Checked inductivity of 156 backedges. 0 proven. 156 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:51,536 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:51,536 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-25 02:50:51,536 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:51,536 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-25 02:50:51,536 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-25 02:50:51,537 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=118, Invalid=262, Unknown=0, NotChecked=0, Total=380 [2018-01-25 02:50:51,537 INFO L87 Difference]: Start difference. First operand 122 states and 138 transitions. Second operand 11 states. [2018-01-25 02:50:51,998 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:51,998 INFO L93 Difference]: Finished difference Result 151 states and 170 transitions. [2018-01-25 02:50:51,999 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-25 02:50:51,999 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 47 [2018-01-25 02:50:51,999 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:52,000 INFO L225 Difference]: With dead ends: 151 [2018-01-25 02:50:52,000 INFO L226 Difference]: Without dead ends: 145 [2018-01-25 02:50:52,000 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 196 GetRequests, 176 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=118, Invalid=262, Unknown=0, NotChecked=0, Total=380 [2018-01-25 02:50:52,001 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-01-25 02:50:52,007 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 134. [2018-01-25 02:50:52,007 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 134 states. [2018-01-25 02:50:52,008 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 134 states to 134 states and 152 transitions. [2018-01-25 02:50:52,009 INFO L78 Accepts]: Start accepts. Automaton has 134 states and 152 transitions. Word has length 47 [2018-01-25 02:50:52,009 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:52,009 INFO L432 AbstractCegarLoop]: Abstraction has 134 states and 152 transitions. [2018-01-25 02:50:52,009 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-25 02:50:52,009 INFO L276 IsEmpty]: Start isEmpty. Operand 134 states and 152 transitions. [2018-01-25 02:50:52,011 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-25 02:50:52,011 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:52,011 INFO L322 BasicCegarLoop]: trace histogram [10, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:52,011 INFO L371 AbstractCegarLoop]: === Iteration 10 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:52,012 INFO L82 PathProgramCache]: Analyzing trace with hash 408164885, now seen corresponding path program 9 times [2018-01-25 02:50:52,012 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:52,012 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:52,012 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:52,012 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:52,013 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:52,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:52,021 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:52,150 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:52,150 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:52,150 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:52,150 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:52,151 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:52,151 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:52,151 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:52,156 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 02:50:52,156 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 02:50:52,159 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:52,160 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:52,161 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:52,162 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:52,163 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:52,164 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:52,165 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:52,166 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:52,168 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:52,169 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:52,180 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:52,182 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:52,215 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:52,215 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:52,370 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:52,391 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:52,391 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:52,394 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 02:50:52,394 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 02:50:52,398 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:52,400 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:52,403 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:52,408 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:52,414 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:52,422 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:52,430 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:52,439 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:52,451 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:52,467 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:52,473 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:52,476 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:52,491 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:52,491 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:52,551 INFO L134 CoverageAnalysis]: Checked inductivity of 198 backedges. 0 proven. 198 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:52,552 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:52,553 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 21 [2018-01-25 02:50:52,553 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:52,553 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-25 02:50:52,553 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-25 02:50:52,554 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=321, Unknown=0, NotChecked=0, Total=462 [2018-01-25 02:50:52,554 INFO L87 Difference]: Start difference. First operand 134 states and 152 transitions. Second operand 12 states. [2018-01-25 02:50:53,661 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:53,662 INFO L93 Difference]: Finished difference Result 164 states and 185 transitions. [2018-01-25 02:50:53,663 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-25 02:50:53,663 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 52 [2018-01-25 02:50:53,663 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:53,665 INFO L225 Difference]: With dead ends: 164 [2018-01-25 02:50:53,665 INFO L226 Difference]: Without dead ends: 158 [2018-01-25 02:50:53,665 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 217 GetRequests, 195 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=141, Invalid=321, Unknown=0, NotChecked=0, Total=462 [2018-01-25 02:50:53,666 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2018-01-25 02:50:53,675 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 146. [2018-01-25 02:50:53,675 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-01-25 02:50:53,677 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 166 transitions. [2018-01-25 02:50:53,677 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 166 transitions. Word has length 52 [2018-01-25 02:50:53,678 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:53,678 INFO L432 AbstractCegarLoop]: Abstraction has 146 states and 166 transitions. [2018-01-25 02:50:53,678 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-25 02:50:53,678 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 166 transitions. [2018-01-25 02:50:53,683 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 58 [2018-01-25 02:50:53,683 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:53,683 INFO L322 BasicCegarLoop]: trace histogram [11, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:53,683 INFO L371 AbstractCegarLoop]: === Iteration 11 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:53,683 INFO L82 PathProgramCache]: Analyzing trace with hash -2136951170, now seen corresponding path program 10 times [2018-01-25 02:50:53,684 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:53,684 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:53,685 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:53,685 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:53,685 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:53,694 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:53,701 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:53,914 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:53,914 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:53,914 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:53,914 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:53,914 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:53,915 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:53,915 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:53,920 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 02:50:53,921 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 02:50:53,933 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:53,935 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:53,948 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:53,948 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:54,132 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:54,153 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:54,153 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:54,158 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 02:50:54,158 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 02:50:54,206 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:54,210 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:54,221 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:54,221 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:54,235 INFO L134 CoverageAnalysis]: Checked inductivity of 245 backedges. 0 proven. 245 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:54,237 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:54,237 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 23 [2018-01-25 02:50:54,237 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:54,238 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-25 02:50:54,238 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-25 02:50:54,238 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=386, Unknown=0, NotChecked=0, Total=552 [2018-01-25 02:50:54,239 INFO L87 Difference]: Start difference. First operand 146 states and 166 transitions. Second operand 13 states. [2018-01-25 02:50:54,714 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:54,714 INFO L93 Difference]: Finished difference Result 177 states and 200 transitions. [2018-01-25 02:50:54,714 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-25 02:50:54,714 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 57 [2018-01-25 02:50:54,714 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:54,715 INFO L225 Difference]: With dead ends: 177 [2018-01-25 02:50:54,715 INFO L226 Difference]: Without dead ends: 171 [2018-01-25 02:50:54,716 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 238 GetRequests, 214 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=166, Invalid=386, Unknown=0, NotChecked=0, Total=552 [2018-01-25 02:50:54,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-01-25 02:50:54,723 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 158. [2018-01-25 02:50:54,723 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-01-25 02:50:54,725 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 180 transitions. [2018-01-25 02:50:54,725 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 180 transitions. Word has length 57 [2018-01-25 02:50:54,725 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:54,725 INFO L432 AbstractCegarLoop]: Abstraction has 158 states and 180 transitions. [2018-01-25 02:50:54,725 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-25 02:50:54,725 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 180 transitions. [2018-01-25 02:50:54,726 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 63 [2018-01-25 02:50:54,727 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:54,727 INFO L322 BasicCegarLoop]: trace histogram [12, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:54,727 INFO L371 AbstractCegarLoop]: === Iteration 12 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:54,727 INFO L82 PathProgramCache]: Analyzing trace with hash 1325560757, now seen corresponding path program 11 times [2018-01-25 02:50:54,727 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:54,728 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:54,728 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:54,728 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:54,728 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:54,735 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:54,736 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:54,909 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 0 proven. 297 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:54,909 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:54,909 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:54,909 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:54,909 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:54,909 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:54,909 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:54,915 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 02:50:54,915 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:54,918 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:54,920 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:54,921 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:54,922 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:54,924 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:54,925 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:54,927 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:54,929 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:54,932 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:54,935 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:54,938 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:54,942 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:54,943 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:54,944 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:54,955 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 0 proven. 297 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:54,956 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:55,221 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 0 proven. 297 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:55,243 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:55,243 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:55,247 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 02:50:55,247 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:55,250 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:55,252 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:55,256 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:55,262 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:55,268 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:55,275 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:55,284 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:55,297 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:55,312 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:55,328 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:55,346 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:55,366 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:55,374 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:55,377 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:55,390 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 0 proven. 297 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:55,390 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:55,402 INFO L134 CoverageAnalysis]: Checked inductivity of 297 backedges. 0 proven. 297 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:55,403 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:55,404 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 25 [2018-01-25 02:50:55,404 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:55,404 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-25 02:50:55,404 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-25 02:50:55,404 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=193, Invalid=457, Unknown=0, NotChecked=0, Total=650 [2018-01-25 02:50:55,405 INFO L87 Difference]: Start difference. First operand 158 states and 180 transitions. Second operand 14 states. [2018-01-25 02:50:55,797 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:55,797 INFO L93 Difference]: Finished difference Result 190 states and 215 transitions. [2018-01-25 02:50:55,797 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-25 02:50:55,797 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 62 [2018-01-25 02:50:55,798 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:55,799 INFO L225 Difference]: With dead ends: 190 [2018-01-25 02:50:55,799 INFO L226 Difference]: Without dead ends: 184 [2018-01-25 02:50:55,799 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 259 GetRequests, 233 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=193, Invalid=457, Unknown=0, NotChecked=0, Total=650 [2018-01-25 02:50:55,800 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-01-25 02:50:55,806 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 170. [2018-01-25 02:50:55,806 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 170 states. [2018-01-25 02:50:55,807 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 170 states to 170 states and 194 transitions. [2018-01-25 02:50:55,807 INFO L78 Accepts]: Start accepts. Automaton has 170 states and 194 transitions. Word has length 62 [2018-01-25 02:50:55,807 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:55,807 INFO L432 AbstractCegarLoop]: Abstraction has 170 states and 194 transitions. [2018-01-25 02:50:55,807 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-25 02:50:55,808 INFO L276 IsEmpty]: Start isEmpty. Operand 170 states and 194 transitions. [2018-01-25 02:50:55,808 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-01-25 02:50:55,808 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:55,809 INFO L322 BasicCegarLoop]: trace histogram [13, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:55,809 INFO L371 AbstractCegarLoop]: === Iteration 13 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:55,809 INFO L82 PathProgramCache]: Analyzing trace with hash 923361502, now seen corresponding path program 12 times [2018-01-25 02:50:55,809 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:55,810 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:55,810 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:55,810 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:55,810 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:55,819 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:55,820 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:56,028 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 0 proven. 354 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:56,029 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:56,029 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:56,029 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:56,029 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:56,029 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:56,029 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:56,034 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 02:50:56,035 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 02:50:56,038 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:56,039 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:56,040 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:56,040 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:56,041 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:56,042 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:56,043 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:56,044 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:56,046 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:56,047 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:56,048 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:56,050 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:56,051 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:56,052 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:56,053 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:56,071 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 0 proven. 354 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:56,072 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:56,280 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 0 proven. 354 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:56,301 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:56,302 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:56,305 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 02:50:56,305 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 02:50:56,309 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:56,311 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:56,315 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:56,319 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:56,324 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:56,330 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:56,338 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:56,352 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:56,369 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:56,391 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:56,410 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:56,433 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:56,462 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:50:56,469 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:56,473 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:56,507 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 0 proven. 354 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:56,508 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:56,559 INFO L134 CoverageAnalysis]: Checked inductivity of 354 backedges. 0 proven. 354 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [MP cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (25)] Exception during sending of exit command (exit): Broken pipe [2018-01-25 02:50:56,560 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:56,561 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 27 [2018-01-25 02:50:56,561 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:56,561 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-25 02:50:56,561 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-25 02:50:56,562 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=222, Invalid=534, Unknown=0, NotChecked=0, Total=756 [2018-01-25 02:50:56,562 INFO L87 Difference]: Start difference. First operand 170 states and 194 transitions. Second operand 15 states. [2018-01-25 02:50:57,127 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:57,128 INFO L93 Difference]: Finished difference Result 203 states and 230 transitions. [2018-01-25 02:50:57,128 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-25 02:50:57,128 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 67 [2018-01-25 02:50:57,128 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:57,129 INFO L225 Difference]: With dead ends: 203 [2018-01-25 02:50:57,129 INFO L226 Difference]: Without dead ends: 197 [2018-01-25 02:50:57,130 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 280 GetRequests, 252 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=222, Invalid=534, Unknown=0, NotChecked=0, Total=756 [2018-01-25 02:50:57,130 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2018-01-25 02:50:57,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 182. [2018-01-25 02:50:57,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 182 states. [2018-01-25 02:50:57,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 182 states to 182 states and 208 transitions. [2018-01-25 02:50:57,138 INFO L78 Accepts]: Start accepts. Automaton has 182 states and 208 transitions. Word has length 67 [2018-01-25 02:50:57,138 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:57,138 INFO L432 AbstractCegarLoop]: Abstraction has 182 states and 208 transitions. [2018-01-25 02:50:57,138 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-25 02:50:57,138 INFO L276 IsEmpty]: Start isEmpty. Operand 182 states and 208 transitions. [2018-01-25 02:50:57,139 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 73 [2018-01-25 02:50:57,139 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:57,139 INFO L322 BasicCegarLoop]: trace histogram [14, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:57,139 INFO L371 AbstractCegarLoop]: === Iteration 14 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:57,139 INFO L82 PathProgramCache]: Analyzing trace with hash 356861269, now seen corresponding path program 13 times [2018-01-25 02:50:57,139 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:57,140 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:57,140 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:57,140 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:57,140 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:57,150 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:57,151 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:57,472 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 0 proven. 416 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:57,472 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:57,472 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:57,473 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:57,473 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:57,473 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:57,473 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:57,478 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:57,478 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:50:57,487 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:57,488 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:57,501 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 0 proven. 416 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:57,501 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:57,763 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 0 proven. 416 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:57,783 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:57,783 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:57,786 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:57,786 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:50:57,803 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:57,806 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:57,818 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 0 proven. 416 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:57,818 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:57,835 INFO L134 CoverageAnalysis]: Checked inductivity of 416 backedges. 0 proven. 416 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:57,836 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:57,836 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 29 [2018-01-25 02:50:57,836 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:57,836 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-25 02:50:57,837 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-25 02:50:57,837 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=253, Invalid=617, Unknown=0, NotChecked=0, Total=870 [2018-01-25 02:50:57,837 INFO L87 Difference]: Start difference. First operand 182 states and 208 transitions. Second operand 16 states. [2018-01-25 02:50:58,374 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:58,374 INFO L93 Difference]: Finished difference Result 216 states and 245 transitions. [2018-01-25 02:50:58,374 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-25 02:50:58,374 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 72 [2018-01-25 02:50:58,375 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:58,376 INFO L225 Difference]: With dead ends: 216 [2018-01-25 02:50:58,376 INFO L226 Difference]: Without dead ends: 210 [2018-01-25 02:50:58,376 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 301 GetRequests, 271 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=253, Invalid=617, Unknown=0, NotChecked=0, Total=870 [2018-01-25 02:50:58,377 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 210 states. [2018-01-25 02:50:58,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 210 to 194. [2018-01-25 02:50:58,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 194 states. [2018-01-25 02:50:58,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 194 states to 194 states and 222 transitions. [2018-01-25 02:50:58,384 INFO L78 Accepts]: Start accepts. Automaton has 194 states and 222 transitions. Word has length 72 [2018-01-25 02:50:58,384 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:58,384 INFO L432 AbstractCegarLoop]: Abstraction has 194 states and 222 transitions. [2018-01-25 02:50:58,384 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-25 02:50:58,384 INFO L276 IsEmpty]: Start isEmpty. Operand 194 states and 222 transitions. [2018-01-25 02:50:58,385 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 78 [2018-01-25 02:50:58,385 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:58,385 INFO L322 BasicCegarLoop]: trace histogram [15, 14, 14, 14, 14, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:58,385 INFO L371 AbstractCegarLoop]: === Iteration 15 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:58,386 INFO L82 PathProgramCache]: Analyzing trace with hash -1075276994, now seen corresponding path program 14 times [2018-01-25 02:50:58,386 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:58,386 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:58,386 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:50:58,387 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:58,387 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:58,393 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:58,394 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:58,602 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 0 proven. 483 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:58,602 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:58,602 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:58,603 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:58,603 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:58,603 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:58,603 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:58,608 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:50:58,608 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:58,612 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:58,618 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:58,619 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:58,621 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:58,634 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 0 proven. 483 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:58,634 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:58,892 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 0 proven. 483 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:58,913 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:58,913 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:50:58,916 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:50:58,917 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:50:58,921 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:58,932 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:50:58,940 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:50:58,943 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:50:58,961 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 0 proven. 483 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:58,961 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:50:58,975 INFO L134 CoverageAnalysis]: Checked inductivity of 483 backedges. 0 proven. 483 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:58,976 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:50:58,976 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 31 [2018-01-25 02:50:58,976 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:50:58,977 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-25 02:50:58,977 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-25 02:50:58,977 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=286, Invalid=706, Unknown=0, NotChecked=0, Total=992 [2018-01-25 02:50:58,977 INFO L87 Difference]: Start difference. First operand 194 states and 222 transitions. Second operand 17 states. [2018-01-25 02:50:59,546 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:50:59,547 INFO L93 Difference]: Finished difference Result 229 states and 260 transitions. [2018-01-25 02:50:59,547 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-25 02:50:59,547 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 77 [2018-01-25 02:50:59,547 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:50:59,548 INFO L225 Difference]: With dead ends: 229 [2018-01-25 02:50:59,549 INFO L226 Difference]: Without dead ends: 223 [2018-01-25 02:50:59,549 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 322 GetRequests, 290 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=286, Invalid=706, Unknown=0, NotChecked=0, Total=992 [2018-01-25 02:50:59,549 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 223 states. [2018-01-25 02:50:59,557 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 223 to 206. [2018-01-25 02:50:59,558 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 206 states. [2018-01-25 02:50:59,559 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 206 states to 206 states and 236 transitions. [2018-01-25 02:50:59,559 INFO L78 Accepts]: Start accepts. Automaton has 206 states and 236 transitions. Word has length 77 [2018-01-25 02:50:59,559 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:50:59,559 INFO L432 AbstractCegarLoop]: Abstraction has 206 states and 236 transitions. [2018-01-25 02:50:59,559 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-25 02:50:59,559 INFO L276 IsEmpty]: Start isEmpty. Operand 206 states and 236 transitions. [2018-01-25 02:50:59,560 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 83 [2018-01-25 02:50:59,560 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:50:59,560 INFO L322 BasicCegarLoop]: trace histogram [16, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1] [2018-01-25 02:50:59,560 INFO L371 AbstractCegarLoop]: === Iteration 16 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:50:59,560 INFO L82 PathProgramCache]: Analyzing trace with hash 904302325, now seen corresponding path program 15 times [2018-01-25 02:50:59,560 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:50:59,561 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:59,561 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:50:59,561 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:50:59,561 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:50:59,569 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:50:59,570 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:50:59,890 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 0 proven. 555 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:50:59,890 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:59,890 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:50:59,890 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:50:59,891 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:50:59,891 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:50:59,891 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:50:59,923 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 02:50:59,923 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 02:50:59,931 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:59,941 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:59,952 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:59,963 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:59,973 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:59,975 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:59,988 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:59,990 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:50:59,992 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:00,010 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:00,024 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:00,027 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:00,030 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:00,034 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:00,037 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:00,042 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:00,043 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:00,045 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:00,075 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 0 proven. 555 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:00,075 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:00,662 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 0 proven. 555 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:00,683 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:00,684 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:51:00,687 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 02:51:00,687 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 02:51:00,692 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:00,694 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:00,697 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:00,702 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:00,708 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:00,715 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:00,723 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:00,732 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:00,744 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:00,760 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:00,779 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:00,800 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:00,824 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:00,853 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:00,894 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:00,942 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:00,951 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:00,955 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:00,975 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 0 proven. 555 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:00,975 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:00,992 INFO L134 CoverageAnalysis]: Checked inductivity of 555 backedges. 0 proven. 555 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:00,993 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:51:00,993 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 33 [2018-01-25 02:51:00,993 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:51:00,994 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-25 02:51:00,994 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-25 02:51:00,994 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=321, Invalid=801, Unknown=0, NotChecked=0, Total=1122 [2018-01-25 02:51:00,994 INFO L87 Difference]: Start difference. First operand 206 states and 236 transitions. Second operand 18 states. [2018-01-25 02:51:01,712 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:51:01,713 INFO L93 Difference]: Finished difference Result 242 states and 275 transitions. [2018-01-25 02:51:01,713 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-25 02:51:01,713 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 82 [2018-01-25 02:51:01,713 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:51:01,715 INFO L225 Difference]: With dead ends: 242 [2018-01-25 02:51:01,715 INFO L226 Difference]: Without dead ends: 236 [2018-01-25 02:51:01,715 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 343 GetRequests, 309 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=321, Invalid=801, Unknown=0, NotChecked=0, Total=1122 [2018-01-25 02:51:01,716 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 236 states. [2018-01-25 02:51:01,724 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 236 to 218. [2018-01-25 02:51:01,724 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 218 states. [2018-01-25 02:51:01,726 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 218 states to 218 states and 250 transitions. [2018-01-25 02:51:01,726 INFO L78 Accepts]: Start accepts. Automaton has 218 states and 250 transitions. Word has length 82 [2018-01-25 02:51:01,727 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:51:01,727 INFO L432 AbstractCegarLoop]: Abstraction has 218 states and 250 transitions. [2018-01-25 02:51:01,727 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-25 02:51:01,727 INFO L276 IsEmpty]: Start isEmpty. Operand 218 states and 250 transitions. [2018-01-25 02:51:01,728 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-01-25 02:51:01,728 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:51:01,729 INFO L322 BasicCegarLoop]: trace histogram [17, 16, 16, 16, 16, 1, 1, 1, 1, 1, 1] [2018-01-25 02:51:01,729 INFO L371 AbstractCegarLoop]: === Iteration 17 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:51:01,729 INFO L82 PathProgramCache]: Analyzing trace with hash 2125745566, now seen corresponding path program 16 times [2018-01-25 02:51:01,729 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:51:01,730 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:01,730 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:51:01,730 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:01,730 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:51:01,739 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:01,740 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:51:02,018 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 0 proven. 632 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:02,019 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:02,019 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:51:02,019 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:51:02,019 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:51:02,019 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:02,019 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:51:02,024 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 02:51:02,024 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 02:51:02,040 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:02,042 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:02,064 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 0 proven. 632 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:02,064 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:02,393 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 0 proven. 632 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:02,414 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:02,414 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:51:02,418 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 02:51:02,418 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 02:51:02,485 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:02,490 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:02,511 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 0 proven. 632 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:02,512 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:02,533 INFO L134 CoverageAnalysis]: Checked inductivity of 632 backedges. 0 proven. 632 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:02,534 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:51:02,534 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 35 [2018-01-25 02:51:02,534 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:51:02,535 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-25 02:51:02,535 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-25 02:51:02,535 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=358, Invalid=902, Unknown=0, NotChecked=0, Total=1260 [2018-01-25 02:51:02,535 INFO L87 Difference]: Start difference. First operand 218 states and 250 transitions. Second operand 19 states. [2018-01-25 02:51:03,317 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:51:03,317 INFO L93 Difference]: Finished difference Result 255 states and 290 transitions. [2018-01-25 02:51:03,317 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-25 02:51:03,317 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 87 [2018-01-25 02:51:03,318 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:51:03,319 INFO L225 Difference]: With dead ends: 255 [2018-01-25 02:51:03,319 INFO L226 Difference]: Without dead ends: 249 [2018-01-25 02:51:03,319 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 364 GetRequests, 328 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=358, Invalid=902, Unknown=0, NotChecked=0, Total=1260 [2018-01-25 02:51:03,319 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 249 states. [2018-01-25 02:51:03,327 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 249 to 230. [2018-01-25 02:51:03,327 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 230 states. [2018-01-25 02:51:03,329 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 230 states to 230 states and 264 transitions. [2018-01-25 02:51:03,329 INFO L78 Accepts]: Start accepts. Automaton has 230 states and 264 transitions. Word has length 87 [2018-01-25 02:51:03,329 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:51:03,330 INFO L432 AbstractCegarLoop]: Abstraction has 230 states and 264 transitions. [2018-01-25 02:51:03,330 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-25 02:51:03,330 INFO L276 IsEmpty]: Start isEmpty. Operand 230 states and 264 transitions. [2018-01-25 02:51:03,331 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 93 [2018-01-25 02:51:03,331 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:51:03,331 INFO L322 BasicCegarLoop]: trace histogram [18, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1] [2018-01-25 02:51:03,331 INFO L371 AbstractCegarLoop]: === Iteration 18 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:51:03,332 INFO L82 PathProgramCache]: Analyzing trace with hash 120606869, now seen corresponding path program 17 times [2018-01-25 02:51:03,332 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:51:03,332 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:03,333 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:51:03,333 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:03,333 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:51:03,341 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:03,342 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:51:03,567 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 0 proven. 714 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:03,567 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:03,567 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:51:03,567 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:51:03,568 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:51:03,568 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:03,568 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:51:03,573 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 02:51:03,573 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:51:03,576 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:03,577 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:03,578 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:03,579 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:03,580 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:03,581 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:03,582 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:03,584 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:03,586 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:03,588 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:03,590 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:03,592 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:03,594 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:03,597 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:03,600 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:03,604 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:03,607 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:03,612 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:03,613 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:03,615 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:03,637 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 0 proven. 714 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:03,637 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:04,045 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 0 proven. 714 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:04,076 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:04,076 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:51:04,079 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 02:51:04,079 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:51:04,083 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:04,085 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:04,089 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:04,094 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:04,100 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:04,107 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:04,115 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:04,125 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:04,140 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:04,159 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:04,176 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:04,196 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:04,220 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:04,257 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:04,301 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:04,338 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:04,381 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:04,430 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:04,441 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:04,445 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:04,461 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 0 proven. 714 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:04,461 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:04,481 INFO L134 CoverageAnalysis]: Checked inductivity of 714 backedges. 0 proven. 714 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:04,482 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:51:04,482 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 37 [2018-01-25 02:51:04,482 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:51:04,483 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-25 02:51:04,483 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-25 02:51:04,483 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=397, Invalid=1009, Unknown=0, NotChecked=0, Total=1406 [2018-01-25 02:51:04,483 INFO L87 Difference]: Start difference. First operand 230 states and 264 transitions. Second operand 20 states. [2018-01-25 02:51:05,467 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:51:05,468 INFO L93 Difference]: Finished difference Result 268 states and 305 transitions. [2018-01-25 02:51:05,468 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-25 02:51:05,468 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 92 [2018-01-25 02:51:05,468 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:51:05,470 INFO L225 Difference]: With dead ends: 268 [2018-01-25 02:51:05,470 INFO L226 Difference]: Without dead ends: 262 [2018-01-25 02:51:05,471 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 385 GetRequests, 347 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=397, Invalid=1009, Unknown=0, NotChecked=0, Total=1406 [2018-01-25 02:51:05,471 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 262 states. [2018-01-25 02:51:05,477 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 262 to 242. [2018-01-25 02:51:05,477 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 242 states. [2018-01-25 02:51:05,479 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 242 states to 242 states and 278 transitions. [2018-01-25 02:51:05,479 INFO L78 Accepts]: Start accepts. Automaton has 242 states and 278 transitions. Word has length 92 [2018-01-25 02:51:05,479 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:51:05,480 INFO L432 AbstractCegarLoop]: Abstraction has 242 states and 278 transitions. [2018-01-25 02:51:05,480 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-25 02:51:05,480 INFO L276 IsEmpty]: Start isEmpty. Operand 242 states and 278 transitions. [2018-01-25 02:51:05,481 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 98 [2018-01-25 02:51:05,481 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:51:05,481 INFO L322 BasicCegarLoop]: trace histogram [19, 18, 18, 18, 18, 1, 1, 1, 1, 1, 1] [2018-01-25 02:51:05,481 INFO L371 AbstractCegarLoop]: === Iteration 19 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:51:05,482 INFO L82 PathProgramCache]: Analyzing trace with hash 2070056958, now seen corresponding path program 18 times [2018-01-25 02:51:05,482 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:51:05,483 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:05,483 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:51:05,483 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:05,483 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:51:05,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:05,494 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:51:06,415 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 0 proven. 801 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:06,415 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:06,415 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:51:06,415 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:51:06,415 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:51:06,415 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:06,415 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:51:06,420 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 02:51:06,420 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 02:51:06,425 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:06,426 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:06,426 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:06,427 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:06,428 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:06,429 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:06,430 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:06,431 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:06,433 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:06,434 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:06,436 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:06,438 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:06,440 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:06,442 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:06,444 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:06,446 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:06,450 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:06,453 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:06,457 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:06,458 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:06,460 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:06,484 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 0 proven. 801 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:06,485 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:07,211 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 0 proven. 801 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:07,232 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:07,232 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:51:07,236 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 02:51:07,236 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 02:51:07,242 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:07,245 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:07,249 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:07,253 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:07,258 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:07,264 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:07,271 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:07,282 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:07,310 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:07,347 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:07,384 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:07,409 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:07,435 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:07,465 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:07,500 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:07,545 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:07,599 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:07,694 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:07,815 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:07,827 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:07,832 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:07,864 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 0 proven. 801 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:07,864 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:07,890 INFO L134 CoverageAnalysis]: Checked inductivity of 801 backedges. 0 proven. 801 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:07,891 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:51:07,891 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 39 [2018-01-25 02:51:07,891 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:51:07,892 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-25 02:51:07,892 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-25 02:51:07,892 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=438, Invalid=1122, Unknown=0, NotChecked=0, Total=1560 [2018-01-25 02:51:07,893 INFO L87 Difference]: Start difference. First operand 242 states and 278 transitions. Second operand 21 states. [2018-01-25 02:51:09,048 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:51:09,048 INFO L93 Difference]: Finished difference Result 281 states and 320 transitions. [2018-01-25 02:51:09,049 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-25 02:51:09,049 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 97 [2018-01-25 02:51:09,049 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:51:09,050 INFO L225 Difference]: With dead ends: 281 [2018-01-25 02:51:09,050 INFO L226 Difference]: Without dead ends: 275 [2018-01-25 02:51:09,051 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 406 GetRequests, 366 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 1.5s TimeCoverageRelationStatistics Valid=438, Invalid=1122, Unknown=0, NotChecked=0, Total=1560 [2018-01-25 02:51:09,051 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 275 states. [2018-01-25 02:51:09,057 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 275 to 254. [2018-01-25 02:51:09,058 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 254 states. [2018-01-25 02:51:09,059 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 254 states to 254 states and 292 transitions. [2018-01-25 02:51:09,059 INFO L78 Accepts]: Start accepts. Automaton has 254 states and 292 transitions. Word has length 97 [2018-01-25 02:51:09,059 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:51:09,059 INFO L432 AbstractCegarLoop]: Abstraction has 254 states and 292 transitions. [2018-01-25 02:51:09,059 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-25 02:51:09,059 INFO L276 IsEmpty]: Start isEmpty. Operand 254 states and 292 transitions. [2018-01-25 02:51:09,060 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 103 [2018-01-25 02:51:09,060 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:51:09,060 INFO L322 BasicCegarLoop]: trace histogram [20, 19, 19, 19, 19, 1, 1, 1, 1, 1, 1] [2018-01-25 02:51:09,060 INFO L371 AbstractCegarLoop]: === Iteration 20 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:51:09,060 INFO L82 PathProgramCache]: Analyzing trace with hash 183274037, now seen corresponding path program 19 times [2018-01-25 02:51:09,060 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:51:09,061 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:09,061 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:51:09,061 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:09,062 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:51:09,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:09,069 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:51:09,675 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 0 proven. 893 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:09,676 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:09,676 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:51:09,676 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:51:09,676 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:51:09,676 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:09,676 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:51:09,682 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:51:09,682 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:51:09,696 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:09,698 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:09,725 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 0 proven. 893 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:09,726 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:10,527 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 0 proven. 893 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:10,547 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:10,547 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:51:10,550 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:51:10,551 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:51:10,574 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:10,578 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:10,597 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 0 proven. 893 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:10,597 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:10,621 INFO L134 CoverageAnalysis]: Checked inductivity of 893 backedges. 0 proven. 893 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:10,622 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:51:10,622 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 41 [2018-01-25 02:51:10,622 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:51:10,622 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-25 02:51:10,623 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-25 02:51:10,623 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=481, Invalid=1241, Unknown=0, NotChecked=0, Total=1722 [2018-01-25 02:51:10,623 INFO L87 Difference]: Start difference. First operand 254 states and 292 transitions. Second operand 22 states. [2018-01-25 02:51:11,662 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:51:11,662 INFO L93 Difference]: Finished difference Result 294 states and 335 transitions. [2018-01-25 02:51:11,662 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-25 02:51:11,662 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 102 [2018-01-25 02:51:11,663 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:51:11,664 INFO L225 Difference]: With dead ends: 294 [2018-01-25 02:51:11,664 INFO L226 Difference]: Without dead ends: 288 [2018-01-25 02:51:11,664 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 427 GetRequests, 385 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=481, Invalid=1241, Unknown=0, NotChecked=0, Total=1722 [2018-01-25 02:51:11,665 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 288 states. [2018-01-25 02:51:11,671 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 288 to 266. [2018-01-25 02:51:11,671 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 266 states. [2018-01-25 02:51:11,672 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 266 states to 266 states and 306 transitions. [2018-01-25 02:51:11,673 INFO L78 Accepts]: Start accepts. Automaton has 266 states and 306 transitions. Word has length 102 [2018-01-25 02:51:11,673 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:51:11,673 INFO L432 AbstractCegarLoop]: Abstraction has 266 states and 306 transitions. [2018-01-25 02:51:11,673 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-25 02:51:11,673 INFO L276 IsEmpty]: Start isEmpty. Operand 266 states and 306 transitions. [2018-01-25 02:51:11,674 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-01-25 02:51:11,674 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:51:11,674 INFO L322 BasicCegarLoop]: trace histogram [21, 20, 20, 20, 20, 1, 1, 1, 1, 1, 1] [2018-01-25 02:51:11,674 INFO L371 AbstractCegarLoop]: === Iteration 21 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:51:11,674 INFO L82 PathProgramCache]: Analyzing trace with hash -1033282978, now seen corresponding path program 20 times [2018-01-25 02:51:11,674 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:51:11,675 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:11,675 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:51:11,675 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:11,675 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:51:11,681 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:11,682 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:51:12,564 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:12,565 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:12,565 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:51:12,565 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:51:12,565 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:51:12,565 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:12,565 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:51:12,570 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:51:12,570 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:51:12,574 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:12,585 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:12,587 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:12,590 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:12,619 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:12,620 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:13,173 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:13,206 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:13,206 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:51:13,209 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:51:13,209 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:51:13,215 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:13,235 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:13,252 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:13,259 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:13,330 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:13,331 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:13,402 INFO L134 CoverageAnalysis]: Checked inductivity of 990 backedges. 0 proven. 990 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:13,403 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:51:13,403 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 43 [2018-01-25 02:51:13,403 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:51:13,404 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-25 02:51:13,404 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-25 02:51:13,405 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=526, Invalid=1366, Unknown=0, NotChecked=0, Total=1892 [2018-01-25 02:51:13,405 INFO L87 Difference]: Start difference. First operand 266 states and 306 transitions. Second operand 23 states. [2018-01-25 02:51:14,525 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:51:14,525 INFO L93 Difference]: Finished difference Result 307 states and 350 transitions. [2018-01-25 02:51:14,525 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-25 02:51:14,525 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 107 [2018-01-25 02:51:14,525 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:51:14,526 INFO L225 Difference]: With dead ends: 307 [2018-01-25 02:51:14,526 INFO L226 Difference]: Without dead ends: 301 [2018-01-25 02:51:14,527 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 448 GetRequests, 404 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 1.3s TimeCoverageRelationStatistics Valid=526, Invalid=1366, Unknown=0, NotChecked=0, Total=1892 [2018-01-25 02:51:14,527 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 301 states. [2018-01-25 02:51:14,535 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 301 to 278. [2018-01-25 02:51:14,535 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 278 states. [2018-01-25 02:51:14,536 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 278 states to 278 states and 320 transitions. [2018-01-25 02:51:14,536 INFO L78 Accepts]: Start accepts. Automaton has 278 states and 320 transitions. Word has length 107 [2018-01-25 02:51:14,537 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:51:14,537 INFO L432 AbstractCegarLoop]: Abstraction has 278 states and 320 transitions. [2018-01-25 02:51:14,537 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-25 02:51:14,537 INFO L276 IsEmpty]: Start isEmpty. Operand 278 states and 320 transitions. [2018-01-25 02:51:14,537 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 113 [2018-01-25 02:51:14,538 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:51:14,538 INFO L322 BasicCegarLoop]: trace histogram [22, 21, 21, 21, 21, 1, 1, 1, 1, 1, 1] [2018-01-25 02:51:14,538 INFO L371 AbstractCegarLoop]: === Iteration 22 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:51:14,538 INFO L82 PathProgramCache]: Analyzing trace with hash -1905968171, now seen corresponding path program 21 times [2018-01-25 02:51:14,538 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:51:14,538 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:14,539 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:51:14,539 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:14,539 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:51:14,545 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:14,546 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:51:15,222 INFO L134 CoverageAnalysis]: Checked inductivity of 1092 backedges. 0 proven. 1092 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:15,222 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:15,222 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:51:15,222 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:51:15,222 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:51:15,222 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:15,222 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:51:15,228 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 02:51:15,228 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 02:51:15,232 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,233 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,234 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,235 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,236 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,237 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,238 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,240 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,241 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,242 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,244 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,246 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,248 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,250 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,253 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,255 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,258 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,261 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,264 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,268 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,273 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,277 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,278 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:15,280 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:15,309 INFO L134 CoverageAnalysis]: Checked inductivity of 1092 backedges. 0 proven. 1092 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:15,309 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:15,843 INFO L134 CoverageAnalysis]: Checked inductivity of 1092 backedges. 0 proven. 1092 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:15,864 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:15,864 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:51:15,867 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 02:51:15,867 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 02:51:15,872 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,874 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,877 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,882 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,888 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,895 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,902 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,911 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,922 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,938 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,962 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:15,994 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:16,031 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:16,060 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:16,103 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:16,149 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:16,196 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:16,250 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:16,315 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:16,408 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:16,510 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:16,608 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:16,623 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:16,628 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:16,661 INFO L134 CoverageAnalysis]: Checked inductivity of 1092 backedges. 0 proven. 1092 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:16,662 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:16,690 INFO L134 CoverageAnalysis]: Checked inductivity of 1092 backedges. 0 proven. 1092 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:16,692 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:51:16,692 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 45 [2018-01-25 02:51:16,692 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:51:16,692 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-25 02:51:16,693 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-25 02:51:16,693 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=573, Invalid=1497, Unknown=0, NotChecked=0, Total=2070 [2018-01-25 02:51:16,694 INFO L87 Difference]: Start difference. First operand 278 states and 320 transitions. Second operand 24 states. [2018-01-25 02:51:17,940 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:51:17,941 INFO L93 Difference]: Finished difference Result 320 states and 365 transitions. [2018-01-25 02:51:17,941 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-25 02:51:17,941 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 112 [2018-01-25 02:51:17,941 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:51:17,943 INFO L225 Difference]: With dead ends: 320 [2018-01-25 02:51:17,943 INFO L226 Difference]: Without dead ends: 314 [2018-01-25 02:51:17,943 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 469 GetRequests, 423 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=573, Invalid=1497, Unknown=0, NotChecked=0, Total=2070 [2018-01-25 02:51:17,944 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 314 states. [2018-01-25 02:51:17,950 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 314 to 290. [2018-01-25 02:51:17,950 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 290 states. [2018-01-25 02:51:17,951 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 290 states to 290 states and 334 transitions. [2018-01-25 02:51:17,951 INFO L78 Accepts]: Start accepts. Automaton has 290 states and 334 transitions. Word has length 112 [2018-01-25 02:51:17,952 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:51:17,952 INFO L432 AbstractCegarLoop]: Abstraction has 290 states and 334 transitions. [2018-01-25 02:51:17,952 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-25 02:51:17,952 INFO L276 IsEmpty]: Start isEmpty. Operand 290 states and 334 transitions. [2018-01-25 02:51:17,952 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 118 [2018-01-25 02:51:17,952 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:51:17,953 INFO L322 BasicCegarLoop]: trace histogram [23, 22, 22, 22, 22, 1, 1, 1, 1, 1, 1] [2018-01-25 02:51:17,953 INFO L371 AbstractCegarLoop]: === Iteration 23 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:51:17,953 INFO L82 PathProgramCache]: Analyzing trace with hash -994136898, now seen corresponding path program 22 times [2018-01-25 02:51:17,953 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:51:17,953 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:17,954 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:51:17,954 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:17,954 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:51:17,960 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:17,960 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:51:18,249 INFO L134 CoverageAnalysis]: Checked inductivity of 1199 backedges. 0 proven. 1199 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:18,249 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:18,249 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:51:18,249 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:51:18,249 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:51:18,249 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:18,249 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:51:18,254 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 02:51:18,255 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 02:51:18,342 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:18,345 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:18,367 INFO L134 CoverageAnalysis]: Checked inductivity of 1199 backedges. 0 proven. 1199 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:18,367 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:19,253 INFO L134 CoverageAnalysis]: Checked inductivity of 1199 backedges. 0 proven. 1199 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:19,273 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:19,274 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:51:19,277 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 02:51:19,277 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 02:51:19,402 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:19,407 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:19,436 INFO L134 CoverageAnalysis]: Checked inductivity of 1199 backedges. 0 proven. 1199 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:19,436 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:19,472 INFO L134 CoverageAnalysis]: Checked inductivity of 1199 backedges. 0 proven. 1199 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:19,474 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:51:19,474 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 47 [2018-01-25 02:51:19,474 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:51:19,474 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-25 02:51:19,475 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-25 02:51:19,475 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=622, Invalid=1634, Unknown=0, NotChecked=0, Total=2256 [2018-01-25 02:51:19,475 INFO L87 Difference]: Start difference. First operand 290 states and 334 transitions. Second operand 25 states. [2018-01-25 02:51:20,893 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:51:20,894 INFO L93 Difference]: Finished difference Result 333 states and 380 transitions. [2018-01-25 02:51:20,894 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-25 02:51:20,894 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 117 [2018-01-25 02:51:20,894 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:51:20,895 INFO L225 Difference]: With dead ends: 333 [2018-01-25 02:51:20,895 INFO L226 Difference]: Without dead ends: 327 [2018-01-25 02:51:20,896 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 490 GetRequests, 442 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=622, Invalid=1634, Unknown=0, NotChecked=0, Total=2256 [2018-01-25 02:51:20,896 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 327 states. [2018-01-25 02:51:20,904 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 327 to 302. [2018-01-25 02:51:20,904 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 302 states. [2018-01-25 02:51:20,905 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 302 states to 302 states and 348 transitions. [2018-01-25 02:51:20,905 INFO L78 Accepts]: Start accepts. Automaton has 302 states and 348 transitions. Word has length 117 [2018-01-25 02:51:20,906 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:51:20,906 INFO L432 AbstractCegarLoop]: Abstraction has 302 states and 348 transitions. [2018-01-25 02:51:20,906 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-25 02:51:20,906 INFO L276 IsEmpty]: Start isEmpty. Operand 302 states and 348 transitions. [2018-01-25 02:51:20,907 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-01-25 02:51:20,907 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:51:20,907 INFO L322 BasicCegarLoop]: trace histogram [24, 23, 23, 23, 23, 1, 1, 1, 1, 1, 1] [2018-01-25 02:51:20,907 INFO L371 AbstractCegarLoop]: === Iteration 24 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:51:20,907 INFO L82 PathProgramCache]: Analyzing trace with hash 1248093557, now seen corresponding path program 23 times [2018-01-25 02:51:20,907 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:51:20,907 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:20,908 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:51:20,908 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:20,908 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:51:20,916 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:20,917 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:51:21,279 INFO L134 CoverageAnalysis]: Checked inductivity of 1311 backedges. 0 proven. 1311 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:21,279 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:21,279 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:51:21,279 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:51:21,279 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:51:21,279 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:21,279 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:51:21,284 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 02:51:21,285 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:51:21,289 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,292 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,293 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,294 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,295 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,296 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,297 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,299 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,300 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,302 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,304 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,306 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,309 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,312 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,315 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,318 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,322 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,326 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,331 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,336 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,342 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,348 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,355 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,363 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:21,364 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:21,367 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:21,391 INFO L134 CoverageAnalysis]: Checked inductivity of 1311 backedges. 0 proven. 1311 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:21,391 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:22,084 INFO L134 CoverageAnalysis]: Checked inductivity of 1311 backedges. 0 proven. 1311 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:22,104 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:22,105 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:51:22,108 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 02:51:22,108 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:51:22,114 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:22,116 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:22,122 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:22,127 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:22,133 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:22,141 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:22,150 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:22,160 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:22,172 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:22,190 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:22,217 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:22,251 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:22,281 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:22,309 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:22,351 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:22,401 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:22,443 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:22,493 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:22,548 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:22,637 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:22,746 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:22,827 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:22,917 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:23,015 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:23,038 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:23,043 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:23,065 INFO L134 CoverageAnalysis]: Checked inductivity of 1311 backedges. 0 proven. 1311 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:23,065 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:23,091 INFO L134 CoverageAnalysis]: Checked inductivity of 1311 backedges. 0 proven. 1311 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [MP cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (47)] Exception during sending of exit command (exit): Broken pipe [2018-01-25 02:51:23,093 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:51:23,093 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 49 [2018-01-25 02:51:23,094 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:51:23,094 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-25 02:51:23,094 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-25 02:51:23,095 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=673, Invalid=1777, Unknown=0, NotChecked=0, Total=2450 [2018-01-25 02:51:23,095 INFO L87 Difference]: Start difference. First operand 302 states and 348 transitions. Second operand 26 states. [2018-01-25 02:51:24,959 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:51:24,959 INFO L93 Difference]: Finished difference Result 346 states and 395 transitions. [2018-01-25 02:51:24,960 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-25 02:51:24,960 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 122 [2018-01-25 02:51:24,960 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:51:24,962 INFO L225 Difference]: With dead ends: 346 [2018-01-25 02:51:24,962 INFO L226 Difference]: Without dead ends: 340 [2018-01-25 02:51:24,963 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 511 GetRequests, 461 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=673, Invalid=1777, Unknown=0, NotChecked=0, Total=2450 [2018-01-25 02:51:24,963 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 340 states. [2018-01-25 02:51:24,972 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 340 to 314. [2018-01-25 02:51:24,972 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 314 states. [2018-01-25 02:51:24,974 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 314 states to 314 states and 362 transitions. [2018-01-25 02:51:24,974 INFO L78 Accepts]: Start accepts. Automaton has 314 states and 362 transitions. Word has length 122 [2018-01-25 02:51:24,975 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:51:24,975 INFO L432 AbstractCegarLoop]: Abstraction has 314 states and 362 transitions. [2018-01-25 02:51:24,975 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-25 02:51:24,975 INFO L276 IsEmpty]: Start isEmpty. Operand 314 states and 362 transitions. [2018-01-25 02:51:24,976 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 128 [2018-01-25 02:51:24,976 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:51:24,977 INFO L322 BasicCegarLoop]: trace histogram [25, 24, 24, 24, 24, 1, 1, 1, 1, 1, 1] [2018-01-25 02:51:24,977 INFO L371 AbstractCegarLoop]: === Iteration 25 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:51:24,977 INFO L82 PathProgramCache]: Analyzing trace with hash -1210546402, now seen corresponding path program 24 times [2018-01-25 02:51:24,977 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:51:24,978 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:24,978 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:51:24,978 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:24,978 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:51:24,987 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:24,988 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:51:25,459 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 0 proven. 1428 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:25,459 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:25,459 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:51:25,459 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:51:25,459 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:51:25,459 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:25,459 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:51:25,464 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 02:51:25,464 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 02:51:25,469 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,470 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,471 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,472 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,473 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,474 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,475 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,476 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,477 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,478 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,480 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,481 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,483 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,485 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,486 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,488 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,490 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,493 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,495 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,497 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,500 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,504 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,508 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,512 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,516 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:25,517 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:25,520 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:25,595 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 0 proven. 1428 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:25,595 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:26,259 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 0 proven. 1428 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:26,280 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:26,280 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:51:26,283 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 02:51:26,283 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 02:51:26,288 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:26,290 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:26,293 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:26,298 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:26,302 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:26,308 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:26,315 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:26,326 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:26,338 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:26,353 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:26,376 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:26,400 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:26,430 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:26,465 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:26,500 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:26,540 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:26,588 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:26,650 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:26,723 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:26,812 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:26,933 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:27,133 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:27,383 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:27,792 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:28,117 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 02:51:28,137 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:28,143 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:28,197 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 0 proven. 1428 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:28,197 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:28,237 INFO L134 CoverageAnalysis]: Checked inductivity of 1428 backedges. 0 proven. 1428 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:28,239 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:51:28,239 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 51 [2018-01-25 02:51:28,239 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:51:28,239 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-25 02:51:28,240 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-25 02:51:28,240 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=726, Invalid=1926, Unknown=0, NotChecked=0, Total=2652 [2018-01-25 02:51:28,241 INFO L87 Difference]: Start difference. First operand 314 states and 362 transitions. Second operand 27 states. [2018-01-25 02:51:30,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:51:30,227 INFO L93 Difference]: Finished difference Result 359 states and 410 transitions. [2018-01-25 02:51:30,227 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-25 02:51:30,227 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 127 [2018-01-25 02:51:30,228 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:51:30,229 INFO L225 Difference]: With dead ends: 359 [2018-01-25 02:51:30,229 INFO L226 Difference]: Without dead ends: 353 [2018-01-25 02:51:30,230 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 532 GetRequests, 480 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 1.0s TimeCoverageRelationStatistics Valid=726, Invalid=1926, Unknown=0, NotChecked=0, Total=2652 [2018-01-25 02:51:30,230 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 353 states. [2018-01-25 02:51:30,239 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 353 to 326. [2018-01-25 02:51:30,240 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 326 states. [2018-01-25 02:51:30,241 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 326 states to 326 states and 376 transitions. [2018-01-25 02:51:30,241 INFO L78 Accepts]: Start accepts. Automaton has 326 states and 376 transitions. Word has length 127 [2018-01-25 02:51:30,242 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:51:30,242 INFO L432 AbstractCegarLoop]: Abstraction has 326 states and 376 transitions. [2018-01-25 02:51:30,242 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-25 02:51:30,242 INFO L276 IsEmpty]: Start isEmpty. Operand 326 states and 376 transitions. [2018-01-25 02:51:30,243 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 133 [2018-01-25 02:51:30,243 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:51:30,244 INFO L322 BasicCegarLoop]: trace histogram [26, 25, 25, 25, 25, 1, 1, 1, 1, 1, 1] [2018-01-25 02:51:30,244 INFO L371 AbstractCegarLoop]: === Iteration 26 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:51:30,244 INFO L82 PathProgramCache]: Analyzing trace with hash 53741333, now seen corresponding path program 25 times [2018-01-25 02:51:30,244 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:51:30,245 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:30,247 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:51:30,247 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:30,247 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:51:30,256 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:30,257 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:51:30,776 INFO L134 CoverageAnalysis]: Checked inductivity of 1550 backedges. 0 proven. 1550 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:30,776 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:30,776 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:51:30,776 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:51:30,776 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:51:30,776 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:30,777 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:51:30,782 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:51:30,782 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:51:30,802 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:30,804 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:30,829 INFO L134 CoverageAnalysis]: Checked inductivity of 1550 backedges. 0 proven. 1550 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:30,829 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:31,576 INFO L134 CoverageAnalysis]: Checked inductivity of 1550 backedges. 0 proven. 1550 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:31,595 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:31,596 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:51:31,598 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:51:31,599 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 02:51:31,629 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:31,632 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:31,657 INFO L134 CoverageAnalysis]: Checked inductivity of 1550 backedges. 0 proven. 1550 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:31,657 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:31,686 INFO L134 CoverageAnalysis]: Checked inductivity of 1550 backedges. 0 proven. 1550 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:31,687 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:51:31,687 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 53 [2018-01-25 02:51:31,687 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:51:31,688 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-25 02:51:31,688 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-25 02:51:31,689 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=781, Invalid=2081, Unknown=0, NotChecked=0, Total=2862 [2018-01-25 02:51:31,689 INFO L87 Difference]: Start difference. First operand 326 states and 376 transitions. Second operand 28 states. [2018-01-25 02:51:33,484 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:51:33,484 INFO L93 Difference]: Finished difference Result 372 states and 425 transitions. [2018-01-25 02:51:33,485 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-25 02:51:33,485 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 132 [2018-01-25 02:51:33,485 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:51:33,486 INFO L225 Difference]: With dead ends: 372 [2018-01-25 02:51:33,486 INFO L226 Difference]: Without dead ends: 366 [2018-01-25 02:51:33,488 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 553 GetRequests, 499 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=781, Invalid=2081, Unknown=0, NotChecked=0, Total=2862 [2018-01-25 02:51:33,488 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 366 states. [2018-01-25 02:51:33,499 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 366 to 338. [2018-01-25 02:51:33,499 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 338 states. [2018-01-25 02:51:33,501 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 338 states to 338 states and 390 transitions. [2018-01-25 02:51:33,501 INFO L78 Accepts]: Start accepts. Automaton has 338 states and 390 transitions. Word has length 132 [2018-01-25 02:51:33,501 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:51:33,501 INFO L432 AbstractCegarLoop]: Abstraction has 338 states and 390 transitions. [2018-01-25 02:51:33,501 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-25 02:51:33,502 INFO L276 IsEmpty]: Start isEmpty. Operand 338 states and 390 transitions. [2018-01-25 02:51:33,502 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 138 [2018-01-25 02:51:33,502 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:51:33,502 INFO L322 BasicCegarLoop]: trace histogram [27, 26, 26, 26, 26, 1, 1, 1, 1, 1, 1] [2018-01-25 02:51:33,503 INFO L371 AbstractCegarLoop]: === Iteration 27 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:51:33,503 INFO L82 PathProgramCache]: Analyzing trace with hash -173217410, now seen corresponding path program 26 times [2018-01-25 02:51:33,503 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:51:33,503 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:33,503 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 02:51:33,504 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:33,504 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:51:33,510 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:33,512 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:51:33,992 INFO L134 CoverageAnalysis]: Checked inductivity of 1677 backedges. 0 proven. 1677 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:33,992 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:33,992 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:51:33,992 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:51:33,992 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:51:33,992 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:33,993 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:51:33,999 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:51:33,999 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:51:34,004 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:34,016 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:34,024 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:34,028 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:34,074 INFO L134 CoverageAnalysis]: Checked inductivity of 1677 backedges. 0 proven. 1677 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:34,074 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:34,949 INFO L134 CoverageAnalysis]: Checked inductivity of 1677 backedges. 0 proven. 1677 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:34,973 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:34,973 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 02:51:34,976 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 02:51:34,976 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 02:51:34,983 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:35,003 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 02:51:35,017 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:35,021 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:35,048 INFO L134 CoverageAnalysis]: Checked inductivity of 1677 backedges. 0 proven. 1677 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:35,048 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 02:51:35,081 INFO L134 CoverageAnalysis]: Checked inductivity of 1677 backedges. 0 proven. 1677 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:35,082 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 02:51:35,083 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 55 [2018-01-25 02:51:35,083 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 02:51:35,083 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-25 02:51:35,084 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-25 02:51:35,084 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=838, Invalid=2242, Unknown=0, NotChecked=0, Total=3080 [2018-01-25 02:51:35,085 INFO L87 Difference]: Start difference. First operand 338 states and 390 transitions. Second operand 29 states. [2018-01-25 02:51:37,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 02:51:37,009 INFO L93 Difference]: Finished difference Result 385 states and 440 transitions. [2018-01-25 02:51:37,010 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-25 02:51:37,010 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 137 [2018-01-25 02:51:37,010 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 02:51:37,011 INFO L225 Difference]: With dead ends: 385 [2018-01-25 02:51:37,011 INFO L226 Difference]: Without dead ends: 379 [2018-01-25 02:51:37,012 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 574 GetRequests, 518 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=838, Invalid=2242, Unknown=0, NotChecked=0, Total=3080 [2018-01-25 02:51:37,013 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 379 states. [2018-01-25 02:51:37,023 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 379 to 350. [2018-01-25 02:51:37,023 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 350 states. [2018-01-25 02:51:37,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 350 states to 350 states and 404 transitions. [2018-01-25 02:51:37,025 INFO L78 Accepts]: Start accepts. Automaton has 350 states and 404 transitions. Word has length 137 [2018-01-25 02:51:37,026 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 02:51:37,026 INFO L432 AbstractCegarLoop]: Abstraction has 350 states and 404 transitions. [2018-01-25 02:51:37,026 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-25 02:51:37,026 INFO L276 IsEmpty]: Start isEmpty. Operand 350 states and 404 transitions. [2018-01-25 02:51:37,027 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 143 [2018-01-25 02:51:37,028 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 02:51:37,028 INFO L322 BasicCegarLoop]: trace histogram [28, 27, 27, 27, 27, 1, 1, 1, 1, 1, 1] [2018-01-25 02:51:37,028 INFO L371 AbstractCegarLoop]: === Iteration 28 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr5AssertViolation, mainErr4AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 02:51:37,028 INFO L82 PathProgramCache]: Analyzing trace with hash 681451701, now seen corresponding path program 27 times [2018-01-25 02:51:37,028 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 02:51:37,029 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:37,029 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 02:51:37,029 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 02:51:37,029 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 02:51:37,039 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 02:51:37,040 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 02:51:38,666 INFO L134 CoverageAnalysis]: Checked inductivity of 1809 backedges. 0 proven. 1809 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 02:51:38,666 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:38,667 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 02:51:38,667 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 02:51:38,667 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 02:51:38,667 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 02:51:38,667 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 02:51:38,673 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 02:51:38,673 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 02:51:38,680 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:38,683 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:38,685 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:38,687 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:38,688 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:38,691 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:38,693 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:38,695 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:38,698 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:38,701 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:38,704 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command Received shutdown request... [2018-01-25 02:51:38,711 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:38,731 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:38,741 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:38,754 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:38,767 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:38,771 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:38,788 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:38,794 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:38,801 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:38,809 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:38,814 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:38,819 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:38,825 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:38,831 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:38,839 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:38,846 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:38,854 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 02:51:38,856 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 02:51:38,859 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 02:51:38,873 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-25 02:51:38,874 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-25 02:51:38,877 WARN L187 ceAbstractionStarter]: Timeout [2018-01-25 02:51:38,877 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 25.01 02:51:38 BoogieIcfgContainer [2018-01-25 02:51:38,877 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-25 02:51:38,878 INFO L168 Benchmark]: Toolchain (without parser) took 53381.08 ms. Allocated memory was 297.8 MB in the beginning and 738.2 MB in the end (delta: 440.4 MB). Free memory was 258.7 MB in the beginning and 526.8 MB in the end (delta: -268.1 MB). Peak memory consumption was 172.3 MB. Max. memory is 5.3 GB. [2018-01-25 02:51:38,879 INFO L168 Benchmark]: CDTParser took 0.29 ms. Allocated memory is still 297.8 MB. Free memory is still 263.7 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-25 02:51:38,879 INFO L168 Benchmark]: CACSL2BoogieTranslator took 203.61 ms. Allocated memory is still 297.8 MB. Free memory was 257.7 MB in the beginning and 250.6 MB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 5.3 GB. [2018-01-25 02:51:38,879 INFO L168 Benchmark]: Boogie Preprocessor took 29.39 ms. Allocated memory is still 297.8 MB. Free memory was 250.6 MB in the beginning and 248.6 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-25 02:51:38,879 INFO L168 Benchmark]: RCFGBuilder took 200.88 ms. Allocated memory is still 297.8 MB. Free memory was 248.6 MB in the beginning and 236.4 MB in the end (delta: 12.1 MB). Peak memory consumption was 12.1 MB. Max. memory is 5.3 GB. [2018-01-25 02:51:38,880 INFO L168 Benchmark]: TraceAbstraction took 52935.50 ms. Allocated memory was 297.8 MB in the beginning and 738.2 MB in the end (delta: 440.4 MB). Free memory was 236.4 MB in the beginning and 526.8 MB in the end (delta: -290.4 MB). Peak memory consumption was 150.0 MB. Max. memory is 5.3 GB. [2018-01-25 02:51:38,882 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.29 ms. Allocated memory is still 297.8 MB. Free memory is still 263.7 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 203.61 ms. Allocated memory is still 297.8 MB. Free memory was 257.7 MB in the beginning and 250.6 MB in the end (delta: 7.1 MB). Peak memory consumption was 7.1 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 29.39 ms. Allocated memory is still 297.8 MB. Free memory was 250.6 MB in the beginning and 248.6 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 200.88 ms. Allocated memory is still 297.8 MB. Free memory was 248.6 MB in the beginning and 236.4 MB in the end (delta: 12.1 MB). Peak memory consumption was 12.1 MB. Max. memory is 5.3 GB. * TraceAbstraction took 52935.50 ms. Allocated memory was 297.8 MB in the beginning and 738.2 MB in the end (delta: 440.4 MB). Free memory was 236.4 MB in the beginning and 526.8 MB in the end (delta: -290.4 MB). Peak memory consumption was 150.0 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 10 LocStat_MAX_WEQGRAPH_SIZE : 0 LocStat_MAX_SIZEOF_WEQEDGELABEL : 0 LocStat_NO_SUPPORTING_EQUALITIES : 0 LocStat_NO_SUPPORTING_DISEQUALITIES : 4 LocStat_NO_DISJUNCTIONS : -20 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 15 TransStat_MAX_WEQGRAPH_SIZE : 3 TransStat_MAX_SIZEOF_WEQEDGELABEL : 2 TransStat_NO_SUPPORTING_EQUALITIES : 5 TransStat_NO_SUPPORTING_DISEQUALITIES : 1 TransStat_NO_DISJUNCTIONS : 16 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 5.256606 RENAME_VARIABLES(MILLISECONDS) : 0.491269 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 5.179318 PROJECTAWAY(MILLISECONDS) : 9.370589 ADD_WEAK_EQUALITY(MILLISECONDS) : 2.949006 DISJOIN(MILLISECONDS) : 0.230156 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.530338 ADD_EQUALITY(MILLISECONDS) : 0.059568 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.824714 #CONJOIN_DISJUNCTIVE : 36 #RENAME_VARIABLES : 82 #UNFREEZE : 0 #CONJOIN : 48 #PROJECTAWAY : 57 #ADD_WEAK_EQUALITY : 1 #DISJOIN : 10 #RENAME_VARIABLES_DISJUNCTIVE : 77 #ADD_EQUALITY : 5 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 1 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 7]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 7). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 28, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 30 known predicates. - TimeoutResultAtElement [Line: 8]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 8). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 28, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 30 known predicates. - TimeoutResultAtElement [Line: 13]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 13). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 28, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 30 known predicates. - TimeoutResultAtElement [Line: 13]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 13). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 28, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 30 known predicates. - TimeoutResultAtElement [Line: 12]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 12). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 28, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 30 known predicates. - TimeoutResultAtElement [Line: 8]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 8). Cancelled while BasicCegarLoop was analyzing trace of length 143 with TraceHistMax 28, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 30 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 34 locations, 6 error locations. TIMEOUT Result, 52.8s OverallTime, 28 OverallIterations, 28 TraceHistogramMax, 21.7s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 4190 SDtfs, 2352 SDslu, 55830 SDs, 0 SdLazy, 50432 SolverSat, 891 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 17.1s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 8101 GetRequests, 7294 SyntacticMatches, 52 SemanticMatches, 755 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 377 ImplicationChecksByTransitivity, 16.4s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=350occurred in iteration=27, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.4s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.3s AutomataMinimizationTime, 27 MinimizatonAttempts, 432 StatesRemovedByMinimization, 27 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 6.5s SatisfiabilityAnalysisTime, 20.2s InterpolantComputationTime, 5818 NumberOfCodeBlocks, 5818 NumberOfCodeBlocksAsserted, 425 NumberOfCheckSat, 9561 ConstructedInterpolants, 0 QuantifiedInterpolants, 6628743 SizeOfPredicates, 0 NumberOfNonLiveVariables, 5642 ConjunctsInSsa, 1560 ConjunctsInUnsatCore, 131 InterpolantComputations, 1 PerfectInterpolantSequences, 0/76635 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_strcpy_original_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-25_02-51-38-893.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_strcpy_original_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-25_02-51-38-893.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_strcpy_original_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-25_02-51-38-893.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_strcpy_original_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_preciseopt.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-25_02-51-38-893.csv Completed graceful shutdown