java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf -i ../../../trunk/examples/svcomp/memsafety/20051113-1.c_false-valid-memtrack.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-25 05:37:05,949 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-25 05:37:05,951 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-25 05:37:05,966 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-25 05:37:05,967 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-25 05:37:05,968 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-25 05:37:05,969 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-25 05:37:05,970 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-25 05:37:05,973 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-25 05:37:05,974 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-25 05:37:05,974 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-25 05:37:05,975 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-25 05:37:05,976 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-25 05:37:05,977 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-25 05:37:05,978 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-25 05:37:05,980 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-25 05:37:05,983 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-25 05:37:05,985 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-25 05:37:05,986 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-25 05:37:05,987 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-25 05:37:05,990 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... [2018-01-25 05:37:05,990 INFO L177 SettingsManager]: TraceAbstractionWithAFAs provides no preferences, ignoring... [2018-01-25 05:37:05,990 INFO L174 SettingsManager]: Resetting IcfgTransformer preferences to default values [2018-01-25 05:37:05,991 INFO L174 SettingsManager]: Resetting Boogie Printer preferences to default values [2018-01-25 05:37:05,992 INFO L174 SettingsManager]: Resetting Witness Printer preferences to default values [2018-01-25 05:37:05,993 INFO L177 SettingsManager]: Boogie PL CUP Parser provides no preferences, ignoring... [2018-01-25 05:37:05,994 INFO L174 SettingsManager]: Resetting CDTParser preferences to default values [2018-01-25 05:37:05,994 INFO L177 SettingsManager]: PEA to Boogie provides no preferences, ignoring... [2018-01-25 05:37:05,994 INFO L177 SettingsManager]: AutomataScriptParser provides no preferences, ignoring... [2018-01-25 05:37:05,995 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-25 05:37:05,995 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-25 05:37:05,996 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf [2018-01-25 05:37:06,004 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-25 05:37:06,004 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-25 05:37:06,005 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-25 05:37:06,005 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-25 05:37:06,005 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-25 05:37:06,005 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-25 05:37:06,005 INFO L133 SettingsManager]: * Precise comparison operator=true [2018-01-25 05:37:06,005 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-25 05:37:06,006 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-25 05:37:06,006 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-25 05:37:06,006 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-25 05:37:06,006 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-25 05:37:06,006 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-25 05:37:06,006 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-25 05:37:06,007 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-25 05:37:06,007 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-25 05:37:06,007 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-25 05:37:06,007 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-25 05:37:06,007 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-25 05:37:06,007 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-25 05:37:06,007 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-25 05:37:06,007 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-25 05:37:06,008 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-25 05:37:06,008 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-25 05:37:06,008 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-25 05:37:06,008 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-25 05:37:06,008 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-25 05:37:06,009 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-25 05:37:06,009 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-25 05:37:06,009 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-25 05:37:06,009 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-25 05:37:06,009 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-25 05:37:06,009 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-25 05:37:06,009 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-25 05:37:06,010 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-25 05:37:06,010 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-25 05:37:06,043 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-25 05:37:06,055 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-25 05:37:06,059 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-25 05:37:06,060 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-25 05:37:06,060 INFO L276 PluginConnector]: CDTParser initialized [2018-01-25 05:37:06,061 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/memsafety/20051113-1.c_false-valid-memtrack.i [2018-01-25 05:37:06,222 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-25 05:37:06,226 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-25 05:37:06,227 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-25 05:37:06,227 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-25 05:37:06,232 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-25 05:37:06,232 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.01 05:37:06" (1/1) ... [2018-01-25 05:37:06,236 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@53037d43 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:37:06, skipping insertion in model container [2018-01-25 05:37:06,236 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.01 05:37:06" (1/1) ... [2018-01-25 05:37:06,254 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-25 05:37:06,295 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-25 05:37:06,409 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-25 05:37:06,437 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-25 05:37:06,444 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:37:06 WrapperNode [2018-01-25 05:37:06,444 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-25 05:37:06,445 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-25 05:37:06,445 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-25 05:37:06,445 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-25 05:37:06,459 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:37:06" (1/1) ... [2018-01-25 05:37:06,459 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:37:06" (1/1) ... [2018-01-25 05:37:06,468 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:37:06" (1/1) ... [2018-01-25 05:37:06,468 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:37:06" (1/1) ... [2018-01-25 05:37:06,473 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:37:06" (1/1) ... [2018-01-25 05:37:06,476 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:37:06" (1/1) ... [2018-01-25 05:37:06,478 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:37:06" (1/1) ... [2018-01-25 05:37:06,479 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-25 05:37:06,480 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-25 05:37:06,480 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-25 05:37:06,480 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-25 05:37:06,481 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:37:06" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-25 05:37:06,539 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-25 05:37:06,540 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-25 05:37:06,540 INFO L136 BoogieDeclarations]: Found implementation of procedure Sum [2018-01-25 05:37:06,540 INFO L136 BoogieDeclarations]: Found implementation of procedure Sum2 [2018-01-25 05:37:06,540 INFO L136 BoogieDeclarations]: Found implementation of procedure dummy_abort [2018-01-25 05:37:06,540 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-25 05:37:06,540 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-25 05:37:06,541 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-25 05:37:06,541 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-25 05:37:06,541 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-25 05:37:06,541 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-25 05:37:06,541 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-25 05:37:06,541 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-25 05:37:06,542 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-25 05:37:06,542 INFO L128 BoogieDeclarations]: Found specification of procedure Sum [2018-01-25 05:37:06,542 INFO L128 BoogieDeclarations]: Found specification of procedure Sum2 [2018-01-25 05:37:06,542 INFO L128 BoogieDeclarations]: Found specification of procedure dummy_abort [2018-01-25 05:37:06,542 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-25 05:37:06,542 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-25 05:37:06,542 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-25 05:37:06,674 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-01-25 05:37:06,816 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-25 05:37:06,817 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.01 05:37:06 BoogieIcfgContainer [2018-01-25 05:37:06,817 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-25 05:37:06,817 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-25 05:37:06,817 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-25 05:37:06,819 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-25 05:37:06,819 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 25.01 05:37:06" (1/3) ... [2018-01-25 05:37:06,820 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5efb087b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 25.01 05:37:06, skipping insertion in model container [2018-01-25 05:37:06,820 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:37:06" (2/3) ... [2018-01-25 05:37:06,821 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@5efb087b and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 25.01 05:37:06, skipping insertion in model container [2018-01-25 05:37:06,821 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.01 05:37:06" (3/3) ... [2018-01-25 05:37:06,823 INFO L105 eAbstractionObserver]: Analyzing ICFG 20051113-1.c_false-valid-memtrack.i [2018-01-25 05:37:06,832 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-25 05:37:06,840 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 25 error locations. [2018-01-25 05:37:06,877 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-25 05:37:06,877 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-25 05:37:06,877 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-25 05:37:06,877 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-25 05:37:06,878 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-25 05:37:06,878 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-25 05:37:06,878 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-25 05:37:06,878 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-25 05:37:06,879 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-25 05:37:06,902 INFO L276 IsEmpty]: Start isEmpty. Operand 80 states. [2018-01-25 05:37:06,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-01-25 05:37:06,909 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:37:06,910 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:37:06,910 INFO L371 AbstractCegarLoop]: === Iteration 1 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-25 05:37:06,914 INFO L82 PathProgramCache]: Analyzing trace with hash -1274877597, now seen corresponding path program 1 times [2018-01-25 05:37:06,916 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:37:06,956 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:06,956 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:37:06,956 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:06,956 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:37:06,992 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:07,000 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:37:07,065 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:37:07,068 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-25 05:37:07,069 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-25 05:37:07,069 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-25 05:37:07,072 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-25 05:37:07,088 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-25 05:37:07,089 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-25 05:37:07,091 INFO L87 Difference]: Start difference. First operand 80 states. Second operand 4 states. [2018-01-25 05:37:07,370 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:37:07,371 INFO L93 Difference]: Finished difference Result 111 states and 123 transitions. [2018-01-25 05:37:07,371 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-25 05:37:07,372 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 8 [2018-01-25 05:37:07,373 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:37:07,382 INFO L225 Difference]: With dead ends: 111 [2018-01-25 05:37:07,382 INFO L226 Difference]: Without dead ends: 69 [2018-01-25 05:37:07,386 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-25 05:37:07,400 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2018-01-25 05:37:07,425 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 69. [2018-01-25 05:37:07,426 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 69 states. [2018-01-25 05:37:07,428 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 69 states to 69 states and 74 transitions. [2018-01-25 05:37:07,429 INFO L78 Accepts]: Start accepts. Automaton has 69 states and 74 transitions. Word has length 8 [2018-01-25 05:37:07,430 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:37:07,430 INFO L432 AbstractCegarLoop]: Abstraction has 69 states and 74 transitions. [2018-01-25 05:37:07,430 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-25 05:37:07,430 INFO L276 IsEmpty]: Start isEmpty. Operand 69 states and 74 transitions. [2018-01-25 05:37:07,430 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-01-25 05:37:07,430 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:37:07,431 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:37:07,431 INFO L371 AbstractCegarLoop]: === Iteration 2 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-25 05:37:07,431 INFO L82 PathProgramCache]: Analyzing trace with hash -1274877596, now seen corresponding path program 1 times [2018-01-25 05:37:07,431 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:37:07,432 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:07,432 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:37:07,433 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:07,433 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:37:07,447 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:07,449 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:37:07,533 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:37:07,534 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-25 05:37:07,534 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-25 05:37:07,534 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-25 05:37:07,535 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-25 05:37:07,536 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-25 05:37:07,536 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-25 05:37:07,536 INFO L87 Difference]: Start difference. First operand 69 states and 74 transitions. Second operand 4 states. [2018-01-25 05:37:07,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:37:07,704 INFO L93 Difference]: Finished difference Result 69 states and 74 transitions. [2018-01-25 05:37:07,704 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-25 05:37:07,704 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 8 [2018-01-25 05:37:07,704 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:37:07,706 INFO L225 Difference]: With dead ends: 69 [2018-01-25 05:37:07,706 INFO L226 Difference]: Without dead ends: 61 [2018-01-25 05:37:07,707 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 4 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-25 05:37:07,707 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2018-01-25 05:37:07,715 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 61. [2018-01-25 05:37:07,715 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 61 states. [2018-01-25 05:37:07,717 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 61 states to 61 states and 66 transitions. [2018-01-25 05:37:07,717 INFO L78 Accepts]: Start accepts. Automaton has 61 states and 66 transitions. Word has length 8 [2018-01-25 05:37:07,717 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:37:07,717 INFO L432 AbstractCegarLoop]: Abstraction has 61 states and 66 transitions. [2018-01-25 05:37:07,718 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-25 05:37:07,718 INFO L276 IsEmpty]: Start isEmpty. Operand 61 states and 66 transitions. [2018-01-25 05:37:07,718 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-25 05:37:07,718 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:37:07,719 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:37:07,719 INFO L371 AbstractCegarLoop]: === Iteration 3 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-25 05:37:07,719 INFO L82 PathProgramCache]: Analyzing trace with hash -1852712777, now seen corresponding path program 1 times [2018-01-25 05:37:07,719 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:37:07,720 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:07,720 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:37:07,720 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:07,720 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:37:07,746 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:07,747 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:37:07,806 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:37:07,807 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-25 05:37:07,807 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-25 05:37:07,807 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-25 05:37:07,807 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-25 05:37:07,808 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-25 05:37:07,808 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-25 05:37:07,808 INFO L87 Difference]: Start difference. First operand 61 states and 66 transitions. Second operand 5 states. [2018-01-25 05:37:07,903 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:37:07,903 INFO L93 Difference]: Finished difference Result 61 states and 66 transitions. [2018-01-25 05:37:07,903 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-25 05:37:07,904 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 25 [2018-01-25 05:37:07,904 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:37:07,905 INFO L225 Difference]: With dead ends: 61 [2018-01-25 05:37:07,905 INFO L226 Difference]: Without dead ends: 59 [2018-01-25 05:37:07,906 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-25 05:37:07,906 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 59 states. [2018-01-25 05:37:07,912 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 59 to 59. [2018-01-25 05:37:07,912 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 59 states. [2018-01-25 05:37:07,914 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 59 states to 59 states and 64 transitions. [2018-01-25 05:37:07,914 INFO L78 Accepts]: Start accepts. Automaton has 59 states and 64 transitions. Word has length 25 [2018-01-25 05:37:07,914 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:37:07,914 INFO L432 AbstractCegarLoop]: Abstraction has 59 states and 64 transitions. [2018-01-25 05:37:07,914 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-25 05:37:07,915 INFO L276 IsEmpty]: Start isEmpty. Operand 59 states and 64 transitions. [2018-01-25 05:37:07,915 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 26 [2018-01-25 05:37:07,915 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:37:07,915 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:37:07,916 INFO L371 AbstractCegarLoop]: === Iteration 4 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-25 05:37:07,916 INFO L82 PathProgramCache]: Analyzing trace with hash -1852712776, now seen corresponding path program 1 times [2018-01-25 05:37:07,916 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:37:07,917 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:07,917 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:37:07,917 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:07,917 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:37:07,937 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:07,938 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:37:08,034 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:37:08,035 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-25 05:37:08,035 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-25 05:37:08,035 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-25 05:37:08,035 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-25 05:37:08,035 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-25 05:37:08,035 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-25 05:37:08,036 INFO L87 Difference]: Start difference. First operand 59 states and 64 transitions. Second operand 6 states. [2018-01-25 05:37:08,172 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:37:08,172 INFO L93 Difference]: Finished difference Result 59 states and 64 transitions. [2018-01-25 05:37:08,172 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-25 05:37:08,173 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 25 [2018-01-25 05:37:08,173 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:37:08,174 INFO L225 Difference]: With dead ends: 59 [2018-01-25 05:37:08,174 INFO L226 Difference]: Without dead ends: 58 [2018-01-25 05:37:08,174 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-25 05:37:08,175 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 58 states. [2018-01-25 05:37:08,181 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 58 to 58. [2018-01-25 05:37:08,182 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 58 states. [2018-01-25 05:37:08,183 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 58 states to 58 states and 63 transitions. [2018-01-25 05:37:08,183 INFO L78 Accepts]: Start accepts. Automaton has 58 states and 63 transitions. Word has length 25 [2018-01-25 05:37:08,184 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:37:08,184 INFO L432 AbstractCegarLoop]: Abstraction has 58 states and 63 transitions. [2018-01-25 05:37:08,184 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-25 05:37:08,184 INFO L276 IsEmpty]: Start isEmpty. Operand 58 states and 63 transitions. [2018-01-25 05:37:08,185 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-25 05:37:08,185 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:37:08,185 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:37:08,185 INFO L371 AbstractCegarLoop]: === Iteration 5 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-25 05:37:08,186 INFO L82 PathProgramCache]: Analyzing trace with hash 1954449657, now seen corresponding path program 1 times [2018-01-25 05:37:08,186 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:37:08,187 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:08,187 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:37:08,187 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:08,187 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:37:08,212 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:08,213 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:37:08,609 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:37:08,609 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-25 05:37:08,609 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-25 05:37:08,609 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-25 05:37:08,610 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-25 05:37:08,610 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-25 05:37:08,610 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=18, Invalid=54, Unknown=0, NotChecked=0, Total=72 [2018-01-25 05:37:08,610 INFO L87 Difference]: Start difference. First operand 58 states and 63 transitions. Second operand 9 states. [2018-01-25 05:37:08,782 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:37:08,782 INFO L93 Difference]: Finished difference Result 93 states and 102 transitions. [2018-01-25 05:37:08,782 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-25 05:37:08,783 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 27 [2018-01-25 05:37:08,783 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:37:08,783 INFO L225 Difference]: With dead ends: 93 [2018-01-25 05:37:08,784 INFO L226 Difference]: Without dead ends: 64 [2018-01-25 05:37:08,784 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 18 GetRequests, 1 SyntacticMatches, 6 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=40, Invalid=116, Unknown=0, NotChecked=0, Total=156 [2018-01-25 05:37:08,784 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 64 states. [2018-01-25 05:37:08,789 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 64 to 62. [2018-01-25 05:37:08,789 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 62 states. [2018-01-25 05:37:08,790 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 62 states to 62 states and 67 transitions. [2018-01-25 05:37:08,791 INFO L78 Accepts]: Start accepts. Automaton has 62 states and 67 transitions. Word has length 27 [2018-01-25 05:37:08,791 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:37:08,791 INFO L432 AbstractCegarLoop]: Abstraction has 62 states and 67 transitions. [2018-01-25 05:37:08,791 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-25 05:37:08,792 INFO L276 IsEmpty]: Start isEmpty. Operand 62 states and 67 transitions. [2018-01-25 05:37:08,792 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-25 05:37:08,793 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:37:08,793 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:37:08,793 INFO L371 AbstractCegarLoop]: === Iteration 6 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-25 05:37:08,793 INFO L82 PathProgramCache]: Analyzing trace with hash 1339860797, now seen corresponding path program 1 times [2018-01-25 05:37:08,793 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:37:08,794 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:08,794 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:37:08,794 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:08,794 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:37:08,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:08,814 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:37:08,936 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:37:08,936 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:08,936 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:37:08,937 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 34 with the following transitions: [2018-01-25 05:37:08,939 INFO L201 CegarAbsIntRunner]: [24], [25], [31], [32], [34], [38], [39], [46], [47], [49], [50], [52], [58], [59], [63], [64], [67], [70], [73], [76], [79], [82], [105], [106], [110], [111], [112], [120], [121], [122] [2018-01-25 05:37:08,982 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-25 05:37:08,982 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-25 05:37:09,384 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-25 05:37:09,385 INFO L268 AbstractInterpreter]: Visited 30 different actions 37 times. Merged at 7 different actions 7 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 19 variables. [2018-01-25 05:37:09,401 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-25 05:37:09,401 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:09,401 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:37:09,420 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:37:09,420 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:37:09,455 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:09,465 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:09,509 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-25 05:37:09,510 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:09,562 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-25 05:37:09,582 INFO L320 seRefinementStrategy]: Constructing automaton from 2 perfect and 1 imperfect interpolant sequences. [2018-01-25 05:37:09,583 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4, 4] imperfect sequences [6] total 11 [2018-01-25 05:37:09,583 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-25 05:37:09,583 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-25 05:37:09,583 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-25 05:37:09,583 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=87, Unknown=0, NotChecked=0, Total=110 [2018-01-25 05:37:09,583 INFO L87 Difference]: Start difference. First operand 62 states and 67 transitions. Second operand 4 states. [2018-01-25 05:37:09,601 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:37:09,601 INFO L93 Difference]: Finished difference Result 114 states and 124 transitions. [2018-01-25 05:37:09,602 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-25 05:37:09,602 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 33 [2018-01-25 05:37:09,602 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:37:09,603 INFO L225 Difference]: With dead ends: 114 [2018-01-25 05:37:09,603 INFO L226 Difference]: Without dead ends: 63 [2018-01-25 05:37:09,604 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 73 GetRequests, 61 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=29, Invalid=103, Unknown=0, NotChecked=0, Total=132 [2018-01-25 05:37:09,604 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 63 states. [2018-01-25 05:37:09,610 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 63 to 63. [2018-01-25 05:37:09,610 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 63 states. [2018-01-25 05:37:09,611 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 63 states to 63 states and 68 transitions. [2018-01-25 05:37:09,611 INFO L78 Accepts]: Start accepts. Automaton has 63 states and 68 transitions. Word has length 33 [2018-01-25 05:37:09,612 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:37:09,612 INFO L432 AbstractCegarLoop]: Abstraction has 63 states and 68 transitions. [2018-01-25 05:37:09,612 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-25 05:37:09,612 INFO L276 IsEmpty]: Start isEmpty. Operand 63 states and 68 transitions. [2018-01-25 05:37:09,613 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-25 05:37:09,613 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:37:09,613 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:37:09,613 INFO L371 AbstractCegarLoop]: === Iteration 7 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-25 05:37:09,614 INFO L82 PathProgramCache]: Analyzing trace with hash 1619594826, now seen corresponding path program 1 times [2018-01-25 05:37:09,614 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:37:09,615 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:09,615 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:37:09,615 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:09,615 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:37:09,636 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:09,637 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:37:10,045 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 1 trivial. 0 not checked. [2018-01-25 05:37:10,045 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:10,045 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:37:10,045 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 35 with the following transitions: [2018-01-25 05:37:10,046 INFO L201 CegarAbsIntRunner]: [24], [25], [29], [31], [32], [34], [38], [39], [46], [47], [49], [50], [52], [58], [59], [63], [64], [67], [70], [73], [76], [79], [82], [105], [106], [110], [111], [112], [120], [121], [122] [2018-01-25 05:37:10,048 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-25 05:37:10,048 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-25 05:37:10,504 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-25 05:37:10,505 INFO L268 AbstractInterpreter]: Visited 31 different actions 46 times. Merged at 10 different actions 13 times. Never widened. Found 4 fixpoints after 3 different actions. Largest state had 19 variables. [2018-01-25 05:37:10,513 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-25 05:37:10,513 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:10,513 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:37:10,519 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:37:10,520 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:37:10,550 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:10,552 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:10,744 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-25 05:37:10,744 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:10,876 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-25 05:37:10,910 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:10,910 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 4 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:37:10,916 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:37:10,916 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:37:10,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:10,967 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:10,972 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-25 05:37:10,972 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:10,993 INFO L134 CoverageAnalysis]: Checked inductivity of 5 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 4 trivial. 0 not checked. [2018-01-25 05:37:10,994 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:37:10,995 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 5, 5, 5, 5] total 13 [2018-01-25 05:37:10,995 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:37:10,995 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-25 05:37:10,995 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-25 05:37:10,995 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=34, Invalid=122, Unknown=0, NotChecked=0, Total=156 [2018-01-25 05:37:10,996 INFO L87 Difference]: Start difference. First operand 63 states and 68 transitions. Second operand 10 states. [2018-01-25 05:37:11,185 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:37:11,185 INFO L93 Difference]: Finished difference Result 126 states and 138 transitions. [2018-01-25 05:37:11,185 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-25 05:37:11,185 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 34 [2018-01-25 05:37:11,185 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:37:11,187 INFO L225 Difference]: With dead ends: 126 [2018-01-25 05:37:11,188 INFO L226 Difference]: Without dead ends: 75 [2018-01-25 05:37:11,188 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 146 GetRequests, 128 SyntacticMatches, 3 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=53, Invalid=219, Unknown=0, NotChecked=0, Total=272 [2018-01-25 05:37:11,189 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 75 states. [2018-01-25 05:37:11,195 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 75 to 70. [2018-01-25 05:37:11,196 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 70 states. [2018-01-25 05:37:11,197 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 70 states to 70 states and 76 transitions. [2018-01-25 05:37:11,197 INFO L78 Accepts]: Start accepts. Automaton has 70 states and 76 transitions. Word has length 34 [2018-01-25 05:37:11,197 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:37:11,197 INFO L432 AbstractCegarLoop]: Abstraction has 70 states and 76 transitions. [2018-01-25 05:37:11,197 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-25 05:37:11,198 INFO L276 IsEmpty]: Start isEmpty. Operand 70 states and 76 transitions. [2018-01-25 05:37:11,199 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-25 05:37:11,199 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:37:11,199 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:37:11,199 INFO L371 AbstractCegarLoop]: === Iteration 8 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-25 05:37:11,200 INFO L82 PathProgramCache]: Analyzing trace with hash -341936469, now seen corresponding path program 1 times [2018-01-25 05:37:11,200 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:37:11,201 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:11,201 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:37:11,201 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:11,201 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:37:11,217 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:11,218 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:37:11,276 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-25 05:37:11,276 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-25 05:37:11,276 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-25 05:37:11,276 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-25 05:37:11,276 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-25 05:37:11,276 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-25 05:37:11,277 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-25 05:37:11,277 INFO L87 Difference]: Start difference. First operand 70 states and 76 transitions. Second operand 5 states. [2018-01-25 05:37:11,355 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:37:11,356 INFO L93 Difference]: Finished difference Result 70 states and 76 transitions. [2018-01-25 05:37:11,356 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-25 05:37:11,356 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 42 [2018-01-25 05:37:11,356 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:37:11,357 INFO L225 Difference]: With dead ends: 70 [2018-01-25 05:37:11,357 INFO L226 Difference]: Without dead ends: 68 [2018-01-25 05:37:11,358 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-25 05:37:11,358 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 68 states. [2018-01-25 05:37:11,364 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 68 to 68. [2018-01-25 05:37:11,364 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 68 states. [2018-01-25 05:37:11,365 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 68 states to 68 states and 74 transitions. [2018-01-25 05:37:11,365 INFO L78 Accepts]: Start accepts. Automaton has 68 states and 74 transitions. Word has length 42 [2018-01-25 05:37:11,366 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:37:11,366 INFO L432 AbstractCegarLoop]: Abstraction has 68 states and 74 transitions. [2018-01-25 05:37:11,366 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-25 05:37:11,366 INFO L276 IsEmpty]: Start isEmpty. Operand 68 states and 74 transitions. [2018-01-25 05:37:11,367 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 43 [2018-01-25 05:37:11,367 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:37:11,367 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:37:11,367 INFO L371 AbstractCegarLoop]: === Iteration 9 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-25 05:37:11,368 INFO L82 PathProgramCache]: Analyzing trace with hash -341936468, now seen corresponding path program 1 times [2018-01-25 05:37:11,368 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:37:11,369 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:11,369 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:37:11,369 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:11,369 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:37:11,384 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:11,385 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:37:11,495 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-25 05:37:11,495 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-25 05:37:11,495 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-25 05:37:11,495 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-25 05:37:11,496 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-25 05:37:11,496 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-25 05:37:11,496 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-25 05:37:11,496 INFO L87 Difference]: Start difference. First operand 68 states and 74 transitions. Second operand 6 states. [2018-01-25 05:37:11,579 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:37:11,580 INFO L93 Difference]: Finished difference Result 68 states and 74 transitions. [2018-01-25 05:37:11,580 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-25 05:37:11,580 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 42 [2018-01-25 05:37:11,581 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:37:11,581 INFO L225 Difference]: With dead ends: 68 [2018-01-25 05:37:11,581 INFO L226 Difference]: Without dead ends: 67 [2018-01-25 05:37:11,582 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-25 05:37:11,582 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 67 states. [2018-01-25 05:37:11,588 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 67 to 67. [2018-01-25 05:37:11,588 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 67 states. [2018-01-25 05:37:11,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 67 states to 67 states and 73 transitions. [2018-01-25 05:37:11,589 INFO L78 Accepts]: Start accepts. Automaton has 67 states and 73 transitions. Word has length 42 [2018-01-25 05:37:11,589 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:37:11,589 INFO L432 AbstractCegarLoop]: Abstraction has 67 states and 73 transitions. [2018-01-25 05:37:11,589 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-25 05:37:11,590 INFO L276 IsEmpty]: Start isEmpty. Operand 67 states and 73 transitions. [2018-01-25 05:37:11,591 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-25 05:37:11,591 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:37:11,591 INFO L322 BasicCegarLoop]: trace histogram [3, 3, 3, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:37:11,591 INFO L371 AbstractCegarLoop]: === Iteration 10 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-25 05:37:11,591 INFO L82 PathProgramCache]: Analyzing trace with hash -614912991, now seen corresponding path program 2 times [2018-01-25 05:37:11,591 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:37:11,592 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:11,592 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:37:11,592 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:11,593 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:37:11,606 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:11,607 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:37:11,784 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 14 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-25 05:37:11,784 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:11,784 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:37:11,784 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:37:11,784 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:37:11,785 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:11,785 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:37:11,796 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:37:11,796 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:37:11,810 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:37:11,822 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:37:11,823 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:37:11,826 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:11,982 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-01-25 05:37:11,983 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:12,046 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-01-25 05:37:12,066 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:12,066 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:37:12,069 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:37:12,070 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:37:12,090 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:37:12,113 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:37:12,124 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:37:12,128 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:12,132 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-01-25 05:37:12,132 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:12,150 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 14 trivial. 0 not checked. [2018-01-25 05:37:12,152 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:37:12,152 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 6, 6, 6, 6] total 16 [2018-01-25 05:37:12,152 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:37:12,153 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-25 05:37:12,153 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-25 05:37:12,153 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=189, Unknown=0, NotChecked=0, Total=240 [2018-01-25 05:37:12,153 INFO L87 Difference]: Start difference. First operand 67 states and 73 transitions. Second operand 12 states. [2018-01-25 05:37:12,382 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:37:12,382 INFO L93 Difference]: Finished difference Result 136 states and 150 transitions. [2018-01-25 05:37:12,382 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-25 05:37:12,382 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 41 [2018-01-25 05:37:12,382 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:37:12,383 INFO L225 Difference]: With dead ends: 136 [2018-01-25 05:37:12,383 INFO L226 Difference]: Without dead ends: 82 [2018-01-25 05:37:12,384 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 176 GetRequests, 154 SyntacticMatches, 3 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=75, Invalid=345, Unknown=0, NotChecked=0, Total=420 [2018-01-25 05:37:12,384 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 82 states. [2018-01-25 05:37:12,389 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 82 to 74. [2018-01-25 05:37:12,389 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74 states. [2018-01-25 05:37:12,390 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 81 transitions. [2018-01-25 05:37:12,390 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 81 transitions. Word has length 41 [2018-01-25 05:37:12,390 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:37:12,390 INFO L432 AbstractCegarLoop]: Abstraction has 74 states and 81 transitions. [2018-01-25 05:37:12,390 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-25 05:37:12,391 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 81 transitions. [2018-01-25 05:37:12,392 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 46 [2018-01-25 05:37:12,392 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:37:12,392 INFO L322 BasicCegarLoop]: trace histogram [3, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:37:12,392 INFO L371 AbstractCegarLoop]: === Iteration 11 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-25 05:37:12,392 INFO L82 PathProgramCache]: Analyzing trace with hash 1732121728, now seen corresponding path program 1 times [2018-01-25 05:37:12,392 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:37:12,393 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:12,393 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:37:12,393 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:12,394 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:37:12,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:12,409 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:37:12,829 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-01-25 05:37:12,829 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:12,829 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:37:12,829 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 46 with the following transitions: [2018-01-25 05:37:12,830 INFO L201 CegarAbsIntRunner]: [0], [4], [5], [12], [15], [24], [25], [29], [31], [32], [34], [38], [39], [44], [46], [47], [50], [52], [56], [57], [58], [59], [63], [64], [67], [70], [73], [76], [79], [82], [91], [105], [106], [110], [111], [112], [113], [116], [120], [121], [122] [2018-01-25 05:37:12,832 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-25 05:37:12,832 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-25 05:37:13,356 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-25 05:37:13,356 INFO L268 AbstractInterpreter]: Visited 41 different actions 60 times. Merged at 13 different actions 16 times. Never widened. Found 5 fixpoints after 4 different actions. Largest state had 20 variables. [2018-01-25 05:37:13,358 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-25 05:37:13,358 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:13,358 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:37:13,370 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:37:13,370 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:37:13,397 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:13,400 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:13,456 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-25 05:37:13,457 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:13,541 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-25 05:37:13,561 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:13,561 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 8 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:37:13,566 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:37:13,566 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:37:13,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:13,603 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:13,607 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-25 05:37:13,607 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:13,631 INFO L134 CoverageAnalysis]: Checked inductivity of 9 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-25 05:37:13,632 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:37:13,633 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 7, 7, 7, 7] total 22 [2018-01-25 05:37:13,633 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:37:13,633 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-25 05:37:13,633 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-25 05:37:13,633 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=84, Invalid=378, Unknown=0, NotChecked=0, Total=462 [2018-01-25 05:37:13,634 INFO L87 Difference]: Start difference. First operand 74 states and 81 transitions. Second operand 17 states. [2018-01-25 05:37:13,927 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:37:13,927 INFO L93 Difference]: Finished difference Result 144 states and 160 transitions. [2018-01-25 05:37:13,927 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-25 05:37:13,927 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 45 [2018-01-25 05:37:13,927 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:37:13,928 INFO L225 Difference]: With dead ends: 144 [2018-01-25 05:37:13,928 INFO L226 Difference]: Without dead ends: 84 [2018-01-25 05:37:13,929 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 203 GetRequests, 168 SyntacticMatches, 10 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 108 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=116, Invalid=586, Unknown=0, NotChecked=0, Total=702 [2018-01-25 05:37:13,929 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. [2018-01-25 05:37:13,934 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 79. [2018-01-25 05:37:13,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 79 states. [2018-01-25 05:37:13,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 79 states to 79 states and 87 transitions. [2018-01-25 05:37:13,935 INFO L78 Accepts]: Start accepts. Automaton has 79 states and 87 transitions. Word has length 45 [2018-01-25 05:37:13,935 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:37:13,935 INFO L432 AbstractCegarLoop]: Abstraction has 79 states and 87 transitions. [2018-01-25 05:37:13,935 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-25 05:37:13,935 INFO L276 IsEmpty]: Start isEmpty. Operand 79 states and 87 transitions. [2018-01-25 05:37:13,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 50 [2018-01-25 05:37:13,936 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:37:13,936 INFO L322 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:37:13,936 INFO L371 AbstractCegarLoop]: === Iteration 12 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-25 05:37:13,936 INFO L82 PathProgramCache]: Analyzing trace with hash -117713403, now seen corresponding path program 3 times [2018-01-25 05:37:13,936 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:37:13,937 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:13,937 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:37:13,937 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:13,937 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:37:13,952 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:13,953 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:37:14,294 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 17 proven. 13 refuted. 0 times theorem prover too weak. 10 trivial. 0 not checked. [2018-01-25 05:37:14,294 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:14,294 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:37:14,294 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:37:14,295 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:37:14,295 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:14,295 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:37:14,301 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:37:14,302 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:37:14,314 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:37:14,324 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:37:14,325 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:37:14,328 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:14,345 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-25 05:37:14,346 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:14,349 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:14,349 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-25 05:37:14,412 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-25 05:37:14,414 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-25 05:37:14,414 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:14,418 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:14,423 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:14,423 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:20, output treesize:16 [2018-01-25 05:37:14,458 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-01-25 05:37:14,461 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,462 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,463 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 31 [2018-01-25 05:37:14,463 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:14,472 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:14,480 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:14,480 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:25 [2018-01-25 05:37:14,515 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 23 [2018-01-25 05:37:14,518 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,519 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,520 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,521 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,522 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,523 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,523 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 78 [2018-01-25 05:37:14,524 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:14,537 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:14,555 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:14,555 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:38, output treesize:34 [2018-01-25 05:37:14,588 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2018-01-25 05:37:14,603 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,604 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,604 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,605 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,606 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,606 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,607 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,608 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,609 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,609 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,610 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,611 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,612 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 12 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 149 [2018-01-25 05:37:14,612 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:14,631 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:14,652 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:14,652 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:47, output treesize:43 [2018-01-25 05:37:14,687 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 37 [2018-01-25 05:37:14,689 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,690 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,691 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,691 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,692 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,692 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,693 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,694 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,694 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,695 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,695 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,696 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,697 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,697 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,698 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,699 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,699 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 16 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 206 [2018-01-25 05:37:14,700 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:14,727 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:14,736 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:14,736 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:56, output treesize:52 [2018-01-25 05:37:14,777 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 44 [2018-01-25 05:37:14,782 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,783 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,784 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,785 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,785 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,786 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,787 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,788 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,789 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,789 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,790 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,791 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,792 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,795 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,796 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,797 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,798 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,799 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,800 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,800 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,801 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,802 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 21 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 253 [2018-01-25 05:37:14,803 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:14,862 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:14,873 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:14,873 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:65, output treesize:61 [2018-01-25 05:37:14,913 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 51 [2018-01-25 05:37:14,916 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,917 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,918 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,918 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,919 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,920 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,920 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,921 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,922 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,922 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,923 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,924 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,924 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,925 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,925 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,926 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,926 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,927 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,927 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,928 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,928 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,929 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,929 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,930 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,931 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,931 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,932 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:14,932 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 27 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 308 [2018-01-25 05:37:14,933 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:14,973 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:14,983 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:14,983 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:74, output treesize:70 [2018-01-25 05:37:15,237 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 53 [2018-01-25 05:37:15,245 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:15,246 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:15,246 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:15,247 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:15,248 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:15,248 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:15,249 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:15,253 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:15,258 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:15,259 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:15,261 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:15,266 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:15,267 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:15,285 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:15,286 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:15,292 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:15,293 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:15,294 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:15,295 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:15,296 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:15,297 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:15,297 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:15,298 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:15,299 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:15,300 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:15,301 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:15,301 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:15,302 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 7 select indices, 7 select index equivalence classes, 27 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 53 treesize of output 160 [2018-01-25 05:37:15,303 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:15,327 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:15,334 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-25 05:37:15,334 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:90, output treesize:25 [2018-01-25 05:37:15,420 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 10 proven. 6 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-25 05:37:15,420 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:16,470 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-25 05:37:16,491 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:16,493 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 10 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:37:16,496 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:37:16,497 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:37:16,514 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:37:16,536 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:37:16,561 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:37:16,565 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:16,568 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 6 treesize of output 5 [2018-01-25 05:37:16,569 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:16,571 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:16,572 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 1 variables, input treesize:10, output treesize:9 [2018-01-25 05:37:16,682 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-25 05:37:16,684 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-25 05:37:16,684 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:16,686 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:16,690 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:16,690 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:20, output treesize:16 [2018-01-25 05:37:16,732 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-01-25 05:37:16,736 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:16,737 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:16,738 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 31 [2018-01-25 05:37:16,738 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:16,746 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:16,753 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:16,754 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:29, output treesize:25 [2018-01-25 05:37:16,846 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 23 [2018-01-25 05:37:16,849 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:16,850 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:16,851 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:16,852 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:16,853 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:16,854 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:16,855 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 78 [2018-01-25 05:37:16,856 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:16,876 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:16,882 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:16,883 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:38, output treesize:34 [2018-01-25 05:37:16,928 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2018-01-25 05:37:16,930 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:16,931 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:16,931 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:16,932 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:16,932 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:16,933 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:16,934 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:16,934 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:16,935 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:16,936 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:16,936 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:16,937 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:16,938 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 12 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 149 [2018-01-25 05:37:16,938 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:16,956 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:16,964 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:16,964 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:47, output treesize:43 [2018-01-25 05:37:17,009 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 37 [2018-01-25 05:37:17,012 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,013 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,013 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,014 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,014 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,015 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,016 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,016 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,017 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,017 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,018 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,018 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,019 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,020 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,020 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,021 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,022 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 16 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 206 [2018-01-25 05:37:17,022 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:17,045 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:17,053 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:17,054 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:56, output treesize:52 [2018-01-25 05:37:17,105 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 44 [2018-01-25 05:37:17,108 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,109 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,110 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,110 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,111 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,112 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,112 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,113 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,114 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,115 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,115 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,116 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,117 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,117 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,118 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,119 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,120 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,120 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,121 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,122 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,123 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,123 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 21 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 253 [2018-01-25 05:37:17,124 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:17,157 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:17,166 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:17,166 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:65, output treesize:61 [2018-01-25 05:37:17,248 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 51 [2018-01-25 05:37:17,251 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,252 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,252 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,253 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,253 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,254 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,254 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,255 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,255 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,256 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,257 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,257 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,258 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,258 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,259 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,259 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,260 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,260 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,261 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,261 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,262 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,262 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,263 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,264 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,264 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,265 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,265 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,266 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 27 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 308 [2018-01-25 05:37:17,267 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:17,312 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:17,323 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:17,324 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:74, output treesize:70 [2018-01-25 05:37:17,630 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 0 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 41 [2018-01-25 05:37:17,632 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,633 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,634 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,634 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,635 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,636 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:17,637 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 0 stores, 8 select indices, 8 select index equivalence classes, 27 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 41 treesize of output 43 [2018-01-25 05:37:17,637 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:17,646 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:17,651 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-25 05:37:17,652 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:78, output treesize:25 [2018-01-25 05:37:17,752 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 10 proven. 6 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-25 05:37:17,752 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:18,618 INFO L134 CoverageAnalysis]: Checked inductivity of 40 backedges. 0 proven. 16 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-25 05:37:18,620 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:37:18,620 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 17, 10, 17, 10] total 54 [2018-01-25 05:37:18,620 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:37:18,621 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-25 05:37:18,621 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-25 05:37:18,622 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=341, Invalid=2520, Unknown=1, NotChecked=0, Total=2862 [2018-01-25 05:37:18,622 INFO L87 Difference]: Start difference. First operand 79 states and 87 transitions. Second operand 30 states. [2018-01-25 05:37:20,303 WARN L146 SmtUtils]: Spent 145ms on a formula simplification. DAG size of input: 90 DAG size of output 75 [2018-01-25 05:37:20,442 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:37:20,442 INFO L93 Difference]: Finished difference Result 113 states and 126 transitions. [2018-01-25 05:37:20,442 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-25 05:37:20,443 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 49 [2018-01-25 05:37:20,443 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:37:20,444 INFO L225 Difference]: With dead ends: 113 [2018-01-25 05:37:20,444 INFO L226 Difference]: Without dead ends: 77 [2018-01-25 05:37:20,446 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 235 GetRequests, 136 SyntacticMatches, 28 SemanticMatches, 71 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2186 ImplicationChecksByTransitivity, 4.7s TimeCoverageRelationStatistics Valid=795, Invalid=4460, Unknown=1, NotChecked=0, Total=5256 [2018-01-25 05:37:20,446 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2018-01-25 05:37:20,452 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 77. [2018-01-25 05:37:20,453 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-01-25 05:37:20,453 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 84 transitions. [2018-01-25 05:37:20,454 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 84 transitions. Word has length 49 [2018-01-25 05:37:20,454 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:37:20,454 INFO L432 AbstractCegarLoop]: Abstraction has 77 states and 84 transitions. [2018-01-25 05:37:20,454 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-25 05:37:20,454 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 84 transitions. [2018-01-25 05:37:20,455 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-25 05:37:20,456 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:37:20,456 INFO L322 BasicCegarLoop]: trace histogram [4, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:37:20,456 INFO L371 AbstractCegarLoop]: === Iteration 13 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-25 05:37:20,456 INFO L82 PathProgramCache]: Analyzing trace with hash 2106198684, now seen corresponding path program 1 times [2018-01-25 05:37:20,456 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:37:20,457 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:20,457 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:37:20,457 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:20,457 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:37:20,469 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:20,470 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:37:20,508 INFO L134 CoverageAnalysis]: Checked inductivity of 13 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-01-25 05:37:20,508 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-25 05:37:20,509 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-25 05:37:20,509 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-25 05:37:20,509 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-25 05:37:20,509 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-25 05:37:20,509 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-25 05:37:20,510 INFO L87 Difference]: Start difference. First operand 77 states and 84 transitions. Second operand 5 states. [2018-01-25 05:37:20,534 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:37:20,535 INFO L93 Difference]: Finished difference Result 86 states and 93 transitions. [2018-01-25 05:37:20,535 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-25 05:37:20,535 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 52 [2018-01-25 05:37:20,535 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:37:20,536 INFO L225 Difference]: With dead ends: 86 [2018-01-25 05:37:20,536 INFO L226 Difference]: Without dead ends: 83 [2018-01-25 05:37:20,537 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-25 05:37:20,537 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 83 states. [2018-01-25 05:37:20,547 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 83 to 82. [2018-01-25 05:37:20,548 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 82 states. [2018-01-25 05:37:20,548 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 82 states to 82 states and 89 transitions. [2018-01-25 05:37:20,549 INFO L78 Accepts]: Start accepts. Automaton has 82 states and 89 transitions. Word has length 52 [2018-01-25 05:37:20,549 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:37:20,549 INFO L432 AbstractCegarLoop]: Abstraction has 82 states and 89 transitions. [2018-01-25 05:37:20,549 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-25 05:37:20,549 INFO L276 IsEmpty]: Start isEmpty. Operand 82 states and 89 transitions. [2018-01-25 05:37:20,550 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 53 [2018-01-25 05:37:20,550 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:37:20,550 INFO L322 BasicCegarLoop]: trace histogram [4, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:37:20,551 INFO L371 AbstractCegarLoop]: === Iteration 14 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-25 05:37:20,551 INFO L82 PathProgramCache]: Analyzing trace with hash 1604645521, now seen corresponding path program 1 times [2018-01-25 05:37:20,551 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:37:20,552 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:20,552 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:37:20,552 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:20,552 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:37:20,566 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:20,567 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:37:21,019 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 4 refuted. 0 times theorem prover too weak. 13 trivial. 0 not checked. [2018-01-25 05:37:21,020 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:21,020 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:37:21,020 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 53 with the following transitions: [2018-01-25 05:37:21,020 INFO L201 CegarAbsIntRunner]: [0], [4], [5], [12], [13], [15], [16], [18], [24], [25], [29], [31], [32], [34], [38], [39], [44], [46], [47], [50], [52], [56], [57], [58], [59], [63], [64], [67], [70], [73], [76], [79], [82], [91], [105], [106], [110], [111], [112], [113], [116], [120], [121], [122] [2018-01-25 05:37:21,021 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-25 05:37:21,022 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-25 05:37:21,391 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-25 05:37:21,392 INFO L268 AbstractInterpreter]: Visited 44 different actions 70 times. Merged at 20 different actions 23 times. Never widened. Found 6 fixpoints after 5 different actions. Largest state had 20 variables. [2018-01-25 05:37:21,397 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-25 05:37:21,397 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:21,397 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:37:21,410 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:37:21,410 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:37:21,440 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:21,442 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:21,636 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-01-25 05:37:21,636 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:21,788 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-01-25 05:37:21,809 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:21,809 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:37:21,812 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:37:21,812 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:37:21,850 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:21,854 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:21,858 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-01-25 05:37:21,858 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:21,881 INFO L134 CoverageAnalysis]: Checked inductivity of 17 backedges. 0 proven. 10 refuted. 0 times theorem prover too weak. 7 trivial. 0 not checked. [2018-01-25 05:37:21,882 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:37:21,882 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 8, 8, 8, 8] total 25 [2018-01-25 05:37:21,883 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:37:21,883 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-25 05:37:21,883 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-25 05:37:21,883 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=110, Invalid=490, Unknown=0, NotChecked=0, Total=600 [2018-01-25 05:37:21,883 INFO L87 Difference]: Start difference. First operand 82 states and 89 transitions. Second operand 19 states. [2018-01-25 05:37:22,258 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:37:22,258 INFO L93 Difference]: Finished difference Result 151 states and 166 transitions. [2018-01-25 05:37:22,258 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-25 05:37:22,259 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 52 [2018-01-25 05:37:22,259 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:37:22,260 INFO L225 Difference]: With dead ends: 151 [2018-01-25 05:37:22,260 INFO L226 Difference]: Without dead ends: 84 [2018-01-25 05:37:22,261 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 233 GetRequests, 194 SyntacticMatches, 8 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 153 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=174, Invalid=882, Unknown=0, NotChecked=0, Total=1056 [2018-01-25 05:37:22,261 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 84 states. [2018-01-25 05:37:22,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 84 to 81. [2018-01-25 05:37:22,268 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 81 states. [2018-01-25 05:37:22,268 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 88 transitions. [2018-01-25 05:37:22,269 INFO L78 Accepts]: Start accepts. Automaton has 81 states and 88 transitions. Word has length 52 [2018-01-25 05:37:22,269 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:37:22,269 INFO L432 AbstractCegarLoop]: Abstraction has 81 states and 88 transitions. [2018-01-25 05:37:22,269 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-25 05:37:22,269 INFO L276 IsEmpty]: Start isEmpty. Operand 81 states and 88 transitions. [2018-01-25 05:37:22,270 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-25 05:37:22,270 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:37:22,270 INFO L322 BasicCegarLoop]: trace histogram [5, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:37:22,270 INFO L371 AbstractCegarLoop]: === Iteration 15 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-25 05:37:22,271 INFO L82 PathProgramCache]: Analyzing trace with hash -544800124, now seen corresponding path program 1 times [2018-01-25 05:37:22,271 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:37:22,272 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:22,272 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:37:22,272 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:22,272 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:37:22,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:22,288 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:37:22,469 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 17 trivial. 0 not checked. [2018-01-25 05:37:22,470 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:22,470 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:37:22,470 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 57 with the following transitions: [2018-01-25 05:37:22,470 INFO L201 CegarAbsIntRunner]: [0], [4], [5], [10], [22], [23], [24], [25], [29], [31], [32], [33], [34], [38], [39], [44], [46], [47], [50], [52], [56], [57], [58], [59], [63], [64], [67], [70], [73], [76], [79], [82], [91], [94], [97], [102], [104], [105], [106], [110], [111], [112], [113], [116], [117], [118], [119], [120], [121], [122] [2018-01-25 05:37:22,471 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-25 05:37:22,472 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-25 05:37:22,980 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-25 05:37:22,981 INFO L268 AbstractInterpreter]: Visited 50 different actions 69 times. Merged at 13 different actions 16 times. Never widened. Found 5 fixpoints after 4 different actions. Largest state had 20 variables. [2018-01-25 05:37:22,986 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-25 05:37:22,987 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:22,987 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:37:22,998 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:37:22,998 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:37:23,027 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:23,030 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:23,217 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-25 05:37:23,217 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:23,440 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-25 05:37:23,461 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:23,461 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 14 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:37:23,465 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:37:23,466 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:37:23,509 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:23,514 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:23,521 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-25 05:37:23,521 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:23,567 INFO L134 CoverageAnalysis]: Checked inductivity of 18 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 3 trivial. 0 not checked. [2018-01-25 05:37:23,569 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:37:23,569 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 23 [2018-01-25 05:37:23,569 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:37:23,570 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-25 05:37:23,570 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-25 05:37:23,570 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=124, Invalid=382, Unknown=0, NotChecked=0, Total=506 [2018-01-25 05:37:23,570 INFO L87 Difference]: Start difference. First operand 81 states and 88 transitions. Second operand 16 states. [2018-01-25 05:37:23,759 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:37:23,759 INFO L93 Difference]: Finished difference Result 148 states and 162 transitions. [2018-01-25 05:37:23,759 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-25 05:37:23,759 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 56 [2018-01-25 05:37:23,759 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:37:23,760 INFO L225 Difference]: With dead ends: 148 [2018-01-25 05:37:23,760 INFO L226 Difference]: Without dead ends: 80 [2018-01-25 05:37:23,761 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 242 GetRequests, 208 SyntacticMatches, 10 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 62 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=143, Invalid=507, Unknown=0, NotChecked=0, Total=650 [2018-01-25 05:37:23,761 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 80 states. [2018-01-25 05:37:23,767 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 80 to 77. [2018-01-25 05:37:23,767 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 77 states. [2018-01-25 05:37:23,767 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 77 states to 77 states and 83 transitions. [2018-01-25 05:37:23,768 INFO L78 Accepts]: Start accepts. Automaton has 77 states and 83 transitions. Word has length 56 [2018-01-25 05:37:23,768 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:37:23,768 INFO L432 AbstractCegarLoop]: Abstraction has 77 states and 83 transitions. [2018-01-25 05:37:23,768 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-25 05:37:23,768 INFO L276 IsEmpty]: Start isEmpty. Operand 77 states and 83 transitions. [2018-01-25 05:37:23,768 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-01-25 05:37:23,768 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:37:23,769 INFO L322 BasicCegarLoop]: trace histogram [6, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:37:23,769 INFO L371 AbstractCegarLoop]: === Iteration 16 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-25 05:37:23,769 INFO L82 PathProgramCache]: Analyzing trace with hash -1454707584, now seen corresponding path program 1 times [2018-01-25 05:37:23,769 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:37:23,769 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:23,769 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:37:23,770 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:23,770 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:37:23,784 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:23,785 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:37:23,958 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 24 trivial. 0 not checked. [2018-01-25 05:37:23,958 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:23,958 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:37:23,958 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 61 with the following transitions: [2018-01-25 05:37:23,958 INFO L201 CegarAbsIntRunner]: [0], [4], [5], [10], [12], [13], [16], [18], [22], [23], [24], [25], [29], [31], [32], [34], [38], [39], [44], [46], [47], [50], [52], [56], [57], [58], [59], [63], [64], [67], [70], [73], [76], [79], [82], [91], [94], [100], [102], [104], [105], [106], [110], [111], [112], [113], [116], [117], [120], [121], [122] [2018-01-25 05:37:23,960 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-25 05:37:23,960 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-25 05:37:24,309 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-25 05:37:24,309 INFO L268 AbstractInterpreter]: Visited 51 different actions 82 times. Merged at 24 different actions 27 times. Never widened. Found 6 fixpoints after 5 different actions. Largest state had 20 variables. [2018-01-25 05:37:24,317 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-25 05:37:24,317 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:24,317 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:37:24,331 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:37:24,331 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:37:24,360 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:24,362 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:24,712 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-25 05:37:24,712 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:24,895 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-25 05:37:24,916 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:24,917 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 16 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:37:24,920 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:37:24,920 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:37:24,965 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:24,969 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:24,974 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-25 05:37:24,974 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:25,012 INFO L134 CoverageAnalysis]: Checked inductivity of 27 backedges. 0 proven. 21 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-25 05:37:25,014 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:37:25,014 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 10, 10, 10, 10] total 25 [2018-01-25 05:37:25,015 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:37:25,015 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-25 05:37:25,015 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-25 05:37:25,015 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=160, Invalid=440, Unknown=0, NotChecked=0, Total=600 [2018-01-25 05:37:25,015 INFO L87 Difference]: Start difference. First operand 77 states and 83 transitions. Second operand 17 states. [2018-01-25 05:37:25,200 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:37:25,200 INFO L93 Difference]: Finished difference Result 150 states and 163 transitions. [2018-01-25 05:37:25,201 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-25 05:37:25,201 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 60 [2018-01-25 05:37:25,201 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:37:25,201 INFO L225 Difference]: With dead ends: 150 [2018-01-25 05:37:25,201 INFO L226 Difference]: Without dead ends: 87 [2018-01-25 05:37:25,202 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 257 GetRequests, 222 SyntacticMatches, 8 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 106 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=191, Invalid=621, Unknown=0, NotChecked=0, Total=812 [2018-01-25 05:37:25,202 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 87 states. [2018-01-25 05:37:25,207 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 87 to 84. [2018-01-25 05:37:25,207 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 84 states. [2018-01-25 05:37:25,208 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 84 states to 84 states and 90 transitions. [2018-01-25 05:37:25,208 INFO L78 Accepts]: Start accepts. Automaton has 84 states and 90 transitions. Word has length 60 [2018-01-25 05:37:25,208 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:37:25,209 INFO L432 AbstractCegarLoop]: Abstraction has 84 states and 90 transitions. [2018-01-25 05:37:25,209 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-25 05:37:25,209 INFO L276 IsEmpty]: Start isEmpty. Operand 84 states and 90 transitions. [2018-01-25 05:37:25,209 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-01-25 05:37:25,209 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:37:25,209 INFO L322 BasicCegarLoop]: trace histogram [7, 3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:37:25,209 INFO L371 AbstractCegarLoop]: === Iteration 17 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-25 05:37:25,210 INFO L82 PathProgramCache]: Analyzing trace with hash -374403177, now seen corresponding path program 2 times [2018-01-25 05:37:25,210 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:37:25,210 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:25,210 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:37:25,210 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:25,211 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:37:25,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:25,227 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:37:25,546 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 0 proven. 5 refuted. 0 times theorem prover too weak. 38 trivial. 0 not checked. [2018-01-25 05:37:25,547 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:25,547 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:37:25,547 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:37:25,547 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:37:25,547 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:25,547 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:37:25,554 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:37:25,554 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:37:25,576 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:37:25,594 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:37:25,596 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:37:25,599 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:25,699 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-25 05:37:25,700 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:25,924 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-25 05:37:25,946 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:25,946 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 18 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:37:25,950 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:37:25,950 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:37:25,975 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:37:26,008 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:37:26,026 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:37:26,031 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:26,036 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-25 05:37:26,036 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:26,074 INFO L134 CoverageAnalysis]: Checked inductivity of 43 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-25 05:37:26,076 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:37:26,076 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 11, 11, 11, 11] total 28 [2018-01-25 05:37:26,076 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:37:26,076 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-25 05:37:26,076 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-25 05:37:26,077 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=197, Invalid=559, Unknown=0, NotChecked=0, Total=756 [2018-01-25 05:37:26,077 INFO L87 Difference]: Start difference. First operand 84 states and 90 transitions. Second operand 19 states. [2018-01-25 05:37:26,308 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:37:26,308 INFO L93 Difference]: Finished difference Result 154 states and 166 transitions. [2018-01-25 05:37:26,308 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-25 05:37:26,308 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 67 [2018-01-25 05:37:26,308 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:37:26,309 INFO L225 Difference]: With dead ends: 154 [2018-01-25 05:37:26,309 INFO L226 Difference]: Without dead ends: 85 [2018-01-25 05:37:26,310 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 288 GetRequests, 250 SyntacticMatches, 8 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 123 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=229, Invalid=763, Unknown=0, NotChecked=0, Total=992 [2018-01-25 05:37:26,310 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2018-01-25 05:37:26,315 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 85. [2018-01-25 05:37:26,315 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 85 states. [2018-01-25 05:37:26,316 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 85 states to 85 states and 90 transitions. [2018-01-25 05:37:26,316 INFO L78 Accepts]: Start accepts. Automaton has 85 states and 90 transitions. Word has length 67 [2018-01-25 05:37:26,316 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:37:26,316 INFO L432 AbstractCegarLoop]: Abstraction has 85 states and 90 transitions. [2018-01-25 05:37:26,316 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-25 05:37:26,316 INFO L276 IsEmpty]: Start isEmpty. Operand 85 states and 90 transitions. [2018-01-25 05:37:26,317 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 75 [2018-01-25 05:37:26,317 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:37:26,317 INFO L322 BasicCegarLoop]: trace histogram [8, 3, 3, 3, 3, 2, 2, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:37:26,317 INFO L371 AbstractCegarLoop]: === Iteration 18 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-25 05:37:26,317 INFO L82 PathProgramCache]: Analyzing trace with hash -1696068192, now seen corresponding path program 3 times [2018-01-25 05:37:26,317 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:37:26,318 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:26,318 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:37:26,318 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:26,318 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:37:26,331 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:26,331 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:37:26,545 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-25 05:37:26,545 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:26,545 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:37:26,545 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:37:26,545 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:37:26,545 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:26,545 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:37:26,551 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:37:26,551 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:37:26,567 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:37:26,580 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:37:26,592 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:37:26,594 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:37:26,597 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:26,619 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-25 05:37:26,620 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-25 05:37:26,620 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:26,621 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:26,623 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:26,624 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:15, output treesize:11 [2018-01-25 05:37:26,637 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-01-25 05:37:26,638 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,639 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,640 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 31 [2018-01-25 05:37:26,640 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:26,644 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:26,648 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:26,648 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:20 [2018-01-25 05:37:26,664 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 23 [2018-01-25 05:37:26,665 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,666 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,667 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,667 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,668 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,669 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,669 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 78 [2018-01-25 05:37:26,669 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:26,680 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:26,686 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:26,686 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:33, output treesize:29 [2018-01-25 05:37:26,707 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2018-01-25 05:37:26,710 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,711 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,711 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,712 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,712 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,713 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,714 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,714 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,715 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,715 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,716 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,717 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,717 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 12 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 149 [2018-01-25 05:37:26,718 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:26,733 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:26,739 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:26,739 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:38 [2018-01-25 05:37:26,760 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 37 [2018-01-25 05:37:26,763 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,764 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,764 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,765 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,765 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,766 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,767 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,767 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,768 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,768 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,769 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,769 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,770 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,771 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,771 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,772 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,773 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 16 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 206 [2018-01-25 05:37:26,773 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:26,796 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:26,803 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:26,803 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:51, output treesize:47 [2018-01-25 05:37:26,839 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 44 [2018-01-25 05:37:26,842 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,842 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,843 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,844 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,844 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,845 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,845 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,846 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,846 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,847 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,847 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,848 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,848 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,849 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,850 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,850 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,851 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,851 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,852 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,853 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,853 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,854 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 21 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 253 [2018-01-25 05:37:26,854 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:26,888 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:26,899 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:26,899 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:60, output treesize:56 [2018-01-25 05:37:26,948 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 51 [2018-01-25 05:37:26,951 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,952 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,953 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,954 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,954 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,955 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,956 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,956 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,957 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,957 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,958 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,959 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,959 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,960 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,960 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,961 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,962 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,962 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,963 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,963 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,964 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,965 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,965 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,966 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,966 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,967 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,967 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:26,968 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 27 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 308 [2018-01-25 05:37:26,969 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:27,013 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:27,023 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:27,023 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:69, output treesize:65 [2018-01-25 05:37:27,357 WARN L307 Elim1Store]: Array PQE input equivalent to false [2018-01-25 05:37:27,358 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:27,358 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:27,359 INFO L202 ElimStorePlain]: Needed 2 recursive calls to eliminate 3 variables, input treesize:121, output treesize:1 [2018-01-25 05:37:27,373 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 48 trivial. 0 not checked. [2018-01-25 05:37:27,373 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:27,760 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 48 trivial. 0 not checked. [2018-01-25 05:37:27,795 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:27,795 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 20 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:37:27,804 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:37:27,805 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:37:27,847 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:37:27,897 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:37:28,037 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:37:28,092 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:37:28,100 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:28,109 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 11 treesize of output 8 [2018-01-25 05:37:28,111 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 8 treesize of output 7 [2018-01-25 05:37:28,111 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:28,112 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:28,115 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:28,116 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:15, output treesize:11 [2018-01-25 05:37:28,119 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 21 treesize of output 16 [2018-01-25 05:37:28,122 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,122 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,123 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 2 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 16 treesize of output 31 [2018-01-25 05:37:28,123 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:28,128 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:28,132 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:28,133 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:24, output treesize:20 [2018-01-25 05:37:28,136 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 23 [2018-01-25 05:37:28,138 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,139 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,139 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,140 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,141 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,141 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,142 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 6 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 23 treesize of output 78 [2018-01-25 05:37:28,143 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:28,152 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:28,157 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:28,158 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:33, output treesize:29 [2018-01-25 05:37:28,161 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 39 treesize of output 30 [2018-01-25 05:37:28,163 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,164 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,165 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,165 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,166 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,166 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,167 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,168 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,168 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,169 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,170 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,171 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,171 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 12 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 30 treesize of output 149 [2018-01-25 05:37:28,172 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:28,205 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:28,211 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:28,212 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:38 [2018-01-25 05:37:28,215 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 48 treesize of output 37 [2018-01-25 05:37:28,221 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,222 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,223 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,224 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,224 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,225 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,225 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,226 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,227 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,227 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,228 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,228 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,229 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,230 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,230 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,231 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,232 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 16 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 37 treesize of output 206 [2018-01-25 05:37:28,232 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:28,258 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:28,266 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:28,266 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:51, output treesize:47 [2018-01-25 05:37:28,270 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 57 treesize of output 44 [2018-01-25 05:37:28,274 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,274 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,275 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,276 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,276 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,277 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,278 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,278 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,279 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,279 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,280 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,281 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,281 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,282 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,283 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,284 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,284 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,285 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,286 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,286 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,287 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,288 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 21 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 44 treesize of output 253 [2018-01-25 05:37:28,288 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:28,335 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:28,344 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:28,345 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:60, output treesize:56 [2018-01-25 05:37:28,348 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 66 treesize of output 51 [2018-01-25 05:37:28,351 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,352 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,352 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,353 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,354 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,354 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,355 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,356 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,356 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,357 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,358 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,358 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,359 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,359 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,360 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,361 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,361 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,362 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,363 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,363 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,364 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,364 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,365 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,366 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,367 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,367 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,368 INFO L700 Elim1Store]: detected not equals via solver [2018-01-25 05:37:28,369 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 27 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 51 treesize of output 308 [2018-01-25 05:37:28,369 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-25 05:37:28,417 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:28,428 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-25 05:37:28,428 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:69, output treesize:65 [2018-01-25 05:37:28,838 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 48 trivial. 0 not checked. [2018-01-25 05:37:28,838 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:29,062 INFO L134 CoverageAnalysis]: Checked inductivity of 60 backedges. 0 proven. 12 refuted. 0 times theorem prover too weak. 48 trivial. 0 not checked. [2018-01-25 05:37:29,064 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:37:29,065 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 17, 8, 17, 8] total 42 [2018-01-25 05:37:29,065 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:37:29,065 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-25 05:37:29,065 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-25 05:37:29,066 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=213, Invalid=1509, Unknown=0, NotChecked=0, Total=1722 [2018-01-25 05:37:29,066 INFO L87 Difference]: Start difference. First operand 85 states and 90 transitions. Second operand 28 states. [2018-01-25 05:37:30,250 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:37:30,250 INFO L93 Difference]: Finished difference Result 130 states and 139 transitions. [2018-01-25 05:37:30,251 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-25 05:37:30,251 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 74 [2018-01-25 05:37:30,251 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:37:30,252 INFO L225 Difference]: With dead ends: 130 [2018-01-25 05:37:30,252 INFO L226 Difference]: Without dead ends: 94 [2018-01-25 05:37:30,253 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 338 GetRequests, 248 SyntacticMatches, 28 SemanticMatches, 62 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1458 ImplicationChecksByTransitivity, 2.1s TimeCoverageRelationStatistics Valid=476, Invalid=3556, Unknown=0, NotChecked=0, Total=4032 [2018-01-25 05:37:30,254 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2018-01-25 05:37:30,263 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 91. [2018-01-25 05:37:30,263 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 91 states. [2018-01-25 05:37:30,264 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 91 states to 91 states and 95 transitions. [2018-01-25 05:37:30,264 INFO L78 Accepts]: Start accepts. Automaton has 91 states and 95 transitions. Word has length 74 [2018-01-25 05:37:30,264 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:37:30,264 INFO L432 AbstractCegarLoop]: Abstraction has 91 states and 95 transitions. [2018-01-25 05:37:30,265 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-25 05:37:30,265 INFO L276 IsEmpty]: Start isEmpty. Operand 91 states and 95 transitions. [2018-01-25 05:37:30,265 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 87 [2018-01-25 05:37:30,266 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:37:30,266 INFO L322 BasicCegarLoop]: trace histogram [8, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:37:30,266 INFO L371 AbstractCegarLoop]: === Iteration 19 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-25 05:37:30,266 INFO L82 PathProgramCache]: Analyzing trace with hash 1151371872, now seen corresponding path program 4 times [2018-01-25 05:37:30,266 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:37:30,267 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:30,267 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:37:30,267 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:30,267 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:37:30,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:30,288 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:37:30,523 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:37:30,523 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:30,523 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:37:30,523 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:37:30,524 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:37:30,524 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:30,524 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:37:30,536 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:37:30,536 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:37:30,592 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:37:30,595 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:30,676 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:37:30,676 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:30,850 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:37:30,871 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:30,871 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 22 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:37:30,876 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:37:30,876 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:37:30,969 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:37:30,975 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:30,981 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:37:30,981 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:31,026 INFO L134 CoverageAnalysis]: Checked inductivity of 90 backedges. 0 proven. 36 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:37:31,027 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:37:31,027 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 32 [2018-01-25 05:37:31,028 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:37:31,028 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-25 05:37:31,028 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-25 05:37:31,028 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=357, Invalid=635, Unknown=0, NotChecked=0, Total=992 [2018-01-25 05:37:31,029 INFO L87 Difference]: Start difference. First operand 91 states and 95 transitions. Second operand 22 states. [2018-01-25 05:37:31,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:37:31,079 INFO L93 Difference]: Finished difference Result 164 states and 172 transitions. [2018-01-25 05:37:31,079 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-25 05:37:31,079 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 86 [2018-01-25 05:37:31,079 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:37:31,080 INFO L225 Difference]: With dead ends: 164 [2018-01-25 05:37:31,080 INFO L226 Difference]: Without dead ends: 92 [2018-01-25 05:37:31,080 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 355 GetRequests, 322 SyntacticMatches, 2 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 374 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=380, Invalid=676, Unknown=0, NotChecked=0, Total=1056 [2018-01-25 05:37:31,081 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 92 states. [2018-01-25 05:37:31,089 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 92 to 92. [2018-01-25 05:37:31,089 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 92 states. [2018-01-25 05:37:31,090 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 92 states to 92 states and 96 transitions. [2018-01-25 05:37:31,090 INFO L78 Accepts]: Start accepts. Automaton has 92 states and 96 transitions. Word has length 86 [2018-01-25 05:37:31,090 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:37:31,090 INFO L432 AbstractCegarLoop]: Abstraction has 92 states and 96 transitions. [2018-01-25 05:37:31,090 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-25 05:37:31,090 INFO L276 IsEmpty]: Start isEmpty. Operand 92 states and 96 transitions. [2018-01-25 05:37:31,091 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 88 [2018-01-25 05:37:31,092 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:37:31,092 INFO L322 BasicCegarLoop]: trace histogram [9, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:37:31,092 INFO L371 AbstractCegarLoop]: === Iteration 20 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-25 05:37:31,092 INFO L82 PathProgramCache]: Analyzing trace with hash -1429474957, now seen corresponding path program 5 times [2018-01-25 05:37:31,092 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:37:31,093 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:31,093 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:37:31,093 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:31,093 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:37:31,113 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:31,115 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:37:31,275 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:37:31,275 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:31,275 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:37:31,276 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:37:31,276 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:37:31,276 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:31,276 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:37:31,281 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 05:37:31,281 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:37:31,290 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:37:31,292 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:37:31,296 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:37:31,302 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:37:31,310 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:37:31,325 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:37:31,328 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:37:31,331 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:31,406 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:37:31,407 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:31,626 WARN L143 SmtUtils]: Spent 112ms on a formula simplification that was a NOOP. DAG size: 35 [2018-01-25 05:37:31,813 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:37:31,834 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:31,834 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 24 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:37:31,838 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 05:37:31,838 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:37:31,848 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:37:31,851 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:37:31,864 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:37:31,888 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:37:31,978 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:37:32,435 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:37:32,459 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:37:32,465 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:32,471 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:37:32,471 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:32,522 INFO L134 CoverageAnalysis]: Checked inductivity of 99 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:37:32,523 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:37:32,523 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 35 [2018-01-25 05:37:32,524 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:37:32,524 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-25 05:37:32,524 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-25 05:37:32,525 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=426, Invalid=764, Unknown=0, NotChecked=0, Total=1190 [2018-01-25 05:37:32,525 INFO L87 Difference]: Start difference. First operand 92 states and 96 transitions. Second operand 24 states. [2018-01-25 05:37:32,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:37:32,582 INFO L93 Difference]: Finished difference Result 165 states and 173 transitions. [2018-01-25 05:37:32,582 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-25 05:37:32,582 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 87 [2018-01-25 05:37:32,582 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:37:32,583 INFO L225 Difference]: With dead ends: 165 [2018-01-25 05:37:32,583 INFO L226 Difference]: Without dead ends: 93 [2018-01-25 05:37:32,583 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 360 GetRequests, 324 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 457 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=451, Invalid=809, Unknown=0, NotChecked=0, Total=1260 [2018-01-25 05:37:32,584 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2018-01-25 05:37:32,589 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 93. [2018-01-25 05:37:32,589 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 93 states. [2018-01-25 05:37:32,589 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 93 states to 93 states and 97 transitions. [2018-01-25 05:37:32,589 INFO L78 Accepts]: Start accepts. Automaton has 93 states and 97 transitions. Word has length 87 [2018-01-25 05:37:32,590 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:37:32,590 INFO L432 AbstractCegarLoop]: Abstraction has 93 states and 97 transitions. [2018-01-25 05:37:32,590 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-25 05:37:32,590 INFO L276 IsEmpty]: Start isEmpty. Operand 93 states and 97 transitions. [2018-01-25 05:37:32,590 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-01-25 05:37:32,590 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:37:32,590 INFO L322 BasicCegarLoop]: trace histogram [10, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:37:32,591 INFO L371 AbstractCegarLoop]: === Iteration 21 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-25 05:37:32,591 INFO L82 PathProgramCache]: Analyzing trace with hash 168651968, now seen corresponding path program 6 times [2018-01-25 05:37:32,591 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:37:32,591 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:32,591 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:37:32,591 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:32,592 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:37:32,604 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:32,605 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:37:33,156 INFO L134 CoverageAnalysis]: Checked inductivity of 109 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:37:33,157 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:33,157 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:37:33,157 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:37:33,157 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:37:33,157 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:33,157 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:37:33,163 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 05:37:33,163 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 05:37:33,181 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:37:33,192 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:37:33,202 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:37:33,229 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:37:33,269 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:37:33,387 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:37:33,389 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:37:33,391 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:33,458 INFO L134 CoverageAnalysis]: Checked inductivity of 109 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:37:33,458 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:33,702 INFO L134 CoverageAnalysis]: Checked inductivity of 109 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:37:33,735 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:33,735 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 26 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:37:33,739 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 05:37:33,740 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 05:37:33,766 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:37:33,792 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:37:33,838 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:37:34,097 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:37:34,729 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:37:36,401 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:37:36,432 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:37:36,439 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:36,445 INFO L134 CoverageAnalysis]: Checked inductivity of 109 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:37:36,445 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:36,489 INFO L134 CoverageAnalysis]: Checked inductivity of 109 backedges. 0 proven. 55 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:37:36,490 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:37:36,491 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 38 [2018-01-25 05:37:36,491 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:37:36,491 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-25 05:37:36,491 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-25 05:37:36,492 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=501, Invalid=905, Unknown=0, NotChecked=0, Total=1406 [2018-01-25 05:37:36,492 INFO L87 Difference]: Start difference. First operand 93 states and 97 transitions. Second operand 26 states. [2018-01-25 05:37:36,531 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:37:36,531 INFO L93 Difference]: Finished difference Result 166 states and 174 transitions. [2018-01-25 05:37:36,532 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-25 05:37:36,532 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 88 [2018-01-25 05:37:36,532 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:37:36,533 INFO L225 Difference]: With dead ends: 166 [2018-01-25 05:37:36,533 INFO L226 Difference]: Without dead ends: 94 [2018-01-25 05:37:36,534 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 365 GetRequests, 326 SyntacticMatches, 2 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 548 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=528, Invalid=954, Unknown=0, NotChecked=0, Total=1482 [2018-01-25 05:37:36,534 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 94 states. [2018-01-25 05:37:36,541 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 94 to 94. [2018-01-25 05:37:36,541 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 94 states. [2018-01-25 05:37:36,541 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 94 states to 94 states and 98 transitions. [2018-01-25 05:37:36,542 INFO L78 Accepts]: Start accepts. Automaton has 94 states and 98 transitions. Word has length 88 [2018-01-25 05:37:36,542 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:37:36,542 INFO L432 AbstractCegarLoop]: Abstraction has 94 states and 98 transitions. [2018-01-25 05:37:36,542 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-25 05:37:36,542 INFO L276 IsEmpty]: Start isEmpty. Operand 94 states and 98 transitions. [2018-01-25 05:37:36,543 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 90 [2018-01-25 05:37:36,543 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:37:36,543 INFO L322 BasicCegarLoop]: trace histogram [11, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:37:36,543 INFO L371 AbstractCegarLoop]: === Iteration 22 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-25 05:37:36,543 INFO L82 PathProgramCache]: Analyzing trace with hash -1829020909, now seen corresponding path program 7 times [2018-01-25 05:37:36,543 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:37:36,544 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:36,544 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:37:36,544 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:36,544 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:37:36,558 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:36,569 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:37:36,780 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:37:36,780 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:36,780 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:37:36,780 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:37:36,780 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:37:36,780 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:36,780 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:37:36,786 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:37:36,786 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:37:36,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:36,813 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:36,886 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:37:36,886 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:37,147 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:37:37,167 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:37,167 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 28 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:37:37,170 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:37:37,170 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:37:37,229 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:37,234 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:37,243 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:37:37,243 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:37,295 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:37:37,296 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:37:37,297 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 41 [2018-01-25 05:37:37,297 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:37:37,297 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-25 05:37:37,297 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-25 05:37:37,298 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=582, Invalid=1058, Unknown=0, NotChecked=0, Total=1640 [2018-01-25 05:37:37,298 INFO L87 Difference]: Start difference. First operand 94 states and 98 transitions. Second operand 28 states. [2018-01-25 05:37:37,337 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:37:37,337 INFO L93 Difference]: Finished difference Result 167 states and 175 transitions. [2018-01-25 05:37:37,339 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-25 05:37:37,339 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 89 [2018-01-25 05:37:37,339 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:37:37,340 INFO L225 Difference]: With dead ends: 167 [2018-01-25 05:37:37,340 INFO L226 Difference]: Without dead ends: 95 [2018-01-25 05:37:37,341 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 370 GetRequests, 328 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 647 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=611, Invalid=1111, Unknown=0, NotChecked=0, Total=1722 [2018-01-25 05:37:37,341 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 95 states. [2018-01-25 05:37:37,346 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 95 to 95. [2018-01-25 05:37:37,346 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 95 states. [2018-01-25 05:37:37,347 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 95 states to 95 states and 99 transitions. [2018-01-25 05:37:37,347 INFO L78 Accepts]: Start accepts. Automaton has 95 states and 99 transitions. Word has length 89 [2018-01-25 05:37:37,347 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:37:37,347 INFO L432 AbstractCegarLoop]: Abstraction has 95 states and 99 transitions. [2018-01-25 05:37:37,347 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-25 05:37:37,347 INFO L276 IsEmpty]: Start isEmpty. Operand 95 states and 99 transitions. [2018-01-25 05:37:37,348 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 91 [2018-01-25 05:37:37,348 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:37:37,348 INFO L322 BasicCegarLoop]: trace histogram [12, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:37:37,348 INFO L371 AbstractCegarLoop]: === Iteration 23 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-25 05:37:37,348 INFO L82 PathProgramCache]: Analyzing trace with hash 667629344, now seen corresponding path program 8 times [2018-01-25 05:37:37,348 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:37:37,349 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:37,349 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:37:37,349 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:37,349 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:37:37,362 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:37,363 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:37:37,513 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:37:37,513 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:37,513 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:37:37,513 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:37:37,513 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:37:37,514 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:37,514 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:37:37,519 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:37:37,519 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:37:37,533 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:37:37,548 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:37:37,551 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:37:37,553 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:37,636 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:37:37,636 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:37,899 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:37:37,919 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:37,919 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 30 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:37:37,922 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:37:37,922 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:37:37,946 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:37:37,987 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:37:38,009 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:37:38,014 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:38,020 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:37:38,020 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:38,072 INFO L134 CoverageAnalysis]: Checked inductivity of 132 backedges. 0 proven. 78 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:37:38,074 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:37:38,074 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 44 [2018-01-25 05:37:38,074 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:37:38,074 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-25 05:37:38,074 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-25 05:37:38,075 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=669, Invalid=1223, Unknown=0, NotChecked=0, Total=1892 [2018-01-25 05:37:38,075 INFO L87 Difference]: Start difference. First operand 95 states and 99 transitions. Second operand 30 states. [2018-01-25 05:37:38,125 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:37:38,125 INFO L93 Difference]: Finished difference Result 168 states and 176 transitions. [2018-01-25 05:37:38,125 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-25 05:37:38,125 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 90 [2018-01-25 05:37:38,125 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:37:38,126 INFO L225 Difference]: With dead ends: 168 [2018-01-25 05:37:38,126 INFO L226 Difference]: Without dead ends: 96 [2018-01-25 05:37:38,127 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 375 GetRequests, 330 SyntacticMatches, 2 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 754 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=700, Invalid=1280, Unknown=0, NotChecked=0, Total=1980 [2018-01-25 05:37:38,127 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2018-01-25 05:37:38,134 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 96. [2018-01-25 05:37:38,134 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 96 states. [2018-01-25 05:37:38,135 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 96 states to 96 states and 100 transitions. [2018-01-25 05:37:38,135 INFO L78 Accepts]: Start accepts. Automaton has 96 states and 100 transitions. Word has length 90 [2018-01-25 05:37:38,135 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:37:38,135 INFO L432 AbstractCegarLoop]: Abstraction has 96 states and 100 transitions. [2018-01-25 05:37:38,135 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-25 05:37:38,135 INFO L276 IsEmpty]: Start isEmpty. Operand 96 states and 100 transitions. [2018-01-25 05:37:38,136 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-01-25 05:37:38,136 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:37:38,136 INFO L322 BasicCegarLoop]: trace histogram [13, 4, 4, 4, 4, 3, 3, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:37:38,136 INFO L371 AbstractCegarLoop]: === Iteration 24 === [Sum2Err2RequiresViolation, Sum2Err0RequiresViolation, Sum2Err1RequiresViolation, Sum2Err3RequiresViolation, SumErr2RequiresViolation, SumErr3RequiresViolation, SumErr1RequiresViolation, SumErr0RequiresViolation, mainErr5RequiresViolation, mainErr13RequiresViolation, mainErr1RequiresViolation, mainErr16EnsuresViolation, mainErr9RequiresViolation, mainErr0RequiresViolation, mainErr3RequiresViolation, mainErr7RequiresViolation, mainErr11RequiresViolation, mainErr8RequiresViolation, mainErr10RequiresViolation, mainErr15RequiresViolation, mainErr2RequiresViolation, mainErr4RequiresViolation, mainErr12RequiresViolation, mainErr6RequiresViolation, mainErr14RequiresViolation]=== [2018-01-25 05:37:38,136 INFO L82 PathProgramCache]: Analyzing trace with hash 754375859, now seen corresponding path program 9 times [2018-01-25 05:37:38,136 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:37:38,137 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:38,137 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:37:38,137 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:37:38,137 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:37:38,155 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:37:38,156 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:37:38,338 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:37:38,339 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:38,339 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:37:38,339 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:37:38,339 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:37:38,339 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:38,339 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:37:38,343 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:37:38,344 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:37:38,362 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:37:38,379 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:37:38,396 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:37:38,413 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:37:38,444 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:37:38,481 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:37:38,658 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:37:38,742 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:37:38,743 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:37:38,746 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:37:38,844 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:37:38,844 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:37:39,129 INFO L134 CoverageAnalysis]: Checked inductivity of 145 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 54 trivial. 0 not checked. [2018-01-25 05:37:39,150 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:37:39,150 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 32 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:37:39,153 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:37:39,153 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:37:39,181 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:37:39,210 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:37:39,283 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:37:39,441 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:37:51,457 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command Received shutdown request... Cannot interrupt operation gracefully because timeout expired. Forcing shutdown