java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf -i ../../../trunk/examples/svcomp/array-examples/sanfoundry_24_false-valid-deref.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-6b94a2f [2018-01-25 05:33:04,561 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-25 05:33:04,563 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-25 05:33:04,578 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-25 05:33:04,578 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-25 05:33:04,579 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-25 05:33:04,580 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-25 05:33:04,582 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-25 05:33:04,584 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-25 05:33:04,585 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-25 05:33:04,586 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-25 05:33:04,586 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-25 05:33:04,587 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-25 05:33:04,588 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-25 05:33:04,589 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-25 05:33:04,592 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-25 05:33:04,594 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-25 05:33:04,596 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-25 05:33:04,597 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-25 05:33:04,598 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-25 05:33:04,601 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-01-25 05:33:04,606 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-25 05:33:04,606 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-25 05:33:04,607 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf [2018-01-25 05:33:04,614 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-25 05:33:04,615 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-25 05:33:04,615 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-25 05:33:04,616 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-25 05:33:04,616 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-25 05:33:04,616 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-25 05:33:04,616 INFO L133 SettingsManager]: * Precise comparison operator=true [2018-01-25 05:33:04,616 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-25 05:33:04,617 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-25 05:33:04,617 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-25 05:33:04,617 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-25 05:33:04,617 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-25 05:33:04,617 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-25 05:33:04,617 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-25 05:33:04,617 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-25 05:33:04,618 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-25 05:33:04,618 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-25 05:33:04,618 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-25 05:33:04,618 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-25 05:33:04,618 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-25 05:33:04,618 INFO L133 SettingsManager]: * Size of a code block=SequenceOfStatements [2018-01-25 05:33:04,618 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-25 05:33:04,619 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-25 05:33:04,619 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-25 05:33:04,619 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-25 05:33:04,619 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-25 05:33:04,619 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-25 05:33:04,619 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-25 05:33:04,620 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-25 05:33:04,620 INFO L133 SettingsManager]: * Trace refinement strategy=TAIPAN [2018-01-25 05:33:04,620 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-25 05:33:04,620 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-25 05:33:04,620 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-25 05:33:04,620 INFO L133 SettingsManager]: * Abstract interpretation Mode=USE_PREDICATES [2018-01-25 05:33:04,621 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-25 05:33:04,621 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-25 05:33:04,653 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-25 05:33:04,663 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-25 05:33:04,666 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-25 05:33:04,667 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-25 05:33:04,668 INFO L276 PluginConnector]: CDTParser initialized [2018-01-25 05:33:04,668 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-examples/sanfoundry_24_false-valid-deref.i [2018-01-25 05:33:04,832 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-25 05:33:04,837 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-25 05:33:04,838 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-25 05:33:04,838 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-25 05:33:04,842 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-25 05:33:04,843 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.01 05:33:04" (1/1) ... [2018-01-25 05:33:04,846 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@66806a10 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:33:04, skipping insertion in model container [2018-01-25 05:33:04,846 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 25.01 05:33:04" (1/1) ... [2018-01-25 05:33:04,858 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-25 05:33:04,872 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-25 05:33:04,979 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-25 05:33:04,991 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-25 05:33:04,996 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:33:04 WrapperNode [2018-01-25 05:33:04,997 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-25 05:33:04,997 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-25 05:33:04,997 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-25 05:33:04,997 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-25 05:33:05,008 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:33:04" (1/1) ... [2018-01-25 05:33:05,008 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:33:04" (1/1) ... [2018-01-25 05:33:05,015 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:33:04" (1/1) ... [2018-01-25 05:33:05,015 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:33:04" (1/1) ... [2018-01-25 05:33:05,017 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:33:04" (1/1) ... [2018-01-25 05:33:05,022 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:33:04" (1/1) ... [2018-01-25 05:33:05,023 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:33:04" (1/1) ... [2018-01-25 05:33:05,025 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-25 05:33:05,026 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-25 05:33:05,026 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-25 05:33:05,026 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-25 05:33:05,027 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:33:04" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-25 05:33:05,072 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-25 05:33:05,073 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-25 05:33:05,073 INFO L136 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-01-25 05:33:05,073 INFO L136 BoogieDeclarations]: Found implementation of procedure printEven [2018-01-25 05:33:05,073 INFO L136 BoogieDeclarations]: Found implementation of procedure printOdd [2018-01-25 05:33:05,073 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-25 05:33:05,073 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-01-25 05:33:05,073 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-01-25 05:33:05,074 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-25 05:33:05,074 INFO L128 BoogieDeclarations]: Found specification of procedure printEven [2018-01-25 05:33:05,074 INFO L128 BoogieDeclarations]: Found specification of procedure printOdd [2018-01-25 05:33:05,074 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-25 05:33:05,074 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-25 05:33:05,074 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-25 05:33:05,202 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-25 05:33:05,202 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.01 05:33:05 BoogieIcfgContainer [2018-01-25 05:33:05,202 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-25 05:33:05,203 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-25 05:33:05,203 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-25 05:33:05,205 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-25 05:33:05,205 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 25.01 05:33:04" (1/3) ... [2018-01-25 05:33:05,206 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@b2144c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 25.01 05:33:05, skipping insertion in model container [2018-01-25 05:33:05,206 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 25.01 05:33:04" (2/3) ... [2018-01-25 05:33:05,206 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@b2144c and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 25.01 05:33:05, skipping insertion in model container [2018-01-25 05:33:05,206 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 25.01 05:33:05" (3/3) ... [2018-01-25 05:33:05,208 INFO L105 eAbstractionObserver]: Analyzing ICFG sanfoundry_24_false-valid-deref.i [2018-01-25 05:33:05,215 INFO L130 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-25 05:33:05,222 INFO L142 ceAbstractionStarter]: Appying trace abstraction to program that has 4 error locations. [2018-01-25 05:33:05,260 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-25 05:33:05,260 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-25 05:33:05,260 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-25 05:33:05,260 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-25 05:33:05,260 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-25 05:33:05,260 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-25 05:33:05,261 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-25 05:33:05,261 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-25 05:33:05,261 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-25 05:33:05,280 INFO L276 IsEmpty]: Start isEmpty. Operand 42 states. [2018-01-25 05:33:05,287 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 9 [2018-01-25 05:33:05,287 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:05,288 INFO L322 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:05,289 INFO L371 AbstractCegarLoop]: === Iteration 1 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:05,294 INFO L82 PathProgramCache]: Analyzing trace with hash 529177341, now seen corresponding path program 1 times [2018-01-25 05:33:05,296 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:05,346 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:05,346 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:05,346 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:05,346 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:05,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:05,383 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:05,433 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:05,435 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-25 05:33:05,435 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-25 05:33:05,436 INFO L252 anRefinementStrategy]: Using the first perfect interpolant sequence [2018-01-25 05:33:05,437 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-25 05:33:05,448 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-25 05:33:05,448 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-25 05:33:05,450 INFO L87 Difference]: Start difference. First operand 42 states. Second operand 3 states. [2018-01-25 05:33:05,582 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:05,582 INFO L93 Difference]: Finished difference Result 97 states and 129 transitions. [2018-01-25 05:33:05,583 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-25 05:33:05,584 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 8 [2018-01-25 05:33:05,584 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:05,592 INFO L225 Difference]: With dead ends: 97 [2018-01-25 05:33:05,592 INFO L226 Difference]: Without dead ends: 51 [2018-01-25 05:33:05,597 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-25 05:33:05,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 51 states. [2018-01-25 05:33:05,693 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 51 to 46. [2018-01-25 05:33:05,694 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 46 states. [2018-01-25 05:33:05,696 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 46 states to 46 states and 53 transitions. [2018-01-25 05:33:05,697 INFO L78 Accepts]: Start accepts. Automaton has 46 states and 53 transitions. Word has length 8 [2018-01-25 05:33:05,697 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:05,698 INFO L432 AbstractCegarLoop]: Abstraction has 46 states and 53 transitions. [2018-01-25 05:33:05,698 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-25 05:33:05,698 INFO L276 IsEmpty]: Start isEmpty. Operand 46 states and 53 transitions. [2018-01-25 05:33:05,699 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 14 [2018-01-25 05:33:05,699 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:05,699 INFO L322 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:05,699 INFO L371 AbstractCegarLoop]: === Iteration 2 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:05,700 INFO L82 PathProgramCache]: Analyzing trace with hash -2078569521, now seen corresponding path program 1 times [2018-01-25 05:33:05,700 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:05,701 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:05,701 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:05,702 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:05,702 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:05,716 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:05,717 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:05,764 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:05,764 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:05,764 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:05,766 INFO L199 CegarAbsIntRunner]: Running AI on error trace of length 14 with the following transitions: [2018-01-25 05:33:05,767 INFO L201 CegarAbsIntRunner]: [0], [10], [14], [19], [20], [21], [29], [31], [74], [75], [76] [2018-01-25 05:33:05,813 INFO L147 AbstractInterpreter]: Using domain VPDomain [2018-01-25 05:33:05,814 INFO L101 FixpointEngine]: Starting fixpoint engine with domain VPDomain (maxUnwinding=3, maxParallelStates=2) [2018-01-25 05:33:05,896 INFO L259 AbstractInterpreter]: Some error location(s) were reachable [2018-01-25 05:33:05,898 INFO L268 AbstractInterpreter]: Visited 11 different actions 17 times. Merged at 6 different actions 6 times. Never widened. Found 1 fixpoints after 1 different actions. Largest state had 5 variables. [2018-01-25 05:33:05,906 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: Unknown [2018-01-25 05:33:05,906 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:05,907 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:05,913 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:05,913 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:33:05,923 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:05,928 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:05,960 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:05,961 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:06,026 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:06,059 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:06,060 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:06,063 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:06,064 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:33:06,074 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:06,077 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:06,087 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:06,087 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:06,107 INFO L134 CoverageAnalysis]: Checked inductivity of 3 backedges. 0 proven. 3 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:06,108 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:06,108 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [3, 3, 3, 3, 3] total 5 [2018-01-25 05:33:06,109 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:06,110 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-25 05:33:06,110 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-25 05:33:06,110 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-01-25 05:33:06,110 INFO L87 Difference]: Start difference. First operand 46 states and 53 transitions. Second operand 4 states. [2018-01-25 05:33:06,203 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:06,203 INFO L93 Difference]: Finished difference Result 70 states and 84 transitions. [2018-01-25 05:33:06,203 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-25 05:33:06,203 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 13 [2018-01-25 05:33:06,203 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:06,205 INFO L225 Difference]: With dead ends: 70 [2018-01-25 05:33:06,205 INFO L226 Difference]: Without dead ends: 66 [2018-01-25 05:33:06,206 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 53 GetRequests, 47 SyntacticMatches, 2 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=13, Invalid=17, Unknown=0, NotChecked=0, Total=30 [2018-01-25 05:33:06,206 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 66 states. [2018-01-25 05:33:06,214 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 66 to 60. [2018-01-25 05:33:06,214 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 60 states. [2018-01-25 05:33:06,216 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 60 states to 60 states and 72 transitions. [2018-01-25 05:33:06,216 INFO L78 Accepts]: Start accepts. Automaton has 60 states and 72 transitions. Word has length 13 [2018-01-25 05:33:06,216 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:06,217 INFO L432 AbstractCegarLoop]: Abstraction has 60 states and 72 transitions. [2018-01-25 05:33:06,217 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-25 05:33:06,217 INFO L276 IsEmpty]: Start isEmpty. Operand 60 states and 72 transitions. [2018-01-25 05:33:06,218 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 19 [2018-01-25 05:33:06,218 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:06,218 INFO L322 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:06,219 INFO L371 AbstractCegarLoop]: === Iteration 3 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:06,219 INFO L82 PathProgramCache]: Analyzing trace with hash 1794788925, now seen corresponding path program 2 times [2018-01-25 05:33:06,219 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:06,220 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:06,220 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:06,220 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:06,220 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:06,231 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:06,232 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:06,290 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:06,291 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:06,291 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:06,291 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:06,291 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:06,291 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:06,292 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:06,300 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:33:06,301 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:06,307 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:06,315 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:06,316 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:06,317 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:06,328 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:06,328 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:06,408 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:06,428 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:06,429 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:06,435 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:33:06,436 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:06,441 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:06,444 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:06,451 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:06,454 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:06,460 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:06,460 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:06,472 INFO L134 CoverageAnalysis]: Checked inductivity of 11 backedges. 0 proven. 11 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:06,474 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:06,474 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4, 4, 4, 4] total 7 [2018-01-25 05:33:06,474 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:06,474 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-25 05:33:06,475 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-25 05:33:06,475 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-01-25 05:33:06,475 INFO L87 Difference]: Start difference. First operand 60 states and 72 transitions. Second operand 5 states. [2018-01-25 05:33:06,612 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:06,612 INFO L93 Difference]: Finished difference Result 85 states and 104 transitions. [2018-01-25 05:33:06,612 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-25 05:33:06,612 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 18 [2018-01-25 05:33:06,613 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:06,614 INFO L225 Difference]: With dead ends: 85 [2018-01-25 05:33:06,614 INFO L226 Difference]: Without dead ends: 81 [2018-01-25 05:33:06,615 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 74 GetRequests, 66 SyntacticMatches, 2 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=22, Invalid=34, Unknown=0, NotChecked=0, Total=56 [2018-01-25 05:33:06,615 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 81 states. [2018-01-25 05:33:06,622 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 81 to 74. [2018-01-25 05:33:06,623 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 74 states. [2018-01-25 05:33:06,624 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 74 states to 74 states and 91 transitions. [2018-01-25 05:33:06,624 INFO L78 Accepts]: Start accepts. Automaton has 74 states and 91 transitions. Word has length 18 [2018-01-25 05:33:06,624 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:06,625 INFO L432 AbstractCegarLoop]: Abstraction has 74 states and 91 transitions. [2018-01-25 05:33:06,625 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-25 05:33:06,625 INFO L276 IsEmpty]: Start isEmpty. Operand 74 states and 91 transitions. [2018-01-25 05:33:06,626 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-25 05:33:06,626 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:06,626 INFO L322 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:06,626 INFO L371 AbstractCegarLoop]: === Iteration 4 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:06,626 INFO L82 PathProgramCache]: Analyzing trace with hash -424025969, now seen corresponding path program 3 times [2018-01-25 05:33:06,626 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:06,627 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:06,627 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:06,627 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:06,627 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:06,639 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:06,640 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:06,726 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:06,726 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:06,727 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:06,727 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:06,727 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:06,727 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:06,727 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:06,738 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:33:06,738 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:33:06,743 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:06,745 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:06,747 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:06,750 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:06,751 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:06,753 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:06,766 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:06,767 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:06,814 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:06,834 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:06,834 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:06,837 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:33:06,837 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:33:06,842 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:06,844 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:06,849 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:06,855 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:06,860 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:06,863 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:06,871 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:06,872 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:06,881 INFO L134 CoverageAnalysis]: Checked inductivity of 24 backedges. 0 proven. 24 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:06,882 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:06,882 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5, 5, 5, 5] total 9 [2018-01-25 05:33:06,882 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:06,882 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-25 05:33:06,883 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-25 05:33:06,883 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-01-25 05:33:06,883 INFO L87 Difference]: Start difference. First operand 74 states and 91 transitions. Second operand 6 states. [2018-01-25 05:33:07,056 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:07,057 INFO L93 Difference]: Finished difference Result 100 states and 124 transitions. [2018-01-25 05:33:07,057 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-25 05:33:07,057 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 23 [2018-01-25 05:33:07,057 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:07,058 INFO L225 Difference]: With dead ends: 100 [2018-01-25 05:33:07,058 INFO L226 Difference]: Without dead ends: 96 [2018-01-25 05:33:07,058 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 95 GetRequests, 85 SyntacticMatches, 2 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 4 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=57, Unknown=0, NotChecked=0, Total=90 [2018-01-25 05:33:07,059 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 96 states. [2018-01-25 05:33:07,064 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 96 to 88. [2018-01-25 05:33:07,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 88 states. [2018-01-25 05:33:07,066 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 88 states to 88 states and 110 transitions. [2018-01-25 05:33:07,066 INFO L78 Accepts]: Start accepts. Automaton has 88 states and 110 transitions. Word has length 23 [2018-01-25 05:33:07,067 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:07,067 INFO L432 AbstractCegarLoop]: Abstraction has 88 states and 110 transitions. [2018-01-25 05:33:07,067 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-25 05:33:07,067 INFO L276 IsEmpty]: Start isEmpty. Operand 88 states and 110 transitions. [2018-01-25 05:33:07,068 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 29 [2018-01-25 05:33:07,068 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:07,068 INFO L322 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:07,068 INFO L371 AbstractCegarLoop]: === Iteration 5 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:07,068 INFO L82 PathProgramCache]: Analyzing trace with hash -1714228867, now seen corresponding path program 4 times [2018-01-25 05:33:07,068 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:07,069 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:07,069 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:07,070 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:07,070 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:07,080 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:07,081 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:07,162 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:07,162 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:07,162 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:07,162 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:07,162 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:07,163 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:07,163 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:07,172 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:33:07,172 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:33:07,184 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:07,186 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:07,194 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:07,194 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:07,290 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:07,309 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:07,309 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:07,312 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:33:07,313 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:33:07,330 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:07,333 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:07,339 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:07,339 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:07,348 INFO L134 CoverageAnalysis]: Checked inductivity of 42 backedges. 0 proven. 42 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:07,350 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:07,350 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6, 6, 6, 6] total 11 [2018-01-25 05:33:07,350 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:07,351 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-25 05:33:07,351 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-25 05:33:07,351 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-01-25 05:33:07,352 INFO L87 Difference]: Start difference. First operand 88 states and 110 transitions. Second operand 7 states. [2018-01-25 05:33:07,554 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:07,555 INFO L93 Difference]: Finished difference Result 115 states and 144 transitions. [2018-01-25 05:33:07,555 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-25 05:33:07,555 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 28 [2018-01-25 05:33:07,556 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:07,557 INFO L225 Difference]: With dead ends: 115 [2018-01-25 05:33:07,557 INFO L226 Difference]: Without dead ends: 111 [2018-01-25 05:33:07,557 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 116 GetRequests, 104 SyntacticMatches, 2 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 5 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=46, Invalid=86, Unknown=0, NotChecked=0, Total=132 [2018-01-25 05:33:07,558 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 111 states. [2018-01-25 05:33:07,567 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 111 to 102. [2018-01-25 05:33:07,567 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 102 states. [2018-01-25 05:33:07,569 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 102 states to 102 states and 129 transitions. [2018-01-25 05:33:07,569 INFO L78 Accepts]: Start accepts. Automaton has 102 states and 129 transitions. Word has length 28 [2018-01-25 05:33:07,569 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:07,569 INFO L432 AbstractCegarLoop]: Abstraction has 102 states and 129 transitions. [2018-01-25 05:33:07,570 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-25 05:33:07,570 INFO L276 IsEmpty]: Start isEmpty. Operand 102 states and 129 transitions. [2018-01-25 05:33:07,571 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 34 [2018-01-25 05:33:07,571 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:07,572 INFO L322 BasicCegarLoop]: trace histogram [6, 6, 5, 5, 5, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:07,572 INFO L371 AbstractCegarLoop]: === Iteration 6 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:07,572 INFO L82 PathProgramCache]: Analyzing trace with hash -771406513, now seen corresponding path program 5 times [2018-01-25 05:33:07,572 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:07,574 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:07,574 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:07,574 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:07,574 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:07,587 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:07,588 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:07,698 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 0 proven. 65 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:07,698 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:07,699 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:07,699 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:07,699 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:07,699 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:07,699 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:07,704 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 05:33:07,705 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:07,708 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:07,709 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:07,710 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:07,711 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:07,713 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:07,715 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:07,715 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:07,717 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:07,726 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 0 proven. 65 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:07,726 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:07,851 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 0 proven. 65 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:07,871 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:07,871 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:07,874 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 05:33:07,875 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:07,878 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:07,881 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:07,886 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:07,895 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:07,902 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:07,912 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:07,918 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:07,922 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:07,939 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 0 proven. 65 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:07,939 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:07,962 INFO L134 CoverageAnalysis]: Checked inductivity of 65 backedges. 0 proven. 65 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:07,964 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:07,965 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7, 7, 7, 7] total 13 [2018-01-25 05:33:07,965 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:07,966 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-25 05:33:07,966 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-25 05:33:07,966 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-01-25 05:33:07,966 INFO L87 Difference]: Start difference. First operand 102 states and 129 transitions. Second operand 8 states. [2018-01-25 05:33:08,166 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:08,167 INFO L93 Difference]: Finished difference Result 130 states and 164 transitions. [2018-01-25 05:33:08,167 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-25 05:33:08,167 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 33 [2018-01-25 05:33:08,168 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:08,169 INFO L225 Difference]: With dead ends: 130 [2018-01-25 05:33:08,169 INFO L226 Difference]: Without dead ends: 126 [2018-01-25 05:33:08,169 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 137 GetRequests, 123 SyntacticMatches, 2 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=61, Invalid=121, Unknown=0, NotChecked=0, Total=182 [2018-01-25 05:33:08,170 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 126 states. [2018-01-25 05:33:08,186 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 126 to 116. [2018-01-25 05:33:08,187 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 116 states. [2018-01-25 05:33:08,188 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 116 states to 116 states and 148 transitions. [2018-01-25 05:33:08,188 INFO L78 Accepts]: Start accepts. Automaton has 116 states and 148 transitions. Word has length 33 [2018-01-25 05:33:08,188 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:08,188 INFO L432 AbstractCegarLoop]: Abstraction has 116 states and 148 transitions. [2018-01-25 05:33:08,188 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-25 05:33:08,188 INFO L276 IsEmpty]: Start isEmpty. Operand 116 states and 148 transitions. [2018-01-25 05:33:08,189 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 39 [2018-01-25 05:33:08,189 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:08,190 INFO L322 BasicCegarLoop]: trace histogram [7, 7, 6, 6, 6, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:08,190 INFO L371 AbstractCegarLoop]: === Iteration 7 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:08,190 INFO L82 PathProgramCache]: Analyzing trace with hash -240614211, now seen corresponding path program 6 times [2018-01-25 05:33:08,190 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:08,191 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:08,191 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:08,191 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:08,191 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:08,203 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:08,204 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:08,320 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 93 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:08,321 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:08,321 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:08,321 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:08,321 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:08,321 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:08,321 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:08,331 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 05:33:08,331 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 05:33:08,335 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:08,338 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:08,339 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:08,340 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:08,341 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:08,342 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:08,344 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:08,344 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:08,346 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:08,355 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 93 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:08,355 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:08,448 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 93 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:08,467 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:08,467 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:08,470 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 05:33:08,470 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 05:33:08,474 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:08,476 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:08,481 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:08,486 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:08,492 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:08,499 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:08,508 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:08,515 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:08,517 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:08,526 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 93 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:08,526 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:08,533 INFO L134 CoverageAnalysis]: Checked inductivity of 93 backedges. 0 proven. 93 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:08,535 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:08,535 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8, 8, 8, 8] total 15 [2018-01-25 05:33:08,535 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:08,535 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-25 05:33:08,535 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-25 05:33:08,536 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=162, Unknown=0, NotChecked=0, Total=240 [2018-01-25 05:33:08,536 INFO L87 Difference]: Start difference. First operand 116 states and 148 transitions. Second operand 9 states. [2018-01-25 05:33:08,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:08,830 INFO L93 Difference]: Finished difference Result 145 states and 184 transitions. [2018-01-25 05:33:08,830 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-25 05:33:08,830 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 38 [2018-01-25 05:33:08,831 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:08,831 INFO L225 Difference]: With dead ends: 145 [2018-01-25 05:33:08,832 INFO L226 Difference]: Without dead ends: 141 [2018-01-25 05:33:08,832 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 158 GetRequests, 142 SyntacticMatches, 2 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 7 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=162, Unknown=0, NotChecked=0, Total=240 [2018-01-25 05:33:08,832 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-01-25 05:33:08,842 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 130. [2018-01-25 05:33:08,842 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 130 states. [2018-01-25 05:33:08,844 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 130 states to 130 states and 167 transitions. [2018-01-25 05:33:08,844 INFO L78 Accepts]: Start accepts. Automaton has 130 states and 167 transitions. Word has length 38 [2018-01-25 05:33:08,844 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:08,845 INFO L432 AbstractCegarLoop]: Abstraction has 130 states and 167 transitions. [2018-01-25 05:33:08,845 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-25 05:33:08,845 INFO L276 IsEmpty]: Start isEmpty. Operand 130 states and 167 transitions. [2018-01-25 05:33:08,847 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-25 05:33:08,847 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:08,847 INFO L322 BasicCegarLoop]: trace histogram [8, 8, 7, 7, 7, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:08,847 INFO L371 AbstractCegarLoop]: === Iteration 8 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:08,848 INFO L82 PathProgramCache]: Analyzing trace with hash 1558821391, now seen corresponding path program 7 times [2018-01-25 05:33:08,848 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:08,849 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:08,849 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:08,849 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:08,849 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:08,860 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:08,861 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:08,959 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:08,959 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:08,959 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:08,959 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:08,959 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:08,959 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:08,960 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:08,965 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:08,965 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:33:08,973 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:08,975 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:08,982 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:08,983 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:09,077 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:09,097 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:09,097 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:09,100 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:09,100 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:33:09,115 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:09,118 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:09,125 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:09,125 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:09,138 INFO L134 CoverageAnalysis]: Checked inductivity of 126 backedges. 0 proven. 126 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:09,140 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:09,140 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9, 9, 9, 9] total 17 [2018-01-25 05:33:09,140 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:09,140 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-25 05:33:09,141 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-25 05:33:09,141 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=97, Invalid=209, Unknown=0, NotChecked=0, Total=306 [2018-01-25 05:33:09,141 INFO L87 Difference]: Start difference. First operand 130 states and 167 transitions. Second operand 10 states. [2018-01-25 05:33:09,494 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:09,494 INFO L93 Difference]: Finished difference Result 160 states and 204 transitions. [2018-01-25 05:33:09,494 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-25 05:33:09,495 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 43 [2018-01-25 05:33:09,495 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:09,496 INFO L225 Difference]: With dead ends: 160 [2018-01-25 05:33:09,496 INFO L226 Difference]: Without dead ends: 156 [2018-01-25 05:33:09,497 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 179 GetRequests, 161 SyntacticMatches, 2 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=97, Invalid=209, Unknown=0, NotChecked=0, Total=306 [2018-01-25 05:33:09,497 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-01-25 05:33:09,506 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 144. [2018-01-25 05:33:09,507 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 144 states. [2018-01-25 05:33:09,508 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 144 states to 144 states and 186 transitions. [2018-01-25 05:33:09,508 INFO L78 Accepts]: Start accepts. Automaton has 144 states and 186 transitions. Word has length 43 [2018-01-25 05:33:09,508 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:09,508 INFO L432 AbstractCegarLoop]: Abstraction has 144 states and 186 transitions. [2018-01-25 05:33:09,508 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-25 05:33:09,508 INFO L276 IsEmpty]: Start isEmpty. Operand 144 states and 186 transitions. [2018-01-25 05:33:09,509 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 49 [2018-01-25 05:33:09,509 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:09,510 INFO L322 BasicCegarLoop]: trace histogram [9, 9, 8, 8, 8, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:09,510 INFO L371 AbstractCegarLoop]: === Iteration 9 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:09,510 INFO L82 PathProgramCache]: Analyzing trace with hash -821098499, now seen corresponding path program 8 times [2018-01-25 05:33:09,510 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:09,510 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:09,511 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:09,511 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:09,511 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:09,522 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:09,523 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:09,645 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 0 proven. 164 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:09,645 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:09,645 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:09,645 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:09,645 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:09,645 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:09,645 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:09,650 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:33:09,650 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:09,653 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:09,657 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:09,658 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:09,659 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:09,670 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 0 proven. 164 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:09,670 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:09,784 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 0 proven. 164 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:09,803 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:09,803 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:09,806 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:33:09,807 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:09,810 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:09,817 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:09,826 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:09,830 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:09,839 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 0 proven. 164 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:09,839 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:09,849 INFO L134 CoverageAnalysis]: Checked inductivity of 164 backedges. 0 proven. 164 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:09,850 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:09,850 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10, 10, 10, 10] total 19 [2018-01-25 05:33:09,850 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:09,851 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-25 05:33:09,851 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-25 05:33:09,851 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=118, Invalid=262, Unknown=0, NotChecked=0, Total=380 [2018-01-25 05:33:09,851 INFO L87 Difference]: Start difference. First operand 144 states and 186 transitions. Second operand 11 states. [2018-01-25 05:33:10,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:10,704 INFO L93 Difference]: Finished difference Result 175 states and 224 transitions. [2018-01-25 05:33:10,824 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-25 05:33:10,824 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 48 [2018-01-25 05:33:10,825 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:10,826 INFO L225 Difference]: With dead ends: 175 [2018-01-25 05:33:10,826 INFO L226 Difference]: Without dead ends: 171 [2018-01-25 05:33:10,827 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 200 GetRequests, 180 SyntacticMatches, 2 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 9 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=118, Invalid=262, Unknown=0, NotChecked=0, Total=380 [2018-01-25 05:33:10,827 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 171 states. [2018-01-25 05:33:10,835 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 171 to 158. [2018-01-25 05:33:10,835 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 158 states. [2018-01-25 05:33:10,836 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 158 states to 158 states and 205 transitions. [2018-01-25 05:33:10,836 INFO L78 Accepts]: Start accepts. Automaton has 158 states and 205 transitions. Word has length 48 [2018-01-25 05:33:10,837 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:10,837 INFO L432 AbstractCegarLoop]: Abstraction has 158 states and 205 transitions. [2018-01-25 05:33:10,837 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-25 05:33:10,837 INFO L276 IsEmpty]: Start isEmpty. Operand 158 states and 205 transitions. [2018-01-25 05:33:10,838 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 54 [2018-01-25 05:33:10,838 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:10,838 INFO L322 BasicCegarLoop]: trace histogram [10, 10, 9, 9, 9, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:10,838 INFO L371 AbstractCegarLoop]: === Iteration 10 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:10,838 INFO L82 PathProgramCache]: Analyzing trace with hash -413974833, now seen corresponding path program 9 times [2018-01-25 05:33:10,839 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:10,839 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:10,839 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:10,839 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:10,840 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:10,849 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:10,850 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:11,011 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 0 proven. 207 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:11,011 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:11,012 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:11,012 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:11,012 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:11,012 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:11,012 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:11,017 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:33:11,017 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:33:11,024 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:11,025 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:11,026 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:11,027 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:11,029 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:11,030 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:11,031 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:11,032 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:11,034 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:11,036 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:11,036 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:11,038 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:11,056 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 0 proven. 207 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:11,056 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:11,226 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 0 proven. 207 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:11,246 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:11,246 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:11,249 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:33:11,249 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:33:11,252 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:11,254 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:11,259 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:11,264 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:11,270 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:11,277 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:11,286 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:11,295 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:11,306 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:11,317 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:11,326 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:11,329 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:11,337 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 0 proven. 207 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:11,337 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:11,347 INFO L134 CoverageAnalysis]: Checked inductivity of 207 backedges. 0 proven. 207 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:11,348 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:11,348 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11, 11, 11, 11] total 21 [2018-01-25 05:33:11,349 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:11,349 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-25 05:33:11,349 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-25 05:33:11,349 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=141, Invalid=321, Unknown=0, NotChecked=0, Total=462 [2018-01-25 05:33:11,350 INFO L87 Difference]: Start difference. First operand 158 states and 205 transitions. Second operand 12 states. [2018-01-25 05:33:11,803 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:11,803 INFO L93 Difference]: Finished difference Result 190 states and 244 transitions. [2018-01-25 05:33:11,803 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-25 05:33:11,803 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 53 [2018-01-25 05:33:11,804 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:11,805 INFO L225 Difference]: With dead ends: 190 [2018-01-25 05:33:11,805 INFO L226 Difference]: Without dead ends: 186 [2018-01-25 05:33:11,805 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 221 GetRequests, 199 SyntacticMatches, 2 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=141, Invalid=321, Unknown=0, NotChecked=0, Total=462 [2018-01-25 05:33:11,805 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 186 states. [2018-01-25 05:33:11,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 186 to 172. [2018-01-25 05:33:11,815 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 172 states. [2018-01-25 05:33:11,817 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 172 states to 172 states and 224 transitions. [2018-01-25 05:33:11,817 INFO L78 Accepts]: Start accepts. Automaton has 172 states and 224 transitions. Word has length 53 [2018-01-25 05:33:11,818 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:11,818 INFO L432 AbstractCegarLoop]: Abstraction has 172 states and 224 transitions. [2018-01-25 05:33:11,818 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-25 05:33:11,818 INFO L276 IsEmpty]: Start isEmpty. Operand 172 states and 224 transitions. [2018-01-25 05:33:11,819 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 59 [2018-01-25 05:33:11,819 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:11,819 INFO L322 BasicCegarLoop]: trace histogram [11, 11, 10, 10, 10, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:11,819 INFO L371 AbstractCegarLoop]: === Iteration 11 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:11,820 INFO L82 PathProgramCache]: Analyzing trace with hash -442860739, now seen corresponding path program 10 times [2018-01-25 05:33:11,820 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:11,821 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:11,821 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:11,821 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:11,821 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:11,834 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:11,835 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:12,062 INFO L134 CoverageAnalysis]: Checked inductivity of 255 backedges. 0 proven. 255 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:12,063 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:12,063 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:12,063 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:12,063 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:12,063 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:12,063 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:12,071 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:33:12,071 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:33:12,083 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:12,085 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:12,096 INFO L134 CoverageAnalysis]: Checked inductivity of 255 backedges. 0 proven. 255 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:12,096 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:12,251 INFO L134 CoverageAnalysis]: Checked inductivity of 255 backedges. 0 proven. 255 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:12,271 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:12,271 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:12,274 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:33:12,274 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:33:12,305 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:12,308 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:12,318 INFO L134 CoverageAnalysis]: Checked inductivity of 255 backedges. 0 proven. 255 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:12,318 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:12,328 INFO L134 CoverageAnalysis]: Checked inductivity of 255 backedges. 0 proven. 255 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:12,330 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:12,330 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12, 12, 12, 12] total 23 [2018-01-25 05:33:12,330 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:12,330 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-25 05:33:12,330 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-25 05:33:12,331 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=166, Invalid=386, Unknown=0, NotChecked=0, Total=552 [2018-01-25 05:33:12,331 INFO L87 Difference]: Start difference. First operand 172 states and 224 transitions. Second operand 13 states. [2018-01-25 05:33:12,916 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:12,916 INFO L93 Difference]: Finished difference Result 205 states and 264 transitions. [2018-01-25 05:33:12,916 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-25 05:33:12,916 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 58 [2018-01-25 05:33:12,916 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:12,917 INFO L225 Difference]: With dead ends: 205 [2018-01-25 05:33:12,917 INFO L226 Difference]: Without dead ends: 201 [2018-01-25 05:33:12,918 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 242 GetRequests, 218 SyntacticMatches, 2 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 11 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=166, Invalid=386, Unknown=0, NotChecked=0, Total=552 [2018-01-25 05:33:12,918 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 201 states. [2018-01-25 05:33:12,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 201 to 186. [2018-01-25 05:33:12,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 186 states. [2018-01-25 05:33:12,928 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 186 states to 186 states and 243 transitions. [2018-01-25 05:33:12,928 INFO L78 Accepts]: Start accepts. Automaton has 186 states and 243 transitions. Word has length 58 [2018-01-25 05:33:12,928 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:12,928 INFO L432 AbstractCegarLoop]: Abstraction has 186 states and 243 transitions. [2018-01-25 05:33:12,929 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-25 05:33:12,929 INFO L276 IsEmpty]: Start isEmpty. Operand 186 states and 243 transitions. [2018-01-25 05:33:12,930 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 64 [2018-01-25 05:33:12,930 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:12,930 INFO L322 BasicCegarLoop]: trace histogram [12, 12, 11, 11, 11, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:12,930 INFO L371 AbstractCegarLoop]: === Iteration 12 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:12,930 INFO L82 PathProgramCache]: Analyzing trace with hash -634530929, now seen corresponding path program 11 times [2018-01-25 05:33:12,931 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:12,932 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:12,932 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:12,932 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:12,932 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:12,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:12,941 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:13,071 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 0 proven. 308 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:13,071 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:13,071 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:13,071 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:13,071 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:13,071 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:13,071 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:13,076 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 05:33:13,076 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:13,079 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:13,081 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:13,082 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:13,084 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:13,085 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:13,087 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:13,088 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:13,089 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:13,091 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:13,092 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:13,094 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:13,096 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:13,096 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:13,098 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:13,110 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 0 proven. 308 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:13,111 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:13,279 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 0 proven. 308 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:13,299 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:13,299 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:13,302 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 05:33:13,302 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:13,305 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:13,308 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:13,313 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:13,318 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:13,325 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:13,333 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:13,342 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:13,352 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:13,362 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:13,374 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:13,388 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:13,403 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:13,413 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:13,417 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:13,431 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 0 proven. 308 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:13,431 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:13,457 INFO L134 CoverageAnalysis]: Checked inductivity of 308 backedges. 0 proven. 308 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:13,459 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:13,459 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13, 13, 13, 13] total 25 [2018-01-25 05:33:13,459 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:13,459 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-25 05:33:13,460 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-25 05:33:13,460 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=193, Invalid=457, Unknown=0, NotChecked=0, Total=650 [2018-01-25 05:33:13,460 INFO L87 Difference]: Start difference. First operand 186 states and 243 transitions. Second operand 14 states. [2018-01-25 05:33:14,078 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:14,078 INFO L93 Difference]: Finished difference Result 220 states and 284 transitions. [2018-01-25 05:33:14,079 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-25 05:33:14,079 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 63 [2018-01-25 05:33:14,079 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:14,081 INFO L225 Difference]: With dead ends: 220 [2018-01-25 05:33:14,081 INFO L226 Difference]: Without dead ends: 216 [2018-01-25 05:33:14,081 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 263 GetRequests, 237 SyntacticMatches, 2 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 12 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=193, Invalid=457, Unknown=0, NotChecked=0, Total=650 [2018-01-25 05:33:14,082 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 216 states. [2018-01-25 05:33:14,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 216 to 200. [2018-01-25 05:33:14,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 200 states. [2018-01-25 05:33:14,094 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 200 states to 200 states and 262 transitions. [2018-01-25 05:33:14,094 INFO L78 Accepts]: Start accepts. Automaton has 200 states and 262 transitions. Word has length 63 [2018-01-25 05:33:14,094 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:14,094 INFO L432 AbstractCegarLoop]: Abstraction has 200 states and 262 transitions. [2018-01-25 05:33:14,094 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-25 05:33:14,094 INFO L276 IsEmpty]: Start isEmpty. Operand 200 states and 262 transitions. [2018-01-25 05:33:14,096 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-01-25 05:33:14,096 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:14,096 INFO L322 BasicCegarLoop]: trace histogram [13, 13, 12, 12, 12, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:14,096 INFO L371 AbstractCegarLoop]: === Iteration 13 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:14,097 INFO L82 PathProgramCache]: Analyzing trace with hash 2145312381, now seen corresponding path program 12 times [2018-01-25 05:33:14,097 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:14,098 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:14,098 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:14,098 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:14,098 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:14,110 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:14,111 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:14,279 INFO L134 CoverageAnalysis]: Checked inductivity of 366 backedges. 0 proven. 366 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:14,280 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:14,280 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:14,280 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:14,280 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:14,280 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:14,280 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:14,285 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 05:33:14,285 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 05:33:14,288 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:14,289 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:14,290 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:14,291 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:14,292 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:14,293 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:14,295 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:14,296 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:14,297 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:14,299 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:14,300 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:14,302 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:14,304 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:14,304 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:14,305 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:14,316 INFO L134 CoverageAnalysis]: Checked inductivity of 366 backedges. 0 proven. 366 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:14,316 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:14,534 INFO L134 CoverageAnalysis]: Checked inductivity of 366 backedges. 0 proven. 366 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:14,554 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:14,554 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:14,557 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 05:33:14,557 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 05:33:14,561 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:14,562 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:14,567 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:14,572 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:14,579 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:14,586 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:14,595 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:14,604 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:14,615 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:14,627 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:14,640 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:14,655 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:14,670 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:14,681 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:14,685 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:14,696 INFO L134 CoverageAnalysis]: Checked inductivity of 366 backedges. 0 proven. 366 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:14,696 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:14,720 INFO L134 CoverageAnalysis]: Checked inductivity of 366 backedges. 0 proven. 366 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:14,721 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:14,721 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14, 14, 14, 14] total 27 [2018-01-25 05:33:14,721 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:14,722 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-25 05:33:14,722 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-25 05:33:14,722 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=222, Invalid=534, Unknown=0, NotChecked=0, Total=756 [2018-01-25 05:33:14,722 INFO L87 Difference]: Start difference. First operand 200 states and 262 transitions. Second operand 15 states. [2018-01-25 05:33:15,438 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:15,439 INFO L93 Difference]: Finished difference Result 235 states and 304 transitions. [2018-01-25 05:33:15,439 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-25 05:33:15,439 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 68 [2018-01-25 05:33:15,439 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:15,441 INFO L225 Difference]: With dead ends: 235 [2018-01-25 05:33:15,441 INFO L226 Difference]: Without dead ends: 231 [2018-01-25 05:33:15,442 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 284 GetRequests, 256 SyntacticMatches, 2 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 13 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=222, Invalid=534, Unknown=0, NotChecked=0, Total=756 [2018-01-25 05:33:15,442 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 231 states. [2018-01-25 05:33:15,451 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 231 to 214. [2018-01-25 05:33:15,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 214 states. [2018-01-25 05:33:15,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 214 states to 214 states and 281 transitions. [2018-01-25 05:33:15,453 INFO L78 Accepts]: Start accepts. Automaton has 214 states and 281 transitions. Word has length 68 [2018-01-25 05:33:15,453 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:15,453 INFO L432 AbstractCegarLoop]: Abstraction has 214 states and 281 transitions. [2018-01-25 05:33:15,453 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-25 05:33:15,453 INFO L276 IsEmpty]: Start isEmpty. Operand 214 states and 281 transitions. [2018-01-25 05:33:15,455 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-01-25 05:33:15,455 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:15,455 INFO L322 BasicCegarLoop]: trace histogram [14, 14, 13, 13, 13, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:15,455 INFO L371 AbstractCegarLoop]: === Iteration 14 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:15,455 INFO L82 PathProgramCache]: Analyzing trace with hash 1734703183, now seen corresponding path program 13 times [2018-01-25 05:33:15,455 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:15,456 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:15,456 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:15,456 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:15,457 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:15,470 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:15,470 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:15,663 INFO L134 CoverageAnalysis]: Checked inductivity of 429 backedges. 0 proven. 429 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:15,663 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:15,663 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:15,663 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:15,663 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:15,663 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:15,663 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:15,668 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:15,668 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:33:15,679 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:15,681 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:15,693 INFO L134 CoverageAnalysis]: Checked inductivity of 429 backedges. 0 proven. 429 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:15,693 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:15,958 INFO L134 CoverageAnalysis]: Checked inductivity of 429 backedges. 0 proven. 429 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:15,978 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:15,980 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:15,982 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:15,983 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:33:16,006 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:16,009 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:16,020 INFO L134 CoverageAnalysis]: Checked inductivity of 429 backedges. 0 proven. 429 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:16,021 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:16,053 INFO L134 CoverageAnalysis]: Checked inductivity of 429 backedges. 0 proven. 429 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:16,055 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:16,055 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15, 15, 15, 15] total 29 [2018-01-25 05:33:16,055 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:16,055 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-25 05:33:16,055 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-25 05:33:16,056 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=253, Invalid=617, Unknown=0, NotChecked=0, Total=870 [2018-01-25 05:33:16,056 INFO L87 Difference]: Start difference. First operand 214 states and 281 transitions. Second operand 16 states. [2018-01-25 05:33:16,895 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:16,895 INFO L93 Difference]: Finished difference Result 250 states and 324 transitions. [2018-01-25 05:33:16,896 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-25 05:33:16,896 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 73 [2018-01-25 05:33:16,896 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:16,897 INFO L225 Difference]: With dead ends: 250 [2018-01-25 05:33:16,897 INFO L226 Difference]: Without dead ends: 246 [2018-01-25 05:33:16,897 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 305 GetRequests, 275 SyntacticMatches, 2 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=253, Invalid=617, Unknown=0, NotChecked=0, Total=870 [2018-01-25 05:33:16,898 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 246 states. [2018-01-25 05:33:16,906 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 246 to 228. [2018-01-25 05:33:16,906 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 228 states. [2018-01-25 05:33:16,907 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 228 states to 228 states and 300 transitions. [2018-01-25 05:33:16,908 INFO L78 Accepts]: Start accepts. Automaton has 228 states and 300 transitions. Word has length 73 [2018-01-25 05:33:16,908 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:16,908 INFO L432 AbstractCegarLoop]: Abstraction has 228 states and 300 transitions. [2018-01-25 05:33:16,908 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-25 05:33:16,908 INFO L276 IsEmpty]: Start isEmpty. Operand 228 states and 300 transitions. [2018-01-25 05:33:16,909 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 79 [2018-01-25 05:33:16,909 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:16,909 INFO L322 BasicCegarLoop]: trace histogram [15, 15, 14, 14, 14, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:16,909 INFO L371 AbstractCegarLoop]: === Iteration 15 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:16,910 INFO L82 PathProgramCache]: Analyzing trace with hash -1083166275, now seen corresponding path program 14 times [2018-01-25 05:33:16,910 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:16,910 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:16,910 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:16,910 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:16,911 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:16,922 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:16,922 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:17,379 INFO L134 CoverageAnalysis]: Checked inductivity of 497 backedges. 0 proven. 497 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:17,379 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:17,379 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:17,379 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:17,379 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:17,379 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:17,379 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:17,385 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:33:17,385 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:17,388 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:17,393 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:17,395 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:17,397 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:17,408 INFO L134 CoverageAnalysis]: Checked inductivity of 497 backedges. 0 proven. 497 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:17,409 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:17,652 INFO L134 CoverageAnalysis]: Checked inductivity of 497 backedges. 0 proven. 497 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:17,672 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:17,672 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:17,675 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:33:17,675 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:17,682 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:17,692 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:17,707 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:17,711 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:17,733 INFO L134 CoverageAnalysis]: Checked inductivity of 497 backedges. 0 proven. 497 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:17,733 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:17,747 INFO L134 CoverageAnalysis]: Checked inductivity of 497 backedges. 0 proven. 497 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:17,749 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:17,749 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16, 16, 16, 16] total 31 [2018-01-25 05:33:17,749 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:17,749 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-25 05:33:17,749 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-25 05:33:17,750 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=286, Invalid=706, Unknown=0, NotChecked=0, Total=992 [2018-01-25 05:33:17,750 INFO L87 Difference]: Start difference. First operand 228 states and 300 transitions. Second operand 17 states. [2018-01-25 05:33:18,671 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:18,671 INFO L93 Difference]: Finished difference Result 265 states and 344 transitions. [2018-01-25 05:33:18,671 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-25 05:33:18,671 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 78 [2018-01-25 05:33:18,672 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:18,673 INFO L225 Difference]: With dead ends: 265 [2018-01-25 05:33:18,673 INFO L226 Difference]: Without dead ends: 261 [2018-01-25 05:33:18,673 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 326 GetRequests, 294 SyntacticMatches, 2 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 15 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=286, Invalid=706, Unknown=0, NotChecked=0, Total=992 [2018-01-25 05:33:18,674 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 261 states. [2018-01-25 05:33:18,681 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 261 to 242. [2018-01-25 05:33:18,681 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 242 states. [2018-01-25 05:33:18,683 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 242 states to 242 states and 319 transitions. [2018-01-25 05:33:18,683 INFO L78 Accepts]: Start accepts. Automaton has 242 states and 319 transitions. Word has length 78 [2018-01-25 05:33:18,683 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:18,683 INFO L432 AbstractCegarLoop]: Abstraction has 242 states and 319 transitions. [2018-01-25 05:33:18,683 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-25 05:33:18,683 INFO L276 IsEmpty]: Start isEmpty. Operand 242 states and 319 transitions. [2018-01-25 05:33:18,684 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-01-25 05:33:18,684 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:18,684 INFO L322 BasicCegarLoop]: trace histogram [16, 16, 15, 15, 15, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:18,684 INFO L371 AbstractCegarLoop]: === Iteration 16 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:18,684 INFO L82 PathProgramCache]: Analyzing trace with hash 1239821583, now seen corresponding path program 15 times [2018-01-25 05:33:18,684 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:18,685 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:18,685 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:18,685 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:18,685 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:18,695 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:18,696 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:18,936 INFO L134 CoverageAnalysis]: Checked inductivity of 570 backedges. 0 proven. 570 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:18,936 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:18,936 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:18,936 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:18,937 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:18,937 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:18,937 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:18,942 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:33:18,942 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:33:18,946 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:18,947 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:18,948 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:18,949 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:18,950 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:18,952 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:18,954 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:18,956 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:18,958 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:18,960 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:18,962 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:18,964 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:18,967 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:18,970 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:18,973 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:18,977 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:18,977 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:18,980 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:18,993 INFO L134 CoverageAnalysis]: Checked inductivity of 570 backedges. 0 proven. 570 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:18,993 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:19,300 INFO L134 CoverageAnalysis]: Checked inductivity of 570 backedges. 0 proven. 570 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:19,320 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:19,320 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:19,323 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:33:19,323 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:33:19,327 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:19,329 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:19,334 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:19,339 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:19,345 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:19,353 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:19,361 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:19,370 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:19,381 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:19,393 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:19,405 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:19,419 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:19,434 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:19,450 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:19,467 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:19,485 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:19,507 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:19,511 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:19,533 INFO L134 CoverageAnalysis]: Checked inductivity of 570 backedges. 0 proven. 570 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:19,533 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:19,553 INFO L134 CoverageAnalysis]: Checked inductivity of 570 backedges. 0 proven. 570 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:19,554 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:19,554 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17, 17, 17, 17] total 33 [2018-01-25 05:33:19,554 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:19,555 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-25 05:33:19,555 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-25 05:33:19,555 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=321, Invalid=801, Unknown=0, NotChecked=0, Total=1122 [2018-01-25 05:33:19,555 INFO L87 Difference]: Start difference. First operand 242 states and 319 transitions. Second operand 18 states. [2018-01-25 05:33:20,616 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:20,616 INFO L93 Difference]: Finished difference Result 280 states and 364 transitions. [2018-01-25 05:33:20,616 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-25 05:33:20,616 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 83 [2018-01-25 05:33:20,617 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:20,618 INFO L225 Difference]: With dead ends: 280 [2018-01-25 05:33:20,618 INFO L226 Difference]: Without dead ends: 276 [2018-01-25 05:33:20,618 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 347 GetRequests, 313 SyntacticMatches, 2 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 16 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=321, Invalid=801, Unknown=0, NotChecked=0, Total=1122 [2018-01-25 05:33:20,619 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 276 states. [2018-01-25 05:33:20,631 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 276 to 256. [2018-01-25 05:33:20,631 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 256 states. [2018-01-25 05:33:20,633 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 256 states to 256 states and 338 transitions. [2018-01-25 05:33:20,634 INFO L78 Accepts]: Start accepts. Automaton has 256 states and 338 transitions. Word has length 83 [2018-01-25 05:33:20,634 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:20,634 INFO L432 AbstractCegarLoop]: Abstraction has 256 states and 338 transitions. [2018-01-25 05:33:20,634 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-25 05:33:20,634 INFO L276 IsEmpty]: Start isEmpty. Operand 256 states and 338 transitions. [2018-01-25 05:33:20,636 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 89 [2018-01-25 05:33:20,636 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:20,637 INFO L322 BasicCegarLoop]: trace histogram [17, 17, 16, 16, 16, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:20,637 INFO L371 AbstractCegarLoop]: === Iteration 17 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:20,637 INFO L82 PathProgramCache]: Analyzing trace with hash -589138691, now seen corresponding path program 16 times [2018-01-25 05:33:20,637 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:20,638 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:20,638 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:20,638 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:20,638 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:20,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:20,656 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:21,088 INFO L134 CoverageAnalysis]: Checked inductivity of 648 backedges. 0 proven. 648 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:21,089 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:21,113 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:21,113 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:21,114 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:21,114 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:21,114 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:21,121 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:33:21,121 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:33:21,145 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:21,148 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:21,170 INFO L134 CoverageAnalysis]: Checked inductivity of 648 backedges. 0 proven. 648 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:21,171 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:21,705 INFO L134 CoverageAnalysis]: Checked inductivity of 648 backedges. 0 proven. 648 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:21,724 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:21,724 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:21,727 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:33:21,727 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:33:21,777 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:21,781 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:21,795 INFO L134 CoverageAnalysis]: Checked inductivity of 648 backedges. 0 proven. 648 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:21,795 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:21,813 INFO L134 CoverageAnalysis]: Checked inductivity of 648 backedges. 0 proven. 648 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:21,814 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:21,814 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18, 18, 18, 18] total 35 [2018-01-25 05:33:21,814 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:21,815 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-25 05:33:21,815 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-25 05:33:21,815 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=358, Invalid=902, Unknown=0, NotChecked=0, Total=1260 [2018-01-25 05:33:21,816 INFO L87 Difference]: Start difference. First operand 256 states and 338 transitions. Second operand 19 states. [2018-01-25 05:33:23,016 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:23,017 INFO L93 Difference]: Finished difference Result 295 states and 384 transitions. [2018-01-25 05:33:23,017 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-25 05:33:23,017 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 88 [2018-01-25 05:33:23,017 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:23,019 INFO L225 Difference]: With dead ends: 295 [2018-01-25 05:33:23,019 INFO L226 Difference]: Without dead ends: 291 [2018-01-25 05:33:23,020 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 368 GetRequests, 332 SyntacticMatches, 2 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 17 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=358, Invalid=902, Unknown=0, NotChecked=0, Total=1260 [2018-01-25 05:33:23,020 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 291 states. [2018-01-25 05:33:23,032 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 291 to 270. [2018-01-25 05:33:23,032 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 270 states. [2018-01-25 05:33:23,034 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 270 states to 270 states and 357 transitions. [2018-01-25 05:33:23,035 INFO L78 Accepts]: Start accepts. Automaton has 270 states and 357 transitions. Word has length 88 [2018-01-25 05:33:23,035 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:23,035 INFO L432 AbstractCegarLoop]: Abstraction has 270 states and 357 transitions. [2018-01-25 05:33:23,035 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-25 05:33:23,035 INFO L276 IsEmpty]: Start isEmpty. Operand 270 states and 357 transitions. [2018-01-25 05:33:23,038 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 94 [2018-01-25 05:33:23,038 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:23,038 INFO L322 BasicCegarLoop]: trace histogram [18, 18, 17, 17, 17, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:23,038 INFO L371 AbstractCegarLoop]: === Iteration 18 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:23,038 INFO L82 PathProgramCache]: Analyzing trace with hash -2053377585, now seen corresponding path program 17 times [2018-01-25 05:33:23,038 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:23,039 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:23,039 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:23,040 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:23,040 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:23,056 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:23,057 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:23,362 INFO L134 CoverageAnalysis]: Checked inductivity of 731 backedges. 0 proven. 731 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:23,362 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:23,362 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:23,363 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:23,363 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:23,363 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:23,363 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:23,368 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 05:33:23,368 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:23,371 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,372 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,373 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,374 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,375 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,377 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,378 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,379 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,381 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,382 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,384 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,385 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,387 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,389 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,391 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,393 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,395 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,398 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,398 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:23,401 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:23,416 INFO L134 CoverageAnalysis]: Checked inductivity of 731 backedges. 0 proven. 731 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:23,416 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:23,753 INFO L134 CoverageAnalysis]: Checked inductivity of 731 backedges. 0 proven. 731 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:23,772 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:23,772 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:23,775 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 05:33:23,775 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:23,779 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,781 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,786 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,792 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,798 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,806 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,815 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,825 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,836 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,848 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,861 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,876 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,891 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,907 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,932 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,951 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,971 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:23,993 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:24,012 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:24,017 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:24,038 INFO L134 CoverageAnalysis]: Checked inductivity of 731 backedges. 0 proven. 731 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:24,038 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:24,068 INFO L134 CoverageAnalysis]: Checked inductivity of 731 backedges. 0 proven. 731 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:24,069 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:24,070 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19, 19, 19, 19] total 37 [2018-01-25 05:33:24,070 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:24,070 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-25 05:33:24,070 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-25 05:33:24,071 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=397, Invalid=1009, Unknown=0, NotChecked=0, Total=1406 [2018-01-25 05:33:24,071 INFO L87 Difference]: Start difference. First operand 270 states and 357 transitions. Second operand 20 states. [2018-01-25 05:33:25,402 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:25,402 INFO L93 Difference]: Finished difference Result 310 states and 404 transitions. [2018-01-25 05:33:25,402 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-25 05:33:25,402 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 93 [2018-01-25 05:33:25,403 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:25,405 INFO L225 Difference]: With dead ends: 310 [2018-01-25 05:33:25,405 INFO L226 Difference]: Without dead ends: 306 [2018-01-25 05:33:25,406 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 389 GetRequests, 351 SyntacticMatches, 2 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 18 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=397, Invalid=1009, Unknown=0, NotChecked=0, Total=1406 [2018-01-25 05:33:25,406 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 306 states. [2018-01-25 05:33:25,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 306 to 284. [2018-01-25 05:33:25,418 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 284 states. [2018-01-25 05:33:25,420 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 284 states to 284 states and 376 transitions. [2018-01-25 05:33:25,420 INFO L78 Accepts]: Start accepts. Automaton has 284 states and 376 transitions. Word has length 93 [2018-01-25 05:33:25,420 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:25,420 INFO L432 AbstractCegarLoop]: Abstraction has 284 states and 376 transitions. [2018-01-25 05:33:25,421 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-25 05:33:25,421 INFO L276 IsEmpty]: Start isEmpty. Operand 284 states and 376 transitions. [2018-01-25 05:33:25,423 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 99 [2018-01-25 05:33:25,423 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:25,423 INFO L322 BasicCegarLoop]: trace histogram [19, 19, 18, 18, 18, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:25,423 INFO L371 AbstractCegarLoop]: === Iteration 19 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:25,424 INFO L82 PathProgramCache]: Analyzing trace with hash 1741269053, now seen corresponding path program 18 times [2018-01-25 05:33:25,424 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:25,424 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:25,425 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:25,425 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:25,425 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:25,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:25,440 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:25,693 INFO L134 CoverageAnalysis]: Checked inductivity of 819 backedges. 0 proven. 819 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:25,693 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:25,693 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:25,693 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:25,694 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:25,694 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:25,694 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:25,698 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 05:33:25,699 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 05:33:25,702 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:25,703 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:25,704 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:25,705 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:25,706 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:25,708 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:25,709 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:25,710 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:25,712 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:25,713 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:25,715 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:25,717 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:25,718 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:25,720 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:25,722 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:25,724 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:25,726 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:25,729 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:25,731 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:25,731 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:25,733 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:25,749 INFO L134 CoverageAnalysis]: Checked inductivity of 819 backedges. 0 proven. 819 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:25,749 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:26,191 INFO L134 CoverageAnalysis]: Checked inductivity of 819 backedges. 0 proven. 819 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:26,211 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:26,211 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:26,214 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 05:33:26,214 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 05:33:26,220 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:26,222 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:26,226 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:26,232 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:26,239 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:26,246 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:26,255 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:26,265 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:26,276 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:26,288 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:26,301 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:26,315 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:26,331 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:26,347 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:26,365 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:26,391 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:26,412 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:26,434 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:26,456 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:26,480 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:26,485 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:26,501 INFO L134 CoverageAnalysis]: Checked inductivity of 819 backedges. 0 proven. 819 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:26,501 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:26,524 INFO L134 CoverageAnalysis]: Checked inductivity of 819 backedges. 0 proven. 819 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:26,525 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:26,525 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20, 20, 20, 20] total 39 [2018-01-25 05:33:26,525 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:26,526 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-25 05:33:26,526 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-25 05:33:26,526 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=438, Invalid=1122, Unknown=0, NotChecked=0, Total=1560 [2018-01-25 05:33:26,526 INFO L87 Difference]: Start difference. First operand 284 states and 376 transitions. Second operand 21 states. [2018-01-25 05:33:28,217 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:28,217 INFO L93 Difference]: Finished difference Result 325 states and 424 transitions. [2018-01-25 05:33:28,217 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-25 05:33:28,217 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 98 [2018-01-25 05:33:28,217 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:28,219 INFO L225 Difference]: With dead ends: 325 [2018-01-25 05:33:28,219 INFO L226 Difference]: Without dead ends: 321 [2018-01-25 05:33:28,220 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 410 GetRequests, 370 SyntacticMatches, 2 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 19 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=438, Invalid=1122, Unknown=0, NotChecked=0, Total=1560 [2018-01-25 05:33:28,220 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 321 states. [2018-01-25 05:33:28,228 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 321 to 298. [2018-01-25 05:33:28,228 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 298 states. [2018-01-25 05:33:28,229 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 298 states to 298 states and 395 transitions. [2018-01-25 05:33:28,229 INFO L78 Accepts]: Start accepts. Automaton has 298 states and 395 transitions. Word has length 98 [2018-01-25 05:33:28,229 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:28,229 INFO L432 AbstractCegarLoop]: Abstraction has 298 states and 395 transitions. [2018-01-25 05:33:28,229 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-25 05:33:28,229 INFO L276 IsEmpty]: Start isEmpty. Operand 298 states and 395 transitions. [2018-01-25 05:33:28,230 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 104 [2018-01-25 05:33:28,231 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:28,231 INFO L322 BasicCegarLoop]: trace histogram [20, 20, 19, 19, 19, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:28,231 INFO L371 AbstractCegarLoop]: === Iteration 20 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:28,231 INFO L82 PathProgramCache]: Analyzing trace with hash 661833359, now seen corresponding path program 19 times [2018-01-25 05:33:28,231 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:28,232 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:28,232 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:28,232 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:28,232 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:28,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:28,242 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:28,587 INFO L134 CoverageAnalysis]: Checked inductivity of 912 backedges. 0 proven. 912 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:28,588 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:28,588 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:28,588 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:28,588 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:28,588 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:28,588 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:28,593 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:28,593 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:33:28,607 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:28,610 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:28,636 INFO L134 CoverageAnalysis]: Checked inductivity of 912 backedges. 0 proven. 912 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:28,637 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:29,339 INFO L134 CoverageAnalysis]: Checked inductivity of 912 backedges. 0 proven. 912 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:29,359 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:29,359 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:29,362 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:29,362 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:33:29,398 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:29,402 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:29,419 INFO L134 CoverageAnalysis]: Checked inductivity of 912 backedges. 0 proven. 912 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:29,420 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:29,448 INFO L134 CoverageAnalysis]: Checked inductivity of 912 backedges. 0 proven. 912 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:29,449 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:29,449 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21, 21, 21, 21] total 41 [2018-01-25 05:33:29,450 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:29,450 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-25 05:33:29,450 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-25 05:33:29,451 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=481, Invalid=1241, Unknown=0, NotChecked=0, Total=1722 [2018-01-25 05:33:29,451 INFO L87 Difference]: Start difference. First operand 298 states and 395 transitions. Second operand 22 states. [2018-01-25 05:33:31,063 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:31,063 INFO L93 Difference]: Finished difference Result 340 states and 444 transitions. [2018-01-25 05:33:31,063 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-25 05:33:31,064 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 103 [2018-01-25 05:33:31,064 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:31,065 INFO L225 Difference]: With dead ends: 340 [2018-01-25 05:33:31,065 INFO L226 Difference]: Without dead ends: 336 [2018-01-25 05:33:31,066 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 431 GetRequests, 389 SyntacticMatches, 2 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=481, Invalid=1241, Unknown=0, NotChecked=0, Total=1722 [2018-01-25 05:33:31,067 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 336 states. [2018-01-25 05:33:31,079 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 336 to 312. [2018-01-25 05:33:31,079 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 312 states. [2018-01-25 05:33:31,080 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 312 states to 312 states and 414 transitions. [2018-01-25 05:33:31,081 INFO L78 Accepts]: Start accepts. Automaton has 312 states and 414 transitions. Word has length 103 [2018-01-25 05:33:31,081 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:31,081 INFO L432 AbstractCegarLoop]: Abstraction has 312 states and 414 transitions. [2018-01-25 05:33:31,081 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-25 05:33:31,081 INFO L276 IsEmpty]: Start isEmpty. Operand 312 states and 414 transitions. [2018-01-25 05:33:31,083 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 109 [2018-01-25 05:33:31,083 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:31,083 INFO L322 BasicCegarLoop]: trace histogram [21, 21, 20, 20, 20, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:31,084 INFO L371 AbstractCegarLoop]: === Iteration 21 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:31,084 INFO L82 PathProgramCache]: Analyzing trace with hash -2034644099, now seen corresponding path program 20 times [2018-01-25 05:33:31,084 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:31,085 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:31,085 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:31,085 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:31,085 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:31,100 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:31,101 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:31,553 INFO L134 CoverageAnalysis]: Checked inductivity of 1010 backedges. 0 proven. 1010 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:31,554 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:31,569 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:31,569 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:31,569 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:31,570 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:31,570 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:31,574 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:33:31,575 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:31,580 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:31,588 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:31,590 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:31,593 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:31,622 INFO L134 CoverageAnalysis]: Checked inductivity of 1010 backedges. 0 proven. 1010 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:31,622 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:32,128 INFO L134 CoverageAnalysis]: Checked inductivity of 1010 backedges. 0 proven. 1010 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:32,157 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:32,158 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:32,161 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:33:32,161 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:32,166 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:32,180 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:32,200 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:32,205 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:32,241 INFO L134 CoverageAnalysis]: Checked inductivity of 1010 backedges. 0 proven. 1010 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:32,241 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:32,280 INFO L134 CoverageAnalysis]: Checked inductivity of 1010 backedges. 0 proven. 1010 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:32,281 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:32,281 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22, 22, 22, 22] total 43 [2018-01-25 05:33:32,281 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:32,281 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-25 05:33:32,282 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-25 05:33:32,282 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=526, Invalid=1366, Unknown=0, NotChecked=0, Total=1892 [2018-01-25 05:33:32,282 INFO L87 Difference]: Start difference. First operand 312 states and 414 transitions. Second operand 23 states. [2018-01-25 05:33:34,044 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:34,044 INFO L93 Difference]: Finished difference Result 355 states and 464 transitions. [2018-01-25 05:33:34,045 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-25 05:33:34,045 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 108 [2018-01-25 05:33:34,045 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:34,046 INFO L225 Difference]: With dead ends: 355 [2018-01-25 05:33:34,046 INFO L226 Difference]: Without dead ends: 351 [2018-01-25 05:33:34,047 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 452 GetRequests, 408 SyntacticMatches, 2 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 21 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=526, Invalid=1366, Unknown=0, NotChecked=0, Total=1892 [2018-01-25 05:33:34,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 351 states. [2018-01-25 05:33:34,054 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 351 to 326. [2018-01-25 05:33:34,055 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 326 states. [2018-01-25 05:33:34,056 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 326 states to 326 states and 433 transitions. [2018-01-25 05:33:34,056 INFO L78 Accepts]: Start accepts. Automaton has 326 states and 433 transitions. Word has length 108 [2018-01-25 05:33:34,056 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:34,056 INFO L432 AbstractCegarLoop]: Abstraction has 326 states and 433 transitions. [2018-01-25 05:33:34,056 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-25 05:33:34,056 INFO L276 IsEmpty]: Start isEmpty. Operand 326 states and 433 transitions. [2018-01-25 05:33:34,057 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 114 [2018-01-25 05:33:34,057 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:34,057 INFO L322 BasicCegarLoop]: trace histogram [22, 22, 21, 21, 21, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:34,058 INFO L371 AbstractCegarLoop]: === Iteration 22 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:34,058 INFO L82 PathProgramCache]: Analyzing trace with hash 89566031, now seen corresponding path program 21 times [2018-01-25 05:33:34,058 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:34,058 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:34,058 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:34,058 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:34,059 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:34,068 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:34,069 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:34,393 INFO L134 CoverageAnalysis]: Checked inductivity of 1113 backedges. 0 proven. 1113 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:34,393 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:34,394 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:34,394 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:34,394 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:34,394 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:34,394 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:34,398 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:33:34,399 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:33:34,403 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:34,404 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:34,405 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:34,406 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:34,407 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:34,408 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:34,409 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:34,410 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:34,412 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:34,413 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:34,415 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:34,416 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:34,418 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:34,420 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:34,422 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:34,424 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:34,426 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:34,428 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:34,430 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:34,433 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:34,435 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:34,438 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:34,438 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:34,440 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:34,460 INFO L134 CoverageAnalysis]: Checked inductivity of 1113 backedges. 0 proven. 1113 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:34,460 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:34,947 INFO L134 CoverageAnalysis]: Checked inductivity of 1113 backedges. 0 proven. 1113 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:34,966 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:34,967 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:34,969 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:33:34,970 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:33:34,976 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:34,978 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:34,984 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:34,990 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:34,996 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:35,004 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:35,012 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:35,022 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:35,033 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:35,044 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:35,057 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:35,073 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:35,089 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:35,105 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:35,122 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:35,140 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:35,167 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:35,188 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:35,209 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:35,231 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:35,262 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:35,288 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:35,308 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:35,321 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:35,349 INFO L134 CoverageAnalysis]: Checked inductivity of 1113 backedges. 0 proven. 1113 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:35,349 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:35,381 INFO L134 CoverageAnalysis]: Checked inductivity of 1113 backedges. 0 proven. 1113 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:35,383 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:35,383 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23, 23, 23, 23] total 45 [2018-01-25 05:33:35,383 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:35,383 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-25 05:33:35,383 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-25 05:33:35,384 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=573, Invalid=1497, Unknown=0, NotChecked=0, Total=2070 [2018-01-25 05:33:35,384 INFO L87 Difference]: Start difference. First operand 326 states and 433 transitions. Second operand 24 states. [2018-01-25 05:33:37,368 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:37,369 INFO L93 Difference]: Finished difference Result 370 states and 484 transitions. [2018-01-25 05:33:37,369 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-25 05:33:37,369 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 113 [2018-01-25 05:33:37,369 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:37,370 INFO L225 Difference]: With dead ends: 370 [2018-01-25 05:33:37,370 INFO L226 Difference]: Without dead ends: 366 [2018-01-25 05:33:37,371 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 473 GetRequests, 427 SyntacticMatches, 2 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 22 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=573, Invalid=1497, Unknown=0, NotChecked=0, Total=2070 [2018-01-25 05:33:37,371 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 366 states. [2018-01-25 05:33:37,382 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 366 to 340. [2018-01-25 05:33:37,382 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 340 states. [2018-01-25 05:33:37,384 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 340 states to 340 states and 452 transitions. [2018-01-25 05:33:37,384 INFO L78 Accepts]: Start accepts. Automaton has 340 states and 452 transitions. Word has length 113 [2018-01-25 05:33:37,384 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:37,385 INFO L432 AbstractCegarLoop]: Abstraction has 340 states and 452 transitions. [2018-01-25 05:33:37,385 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-25 05:33:37,385 INFO L276 IsEmpty]: Start isEmpty. Operand 340 states and 452 transitions. [2018-01-25 05:33:37,386 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2018-01-25 05:33:37,387 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:37,387 INFO L322 BasicCegarLoop]: trace histogram [23, 23, 22, 22, 22, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:37,387 INFO L371 AbstractCegarLoop]: === Iteration 23 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:37,387 INFO L82 PathProgramCache]: Analyzing trace with hash 927391421, now seen corresponding path program 22 times [2018-01-25 05:33:37,387 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:37,388 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:37,388 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:37,388 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:37,388 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:37,403 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:37,404 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:37,868 INFO L134 CoverageAnalysis]: Checked inductivity of 1221 backedges. 0 proven. 1221 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:37,868 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:37,868 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:37,868 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:37,869 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:37,869 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:37,869 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:37,873 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:33:37,874 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:33:37,900 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:37,903 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:37,939 INFO L134 CoverageAnalysis]: Checked inductivity of 1221 backedges. 0 proven. 1221 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:37,939 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:38,463 INFO L134 CoverageAnalysis]: Checked inductivity of 1221 backedges. 0 proven. 1221 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:38,482 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:38,482 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:38,485 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-25 05:33:38,485 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder TERMS_WITH_SMALL_CONSTANTS_FIRST (IT: FPandBP) [2018-01-25 05:33:38,552 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:38,557 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:38,577 INFO L134 CoverageAnalysis]: Checked inductivity of 1221 backedges. 0 proven. 1221 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:38,578 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:38,602 INFO L134 CoverageAnalysis]: Checked inductivity of 1221 backedges. 0 proven. 1221 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:38,604 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:38,604 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24, 24, 24, 24] total 47 [2018-01-25 05:33:38,604 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:38,604 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-25 05:33:38,604 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-25 05:33:38,605 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=622, Invalid=1634, Unknown=0, NotChecked=0, Total=2256 [2018-01-25 05:33:38,605 INFO L87 Difference]: Start difference. First operand 340 states and 452 transitions. Second operand 25 states. [2018-01-25 05:33:40,702 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:40,703 INFO L93 Difference]: Finished difference Result 385 states and 504 transitions. [2018-01-25 05:33:40,703 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-25 05:33:40,703 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 118 [2018-01-25 05:33:40,703 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:40,704 INFO L225 Difference]: With dead ends: 385 [2018-01-25 05:33:40,705 INFO L226 Difference]: Without dead ends: 381 [2018-01-25 05:33:40,705 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 494 GetRequests, 446 SyntacticMatches, 2 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 23 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=622, Invalid=1634, Unknown=0, NotChecked=0, Total=2256 [2018-01-25 05:33:40,705 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 381 states. [2018-01-25 05:33:40,713 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 381 to 354. [2018-01-25 05:33:40,713 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 354 states. [2018-01-25 05:33:40,714 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 354 states to 354 states and 471 transitions. [2018-01-25 05:33:40,714 INFO L78 Accepts]: Start accepts. Automaton has 354 states and 471 transitions. Word has length 118 [2018-01-25 05:33:40,714 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:40,715 INFO L432 AbstractCegarLoop]: Abstraction has 354 states and 471 transitions. [2018-01-25 05:33:40,715 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-25 05:33:40,715 INFO L276 IsEmpty]: Start isEmpty. Operand 354 states and 471 transitions. [2018-01-25 05:33:40,716 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2018-01-25 05:33:40,716 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:40,716 INFO L322 BasicCegarLoop]: trace histogram [24, 24, 23, 23, 23, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:40,716 INFO L371 AbstractCegarLoop]: === Iteration 24 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:40,716 INFO L82 PathProgramCache]: Analyzing trace with hash 2117312527, now seen corresponding path program 23 times [2018-01-25 05:33:40,716 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:40,717 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:40,717 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:40,717 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:40,717 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:40,727 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:40,727 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:41,484 INFO L134 CoverageAnalysis]: Checked inductivity of 1334 backedges. 0 proven. 1334 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:41,485 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:41,485 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:41,485 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:41,485 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:41,485 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:41,485 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:41,490 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 05:33:41,490 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:41,494 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:41,496 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:41,497 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:41,498 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:41,499 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:41,501 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:41,502 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:41,504 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:41,505 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:41,507 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:41,509 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:41,510 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:41,512 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:41,515 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:41,517 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:41,519 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:41,521 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:41,523 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:41,526 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:41,529 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:41,531 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:41,534 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:41,537 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:41,540 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:41,541 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:41,543 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:41,570 INFO L134 CoverageAnalysis]: Checked inductivity of 1334 backedges. 0 proven. 1334 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:41,570 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:42,168 INFO L134 CoverageAnalysis]: Checked inductivity of 1334 backedges. 0 proven. 1334 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:42,188 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:42,188 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:42,191 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-25 05:33:42,191 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder INSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:42,196 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:42,199 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:42,204 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:42,210 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:42,217 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:42,226 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:42,235 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:42,246 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:42,258 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:42,272 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:42,286 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:42,301 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:42,317 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:42,334 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:42,363 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:42,383 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:42,405 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:42,438 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:42,461 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:42,493 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:42,518 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:42,548 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:42,587 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:42,620 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:42,662 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:42,668 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:42,693 INFO L134 CoverageAnalysis]: Checked inductivity of 1334 backedges. 0 proven. 1334 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:42,694 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:42,734 INFO L134 CoverageAnalysis]: Checked inductivity of 1334 backedges. 0 proven. 1334 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:42,735 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:42,735 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25, 25, 25, 25] total 49 [2018-01-25 05:33:42,736 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:42,736 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-25 05:33:42,736 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-25 05:33:42,737 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=673, Invalid=1777, Unknown=0, NotChecked=0, Total=2450 [2018-01-25 05:33:42,737 INFO L87 Difference]: Start difference. First operand 354 states and 471 transitions. Second operand 26 states. [2018-01-25 05:33:45,155 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:45,155 INFO L93 Difference]: Finished difference Result 400 states and 524 transitions. [2018-01-25 05:33:45,155 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-25 05:33:45,156 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 123 [2018-01-25 05:33:45,156 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:45,157 INFO L225 Difference]: With dead ends: 400 [2018-01-25 05:33:45,157 INFO L226 Difference]: Without dead ends: 396 [2018-01-25 05:33:45,158 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 515 GetRequests, 465 SyntacticMatches, 2 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 24 ImplicationChecksByTransitivity, 1.2s TimeCoverageRelationStatistics Valid=673, Invalid=1777, Unknown=0, NotChecked=0, Total=2450 [2018-01-25 05:33:45,159 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 396 states. [2018-01-25 05:33:45,170 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 396 to 368. [2018-01-25 05:33:45,170 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 368 states. [2018-01-25 05:33:45,172 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 368 states to 368 states and 490 transitions. [2018-01-25 05:33:45,172 INFO L78 Accepts]: Start accepts. Automaton has 368 states and 490 transitions. Word has length 123 [2018-01-25 05:33:45,172 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:45,172 INFO L432 AbstractCegarLoop]: Abstraction has 368 states and 490 transitions. [2018-01-25 05:33:45,173 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-25 05:33:45,173 INFO L276 IsEmpty]: Start isEmpty. Operand 368 states and 490 transitions. [2018-01-25 05:33:45,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 129 [2018-01-25 05:33:45,174 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:45,175 INFO L322 BasicCegarLoop]: trace histogram [25, 25, 24, 24, 24, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:45,175 INFO L371 AbstractCegarLoop]: === Iteration 25 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:45,175 INFO L82 PathProgramCache]: Analyzing trace with hash -1912282627, now seen corresponding path program 24 times [2018-01-25 05:33:45,175 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:45,176 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:45,176 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:45,176 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:45,176 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:45,192 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:45,194 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:45,558 INFO L134 CoverageAnalysis]: Checked inductivity of 1452 backedges. 0 proven. 1452 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:45,558 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:45,558 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:45,558 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:45,559 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:45,559 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:45,559 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:45,564 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 05:33:45,564 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 05:33:45,568 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:45,569 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:45,570 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:45,571 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:45,572 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:45,574 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:45,575 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:45,577 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:45,578 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:45,580 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:45,581 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:45,583 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:45,585 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:45,587 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:45,589 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:45,591 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:45,593 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:45,596 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:45,598 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:45,600 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:45,603 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:45,605 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:45,608 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:45,611 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:45,614 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:45,615 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:45,617 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:45,642 INFO L134 CoverageAnalysis]: Checked inductivity of 1452 backedges. 0 proven. 1452 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:45,642 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:46,566 INFO L134 CoverageAnalysis]: Checked inductivity of 1452 backedges. 0 proven. 1452 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:46,588 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:46,588 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:46,591 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-25 05:33:46,592 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder MIX_INSIDE_OUTSIDE (IT: FPandBP) [2018-01-25 05:33:46,598 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:46,601 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:46,608 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:46,617 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:46,627 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:46,639 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:46,651 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:46,662 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:46,675 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:46,688 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:46,703 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:46,718 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:46,735 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:46,753 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:46,772 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:46,801 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:46,822 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:46,845 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:46,869 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:46,905 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:46,932 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:46,959 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:46,998 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:47,027 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:47,068 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-25 05:33:47,091 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:47,096 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:47,120 INFO L134 CoverageAnalysis]: Checked inductivity of 1452 backedges. 0 proven. 1452 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:47,120 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:47,161 INFO L134 CoverageAnalysis]: Checked inductivity of 1452 backedges. 0 proven. 1452 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:47,163 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:47,163 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26, 26, 26, 26] total 51 [2018-01-25 05:33:47,163 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:47,163 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-25 05:33:47,163 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-25 05:33:47,164 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=726, Invalid=1926, Unknown=0, NotChecked=0, Total=2652 [2018-01-25 05:33:47,164 INFO L87 Difference]: Start difference. First operand 368 states and 490 transitions. Second operand 27 states. [2018-01-25 05:33:49,752 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:49,752 INFO L93 Difference]: Finished difference Result 415 states and 544 transitions. [2018-01-25 05:33:49,752 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-25 05:33:49,752 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 128 [2018-01-25 05:33:49,752 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:49,754 INFO L225 Difference]: With dead ends: 415 [2018-01-25 05:33:49,754 INFO L226 Difference]: Without dead ends: 411 [2018-01-25 05:33:49,755 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 536 GetRequests, 484 SyntacticMatches, 2 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 25 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=726, Invalid=1926, Unknown=0, NotChecked=0, Total=2652 [2018-01-25 05:33:49,755 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 411 states. [2018-01-25 05:33:49,768 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 411 to 382. [2018-01-25 05:33:49,769 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 382 states. [2018-01-25 05:33:49,770 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 382 states to 382 states and 509 transitions. [2018-01-25 05:33:49,771 INFO L78 Accepts]: Start accepts. Automaton has 382 states and 509 transitions. Word has length 128 [2018-01-25 05:33:49,771 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:49,771 INFO L432 AbstractCegarLoop]: Abstraction has 382 states and 509 transitions. [2018-01-25 05:33:49,771 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-25 05:33:49,772 INFO L276 IsEmpty]: Start isEmpty. Operand 382 states and 509 transitions. [2018-01-25 05:33:49,773 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 134 [2018-01-25 05:33:49,774 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:49,774 INFO L322 BasicCegarLoop]: trace histogram [26, 26, 25, 25, 25, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:49,774 INFO L371 AbstractCegarLoop]: === Iteration 26 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:49,774 INFO L82 PathProgramCache]: Analyzing trace with hash 972399823, now seen corresponding path program 25 times [2018-01-25 05:33:49,774 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:49,775 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:49,775 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:49,775 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:49,775 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:49,792 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:49,793 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:50,226 INFO L134 CoverageAnalysis]: Checked inductivity of 1575 backedges. 0 proven. 1575 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:50,227 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:50,227 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:50,227 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:50,227 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:50,227 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:50,227 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:50,232 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:50,232 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:33:50,247 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:50,249 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:50,275 INFO L134 CoverageAnalysis]: Checked inductivity of 1575 backedges. 0 proven. 1575 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:50,275 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:50,972 INFO L134 CoverageAnalysis]: Checked inductivity of 1575 backedges. 0 proven. 1575 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:50,991 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:50,992 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:50,994 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:50,994 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: FPandBP) [2018-01-25 05:33:51,041 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:51,046 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:51,072 INFO L134 CoverageAnalysis]: Checked inductivity of 1575 backedges. 0 proven. 1575 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:51,072 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:51,109 INFO L134 CoverageAnalysis]: Checked inductivity of 1575 backedges. 0 proven. 1575 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:51,110 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:51,110 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27, 27, 27, 27] total 53 [2018-01-25 05:33:51,110 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:51,111 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-25 05:33:51,111 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-25 05:33:51,112 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=781, Invalid=2081, Unknown=0, NotChecked=0, Total=2862 [2018-01-25 05:33:51,112 INFO L87 Difference]: Start difference. First operand 382 states and 509 transitions. Second operand 28 states. [2018-01-25 05:33:53,914 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:53,914 INFO L93 Difference]: Finished difference Result 430 states and 564 transitions. [2018-01-25 05:33:53,914 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-25 05:33:53,914 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 133 [2018-01-25 05:33:53,915 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:53,916 INFO L225 Difference]: With dead ends: 430 [2018-01-25 05:33:53,916 INFO L226 Difference]: Without dead ends: 426 [2018-01-25 05:33:53,917 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 557 GetRequests, 503 SyntacticMatches, 2 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=781, Invalid=2081, Unknown=0, NotChecked=0, Total=2862 [2018-01-25 05:33:53,917 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 426 states. [2018-01-25 05:33:53,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 426 to 396. [2018-01-25 05:33:53,926 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 396 states. [2018-01-25 05:33:53,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 396 states to 396 states and 528 transitions. [2018-01-25 05:33:53,927 INFO L78 Accepts]: Start accepts. Automaton has 396 states and 528 transitions. Word has length 133 [2018-01-25 05:33:53,927 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:53,927 INFO L432 AbstractCegarLoop]: Abstraction has 396 states and 528 transitions. [2018-01-25 05:33:53,927 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-25 05:33:53,927 INFO L276 IsEmpty]: Start isEmpty. Operand 396 states and 528 transitions. [2018-01-25 05:33:53,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 139 [2018-01-25 05:33:53,929 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:53,929 INFO L322 BasicCegarLoop]: trace histogram [27, 27, 26, 26, 26, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:53,929 INFO L371 AbstractCegarLoop]: === Iteration 27 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:53,929 INFO L82 PathProgramCache]: Analyzing trace with hash -158870211, now seen corresponding path program 26 times [2018-01-25 05:33:53,929 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:53,929 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:53,930 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-25 05:33:53,930 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:53,930 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:53,940 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:53,941 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:54,419 INFO L134 CoverageAnalysis]: Checked inductivity of 1703 backedges. 0 proven. 1703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:54,419 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:54,419 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:54,419 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:54,419 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:54,419 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:54,419 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:54,426 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:33:54,426 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:54,431 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:54,443 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:54,446 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:54,449 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:54,500 INFO L134 CoverageAnalysis]: Checked inductivity of 1703 backedges. 0 proven. 1703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:54,500 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:55,251 INFO L134 CoverageAnalysis]: Checked inductivity of 1703 backedges. 0 proven. 1703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:55,271 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:55,271 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode CVC4_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/cvc4 Starting monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with cvc4 --tear-down-incremental --print-success --lang smt --rewrite-divk --tlimit-per=12000 [2018-01-25 05:33:55,274 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-25 05:33:55,274 INFO L280 anRefinementStrategy]: Using traceCheck mode CVC4_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST1 (IT: FPandBP) [2018-01-25 05:33:55,279 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:55,295 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-25 05:33:55,320 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:55,324 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:55,352 INFO L134 CoverageAnalysis]: Checked inductivity of 1703 backedges. 0 proven. 1703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:55,352 INFO L314 TraceCheckSpWp]: Computing backward predicates... [2018-01-25 05:33:55,392 INFO L134 CoverageAnalysis]: Checked inductivity of 1703 backedges. 0 proven. 1703 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:55,393 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 5 imperfect interpolant sequences. [2018-01-25 05:33:55,393 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28, 28, 28, 28] total 55 [2018-01-25 05:33:55,393 INFO L247 anRefinementStrategy]: Using the first two imperfect interpolant sequences [2018-01-25 05:33:55,394 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-25 05:33:55,394 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-25 05:33:55,395 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=838, Invalid=2242, Unknown=0, NotChecked=0, Total=3080 [2018-01-25 05:33:55,395 INFO L87 Difference]: Start difference. First operand 396 states and 528 transitions. Second operand 29 states. [2018-01-25 05:33:58,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-25 05:33:58,415 INFO L93 Difference]: Finished difference Result 445 states and 584 transitions. [2018-01-25 05:33:58,415 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-25 05:33:58,415 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 138 [2018-01-25 05:33:58,415 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-25 05:33:58,417 INFO L225 Difference]: With dead ends: 445 [2018-01-25 05:33:58,417 INFO L226 Difference]: Without dead ends: 441 [2018-01-25 05:33:58,417 INFO L525 BasicCegarLoop]: 0 DeclaredPredicates, 578 GetRequests, 522 SyntacticMatches, 2 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 27 ImplicationChecksByTransitivity, 1.1s TimeCoverageRelationStatistics Valid=838, Invalid=2242, Unknown=0, NotChecked=0, Total=3080 [2018-01-25 05:33:58,418 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 441 states. [2018-01-25 05:33:58,430 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 441 to 410. [2018-01-25 05:33:58,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 410 states. [2018-01-25 05:33:58,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 410 states to 410 states and 547 transitions. [2018-01-25 05:33:58,433 INFO L78 Accepts]: Start accepts. Automaton has 410 states and 547 transitions. Word has length 138 [2018-01-25 05:33:58,433 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-25 05:33:58,433 INFO L432 AbstractCegarLoop]: Abstraction has 410 states and 547 transitions. [2018-01-25 05:33:58,433 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-25 05:33:58,433 INFO L276 IsEmpty]: Start isEmpty. Operand 410 states and 547 transitions. [2018-01-25 05:33:58,436 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2018-01-25 05:33:58,436 INFO L314 BasicCegarLoop]: Found error trace [2018-01-25 05:33:58,436 INFO L322 BasicCegarLoop]: trace histogram [28, 28, 27, 27, 27, 1, 1, 1, 1, 1, 1] [2018-01-25 05:33:58,436 INFO L371 AbstractCegarLoop]: === Iteration 28 === [mainErr0AssertViolation, mainErr2AssertViolation, mainErr3AssertViolation, mainErr1AssertViolation]=== [2018-01-25 05:33:58,436 INFO L82 PathProgramCache]: Analyzing trace with hash -376915569, now seen corresponding path program 27 times [2018-01-25 05:33:58,436 INFO L67 tionRefinementEngine]: Using refinement strategy TaipanRefinementStrategy [2018-01-25 05:33:58,437 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:58,437 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-25 05:33:58,437 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-25 05:33:58,437 INFO L280 anRefinementStrategy]: Using traceCheck mode SMTINTERPOL with AssertCodeBlockOrder NOT_INCREMENTALLY (IT: Craig_TreeInterpolation) [2018-01-25 05:33:58,454 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-25 05:33:58,456 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-25 05:33:58,941 INFO L134 CoverageAnalysis]: Checked inductivity of 1836 backedges. 0 proven. 1836 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-25 05:33:58,941 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:58,941 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode ABSTRACT_INTERPRETATION [2018-01-25 05:33:58,941 INFO L183 CegarAbsIntRunner]: Skipping current iteration for AI because we have already analyzed this path program [2018-01-25 05:33:58,941 INFO L434 seRefinementStrategy]: Interpolation failed due to KNOWN_IGNORE: AbsInt can only provide a hoare triple checker if it generated fixpoints [2018-01-25 05:33:58,942 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-25 05:33:58,942 INFO L187 anRefinementStrategy]: Switched to InterpolantGenerator mode Z3_IG No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-25 05:33:58,947 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-25 05:33:58,947 INFO L280 anRefinementStrategy]: Using traceCheck mode Z3_IG with AssertCodeBlockOrder OUTSIDE_LOOP_FIRST2 (IT: FPandBP) [2018-01-25 05:33:58,952 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:58,953 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:58,961 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:58,963 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:58,964 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:58,965 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:58,967 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:58,968 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:58,970 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:58,971 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:58,973 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:58,975 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:58,977 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:58,979 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:58,981 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:58,983 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:58,985 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:58,988 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:58,991 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:58,993 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:58,996 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:58,999 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:59,002 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:59,005 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:59,009 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command Received shutdown request... [2018-01-25 05:33:59,013 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:59,017 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:59,020 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-25 05:33:59,021 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-25 05:33:59,023 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-25 05:33:59,025 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-25 05:33:59,025 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-25 05:33:59,029 WARN L187 ceAbstractionStarter]: Timeout [2018-01-25 05:33:59,029 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 25.01 05:33:59 BoogieIcfgContainer [2018-01-25 05:33:59,029 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-25 05:33:59,030 INFO L168 Benchmark]: Toolchain (without parser) took 54197.34 ms. Allocated memory was 305.7 MB in the beginning and 732.4 MB in the end (delta: 426.8 MB). Free memory was 266.7 MB in the beginning and 628.4 MB in the end (delta: -361.7 MB). Peak memory consumption was 65.0 MB. Max. memory is 5.3 GB. [2018-01-25 05:33:59,031 INFO L168 Benchmark]: CDTParser took 0.12 ms. Allocated memory is still 305.7 MB. Free memory is still 270.7 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-25 05:33:59,031 INFO L168 Benchmark]: CACSL2BoogieTranslator took 159.22 ms. Allocated memory is still 305.7 MB. Free memory was 264.7 MB in the beginning and 256.7 MB in the end (delta: 8.0 MB). Peak memory consumption was 8.0 MB. Max. memory is 5.3 GB. [2018-01-25 05:33:59,032 INFO L168 Benchmark]: Boogie Preprocessor took 27.85 ms. Allocated memory is still 305.7 MB. Free memory was 256.7 MB in the beginning and 254.7 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-25 05:33:59,032 INFO L168 Benchmark]: RCFGBuilder took 176.92 ms. Allocated memory is still 305.7 MB. Free memory was 254.7 MB in the beginning and 242.1 MB in the end (delta: 12.6 MB). Peak memory consumption was 12.6 MB. Max. memory is 5.3 GB. [2018-01-25 05:33:59,032 INFO L168 Benchmark]: TraceAbstraction took 53826.09 ms. Allocated memory was 305.7 MB in the beginning and 732.4 MB in the end (delta: 426.8 MB). Free memory was 242.1 MB in the beginning and 628.4 MB in the end (delta: -386.3 MB). Peak memory consumption was 40.4 MB. Max. memory is 5.3 GB. [2018-01-25 05:33:59,034 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.12 ms. Allocated memory is still 305.7 MB. Free memory is still 270.7 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 159.22 ms. Allocated memory is still 305.7 MB. Free memory was 264.7 MB in the beginning and 256.7 MB in the end (delta: 8.0 MB). Peak memory consumption was 8.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 27.85 ms. Allocated memory is still 305.7 MB. Free memory was 256.7 MB in the beginning and 254.7 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 176.92 ms. Allocated memory is still 305.7 MB. Free memory was 254.7 MB in the beginning and 242.1 MB in the end (delta: 12.6 MB). Peak memory consumption was 12.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 53826.09 ms. Allocated memory was 305.7 MB in the beginning and 732.4 MB in the end (delta: 426.8 MB). Free memory was 242.1 MB in the beginning and 628.4 MB in the end (delta: -386.3 MB). Peak memory consumption was 40.4 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.analysis.abstractinterpretationv2: - StatisticsResult: ArrayEqualityDomainStatistics #Locations : 10 LocStat_MAX_WEQGRAPH_SIZE : 0 LocStat_MAX_SIZEOF_WEQEDGELABEL : 0 LocStat_NO_SUPPORTING_EQUALITIES : 0 LocStat_NO_SUPPORTING_DISEQUALITIES : 1 LocStat_NO_DISJUNCTIONS : -20 LocStat_MAX_NO_DISJUNCTIONS : -1 #Transitions : 15 TransStat_MAX_WEQGRAPH_SIZE : 0 TransStat_MAX_SIZEOF_WEQEDGELABEL : 0 TransStat_NO_SUPPORTING_EQUALITIES : 5 TransStat_NO_SUPPORTING_DISEQUALITIES : 1 TransStat_NO_DISJUNCTIONS : 16 TransStat_MAX_NO_DISJUNCTIONS : 2 - StatisticsResult: EqConstraintFactoryStatistics CONJOIN_DISJUNCTIVE(MILLISECONDS) : 0.169849 RENAME_VARIABLES(MILLISECONDS) : 0.381335 UNFREEZE(MILLISECONDS) : 0.000000 CONJOIN(MILLISECONDS) : 0.107102 PROJECTAWAY(MILLISECONDS) : 0.188217 ADD_WEAK_EQUALITY(MILLISECONDS) : 0.000000 DISJOIN(MILLISECONDS) : 1.780561 RENAME_VARIABLES_DISJUNCTIVE(MILLISECONDS) : 0.435958 ADD_EQUALITY(MILLISECONDS) : 0.080679 DISJOIN_DISJUNCTIVE(MILLISECONDS) : 0.000000 ADD_DISEQUALITY(MILLISECONDS) : 0.128135 #CONJOIN_DISJUNCTIVE : 18 #RENAME_VARIABLES : 43 #UNFREEZE : 0 #CONJOIN : 29 #PROJECTAWAY : 36 #ADD_WEAK_EQUALITY : 0 #DISJOIN : 1 #RENAME_VARIABLES_DISJUNCTIVE : 41 #ADD_EQUALITY : 5 #DISJOIN_DISJUNCTIVE : 0 #ADD_DISEQUALITY : 1 * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 17]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 17). Cancelled while BasicCegarLoop was analyzing trace of length 144 with TraceHistMax 28, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 30 known predicates. - TimeoutResultAtElement [Line: 24]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 24). Cancelled while BasicCegarLoop was analyzing trace of length 144 with TraceHistMax 28, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 30 known predicates. - TimeoutResultAtElement [Line: 26]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 26). Cancelled while BasicCegarLoop was analyzing trace of length 144 with TraceHistMax 28, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 30 known predicates. - TimeoutResultAtElement [Line: 19]: Timeout (TraceAbstraction) Unable to prove that array index is always in bounds (line 19). Cancelled while BasicCegarLoop was analyzing trace of length 144 with TraceHistMax 28, while TraceCheckSpWp was constructing forward predicates, while PredicateComparison was comparing new predicate (quantifier-free) to 30 known predicates. - StatisticsResult: Ultimate Automizer benchmark data CFG has 6 procedures, 42 locations, 4 error locations. TIMEOUT Result, 53.7s OverallTime, 28 OverallIterations, 28 TraceHistogramMax, 30.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 4757 SDtfs, 3459 SDslu, 59609 SDs, 0 SdLazy, 83952 SolverSat, 837 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 24.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 8205 GetRequests, 7398 SyntacticMatches, 52 SemanticMatches, 755 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 377 ImplicationChecksByTransitivity, 13.5s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=410occurred in iteration=27, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.1s AbstIntTime, 1 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, AutomataMinimizationStatistics: 0.3s AutomataMinimizationTime, 27 MinimizatonAttempts, 486 StatesRemovedByMinimization, 27 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.1s SsaConstructionTime, 3.5s SatisfiabilityAnalysisTime, 17.2s InterpolantComputationTime, 5897 NumberOfCodeBlocks, 5897 NumberOfCodeBlocksAsserted, 425 NumberOfCheckSat, 9692 ConstructedInterpolants, 0 QuantifiedInterpolants, 6767390 SizeOfPredicates, 0 NumberOfNonLiveVariables, 5200 ConjunctsInSsa, 1560 ConjunctsInUnsatCore, 131 InterpolantComputations, 1 PerfectInterpolantSequences, 0/78390 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, REUSE_STATISTICS: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/sanfoundry_24_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-25_05-33-59-044.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/sanfoundry_24_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-VPDomainBenchmark-0-2018-01-25_05-33-59-044.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/sanfoundry_24_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-BenchmarkWithCounters-0-2018-01-25_05-33-59-044.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/sanfoundry_24_false-valid-deref.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Taipan+AI_EQ_smtcomp.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-25_05-33-59-044.csv Completed graceful shutdown