java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_1_true-valid-memsafety_true-termination.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-1cceb4a [2018-01-30 00:17:03,525 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-30 00:17:03,527 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-30 00:17:03,541 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-30 00:17:03,542 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-30 00:17:03,543 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-30 00:17:03,544 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-30 00:17:03,546 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-30 00:17:03,548 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-30 00:17:03,549 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-30 00:17:03,550 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-30 00:17:03,550 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-30 00:17:03,551 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-30 00:17:03,553 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-30 00:17:03,554 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-30 00:17:03,556 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-30 00:17:03,558 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-30 00:17:03,560 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-30 00:17:03,561 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-30 00:17:03,562 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-30 00:17:03,564 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-01-30 00:17:03,569 INFO L174 SettingsManager]: Resetting Witness Parser preferences to default values [2018-01-30 00:17:03,570 INFO L181 SettingsManager]: Finished resetting all preferences to default values... [2018-01-30 00:17:03,570 INFO L98 SettingsManager]: Beginning loading settings from /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf [2018-01-30 00:17:03,579 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-30 00:17:03,580 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-30 00:17:03,581 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-30 00:17:03,581 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-30 00:17:03,581 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-30 00:17:03,581 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-30 00:17:03,581 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-30 00:17:03,582 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-30 00:17:03,582 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-30 00:17:03,582 INFO L133 SettingsManager]: * Check unreachability of error function in SV-COMP mode=false [2018-01-30 00:17:03,582 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-30 00:17:03,583 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-30 00:17:03,583 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-30 00:17:03,583 INFO L133 SettingsManager]: * Check for the main procedure if all allocated memory was freed=true [2018-01-30 00:17:03,583 INFO L133 SettingsManager]: * Bitprecise bitfields=true [2018-01-30 00:17:03,583 INFO L133 SettingsManager]: * SV-COMP memtrack compatibility mode=true [2018-01-30 00:17:03,584 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-30 00:17:03,584 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-30 00:17:03,584 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-30 00:17:03,584 INFO L133 SettingsManager]: * Size of a code block=SingleStatement [2018-01-30 00:17:03,584 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-30 00:17:03,584 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-30 00:17:03,585 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-30 00:17:03,585 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-30 00:17:03,585 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-30 00:17:03,585 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-30 00:17:03,585 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-30 00:17:03,586 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-30 00:17:03,586 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-01-30 00:17:03,586 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-30 00:17:03,586 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-30 00:17:03,586 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-30 00:17:03,587 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-30 00:17:03,587 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-30 00:17:03,621 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-30 00:17:03,635 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-30 00:17:03,639 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-30 00:17:03,641 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-30 00:17:03,642 INFO L276 PluginConnector]: CDTParser initialized [2018-01-30 00:17:03,642 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/ldv-memsafety/memleaks_test22_1_true-valid-memsafety_true-termination.i [2018-01-30 00:17:03,825 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-30 00:17:03,832 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-30 00:17:03,832 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-30 00:17:03,832 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-30 00:17:03,840 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-30 00:17:03,841 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 30.01 12:17:03" (1/1) ... [2018-01-30 00:17:03,845 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@715ee194 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:17:03, skipping insertion in model container [2018-01-30 00:17:03,845 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 30.01 12:17:03" (1/1) ... [2018-01-30 00:17:03,866 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-30 00:17:03,920 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-30 00:17:04,043 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-30 00:17:04,064 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-30 00:17:04,075 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:17:04 WrapperNode [2018-01-30 00:17:04,075 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-30 00:17:04,076 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-30 00:17:04,076 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-30 00:17:04,076 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-30 00:17:04,092 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:17:04" (1/1) ... [2018-01-30 00:17:04,093 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:17:04" (1/1) ... [2018-01-30 00:17:04,104 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:17:04" (1/1) ... [2018-01-30 00:17:04,104 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:17:04" (1/1) ... [2018-01-30 00:17:04,111 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:17:04" (1/1) ... [2018-01-30 00:17:04,114 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:17:04" (1/1) ... [2018-01-30 00:17:04,115 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:17:04" (1/1) ... [2018-01-30 00:17:04,118 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-30 00:17:04,118 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-30 00:17:04,118 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-30 00:17:04,118 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-30 00:17:04,119 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:17:04" (1/1) ... No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-30 00:17:04,163 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-30 00:17:04,163 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-30 00:17:04,163 INFO L136 BoogieDeclarations]: Found implementation of procedure ##fun~$Pointer$~TO~VOID [2018-01-30 00:17:04,164 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_malloc [2018-01-30 00:17:04,164 INFO L136 BoogieDeclarations]: Found implementation of procedure LDV_INIT_LIST_HEAD [2018-01-30 00:17:04,164 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_atomic_sub_return [2018-01-30 00:17:04,164 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_sub [2018-01-30 00:17:04,164 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_init [2018-01-30 00:17:04,164 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kref_put [2018-01-30 00:17:04,164 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_cleanup [2018-01-30 00:17:04,164 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_release [2018-01-30 00:17:04,164 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_put [2018-01-30 00:17:04,164 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init_internal [2018-01-30 00:17:04,165 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_init [2018-01-30 00:17:04,165 INFO L136 BoogieDeclarations]: Found implementation of procedure ldv_kobject_create [2018-01-30 00:17:04,165 INFO L136 BoogieDeclarations]: Found implementation of procedure entry_point [2018-01-30 00:17:04,165 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-30 00:17:04,165 INFO L128 BoogieDeclarations]: Found specification of procedure write~int [2018-01-30 00:17:04,165 INFO L128 BoogieDeclarations]: Found specification of procedure read~int [2018-01-30 00:17:04,165 INFO L128 BoogieDeclarations]: Found specification of procedure write~$Pointer$ [2018-01-30 00:17:04,165 INFO L128 BoogieDeclarations]: Found specification of procedure read~$Pointer$ [2018-01-30 00:17:04,166 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.free [2018-01-30 00:17:04,166 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.dealloc [2018-01-30 00:17:04,166 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.alloc [2018-01-30 00:17:04,166 INFO L128 BoogieDeclarations]: Found specification of procedure #Ultimate.C_memset [2018-01-30 00:17:04,166 INFO L136 BoogieDeclarations]: Found implementation of procedure #Ultimate.C_memset [2018-01-30 00:17:04,167 INFO L128 BoogieDeclarations]: Found specification of procedure malloc [2018-01-30 00:17:04,167 INFO L128 BoogieDeclarations]: Found specification of procedure free [2018-01-30 00:17:04,167 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_nondet_int [2018-01-30 00:17:04,167 INFO L128 BoogieDeclarations]: Found specification of procedure memset [2018-01-30 00:17:04,167 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_malloc [2018-01-30 00:17:04,168 INFO L128 BoogieDeclarations]: Found specification of procedure LDV_INIT_LIST_HEAD [2018-01-30 00:17:04,168 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_atomic_sub_return [2018-01-30 00:17:04,168 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_sub [2018-01-30 00:17:04,168 INFO L128 BoogieDeclarations]: Found specification of procedure ##fun~$Pointer$~TO~VOID [2018-01-30 00:17:04,168 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_init [2018-01-30 00:17:04,168 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kref_put [2018-01-30 00:17:04,168 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_cleanup [2018-01-30 00:17:04,168 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_release [2018-01-30 00:17:04,169 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_put [2018-01-30 00:17:04,169 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init_internal [2018-01-30 00:17:04,169 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_init [2018-01-30 00:17:04,169 INFO L128 BoogieDeclarations]: Found specification of procedure ldv_kobject_create [2018-01-30 00:17:04,169 INFO L128 BoogieDeclarations]: Found specification of procedure entry_point [2018-01-30 00:17:04,169 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-30 00:17:04,169 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-30 00:17:04,170 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-30 00:17:04,406 WARN L455 $ProcedureCfgBuilder]: Label in the middle of a codeblock. [2018-01-30 00:17:04,590 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-30 00:17:04,591 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 30.01 12:17:04 BoogieIcfgContainer [2018-01-30 00:17:04,591 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-30 00:17:04,592 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-30 00:17:04,592 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-30 00:17:04,594 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-30 00:17:04,595 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 30.01 12:17:03" (1/3) ... [2018-01-30 00:17:04,595 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@75531691 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 30.01 12:17:04, skipping insertion in model container [2018-01-30 00:17:04,595 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 30.01 12:17:04" (2/3) ... [2018-01-30 00:17:04,596 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@75531691 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 30.01 12:17:04, skipping insertion in model container [2018-01-30 00:17:04,596 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 30.01 12:17:04" (3/3) ... [2018-01-30 00:17:04,597 INFO L107 eAbstractionObserver]: Analyzing ICFG memleaks_test22_1_true-valid-memsafety_true-termination.i [2018-01-30 00:17:04,603 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-30 00:17:04,609 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 19 error locations. [2018-01-30 00:17:04,652 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-30 00:17:04,652 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-30 00:17:04,653 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-30 00:17:04,653 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-30 00:17:04,653 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-30 00:17:04,653 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-30 00:17:04,653 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-30 00:17:04,653 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-30 00:17:04,654 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-30 00:17:04,671 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states. [2018-01-30 00:17:04,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 23 [2018-01-30 00:17:04,676 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:04,677 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:04,677 INFO L371 AbstractCegarLoop]: === Iteration 1 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:04,681 INFO L82 PathProgramCache]: Analyzing trace with hash -1444558594, now seen corresponding path program 1 times [2018-01-30 00:17:04,682 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:04,683 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:04,735 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:04,735 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:04,735 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:04,790 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:04,801 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:05,022 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:05,024 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:17:05,025 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-30 00:17:05,027 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-30 00:17:05,042 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-30 00:17:05,042 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=7, Invalid=13, Unknown=0, NotChecked=0, Total=20 [2018-01-30 00:17:05,045 INFO L87 Difference]: Start difference. First operand 146 states. Second operand 5 states. [2018-01-30 00:17:05,120 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:05,120 INFO L93 Difference]: Finished difference Result 274 states and 287 transitions. [2018-01-30 00:17:05,121 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-30 00:17:05,122 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 22 [2018-01-30 00:17:05,122 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:05,139 INFO L225 Difference]: With dead ends: 274 [2018-01-30 00:17:05,139 INFO L226 Difference]: Without dead ends: 150 [2018-01-30 00:17:05,143 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 6 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=11, Invalid=19, Unknown=0, NotChecked=0, Total=30 [2018-01-30 00:17:05,160 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-01-30 00:17:05,182 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 148. [2018-01-30 00:17:05,183 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 148 states. [2018-01-30 00:17:05,187 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 148 states to 148 states and 155 transitions. [2018-01-30 00:17:05,188 INFO L78 Accepts]: Start accepts. Automaton has 148 states and 155 transitions. Word has length 22 [2018-01-30 00:17:05,189 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:05,189 INFO L432 AbstractCegarLoop]: Abstraction has 148 states and 155 transitions. [2018-01-30 00:17:05,189 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-30 00:17:05,189 INFO L276 IsEmpty]: Start isEmpty. Operand 148 states and 155 transitions. [2018-01-30 00:17:05,190 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-30 00:17:05,190 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:05,191 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:05,191 INFO L371 AbstractCegarLoop]: === Iteration 2 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:05,191 INFO L82 PathProgramCache]: Analyzing trace with hash -325615945, now seen corresponding path program 1 times [2018-01-30 00:17:05,191 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:05,191 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:05,193 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:05,193 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:05,193 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:05,214 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:05,216 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:05,270 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:05,270 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:17:05,270 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [5] imperfect sequences [] total 5 [2018-01-30 00:17:05,272 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-30 00:17:05,272 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-30 00:17:05,272 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-30 00:17:05,272 INFO L87 Difference]: Start difference. First operand 148 states and 155 transitions. Second operand 6 states. [2018-01-30 00:17:05,449 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:05,449 INFO L93 Difference]: Finished difference Result 151 states and 158 transitions. [2018-01-30 00:17:05,450 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-30 00:17:05,450 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 23 [2018-01-30 00:17:05,450 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:05,452 INFO L225 Difference]: With dead ends: 151 [2018-01-30 00:17:05,452 INFO L226 Difference]: Without dead ends: 150 [2018-01-30 00:17:05,453 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 7 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-30 00:17:05,454 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-01-30 00:17:05,465 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 147. [2018-01-30 00:17:05,466 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-01-30 00:17:05,467 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 154 transitions. [2018-01-30 00:17:05,468 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 154 transitions. Word has length 23 [2018-01-30 00:17:05,468 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:05,468 INFO L432 AbstractCegarLoop]: Abstraction has 147 states and 154 transitions. [2018-01-30 00:17:05,468 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-30 00:17:05,468 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 154 transitions. [2018-01-30 00:17:05,469 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 24 [2018-01-30 00:17:05,469 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:05,469 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:05,470 INFO L371 AbstractCegarLoop]: === Iteration 3 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:05,470 INFO L82 PathProgramCache]: Analyzing trace with hash -325615944, now seen corresponding path program 1 times [2018-01-30 00:17:05,470 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:05,470 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:05,472 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:05,472 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:05,472 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:05,493 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:05,494 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:05,835 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:05,835 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:17:05,836 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-30 00:17:05,836 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-30 00:17:05,836 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-30 00:17:05,836 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-30 00:17:05,837 INFO L87 Difference]: Start difference. First operand 147 states and 154 transitions. Second operand 7 states. [2018-01-30 00:17:06,060 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:06,060 INFO L93 Difference]: Finished difference Result 150 states and 157 transitions. [2018-01-30 00:17:06,061 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-30 00:17:06,061 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 23 [2018-01-30 00:17:06,062 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:06,063 INFO L225 Difference]: With dead ends: 150 [2018-01-30 00:17:06,064 INFO L226 Difference]: Without dead ends: 149 [2018-01-30 00:17:06,064 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=25, Invalid=65, Unknown=0, NotChecked=0, Total=90 [2018-01-30 00:17:06,065 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-01-30 00:17:06,075 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 146. [2018-01-30 00:17:06,075 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 146 states. [2018-01-30 00:17:06,077 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 146 states to 146 states and 153 transitions. [2018-01-30 00:17:06,077 INFO L78 Accepts]: Start accepts. Automaton has 146 states and 153 transitions. Word has length 23 [2018-01-30 00:17:06,077 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:06,077 INFO L432 AbstractCegarLoop]: Abstraction has 146 states and 153 transitions. [2018-01-30 00:17:06,078 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-30 00:17:06,078 INFO L276 IsEmpty]: Start isEmpty. Operand 146 states and 153 transitions. [2018-01-30 00:17:06,079 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 35 [2018-01-30 00:17:06,079 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:06,079 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:06,079 INFO L371 AbstractCegarLoop]: === Iteration 4 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:06,080 INFO L82 PathProgramCache]: Analyzing trace with hash 820749947, now seen corresponding path program 1 times [2018-01-30 00:17:06,080 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:06,080 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:06,081 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:06,081 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:06,082 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:06,094 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:06,095 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:06,144 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:06,144 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:17:06,145 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-30 00:17:06,145 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-30 00:17:06,145 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-30 00:17:06,146 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-30 00:17:06,146 INFO L87 Difference]: Start difference. First operand 146 states and 153 transitions. Second operand 3 states. [2018-01-30 00:17:06,236 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:06,236 INFO L93 Difference]: Finished difference Result 167 states and 175 transitions. [2018-01-30 00:17:06,242 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-30 00:17:06,242 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 34 [2018-01-30 00:17:06,243 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:06,246 INFO L225 Difference]: With dead ends: 167 [2018-01-30 00:17:06,246 INFO L226 Difference]: Without dead ends: 163 [2018-01-30 00:17:06,247 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 10 GetRequests, 9 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-30 00:17:06,247 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 163 states. [2018-01-30 00:17:06,267 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 163 to 163. [2018-01-30 00:17:06,267 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 163 states. [2018-01-30 00:17:06,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 163 states to 163 states and 171 transitions. [2018-01-30 00:17:06,269 INFO L78 Accepts]: Start accepts. Automaton has 163 states and 171 transitions. Word has length 34 [2018-01-30 00:17:06,269 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:06,269 INFO L432 AbstractCegarLoop]: Abstraction has 163 states and 171 transitions. [2018-01-30 00:17:06,269 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-30 00:17:06,269 INFO L276 IsEmpty]: Start isEmpty. Operand 163 states and 171 transitions. [2018-01-30 00:17:06,271 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-30 00:17:06,271 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:06,271 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:06,271 INFO L371 AbstractCegarLoop]: === Iteration 5 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:06,272 INFO L82 PathProgramCache]: Analyzing trace with hash -228225356, now seen corresponding path program 1 times [2018-01-30 00:17:06,272 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:06,272 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:06,273 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:06,274 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:06,274 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:06,287 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:06,288 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:06,335 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:06,335 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:17:06,383 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [6] imperfect sequences [] total 6 [2018-01-30 00:17:06,383 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-30 00:17:06,384 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-30 00:17:06,384 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=9, Invalid=21, Unknown=0, NotChecked=0, Total=30 [2018-01-30 00:17:06,384 INFO L87 Difference]: Start difference. First operand 163 states and 171 transitions. Second operand 6 states. [2018-01-30 00:17:06,414 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:06,414 INFO L93 Difference]: Finished difference Result 251 states and 261 transitions. [2018-01-30 00:17:06,415 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-30 00:17:06,415 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 35 [2018-01-30 00:17:06,415 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:06,417 INFO L225 Difference]: With dead ends: 251 [2018-01-30 00:17:06,417 INFO L226 Difference]: Without dead ends: 162 [2018-01-30 00:17:06,418 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 8 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=17, Invalid=39, Unknown=0, NotChecked=0, Total=56 [2018-01-30 00:17:06,418 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 162 states. [2018-01-30 00:17:06,430 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 162 to 162. [2018-01-30 00:17:06,430 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-01-30 00:17:06,432 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 169 transitions. [2018-01-30 00:17:06,432 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 169 transitions. Word has length 35 [2018-01-30 00:17:06,432 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:06,432 INFO L432 AbstractCegarLoop]: Abstraction has 162 states and 169 transitions. [2018-01-30 00:17:06,433 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-30 00:17:06,433 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 169 transitions. [2018-01-30 00:17:06,434 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-30 00:17:06,434 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:06,434 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:06,434 INFO L371 AbstractCegarLoop]: === Iteration 6 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:06,435 INFO L82 PathProgramCache]: Analyzing trace with hash -1284688410, now seen corresponding path program 1 times [2018-01-30 00:17:06,435 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:06,435 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:06,436 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:06,436 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:06,436 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:06,453 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:06,455 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:06,559 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:06,559 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:17:06,559 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [9] imperfect sequences [] total 9 [2018-01-30 00:17:06,559 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-30 00:17:06,559 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-30 00:17:06,560 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-30 00:17:06,560 INFO L87 Difference]: Start difference. First operand 162 states and 169 transitions. Second operand 10 states. [2018-01-30 00:17:06,816 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:06,816 INFO L93 Difference]: Finished difference Result 162 states and 169 transitions. [2018-01-30 00:17:06,817 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-30 00:17:06,817 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 39 [2018-01-30 00:17:06,817 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:06,818 INFO L225 Difference]: With dead ends: 162 [2018-01-30 00:17:06,818 INFO L226 Difference]: Without dead ends: 161 [2018-01-30 00:17:06,819 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 12 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=29, Invalid=127, Unknown=0, NotChecked=0, Total=156 [2018-01-30 00:17:06,819 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 161 states. [2018-01-30 00:17:06,828 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 161 to 161. [2018-01-30 00:17:06,828 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-01-30 00:17:06,829 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 168 transitions. [2018-01-30 00:17:06,829 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 168 transitions. Word has length 39 [2018-01-30 00:17:06,829 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:06,829 INFO L432 AbstractCegarLoop]: Abstraction has 161 states and 168 transitions. [2018-01-30 00:17:06,829 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-30 00:17:06,829 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 168 transitions. [2018-01-30 00:17:06,830 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 40 [2018-01-30 00:17:06,830 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:06,830 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:06,831 INFO L371 AbstractCegarLoop]: === Iteration 7 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:06,831 INFO L82 PathProgramCache]: Analyzing trace with hash -1284688409, now seen corresponding path program 1 times [2018-01-30 00:17:06,831 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:06,831 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:06,832 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:06,832 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:06,832 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:06,845 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:06,847 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:06,880 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:06,880 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:17:06,880 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [4] imperfect sequences [] total 4 [2018-01-30 00:17:06,881 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-30 00:17:06,881 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-30 00:17:06,881 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=5, Invalid=7, Unknown=0, NotChecked=0, Total=12 [2018-01-30 00:17:06,881 INFO L87 Difference]: Start difference. First operand 161 states and 168 transitions. Second operand 4 states. [2018-01-30 00:17:06,955 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:06,955 INFO L93 Difference]: Finished difference Result 283 states and 295 transitions. [2018-01-30 00:17:06,956 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-30 00:17:06,956 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 39 [2018-01-30 00:17:06,956 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:06,958 INFO L225 Difference]: With dead ends: 283 [2018-01-30 00:17:06,958 INFO L226 Difference]: Without dead ends: 165 [2018-01-30 00:17:06,960 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 5 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=9, Invalid=11, Unknown=0, NotChecked=0, Total=20 [2018-01-30 00:17:06,961 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-01-30 00:17:06,974 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 162. [2018-01-30 00:17:06,974 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 162 states. [2018-01-30 00:17:06,975 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 162 states to 162 states and 169 transitions. [2018-01-30 00:17:06,976 INFO L78 Accepts]: Start accepts. Automaton has 162 states and 169 transitions. Word has length 39 [2018-01-30 00:17:06,976 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:06,976 INFO L432 AbstractCegarLoop]: Abstraction has 162 states and 169 transitions. [2018-01-30 00:17:06,976 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-30 00:17:06,976 INFO L276 IsEmpty]: Start isEmpty. Operand 162 states and 169 transitions. [2018-01-30 00:17:06,977 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 42 [2018-01-30 00:17:06,978 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:06,978 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:06,978 INFO L371 AbstractCegarLoop]: === Iteration 8 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:06,978 INFO L82 PathProgramCache]: Analyzing trace with hash -1841335064, now seen corresponding path program 1 times [2018-01-30 00:17:06,978 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:06,978 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:06,979 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:06,979 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:06,980 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:06,993 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:06,995 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:07,085 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:07,086 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:17:07,086 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [7] imperfect sequences [] total 7 [2018-01-30 00:17:07,086 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-30 00:17:07,086 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-30 00:17:07,086 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=11, Invalid=31, Unknown=0, NotChecked=0, Total=42 [2018-01-30 00:17:07,087 INFO L87 Difference]: Start difference. First operand 162 states and 169 transitions. Second operand 7 states. [2018-01-30 00:17:07,193 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:07,193 INFO L93 Difference]: Finished difference Result 249 states and 255 transitions. [2018-01-30 00:17:07,194 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-30 00:17:07,194 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 41 [2018-01-30 00:17:07,194 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:07,195 INFO L225 Difference]: With dead ends: 249 [2018-01-30 00:17:07,195 INFO L226 Difference]: Without dead ends: 151 [2018-01-30 00:17:07,196 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 9 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=19, Invalid=53, Unknown=0, NotChecked=0, Total=72 [2018-01-30 00:17:07,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 151 states. [2018-01-30 00:17:07,204 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 151 to 138. [2018-01-30 00:17:07,205 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 138 states. [2018-01-30 00:17:07,206 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 138 states to 138 states and 143 transitions. [2018-01-30 00:17:07,206 INFO L78 Accepts]: Start accepts. Automaton has 138 states and 143 transitions. Word has length 41 [2018-01-30 00:17:07,206 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:07,206 INFO L432 AbstractCegarLoop]: Abstraction has 138 states and 143 transitions. [2018-01-30 00:17:07,206 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-30 00:17:07,206 INFO L276 IsEmpty]: Start isEmpty. Operand 138 states and 143 transitions. [2018-01-30 00:17:07,207 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-30 00:17:07,207 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:07,208 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:07,208 INFO L371 AbstractCegarLoop]: === Iteration 9 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:07,208 INFO L82 PathProgramCache]: Analyzing trace with hash 43218853, now seen corresponding path program 1 times [2018-01-30 00:17:07,208 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:07,208 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:07,210 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:07,210 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:07,210 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:07,226 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:07,227 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:07,284 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:07,284 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:17:07,284 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:17:07,305 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:07,340 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:07,351 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:17:07,384 INFO L134 CoverageAnalysis]: Checked inductivity of 1 backedges. 0 proven. 1 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:07,419 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:17:07,420 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 6 [2018-01-30 00:17:07,420 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-30 00:17:07,420 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-30 00:17:07,420 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=12, Invalid=18, Unknown=0, NotChecked=0, Total=30 [2018-01-30 00:17:07,421 INFO L87 Difference]: Start difference. First operand 138 states and 143 transitions. Second operand 6 states. [2018-01-30 00:17:07,502 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:07,503 INFO L93 Difference]: Finished difference Result 252 states and 262 transitions. [2018-01-30 00:17:07,505 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-30 00:17:07,505 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2018-01-30 00:17:07,506 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:07,507 INFO L225 Difference]: With dead ends: 252 [2018-01-30 00:17:07,507 INFO L226 Difference]: Without dead ends: 145 [2018-01-30 00:17:07,508 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 43 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 1 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=16, Invalid=26, Unknown=0, NotChecked=0, Total=42 [2018-01-30 00:17:07,508 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 145 states. [2018-01-30 00:17:07,516 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 145 to 142. [2018-01-30 00:17:07,516 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 142 states. [2018-01-30 00:17:07,517 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 142 states to 142 states and 147 transitions. [2018-01-30 00:17:07,518 INFO L78 Accepts]: Start accepts. Automaton has 142 states and 147 transitions. Word has length 43 [2018-01-30 00:17:07,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:07,518 INFO L432 AbstractCegarLoop]: Abstraction has 142 states and 147 transitions. [2018-01-30 00:17:07,518 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-30 00:17:07,518 INFO L276 IsEmpty]: Start isEmpty. Operand 142 states and 147 transitions. [2018-01-30 00:17:07,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 48 [2018-01-30 00:17:07,519 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:07,520 INFO L350 BasicCegarLoop]: trace histogram [2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:07,520 INFO L371 AbstractCegarLoop]: === Iteration 10 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:07,520 INFO L82 PathProgramCache]: Analyzing trace with hash -316233117, now seen corresponding path program 2 times [2018-01-30 00:17:07,520 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:07,520 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:07,522 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:07,522 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:07,522 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:07,539 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:07,540 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:07,615 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 6 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:07,615 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:17:07,616 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:17:07,624 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 00:17:07,654 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:17:07,658 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:17:07,664 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:17:07,700 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-30 00:17:07,703 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-30 00:17:07,724 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-30 00:17:07,724 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:17:07,743 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-30 00:17:07,743 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-30 00:17:08,323 WARN L146 SmtUtils]: Spent 111ms on a formula simplification. DAG size of input: 45 DAG size of output 17 [2018-01-30 00:17:08,674 INFO L134 CoverageAnalysis]: Checked inductivity of 6 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 6 trivial. 0 not checked. [2018-01-30 00:17:08,695 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-30 00:17:08,695 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [14] imperfect sequences [6] total 19 [2018-01-30 00:17:08,695 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-30 00:17:08,695 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-30 00:17:08,696 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=51, Invalid=291, Unknown=0, NotChecked=0, Total=342 [2018-01-30 00:17:08,696 INFO L87 Difference]: Start difference. First operand 142 states and 147 transitions. Second operand 19 states. [2018-01-30 00:17:10,988 WARN L143 SmtUtils]: Spent 2035ms on a formula simplification that was a NOOP. DAG size: 31 [2018-01-30 00:17:15,117 WARN L143 SmtUtils]: Spent 4026ms on a formula simplification that was a NOOP. DAG size: 31 [2018-01-30 00:17:17,175 WARN L143 SmtUtils]: Spent 2023ms on a formula simplification that was a NOOP. DAG size: 32 [2018-01-30 00:17:17,872 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:17,872 INFO L93 Difference]: Finished difference Result 255 states and 266 transitions. [2018-01-30 00:17:17,872 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-30 00:17:17,873 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 47 [2018-01-30 00:17:17,873 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:17,874 INFO L225 Difference]: With dead ends: 255 [2018-01-30 00:17:17,874 INFO L226 Difference]: Without dead ends: 148 [2018-01-30 00:17:17,874 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 61 GetRequests, 35 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 86 ImplicationChecksByTransitivity, 9.2s TimeCoverageRelationStatistics Valid=104, Invalid=652, Unknown=0, NotChecked=0, Total=756 [2018-01-30 00:17:17,875 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 148 states. [2018-01-30 00:17:17,885 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 148 to 145. [2018-01-30 00:17:17,885 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-01-30 00:17:17,886 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 150 transitions. [2018-01-30 00:17:17,886 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 150 transitions. Word has length 47 [2018-01-30 00:17:17,886 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:17,886 INFO L432 AbstractCegarLoop]: Abstraction has 145 states and 150 transitions. [2018-01-30 00:17:17,886 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-30 00:17:17,886 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 150 transitions. [2018-01-30 00:17:17,887 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-30 00:17:17,887 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:17,887 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:17,887 INFO L371 AbstractCegarLoop]: === Iteration 11 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:17,887 INFO L82 PathProgramCache]: Analyzing trace with hash 230226637, now seen corresponding path program 1 times [2018-01-30 00:17:17,887 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:17,888 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:17,889 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:17,889 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:17:17,889 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:17,901 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:17,902 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:18,032 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 15 trivial. 0 not checked. [2018-01-30 00:17:18,033 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:17:18,033 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-30 00:17:18,033 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-30 00:17:18,033 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-30 00:17:18,033 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=111, Unknown=0, NotChecked=0, Total=132 [2018-01-30 00:17:18,034 INFO L87 Difference]: Start difference. First operand 145 states and 150 transitions. Second operand 12 states. [2018-01-30 00:17:18,295 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:18,295 INFO L93 Difference]: Finished difference Result 145 states and 150 transitions. [2018-01-30 00:17:18,295 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-30 00:17:18,295 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 56 [2018-01-30 00:17:18,296 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:18,296 INFO L225 Difference]: With dead ends: 145 [2018-01-30 00:17:18,296 INFO L226 Difference]: Without dead ends: 143 [2018-01-30 00:17:18,297 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=41, Invalid=231, Unknown=0, NotChecked=0, Total=272 [2018-01-30 00:17:18,297 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 143 states. [2018-01-30 00:17:18,307 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 143 to 143. [2018-01-30 00:17:18,307 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 143 states. [2018-01-30 00:17:18,308 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 143 states to 143 states and 148 transitions. [2018-01-30 00:17:18,308 INFO L78 Accepts]: Start accepts. Automaton has 143 states and 148 transitions. Word has length 56 [2018-01-30 00:17:18,309 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:18,309 INFO L432 AbstractCegarLoop]: Abstraction has 143 states and 148 transitions. [2018-01-30 00:17:18,309 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-30 00:17:18,309 INFO L276 IsEmpty]: Start isEmpty. Operand 143 states and 148 transitions. [2018-01-30 00:17:18,309 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 57 [2018-01-30 00:17:18,309 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:18,310 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:18,310 INFO L371 AbstractCegarLoop]: === Iteration 12 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:18,310 INFO L82 PathProgramCache]: Analyzing trace with hash 230226638, now seen corresponding path program 1 times [2018-01-30 00:17:18,310 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:18,310 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:18,311 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:18,311 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:18,311 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:18,325 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:18,326 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:18,412 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:18,412 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:17:18,412 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:17:18,419 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:18,446 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:18,451 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:17:18,469 INFO L134 CoverageAnalysis]: Checked inductivity of 15 backedges. 0 proven. 15 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:18,489 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:17:18,490 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 8 [2018-01-30 00:17:18,490 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-30 00:17:18,490 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-30 00:17:18,490 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=23, Invalid=33, Unknown=0, NotChecked=0, Total=56 [2018-01-30 00:17:18,490 INFO L87 Difference]: Start difference. First operand 143 states and 148 transitions. Second operand 8 states. [2018-01-30 00:17:18,539 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:18,539 INFO L93 Difference]: Finished difference Result 254 states and 264 transitions. [2018-01-30 00:17:18,539 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-30 00:17:18,540 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 56 [2018-01-30 00:17:18,540 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:18,541 INFO L225 Difference]: With dead ends: 254 [2018-01-30 00:17:18,541 INFO L226 Difference]: Without dead ends: 150 [2018-01-30 00:17:18,542 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 63 GetRequests, 56 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 8 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=27, Invalid=45, Unknown=0, NotChecked=0, Total=72 [2018-01-30 00:17:18,542 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 150 states. [2018-01-30 00:17:18,555 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 150 to 147. [2018-01-30 00:17:18,555 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-01-30 00:17:18,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 152 transitions. [2018-01-30 00:17:18,557 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 152 transitions. Word has length 56 [2018-01-30 00:17:18,557 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:18,557 INFO L432 AbstractCegarLoop]: Abstraction has 147 states and 152 transitions. [2018-01-30 00:17:18,557 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-30 00:17:18,557 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 152 transitions. [2018-01-30 00:17:18,558 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 61 [2018-01-30 00:17:18,558 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:18,558 INFO L350 BasicCegarLoop]: trace histogram [4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:18,558 INFO L371 AbstractCegarLoop]: === Iteration 13 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:18,558 INFO L82 PathProgramCache]: Analyzing trace with hash 503491792, now seen corresponding path program 2 times [2018-01-30 00:17:18,559 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:18,559 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:18,560 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:18,560 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:18,560 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:18,575 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:18,577 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:18,680 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 28 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:18,681 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:17:18,681 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:17:18,691 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 00:17:18,718 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:17:18,723 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:17:18,728 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:17:18,739 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-30 00:17:18,740 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-30 00:17:18,763 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-30 00:17:18,763 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:17:18,782 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-30 00:17:18,782 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-30 00:17:19,343 INFO L134 CoverageAnalysis]: Checked inductivity of 28 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 28 trivial. 0 not checked. [2018-01-30 00:17:19,363 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-30 00:17:19,363 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [15] imperfect sequences [8] total 22 [2018-01-30 00:17:19,364 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-30 00:17:19,364 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-30 00:17:19,364 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=72, Invalid=390, Unknown=0, NotChecked=0, Total=462 [2018-01-30 00:17:19,365 INFO L87 Difference]: Start difference. First operand 147 states and 152 transitions. Second operand 22 states. [2018-01-30 00:17:21,904 WARN L143 SmtUtils]: Spent 2025ms on a formula simplification that was a NOOP. DAG size: 32 [2018-01-30 00:17:22,495 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:22,496 INFO L93 Difference]: Finished difference Result 256 states and 268 transitions. [2018-01-30 00:17:22,496 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-30 00:17:22,496 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 60 [2018-01-30 00:17:22,497 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:22,498 INFO L225 Difference]: With dead ends: 256 [2018-01-30 00:17:22,498 INFO L226 Difference]: Without dead ends: 152 [2018-01-30 00:17:22,499 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 78 GetRequests, 46 SyntacticMatches, 1 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 167 ImplicationChecksByTransitivity, 2.9s TimeCoverageRelationStatistics Valid=152, Invalid=904, Unknown=0, NotChecked=0, Total=1056 [2018-01-30 00:17:22,499 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 152 states. [2018-01-30 00:17:22,511 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 152 to 149. [2018-01-30 00:17:22,512 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-01-30 00:17:22,513 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 154 transitions. [2018-01-30 00:17:22,513 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 154 transitions. Word has length 60 [2018-01-30 00:17:22,513 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:22,513 INFO L432 AbstractCegarLoop]: Abstraction has 149 states and 154 transitions. [2018-01-30 00:17:22,513 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-30 00:17:22,513 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 154 transitions. [2018-01-30 00:17:22,514 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 69 [2018-01-30 00:17:22,514 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:22,514 INFO L350 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:22,514 INFO L371 AbstractCegarLoop]: === Iteration 14 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:22,514 INFO L82 PathProgramCache]: Analyzing trace with hash -1357348391, now seen corresponding path program 1 times [2018-01-30 00:17:22,514 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:22,514 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:22,515 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:22,515 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:17:22,516 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:22,527 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:22,528 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:22,601 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-30 00:17:22,601 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:17:22,601 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [8] imperfect sequences [] total 8 [2018-01-30 00:17:22,601 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-30 00:17:22,602 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-30 00:17:22,602 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=13, Invalid=43, Unknown=0, NotChecked=0, Total=56 [2018-01-30 00:17:22,609 INFO L87 Difference]: Start difference. First operand 149 states and 154 transitions. Second operand 8 states. [2018-01-30 00:17:22,667 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:22,668 INFO L93 Difference]: Finished difference Result 229 states and 236 transitions. [2018-01-30 00:17:22,668 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-30 00:17:22,668 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 68 [2018-01-30 00:17:22,668 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:22,669 INFO L225 Difference]: With dead ends: 229 [2018-01-30 00:17:22,670 INFO L226 Difference]: Without dead ends: 149 [2018-01-30 00:17:22,670 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 11 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 3 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=25, Invalid=85, Unknown=0, NotChecked=0, Total=110 [2018-01-30 00:17:22,670 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-01-30 00:17:22,687 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 149. [2018-01-30 00:17:22,687 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-01-30 00:17:22,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 153 transitions. [2018-01-30 00:17:22,689 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 153 transitions. Word has length 68 [2018-01-30 00:17:22,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:22,689 INFO L432 AbstractCegarLoop]: Abstraction has 149 states and 153 transitions. [2018-01-30 00:17:22,689 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-30 00:17:22,690 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 153 transitions. [2018-01-30 00:17:22,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 74 [2018-01-30 00:17:22,690 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:22,691 INFO L350 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:22,691 INFO L371 AbstractCegarLoop]: === Iteration 15 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:22,691 INFO L82 PathProgramCache]: Analyzing trace with hash -1973403247, now seen corresponding path program 1 times [2018-01-30 00:17:22,691 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:22,691 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:22,692 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:22,692 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:22,692 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:22,706 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:22,707 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:22,793 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-30 00:17:22,793 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:17:22,793 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [10] imperfect sequences [] total 10 [2018-01-30 00:17:22,793 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-30 00:17:22,793 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-30 00:17:22,794 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=17, Invalid=73, Unknown=0, NotChecked=0, Total=90 [2018-01-30 00:17:22,794 INFO L87 Difference]: Start difference. First operand 149 states and 153 transitions. Second operand 10 states. [2018-01-30 00:17:22,861 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:22,861 INFO L93 Difference]: Finished difference Result 231 states and 237 transitions. [2018-01-30 00:17:22,865 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-30 00:17:22,866 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 73 [2018-01-30 00:17:22,866 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:22,867 INFO L225 Difference]: With dead ends: 231 [2018-01-30 00:17:22,867 INFO L226 Difference]: Without dead ends: 149 [2018-01-30 00:17:22,867 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 14 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 6 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=33, Invalid=149, Unknown=0, NotChecked=0, Total=182 [2018-01-30 00:17:22,867 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-01-30 00:17:22,879 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 149. [2018-01-30 00:17:22,879 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-01-30 00:17:22,880 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 152 transitions. [2018-01-30 00:17:22,880 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 152 transitions. Word has length 73 [2018-01-30 00:17:22,880 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:22,880 INFO L432 AbstractCegarLoop]: Abstraction has 149 states and 152 transitions. [2018-01-30 00:17:22,880 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-30 00:17:22,880 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 152 transitions. [2018-01-30 00:17:22,881 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 85 [2018-01-30 00:17:22,881 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:22,881 INFO L350 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:22,881 INFO L371 AbstractCegarLoop]: === Iteration 16 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:22,881 INFO L82 PathProgramCache]: Analyzing trace with hash -114464506, now seen corresponding path program 1 times [2018-01-30 00:17:22,881 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:22,881 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:22,882 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:22,882 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:22,882 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:22,894 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:22,896 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:23,160 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-30 00:17:23,160 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:17:23,160 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [11] imperfect sequences [] total 11 [2018-01-30 00:17:23,161 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-30 00:17:23,161 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-30 00:17:23,161 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=19, Invalid=91, Unknown=0, NotChecked=0, Total=110 [2018-01-30 00:17:23,161 INFO L87 Difference]: Start difference. First operand 149 states and 152 transitions. Second operand 11 states. [2018-01-30 00:17:23,458 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:23,458 INFO L93 Difference]: Finished difference Result 155 states and 157 transitions. [2018-01-30 00:17:23,458 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-30 00:17:23,458 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 84 [2018-01-30 00:17:23,459 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:23,459 INFO L225 Difference]: With dead ends: 155 [2018-01-30 00:17:23,459 INFO L226 Difference]: Without dead ends: 149 [2018-01-30 00:17:23,460 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 16 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 10 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=39, Invalid=201, Unknown=0, NotChecked=0, Total=240 [2018-01-30 00:17:23,460 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-01-30 00:17:23,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 149. [2018-01-30 00:17:23,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 149 states. [2018-01-30 00:17:23,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 149 states to 149 states and 151 transitions. [2018-01-30 00:17:23,471 INFO L78 Accepts]: Start accepts. Automaton has 149 states and 151 transitions. Word has length 84 [2018-01-30 00:17:23,472 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:23,472 INFO L432 AbstractCegarLoop]: Abstraction has 149 states and 151 transitions. [2018-01-30 00:17:23,472 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-30 00:17:23,472 INFO L276 IsEmpty]: Start isEmpty. Operand 149 states and 151 transitions. [2018-01-30 00:17:23,473 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-01-30 00:17:23,473 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:23,473 INFO L350 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:23,473 INFO L371 AbstractCegarLoop]: === Iteration 17 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:23,473 INFO L82 PathProgramCache]: Analyzing trace with hash 975359997, now seen corresponding path program 1 times [2018-01-30 00:17:23,473 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:23,473 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:23,474 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:23,474 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:23,474 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:23,489 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:23,490 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:23,970 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 45 trivial. 0 not checked. [2018-01-30 00:17:23,971 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:17:23,971 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [] total 20 [2018-01-30 00:17:23,971 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-30 00:17:23,971 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-30 00:17:23,971 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=41, Invalid=379, Unknown=0, NotChecked=0, Total=420 [2018-01-30 00:17:23,972 INFO L87 Difference]: Start difference. First operand 149 states and 151 transitions. Second operand 21 states. [2018-01-30 00:17:24,386 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:24,387 INFO L93 Difference]: Finished difference Result 156 states and 158 transitions. [2018-01-30 00:17:24,387 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-30 00:17:24,387 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 91 [2018-01-30 00:17:24,388 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:24,389 INFO L225 Difference]: With dead ends: 156 [2018-01-30 00:17:24,389 INFO L226 Difference]: Without dead ends: 154 [2018-01-30 00:17:24,389 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 28 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 65 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=73, Invalid=739, Unknown=0, NotChecked=0, Total=812 [2018-01-30 00:17:24,390 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-01-30 00:17:24,403 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 147. [2018-01-30 00:17:24,403 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 147 states. [2018-01-30 00:17:24,404 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 147 states to 147 states and 149 transitions. [2018-01-30 00:17:24,404 INFO L78 Accepts]: Start accepts. Automaton has 147 states and 149 transitions. Word has length 91 [2018-01-30 00:17:24,404 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:24,404 INFO L432 AbstractCegarLoop]: Abstraction has 147 states and 149 transitions. [2018-01-30 00:17:24,405 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-30 00:17:24,405 INFO L276 IsEmpty]: Start isEmpty. Operand 147 states and 149 transitions. [2018-01-30 00:17:24,405 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-01-30 00:17:24,405 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:24,405 INFO L350 BasicCegarLoop]: trace histogram [5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:24,405 INFO L371 AbstractCegarLoop]: === Iteration 18 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:24,406 INFO L82 PathProgramCache]: Analyzing trace with hash 975359998, now seen corresponding path program 1 times [2018-01-30 00:17:24,406 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:24,406 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:24,406 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:24,406 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:24,406 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:24,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:24,428 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:24,537 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:24,538 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:17:24,538 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:17:24,546 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:24,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:24,604 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:17:24,630 INFO L134 CoverageAnalysis]: Checked inductivity of 45 backedges. 0 proven. 45 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:24,663 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:17:24,663 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 10 [2018-01-30 00:17:24,664 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-30 00:17:24,664 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-30 00:17:24,664 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=38, Invalid=52, Unknown=0, NotChecked=0, Total=90 [2018-01-30 00:17:24,664 INFO L87 Difference]: Start difference. First operand 147 states and 149 transitions. Second operand 10 states. [2018-01-30 00:17:24,767 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:24,767 INFO L93 Difference]: Finished difference Result 254 states and 258 transitions. [2018-01-30 00:17:24,767 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-30 00:17:24,767 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 91 [2018-01-30 00:17:24,768 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:24,769 INFO L225 Difference]: With dead ends: 254 [2018-01-30 00:17:24,769 INFO L226 Difference]: Without dead ends: 154 [2018-01-30 00:17:24,769 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 100 GetRequests, 91 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 14 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=42, Invalid=68, Unknown=0, NotChecked=0, Total=110 [2018-01-30 00:17:24,770 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 154 states. [2018-01-30 00:17:24,785 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 154 to 151. [2018-01-30 00:17:24,785 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-01-30 00:17:24,786 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 153 transitions. [2018-01-30 00:17:24,786 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 153 transitions. Word has length 91 [2018-01-30 00:17:24,787 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:24,787 INFO L432 AbstractCegarLoop]: Abstraction has 151 states and 153 transitions. [2018-01-30 00:17:24,787 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-30 00:17:24,787 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 153 transitions. [2018-01-30 00:17:24,788 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 96 [2018-01-30 00:17:24,788 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:24,788 INFO L350 BasicCegarLoop]: trace histogram [6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:24,788 INFO L371 AbstractCegarLoop]: === Iteration 19 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:24,789 INFO L82 PathProgramCache]: Analyzing trace with hash 451563196, now seen corresponding path program 2 times [2018-01-30 00:17:24,789 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:24,789 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:24,790 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:24,790 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:24,790 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:24,811 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:24,813 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:24,921 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 66 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:24,921 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:17:24,922 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:17:24,927 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 00:17:24,959 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:17:24,963 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:17:24,968 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:17:24,975 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-30 00:17:24,976 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-30 00:17:24,990 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-30 00:17:24,990 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:17:25,003 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-30 00:17:25,003 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-30 00:17:26,033 INFO L134 CoverageAnalysis]: Checked inductivity of 66 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 66 trivial. 0 not checked. [2018-01-30 00:17:26,066 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-30 00:17:26,067 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [20] imperfect sequences [10] total 29 [2018-01-30 00:17:26,067 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-30 00:17:26,067 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-30 00:17:26,068 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=107, Invalid=705, Unknown=0, NotChecked=0, Total=812 [2018-01-30 00:17:26,068 INFO L87 Difference]: Start difference. First operand 151 states and 153 transitions. Second operand 29 states. [2018-01-30 00:17:30,186 WARN L143 SmtUtils]: Spent 4046ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-30 00:17:32,542 WARN L143 SmtUtils]: Spent 2020ms on a formula simplification that was a NOOP. DAG size: 31 [2018-01-30 00:17:33,735 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:33,735 INFO L93 Difference]: Finished difference Result 256 states and 262 transitions. [2018-01-30 00:17:33,735 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-30 00:17:33,735 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 95 [2018-01-30 00:17:33,736 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:33,736 INFO L225 Difference]: With dead ends: 256 [2018-01-30 00:17:33,736 INFO L226 Difference]: Without dead ends: 156 [2018-01-30 00:17:33,737 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 76 SyntacticMatches, 1 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 410 ImplicationChecksByTransitivity, 7.6s TimeCoverageRelationStatistics Valid=238, Invalid=1742, Unknown=0, NotChecked=0, Total=1980 [2018-01-30 00:17:33,737 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 156 states. [2018-01-30 00:17:33,757 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 156 to 153. [2018-01-30 00:17:33,757 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153 states. [2018-01-30 00:17:33,758 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 155 transitions. [2018-01-30 00:17:33,758 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 155 transitions. Word has length 95 [2018-01-30 00:17:33,758 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:33,759 INFO L432 AbstractCegarLoop]: Abstraction has 153 states and 155 transitions. [2018-01-30 00:17:33,759 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-30 00:17:33,759 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 155 transitions. [2018-01-30 00:17:33,760 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2018-01-30 00:17:33,760 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:33,760 INFO L350 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:33,761 INFO L371 AbstractCegarLoop]: === Iteration 20 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:33,761 INFO L82 PathProgramCache]: Analyzing trace with hash 1287222945, now seen corresponding path program 1 times [2018-01-30 00:17:33,761 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:33,761 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:33,762 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:33,762 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:17:33,762 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:33,786 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:33,787 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:34,318 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 91 trivial. 0 not checked. [2018-01-30 00:17:34,318 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-30 00:17:34,318 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [25] imperfect sequences [] total 25 [2018-01-30 00:17:34,318 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-30 00:17:34,319 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-30 00:17:34,319 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=49, Invalid=601, Unknown=0, NotChecked=0, Total=650 [2018-01-30 00:17:34,319 INFO L87 Difference]: Start difference. First operand 153 states and 155 transitions. Second operand 26 states. [2018-01-30 00:17:34,913 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:34,913 INFO L93 Difference]: Finished difference Result 160 states and 162 transitions. [2018-01-30 00:17:34,914 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-30 00:17:34,914 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 118 [2018-01-30 00:17:34,914 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:34,915 INFO L225 Difference]: With dead ends: 160 [2018-01-30 00:17:34,915 INFO L226 Difference]: Without dead ends: 158 [2018-01-30 00:17:34,915 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 38 GetRequests, 1 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 75 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=107, Invalid=1375, Unknown=0, NotChecked=0, Total=1482 [2018-01-30 00:17:34,915 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2018-01-30 00:17:34,933 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 151. [2018-01-30 00:17:34,934 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 151 states. [2018-01-30 00:17:34,934 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 151 states to 151 states and 153 transitions. [2018-01-30 00:17:34,934 INFO L78 Accepts]: Start accepts. Automaton has 151 states and 153 transitions. Word has length 118 [2018-01-30 00:17:34,935 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:34,935 INFO L432 AbstractCegarLoop]: Abstraction has 151 states and 153 transitions. [2018-01-30 00:17:34,935 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-30 00:17:34,935 INFO L276 IsEmpty]: Start isEmpty. Operand 151 states and 153 transitions. [2018-01-30 00:17:34,936 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 119 [2018-01-30 00:17:34,936 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:34,936 INFO L350 BasicCegarLoop]: trace histogram [7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:34,936 INFO L371 AbstractCegarLoop]: === Iteration 21 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:34,936 INFO L82 PathProgramCache]: Analyzing trace with hash 1287222946, now seen corresponding path program 1 times [2018-01-30 00:17:34,936 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:34,937 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:34,937 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:34,938 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:34,938 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:34,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:34,963 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:35,145 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:35,145 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:17:35,145 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:17:35,151 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:35,199 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:35,204 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:17:35,222 INFO L134 CoverageAnalysis]: Checked inductivity of 91 backedges. 0 proven. 91 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:35,242 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:17:35,243 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 12 [2018-01-30 00:17:35,243 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-30 00:17:35,243 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-30 00:17:35,244 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=57, Invalid=75, Unknown=0, NotChecked=0, Total=132 [2018-01-30 00:17:35,244 INFO L87 Difference]: Start difference. First operand 151 states and 153 transitions. Second operand 12 states. [2018-01-30 00:17:35,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:35,306 INFO L93 Difference]: Finished difference Result 254 states and 258 transitions. [2018-01-30 00:17:35,306 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-30 00:17:35,306 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 118 [2018-01-30 00:17:35,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:35,307 INFO L225 Difference]: With dead ends: 254 [2018-01-30 00:17:35,307 INFO L226 Difference]: Without dead ends: 158 [2018-01-30 00:17:35,308 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 129 GetRequests, 118 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 20 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=61, Invalid=95, Unknown=0, NotChecked=0, Total=156 [2018-01-30 00:17:35,308 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 158 states. [2018-01-30 00:17:35,321 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 158 to 155. [2018-01-30 00:17:35,321 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 155 states. [2018-01-30 00:17:35,322 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 155 states to 155 states and 157 transitions. [2018-01-30 00:17:35,322 INFO L78 Accepts]: Start accepts. Automaton has 155 states and 157 transitions. Word has length 118 [2018-01-30 00:17:35,323 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:35,323 INFO L432 AbstractCegarLoop]: Abstraction has 155 states and 157 transitions. [2018-01-30 00:17:35,323 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-30 00:17:35,323 INFO L276 IsEmpty]: Start isEmpty. Operand 155 states and 157 transitions. [2018-01-30 00:17:35,324 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 123 [2018-01-30 00:17:35,325 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:35,325 INFO L350 BasicCegarLoop]: trace histogram [8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:35,325 INFO L371 AbstractCegarLoop]: === Iteration 22 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:35,325 INFO L82 PathProgramCache]: Analyzing trace with hash -1000951516, now seen corresponding path program 2 times [2018-01-30 00:17:35,325 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:35,326 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:35,327 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:35,327 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:35,327 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:35,353 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:35,354 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:35,505 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 120 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:35,505 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:17:35,505 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:17:35,511 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 00:17:35,548 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:17:35,556 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:17:35,561 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:17:35,567 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 17 treesize of output 16 [2018-01-30 00:17:35,567 INFO L267 ElimStorePlain]: Start of recursive call 2: End of recursive call: and 1 xjuncts. [2018-01-30 00:17:35,581 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 19 [2018-01-30 00:17:35,581 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:17:35,593 INFO L267 ElimStorePlain]: Start of recursive call 1: 2 dim-0 vars, 2 dim-1 vars, End of recursive call: 2 dim-0 vars, and 2 xjuncts. [2018-01-30 00:17:35,593 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:38, output treesize:36 [2018-01-30 00:17:36,941 INFO L134 CoverageAnalysis]: Checked inductivity of 120 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 120 trivial. 0 not checked. [2018-01-30 00:17:36,972 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 1 imperfect interpolant sequences. [2018-01-30 00:17:36,973 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [26] imperfect sequences [12] total 37 [2018-01-30 00:17:36,973 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-01-30 00:17:36,973 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-01-30 00:17:36,974 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=150, Invalid=1182, Unknown=0, NotChecked=0, Total=1332 [2018-01-30 00:17:36,974 INFO L87 Difference]: Start difference. First operand 155 states and 157 transitions. Second operand 37 states. [2018-01-30 00:17:37,565 WARN L143 SmtUtils]: Spent 515ms on a formula simplification that was a NOOP. DAG size: 39 [2018-01-30 00:17:39,501 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:39,501 INFO L93 Difference]: Finished difference Result 256 states and 262 transitions. [2018-01-30 00:17:39,501 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-01-30 00:17:39,501 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 122 [2018-01-30 00:17:39,502 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:39,502 INFO L225 Difference]: With dead ends: 256 [2018-01-30 00:17:39,502 INFO L226 Difference]: Without dead ends: 160 [2018-01-30 00:17:39,503 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 155 GetRequests, 95 SyntacticMatches, 3 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 756 ImplicationChecksByTransitivity, 2.7s TimeCoverageRelationStatistics Valid=351, Invalid=3071, Unknown=0, NotChecked=0, Total=3422 [2018-01-30 00:17:39,503 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 160 states. [2018-01-30 00:17:39,517 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 160 to 157. [2018-01-30 00:17:39,517 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 157 states. [2018-01-30 00:17:39,518 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 157 states to 157 states and 159 transitions. [2018-01-30 00:17:39,518 INFO L78 Accepts]: Start accepts. Automaton has 157 states and 159 transitions. Word has length 122 [2018-01-30 00:17:39,518 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:39,518 INFO L432 AbstractCegarLoop]: Abstraction has 157 states and 159 transitions. [2018-01-30 00:17:39,518 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-01-30 00:17:39,518 INFO L276 IsEmpty]: Start isEmpty. Operand 157 states and 159 transitions. [2018-01-30 00:17:39,519 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-01-30 00:17:39,519 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:39,519 INFO L350 BasicCegarLoop]: trace histogram [9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:39,519 INFO L371 AbstractCegarLoop]: === Iteration 23 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:39,519 INFO L82 PathProgramCache]: Analyzing trace with hash 1165294926, now seen corresponding path program 1 times [2018-01-30 00:17:39,519 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:39,519 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:39,520 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:39,520 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:17:39,520 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:39,540 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:39,541 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:39,705 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:39,705 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:17:39,705 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:17:39,711 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:39,776 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:39,781 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:17:39,808 INFO L134 CoverageAnalysis]: Checked inductivity of 153 backedges. 0 proven. 153 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:39,841 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:17:39,841 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 14 [2018-01-30 00:17:39,842 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-30 00:17:39,842 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-30 00:17:39,842 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=80, Invalid=102, Unknown=0, NotChecked=0, Total=182 [2018-01-30 00:17:39,843 INFO L87 Difference]: Start difference. First operand 157 states and 159 transitions. Second operand 14 states. [2018-01-30 00:17:39,974 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:39,974 INFO L93 Difference]: Finished difference Result 258 states and 262 transitions. [2018-01-30 00:17:39,974 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-30 00:17:39,974 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 131 [2018-01-30 00:17:39,974 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:39,975 INFO L225 Difference]: With dead ends: 258 [2018-01-30 00:17:39,976 INFO L226 Difference]: Without dead ends: 164 [2018-01-30 00:17:39,976 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 144 GetRequests, 131 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 26 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=84, Invalid=126, Unknown=0, NotChecked=0, Total=210 [2018-01-30 00:17:39,976 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 164 states. [2018-01-30 00:17:39,993 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 164 to 161. [2018-01-30 00:17:39,993 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-01-30 00:17:39,993 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 163 transitions. [2018-01-30 00:17:39,994 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 163 transitions. Word has length 131 [2018-01-30 00:17:39,994 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:39,994 INFO L432 AbstractCegarLoop]: Abstraction has 161 states and 163 transitions. [2018-01-30 00:17:39,994 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-30 00:17:39,994 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 163 transitions. [2018-01-30 00:17:39,994 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 136 [2018-01-30 00:17:39,995 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:39,995 INFO L350 BasicCegarLoop]: trace histogram [10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:39,995 INFO L371 AbstractCegarLoop]: === Iteration 24 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:39,995 INFO L82 PathProgramCache]: Analyzing trace with hash -951687668, now seen corresponding path program 2 times [2018-01-30 00:17:39,995 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:39,995 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:39,996 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:39,996 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:39,996 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:40,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:40,021 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:40,255 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:40,255 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:17:40,255 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:17:40,261 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 00:17:40,302 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:17:40,317 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:17:40,319 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:17:40,324 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:17:40,346 INFO L134 CoverageAnalysis]: Checked inductivity of 190 backedges. 0 proven. 190 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:40,367 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:17:40,367 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 15 [2018-01-30 00:17:40,367 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-30 00:17:40,367 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-30 00:17:40,367 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=93, Invalid=117, Unknown=0, NotChecked=0, Total=210 [2018-01-30 00:17:40,368 INFO L87 Difference]: Start difference. First operand 161 states and 163 transitions. Second operand 15 states. [2018-01-30 00:17:40,435 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:40,435 INFO L93 Difference]: Finished difference Result 262 states and 266 transitions. [2018-01-30 00:17:40,435 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-30 00:17:40,435 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 135 [2018-01-30 00:17:40,435 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:40,436 INFO L225 Difference]: With dead ends: 262 [2018-01-30 00:17:40,436 INFO L226 Difference]: Without dead ends: 168 [2018-01-30 00:17:40,437 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 149 GetRequests, 135 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 29 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=97, Invalid=143, Unknown=0, NotChecked=0, Total=240 [2018-01-30 00:17:40,437 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 168 states. [2018-01-30 00:17:40,451 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 168 to 165. [2018-01-30 00:17:40,451 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 165 states. [2018-01-30 00:17:40,452 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 165 states to 165 states and 167 transitions. [2018-01-30 00:17:40,452 INFO L78 Accepts]: Start accepts. Automaton has 165 states and 167 transitions. Word has length 135 [2018-01-30 00:17:40,453 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:40,453 INFO L432 AbstractCegarLoop]: Abstraction has 165 states and 167 transitions. [2018-01-30 00:17:40,453 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-30 00:17:40,453 INFO L276 IsEmpty]: Start isEmpty. Operand 165 states and 167 transitions. [2018-01-30 00:17:40,454 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-01-30 00:17:40,454 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:40,454 INFO L350 BasicCegarLoop]: trace histogram [11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:40,454 INFO L371 AbstractCegarLoop]: === Iteration 25 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:40,454 INFO L82 PathProgramCache]: Analyzing trace with hash -1130807350, now seen corresponding path program 3 times [2018-01-30 00:17:40,455 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:40,455 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:40,456 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:40,456 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:17:40,456 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:40,481 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:40,482 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:40,669 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:40,669 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:17:40,670 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:17:40,675 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-30 00:17:40,710 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:17:40,720 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:17:40,744 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:17:40,811 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:17:40,874 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:17:40,952 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:17:41,313 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:17:41,497 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:17:41,732 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:17:41,882 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:17:42,130 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:17:42,732 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-30 00:17:42,734 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:17:42,742 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:17:42,970 INFO L134 CoverageAnalysis]: Checked inductivity of 231 backedges. 0 proven. 231 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:42,991 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:17:42,991 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 20] total 33 [2018-01-30 00:17:42,992 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-01-30 00:17:42,992 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-01-30 00:17:42,992 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=286, Invalid=770, Unknown=0, NotChecked=0, Total=1056 [2018-01-30 00:17:42,992 INFO L87 Difference]: Start difference. First operand 165 states and 167 transitions. Second operand 33 states. [2018-01-30 00:17:43,145 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:43,145 INFO L93 Difference]: Finished difference Result 266 states and 270 transitions. [2018-01-30 00:17:43,146 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-30 00:17:43,146 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 139 [2018-01-30 00:17:43,146 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:43,147 INFO L225 Difference]: With dead ends: 266 [2018-01-30 00:17:43,147 INFO L226 Difference]: Without dead ends: 172 [2018-01-30 00:17:43,147 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 157 GetRequests, 122 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 406 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=328, Invalid=1004, Unknown=0, NotChecked=0, Total=1332 [2018-01-30 00:17:43,147 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 172 states. [2018-01-30 00:17:43,162 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 172 to 169. [2018-01-30 00:17:43,162 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-01-30 00:17:43,163 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 171 transitions. [2018-01-30 00:17:43,163 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 171 transitions. Word has length 139 [2018-01-30 00:17:43,163 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:43,163 INFO L432 AbstractCegarLoop]: Abstraction has 169 states and 171 transitions. [2018-01-30 00:17:43,163 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-01-30 00:17:43,163 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 171 transitions. [2018-01-30 00:17:43,164 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 144 [2018-01-30 00:17:43,164 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:43,164 INFO L350 BasicCegarLoop]: trace histogram [12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:43,164 INFO L371 AbstractCegarLoop]: === Iteration 26 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:43,164 INFO L82 PathProgramCache]: Analyzing trace with hash -1253242232, now seen corresponding path program 4 times [2018-01-30 00:17:43,164 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:43,164 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:43,165 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:43,165 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:17:43,165 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:43,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:43,181 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:43,403 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:43,403 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:17:43,403 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:17:43,408 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-30 00:17:43,645 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:17:43,649 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:17:43,669 INFO L134 CoverageAnalysis]: Checked inductivity of 276 backedges. 0 proven. 276 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:43,691 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:17:43,691 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 17 [2018-01-30 00:17:43,691 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-30 00:17:43,691 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-30 00:17:43,692 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=122, Invalid=150, Unknown=0, NotChecked=0, Total=272 [2018-01-30 00:17:43,692 INFO L87 Difference]: Start difference. First operand 169 states and 171 transitions. Second operand 17 states. [2018-01-30 00:17:43,778 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:43,779 INFO L93 Difference]: Finished difference Result 270 states and 274 transitions. [2018-01-30 00:17:43,779 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-30 00:17:43,779 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 143 [2018-01-30 00:17:43,779 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:43,780 INFO L225 Difference]: With dead ends: 270 [2018-01-30 00:17:43,780 INFO L226 Difference]: Without dead ends: 176 [2018-01-30 00:17:43,780 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 159 GetRequests, 143 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 35 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=126, Invalid=180, Unknown=0, NotChecked=0, Total=306 [2018-01-30 00:17:43,781 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 176 states. [2018-01-30 00:17:43,798 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 176 to 173. [2018-01-30 00:17:43,798 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 173 states. [2018-01-30 00:17:43,798 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 173 states to 173 states and 175 transitions. [2018-01-30 00:17:43,799 INFO L78 Accepts]: Start accepts. Automaton has 173 states and 175 transitions. Word has length 143 [2018-01-30 00:17:43,799 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:43,799 INFO L432 AbstractCegarLoop]: Abstraction has 173 states and 175 transitions. [2018-01-30 00:17:43,799 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-30 00:17:43,799 INFO L276 IsEmpty]: Start isEmpty. Operand 173 states and 175 transitions. [2018-01-30 00:17:43,800 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2018-01-30 00:17:43,800 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:43,800 INFO L350 BasicCegarLoop]: trace histogram [13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:43,800 INFO L371 AbstractCegarLoop]: === Iteration 27 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:43,800 INFO L82 PathProgramCache]: Analyzing trace with hash 1166100038, now seen corresponding path program 5 times [2018-01-30 00:17:43,800 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:43,800 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:43,801 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:43,801 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:17:43,801 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:43,821 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:43,822 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:44,040 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:44,041 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:17:44,041 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:17:44,046 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-30 00:17:44,060 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:17:44,062 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:17:44,064 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:17:44,068 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:17:44,079 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:17:44,097 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:17:44,114 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:17:44,133 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:17:44,148 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:17:44,166 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:17:44,210 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:17:44,269 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:17:44,356 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:17:44,406 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:17:44,411 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:17:44,416 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:17:44,441 INFO L134 CoverageAnalysis]: Checked inductivity of 325 backedges. 0 proven. 325 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:44,463 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:17:44,463 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 18 [2018-01-30 00:17:44,463 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-30 00:17:44,463 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-30 00:17:44,464 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=138, Invalid=168, Unknown=0, NotChecked=0, Total=306 [2018-01-30 00:17:44,464 INFO L87 Difference]: Start difference. First operand 173 states and 175 transitions. Second operand 18 states. [2018-01-30 00:17:44,556 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:44,556 INFO L93 Difference]: Finished difference Result 274 states and 278 transitions. [2018-01-30 00:17:44,556 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-30 00:17:44,556 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 147 [2018-01-30 00:17:44,557 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:44,557 INFO L225 Difference]: With dead ends: 274 [2018-01-30 00:17:44,557 INFO L226 Difference]: Without dead ends: 180 [2018-01-30 00:17:44,558 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 164 GetRequests, 147 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 38 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=142, Invalid=200, Unknown=0, NotChecked=0, Total=342 [2018-01-30 00:17:44,558 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 180 states. [2018-01-30 00:17:44,576 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 180 to 177. [2018-01-30 00:17:44,576 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-01-30 00:17:44,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 179 transitions. [2018-01-30 00:17:44,577 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 179 transitions. Word has length 147 [2018-01-30 00:17:44,577 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:44,577 INFO L432 AbstractCegarLoop]: Abstraction has 177 states and 179 transitions. [2018-01-30 00:17:44,578 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-30 00:17:44,578 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 179 transitions. [2018-01-30 00:17:44,578 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 152 [2018-01-30 00:17:44,578 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:44,579 INFO L350 BasicCegarLoop]: trace histogram [14, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:44,579 INFO L371 AbstractCegarLoop]: === Iteration 28 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:44,579 INFO L82 PathProgramCache]: Analyzing trace with hash -443190524, now seen corresponding path program 6 times [2018-01-30 00:17:44,579 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:44,579 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:44,580 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:44,580 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:17:44,580 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:44,598 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:44,599 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:45,001 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:45,001 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:17:45,001 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:17:45,007 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-30 00:17:45,050 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 00:17:45,069 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 00:17:45,090 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 00:17:45,183 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 00:17:45,344 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 00:17:45,621 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 00:17:46,397 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 00:17:48,295 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 00:17:48,714 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 00:17:49,928 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 00:17:50,466 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 00:17:50,658 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 00:17:53,580 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 00:17:55,795 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 00:17:57,882 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-30 00:17:57,885 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:17:57,897 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:17:57,935 INFO L134 CoverageAnalysis]: Checked inductivity of 378 backedges. 0 proven. 378 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:57,959 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:17:57,959 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 19 [2018-01-30 00:17:57,960 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-30 00:17:57,960 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-30 00:17:57,960 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=155, Invalid=187, Unknown=0, NotChecked=0, Total=342 [2018-01-30 00:17:57,960 INFO L87 Difference]: Start difference. First operand 177 states and 179 transitions. Second operand 19 states. [2018-01-30 00:17:58,064 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:58,065 INFO L93 Difference]: Finished difference Result 278 states and 282 transitions. [2018-01-30 00:17:58,065 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-30 00:17:58,065 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 151 [2018-01-30 00:17:58,066 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:58,067 INFO L225 Difference]: With dead ends: 278 [2018-01-30 00:17:58,067 INFO L226 Difference]: Without dead ends: 184 [2018-01-30 00:17:58,067 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 169 GetRequests, 151 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 41 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=159, Invalid=221, Unknown=0, NotChecked=0, Total=380 [2018-01-30 00:17:58,068 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 184 states. [2018-01-30 00:17:58,097 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 184 to 181. [2018-01-30 00:17:58,097 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 181 states. [2018-01-30 00:17:58,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 181 states to 181 states and 183 transitions. [2018-01-30 00:17:58,098 INFO L78 Accepts]: Start accepts. Automaton has 181 states and 183 transitions. Word has length 151 [2018-01-30 00:17:58,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:58,099 INFO L432 AbstractCegarLoop]: Abstraction has 181 states and 183 transitions. [2018-01-30 00:17:58,099 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-30 00:17:58,099 INFO L276 IsEmpty]: Start isEmpty. Operand 181 states and 183 transitions. [2018-01-30 00:17:58,101 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-01-30 00:17:58,101 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:58,101 INFO L350 BasicCegarLoop]: trace histogram [15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:58,101 INFO L371 AbstractCegarLoop]: === Iteration 29 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:58,102 INFO L82 PathProgramCache]: Analyzing trace with hash -769060670, now seen corresponding path program 7 times [2018-01-30 00:17:58,102 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:58,102 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:58,103 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:58,103 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-30 00:17:58,103 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:58,127 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:58,128 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:17:58,404 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:58,404 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:17:58,404 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:17:58,411 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:58,465 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:58,469 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:17:58,493 INFO L134 CoverageAnalysis]: Checked inductivity of 435 backedges. 0 proven. 435 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:17:58,514 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-30 00:17:58,514 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 20 [2018-01-30 00:17:58,514 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-30 00:17:58,515 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-30 00:17:58,515 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=173, Invalid=207, Unknown=0, NotChecked=0, Total=380 [2018-01-30 00:17:58,515 INFO L87 Difference]: Start difference. First operand 181 states and 183 transitions. Second operand 20 states. [2018-01-30 00:17:58,606 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-30 00:17:58,606 INFO L93 Difference]: Finished difference Result 282 states and 286 transitions. [2018-01-30 00:17:58,607 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-30 00:17:58,607 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 155 [2018-01-30 00:17:58,607 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-30 00:17:58,608 INFO L225 Difference]: With dead ends: 282 [2018-01-30 00:17:58,608 INFO L226 Difference]: Without dead ends: 188 [2018-01-30 00:17:58,608 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 174 GetRequests, 155 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 44 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=177, Invalid=243, Unknown=0, NotChecked=0, Total=420 [2018-01-30 00:17:58,609 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 188 states. [2018-01-30 00:17:58,627 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 188 to 185. [2018-01-30 00:17:58,627 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 185 states. [2018-01-30 00:17:58,628 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 187 transitions. [2018-01-30 00:17:58,628 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 187 transitions. Word has length 155 [2018-01-30 00:17:58,628 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-30 00:17:58,628 INFO L432 AbstractCegarLoop]: Abstraction has 185 states and 187 transitions. [2018-01-30 00:17:58,628 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-30 00:17:58,628 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 187 transitions. [2018-01-30 00:17:58,629 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 160 [2018-01-30 00:17:58,629 INFO L342 BasicCegarLoop]: Found error trace [2018-01-30 00:17:58,629 INFO L350 BasicCegarLoop]: trace histogram [16, 16, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-30 00:17:58,630 INFO L371 AbstractCegarLoop]: === Iteration 30 === [ldv_kref_initErr0RequiresViolation, ldv_kref_initErr1RequiresViolation, ldv_kobject_createErr0RequiresViolation, ldv_kobject_createErr1RequiresViolation, ldv_atomic_sub_returnErr1RequiresViolation, ldv_atomic_sub_returnErr0RequiresViolation, ldv_atomic_sub_returnErr3RequiresViolation, ldv_atomic_sub_returnErr2RequiresViolation, ldv_kobject_cleanupErr4RequiresViolation, ldv_kobject_cleanupErr2RequiresViolation, ldv_kobject_cleanupErr5RequiresViolation, ldv_kobject_cleanupErr3RequiresViolation, ldv_kobject_cleanupErr0RequiresViolation, ldv_kobject_cleanupErr1RequiresViolation, mainErr0EnsuresViolation, LDV_INIT_LIST_HEADErr1RequiresViolation, LDV_INIT_LIST_HEADErr3RequiresViolation, LDV_INIT_LIST_HEADErr2RequiresViolation, LDV_INIT_LIST_HEADErr0RequiresViolation]=== [2018-01-30 00:17:58,630 INFO L82 PathProgramCache]: Analyzing trace with hash -333734016, now seen corresponding path program 8 times [2018-01-30 00:17:58,630 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-30 00:17:58,630 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-30 00:17:58,631 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:58,631 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-30 00:17:58,631 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-30 00:17:58,705 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-30 00:17:58,706 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-30 00:18:03,749 INFO L134 CoverageAnalysis]: Checked inductivity of 496 backedges. 0 proven. 496 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-30 00:18:03,749 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-30 00:18:03,749 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /storage/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-30 00:18:03,755 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-30 00:18:03,791 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:18:03,808 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-30 00:18:03,813 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-30 00:18:03,823 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-30 00:18:04,141 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 15 treesize of output 12 [2018-01-30 00:18:04,143 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 0 select indices, 0 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 12 treesize of output 11 [2018-01-30 00:18:04,143 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:04,144 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:04,149 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:04,149 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:22, output treesize:18 [2018-01-30 00:18:04,255 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 25 treesize of output 20 [2018-01-30 00:18:04,258 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,260 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 20 treesize of output 27 [2018-01-30 00:18:04,260 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:04,265 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:04,272 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:04,272 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:31, output treesize:27 [2018-01-30 00:18:04,416 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 36 treesize of output 29 [2018-01-30 00:18:04,418 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,419 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,420 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,420 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 2 select indices, 2 select index equivalence classes, 3 disjoint index pairs (out of 1 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 29 treesize of output 52 [2018-01-30 00:18:04,421 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:04,428 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:04,436 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:04,436 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:42, output treesize:38 [2018-01-30 00:18:04,585 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 38 [2018-01-30 00:18:04,589 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,590 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,591 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,591 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,592 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,593 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,594 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 3 select indices, 3 select index equivalence classes, 6 disjoint index pairs (out of 3 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 38 treesize of output 85 [2018-01-30 00:18:04,594 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:04,607 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:04,617 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:04,617 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:53, output treesize:49 [2018-01-30 00:18:04,771 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 58 treesize of output 47 [2018-01-30 00:18:04,774 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,775 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,775 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,776 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,777 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,777 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,778 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,779 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,779 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,780 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,781 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 4 select indices, 4 select index equivalence classes, 10 disjoint index pairs (out of 6 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 47 treesize of output 126 [2018-01-30 00:18:04,781 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:04,798 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:04,808 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:04,808 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:64, output treesize:60 [2018-01-30 00:18:04,966 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 69 treesize of output 56 [2018-01-30 00:18:04,971 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,972 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,973 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,974 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,974 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,975 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,976 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,976 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,977 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,978 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,979 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,979 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,980 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,981 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,981 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:04,982 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 5 select indices, 5 select index equivalence classes, 15 disjoint index pairs (out of 10 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 56 treesize of output 175 [2018-01-30 00:18:04,983 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:05,006 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:05,018 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:05,018 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:75, output treesize:71 [2018-01-30 00:18:05,192 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 80 treesize of output 65 [2018-01-30 00:18:05,196 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,197 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,197 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,198 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,199 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,200 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,200 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,201 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,202 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,203 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,203 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,204 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,205 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,205 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,206 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,207 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,208 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,208 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,209 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,210 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,210 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,211 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 6 select indices, 6 select index equivalence classes, 21 disjoint index pairs (out of 15 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 65 treesize of output 232 [2018-01-30 00:18:05,212 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:05,252 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:05,265 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:05,266 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:86, output treesize:82 [2018-01-30 00:18:05,494 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 91 treesize of output 74 [2018-01-30 00:18:05,498 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,499 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,499 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,500 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,501 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,502 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,502 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,503 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,504 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,505 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,506 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,506 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,507 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,508 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,509 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,510 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,510 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,511 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,512 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,513 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,513 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,514 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,515 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,516 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,516 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,517 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,518 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,519 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,520 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 7 select indices, 7 select index equivalence classes, 28 disjoint index pairs (out of 21 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 74 treesize of output 297 [2018-01-30 00:18:05,521 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:05,577 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:05,592 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:05,593 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:97, output treesize:93 [2018-01-30 00:18:05,819 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 102 treesize of output 83 [2018-01-30 00:18:05,824 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,825 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,826 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,827 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,829 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,830 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,831 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,832 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,833 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,834 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,835 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,836 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,836 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,837 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,838 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,839 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,840 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,841 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,841 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,842 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,843 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,844 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,845 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,846 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,847 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,848 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,848 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,849 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,850 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,851 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,851 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,852 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,853 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,854 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,855 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,855 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:05,857 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 8 select indices, 8 select index equivalence classes, 36 disjoint index pairs (out of 28 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 83 treesize of output 370 [2018-01-30 00:18:05,858 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:05,934 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:05,952 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:05,952 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:108, output treesize:104 [2018-01-30 00:18:06,191 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 113 treesize of output 92 [2018-01-30 00:18:06,195 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,196 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,197 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,197 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,198 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,199 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,200 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,201 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,201 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,202 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,203 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,204 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,204 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,205 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,206 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,207 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,208 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,208 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,209 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,210 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,211 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,212 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,213 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,214 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,214 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,215 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,216 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,217 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,218 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,219 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,220 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,220 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,221 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,222 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,223 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,224 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,225 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,226 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,226 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,227 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,228 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,229 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,230 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,231 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,232 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,233 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 9 select indices, 9 select index equivalence classes, 45 disjoint index pairs (out of 36 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 92 treesize of output 451 [2018-01-30 00:18:06,234 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:06,345 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:06,367 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:06,367 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:119, output treesize:115 [2018-01-30 00:18:06,628 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 124 treesize of output 101 [2018-01-30 00:18:06,633 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,634 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,635 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,636 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,637 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,637 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,638 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,639 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,640 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,640 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,641 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,642 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,643 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,644 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,644 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,645 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,646 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,647 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,647 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,648 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,649 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,650 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,651 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,651 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,652 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,653 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,654 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,655 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,656 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,656 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,657 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,658 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,659 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,659 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,660 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,661 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,670 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,671 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,672 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,673 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,674 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,674 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,675 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,676 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,677 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,677 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,678 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,679 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,680 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,681 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,681 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,682 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,683 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,684 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,684 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:06,686 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 10 select indices, 10 select index equivalence classes, 55 disjoint index pairs (out of 45 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 101 treesize of output 540 [2018-01-30 00:18:06,687 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:06,831 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:06,853 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:06,854 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:130, output treesize:126 [2018-01-30 00:18:07,136 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 135 treesize of output 110 [2018-01-30 00:18:07,152 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,153 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,154 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,156 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,157 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,158 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,160 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,161 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,162 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,163 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,165 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,166 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,167 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,168 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,169 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,170 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,171 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,173 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,174 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,176 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,177 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,178 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,180 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,183 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,185 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,186 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,187 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,189 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,190 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,191 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,192 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,194 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,195 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,196 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,197 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,199 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,200 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,202 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,203 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,204 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,205 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,207 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,208 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,209 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,210 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,211 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,212 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,213 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,214 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,215 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,216 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,217 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,218 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,219 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,220 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,221 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,222 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,223 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,224 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,225 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,226 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,227 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,228 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,229 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,230 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,231 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,232 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 11 select indices, 11 select index equivalence classes, 66 disjoint index pairs (out of 55 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 110 treesize of output 637 [2018-01-30 00:18:07,234 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:07,419 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:07,445 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:07,445 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:141, output treesize:137 [2018-01-30 00:18:07,751 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 119 [2018-01-30 00:18:07,755 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,756 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,757 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,758 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,758 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,759 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,760 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,760 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,761 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,762 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,762 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,763 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,763 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,764 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,765 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,765 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,766 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,767 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,767 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,768 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,769 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,769 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,770 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,770 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,771 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,772 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,772 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,773 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,774 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,774 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,775 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,775 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,776 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,777 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,777 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,778 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,779 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,779 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,780 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,781 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,781 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,782 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,783 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,783 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,784 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,785 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,785 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,786 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,787 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,787 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,788 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,788 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,789 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,790 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,790 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,791 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,792 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,792 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,793 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,793 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,794 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,795 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,795 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,796 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,797 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,797 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,798 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,798 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,799 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,800 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,800 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,801 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,802 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,802 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,803 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,803 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,804 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,805 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:07,807 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 12 select indices, 12 select index equivalence classes, 78 disjoint index pairs (out of 66 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 119 treesize of output 742 [2018-01-30 00:18:07,808 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:08,053 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:08,081 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:08,082 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:152, output treesize:148 [2018-01-30 00:18:08,411 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 157 treesize of output 128 [2018-01-30 00:18:08,417 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,418 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,419 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,420 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,421 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,422 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,423 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,424 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,425 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,427 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,428 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,429 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,430 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,432 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,433 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,434 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,435 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,436 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,437 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,438 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,439 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,441 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,442 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,443 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,444 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,445 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,446 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,447 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,448 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,449 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,450 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,451 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,452 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,453 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,454 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,455 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,457 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,458 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,459 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,460 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,461 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,462 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,463 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,464 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,465 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,466 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,467 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,468 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,469 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,469 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,470 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,471 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,472 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,473 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,474 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,476 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,477 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,478 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,479 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,480 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,480 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,482 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,483 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,484 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,485 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,486 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,487 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,488 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,489 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,490 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,491 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,492 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,493 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,494 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,495 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,496 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,497 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,498 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,499 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,500 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,501 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,502 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,503 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,504 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,505 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,506 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,507 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,508 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,510 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,511 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,512 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:08,514 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 13 select indices, 13 select index equivalence classes, 91 disjoint index pairs (out of 78 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 128 treesize of output 855 [2018-01-30 00:18:08,516 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:08,817 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:08,848 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-2 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:08,848 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 1 variables, input treesize:163, output treesize:159 [2018-01-30 00:18:09,226 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 168 treesize of output 137 [2018-01-30 00:18:09,232 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,233 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,234 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,235 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,237 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,238 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,239 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,240 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,241 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,241 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,242 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,243 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,244 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,245 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,246 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,247 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,247 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,248 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,249 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,249 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,250 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,251 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,251 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,252 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,253 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,253 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,254 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,255 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,256 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,256 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,257 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,258 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,258 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,259 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,260 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,260 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,261 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,262 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,263 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,263 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,264 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,265 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,265 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,266 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,267 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,267 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,268 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,269 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,269 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,270 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,271 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,271 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,272 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,273 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,273 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,274 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,275 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,275 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,276 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,277 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,278 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,279 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,279 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,280 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,281 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,282 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,282 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,283 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,284 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,285 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,285 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,286 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,287 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,287 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,288 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,289 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,290 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,290 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,291 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,292 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,292 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,293 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,294 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,294 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,295 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,296 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,297 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,297 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,298 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,299 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,299 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,300 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,301 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,301 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,302 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,303 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,303 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,304 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,305 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,306 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,306 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,307 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,308 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,308 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,309 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:09,311 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 14 select indices, 14 select index equivalence classes, 105 disjoint index pairs (out of 91 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 137 treesize of output 976 [2018-01-30 00:18:09,313 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:09,695 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:09,731 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-30 00:18:09,731 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:179, output treesize:175 [2018-01-30 00:18:10,184 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 0 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 179 treesize of output 146 [2018-01-30 00:18:10,192 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,193 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,195 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,196 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,197 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,199 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,200 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,201 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,203 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,204 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,205 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,206 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,208 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,209 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,210 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,211 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,212 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,213 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,214 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,215 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,216 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,217 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,219 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,220 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,221 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,221 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,223 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,224 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,225 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,226 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,227 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,228 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,229 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,230 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,231 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,232 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,233 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,234 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,235 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,236 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,238 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,239 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,240 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,241 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,242 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,243 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,244 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,245 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,247 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,248 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,248 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,250 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,251 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,252 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,253 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,254 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,255 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,257 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,258 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,259 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,260 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,261 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,262 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,264 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,265 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,266 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,267 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,269 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,270 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,271 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,272 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,273 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,274 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,276 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,277 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,279 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,280 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,281 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,282 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,284 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,285 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,286 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,287 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,289 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,290 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,291 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,292 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,293 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,294 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,295 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,296 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,298 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,299 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,300 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,302 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,303 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,304 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,305 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,307 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,308 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,309 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,310 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,311 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,313 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,314 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,316 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,316 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,318 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,319 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,320 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,321 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,322 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,323 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,325 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,326 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,327 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,328 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,329 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,330 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,332 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:10,332 INFO L303 Elim1Store]: Index analysis took 144 ms [2018-01-30 00:18:10,335 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 15 select indices, 15 select index equivalence classes, 120 disjoint index pairs (out of 105 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 146 treesize of output 1105 [2018-01-30 00:18:10,338 INFO L267 ElimStorePlain]: Start of recursive call 3: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:10,785 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: and 1 xjuncts. [2018-01-30 00:18:10,827 INFO L267 ElimStorePlain]: Start of recursive call 1: 3 dim-0 vars, 1 dim-2 vars, End of recursive call: 3 dim-0 vars, and 1 xjuncts. [2018-01-30 00:18:10,827 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 4 variables, input treesize:195, output treesize:191 [2018-01-30 00:18:20,947 WARN L143 SmtUtils]: Spent 1211ms on a formula simplification that was a NOOP. DAG size: 80 [2018-01-30 00:18:23,149 WARN L143 SmtUtils]: Spent 2027ms on a formula simplification that was a NOOP. DAG size: 78 [2018-01-30 00:18:23,275 WARN L1033 $PredicateComparison]: unable to prove that (exists ((ldv_kref_init_~kref.offset Int)) (and (= |c_#memory_$Pointer$.offset| (store |c_old(#memory_$Pointer$.offset)| |c_ldv_kref_init_#in~kref.base| (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_kref_init_#in~kref.base|) ldv_kref_init_~kref.offset (select (select |c_#memory_$Pointer$.offset| |c_ldv_kref_init_#in~kref.base|) ldv_kref_init_~kref.offset)))) (<= |c_ldv_kref_init_#in~kref.offset| ldv_kref_init_~kref.offset))) is different from true [2018-01-30 00:18:23,642 INFO L267 ElimStorePlain]: Start of recursive call 3: 1 dim-0 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-30 00:18:23,644 INFO L267 ElimStorePlain]: Start of recursive call 2: 1 dim-1 vars, End of recursive call: 1 dim-0 vars, and 1 xjuncts. [2018-01-30 00:18:23,649 INFO L267 ElimStorePlain]: Start of recursive call 1: 1 dim-0 vars, 1 dim-2 vars, End of recursive call: 2 dim-0 vars, and 1 xjuncts. [2018-01-30 00:18:23,649 INFO L202 ElimStorePlain]: Needed 3 recursive calls to eliminate 2 variables, input treesize:43, output treesize:31 [2018-01-30 00:18:23,652 WARN L1033 $PredicateComparison]: unable to prove that (exists ((ldv_kref_init_~kref.offset Int) (v_DerPreprocessor_2 Int)) (and (= (store |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_internal_#in~kobj.base| (let ((.cse0 (+ |c_ldv_kobject_init_internal_#in~kobj.offset| 4))) (store (store (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_internal_#in~kobj.base|) ldv_kref_init_~kref.offset v_DerPreprocessor_2) .cse0 .cse0) (+ |c_ldv_kobject_init_internal_#in~kobj.offset| 8) .cse0))) |c_#memory_$Pointer$.offset|) (<= (+ |c_ldv_kobject_init_internal_#in~kobj.offset| 12) ldv_kref_init_~kref.offset))) is different from true [2018-01-30 00:18:23,658 WARN L1033 $PredicateComparison]: unable to prove that (exists ((ldv_kref_init_~kref.offset Int) (v_DerPreprocessor_2 Int)) (and (<= (+ |c_ldv_kobject_init_#in~kobj.offset| 12) ldv_kref_init_~kref.offset) (= (store |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_#in~kobj.base| (let ((.cse0 (+ |c_ldv_kobject_init_#in~kobj.offset| 4))) (store (store (store (select |c_old(#memory_$Pointer$.offset)| |c_ldv_kobject_init_#in~kobj.base|) ldv_kref_init_~kref.offset v_DerPreprocessor_2) .cse0 .cse0) (+ |c_ldv_kobject_init_#in~kobj.offset| 8) .cse0))) |c_#memory_$Pointer$.offset|))) is different from true [2018-01-30 00:18:23,671 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,672 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 2, 1 stores, 1 select indices, 1 select index equivalence classes, 1 disjoint index pairs (out of 0 index pairs), introduced 1 new quantified variables, introduced 0 case distinctions, treesize of input 168 treesize of output 154 [2018-01-30 00:18:23,682 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,683 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,684 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,685 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,686 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,687 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,688 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,689 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,691 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,692 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,693 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,694 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,695 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,696 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,697 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,698 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,699 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,700 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,701 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,701 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,702 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,703 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,704 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,706 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,706 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,707 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,708 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,709 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,709 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,710 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,711 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,711 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,712 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,713 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,714 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,714 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,715 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,716 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,716 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,717 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,718 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,718 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,719 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,720 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,721 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,721 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,722 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,723 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,723 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,724 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,725 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,726 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,726 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,727 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,728 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,728 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,729 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,730 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,730 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,731 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,732 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,733 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,733 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,734 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,735 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,735 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,736 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,737 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,737 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,738 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,739 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,739 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,740 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,741 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,742 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,742 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,744 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,745 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,745 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,746 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,747 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,747 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,748 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,750 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,750 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,752 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,753 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,754 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,754 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,755 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,756 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,756 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,758 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,759 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,760 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,760 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,761 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,762 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,762 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,763 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,764 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,765 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,766 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,767 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,768 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,769 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,770 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,770 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,771 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,773 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,775 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,775 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,776 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,777 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,778 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,779 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,780 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,781 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,781 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,782 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,783 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,784 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,784 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,785 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,786 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,787 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,788 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,789 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,790 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,791 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,791 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,792 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,793 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,794 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,794 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,795 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,796 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,796 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,797 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,798 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,799 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,800 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:23,828 INFO L303 Elim1Store]: Index analysis took 151 ms [2018-01-30 00:18:24,012 INFO L477 Elim1Store]: Elim1 applied some preprocessing eliminated variable of array dimension 1, 1 stores, 17 select indices, 17 select index equivalence classes, 143 disjoint index pairs (out of 136 index pairs), introduced 3 new quantified variables, introduced 16 case distinctions, treesize of input 154 treesize of output 1286 [2018-01-30 00:18:24,013 WARN L130 XnfTransformerHelper]: expecting exponential blowup for input size 9 [2018-01-30 00:18:24,187 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,189 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,190 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,192 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,194 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,198 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,199 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,201 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,203 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,205 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,206 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,208 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,209 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,211 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,213 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,214 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,216 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,218 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,219 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,221 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,223 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,225 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,226 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,229 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,230 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,232 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,234 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,236 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,237 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,239 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,244 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,246 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,248 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,249 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,251 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,253 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,255 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,257 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,259 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,260 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,262 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,264 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,265 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,267 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,268 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,270 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,271 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,272 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,274 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,275 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,276 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,278 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,279 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,280 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,282 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,283 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,285 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,286 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,287 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,289 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,290 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,292 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,293 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,295 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,296 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,297 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,299 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,300 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,302 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,303 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,304 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,306 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,308 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,309 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,313 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,314 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,316 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,317 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,318 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,320 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,321 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,323 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,324 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,326 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,328 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,330 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,331 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,333 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,334 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,336 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,337 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,338 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,340 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,341 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,343 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,344 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,346 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,347 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,348 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,350 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,351 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,353 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,354 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,355 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,357 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,358 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,359 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,361 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,362 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,364 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,365 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,366 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,370 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:24,407 INFO L303 Elim1Store]: Index analysis took 244 ms [2018-01-30 00:18:24,423 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 17 select indices, 17 select index equivalence classes, 155 disjoint index pairs (out of 136 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 1216 treesize of output 1267 [2018-01-30 00:18:26,131 WARN L146 SmtUtils]: Spent 1702ms on a formula simplification. DAG size of input: 274 DAG size of output 205 [2018-01-30 00:18:26,138 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,138 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,139 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,140 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,140 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,141 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,142 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,142 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,143 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,144 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,144 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,145 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,146 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,146 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,147 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,147 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,148 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,149 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,149 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,150 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,151 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,151 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,152 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,153 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,153 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,154 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,154 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,155 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,156 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,156 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,157 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,158 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,158 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,159 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,160 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,160 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,161 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,161 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,162 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,163 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,163 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,164 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,165 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,165 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,166 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,167 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,167 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,168 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,169 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,169 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,170 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,171 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,171 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,172 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,173 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,173 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,174 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,174 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,175 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,176 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,176 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,177 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,178 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,178 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,179 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,180 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,181 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,182 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,183 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,183 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,184 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,185 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,185 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,186 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,187 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,187 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,188 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,189 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,189 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,190 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,191 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,192 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,192 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,193 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,194 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,194 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,195 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,196 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,196 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,197 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,198 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,198 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,199 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,200 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,201 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,202 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,202 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,203 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,204 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,205 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,205 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,206 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,207 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,207 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,208 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,209 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:26,230 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 17 select indices, 17 select index equivalence classes, 121 disjoint index pairs (out of 136 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 314 treesize of output 1315 [2018-01-30 00:18:26,232 INFO L267 ElimStorePlain]: Start of recursive call 5: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:27,168 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,169 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,170 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,170 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,171 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,172 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,172 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,173 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,174 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,175 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,176 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,177 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,177 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,178 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,179 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,180 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,180 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,181 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,182 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,182 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,183 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,184 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,184 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,185 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,186 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,186 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,187 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,187 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,188 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,189 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,189 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,190 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,191 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,191 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,192 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,193 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,193 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,194 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,195 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,195 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,196 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,197 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,197 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,198 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,199 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,199 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,200 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,201 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,201 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,202 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,203 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,203 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,204 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,205 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,205 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,206 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,207 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,207 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,208 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,209 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,209 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,210 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,211 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,211 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,212 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,213 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,213 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,214 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,215 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,215 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,216 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,216 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,217 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,218 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,218 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,219 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,220 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,220 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,221 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,222 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,222 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,223 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,224 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,225 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,225 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,226 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,227 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,227 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,228 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,229 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,230 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,230 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,231 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,232 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,232 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,233 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,233 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,234 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,235 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,235 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,236 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,237 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,238 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,238 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,239 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,240 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,240 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,243 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,244 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,245 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,246 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,246 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,247 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,247 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,248 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,248 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,249 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,250 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,250 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,251 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,252 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:18:27,265 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 121 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 138 treesize of output 1151 [2018-01-30 00:18:27,267 INFO L267 ElimStorePlain]: Start of recursive call 6: End of recursive call: and 1 xjuncts. [2018-01-30 00:18:27,733 INFO L267 ElimStorePlain]: Start of recursive call 4: 2 dim-1 vars, End of recursive call: and 2 xjuncts. [2018-01-30 00:19:02,971 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:02,973 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:02,975 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:02,978 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:02,980 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:02,985 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:02,988 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:02,990 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:02,991 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:02,993 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:02,995 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:02,996 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:02,998 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:02,999 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,000 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,002 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,003 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,005 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,006 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,010 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,012 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,014 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,015 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,017 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,019 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,020 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,022 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,024 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,026 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,028 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,029 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,033 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,035 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,037 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,040 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,041 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,042 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,045 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,047 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,049 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,051 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,053 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,054 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,056 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,058 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,059 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,061 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,062 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,064 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,066 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,067 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,070 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,072 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,073 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,074 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,076 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,078 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,081 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,082 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,084 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,085 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,086 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,089 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,091 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,093 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,095 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,096 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,097 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,099 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,100 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,101 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,103 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,105 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,106 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,108 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,110 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,116 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,118 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,120 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,122 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,124 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,126 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,128 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,130 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,133 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,135 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,137 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,138 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,140 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,146 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,148 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,149 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,151 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,153 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,155 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,156 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,160 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,161 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,163 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,164 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,166 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,167 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,169 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,170 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,172 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,173 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,175 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,176 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,177 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,179 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,180 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,181 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,183 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,184 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,186 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,187 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,188 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,190 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,191 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,192 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,194 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,195 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,197 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,198 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,200 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,201 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,203 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,205 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,206 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,207 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,208 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,210 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,212 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,213 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,217 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:03,262 INFO L303 Elim1Store]: Index analysis took 297 ms [2018-01-30 00:19:03,277 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 17 select indices, 17 select index equivalence classes, 135 disjoint index pairs (out of 136 index pairs), introduced 1 new quantified variables, introduced 2 case distinctions, treesize of input 158 treesize of output 1140 [2018-01-30 00:19:05,052 WARN L146 SmtUtils]: Spent 1768ms on a formula simplification. DAG size of input: 265 DAG size of output 203 [2018-01-30 00:19:05,062 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,063 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,064 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,065 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,066 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,067 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,068 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,069 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,070 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,071 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,072 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,073 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,074 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,075 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,076 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,077 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,077 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,078 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,079 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,080 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,081 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,082 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,083 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,084 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,085 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,086 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,087 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,088 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,089 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,090 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,091 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,092 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,093 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,093 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,094 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,095 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,096 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,097 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,098 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,099 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,100 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,101 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,102 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,103 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,104 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,105 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,106 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,106 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,107 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,108 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,109 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,110 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,111 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,112 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,113 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,114 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,115 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,116 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,117 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,118 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,119 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,120 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,121 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,121 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,122 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,123 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,124 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,125 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,126 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,127 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,128 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,129 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,130 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,131 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,132 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,133 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,134 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,135 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,136 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,137 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,138 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,139 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,140 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,141 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,142 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,143 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,144 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,145 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,146 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,146 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,147 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,148 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,149 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,150 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,151 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,152 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,153 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,154 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,155 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,156 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,157 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,157 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,158 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,159 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,160 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,161 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,162 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,163 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,164 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,165 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,166 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,167 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,168 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,169 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,169 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,170 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,171 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,172 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,173 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:05,196 INFO L303 Elim1Store]: Index analysis took 138 ms [2018-01-30 00:19:05,199 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 127 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 305 treesize of output 1351 [2018-01-30 00:19:05,201 INFO L267 ElimStorePlain]: Start of recursive call 8: End of recursive call: and 1 xjuncts. [2018-01-30 00:19:06,101 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,102 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,133 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,133 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,134 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,135 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,135 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,136 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,137 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,138 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,138 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,139 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,139 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,140 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,141 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,141 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,142 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,143 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,143 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,144 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,145 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,145 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,146 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,148 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,149 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,149 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,150 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,151 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,152 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,153 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,153 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,154 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,155 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,155 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,156 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,157 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,157 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,158 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,159 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,159 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,160 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,160 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,161 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,161 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,162 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,163 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,164 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,164 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,165 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,166 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,166 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,167 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,168 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,168 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,169 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,170 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,170 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,171 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,172 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,172 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,173 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,174 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,174 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,175 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,176 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,176 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,177 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,178 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,178 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,179 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,180 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,180 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,181 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,181 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,182 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,183 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,184 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,184 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,185 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,186 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,186 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,187 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,188 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,188 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,189 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,190 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,190 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,191 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,192 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,193 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,193 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,194 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,195 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,195 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,196 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,196 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,197 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,198 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,198 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,199 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,199 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,200 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,201 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,201 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,202 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,202 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,203 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,204 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,204 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,205 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,206 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,206 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,207 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,207 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,208 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,208 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,209 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,210 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,210 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,211 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,212 INFO L700 Elim1Store]: detected not equals via solver [2018-01-30 00:19:06,223 INFO L303 Elim1Store]: Index analysis took 124 ms [2018-01-30 00:19:06,224 INFO L477 Elim1Store]: Elim1 did not use preprocessing eliminated variable of array dimension 1, 1 stores, 16 select indices, 16 select index equivalence classes, 121 disjoint index pairs (out of 120 index pairs), introduced 0 new quantified variables, introduced 0 case distinctions, treesize of input 135 treesize of output 1097 [2018-01-30 00:19:06,226 INFO L267 ElimStorePlain]: Start of recursive call 9: End of recursive call: and 1 xjuncts. [2018-01-30 00:19:06,670 INFO L267 ElimStorePlain]: Start of recursive call 7: 2 dim-1 vars, End of recursive call: and 2 xjuncts. Received shutdown request... [2018-01-30 00:19:16,625 INFO L175 TraceCheckSpWp]: Timeout while computing interpolants [2018-01-30 00:19:16,625 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-30 00:19:16,629 WARN L185 ceAbstractionStarter]: Timeout [2018-01-30 00:19:16,629 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 30.01 12:19:16 BoogieIcfgContainer [2018-01-30 00:19:16,629 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-30 00:19:16,630 INFO L168 Benchmark]: Toolchain (without parser) took 132803.87 ms. Allocated memory was 305.7 MB in the beginning and 812.1 MB in the end (delta: 506.5 MB). Free memory was 264.7 MB in the beginning and 758.1 MB in the end (delta: -493.4 MB). Peak memory consumption was 709.3 MB. Max. memory is 5.3 GB. [2018-01-30 00:19:16,630 INFO L168 Benchmark]: CDTParser took 0.18 ms. Allocated memory is still 305.7 MB. Free memory is still 271.7 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-30 00:19:16,631 INFO L168 Benchmark]: CACSL2BoogieTranslator took 243.07 ms. Allocated memory is still 305.7 MB. Free memory was 264.7 MB in the beginning and 250.7 MB in the end (delta: 14.0 MB). Peak memory consumption was 14.0 MB. Max. memory is 5.3 GB. [2018-01-30 00:19:16,631 INFO L168 Benchmark]: Boogie Preprocessor took 42.12 ms. Allocated memory is still 305.7 MB. Free memory was 250.7 MB in the beginning and 248.7 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. [2018-01-30 00:19:16,631 INFO L168 Benchmark]: RCFGBuilder took 473.11 ms. Allocated memory is still 305.7 MB. Free memory was 248.7 MB in the beginning and 214.9 MB in the end (delta: 33.8 MB). Peak memory consumption was 33.8 MB. Max. memory is 5.3 GB. [2018-01-30 00:19:16,632 INFO L168 Benchmark]: TraceAbstraction took 132037.20 ms. Allocated memory was 305.7 MB in the beginning and 812.1 MB in the end (delta: 506.5 MB). Free memory was 214.9 MB in the beginning and 758.1 MB in the end (delta: -543.1 MB). Peak memory consumption was 659.5 MB. Max. memory is 5.3 GB. [2018-01-30 00:19:16,633 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.18 ms. Allocated memory is still 305.7 MB. Free memory is still 271.7 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 243.07 ms. Allocated memory is still 305.7 MB. Free memory was 264.7 MB in the beginning and 250.7 MB in the end (delta: 14.0 MB). Peak memory consumption was 14.0 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 42.12 ms. Allocated memory is still 305.7 MB. Free memory was 250.7 MB in the beginning and 248.7 MB in the end (delta: 2.0 MB). Peak memory consumption was 2.0 MB. Max. memory is 5.3 GB. * RCFGBuilder took 473.11 ms. Allocated memory is still 305.7 MB. Free memory was 248.7 MB in the beginning and 214.9 MB in the end (delta: 33.8 MB). Peak memory consumption was 33.8 MB. Max. memory is 5.3 GB. * TraceAbstraction took 132037.20 ms. Allocated memory was 305.7 MB in the beginning and 812.1 MB in the end (delta: 506.5 MB). Free memory was 214.9 MB in the beginning and 758.1 MB in the end (delta: -543.1 MB). Peak memory consumption was 659.5 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 678. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1294). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 678. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 678. - TimeoutResultAtElement [Line: -1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1411). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 678. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 678. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1265). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 678. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 678. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1267). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 678. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 678. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 678. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1344). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 678. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that free always succeeds (line 1340). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 678. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 678. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1339). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 678. - TimeoutResultAtElement [Line: 1441]: Timeout (TraceAbstraction) Unable to prove that all allocated memory was freed (line 1441). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 678. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 678. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 678. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1100). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 678. - TimeoutResultAtElement [Line: 1]: Timeout (TraceAbstraction) Unable to prove that pointer dereference always succeeds (line 1099). Cancelled while BasicCegarLoop was analyzing trace of length 160 with TraceHistMax 16, while TraceCheckSpWp was constructing forward predicates, while PartialQuantifierElimination was eliminating quantifiers from formula with 0 quantifier alternations, while SimplifyDDAWithTimeout was simplifying term of DAG size 678. - StatisticsResult: Ultimate Automizer benchmark data CFG has 18 procedures, 146 locations, 19 error locations. TIMEOUT Result, 131.9s OverallTime, 30 OverallIterations, 16 TraceHistogramMax, 26.3s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 3626 SDtfs, 1518 SDslu, 31751 SDs, 0 SdLazy, 7856 SolverSat, 219 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 5.2s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 2060 GetRequests, 1574 SyntacticMatches, 5 SemanticMatches, 481 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 2258 ImplicationChecksByTransitivity, 26.6s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=185occurred in iteration=29, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.4s AutomataMinimizationTime, 29 MinimizatonAttempts, 83 StatesRemovedByMinimization, 22 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.2s SsaConstructionTime, 16.2s SatisfiabilityAnalysisTime, 9.6s InterpolantComputationTime, 4012 NumberOfCodeBlocks, 3932 NumberOfCodeBlocksAsserted, 84 NumberOfCheckSat, 3968 ConstructedInterpolants, 260 QuantifiedInterpolants, 1544938 SizeOfPredicates, 81 NumberOfNonLiveVariables, 5464 ConjunctsInSsa, 395 ConjunctsInUnsatCore, 44 InterpolantComputations, 18 PerfectInterpolantSequences, 506/5006 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_1_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-30_00-19-16-642.csv Written .csv to /storage/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/memleaks_test22_1_true-valid-memsafety_true-termination.i_svcomp-DerefFreeMemtrack-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-30_00-19-16-642.csv Completed graceful shutdown