java -Xmx6000000000 -jar ./plugins/org.eclipse.equinox.launcher_1.3.100.v20150511-1540.jar -data ./data --generate-csv --csv-dir ../../../releaseScripts/default/UAutomizer-linux/csv -tc ../../../trunk/examples/toolchains/AutomizerC.xml -s ../../../trunk/examples/settings/ai/eq-bench/svcomp-Reach-32bit-Automizer_Camel+AI_EQ_SS.epf -i ../../../trunk/examples/svcomp/array-examples/standard_init2_true-unreach-call_ground.i -------------------------------------------------------------------------------- This is Ultimate 0.1.23-1cceb4a-m [2018-01-29 23:38:46,870 INFO L170 SettingsManager]: Resetting all preferences to default values... [2018-01-29 23:38:46,871 INFO L174 SettingsManager]: Resetting UltimateCore preferences to default values [2018-01-29 23:38:46,880 INFO L177 SettingsManager]: Ultimate Commandline Interface provides no preferences, ignoring... [2018-01-29 23:38:46,880 INFO L174 SettingsManager]: Resetting Boogie Preprocessor preferences to default values [2018-01-29 23:38:46,881 INFO L174 SettingsManager]: Resetting Boogie Procedure Inliner preferences to default values [2018-01-29 23:38:46,881 INFO L174 SettingsManager]: Resetting Abstract Interpretation preferences to default values [2018-01-29 23:38:46,882 INFO L174 SettingsManager]: Resetting LassoRanker preferences to default values [2018-01-29 23:38:46,883 INFO L174 SettingsManager]: Resetting Reaching Definitions preferences to default values [2018-01-29 23:38:46,884 INFO L174 SettingsManager]: Resetting SyntaxChecker preferences to default values [2018-01-29 23:38:46,884 INFO L177 SettingsManager]: Büchi Program Product provides no preferences, ignoring... [2018-01-29 23:38:46,885 INFO L174 SettingsManager]: Resetting LTL2Aut preferences to default values [2018-01-29 23:38:46,885 INFO L174 SettingsManager]: Resetting BlockEncodingV2 preferences to default values [2018-01-29 23:38:46,886 INFO L174 SettingsManager]: Resetting AutomataScriptInterpreter preferences to default values [2018-01-29 23:38:46,886 INFO L174 SettingsManager]: Resetting BuchiAutomizer preferences to default values [2018-01-29 23:38:46,888 INFO L174 SettingsManager]: Resetting CACSL2BoogieTranslator preferences to default values [2018-01-29 23:38:46,889 INFO L174 SettingsManager]: Resetting CodeCheck preferences to default values [2018-01-29 23:38:46,889 INFO L174 SettingsManager]: Resetting InvariantSynthesis preferences to default values [2018-01-29 23:38:46,890 INFO L174 SettingsManager]: Resetting RCFGBuilder preferences to default values [2018-01-29 23:38:46,891 INFO L174 SettingsManager]: Resetting TraceAbstraction preferences to default values [2018-01-29 23:38:46,892 INFO L177 SettingsManager]: TraceAbstractionConcurrent provides no preferences, ignoring... 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[2018-01-29 23:38:46,895 INFO L98 SettingsManager]: Beginning loading settings from /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/settings/ai/eq-bench/svcomp-Reach-32bit-Automizer_Camel+AI_EQ_SS.epf [2018-01-29 23:38:46,900 INFO L110 SettingsManager]: Loading preferences was successful [2018-01-29 23:38:46,900 INFO L112 SettingsManager]: Preferences different from defaults after loading the file: [2018-01-29 23:38:46,901 INFO L131 SettingsManager]: Preferences of Boogie Procedure Inliner differ from their defaults: [2018-01-29 23:38:46,901 INFO L133 SettingsManager]: * to procedures, called more than once=true [2018-01-29 23:38:46,901 INFO L131 SettingsManager]: Preferences of Abstract Interpretation differ from their defaults: [2018-01-29 23:38:46,901 INFO L133 SettingsManager]: * Abstract domain for RCFG-of-the-future=VPDomain [2018-01-29 23:38:46,901 INFO L133 SettingsManager]: * Use the RCFG-of-the-future interface=true [2018-01-29 23:38:46,901 INFO L131 SettingsManager]: Preferences of CACSL2BoogieTranslator differ from their defaults: [2018-01-29 23:38:46,901 INFO L133 SettingsManager]: * sizeof long=4 [2018-01-29 23:38:46,901 INFO L133 SettingsManager]: * Overapproximate operations on floating types=true [2018-01-29 23:38:46,902 INFO L133 SettingsManager]: * sizeof POINTER=4 [2018-01-29 23:38:46,902 INFO L133 SettingsManager]: * Check division by zero=IGNORE [2018-01-29 23:38:46,902 INFO L133 SettingsManager]: * Pointer to allocated memory at dereference=IGNORE [2018-01-29 23:38:46,902 INFO L133 SettingsManager]: * If two pointers are subtracted or compared they have the same base address=IGNORE [2018-01-29 23:38:46,902 INFO L133 SettingsManager]: * Check array bounds for arrays that are off heap=IGNORE [2018-01-29 23:38:46,902 INFO L133 SettingsManager]: * sizeof long double=12 [2018-01-29 23:38:46,902 INFO L133 SettingsManager]: * Check if freed pointer was valid=false [2018-01-29 23:38:46,902 INFO L133 SettingsManager]: * Pointer base address is valid at dereference=IGNORE [2018-01-29 23:38:46,902 INFO L131 SettingsManager]: Preferences of RCFGBuilder differ from their defaults: [2018-01-29 23:38:46,902 INFO L133 SettingsManager]: * Size of a code block=SingleStatement [2018-01-29 23:38:46,902 INFO L133 SettingsManager]: * To the following directory=./dump/ [2018-01-29 23:38:46,903 INFO L133 SettingsManager]: * Add additional assume for each assert=false [2018-01-29 23:38:46,903 INFO L133 SettingsManager]: * SMT solver=External_DefaultMode [2018-01-29 23:38:46,906 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-29 23:38:46,907 INFO L131 SettingsManager]: Preferences of TraceAbstraction differ from their defaults: [2018-01-29 23:38:46,907 INFO L133 SettingsManager]: * Interpolant automaton=TWOTRACK [2018-01-29 23:38:46,907 INFO L133 SettingsManager]: * Compute Interpolants along a Counterexample=FPandBP [2018-01-29 23:38:46,907 INFO L133 SettingsManager]: * Positions where we compute the Hoare Annotation=LoopsAndPotentialCycles [2018-01-29 23:38:46,907 INFO L133 SettingsManager]: * Trace refinement strategy=CAMEL [2018-01-29 23:38:46,907 INFO L133 SettingsManager]: * SMT solver=External_ModelsAndUnsatCoreMode [2018-01-29 23:38:46,907 INFO L133 SettingsManager]: * Command for external solver=z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in [2018-01-29 23:38:46,907 INFO L133 SettingsManager]: * Compute Hoare Annotation of negated interpolant automaton, abstraction and CFG=true [2018-01-29 23:38:46,908 INFO L131 SettingsManager]: Preferences of IcfgTransformer differ from their defaults: [2018-01-29 23:38:46,908 INFO L133 SettingsManager]: * TransformationType=HEAP_SEPARATOR [2018-01-29 23:38:46,932 INFO L81 nceAwareModelManager]: Repository-Root is: /tmp [2018-01-29 23:38:46,938 INFO L266 ainManager$Toolchain]: [Toolchain 1]: Parser(s) successfully initialized [2018-01-29 23:38:46,940 INFO L222 ainManager$Toolchain]: [Toolchain 1]: Toolchain data selected. [2018-01-29 23:38:46,941 INFO L271 PluginConnector]: Initializing CDTParser... [2018-01-29 23:38:46,941 INFO L276 PluginConnector]: CDTParser initialized [2018-01-29 23:38:46,941 INFO L431 ainManager$Toolchain]: [Toolchain 1]: Parsing single file: /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/../../../trunk/examples/svcomp/array-examples/standard_init2_true-unreach-call_ground.i [2018-01-29 23:38:47,008 INFO L304 ainManager$Toolchain]: ####################### [Toolchain 1] ####################### [2018-01-29 23:38:47,008 INFO L131 ToolchainWalker]: Walking toolchain with 4 elements. [2018-01-29 23:38:47,009 INFO L113 PluginConnector]: ------------------------CACSL2BoogieTranslator---------------------------- [2018-01-29 23:38:47,009 INFO L271 PluginConnector]: Initializing CACSL2BoogieTranslator... [2018-01-29 23:38:47,013 INFO L276 PluginConnector]: CACSL2BoogieTranslator initialized [2018-01-29 23:38:47,014 INFO L185 PluginConnector]: Executing the observer ACSLObjectContainerObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 29.01 11:38:47" (1/1) ... [2018-01-29 23:38:47,016 INFO L205 PluginConnector]: Invalid model from CACSL2BoogieTranslator for observer de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator.ACSLObjectContainerObserver@575e8500 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.01 11:38:47, skipping insertion in model container [2018-01-29 23:38:47,016 INFO L185 PluginConnector]: Executing the observer CACSL2BoogieTranslatorObserver from plugin CACSL2BoogieTranslator for "CDTParser AST 29.01 11:38:47" (1/1) ... [2018-01-29 23:38:47,027 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-29 23:38:47,037 INFO L153 Dispatcher]: Using SV-COMP mode [2018-01-29 23:38:47,120 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-29 23:38:47,129 INFO L450 PostProcessor]: Settings: Checked method=main [2018-01-29 23:38:47,132 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.01 11:38:47 WrapperNode [2018-01-29 23:38:47,132 INFO L132 PluginConnector]: ------------------------ END CACSL2BoogieTranslator---------------------------- [2018-01-29 23:38:47,133 INFO L113 PluginConnector]: ------------------------Boogie Preprocessor---------------------------- [2018-01-29 23:38:47,133 INFO L271 PluginConnector]: Initializing Boogie Preprocessor... [2018-01-29 23:38:47,134 INFO L276 PluginConnector]: Boogie Preprocessor initialized [2018-01-29 23:38:47,142 INFO L185 PluginConnector]: Executing the observer EnsureBoogieModelObserver from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.01 11:38:47" (1/1) ... [2018-01-29 23:38:47,142 INFO L185 PluginConnector]: Executing the observer TypeChecker from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.01 11:38:47" (1/1) ... [2018-01-29 23:38:47,147 INFO L185 PluginConnector]: Executing the observer ConstExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.01 11:38:47" (1/1) ... [2018-01-29 23:38:47,147 INFO L185 PluginConnector]: Executing the observer StructExpander from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.01 11:38:47" (1/1) ... [2018-01-29 23:38:47,148 INFO L185 PluginConnector]: Executing the observer UnstructureCode from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.01 11:38:47" (1/1) ... [2018-01-29 23:38:47,151 INFO L185 PluginConnector]: Executing the observer FunctionInliner from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.01 11:38:47" (1/1) ... [2018-01-29 23:38:47,151 INFO L185 PluginConnector]: Executing the observer BoogieSymbolTableConstructor from plugin Boogie Preprocessor for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.01 11:38:47" (1/1) ... [2018-01-29 23:38:47,152 INFO L132 PluginConnector]: ------------------------ END Boogie Preprocessor---------------------------- [2018-01-29 23:38:47,152 INFO L113 PluginConnector]: ------------------------RCFGBuilder---------------------------- [2018-01-29 23:38:47,152 INFO L271 PluginConnector]: Initializing RCFGBuilder... [2018-01-29 23:38:47,152 INFO L276 PluginConnector]: RCFGBuilder initialized [2018-01-29 23:38:47,154 INFO L185 PluginConnector]: Executing the observer RCFGBuilderObserver from plugin RCFGBuilder for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.01 11:38:47" (1/1) ... No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 1 with z3 SMTLIB2_COMPLIANT=true -memory:2024 -smt2 -in -t:2000 [2018-01-29 23:38:47,188 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.init [2018-01-29 23:38:47,188 INFO L136 BoogieDeclarations]: Found implementation of procedure ULTIMATE.start [2018-01-29 23:38:47,188 INFO L136 BoogieDeclarations]: Found implementation of procedure __VERIFIER_assert [2018-01-29 23:38:47,188 INFO L136 BoogieDeclarations]: Found implementation of procedure main [2018-01-29 23:38:47,188 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_error [2018-01-29 23:38:47,188 INFO L128 BoogieDeclarations]: Found specification of procedure __VERIFIER_assert [2018-01-29 23:38:47,189 INFO L128 BoogieDeclarations]: Found specification of procedure main [2018-01-29 23:38:47,189 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.init [2018-01-29 23:38:47,189 INFO L128 BoogieDeclarations]: Found specification of procedure ULTIMATE.start [2018-01-29 23:38:47,408 INFO L257 CfgBuilder]: Using the 1 location(s) as analysis (start of procedure ULTIMATE.start) [2018-01-29 23:38:47,409 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 29.01 11:38:47 BoogieIcfgContainer [2018-01-29 23:38:47,409 INFO L132 PluginConnector]: ------------------------ END RCFGBuilder---------------------------- [2018-01-29 23:38:47,409 INFO L113 PluginConnector]: ------------------------TraceAbstraction---------------------------- [2018-01-29 23:38:47,409 INFO L271 PluginConnector]: Initializing TraceAbstraction... [2018-01-29 23:38:47,411 INFO L276 PluginConnector]: TraceAbstraction initialized [2018-01-29 23:38:47,411 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "CDTParser AST 29.01 11:38:47" (1/3) ... [2018-01-29 23:38:47,412 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@225564b4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 29.01 11:38:47, skipping insertion in model container [2018-01-29 23:38:47,412 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.cacsl2boogietranslator AST 29.01 11:38:47" (2/3) ... [2018-01-29 23:38:47,412 INFO L205 PluginConnector]: Invalid model from TraceAbstraction for observer de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction.TraceAbstractionObserver@225564b4 and model type de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction AST 29.01 11:38:47, skipping insertion in model container [2018-01-29 23:38:47,412 INFO L185 PluginConnector]: Executing the observer TraceAbstractionObserver from plugin TraceAbstraction for "de.uni_freiburg.informatik.ultimate.plugins.generator.rcfgbuilder CFG 29.01 11:38:47" (3/3) ... [2018-01-29 23:38:47,419 INFO L107 eAbstractionObserver]: Analyzing ICFG standard_init2_true-unreach-call_ground.i [2018-01-29 23:38:47,424 INFO L128 ceAbstractionStarter]: Automizer settings: Hoare:true NWA Interpolation:FPandBP Determinization: PREDICATE_ABSTRACTION [2018-01-29 23:38:47,428 INFO L140 ceAbstractionStarter]: Appying trace abstraction to program that has 1 error locations. [2018-01-29 23:38:47,456 INFO L322 AbstractCegarLoop]: Interprodecural is true [2018-01-29 23:38:47,456 INFO L323 AbstractCegarLoop]: Hoare is true [2018-01-29 23:38:47,457 INFO L324 AbstractCegarLoop]: Compute interpolants for FPandBP [2018-01-29 23:38:47,457 INFO L325 AbstractCegarLoop]: Backedges is TWOTRACK [2018-01-29 23:38:47,457 INFO L326 AbstractCegarLoop]: Determinization is PREDICATE_ABSTRACTION [2018-01-29 23:38:47,457 INFO L327 AbstractCegarLoop]: Difference is false [2018-01-29 23:38:47,457 INFO L328 AbstractCegarLoop]: Minimize is MINIMIZE_SEVPA [2018-01-29 23:38:47,457 INFO L333 AbstractCegarLoop]: ======== Iteration 0==of CEGAR loop == AllErrorsAtOnce======== [2018-01-29 23:38:47,458 INFO L87 2NestedWordAutomaton]: Mode: main mode - execution starts in main procedure [2018-01-29 23:38:47,468 INFO L276 IsEmpty]: Start isEmpty. Operand 34 states. [2018-01-29 23:38:47,475 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 18 [2018-01-29 23:38:47,475 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:38:47,476 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:38:47,476 INFO L371 AbstractCegarLoop]: === Iteration 1 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:38:47,479 INFO L82 PathProgramCache]: Analyzing trace with hash 500691516, now seen corresponding path program 1 times [2018-01-29 23:38:47,480 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:38:47,480 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:38:47,508 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:47,508 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:38:47,508 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:47,526 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:47,530 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:38:47,546 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-29 23:38:47,547 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-29 23:38:47,547 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [2] imperfect sequences [] total 2 [2018-01-29 23:38:47,548 INFO L409 AbstractCegarLoop]: Interpolant automaton has 2 states [2018-01-29 23:38:47,555 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 2 interpolants. [2018-01-29 23:38:47,556 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-29 23:38:47,557 INFO L87 Difference]: Start difference. First operand 34 states. Second operand 2 states. [2018-01-29 23:38:47,569 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:38:47,569 INFO L93 Difference]: Finished difference Result 58 states and 68 transitions. [2018-01-29 23:38:47,570 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-01-29 23:38:47,570 INFO L78 Accepts]: Start accepts. Automaton has 2 states. Word has length 17 [2018-01-29 23:38:47,571 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:38:47,581 INFO L225 Difference]: With dead ends: 58 [2018-01-29 23:38:47,581 INFO L226 Difference]: Without dead ends: 29 [2018-01-29 23:38:47,583 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 2 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 0 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=1, Invalid=1, Unknown=0, NotChecked=0, Total=2 [2018-01-29 23:38:47,592 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 29 states. [2018-01-29 23:38:47,601 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 29 to 29. [2018-01-29 23:38:47,602 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 29 states. [2018-01-29 23:38:47,602 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 29 states to 29 states and 32 transitions. [2018-01-29 23:38:47,603 INFO L78 Accepts]: Start accepts. Automaton has 29 states and 32 transitions. Word has length 17 [2018-01-29 23:38:47,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:38:47,604 INFO L432 AbstractCegarLoop]: Abstraction has 29 states and 32 transitions. [2018-01-29 23:38:47,604 INFO L433 AbstractCegarLoop]: Interpolant automaton has 2 states. [2018-01-29 23:38:47,604 INFO L276 IsEmpty]: Start isEmpty. Operand 29 states and 32 transitions. [2018-01-29 23:38:47,604 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 20 [2018-01-29 23:38:47,604 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:38:47,604 INFO L350 BasicCegarLoop]: trace histogram [1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:38:47,604 INFO L371 AbstractCegarLoop]: === Iteration 2 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:38:47,605 INFO L82 PathProgramCache]: Analyzing trace with hash -1851514352, now seen corresponding path program 1 times [2018-01-29 23:38:47,605 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:38:47,605 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:38:47,605 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:47,605 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:38:47,606 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:47,609 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:47,610 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:38:47,662 INFO L134 CoverageAnalysis]: Checked inductivity of 0 backedges. 0 proven. 0 refuted. 0 times theorem prover too weak. 0 trivial. 0 not checked. [2018-01-29 23:38:47,663 INFO L320 seRefinementStrategy]: Constructing automaton from 1 perfect and 0 imperfect interpolant sequences. [2018-01-29 23:38:47,663 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [3] imperfect sequences [] total 3 [2018-01-29 23:38:47,664 INFO L409 AbstractCegarLoop]: Interpolant automaton has 3 states [2018-01-29 23:38:47,664 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 3 interpolants. [2018-01-29 23:38:47,664 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-29 23:38:47,664 INFO L87 Difference]: Start difference. First operand 29 states and 32 transitions. Second operand 3 states. [2018-01-29 23:38:47,811 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:38:47,811 INFO L93 Difference]: Finished difference Result 56 states and 63 transitions. [2018-01-29 23:38:47,812 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 3 states. [2018-01-29 23:38:47,812 INFO L78 Accepts]: Start accepts. Automaton has 3 states. Word has length 19 [2018-01-29 23:38:47,812 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:38:47,812 INFO L225 Difference]: With dead ends: 56 [2018-01-29 23:38:47,812 INFO L226 Difference]: Without dead ends: 37 [2018-01-29 23:38:47,813 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 3 GetRequests, 2 SyntacticMatches, 0 SemanticMatches, 1 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=3, Invalid=3, Unknown=0, NotChecked=0, Total=6 [2018-01-29 23:38:47,813 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 37 states. [2018-01-29 23:38:47,815 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 37 to 33. [2018-01-29 23:38:47,816 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 33 states. [2018-01-29 23:38:47,816 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 33 states to 33 states and 36 transitions. [2018-01-29 23:38:47,816 INFO L78 Accepts]: Start accepts. Automaton has 33 states and 36 transitions. Word has length 19 [2018-01-29 23:38:47,816 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:38:47,816 INFO L432 AbstractCegarLoop]: Abstraction has 33 states and 36 transitions. [2018-01-29 23:38:47,816 INFO L433 AbstractCegarLoop]: Interpolant automaton has 3 states. [2018-01-29 23:38:47,817 INFO L276 IsEmpty]: Start isEmpty. Operand 33 states and 36 transitions. [2018-01-29 23:38:47,817 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 28 [2018-01-29 23:38:47,817 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:38:47,817 INFO L350 BasicCegarLoop]: trace histogram [2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:38:47,817 INFO L371 AbstractCegarLoop]: === Iteration 3 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:38:47,817 INFO L82 PathProgramCache]: Analyzing trace with hash -1283235408, now seen corresponding path program 1 times [2018-01-29 23:38:47,817 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:38:47,818 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:38:47,818 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:47,818 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:38:47,818 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:47,880 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:47,881 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:38:47,931 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-29 23:38:47,932 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:38:47,932 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 2 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:38:47,940 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:38:47,968 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:47,972 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:38:47,983 INFO L134 CoverageAnalysis]: Checked inductivity of 4 backedges. 0 proven. 2 refuted. 0 times theorem prover too weak. 2 trivial. 0 not checked. [2018-01-29 23:38:48,003 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:38:48,003 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [4, 4] total 4 [2018-01-29 23:38:48,003 INFO L409 AbstractCegarLoop]: Interpolant automaton has 4 states [2018-01-29 23:38:48,003 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 4 interpolants. [2018-01-29 23:38:48,003 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-01-29 23:38:48,004 INFO L87 Difference]: Start difference. First operand 33 states and 36 transitions. Second operand 4 states. [2018-01-29 23:38:48,108 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:38:48,109 INFO L93 Difference]: Finished difference Result 66 states and 73 transitions. [2018-01-29 23:38:48,109 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 4 states. [2018-01-29 23:38:48,109 INFO L78 Accepts]: Start accepts. Automaton has 4 states. Word has length 27 [2018-01-29 23:38:48,109 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:38:48,110 INFO L225 Difference]: With dead ends: 66 [2018-01-29 23:38:48,110 INFO L226 Difference]: Without dead ends: 45 [2018-01-29 23:38:48,110 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 30 GetRequests, 28 SyntacticMatches, 0 SemanticMatches, 2 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=6, Invalid=6, Unknown=0, NotChecked=0, Total=12 [2018-01-29 23:38:48,110 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 45 states. [2018-01-29 23:38:48,112 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 45 to 41. [2018-01-29 23:38:48,112 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 41 states. [2018-01-29 23:38:48,113 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 41 states to 41 states and 44 transitions. [2018-01-29 23:38:48,113 INFO L78 Accepts]: Start accepts. Automaton has 41 states and 44 transitions. Word has length 27 [2018-01-29 23:38:48,113 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:38:48,113 INFO L432 AbstractCegarLoop]: Abstraction has 41 states and 44 transitions. [2018-01-29 23:38:48,113 INFO L433 AbstractCegarLoop]: Interpolant automaton has 4 states. [2018-01-29 23:38:48,113 INFO L276 IsEmpty]: Start isEmpty. Operand 41 states and 44 transitions. [2018-01-29 23:38:48,114 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 36 [2018-01-29 23:38:48,114 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:38:48,114 INFO L350 BasicCegarLoop]: trace histogram [3, 3, 2, 2, 2, 2, 2, 2, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:38:48,114 INFO L371 AbstractCegarLoop]: === Iteration 4 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:38:48,114 INFO L82 PathProgramCache]: Analyzing trace with hash -1417246640, now seen corresponding path program 2 times [2018-01-29 23:38:48,115 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:38:48,115 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:38:48,115 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:48,115 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:38:48,115 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:48,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:48,124 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:38:48,224 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-01-29 23:38:48,224 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:38:48,224 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 3 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:38:48,236 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-29 23:38:48,245 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:48,261 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:48,273 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:38:48,274 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:38:48,278 INFO L134 CoverageAnalysis]: Checked inductivity of 16 backedges. 0 proven. 8 refuted. 0 times theorem prover too weak. 8 trivial. 0 not checked. [2018-01-29 23:38:48,294 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:38:48,295 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [5, 5] total 5 [2018-01-29 23:38:48,295 INFO L409 AbstractCegarLoop]: Interpolant automaton has 5 states [2018-01-29 23:38:48,295 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 5 interpolants. [2018-01-29 23:38:48,295 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-01-29 23:38:48,295 INFO L87 Difference]: Start difference. First operand 41 states and 44 transitions. Second operand 5 states. [2018-01-29 23:38:48,413 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:38:48,413 INFO L93 Difference]: Finished difference Result 78 states and 85 transitions. [2018-01-29 23:38:48,413 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 5 states. [2018-01-29 23:38:48,413 INFO L78 Accepts]: Start accepts. Automaton has 5 states. Word has length 35 [2018-01-29 23:38:48,414 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:38:48,414 INFO L225 Difference]: With dead ends: 78 [2018-01-29 23:38:48,414 INFO L226 Difference]: Without dead ends: 53 [2018-01-29 23:38:48,414 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 39 GetRequests, 36 SyntacticMatches, 0 SemanticMatches, 3 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=10, Invalid=10, Unknown=0, NotChecked=0, Total=20 [2018-01-29 23:38:48,415 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 53 states. [2018-01-29 23:38:48,417 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 53 to 49. [2018-01-29 23:38:48,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 49 states. [2018-01-29 23:38:48,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 49 states to 49 states and 52 transitions. [2018-01-29 23:38:48,418 INFO L78 Accepts]: Start accepts. Automaton has 49 states and 52 transitions. Word has length 35 [2018-01-29 23:38:48,418 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:38:48,418 INFO L432 AbstractCegarLoop]: Abstraction has 49 states and 52 transitions. [2018-01-29 23:38:48,418 INFO L433 AbstractCegarLoop]: Interpolant automaton has 5 states. [2018-01-29 23:38:48,418 INFO L276 IsEmpty]: Start isEmpty. Operand 49 states and 52 transitions. [2018-01-29 23:38:48,419 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 44 [2018-01-29 23:38:48,419 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:38:48,419 INFO L350 BasicCegarLoop]: trace histogram [4, 4, 3, 3, 3, 3, 3, 3, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:38:48,419 INFO L371 AbstractCegarLoop]: === Iteration 5 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:38:48,419 INFO L82 PathProgramCache]: Analyzing trace with hash -2034559504, now seen corresponding path program 3 times [2018-01-29 23:38:48,419 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:38:48,419 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:38:48,420 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:48,420 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:38:48,420 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:48,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:48,428 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:38:48,486 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-01-29 23:38:48,487 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:38:48,487 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 4 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:38:48,494 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-29 23:38:48,498 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:48,506 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:48,508 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:48,514 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:48,514 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:38:48,515 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:38:48,520 INFO L134 CoverageAnalysis]: Checked inductivity of 36 backedges. 0 proven. 18 refuted. 0 times theorem prover too weak. 18 trivial. 0 not checked. [2018-01-29 23:38:48,536 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:38:48,536 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [6, 6] total 6 [2018-01-29 23:38:48,537 INFO L409 AbstractCegarLoop]: Interpolant automaton has 6 states [2018-01-29 23:38:48,537 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 6 interpolants. [2018-01-29 23:38:48,537 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-01-29 23:38:48,537 INFO L87 Difference]: Start difference. First operand 49 states and 52 transitions. Second operand 6 states. [2018-01-29 23:38:48,687 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:38:48,688 INFO L93 Difference]: Finished difference Result 90 states and 97 transitions. [2018-01-29 23:38:48,688 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 6 states. [2018-01-29 23:38:48,688 INFO L78 Accepts]: Start accepts. Automaton has 6 states. Word has length 43 [2018-01-29 23:38:48,688 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:38:48,688 INFO L225 Difference]: With dead ends: 90 [2018-01-29 23:38:48,688 INFO L226 Difference]: Without dead ends: 61 [2018-01-29 23:38:48,689 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 48 GetRequests, 44 SyntacticMatches, 0 SemanticMatches, 4 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=15, Invalid=15, Unknown=0, NotChecked=0, Total=30 [2018-01-29 23:38:48,689 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 61 states. [2018-01-29 23:38:48,691 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 61 to 57. [2018-01-29 23:38:48,691 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 57 states. [2018-01-29 23:38:48,692 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 57 states to 57 states and 60 transitions. [2018-01-29 23:38:48,692 INFO L78 Accepts]: Start accepts. Automaton has 57 states and 60 transitions. Word has length 43 [2018-01-29 23:38:48,692 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:38:48,692 INFO L432 AbstractCegarLoop]: Abstraction has 57 states and 60 transitions. [2018-01-29 23:38:48,692 INFO L433 AbstractCegarLoop]: Interpolant automaton has 6 states. [2018-01-29 23:38:48,692 INFO L276 IsEmpty]: Start isEmpty. Operand 57 states and 60 transitions. [2018-01-29 23:38:48,693 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 52 [2018-01-29 23:38:48,693 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:38:48,693 INFO L350 BasicCegarLoop]: trace histogram [5, 5, 4, 4, 4, 4, 4, 4, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:38:48,693 INFO L371 AbstractCegarLoop]: === Iteration 6 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:38:48,693 INFO L82 PathProgramCache]: Analyzing trace with hash -1502705008, now seen corresponding path program 4 times [2018-01-29 23:38:48,693 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:38:48,693 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:38:48,694 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:48,694 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:38:48,694 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:48,701 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:48,702 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:38:48,783 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-01-29 23:38:48,783 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:38:48,783 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 5 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:38:48,793 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-29 23:38:48,812 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:38:48,814 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:38:48,824 INFO L134 CoverageAnalysis]: Checked inductivity of 64 backedges. 0 proven. 32 refuted. 0 times theorem prover too weak. 32 trivial. 0 not checked. [2018-01-29 23:38:48,840 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:38:48,840 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [7, 7] total 7 [2018-01-29 23:38:48,840 INFO L409 AbstractCegarLoop]: Interpolant automaton has 7 states [2018-01-29 23:38:48,841 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 7 interpolants. [2018-01-29 23:38:48,841 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-01-29 23:38:48,841 INFO L87 Difference]: Start difference. First operand 57 states and 60 transitions. Second operand 7 states. [2018-01-29 23:38:48,914 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:38:48,915 INFO L93 Difference]: Finished difference Result 102 states and 109 transitions. [2018-01-29 23:38:48,915 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 7 states. [2018-01-29 23:38:48,915 INFO L78 Accepts]: Start accepts. Automaton has 7 states. Word has length 51 [2018-01-29 23:38:48,915 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:38:48,916 INFO L225 Difference]: With dead ends: 102 [2018-01-29 23:38:48,916 INFO L226 Difference]: Without dead ends: 69 [2018-01-29 23:38:48,916 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 57 GetRequests, 52 SyntacticMatches, 0 SemanticMatches, 5 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=21, Invalid=21, Unknown=0, NotChecked=0, Total=42 [2018-01-29 23:38:48,916 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 69 states. [2018-01-29 23:38:48,926 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 69 to 65. [2018-01-29 23:38:48,927 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 65 states. [2018-01-29 23:38:48,927 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 65 states to 65 states and 68 transitions. [2018-01-29 23:38:48,927 INFO L78 Accepts]: Start accepts. Automaton has 65 states and 68 transitions. Word has length 51 [2018-01-29 23:38:48,927 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:38:48,927 INFO L432 AbstractCegarLoop]: Abstraction has 65 states and 68 transitions. [2018-01-29 23:38:48,928 INFO L433 AbstractCegarLoop]: Interpolant automaton has 7 states. [2018-01-29 23:38:48,928 INFO L276 IsEmpty]: Start isEmpty. Operand 65 states and 68 transitions. [2018-01-29 23:38:48,928 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 60 [2018-01-29 23:38:48,928 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:38:48,928 INFO L350 BasicCegarLoop]: trace histogram [6, 6, 5, 5, 5, 5, 5, 5, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:38:48,928 INFO L371 AbstractCegarLoop]: === Iteration 7 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:38:48,929 INFO L82 PathProgramCache]: Analyzing trace with hash -1607571920, now seen corresponding path program 5 times [2018-01-29 23:38:48,929 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:38:48,929 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:38:48,929 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:48,929 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:38:48,929 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:48,939 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:48,943 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:38:49,108 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2018-01-29 23:38:49,108 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:38:49,108 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 6 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:38:49,113 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-29 23:38:49,120 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:49,122 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:49,127 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:49,128 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:49,129 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:49,133 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:49,134 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:38:49,135 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:38:49,141 INFO L134 CoverageAnalysis]: Checked inductivity of 100 backedges. 0 proven. 50 refuted. 0 times theorem prover too weak. 50 trivial. 0 not checked. [2018-01-29 23:38:49,159 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:38:49,160 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [8, 8] total 8 [2018-01-29 23:38:49,160 INFO L409 AbstractCegarLoop]: Interpolant automaton has 8 states [2018-01-29 23:38:49,160 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 8 interpolants. [2018-01-29 23:38:49,160 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-01-29 23:38:49,160 INFO L87 Difference]: Start difference. First operand 65 states and 68 transitions. Second operand 8 states. [2018-01-29 23:38:49,348 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:38:49,348 INFO L93 Difference]: Finished difference Result 114 states and 121 transitions. [2018-01-29 23:38:49,348 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 8 states. [2018-01-29 23:38:49,349 INFO L78 Accepts]: Start accepts. Automaton has 8 states. Word has length 59 [2018-01-29 23:38:49,349 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:38:49,349 INFO L225 Difference]: With dead ends: 114 [2018-01-29 23:38:49,349 INFO L226 Difference]: Without dead ends: 77 [2018-01-29 23:38:49,350 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 66 GetRequests, 60 SyntacticMatches, 0 SemanticMatches, 6 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=28, Invalid=28, Unknown=0, NotChecked=0, Total=56 [2018-01-29 23:38:49,350 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 77 states. [2018-01-29 23:38:49,352 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 77 to 73. [2018-01-29 23:38:49,352 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 73 states. [2018-01-29 23:38:49,352 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 73 states to 73 states and 76 transitions. [2018-01-29 23:38:49,353 INFO L78 Accepts]: Start accepts. Automaton has 73 states and 76 transitions. Word has length 59 [2018-01-29 23:38:49,353 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:38:49,353 INFO L432 AbstractCegarLoop]: Abstraction has 73 states and 76 transitions. [2018-01-29 23:38:49,353 INFO L433 AbstractCegarLoop]: Interpolant automaton has 8 states. [2018-01-29 23:38:49,353 INFO L276 IsEmpty]: Start isEmpty. Operand 73 states and 76 transitions. [2018-01-29 23:38:49,354 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 68 [2018-01-29 23:38:49,354 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:38:49,354 INFO L350 BasicCegarLoop]: trace histogram [7, 7, 6, 6, 6, 6, 6, 6, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:38:49,354 INFO L371 AbstractCegarLoop]: === Iteration 8 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:38:49,354 INFO L82 PathProgramCache]: Analyzing trace with hash 499656912, now seen corresponding path program 6 times [2018-01-29 23:38:49,354 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:38:49,354 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:38:49,355 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:49,355 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:38:49,355 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:49,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:49,363 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:38:49,512 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-29 23:38:49,512 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:38:49,512 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 7 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:38:49,517 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-29 23:38:49,522 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:49,526 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:49,530 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:49,531 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:49,532 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:49,534 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:49,536 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:49,536 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:38:49,538 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:38:49,551 INFO L134 CoverageAnalysis]: Checked inductivity of 144 backedges. 0 proven. 72 refuted. 0 times theorem prover too weak. 72 trivial. 0 not checked. [2018-01-29 23:38:49,567 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:38:49,568 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [9, 9] total 9 [2018-01-29 23:38:49,568 INFO L409 AbstractCegarLoop]: Interpolant automaton has 9 states [2018-01-29 23:38:49,568 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 9 interpolants. [2018-01-29 23:38:49,568 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-01-29 23:38:49,568 INFO L87 Difference]: Start difference. First operand 73 states and 76 transitions. Second operand 9 states. [2018-01-29 23:38:49,668 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:38:49,669 INFO L93 Difference]: Finished difference Result 126 states and 133 transitions. [2018-01-29 23:38:49,669 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 9 states. [2018-01-29 23:38:49,669 INFO L78 Accepts]: Start accepts. Automaton has 9 states. Word has length 67 [2018-01-29 23:38:49,670 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:38:49,670 INFO L225 Difference]: With dead ends: 126 [2018-01-29 23:38:49,670 INFO L226 Difference]: Without dead ends: 85 [2018-01-29 23:38:49,671 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 75 GetRequests, 68 SyntacticMatches, 0 SemanticMatches, 7 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=36, Invalid=36, Unknown=0, NotChecked=0, Total=72 [2018-01-29 23:38:49,671 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 85 states. [2018-01-29 23:38:49,674 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 85 to 81. [2018-01-29 23:38:49,674 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 81 states. [2018-01-29 23:38:49,675 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 81 states to 81 states and 84 transitions. [2018-01-29 23:38:49,675 INFO L78 Accepts]: Start accepts. Automaton has 81 states and 84 transitions. Word has length 67 [2018-01-29 23:38:49,675 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:38:49,675 INFO L432 AbstractCegarLoop]: Abstraction has 81 states and 84 transitions. [2018-01-29 23:38:49,675 INFO L433 AbstractCegarLoop]: Interpolant automaton has 9 states. [2018-01-29 23:38:49,675 INFO L276 IsEmpty]: Start isEmpty. Operand 81 states and 84 transitions. [2018-01-29 23:38:49,676 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 76 [2018-01-29 23:38:49,676 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:38:49,676 INFO L350 BasicCegarLoop]: trace histogram [8, 8, 7, 7, 7, 7, 7, 7, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:38:49,676 INFO L371 AbstractCegarLoop]: === Iteration 9 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:38:49,676 INFO L82 PathProgramCache]: Analyzing trace with hash -1119268240, now seen corresponding path program 7 times [2018-01-29 23:38:49,676 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:38:49,676 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:38:49,677 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:49,677 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:38:49,677 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:49,687 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:49,687 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:38:49,779 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-29 23:38:49,779 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:38:49,780 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 8 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:38:49,786 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:38:49,813 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:49,814 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:38:49,821 INFO L134 CoverageAnalysis]: Checked inductivity of 196 backedges. 0 proven. 98 refuted. 0 times theorem prover too weak. 98 trivial. 0 not checked. [2018-01-29 23:38:49,837 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:38:49,837 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [10, 10] total 10 [2018-01-29 23:38:49,837 INFO L409 AbstractCegarLoop]: Interpolant automaton has 10 states [2018-01-29 23:38:49,838 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 10 interpolants. [2018-01-29 23:38:49,838 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-01-29 23:38:49,838 INFO L87 Difference]: Start difference. First operand 81 states and 84 transitions. Second operand 10 states. [2018-01-29 23:38:49,941 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:38:49,942 INFO L93 Difference]: Finished difference Result 138 states and 145 transitions. [2018-01-29 23:38:49,948 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 10 states. [2018-01-29 23:38:49,948 INFO L78 Accepts]: Start accepts. Automaton has 10 states. Word has length 75 [2018-01-29 23:38:49,948 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:38:49,948 INFO L225 Difference]: With dead ends: 138 [2018-01-29 23:38:49,948 INFO L226 Difference]: Without dead ends: 93 [2018-01-29 23:38:49,949 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 84 GetRequests, 76 SyntacticMatches, 0 SemanticMatches, 8 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=45, Invalid=45, Unknown=0, NotChecked=0, Total=90 [2018-01-29 23:38:49,949 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 93 states. [2018-01-29 23:38:49,953 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 93 to 89. [2018-01-29 23:38:49,953 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 89 states. [2018-01-29 23:38:49,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 89 states to 89 states and 92 transitions. [2018-01-29 23:38:49,954 INFO L78 Accepts]: Start accepts. Automaton has 89 states and 92 transitions. Word has length 75 [2018-01-29 23:38:49,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:38:49,954 INFO L432 AbstractCegarLoop]: Abstraction has 89 states and 92 transitions. [2018-01-29 23:38:49,954 INFO L433 AbstractCegarLoop]: Interpolant automaton has 10 states. [2018-01-29 23:38:49,954 INFO L276 IsEmpty]: Start isEmpty. Operand 89 states and 92 transitions. [2018-01-29 23:38:49,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 84 [2018-01-29 23:38:49,955 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:38:49,955 INFO L350 BasicCegarLoop]: trace histogram [9, 9, 8, 8, 8, 8, 8, 8, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:38:49,955 INFO L371 AbstractCegarLoop]: === Iteration 10 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:38:49,955 INFO L82 PathProgramCache]: Analyzing trace with hash -251698416, now seen corresponding path program 8 times [2018-01-29 23:38:49,956 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:38:49,956 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:38:49,956 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:49,956 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:38:49,956 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:49,964 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:49,964 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:38:50,165 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2018-01-29 23:38:50,165 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:38:50,165 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 9 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:38:50,175 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-29 23:38:50,179 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:50,184 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:50,185 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:38:50,187 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:38:50,198 INFO L134 CoverageAnalysis]: Checked inductivity of 256 backedges. 0 proven. 128 refuted. 0 times theorem prover too weak. 128 trivial. 0 not checked. [2018-01-29 23:38:50,215 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:38:50,215 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [11, 11] total 11 [2018-01-29 23:38:50,215 INFO L409 AbstractCegarLoop]: Interpolant automaton has 11 states [2018-01-29 23:38:50,215 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 11 interpolants. [2018-01-29 23:38:50,215 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-01-29 23:38:50,215 INFO L87 Difference]: Start difference. First operand 89 states and 92 transitions. Second operand 11 states. [2018-01-29 23:38:50,301 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:38:50,302 INFO L93 Difference]: Finished difference Result 150 states and 157 transitions. [2018-01-29 23:38:50,302 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 11 states. [2018-01-29 23:38:50,302 INFO L78 Accepts]: Start accepts. Automaton has 11 states. Word has length 83 [2018-01-29 23:38:50,302 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:38:50,302 INFO L225 Difference]: With dead ends: 150 [2018-01-29 23:38:50,302 INFO L226 Difference]: Without dead ends: 101 [2018-01-29 23:38:50,303 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 93 GetRequests, 84 SyntacticMatches, 0 SemanticMatches, 9 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=55, Invalid=55, Unknown=0, NotChecked=0, Total=110 [2018-01-29 23:38:50,303 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 101 states. [2018-01-29 23:38:50,305 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 101 to 97. [2018-01-29 23:38:50,305 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 97 states. [2018-01-29 23:38:50,306 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 97 states to 97 states and 100 transitions. [2018-01-29 23:38:50,306 INFO L78 Accepts]: Start accepts. Automaton has 97 states and 100 transitions. Word has length 83 [2018-01-29 23:38:50,306 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:38:50,306 INFO L432 AbstractCegarLoop]: Abstraction has 97 states and 100 transitions. [2018-01-29 23:38:50,306 INFO L433 AbstractCegarLoop]: Interpolant automaton has 11 states. [2018-01-29 23:38:50,306 INFO L276 IsEmpty]: Start isEmpty. Operand 97 states and 100 transitions. [2018-01-29 23:38:50,307 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 92 [2018-01-29 23:38:50,307 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:38:50,307 INFO L350 BasicCegarLoop]: trace histogram [10, 10, 9, 9, 9, 9, 9, 9, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:38:50,307 INFO L371 AbstractCegarLoop]: === Iteration 11 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:38:50,307 INFO L82 PathProgramCache]: Analyzing trace with hash -545793360, now seen corresponding path program 9 times [2018-01-29 23:38:50,307 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:38:50,307 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:38:50,308 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:50,308 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:38:50,308 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:50,317 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:50,317 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:38:50,436 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 0 proven. 162 refuted. 0 times theorem prover too weak. 162 trivial. 0 not checked. [2018-01-29 23:38:50,436 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:38:50,436 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 10 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:38:50,444 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-29 23:38:50,448 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:50,460 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:50,473 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:50,480 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:50,493 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:50,500 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:50,510 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:50,523 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:50,530 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:50,543 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:50,553 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:38:50,554 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:38:50,562 INFO L134 CoverageAnalysis]: Checked inductivity of 324 backedges. 0 proven. 162 refuted. 0 times theorem prover too weak. 162 trivial. 0 not checked. [2018-01-29 23:38:50,579 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:38:50,579 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [12, 12] total 12 [2018-01-29 23:38:50,579 INFO L409 AbstractCegarLoop]: Interpolant automaton has 12 states [2018-01-29 23:38:50,579 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 12 interpolants. [2018-01-29 23:38:50,580 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-01-29 23:38:50,580 INFO L87 Difference]: Start difference. First operand 97 states and 100 transitions. Second operand 12 states. [2018-01-29 23:38:50,734 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:38:50,734 INFO L93 Difference]: Finished difference Result 162 states and 169 transitions. [2018-01-29 23:38:50,734 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 12 states. [2018-01-29 23:38:50,734 INFO L78 Accepts]: Start accepts. Automaton has 12 states. Word has length 91 [2018-01-29 23:38:50,734 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:38:50,735 INFO L225 Difference]: With dead ends: 162 [2018-01-29 23:38:50,735 INFO L226 Difference]: Without dead ends: 109 [2018-01-29 23:38:50,735 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 102 GetRequests, 92 SyntacticMatches, 0 SemanticMatches, 10 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=66, Invalid=66, Unknown=0, NotChecked=0, Total=132 [2018-01-29 23:38:50,735 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 109 states. [2018-01-29 23:38:50,737 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 109 to 105. [2018-01-29 23:38:50,737 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 105 states. [2018-01-29 23:38:50,738 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 105 states to 105 states and 108 transitions. [2018-01-29 23:38:50,738 INFO L78 Accepts]: Start accepts. Automaton has 105 states and 108 transitions. Word has length 91 [2018-01-29 23:38:50,738 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:38:50,738 INFO L432 AbstractCegarLoop]: Abstraction has 105 states and 108 transitions. [2018-01-29 23:38:50,738 INFO L433 AbstractCegarLoop]: Interpolant automaton has 12 states. [2018-01-29 23:38:50,738 INFO L276 IsEmpty]: Start isEmpty. Operand 105 states and 108 transitions. [2018-01-29 23:38:50,739 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 100 [2018-01-29 23:38:50,739 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:38:50,739 INFO L350 BasicCegarLoop]: trace histogram [11, 11, 10, 10, 10, 10, 10, 10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:38:50,739 INFO L371 AbstractCegarLoop]: === Iteration 12 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:38:50,739 INFO L82 PathProgramCache]: Analyzing trace with hash 1132476752, now seen corresponding path program 10 times [2018-01-29 23:38:50,739 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:38:50,739 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:38:50,740 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:50,740 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:38:50,740 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:50,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:50,747 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:38:50,916 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 0 proven. 200 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2018-01-29 23:38:50,916 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:38:50,916 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 11 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:38:50,922 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-29 23:38:50,936 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:38:50,937 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:38:50,945 INFO L134 CoverageAnalysis]: Checked inductivity of 400 backedges. 0 proven. 200 refuted. 0 times theorem prover too weak. 200 trivial. 0 not checked. [2018-01-29 23:38:50,962 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:38:50,962 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [13, 13] total 13 [2018-01-29 23:38:50,963 INFO L409 AbstractCegarLoop]: Interpolant automaton has 13 states [2018-01-29 23:38:50,963 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 13 interpolants. [2018-01-29 23:38:50,963 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-01-29 23:38:50,963 INFO L87 Difference]: Start difference. First operand 105 states and 108 transitions. Second operand 13 states. [2018-01-29 23:38:51,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:38:51,088 INFO L93 Difference]: Finished difference Result 174 states and 181 transitions. [2018-01-29 23:38:51,094 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 13 states. [2018-01-29 23:38:51,094 INFO L78 Accepts]: Start accepts. Automaton has 13 states. Word has length 99 [2018-01-29 23:38:51,095 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:38:51,095 INFO L225 Difference]: With dead ends: 174 [2018-01-29 23:38:51,095 INFO L226 Difference]: Without dead ends: 117 [2018-01-29 23:38:51,095 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 111 GetRequests, 100 SyntacticMatches, 0 SemanticMatches, 11 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=78, Invalid=78, Unknown=0, NotChecked=0, Total=156 [2018-01-29 23:38:51,096 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 117 states. [2018-01-29 23:38:51,098 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 117 to 113. [2018-01-29 23:38:51,098 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 113 states. [2018-01-29 23:38:51,098 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 113 states to 113 states and 116 transitions. [2018-01-29 23:38:51,098 INFO L78 Accepts]: Start accepts. Automaton has 113 states and 116 transitions. Word has length 99 [2018-01-29 23:38:51,098 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:38:51,098 INFO L432 AbstractCegarLoop]: Abstraction has 113 states and 116 transitions. [2018-01-29 23:38:51,099 INFO L433 AbstractCegarLoop]: Interpolant automaton has 13 states. [2018-01-29 23:38:51,099 INFO L276 IsEmpty]: Start isEmpty. Operand 113 states and 116 transitions. [2018-01-29 23:38:51,099 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 108 [2018-01-29 23:38:51,099 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:38:51,099 INFO L350 BasicCegarLoop]: trace histogram [12, 12, 11, 11, 11, 11, 11, 11, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:38:51,099 INFO L371 AbstractCegarLoop]: === Iteration 13 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:38:51,100 INFO L82 PathProgramCache]: Analyzing trace with hash 1277558512, now seen corresponding path program 11 times [2018-01-29 23:38:51,100 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:38:51,100 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:38:51,100 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:51,100 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:38:51,100 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:51,108 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:51,108 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:38:51,210 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 242 trivial. 0 not checked. [2018-01-29 23:38:51,211 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:38:51,211 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 12 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:38:51,216 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-29 23:38:51,220 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:51,221 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:51,223 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:51,224 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:51,225 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:51,226 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:51,228 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:51,229 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:51,231 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:51,234 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:51,236 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:51,245 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:51,245 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:38:51,247 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:38:51,263 INFO L134 CoverageAnalysis]: Checked inductivity of 484 backedges. 0 proven. 242 refuted. 0 times theorem prover too weak. 242 trivial. 0 not checked. [2018-01-29 23:38:51,280 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:38:51,280 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [14, 14] total 14 [2018-01-29 23:38:51,281 INFO L409 AbstractCegarLoop]: Interpolant automaton has 14 states [2018-01-29 23:38:51,281 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 14 interpolants. [2018-01-29 23:38:51,281 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-01-29 23:38:51,281 INFO L87 Difference]: Start difference. First operand 113 states and 116 transitions. Second operand 14 states. [2018-01-29 23:38:51,392 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:38:51,392 INFO L93 Difference]: Finished difference Result 186 states and 193 transitions. [2018-01-29 23:38:51,393 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 14 states. [2018-01-29 23:38:51,393 INFO L78 Accepts]: Start accepts. Automaton has 14 states. Word has length 107 [2018-01-29 23:38:51,393 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:38:51,393 INFO L225 Difference]: With dead ends: 186 [2018-01-29 23:38:51,393 INFO L226 Difference]: Without dead ends: 125 [2018-01-29 23:38:51,394 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 120 GetRequests, 108 SyntacticMatches, 0 SemanticMatches, 12 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=91, Invalid=91, Unknown=0, NotChecked=0, Total=182 [2018-01-29 23:38:51,394 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 125 states. [2018-01-29 23:38:51,395 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 125 to 121. [2018-01-29 23:38:51,395 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 121 states. [2018-01-29 23:38:51,396 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 121 states to 121 states and 124 transitions. [2018-01-29 23:38:51,396 INFO L78 Accepts]: Start accepts. Automaton has 121 states and 124 transitions. Word has length 107 [2018-01-29 23:38:51,396 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:38:51,396 INFO L432 AbstractCegarLoop]: Abstraction has 121 states and 124 transitions. [2018-01-29 23:38:51,396 INFO L433 AbstractCegarLoop]: Interpolant automaton has 14 states. [2018-01-29 23:38:51,396 INFO L276 IsEmpty]: Start isEmpty. Operand 121 states and 124 transitions. [2018-01-29 23:38:51,397 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 116 [2018-01-29 23:38:51,397 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:38:51,397 INFO L350 BasicCegarLoop]: trace histogram [13, 13, 12, 12, 12, 12, 12, 12, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:38:51,397 INFO L371 AbstractCegarLoop]: === Iteration 14 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:38:51,397 INFO L82 PathProgramCache]: Analyzing trace with hash 2092346256, now seen corresponding path program 12 times [2018-01-29 23:38:51,397 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:38:51,397 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:38:51,398 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:51,398 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:38:51,398 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:51,404 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:51,404 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:38:51,757 INFO L134 CoverageAnalysis]: Checked inductivity of 576 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 288 trivial. 0 not checked. [2018-01-29 23:38:51,758 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:38:51,758 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 13 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:38:51,762 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-29 23:38:51,767 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:51,773 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:51,774 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:51,790 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:51,797 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:51,800 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:51,801 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:51,802 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:51,804 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:51,805 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:51,820 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:51,830 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:51,833 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:51,834 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:38:51,835 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:38:51,845 INFO L134 CoverageAnalysis]: Checked inductivity of 576 backedges. 0 proven. 288 refuted. 0 times theorem prover too weak. 288 trivial. 0 not checked. [2018-01-29 23:38:51,861 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:38:51,862 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [15, 15] total 15 [2018-01-29 23:38:51,862 INFO L409 AbstractCegarLoop]: Interpolant automaton has 15 states [2018-01-29 23:38:51,862 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 15 interpolants. [2018-01-29 23:38:51,862 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=105, Invalid=105, Unknown=0, NotChecked=0, Total=210 [2018-01-29 23:38:51,862 INFO L87 Difference]: Start difference. First operand 121 states and 124 transitions. Second operand 15 states. [2018-01-29 23:38:51,959 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:38:51,959 INFO L93 Difference]: Finished difference Result 198 states and 205 transitions. [2018-01-29 23:38:51,959 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 15 states. [2018-01-29 23:38:51,959 INFO L78 Accepts]: Start accepts. Automaton has 15 states. Word has length 115 [2018-01-29 23:38:51,959 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:38:51,960 INFO L225 Difference]: With dead ends: 198 [2018-01-29 23:38:51,960 INFO L226 Difference]: Without dead ends: 133 [2018-01-29 23:38:51,960 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 129 GetRequests, 116 SyntacticMatches, 0 SemanticMatches, 13 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=105, Invalid=105, Unknown=0, NotChecked=0, Total=210 [2018-01-29 23:38:51,960 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 133 states. [2018-01-29 23:38:51,961 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 133 to 129. [2018-01-29 23:38:51,962 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 129 states. [2018-01-29 23:38:51,962 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 129 states to 129 states and 132 transitions. [2018-01-29 23:38:51,962 INFO L78 Accepts]: Start accepts. Automaton has 129 states and 132 transitions. Word has length 115 [2018-01-29 23:38:51,962 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:38:51,962 INFO L432 AbstractCegarLoop]: Abstraction has 129 states and 132 transitions. [2018-01-29 23:38:51,962 INFO L433 AbstractCegarLoop]: Interpolant automaton has 15 states. [2018-01-29 23:38:51,962 INFO L276 IsEmpty]: Start isEmpty. Operand 129 states and 132 transitions. [2018-01-29 23:38:51,963 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 124 [2018-01-29 23:38:51,963 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:38:51,963 INFO L350 BasicCegarLoop]: trace histogram [14, 14, 13, 13, 13, 13, 13, 13, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:38:51,963 INFO L371 AbstractCegarLoop]: === Iteration 15 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:38:51,963 INFO L82 PathProgramCache]: Analyzing trace with hash -1933590736, now seen corresponding path program 13 times [2018-01-29 23:38:51,963 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:38:51,963 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:38:51,964 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:51,964 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:38:51,964 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:51,971 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:51,972 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:38:52,107 INFO L134 CoverageAnalysis]: Checked inductivity of 676 backedges. 0 proven. 338 refuted. 0 times theorem prover too weak. 338 trivial. 0 not checked. [2018-01-29 23:38:52,107 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:38:52,107 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 14 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:38:52,111 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:38:52,123 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:52,124 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:38:52,135 INFO L134 CoverageAnalysis]: Checked inductivity of 676 backedges. 0 proven. 338 refuted. 0 times theorem prover too weak. 338 trivial. 0 not checked. [2018-01-29 23:38:52,151 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:38:52,152 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [16, 16] total 16 [2018-01-29 23:38:52,152 INFO L409 AbstractCegarLoop]: Interpolant automaton has 16 states [2018-01-29 23:38:52,152 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 16 interpolants. [2018-01-29 23:38:52,152 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-01-29 23:38:52,152 INFO L87 Difference]: Start difference. First operand 129 states and 132 transitions. Second operand 16 states. [2018-01-29 23:38:52,267 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:38:52,268 INFO L93 Difference]: Finished difference Result 210 states and 217 transitions. [2018-01-29 23:38:52,279 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 16 states. [2018-01-29 23:38:52,279 INFO L78 Accepts]: Start accepts. Automaton has 16 states. Word has length 123 [2018-01-29 23:38:52,280 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:38:52,280 INFO L225 Difference]: With dead ends: 210 [2018-01-29 23:38:52,280 INFO L226 Difference]: Without dead ends: 141 [2018-01-29 23:38:52,280 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 138 GetRequests, 124 SyntacticMatches, 0 SemanticMatches, 14 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.0s TimeCoverageRelationStatistics Valid=120, Invalid=120, Unknown=0, NotChecked=0, Total=240 [2018-01-29 23:38:52,280 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 141 states. [2018-01-29 23:38:52,282 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 141 to 137. [2018-01-29 23:38:52,282 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 137 states. [2018-01-29 23:38:52,282 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 137 states to 137 states and 140 transitions. [2018-01-29 23:38:52,282 INFO L78 Accepts]: Start accepts. Automaton has 137 states and 140 transitions. Word has length 123 [2018-01-29 23:38:52,283 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:38:52,283 INFO L432 AbstractCegarLoop]: Abstraction has 137 states and 140 transitions. [2018-01-29 23:38:52,283 INFO L433 AbstractCegarLoop]: Interpolant automaton has 16 states. [2018-01-29 23:38:52,283 INFO L276 IsEmpty]: Start isEmpty. Operand 137 states and 140 transitions. [2018-01-29 23:38:52,283 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 132 [2018-01-29 23:38:52,284 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:38:52,284 INFO L350 BasicCegarLoop]: trace histogram [15, 15, 14, 14, 14, 14, 14, 14, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:38:52,284 INFO L371 AbstractCegarLoop]: === Iteration 16 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:38:52,284 INFO L82 PathProgramCache]: Analyzing trace with hash 1208924624, now seen corresponding path program 14 times [2018-01-29 23:38:52,284 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:38:52,284 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:38:52,284 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:52,284 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:38:52,284 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:52,290 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:52,291 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:38:52,480 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 392 trivial. 0 not checked. [2018-01-29 23:38:52,481 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:38:52,481 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 15 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:38:52,485 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-29 23:38:52,489 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:52,496 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:52,497 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:38:52,499 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:38:52,509 INFO L134 CoverageAnalysis]: Checked inductivity of 784 backedges. 0 proven. 392 refuted. 0 times theorem prover too weak. 392 trivial. 0 not checked. [2018-01-29 23:38:52,526 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:38:52,527 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [17, 17] total 17 [2018-01-29 23:38:52,527 INFO L409 AbstractCegarLoop]: Interpolant automaton has 17 states [2018-01-29 23:38:52,527 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 17 interpolants. [2018-01-29 23:38:52,527 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=136, Invalid=136, Unknown=0, NotChecked=0, Total=272 [2018-01-29 23:38:52,527 INFO L87 Difference]: Start difference. First operand 137 states and 140 transitions. Second operand 17 states. [2018-01-29 23:38:52,649 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:38:52,649 INFO L93 Difference]: Finished difference Result 222 states and 229 transitions. [2018-01-29 23:38:52,649 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 17 states. [2018-01-29 23:38:52,649 INFO L78 Accepts]: Start accepts. Automaton has 17 states. Word has length 131 [2018-01-29 23:38:52,650 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:38:52,650 INFO L225 Difference]: With dead ends: 222 [2018-01-29 23:38:52,650 INFO L226 Difference]: Without dead ends: 149 [2018-01-29 23:38:52,650 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 147 GetRequests, 132 SyntacticMatches, 0 SemanticMatches, 15 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=136, Invalid=136, Unknown=0, NotChecked=0, Total=272 [2018-01-29 23:38:52,650 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 149 states. [2018-01-29 23:38:52,652 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 149 to 145. [2018-01-29 23:38:52,652 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 145 states. [2018-01-29 23:38:52,652 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 145 states to 145 states and 148 transitions. [2018-01-29 23:38:52,652 INFO L78 Accepts]: Start accepts. Automaton has 145 states and 148 transitions. Word has length 131 [2018-01-29 23:38:52,652 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:38:52,653 INFO L432 AbstractCegarLoop]: Abstraction has 145 states and 148 transitions. [2018-01-29 23:38:52,653 INFO L433 AbstractCegarLoop]: Interpolant automaton has 17 states. [2018-01-29 23:38:52,653 INFO L276 IsEmpty]: Start isEmpty. Operand 145 states and 148 transitions. [2018-01-29 23:38:52,653 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 140 [2018-01-29 23:38:52,653 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:38:52,653 INFO L350 BasicCegarLoop]: trace histogram [16, 16, 15, 15, 15, 15, 15, 15, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:38:52,653 INFO L371 AbstractCegarLoop]: === Iteration 17 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:38:52,654 INFO L82 PathProgramCache]: Analyzing trace with hash 1857100656, now seen corresponding path program 15 times [2018-01-29 23:38:52,654 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:38:52,654 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:38:52,654 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:52,654 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:38:52,654 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:52,660 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:52,661 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:38:52,850 INFO L134 CoverageAnalysis]: Checked inductivity of 900 backedges. 0 proven. 450 refuted. 0 times theorem prover too weak. 450 trivial. 0 not checked. [2018-01-29 23:38:52,850 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:38:52,850 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 16 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:38:52,856 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-29 23:38:52,861 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:52,862 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:52,863 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:52,864 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:52,865 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:52,866 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:52,868 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:52,869 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:52,871 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:52,873 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:52,876 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:52,886 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:52,889 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:52,892 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:52,896 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:52,900 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:52,900 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:38:52,902 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:38:52,920 INFO L134 CoverageAnalysis]: Checked inductivity of 900 backedges. 0 proven. 450 refuted. 0 times theorem prover too weak. 450 trivial. 0 not checked. [2018-01-29 23:38:52,938 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:38:52,938 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [18, 18] total 18 [2018-01-29 23:38:52,938 INFO L409 AbstractCegarLoop]: Interpolant automaton has 18 states [2018-01-29 23:38:52,938 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 18 interpolants. [2018-01-29 23:38:52,939 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2018-01-29 23:38:52,939 INFO L87 Difference]: Start difference. First operand 145 states and 148 transitions. Second operand 18 states. [2018-01-29 23:38:53,021 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:38:53,022 INFO L93 Difference]: Finished difference Result 234 states and 241 transitions. [2018-01-29 23:38:53,022 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 18 states. [2018-01-29 23:38:53,022 INFO L78 Accepts]: Start accepts. Automaton has 18 states. Word has length 139 [2018-01-29 23:38:53,022 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:38:53,023 INFO L225 Difference]: With dead ends: 234 [2018-01-29 23:38:53,023 INFO L226 Difference]: Without dead ends: 157 [2018-01-29 23:38:53,023 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 156 GetRequests, 140 SyntacticMatches, 0 SemanticMatches, 16 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=153, Invalid=153, Unknown=0, NotChecked=0, Total=306 [2018-01-29 23:38:53,023 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 157 states. [2018-01-29 23:38:53,025 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 157 to 153. [2018-01-29 23:38:53,025 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 153 states. [2018-01-29 23:38:53,025 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 153 states to 153 states and 156 transitions. [2018-01-29 23:38:53,026 INFO L78 Accepts]: Start accepts. Automaton has 153 states and 156 transitions. Word has length 139 [2018-01-29 23:38:53,026 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:38:53,026 INFO L432 AbstractCegarLoop]: Abstraction has 153 states and 156 transitions. [2018-01-29 23:38:53,026 INFO L433 AbstractCegarLoop]: Interpolant automaton has 18 states. [2018-01-29 23:38:53,026 INFO L276 IsEmpty]: Start isEmpty. Operand 153 states and 156 transitions. [2018-01-29 23:38:53,026 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 148 [2018-01-29 23:38:53,026 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:38:53,026 INFO L350 BasicCegarLoop]: trace histogram [17, 17, 16, 16, 16, 16, 16, 16, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:38:53,027 INFO L371 AbstractCegarLoop]: === Iteration 18 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:38:53,027 INFO L82 PathProgramCache]: Analyzing trace with hash -1795922928, now seen corresponding path program 16 times [2018-01-29 23:38:53,027 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:38:53,027 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:38:53,027 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:53,027 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:38:53,027 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:53,033 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:53,034 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:38:53,284 INFO L134 CoverageAnalysis]: Checked inductivity of 1024 backedges. 0 proven. 512 refuted. 0 times theorem prover too weak. 512 trivial. 0 not checked. [2018-01-29 23:38:53,284 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:38:53,284 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 17 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:38:53,289 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-29 23:38:53,306 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:38:53,308 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:38:53,326 INFO L134 CoverageAnalysis]: Checked inductivity of 1024 backedges. 0 proven. 512 refuted. 0 times theorem prover too weak. 512 trivial. 0 not checked. [2018-01-29 23:38:53,343 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:38:53,343 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [19, 19] total 19 [2018-01-29 23:38:53,343 INFO L409 AbstractCegarLoop]: Interpolant automaton has 19 states [2018-01-29 23:38:53,343 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 19 interpolants. [2018-01-29 23:38:53,343 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-01-29 23:38:53,343 INFO L87 Difference]: Start difference. First operand 153 states and 156 transitions. Second operand 19 states. [2018-01-29 23:38:53,464 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:38:53,464 INFO L93 Difference]: Finished difference Result 246 states and 253 transitions. [2018-01-29 23:38:53,468 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 19 states. [2018-01-29 23:38:53,468 INFO L78 Accepts]: Start accepts. Automaton has 19 states. Word has length 147 [2018-01-29 23:38:53,468 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:38:53,468 INFO L225 Difference]: With dead ends: 246 [2018-01-29 23:38:53,468 INFO L226 Difference]: Without dead ends: 165 [2018-01-29 23:38:53,469 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 165 GetRequests, 148 SyntacticMatches, 0 SemanticMatches, 17 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=171, Invalid=171, Unknown=0, NotChecked=0, Total=342 [2018-01-29 23:38:53,469 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 165 states. [2018-01-29 23:38:53,470 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 165 to 161. [2018-01-29 23:38:53,470 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 161 states. [2018-01-29 23:38:53,471 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 161 states to 161 states and 164 transitions. [2018-01-29 23:38:53,471 INFO L78 Accepts]: Start accepts. Automaton has 161 states and 164 transitions. Word has length 147 [2018-01-29 23:38:53,471 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:38:53,471 INFO L432 AbstractCegarLoop]: Abstraction has 161 states and 164 transitions. [2018-01-29 23:38:53,471 INFO L433 AbstractCegarLoop]: Interpolant automaton has 19 states. [2018-01-29 23:38:53,471 INFO L276 IsEmpty]: Start isEmpty. Operand 161 states and 164 transitions. [2018-01-29 23:38:53,471 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 156 [2018-01-29 23:38:53,471 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:38:53,471 INFO L350 BasicCegarLoop]: trace histogram [18, 18, 17, 17, 17, 17, 17, 17, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:38:53,472 INFO L371 AbstractCegarLoop]: === Iteration 19 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:38:53,472 INFO L82 PathProgramCache]: Analyzing trace with hash 57021360, now seen corresponding path program 17 times [2018-01-29 23:38:53,472 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:38:53,472 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:38:53,472 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:53,472 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:38:53,472 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:53,478 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:53,478 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:38:53,675 INFO L134 CoverageAnalysis]: Checked inductivity of 1156 backedges. 0 proven. 578 refuted. 0 times theorem prover too weak. 578 trivial. 0 not checked. [2018-01-29 23:38:53,675 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:38:53,675 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 18 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:38:53,679 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-29 23:38:53,683 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:53,684 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:53,685 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:53,686 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:53,687 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:53,689 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:53,690 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:53,692 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:53,694 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:53,696 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:53,698 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:53,701 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:53,704 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:53,708 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:53,724 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:53,737 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:53,750 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:53,771 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:53,772 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:38:53,774 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:38:53,787 INFO L134 CoverageAnalysis]: Checked inductivity of 1156 backedges. 0 proven. 578 refuted. 0 times theorem prover too weak. 578 trivial. 0 not checked. [2018-01-29 23:38:53,804 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:38:53,804 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [20, 20] total 20 [2018-01-29 23:38:53,805 INFO L409 AbstractCegarLoop]: Interpolant automaton has 20 states [2018-01-29 23:38:53,805 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 20 interpolants. [2018-01-29 23:38:53,805 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=190, Invalid=190, Unknown=0, NotChecked=0, Total=380 [2018-01-29 23:38:53,805 INFO L87 Difference]: Start difference. First operand 161 states and 164 transitions. Second operand 20 states. [2018-01-29 23:38:53,948 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:38:53,948 INFO L93 Difference]: Finished difference Result 258 states and 265 transitions. [2018-01-29 23:38:53,952 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 20 states. [2018-01-29 23:38:53,952 INFO L78 Accepts]: Start accepts. Automaton has 20 states. Word has length 155 [2018-01-29 23:38:53,952 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:38:53,953 INFO L225 Difference]: With dead ends: 258 [2018-01-29 23:38:53,953 INFO L226 Difference]: Without dead ends: 173 [2018-01-29 23:38:53,953 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 174 GetRequests, 156 SyntacticMatches, 0 SemanticMatches, 18 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=190, Invalid=190, Unknown=0, NotChecked=0, Total=380 [2018-01-29 23:38:53,953 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 173 states. [2018-01-29 23:38:53,955 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 173 to 169. [2018-01-29 23:38:53,955 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 169 states. [2018-01-29 23:38:53,955 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 169 states to 169 states and 172 transitions. [2018-01-29 23:38:53,955 INFO L78 Accepts]: Start accepts. Automaton has 169 states and 172 transitions. Word has length 155 [2018-01-29 23:38:53,956 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:38:53,956 INFO L432 AbstractCegarLoop]: Abstraction has 169 states and 172 transitions. [2018-01-29 23:38:53,956 INFO L433 AbstractCegarLoop]: Interpolant automaton has 20 states. [2018-01-29 23:38:53,956 INFO L276 IsEmpty]: Start isEmpty. Operand 169 states and 172 transitions. [2018-01-29 23:38:53,956 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 164 [2018-01-29 23:38:53,956 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:38:53,956 INFO L350 BasicCegarLoop]: trace histogram [19, 19, 18, 18, 18, 18, 18, 18, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:38:53,956 INFO L371 AbstractCegarLoop]: === Iteration 20 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:38:53,957 INFO L82 PathProgramCache]: Analyzing trace with hash -1764513200, now seen corresponding path program 18 times [2018-01-29 23:38:53,957 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:38:53,957 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:38:53,957 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:53,957 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:38:53,957 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:53,963 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:53,963 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:38:54,500 INFO L134 CoverageAnalysis]: Checked inductivity of 1296 backedges. 0 proven. 648 refuted. 0 times theorem prover too weak. 648 trivial. 0 not checked. [2018-01-29 23:38:54,501 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:38:54,501 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 19 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:38:54,505 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-29 23:38:54,510 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:54,511 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:54,512 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:54,513 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:54,514 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:54,515 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:54,516 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:54,518 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:54,519 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:54,521 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:54,523 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:54,524 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:54,527 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:54,529 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:54,531 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:54,534 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:54,555 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:54,561 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:54,566 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:54,567 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:38:54,568 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:38:54,583 INFO L134 CoverageAnalysis]: Checked inductivity of 1296 backedges. 0 proven. 648 refuted. 0 times theorem prover too weak. 648 trivial. 0 not checked. [2018-01-29 23:38:54,603 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:38:54,603 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [21, 21] total 21 [2018-01-29 23:38:54,603 INFO L409 AbstractCegarLoop]: Interpolant automaton has 21 states [2018-01-29 23:38:54,603 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 21 interpolants. [2018-01-29 23:38:54,603 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=210, Invalid=210, Unknown=0, NotChecked=0, Total=420 [2018-01-29 23:38:54,604 INFO L87 Difference]: Start difference. First operand 169 states and 172 transitions. Second operand 21 states. [2018-01-29 23:38:54,734 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:38:54,734 INFO L93 Difference]: Finished difference Result 270 states and 277 transitions. [2018-01-29 23:38:54,736 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 21 states. [2018-01-29 23:38:54,736 INFO L78 Accepts]: Start accepts. Automaton has 21 states. Word has length 163 [2018-01-29 23:38:54,736 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:38:54,736 INFO L225 Difference]: With dead ends: 270 [2018-01-29 23:38:54,737 INFO L226 Difference]: Without dead ends: 181 [2018-01-29 23:38:54,737 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 183 GetRequests, 164 SyntacticMatches, 0 SemanticMatches, 19 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=210, Invalid=210, Unknown=0, NotChecked=0, Total=420 [2018-01-29 23:38:54,737 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 181 states. [2018-01-29 23:38:54,739 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 181 to 177. [2018-01-29 23:38:54,739 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 177 states. [2018-01-29 23:38:54,739 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 177 states to 177 states and 180 transitions. [2018-01-29 23:38:54,739 INFO L78 Accepts]: Start accepts. Automaton has 177 states and 180 transitions. Word has length 163 [2018-01-29 23:38:54,740 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:38:54,740 INFO L432 AbstractCegarLoop]: Abstraction has 177 states and 180 transitions. [2018-01-29 23:38:54,740 INFO L433 AbstractCegarLoop]: Interpolant automaton has 21 states. [2018-01-29 23:38:54,740 INFO L276 IsEmpty]: Start isEmpty. Operand 177 states and 180 transitions. [2018-01-29 23:38:54,740 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 172 [2018-01-29 23:38:54,740 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:38:54,740 INFO L350 BasicCegarLoop]: trace histogram [20, 20, 19, 19, 19, 19, 19, 19, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:38:54,740 INFO L371 AbstractCegarLoop]: === Iteration 21 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:38:54,741 INFO L82 PathProgramCache]: Analyzing trace with hash -1605720080, now seen corresponding path program 19 times [2018-01-29 23:38:54,741 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:38:54,741 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:38:54,741 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:54,741 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:38:54,741 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:54,747 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:54,748 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:38:55,001 INFO L134 CoverageAnalysis]: Checked inductivity of 1444 backedges. 0 proven. 722 refuted. 0 times theorem prover too weak. 722 trivial. 0 not checked. [2018-01-29 23:38:55,001 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:38:55,001 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 20 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:38:55,005 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:38:55,019 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:55,020 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:38:55,041 INFO L134 CoverageAnalysis]: Checked inductivity of 1444 backedges. 0 proven. 722 refuted. 0 times theorem prover too weak. 722 trivial. 0 not checked. [2018-01-29 23:38:55,058 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:38:55,058 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [22, 22] total 22 [2018-01-29 23:38:55,058 INFO L409 AbstractCegarLoop]: Interpolant automaton has 22 states [2018-01-29 23:38:55,059 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 22 interpolants. [2018-01-29 23:38:55,059 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=231, Invalid=231, Unknown=0, NotChecked=0, Total=462 [2018-01-29 23:38:55,059 INFO L87 Difference]: Start difference. First operand 177 states and 180 transitions. Second operand 22 states. [2018-01-29 23:38:55,206 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:38:55,206 INFO L93 Difference]: Finished difference Result 282 states and 289 transitions. [2018-01-29 23:38:55,206 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 22 states. [2018-01-29 23:38:55,206 INFO L78 Accepts]: Start accepts. Automaton has 22 states. Word has length 171 [2018-01-29 23:38:55,207 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:38:55,207 INFO L225 Difference]: With dead ends: 282 [2018-01-29 23:38:55,207 INFO L226 Difference]: Without dead ends: 189 [2018-01-29 23:38:55,208 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 192 GetRequests, 172 SyntacticMatches, 0 SemanticMatches, 20 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=231, Invalid=231, Unknown=0, NotChecked=0, Total=462 [2018-01-29 23:38:55,208 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 189 states. [2018-01-29 23:38:55,210 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 189 to 185. [2018-01-29 23:38:55,211 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 185 states. [2018-01-29 23:38:55,211 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 185 states to 185 states and 188 transitions. [2018-01-29 23:38:55,211 INFO L78 Accepts]: Start accepts. Automaton has 185 states and 188 transitions. Word has length 171 [2018-01-29 23:38:55,211 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:38:55,211 INFO L432 AbstractCegarLoop]: Abstraction has 185 states and 188 transitions. [2018-01-29 23:38:55,211 INFO L433 AbstractCegarLoop]: Interpolant automaton has 22 states. [2018-01-29 23:38:55,211 INFO L276 IsEmpty]: Start isEmpty. Operand 185 states and 188 transitions. [2018-01-29 23:38:55,212 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 180 [2018-01-29 23:38:55,212 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:38:55,212 INFO L350 BasicCegarLoop]: trace histogram [21, 21, 20, 20, 20, 20, 20, 20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:38:55,212 INFO L371 AbstractCegarLoop]: === Iteration 22 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:38:55,212 INFO L82 PathProgramCache]: Analyzing trace with hash -988246896, now seen corresponding path program 20 times [2018-01-29 23:38:55,212 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:38:55,212 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:38:55,216 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:55,217 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:38:55,217 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:55,225 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:55,225 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:38:55,437 INFO L134 CoverageAnalysis]: Checked inductivity of 1600 backedges. 0 proven. 800 refuted. 0 times theorem prover too weak. 800 trivial. 0 not checked. [2018-01-29 23:38:55,437 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:38:55,437 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 21 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:38:55,441 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-29 23:38:55,446 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:55,453 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:55,455 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:38:55,457 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:38:55,474 INFO L134 CoverageAnalysis]: Checked inductivity of 1600 backedges. 0 proven. 800 refuted. 0 times theorem prover too weak. 800 trivial. 0 not checked. [2018-01-29 23:38:55,492 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:38:55,492 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [23, 23] total 23 [2018-01-29 23:38:55,492 INFO L409 AbstractCegarLoop]: Interpolant automaton has 23 states [2018-01-29 23:38:55,492 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 23 interpolants. [2018-01-29 23:38:55,492 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=253, Invalid=253, Unknown=0, NotChecked=0, Total=506 [2018-01-29 23:38:55,492 INFO L87 Difference]: Start difference. First operand 185 states and 188 transitions. Second operand 23 states. [2018-01-29 23:38:56,411 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:38:56,411 INFO L93 Difference]: Finished difference Result 294 states and 301 transitions. [2018-01-29 23:38:56,414 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 23 states. [2018-01-29 23:38:56,415 INFO L78 Accepts]: Start accepts. Automaton has 23 states. Word has length 179 [2018-01-29 23:38:56,415 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:38:56,415 INFO L225 Difference]: With dead ends: 294 [2018-01-29 23:38:56,415 INFO L226 Difference]: Without dead ends: 197 [2018-01-29 23:38:56,416 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 201 GetRequests, 180 SyntacticMatches, 0 SemanticMatches, 21 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=253, Invalid=253, Unknown=0, NotChecked=0, Total=506 [2018-01-29 23:38:56,416 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 197 states. [2018-01-29 23:38:56,417 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 197 to 193. [2018-01-29 23:38:56,417 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 193 states. [2018-01-29 23:38:56,418 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 193 states to 193 states and 196 transitions. [2018-01-29 23:38:56,418 INFO L78 Accepts]: Start accepts. Automaton has 193 states and 196 transitions. Word has length 179 [2018-01-29 23:38:56,418 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:38:56,418 INFO L432 AbstractCegarLoop]: Abstraction has 193 states and 196 transitions. [2018-01-29 23:38:56,418 INFO L433 AbstractCegarLoop]: Interpolant automaton has 23 states. [2018-01-29 23:38:56,418 INFO L276 IsEmpty]: Start isEmpty. Operand 193 states and 196 transitions. [2018-01-29 23:38:56,419 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 188 [2018-01-29 23:38:56,419 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:38:56,419 INFO L350 BasicCegarLoop]: trace histogram [22, 22, 21, 21, 21, 21, 21, 21, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:38:56,419 INFO L371 AbstractCegarLoop]: === Iteration 23 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:38:56,419 INFO L82 PathProgramCache]: Analyzing trace with hash -557131728, now seen corresponding path program 21 times [2018-01-29 23:38:56,419 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:38:56,419 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:38:56,420 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:56,420 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:38:56,420 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:56,426 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:56,427 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:38:57,157 INFO L134 CoverageAnalysis]: Checked inductivity of 1764 backedges. 0 proven. 882 refuted. 0 times theorem prover too weak. 882 trivial. 0 not checked. [2018-01-29 23:38:57,157 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:38:57,157 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 22 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:38:57,163 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-29 23:38:57,169 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:57,170 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:57,171 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:57,172 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:57,173 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:57,174 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:57,176 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:57,178 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:57,180 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:57,182 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:57,184 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:57,187 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:57,190 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:57,194 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:57,197 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:57,202 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:57,206 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:57,211 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:57,217 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:57,223 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:57,229 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:57,237 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:38:57,237 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:38:57,239 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:38:57,261 INFO L134 CoverageAnalysis]: Checked inductivity of 1764 backedges. 0 proven. 882 refuted. 0 times theorem prover too weak. 882 trivial. 0 not checked. [2018-01-29 23:38:57,278 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:38:57,278 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [24, 24] total 24 [2018-01-29 23:38:57,278 INFO L409 AbstractCegarLoop]: Interpolant automaton has 24 states [2018-01-29 23:38:57,279 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 24 interpolants. [2018-01-29 23:38:57,279 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=276, Invalid=276, Unknown=0, NotChecked=0, Total=552 [2018-01-29 23:38:57,279 INFO L87 Difference]: Start difference. First operand 193 states and 196 transitions. Second operand 24 states. [2018-01-29 23:38:57,397 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:38:57,397 INFO L93 Difference]: Finished difference Result 306 states and 313 transitions. [2018-01-29 23:38:57,398 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 24 states. [2018-01-29 23:38:57,398 INFO L78 Accepts]: Start accepts. Automaton has 24 states. Word has length 187 [2018-01-29 23:38:57,398 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:38:57,398 INFO L225 Difference]: With dead ends: 306 [2018-01-29 23:38:57,398 INFO L226 Difference]: Without dead ends: 205 [2018-01-29 23:38:57,399 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 210 GetRequests, 188 SyntacticMatches, 0 SemanticMatches, 22 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=276, Invalid=276, Unknown=0, NotChecked=0, Total=552 [2018-01-29 23:38:57,399 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 205 states. [2018-01-29 23:38:57,401 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 205 to 201. [2018-01-29 23:38:57,401 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 201 states. [2018-01-29 23:38:57,401 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 201 states to 201 states and 204 transitions. [2018-01-29 23:38:57,401 INFO L78 Accepts]: Start accepts. Automaton has 201 states and 204 transitions. Word has length 187 [2018-01-29 23:38:57,401 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:38:57,401 INFO L432 AbstractCegarLoop]: Abstraction has 201 states and 204 transitions. [2018-01-29 23:38:57,401 INFO L433 AbstractCegarLoop]: Interpolant automaton has 24 states. [2018-01-29 23:38:57,401 INFO L276 IsEmpty]: Start isEmpty. Operand 201 states and 204 transitions. [2018-01-29 23:38:57,402 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 196 [2018-01-29 23:38:57,402 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:38:57,402 INFO L350 BasicCegarLoop]: trace histogram [23, 23, 22, 22, 22, 22, 22, 22, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:38:57,402 INFO L371 AbstractCegarLoop]: === Iteration 24 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:38:57,402 INFO L82 PathProgramCache]: Analyzing trace with hash -617674032, now seen corresponding path program 22 times [2018-01-29 23:38:57,402 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:38:57,402 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:38:57,403 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:57,403 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:38:57,403 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:57,408 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:57,409 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:38:57,899 INFO L134 CoverageAnalysis]: Checked inductivity of 1936 backedges. 0 proven. 968 refuted. 0 times theorem prover too weak. 968 trivial. 0 not checked. [2018-01-29 23:38:57,900 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:38:57,900 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 23 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:38:57,909 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-29 23:38:57,924 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:38:57,926 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:38:57,945 INFO L134 CoverageAnalysis]: Checked inductivity of 1936 backedges. 0 proven. 968 refuted. 0 times theorem prover too weak. 968 trivial. 0 not checked. [2018-01-29 23:38:57,962 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:38:57,962 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [25, 25] total 25 [2018-01-29 23:38:57,962 INFO L409 AbstractCegarLoop]: Interpolant automaton has 25 states [2018-01-29 23:38:57,962 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 25 interpolants. [2018-01-29 23:38:57,962 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2018-01-29 23:38:57,962 INFO L87 Difference]: Start difference. First operand 201 states and 204 transitions. Second operand 25 states. [2018-01-29 23:38:58,169 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:38:58,169 INFO L93 Difference]: Finished difference Result 318 states and 325 transitions. [2018-01-29 23:38:58,170 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 25 states. [2018-01-29 23:38:58,170 INFO L78 Accepts]: Start accepts. Automaton has 25 states. Word has length 195 [2018-01-29 23:38:58,170 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:38:58,170 INFO L225 Difference]: With dead ends: 318 [2018-01-29 23:38:58,170 INFO L226 Difference]: Without dead ends: 213 [2018-01-29 23:38:58,171 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 219 GetRequests, 196 SyntacticMatches, 0 SemanticMatches, 23 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=300, Invalid=300, Unknown=0, NotChecked=0, Total=600 [2018-01-29 23:38:58,171 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 213 states. [2018-01-29 23:38:58,172 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 213 to 209. [2018-01-29 23:38:58,172 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 209 states. [2018-01-29 23:38:58,173 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 209 states to 209 states and 212 transitions. [2018-01-29 23:38:58,173 INFO L78 Accepts]: Start accepts. Automaton has 209 states and 212 transitions. Word has length 195 [2018-01-29 23:38:58,173 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:38:58,173 INFO L432 AbstractCegarLoop]: Abstraction has 209 states and 212 transitions. [2018-01-29 23:38:58,173 INFO L433 AbstractCegarLoop]: Interpolant automaton has 25 states. [2018-01-29 23:38:58,173 INFO L276 IsEmpty]: Start isEmpty. Operand 209 states and 212 transitions. [2018-01-29 23:38:58,174 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 204 [2018-01-29 23:38:58,174 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:38:58,174 INFO L350 BasicCegarLoop]: trace histogram [24, 24, 23, 23, 23, 23, 23, 23, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:38:58,174 INFO L371 AbstractCegarLoop]: === Iteration 25 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:38:58,174 INFO L82 PathProgramCache]: Analyzing trace with hash -1672305552, now seen corresponding path program 23 times [2018-01-29 23:38:58,174 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:38:58,174 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:38:58,175 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:58,175 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:38:58,175 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:58,180 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:58,181 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:38:58,434 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 1058 refuted. 0 times theorem prover too weak. 1058 trivial. 0 not checked. [2018-01-29 23:38:58,435 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:38:58,435 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 24 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:38:58,439 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-29 23:38:58,443 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:58,457 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:58,458 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:58,459 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:58,460 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:58,461 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:58,462 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:58,464 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:58,466 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:58,468 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:58,471 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:58,473 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:58,477 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:58,480 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:58,484 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:58,489 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:58,494 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:58,500 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:58,506 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:58,513 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:58,521 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:58,530 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:58,540 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:58,585 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:38:58,586 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:38:58,588 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:38:58,607 INFO L134 CoverageAnalysis]: Checked inductivity of 2116 backedges. 0 proven. 1058 refuted. 0 times theorem prover too weak. 1058 trivial. 0 not checked. [2018-01-29 23:38:58,624 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:38:58,624 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [26, 26] total 26 [2018-01-29 23:38:58,625 INFO L409 AbstractCegarLoop]: Interpolant automaton has 26 states [2018-01-29 23:38:58,625 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 26 interpolants. [2018-01-29 23:38:58,625 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=325, Invalid=325, Unknown=0, NotChecked=0, Total=650 [2018-01-29 23:38:58,625 INFO L87 Difference]: Start difference. First operand 209 states and 212 transitions. Second operand 26 states. [2018-01-29 23:38:58,731 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:38:58,731 INFO L93 Difference]: Finished difference Result 330 states and 337 transitions. [2018-01-29 23:38:58,731 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 26 states. [2018-01-29 23:38:58,731 INFO L78 Accepts]: Start accepts. Automaton has 26 states. Word has length 203 [2018-01-29 23:38:58,731 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:38:58,732 INFO L225 Difference]: With dead ends: 330 [2018-01-29 23:38:58,732 INFO L226 Difference]: Without dead ends: 221 [2018-01-29 23:38:58,732 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 228 GetRequests, 204 SyntacticMatches, 0 SemanticMatches, 24 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.1s TimeCoverageRelationStatistics Valid=325, Invalid=325, Unknown=0, NotChecked=0, Total=650 [2018-01-29 23:38:58,732 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 221 states. [2018-01-29 23:38:58,734 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 221 to 217. [2018-01-29 23:38:58,734 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 217 states. [2018-01-29 23:38:58,735 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 217 states to 217 states and 220 transitions. [2018-01-29 23:38:58,735 INFO L78 Accepts]: Start accepts. Automaton has 217 states and 220 transitions. Word has length 203 [2018-01-29 23:38:58,735 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:38:58,735 INFO L432 AbstractCegarLoop]: Abstraction has 217 states and 220 transitions. [2018-01-29 23:38:58,735 INFO L433 AbstractCegarLoop]: Interpolant automaton has 26 states. [2018-01-29 23:38:58,735 INFO L276 IsEmpty]: Start isEmpty. Operand 217 states and 220 transitions. [2018-01-29 23:38:58,735 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 212 [2018-01-29 23:38:58,735 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:38:58,736 INFO L350 BasicCegarLoop]: trace histogram [25, 25, 24, 24, 24, 24, 24, 24, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:38:58,736 INFO L371 AbstractCegarLoop]: === Iteration 26 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:38:58,736 INFO L82 PathProgramCache]: Analyzing trace with hash -662493936, now seen corresponding path program 24 times [2018-01-29 23:38:58,736 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:38:58,736 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:38:58,736 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:58,736 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:38:58,736 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:38:58,742 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:38:58,742 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:38:59,423 INFO L134 CoverageAnalysis]: Checked inductivity of 2304 backedges. 0 proven. 1152 refuted. 0 times theorem prover too weak. 1152 trivial. 0 not checked. [2018-01-29 23:38:59,424 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:38:59,424 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 25 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:38:59,428 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-29 23:38:59,433 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:59,440 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:59,450 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:59,459 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:59,468 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:59,480 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:59,487 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:59,496 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:59,510 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:59,517 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:59,526 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:59,535 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:59,545 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:59,554 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:59,564 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:59,573 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:59,583 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:59,592 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:59,602 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:59,605 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:59,609 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:59,614 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:59,619 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:59,754 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:59,824 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:38:59,824 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:38:59,828 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:38:59,849 INFO L134 CoverageAnalysis]: Checked inductivity of 2304 backedges. 0 proven. 1152 refuted. 0 times theorem prover too weak. 1152 trivial. 0 not checked. [2018-01-29 23:38:59,867 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:38:59,867 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [27, 27] total 27 [2018-01-29 23:38:59,867 INFO L409 AbstractCegarLoop]: Interpolant automaton has 27 states [2018-01-29 23:38:59,867 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 27 interpolants. [2018-01-29 23:38:59,868 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=351, Invalid=351, Unknown=0, NotChecked=0, Total=702 [2018-01-29 23:38:59,868 INFO L87 Difference]: Start difference. First operand 217 states and 220 transitions. Second operand 27 states. [2018-01-29 23:39:00,009 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:00,009 INFO L93 Difference]: Finished difference Result 342 states and 349 transitions. [2018-01-29 23:39:00,009 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 27 states. [2018-01-29 23:39:00,009 INFO L78 Accepts]: Start accepts. Automaton has 27 states. Word has length 211 [2018-01-29 23:39:00,009 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:00,010 INFO L225 Difference]: With dead ends: 342 [2018-01-29 23:39:00,010 INFO L226 Difference]: Without dead ends: 229 [2018-01-29 23:39:00,010 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 237 GetRequests, 212 SyntacticMatches, 0 SemanticMatches, 25 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=351, Invalid=351, Unknown=0, NotChecked=0, Total=702 [2018-01-29 23:39:00,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 229 states. [2018-01-29 23:39:00,012 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 229 to 225. [2018-01-29 23:39:00,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 225 states. [2018-01-29 23:39:00,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 225 states to 225 states and 228 transitions. [2018-01-29 23:39:00,013 INFO L78 Accepts]: Start accepts. Automaton has 225 states and 228 transitions. Word has length 211 [2018-01-29 23:39:00,013 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:00,013 INFO L432 AbstractCegarLoop]: Abstraction has 225 states and 228 transitions. [2018-01-29 23:39:00,013 INFO L433 AbstractCegarLoop]: Interpolant automaton has 27 states. [2018-01-29 23:39:00,013 INFO L276 IsEmpty]: Start isEmpty. Operand 225 states and 228 transitions. [2018-01-29 23:39:00,013 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 220 [2018-01-29 23:39:00,013 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:00,014 INFO L350 BasicCegarLoop]: trace histogram [26, 26, 25, 25, 25, 25, 25, 25, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:00,014 INFO L371 AbstractCegarLoop]: === Iteration 27 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:00,014 INFO L82 PathProgramCache]: Analyzing trace with hash -95548240, now seen corresponding path program 25 times [2018-01-29 23:39:00,014 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:00,014 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:00,014 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:00,014 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:00,014 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:00,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:00,021 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:00,344 INFO L134 CoverageAnalysis]: Checked inductivity of 2500 backedges. 0 proven. 1250 refuted. 0 times theorem prover too weak. 1250 trivial. 0 not checked. [2018-01-29 23:39:00,345 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:00,345 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 26 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:00,350 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:39:00,375 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:00,377 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:00,405 INFO L134 CoverageAnalysis]: Checked inductivity of 2500 backedges. 0 proven. 1250 refuted. 0 times theorem prover too weak. 1250 trivial. 0 not checked. [2018-01-29 23:39:00,424 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:00,424 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [28, 28] total 28 [2018-01-29 23:39:00,424 INFO L409 AbstractCegarLoop]: Interpolant automaton has 28 states [2018-01-29 23:39:00,424 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 28 interpolants. [2018-01-29 23:39:00,424 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=378, Invalid=378, Unknown=0, NotChecked=0, Total=756 [2018-01-29 23:39:00,424 INFO L87 Difference]: Start difference. First operand 225 states and 228 transitions. Second operand 28 states. [2018-01-29 23:39:00,573 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:00,573 INFO L93 Difference]: Finished difference Result 354 states and 361 transitions. [2018-01-29 23:39:00,573 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 28 states. [2018-01-29 23:39:00,573 INFO L78 Accepts]: Start accepts. Automaton has 28 states. Word has length 219 [2018-01-29 23:39:00,574 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:00,574 INFO L225 Difference]: With dead ends: 354 [2018-01-29 23:39:00,574 INFO L226 Difference]: Without dead ends: 237 [2018-01-29 23:39:00,575 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 246 GetRequests, 220 SyntacticMatches, 0 SemanticMatches, 26 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=378, Invalid=378, Unknown=0, NotChecked=0, Total=756 [2018-01-29 23:39:00,575 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 237 states. [2018-01-29 23:39:00,577 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 237 to 233. [2018-01-29 23:39:00,577 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 233 states. [2018-01-29 23:39:00,577 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 233 states to 233 states and 236 transitions. [2018-01-29 23:39:00,577 INFO L78 Accepts]: Start accepts. Automaton has 233 states and 236 transitions. Word has length 219 [2018-01-29 23:39:00,577 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:00,577 INFO L432 AbstractCegarLoop]: Abstraction has 233 states and 236 transitions. [2018-01-29 23:39:00,578 INFO L433 AbstractCegarLoop]: Interpolant automaton has 28 states. [2018-01-29 23:39:00,578 INFO L276 IsEmpty]: Start isEmpty. Operand 233 states and 236 transitions. [2018-01-29 23:39:00,578 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 228 [2018-01-29 23:39:00,578 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:00,578 INFO L350 BasicCegarLoop]: trace histogram [27, 27, 26, 26, 26, 26, 26, 26, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:00,578 INFO L371 AbstractCegarLoop]: === Iteration 28 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:00,579 INFO L82 PathProgramCache]: Analyzing trace with hash 8444752, now seen corresponding path program 26 times [2018-01-29 23:39:00,579 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:00,579 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:00,579 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:00,579 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:39:00,579 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:00,586 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:00,586 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:01,159 INFO L134 CoverageAnalysis]: Checked inductivity of 2704 backedges. 0 proven. 1352 refuted. 0 times theorem prover too weak. 1352 trivial. 0 not checked. [2018-01-29 23:39:01,159 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:01,159 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 27 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:01,168 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-29 23:39:01,173 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:01,184 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:01,186 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:01,188 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:01,210 INFO L134 CoverageAnalysis]: Checked inductivity of 2704 backedges. 0 proven. 1352 refuted. 0 times theorem prover too weak. 1352 trivial. 0 not checked. [2018-01-29 23:39:01,237 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:01,237 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [29, 29] total 29 [2018-01-29 23:39:01,238 INFO L409 AbstractCegarLoop]: Interpolant automaton has 29 states [2018-01-29 23:39:01,238 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 29 interpolants. [2018-01-29 23:39:01,238 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=406, Invalid=406, Unknown=0, NotChecked=0, Total=812 [2018-01-29 23:39:01,238 INFO L87 Difference]: Start difference. First operand 233 states and 236 transitions. Second operand 29 states. [2018-01-29 23:39:01,411 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:01,411 INFO L93 Difference]: Finished difference Result 366 states and 373 transitions. [2018-01-29 23:39:01,415 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 29 states. [2018-01-29 23:39:01,415 INFO L78 Accepts]: Start accepts. Automaton has 29 states. Word has length 227 [2018-01-29 23:39:01,415 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:01,416 INFO L225 Difference]: With dead ends: 366 [2018-01-29 23:39:01,416 INFO L226 Difference]: Without dead ends: 245 [2018-01-29 23:39:01,416 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 255 GetRequests, 228 SyntacticMatches, 0 SemanticMatches, 27 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=406, Invalid=406, Unknown=0, NotChecked=0, Total=812 [2018-01-29 23:39:01,416 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 245 states. [2018-01-29 23:39:01,418 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 245 to 241. [2018-01-29 23:39:01,419 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 241 states. [2018-01-29 23:39:01,419 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 241 states to 241 states and 244 transitions. [2018-01-29 23:39:01,419 INFO L78 Accepts]: Start accepts. Automaton has 241 states and 244 transitions. Word has length 227 [2018-01-29 23:39:01,419 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:01,419 INFO L432 AbstractCegarLoop]: Abstraction has 241 states and 244 transitions. [2018-01-29 23:39:01,419 INFO L433 AbstractCegarLoop]: Interpolant automaton has 29 states. [2018-01-29 23:39:01,419 INFO L276 IsEmpty]: Start isEmpty. Operand 241 states and 244 transitions. [2018-01-29 23:39:01,420 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 236 [2018-01-29 23:39:01,420 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:01,420 INFO L350 BasicCegarLoop]: trace histogram [28, 28, 27, 27, 27, 27, 27, 27, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:01,420 INFO L371 AbstractCegarLoop]: === Iteration 29 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:01,420 INFO L82 PathProgramCache]: Analyzing trace with hash 1579749616, now seen corresponding path program 27 times [2018-01-29 23:39:01,420 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:01,420 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:01,421 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:01,421 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:01,421 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:01,427 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:01,427 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:02,497 INFO L134 CoverageAnalysis]: Checked inductivity of 2916 backedges. 0 proven. 1458 refuted. 0 times theorem prover too weak. 1458 trivial. 0 not checked. [2018-01-29 23:39:02,497 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:02,497 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 28 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:02,502 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-29 23:39:02,508 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:02,509 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:02,510 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:02,511 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:02,512 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:02,513 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:02,515 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:02,516 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:02,518 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:02,520 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:02,522 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:02,525 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:02,528 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:02,531 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:02,535 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:02,539 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:02,544 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:02,548 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:02,554 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:02,560 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:02,567 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:02,576 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:02,585 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:02,595 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:02,605 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:02,618 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:02,630 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:02,646 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:02,647 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:02,649 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:02,673 INFO L134 CoverageAnalysis]: Checked inductivity of 2916 backedges. 0 proven. 1458 refuted. 0 times theorem prover too weak. 1458 trivial. 0 not checked. [2018-01-29 23:39:02,691 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:02,691 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [30, 30] total 30 [2018-01-29 23:39:02,691 INFO L409 AbstractCegarLoop]: Interpolant automaton has 30 states [2018-01-29 23:39:02,692 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 30 interpolants. [2018-01-29 23:39:02,692 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=435, Invalid=435, Unknown=0, NotChecked=0, Total=870 [2018-01-29 23:39:02,692 INFO L87 Difference]: Start difference. First operand 241 states and 244 transitions. Second operand 30 states. [2018-01-29 23:39:03,949 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:03,949 INFO L93 Difference]: Finished difference Result 378 states and 385 transitions. [2018-01-29 23:39:03,949 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 30 states. [2018-01-29 23:39:03,949 INFO L78 Accepts]: Start accepts. Automaton has 30 states. Word has length 235 [2018-01-29 23:39:03,950 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:03,950 INFO L225 Difference]: With dead ends: 378 [2018-01-29 23:39:03,950 INFO L226 Difference]: Without dead ends: 253 [2018-01-29 23:39:03,951 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 264 GetRequests, 236 SyntacticMatches, 0 SemanticMatches, 28 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=435, Invalid=435, Unknown=0, NotChecked=0, Total=870 [2018-01-29 23:39:03,951 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 253 states. [2018-01-29 23:39:03,952 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 253 to 249. [2018-01-29 23:39:03,952 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 249 states. [2018-01-29 23:39:03,954 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 249 states to 249 states and 252 transitions. [2018-01-29 23:39:03,954 INFO L78 Accepts]: Start accepts. Automaton has 249 states and 252 transitions. Word has length 235 [2018-01-29 23:39:03,954 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:03,954 INFO L432 AbstractCegarLoop]: Abstraction has 249 states and 252 transitions. [2018-01-29 23:39:03,954 INFO L433 AbstractCegarLoop]: Interpolant automaton has 30 states. [2018-01-29 23:39:03,954 INFO L276 IsEmpty]: Start isEmpty. Operand 249 states and 252 transitions. [2018-01-29 23:39:03,955 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 244 [2018-01-29 23:39:03,955 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:03,955 INFO L350 BasicCegarLoop]: trace histogram [29, 29, 28, 28, 28, 28, 28, 28, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:03,955 INFO L371 AbstractCegarLoop]: === Iteration 30 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:03,955 INFO L82 PathProgramCache]: Analyzing trace with hash -627823216, now seen corresponding path program 28 times [2018-01-29 23:39:03,955 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:03,955 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:03,955 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:03,955 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:03,955 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:03,962 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:03,963 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:04,470 INFO L134 CoverageAnalysis]: Checked inductivity of 3136 backedges. 0 proven. 1568 refuted. 0 times theorem prover too weak. 1568 trivial. 0 not checked. [2018-01-29 23:39:04,470 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:04,470 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 29 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:04,476 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-29 23:39:04,497 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:04,499 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:04,523 INFO L134 CoverageAnalysis]: Checked inductivity of 3136 backedges. 0 proven. 1568 refuted. 0 times theorem prover too weak. 1568 trivial. 0 not checked. [2018-01-29 23:39:04,540 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:04,540 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [31, 31] total 31 [2018-01-29 23:39:04,540 INFO L409 AbstractCegarLoop]: Interpolant automaton has 31 states [2018-01-29 23:39:04,540 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 31 interpolants. [2018-01-29 23:39:04,541 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=465, Invalid=465, Unknown=0, NotChecked=0, Total=930 [2018-01-29 23:39:04,541 INFO L87 Difference]: Start difference. First operand 249 states and 252 transitions. Second operand 31 states. [2018-01-29 23:39:04,684 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:04,684 INFO L93 Difference]: Finished difference Result 390 states and 397 transitions. [2018-01-29 23:39:04,684 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 31 states. [2018-01-29 23:39:04,684 INFO L78 Accepts]: Start accepts. Automaton has 31 states. Word has length 243 [2018-01-29 23:39:04,685 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:04,685 INFO L225 Difference]: With dead ends: 390 [2018-01-29 23:39:04,685 INFO L226 Difference]: Without dead ends: 261 [2018-01-29 23:39:04,686 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 273 GetRequests, 244 SyntacticMatches, 0 SemanticMatches, 29 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=465, Invalid=465, Unknown=0, NotChecked=0, Total=930 [2018-01-29 23:39:04,686 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 261 states. [2018-01-29 23:39:04,688 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 261 to 257. [2018-01-29 23:39:04,688 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 257 states. [2018-01-29 23:39:04,689 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 257 states to 257 states and 260 transitions. [2018-01-29 23:39:04,689 INFO L78 Accepts]: Start accepts. Automaton has 257 states and 260 transitions. Word has length 243 [2018-01-29 23:39:04,689 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:04,689 INFO L432 AbstractCegarLoop]: Abstraction has 257 states and 260 transitions. [2018-01-29 23:39:04,689 INFO L433 AbstractCegarLoop]: Interpolant automaton has 31 states. [2018-01-29 23:39:04,689 INFO L276 IsEmpty]: Start isEmpty. Operand 257 states and 260 transitions. [2018-01-29 23:39:04,690 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 252 [2018-01-29 23:39:04,690 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:04,690 INFO L350 BasicCegarLoop]: trace histogram [30, 30, 29, 29, 29, 29, 29, 29, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:04,690 INFO L371 AbstractCegarLoop]: === Iteration 31 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:04,690 INFO L82 PathProgramCache]: Analyzing trace with hash 1901048112, now seen corresponding path program 29 times [2018-01-29 23:39:04,690 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:04,691 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:04,691 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:04,691 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:04,691 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:04,697 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:04,698 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:05,083 INFO L134 CoverageAnalysis]: Checked inductivity of 3364 backedges. 0 proven. 1682 refuted. 0 times theorem prover too weak. 1682 trivial. 0 not checked. [2018-01-29 23:39:05,084 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:05,084 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 30 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:05,088 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-29 23:39:05,095 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,096 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,097 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,098 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,099 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,100 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,102 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,103 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,105 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,107 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,110 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,112 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,116 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,119 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,123 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,128 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,133 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,139 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,145 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,153 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,161 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,169 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,179 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,191 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,204 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,218 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,234 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,252 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,272 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,356 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:05,357 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:05,360 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:05,389 INFO L134 CoverageAnalysis]: Checked inductivity of 3364 backedges. 0 proven. 1682 refuted. 0 times theorem prover too weak. 1682 trivial. 0 not checked. [2018-01-29 23:39:05,408 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:05,408 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [32, 32] total 32 [2018-01-29 23:39:05,408 INFO L409 AbstractCegarLoop]: Interpolant automaton has 32 states [2018-01-29 23:39:05,409 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 32 interpolants. [2018-01-29 23:39:05,409 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=496, Invalid=496, Unknown=0, NotChecked=0, Total=992 [2018-01-29 23:39:05,409 INFO L87 Difference]: Start difference. First operand 257 states and 260 transitions. Second operand 32 states. [2018-01-29 23:39:05,563 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:05,563 INFO L93 Difference]: Finished difference Result 402 states and 409 transitions. [2018-01-29 23:39:05,563 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 32 states. [2018-01-29 23:39:05,563 INFO L78 Accepts]: Start accepts. Automaton has 32 states. Word has length 251 [2018-01-29 23:39:05,564 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:05,564 INFO L225 Difference]: With dead ends: 402 [2018-01-29 23:39:05,564 INFO L226 Difference]: Without dead ends: 269 [2018-01-29 23:39:05,565 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 282 GetRequests, 252 SyntacticMatches, 0 SemanticMatches, 30 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=496, Invalid=496, Unknown=0, NotChecked=0, Total=992 [2018-01-29 23:39:05,565 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 269 states. [2018-01-29 23:39:05,571 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 269 to 265. [2018-01-29 23:39:05,571 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 265 states. [2018-01-29 23:39:05,571 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 265 states to 265 states and 268 transitions. [2018-01-29 23:39:05,571 INFO L78 Accepts]: Start accepts. Automaton has 265 states and 268 transitions. Word has length 251 [2018-01-29 23:39:05,571 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:05,571 INFO L432 AbstractCegarLoop]: Abstraction has 265 states and 268 transitions. [2018-01-29 23:39:05,571 INFO L433 AbstractCegarLoop]: Interpolant automaton has 32 states. [2018-01-29 23:39:05,571 INFO L276 IsEmpty]: Start isEmpty. Operand 265 states and 268 transitions. [2018-01-29 23:39:05,572 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 260 [2018-01-29 23:39:05,572 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:05,572 INFO L350 BasicCegarLoop]: trace histogram [31, 31, 30, 30, 30, 30, 30, 30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:05,572 INFO L371 AbstractCegarLoop]: === Iteration 32 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:05,572 INFO L82 PathProgramCache]: Analyzing trace with hash 841554896, now seen corresponding path program 30 times [2018-01-29 23:39:05,572 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:05,572 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:05,577 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:05,577 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:05,577 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:05,590 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:05,591 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:06,185 INFO L134 CoverageAnalysis]: Checked inductivity of 3600 backedges. 0 proven. 1800 refuted. 0 times theorem prover too weak. 1800 trivial. 0 not checked. [2018-01-29 23:39:06,185 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:06,185 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 31 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:06,189 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-29 23:39:06,195 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,196 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,197 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,198 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,199 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,200 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,201 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,203 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,209 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,210 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,212 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,214 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,217 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,219 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,221 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,224 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,226 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,230 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,234 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,237 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,241 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,245 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,249 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,254 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,258 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,263 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,269 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,275 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,282 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,289 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,315 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:06,316 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:06,318 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:06,345 INFO L134 CoverageAnalysis]: Checked inductivity of 3600 backedges. 0 proven. 1800 refuted. 0 times theorem prover too weak. 1800 trivial. 0 not checked. [2018-01-29 23:39:06,362 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:06,362 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [33, 33] total 33 [2018-01-29 23:39:06,362 INFO L409 AbstractCegarLoop]: Interpolant automaton has 33 states [2018-01-29 23:39:06,363 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 33 interpolants. [2018-01-29 23:39:06,363 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=528, Invalid=528, Unknown=0, NotChecked=0, Total=1056 [2018-01-29 23:39:06,363 INFO L87 Difference]: Start difference. First operand 265 states and 268 transitions. Second operand 33 states. [2018-01-29 23:39:06,540 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:06,540 INFO L93 Difference]: Finished difference Result 414 states and 421 transitions. [2018-01-29 23:39:06,553 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 33 states. [2018-01-29 23:39:06,553 INFO L78 Accepts]: Start accepts. Automaton has 33 states. Word has length 259 [2018-01-29 23:39:06,553 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:06,553 INFO L225 Difference]: With dead ends: 414 [2018-01-29 23:39:06,553 INFO L226 Difference]: Without dead ends: 277 [2018-01-29 23:39:06,554 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 291 GetRequests, 260 SyntacticMatches, 0 SemanticMatches, 31 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=528, Invalid=528, Unknown=0, NotChecked=0, Total=1056 [2018-01-29 23:39:06,554 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 277 states. [2018-01-29 23:39:06,556 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 277 to 273. [2018-01-29 23:39:06,556 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 273 states. [2018-01-29 23:39:06,556 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 273 states to 273 states and 276 transitions. [2018-01-29 23:39:06,556 INFO L78 Accepts]: Start accepts. Automaton has 273 states and 276 transitions. Word has length 259 [2018-01-29 23:39:06,556 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:06,556 INFO L432 AbstractCegarLoop]: Abstraction has 273 states and 276 transitions. [2018-01-29 23:39:06,557 INFO L433 AbstractCegarLoop]: Interpolant automaton has 33 states. [2018-01-29 23:39:06,557 INFO L276 IsEmpty]: Start isEmpty. Operand 273 states and 276 transitions. [2018-01-29 23:39:06,557 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 268 [2018-01-29 23:39:06,557 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:06,557 INFO L350 BasicCegarLoop]: trace histogram [32, 32, 31, 31, 31, 31, 31, 31, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:06,557 INFO L371 AbstractCegarLoop]: === Iteration 33 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:06,558 INFO L82 PathProgramCache]: Analyzing trace with hash 556658032, now seen corresponding path program 31 times [2018-01-29 23:39:06,558 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:06,558 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:06,558 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:06,558 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:06,558 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:06,564 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:06,565 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:06,982 INFO L134 CoverageAnalysis]: Checked inductivity of 3844 backedges. 0 proven. 1922 refuted. 0 times theorem prover too weak. 1922 trivial. 0 not checked. [2018-01-29 23:39:06,982 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:06,982 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 32 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:06,988 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:39:07,010 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:07,011 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:07,060 INFO L134 CoverageAnalysis]: Checked inductivity of 3844 backedges. 0 proven. 1922 refuted. 0 times theorem prover too weak. 1922 trivial. 0 not checked. [2018-01-29 23:39:07,078 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:07,078 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [34, 34] total 34 [2018-01-29 23:39:07,079 INFO L409 AbstractCegarLoop]: Interpolant automaton has 34 states [2018-01-29 23:39:07,079 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 34 interpolants. [2018-01-29 23:39:07,079 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=561, Invalid=561, Unknown=0, NotChecked=0, Total=1122 [2018-01-29 23:39:07,079 INFO L87 Difference]: Start difference. First operand 273 states and 276 transitions. Second operand 34 states. [2018-01-29 23:39:07,265 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:07,265 INFO L93 Difference]: Finished difference Result 426 states and 433 transitions. [2018-01-29 23:39:07,265 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 34 states. [2018-01-29 23:39:07,265 INFO L78 Accepts]: Start accepts. Automaton has 34 states. Word has length 267 [2018-01-29 23:39:07,265 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:07,266 INFO L225 Difference]: With dead ends: 426 [2018-01-29 23:39:07,266 INFO L226 Difference]: Without dead ends: 285 [2018-01-29 23:39:07,266 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 300 GetRequests, 268 SyntacticMatches, 0 SemanticMatches, 32 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=561, Invalid=561, Unknown=0, NotChecked=0, Total=1122 [2018-01-29 23:39:07,266 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 285 states. [2018-01-29 23:39:07,268 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 285 to 281. [2018-01-29 23:39:07,268 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 281 states. [2018-01-29 23:39:07,269 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 281 states to 281 states and 284 transitions. [2018-01-29 23:39:07,269 INFO L78 Accepts]: Start accepts. Automaton has 281 states and 284 transitions. Word has length 267 [2018-01-29 23:39:07,269 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:07,269 INFO L432 AbstractCegarLoop]: Abstraction has 281 states and 284 transitions. [2018-01-29 23:39:07,269 INFO L433 AbstractCegarLoop]: Interpolant automaton has 34 states. [2018-01-29 23:39:07,269 INFO L276 IsEmpty]: Start isEmpty. Operand 281 states and 284 transitions. [2018-01-29 23:39:07,270 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 276 [2018-01-29 23:39:07,270 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:07,270 INFO L350 BasicCegarLoop]: trace histogram [33, 33, 32, 32, 32, 32, 32, 32, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:07,270 INFO L371 AbstractCegarLoop]: === Iteration 34 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:07,270 INFO L82 PathProgramCache]: Analyzing trace with hash 380347920, now seen corresponding path program 32 times [2018-01-29 23:39:07,270 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:07,270 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:07,270 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:07,271 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:39:07,271 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:07,276 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:07,277 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:07,763 INFO L134 CoverageAnalysis]: Checked inductivity of 4096 backedges. 0 proven. 2048 refuted. 0 times theorem prover too weak. 2048 trivial. 0 not checked. [2018-01-29 23:39:07,763 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:07,763 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 33 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:07,768 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-29 23:39:07,773 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:07,787 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:07,789 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:07,791 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:07,820 INFO L134 CoverageAnalysis]: Checked inductivity of 4096 backedges. 0 proven. 2048 refuted. 0 times theorem prover too weak. 2048 trivial. 0 not checked. [2018-01-29 23:39:07,839 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:07,840 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [35, 35] total 35 [2018-01-29 23:39:07,840 INFO L409 AbstractCegarLoop]: Interpolant automaton has 35 states [2018-01-29 23:39:07,840 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 35 interpolants. [2018-01-29 23:39:07,840 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=595, Invalid=595, Unknown=0, NotChecked=0, Total=1190 [2018-01-29 23:39:07,841 INFO L87 Difference]: Start difference. First operand 281 states and 284 transitions. Second operand 35 states. [2018-01-29 23:39:08,061 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:08,061 INFO L93 Difference]: Finished difference Result 438 states and 445 transitions. [2018-01-29 23:39:08,061 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 35 states. [2018-01-29 23:39:08,061 INFO L78 Accepts]: Start accepts. Automaton has 35 states. Word has length 275 [2018-01-29 23:39:08,062 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:08,062 INFO L225 Difference]: With dead ends: 438 [2018-01-29 23:39:08,062 INFO L226 Difference]: Without dead ends: 293 [2018-01-29 23:39:08,063 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 309 GetRequests, 276 SyntacticMatches, 0 SemanticMatches, 33 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=595, Invalid=595, Unknown=0, NotChecked=0, Total=1190 [2018-01-29 23:39:08,063 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 293 states. [2018-01-29 23:39:08,065 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 293 to 289. [2018-01-29 23:39:08,065 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 289 states. [2018-01-29 23:39:08,065 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 289 states to 289 states and 292 transitions. [2018-01-29 23:39:08,065 INFO L78 Accepts]: Start accepts. Automaton has 289 states and 292 transitions. Word has length 275 [2018-01-29 23:39:08,065 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:08,065 INFO L432 AbstractCegarLoop]: Abstraction has 289 states and 292 transitions. [2018-01-29 23:39:08,065 INFO L433 AbstractCegarLoop]: Interpolant automaton has 35 states. [2018-01-29 23:39:08,065 INFO L276 IsEmpty]: Start isEmpty. Operand 289 states and 292 transitions. [2018-01-29 23:39:08,066 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 284 [2018-01-29 23:39:08,066 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:08,066 INFO L350 BasicCegarLoop]: trace histogram [34, 34, 33, 33, 33, 33, 33, 33, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:08,066 INFO L371 AbstractCegarLoop]: === Iteration 35 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:08,067 INFO L82 PathProgramCache]: Analyzing trace with hash -1624259152, now seen corresponding path program 33 times [2018-01-29 23:39:08,067 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:08,067 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:08,067 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:08,067 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:08,067 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:08,073 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:08,074 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:08,510 INFO L134 CoverageAnalysis]: Checked inductivity of 4356 backedges. 0 proven. 2178 refuted. 0 times theorem prover too weak. 2178 trivial. 0 not checked. [2018-01-29 23:39:08,510 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:08,510 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 34 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:08,529 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-29 23:39:08,535 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,547 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,557 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,565 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,566 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,567 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,569 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,571 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,572 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,574 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,577 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,580 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,583 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,586 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,590 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,595 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,599 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,604 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,609 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,615 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,622 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,629 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,638 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,647 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,656 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,667 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,679 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,692 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,708 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,724 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,741 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,761 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,782 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,805 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:08,806 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:08,809 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:08,840 INFO L134 CoverageAnalysis]: Checked inductivity of 4356 backedges. 0 proven. 2178 refuted. 0 times theorem prover too weak. 2178 trivial. 0 not checked. [2018-01-29 23:39:08,858 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:08,859 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [36, 36] total 36 [2018-01-29 23:39:08,859 INFO L409 AbstractCegarLoop]: Interpolant automaton has 36 states [2018-01-29 23:39:08,859 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 36 interpolants. [2018-01-29 23:39:08,859 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=630, Invalid=630, Unknown=0, NotChecked=0, Total=1260 [2018-01-29 23:39:08,860 INFO L87 Difference]: Start difference. First operand 289 states and 292 transitions. Second operand 36 states. [2018-01-29 23:39:09,007 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:09,008 INFO L93 Difference]: Finished difference Result 450 states and 457 transitions. [2018-01-29 23:39:09,008 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 36 states. [2018-01-29 23:39:09,008 INFO L78 Accepts]: Start accepts. Automaton has 36 states. Word has length 283 [2018-01-29 23:39:09,008 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:09,009 INFO L225 Difference]: With dead ends: 450 [2018-01-29 23:39:09,009 INFO L226 Difference]: Without dead ends: 301 [2018-01-29 23:39:09,009 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 318 GetRequests, 284 SyntacticMatches, 0 SemanticMatches, 34 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.2s TimeCoverageRelationStatistics Valid=630, Invalid=630, Unknown=0, NotChecked=0, Total=1260 [2018-01-29 23:39:09,010 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 301 states. [2018-01-29 23:39:09,011 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 301 to 297. [2018-01-29 23:39:09,012 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 297 states. [2018-01-29 23:39:09,012 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 297 states to 297 states and 300 transitions. [2018-01-29 23:39:09,012 INFO L78 Accepts]: Start accepts. Automaton has 297 states and 300 transitions. Word has length 283 [2018-01-29 23:39:09,012 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:09,012 INFO L432 AbstractCegarLoop]: Abstraction has 297 states and 300 transitions. [2018-01-29 23:39:09,012 INFO L433 AbstractCegarLoop]: Interpolant automaton has 36 states. [2018-01-29 23:39:09,012 INFO L276 IsEmpty]: Start isEmpty. Operand 297 states and 300 transitions. [2018-01-29 23:39:09,013 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 292 [2018-01-29 23:39:09,013 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:09,013 INFO L350 BasicCegarLoop]: trace histogram [35, 35, 34, 34, 34, 34, 34, 34, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:09,013 INFO L371 AbstractCegarLoop]: === Iteration 36 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:09,013 INFO L82 PathProgramCache]: Analyzing trace with hash -611857328, now seen corresponding path program 34 times [2018-01-29 23:39:09,013 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:09,014 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:09,014 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:09,014 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:09,014 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:09,020 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:09,021 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:09,908 INFO L134 CoverageAnalysis]: Checked inductivity of 4624 backedges. 0 proven. 2312 refuted. 0 times theorem prover too weak. 2312 trivial. 0 not checked. [2018-01-29 23:39:09,908 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:09,908 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 35 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:09,912 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-29 23:39:09,959 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:09,961 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:10,000 INFO L134 CoverageAnalysis]: Checked inductivity of 4624 backedges. 0 proven. 2312 refuted. 0 times theorem prover too weak. 2312 trivial. 0 not checked. [2018-01-29 23:39:10,017 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:10,017 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [37, 37] total 37 [2018-01-29 23:39:10,017 INFO L409 AbstractCegarLoop]: Interpolant automaton has 37 states [2018-01-29 23:39:10,017 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 37 interpolants. [2018-01-29 23:39:10,017 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=666, Invalid=666, Unknown=0, NotChecked=0, Total=1332 [2018-01-29 23:39:10,018 INFO L87 Difference]: Start difference. First operand 297 states and 300 transitions. Second operand 37 states. [2018-01-29 23:39:11,227 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:11,228 INFO L93 Difference]: Finished difference Result 462 states and 469 transitions. [2018-01-29 23:39:11,228 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 37 states. [2018-01-29 23:39:11,228 INFO L78 Accepts]: Start accepts. Automaton has 37 states. Word has length 291 [2018-01-29 23:39:11,228 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:11,229 INFO L225 Difference]: With dead ends: 462 [2018-01-29 23:39:11,229 INFO L226 Difference]: Without dead ends: 309 [2018-01-29 23:39:11,229 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 327 GetRequests, 292 SyntacticMatches, 0 SemanticMatches, 35 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=666, Invalid=666, Unknown=0, NotChecked=0, Total=1332 [2018-01-29 23:39:11,229 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 309 states. [2018-01-29 23:39:11,231 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 309 to 305. [2018-01-29 23:39:11,231 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 305 states. [2018-01-29 23:39:11,232 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 305 states to 305 states and 308 transitions. [2018-01-29 23:39:11,232 INFO L78 Accepts]: Start accepts. Automaton has 305 states and 308 transitions. Word has length 291 [2018-01-29 23:39:11,232 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:11,232 INFO L432 AbstractCegarLoop]: Abstraction has 305 states and 308 transitions. [2018-01-29 23:39:11,232 INFO L433 AbstractCegarLoop]: Interpolant automaton has 37 states. [2018-01-29 23:39:11,232 INFO L276 IsEmpty]: Start isEmpty. Operand 305 states and 308 transitions. [2018-01-29 23:39:11,233 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 300 [2018-01-29 23:39:11,233 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:11,233 INFO L350 BasicCegarLoop]: trace histogram [36, 36, 35, 35, 35, 35, 35, 35, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:11,233 INFO L371 AbstractCegarLoop]: === Iteration 37 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:11,233 INFO L82 PathProgramCache]: Analyzing trace with hash 1623276016, now seen corresponding path program 35 times [2018-01-29 23:39:11,233 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:11,233 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:11,234 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:11,234 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:11,234 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:11,241 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:11,241 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:12,414 INFO L134 CoverageAnalysis]: Checked inductivity of 4900 backedges. 0 proven. 2450 refuted. 0 times theorem prover too weak. 2450 trivial. 0 not checked. [2018-01-29 23:39:12,414 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:12,414 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 36 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:12,418 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-29 23:39:12,424 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,425 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,426 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,427 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,428 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,429 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,430 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,432 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,439 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,441 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,444 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,447 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,450 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,454 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,458 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,462 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,468 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,473 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,480 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,487 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,495 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,504 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,514 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,525 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,538 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,552 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,568 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,586 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,606 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,627 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,650 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,677 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,705 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,737 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,772 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,920 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:12,922 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:12,925 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:12,960 INFO L134 CoverageAnalysis]: Checked inductivity of 4900 backedges. 0 proven. 2450 refuted. 0 times theorem prover too weak. 2450 trivial. 0 not checked. [2018-01-29 23:39:12,979 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:12,979 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [38, 38] total 38 [2018-01-29 23:39:12,979 INFO L409 AbstractCegarLoop]: Interpolant automaton has 38 states [2018-01-29 23:39:12,980 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 38 interpolants. [2018-01-29 23:39:12,980 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=703, Invalid=703, Unknown=0, NotChecked=0, Total=1406 [2018-01-29 23:39:12,980 INFO L87 Difference]: Start difference. First operand 305 states and 308 transitions. Second operand 38 states. [2018-01-29 23:39:13,135 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:13,135 INFO L93 Difference]: Finished difference Result 474 states and 481 transitions. [2018-01-29 23:39:13,135 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 38 states. [2018-01-29 23:39:13,135 INFO L78 Accepts]: Start accepts. Automaton has 38 states. Word has length 299 [2018-01-29 23:39:13,136 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:13,136 INFO L225 Difference]: With dead ends: 474 [2018-01-29 23:39:13,136 INFO L226 Difference]: Without dead ends: 317 [2018-01-29 23:39:13,137 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 336 GetRequests, 300 SyntacticMatches, 0 SemanticMatches, 36 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=703, Invalid=703, Unknown=0, NotChecked=0, Total=1406 [2018-01-29 23:39:13,137 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 317 states. [2018-01-29 23:39:13,139 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 317 to 313. [2018-01-29 23:39:13,139 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 313 states. [2018-01-29 23:39:13,139 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 313 states to 313 states and 316 transitions. [2018-01-29 23:39:13,139 INFO L78 Accepts]: Start accepts. Automaton has 313 states and 316 transitions. Word has length 299 [2018-01-29 23:39:13,139 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:13,139 INFO L432 AbstractCegarLoop]: Abstraction has 313 states and 316 transitions. [2018-01-29 23:39:13,139 INFO L433 AbstractCegarLoop]: Interpolant automaton has 38 states. [2018-01-29 23:39:13,139 INFO L276 IsEmpty]: Start isEmpty. Operand 313 states and 316 transitions. [2018-01-29 23:39:13,140 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 308 [2018-01-29 23:39:13,140 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:13,140 INFO L350 BasicCegarLoop]: trace histogram [37, 37, 36, 36, 36, 36, 36, 36, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:13,140 INFO L371 AbstractCegarLoop]: === Iteration 38 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:13,140 INFO L82 PathProgramCache]: Analyzing trace with hash 405376656, now seen corresponding path program 36 times [2018-01-29 23:39:13,141 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:13,141 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:13,141 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:13,141 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:13,141 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:13,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:13,148 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:13,720 INFO L134 CoverageAnalysis]: Checked inductivity of 5184 backedges. 0 proven. 2592 refuted. 0 times theorem prover too weak. 2592 trivial. 0 not checked. [2018-01-29 23:39:13,721 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:13,721 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 37 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:13,726 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-29 23:39:13,745 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,746 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,747 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,748 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,749 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,750 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,751 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,752 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,753 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,755 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,757 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,759 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,761 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,763 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,766 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,768 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,771 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,774 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,777 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,781 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,785 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,789 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,793 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,798 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,802 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,808 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,813 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,821 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,827 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,837 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,844 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,852 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,860 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,869 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,879 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,889 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,920 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:13,921 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:13,924 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:13,959 INFO L134 CoverageAnalysis]: Checked inductivity of 5184 backedges. 0 proven. 2592 refuted. 0 times theorem prover too weak. 2592 trivial. 0 not checked. [2018-01-29 23:39:13,979 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:13,980 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [39, 39] total 39 [2018-01-29 23:39:13,980 INFO L409 AbstractCegarLoop]: Interpolant automaton has 39 states [2018-01-29 23:39:13,980 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 39 interpolants. [2018-01-29 23:39:13,980 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=741, Invalid=741, Unknown=0, NotChecked=0, Total=1482 [2018-01-29 23:39:13,980 INFO L87 Difference]: Start difference. First operand 313 states and 316 transitions. Second operand 39 states. [2018-01-29 23:39:14,243 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:14,243 INFO L93 Difference]: Finished difference Result 486 states and 493 transitions. [2018-01-29 23:39:14,244 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 39 states. [2018-01-29 23:39:14,244 INFO L78 Accepts]: Start accepts. Automaton has 39 states. Word has length 307 [2018-01-29 23:39:14,244 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:14,244 INFO L225 Difference]: With dead ends: 486 [2018-01-29 23:39:14,244 INFO L226 Difference]: Without dead ends: 325 [2018-01-29 23:39:14,245 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 345 GetRequests, 308 SyntacticMatches, 0 SemanticMatches, 37 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=741, Invalid=741, Unknown=0, NotChecked=0, Total=1482 [2018-01-29 23:39:14,245 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 325 states. [2018-01-29 23:39:14,247 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 325 to 321. [2018-01-29 23:39:14,247 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 321 states. [2018-01-29 23:39:14,247 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 321 states to 321 states and 324 transitions. [2018-01-29 23:39:14,247 INFO L78 Accepts]: Start accepts. Automaton has 321 states and 324 transitions. Word has length 307 [2018-01-29 23:39:14,248 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:14,248 INFO L432 AbstractCegarLoop]: Abstraction has 321 states and 324 transitions. [2018-01-29 23:39:14,248 INFO L433 AbstractCegarLoop]: Interpolant automaton has 39 states. [2018-01-29 23:39:14,248 INFO L276 IsEmpty]: Start isEmpty. Operand 321 states and 324 transitions. [2018-01-29 23:39:14,248 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 316 [2018-01-29 23:39:14,249 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:14,249 INFO L350 BasicCegarLoop]: trace histogram [38, 38, 37, 37, 37, 37, 37, 37, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:14,249 INFO L371 AbstractCegarLoop]: === Iteration 39 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:14,249 INFO L82 PathProgramCache]: Analyzing trace with hash 525224496, now seen corresponding path program 37 times [2018-01-29 23:39:14,249 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:14,249 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:14,249 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:14,249 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:14,250 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:14,255 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:14,256 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:14,803 INFO L134 CoverageAnalysis]: Checked inductivity of 5476 backedges. 0 proven. 2738 refuted. 0 times theorem prover too weak. 2738 trivial. 0 not checked. [2018-01-29 23:39:14,803 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:14,803 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 38 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:14,808 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:39:14,831 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:14,833 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:14,884 INFO L134 CoverageAnalysis]: Checked inductivity of 5476 backedges. 0 proven. 2738 refuted. 0 times theorem prover too weak. 2738 trivial. 0 not checked. [2018-01-29 23:39:14,901 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:14,901 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [40, 40] total 40 [2018-01-29 23:39:14,901 INFO L409 AbstractCegarLoop]: Interpolant automaton has 40 states [2018-01-29 23:39:14,902 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 40 interpolants. [2018-01-29 23:39:14,902 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=780, Invalid=780, Unknown=0, NotChecked=0, Total=1560 [2018-01-29 23:39:14,902 INFO L87 Difference]: Start difference. First operand 321 states and 324 transitions. Second operand 40 states. [2018-01-29 23:39:15,270 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:15,271 INFO L93 Difference]: Finished difference Result 498 states and 505 transitions. [2018-01-29 23:39:15,271 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 40 states. [2018-01-29 23:39:15,271 INFO L78 Accepts]: Start accepts. Automaton has 40 states. Word has length 315 [2018-01-29 23:39:15,271 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:15,272 INFO L225 Difference]: With dead ends: 498 [2018-01-29 23:39:15,272 INFO L226 Difference]: Without dead ends: 333 [2018-01-29 23:39:15,272 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 354 GetRequests, 316 SyntacticMatches, 0 SemanticMatches, 38 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.3s TimeCoverageRelationStatistics Valid=780, Invalid=780, Unknown=0, NotChecked=0, Total=1560 [2018-01-29 23:39:15,273 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 333 states. [2018-01-29 23:39:15,274 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 333 to 329. [2018-01-29 23:39:15,274 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 329 states. [2018-01-29 23:39:15,275 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 329 states to 329 states and 332 transitions. [2018-01-29 23:39:15,275 INFO L78 Accepts]: Start accepts. Automaton has 329 states and 332 transitions. Word has length 315 [2018-01-29 23:39:15,275 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:15,275 INFO L432 AbstractCegarLoop]: Abstraction has 329 states and 332 transitions. [2018-01-29 23:39:15,275 INFO L433 AbstractCegarLoop]: Interpolant automaton has 40 states. [2018-01-29 23:39:15,275 INFO L276 IsEmpty]: Start isEmpty. Operand 329 states and 332 transitions. [2018-01-29 23:39:15,276 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 324 [2018-01-29 23:39:15,278 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:15,278 INFO L350 BasicCegarLoop]: trace histogram [39, 39, 38, 38, 38, 38, 38, 38, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:15,278 INFO L371 AbstractCegarLoop]: === Iteration 40 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:15,279 INFO L82 PathProgramCache]: Analyzing trace with hash -1476596528, now seen corresponding path program 38 times [2018-01-29 23:39:15,279 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:15,279 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:15,279 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:15,279 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:39:15,279 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:15,285 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:15,286 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:15,906 INFO L134 CoverageAnalysis]: Checked inductivity of 5776 backedges. 0 proven. 2888 refuted. 0 times theorem prover too weak. 2888 trivial. 0 not checked. [2018-01-29 23:39:15,906 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:15,906 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 39 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:15,910 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-29 23:39:15,916 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:15,932 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:15,935 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:15,937 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:15,975 INFO L134 CoverageAnalysis]: Checked inductivity of 5776 backedges. 0 proven. 2888 refuted. 0 times theorem prover too weak. 2888 trivial. 0 not checked. [2018-01-29 23:39:15,991 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:15,991 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [41, 41] total 41 [2018-01-29 23:39:15,992 INFO L409 AbstractCegarLoop]: Interpolant automaton has 41 states [2018-01-29 23:39:15,992 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 41 interpolants. [2018-01-29 23:39:15,992 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=820, Invalid=820, Unknown=0, NotChecked=0, Total=1640 [2018-01-29 23:39:15,992 INFO L87 Difference]: Start difference. First operand 329 states and 332 transitions. Second operand 41 states. [2018-01-29 23:39:16,189 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:16,189 INFO L93 Difference]: Finished difference Result 510 states and 517 transitions. [2018-01-29 23:39:16,189 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 41 states. [2018-01-29 23:39:16,189 INFO L78 Accepts]: Start accepts. Automaton has 41 states. Word has length 323 [2018-01-29 23:39:16,189 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:16,190 INFO L225 Difference]: With dead ends: 510 [2018-01-29 23:39:16,190 INFO L226 Difference]: Without dead ends: 341 [2018-01-29 23:39:16,190 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 363 GetRequests, 324 SyntacticMatches, 0 SemanticMatches, 39 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=820, Invalid=820, Unknown=0, NotChecked=0, Total=1640 [2018-01-29 23:39:16,190 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 341 states. [2018-01-29 23:39:16,192 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 341 to 337. [2018-01-29 23:39:16,192 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 337 states. [2018-01-29 23:39:16,193 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 337 states to 337 states and 340 transitions. [2018-01-29 23:39:16,193 INFO L78 Accepts]: Start accepts. Automaton has 337 states and 340 transitions. Word has length 323 [2018-01-29 23:39:16,193 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:16,193 INFO L432 AbstractCegarLoop]: Abstraction has 337 states and 340 transitions. [2018-01-29 23:39:16,193 INFO L433 AbstractCegarLoop]: Interpolant automaton has 41 states. [2018-01-29 23:39:16,193 INFO L276 IsEmpty]: Start isEmpty. Operand 337 states and 340 transitions. [2018-01-29 23:39:16,194 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 332 [2018-01-29 23:39:16,194 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:16,194 INFO L350 BasicCegarLoop]: trace histogram [40, 40, 39, 39, 39, 39, 39, 39, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:16,194 INFO L371 AbstractCegarLoop]: === Iteration 41 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:16,194 INFO L82 PathProgramCache]: Analyzing trace with hash -666700176, now seen corresponding path program 39 times [2018-01-29 23:39:16,194 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:16,194 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:16,195 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:16,195 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:16,195 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:16,201 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:16,202 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:16,856 INFO L134 CoverageAnalysis]: Checked inductivity of 6084 backedges. 0 proven. 3042 refuted. 0 times theorem prover too weak. 3042 trivial. 0 not checked. [2018-01-29 23:39:16,856 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:16,856 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 40 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:16,860 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-29 23:39:16,874 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:16,876 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:16,877 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:16,878 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:16,879 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:16,880 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:16,882 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:16,883 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:16,885 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:16,887 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:16,889 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:16,892 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:16,898 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:16,901 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:16,906 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:16,911 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:16,915 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:16,920 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:16,925 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:16,932 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:16,939 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:16,948 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:16,956 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:16,966 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:16,976 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:16,989 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:17,002 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:17,017 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:17,033 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:17,050 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:17,069 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:17,089 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:17,111 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:17,136 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:17,163 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:17,192 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:17,224 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:17,256 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:17,295 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:17,334 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:17,335 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:17,339 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:17,380 INFO L134 CoverageAnalysis]: Checked inductivity of 6084 backedges. 0 proven. 3042 refuted. 0 times theorem prover too weak. 3042 trivial. 0 not checked. [2018-01-29 23:39:17,399 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:17,400 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [42, 42] total 42 [2018-01-29 23:39:17,400 INFO L409 AbstractCegarLoop]: Interpolant automaton has 42 states [2018-01-29 23:39:17,400 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 42 interpolants. [2018-01-29 23:39:17,400 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=861, Invalid=861, Unknown=0, NotChecked=0, Total=1722 [2018-01-29 23:39:17,400 INFO L87 Difference]: Start difference. First operand 337 states and 340 transitions. Second operand 42 states. [2018-01-29 23:39:17,603 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:17,603 INFO L93 Difference]: Finished difference Result 522 states and 529 transitions. [2018-01-29 23:39:17,603 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 42 states. [2018-01-29 23:39:17,603 INFO L78 Accepts]: Start accepts. Automaton has 42 states. Word has length 331 [2018-01-29 23:39:17,603 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:17,604 INFO L225 Difference]: With dead ends: 522 [2018-01-29 23:39:17,604 INFO L226 Difference]: Without dead ends: 349 [2018-01-29 23:39:17,604 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 372 GetRequests, 332 SyntacticMatches, 0 SemanticMatches, 40 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=861, Invalid=861, Unknown=0, NotChecked=0, Total=1722 [2018-01-29 23:39:17,605 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 349 states. [2018-01-29 23:39:17,607 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 349 to 345. [2018-01-29 23:39:17,607 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 345 states. [2018-01-29 23:39:17,607 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 345 states to 345 states and 348 transitions. [2018-01-29 23:39:17,607 INFO L78 Accepts]: Start accepts. Automaton has 345 states and 348 transitions. Word has length 331 [2018-01-29 23:39:17,607 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:17,607 INFO L432 AbstractCegarLoop]: Abstraction has 345 states and 348 transitions. [2018-01-29 23:39:17,607 INFO L433 AbstractCegarLoop]: Interpolant automaton has 42 states. [2018-01-29 23:39:17,607 INFO L276 IsEmpty]: Start isEmpty. Operand 345 states and 348 transitions. [2018-01-29 23:39:17,608 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 340 [2018-01-29 23:39:17,608 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:17,608 INFO L350 BasicCegarLoop]: trace histogram [41, 41, 40, 40, 40, 40, 40, 40, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:17,608 INFO L371 AbstractCegarLoop]: === Iteration 42 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:17,609 INFO L82 PathProgramCache]: Analyzing trace with hash -1435638000, now seen corresponding path program 40 times [2018-01-29 23:39:17,609 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:17,609 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:17,609 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:17,609 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:17,609 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:17,615 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:17,617 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:18,291 INFO L134 CoverageAnalysis]: Checked inductivity of 6400 backedges. 0 proven. 3200 refuted. 0 times theorem prover too weak. 3200 trivial. 0 not checked. [2018-01-29 23:39:18,292 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:18,292 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 41 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:18,296 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-29 23:39:18,322 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:18,324 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:18,366 INFO L134 CoverageAnalysis]: Checked inductivity of 6400 backedges. 0 proven. 3200 refuted. 0 times theorem prover too weak. 3200 trivial. 0 not checked. [2018-01-29 23:39:18,386 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:18,386 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [43, 43] total 43 [2018-01-29 23:39:18,387 INFO L409 AbstractCegarLoop]: Interpolant automaton has 43 states [2018-01-29 23:39:18,387 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 43 interpolants. [2018-01-29 23:39:18,387 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=903, Invalid=903, Unknown=0, NotChecked=0, Total=1806 [2018-01-29 23:39:18,387 INFO L87 Difference]: Start difference. First operand 345 states and 348 transitions. Second operand 43 states. [2018-01-29 23:39:19,195 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:19,195 INFO L93 Difference]: Finished difference Result 534 states and 541 transitions. [2018-01-29 23:39:19,195 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 43 states. [2018-01-29 23:39:19,195 INFO L78 Accepts]: Start accepts. Automaton has 43 states. Word has length 339 [2018-01-29 23:39:19,195 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:19,196 INFO L225 Difference]: With dead ends: 534 [2018-01-29 23:39:19,196 INFO L226 Difference]: Without dead ends: 357 [2018-01-29 23:39:19,196 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 381 GetRequests, 340 SyntacticMatches, 0 SemanticMatches, 41 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=903, Invalid=903, Unknown=0, NotChecked=0, Total=1806 [2018-01-29 23:39:19,197 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 357 states. [2018-01-29 23:39:19,199 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 357 to 353. [2018-01-29 23:39:19,199 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 353 states. [2018-01-29 23:39:19,199 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 353 states to 353 states and 356 transitions. [2018-01-29 23:39:19,199 INFO L78 Accepts]: Start accepts. Automaton has 353 states and 356 transitions. Word has length 339 [2018-01-29 23:39:19,199 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:19,199 INFO L432 AbstractCegarLoop]: Abstraction has 353 states and 356 transitions. [2018-01-29 23:39:19,199 INFO L433 AbstractCegarLoop]: Interpolant automaton has 43 states. [2018-01-29 23:39:19,199 INFO L276 IsEmpty]: Start isEmpty. Operand 353 states and 356 transitions. [2018-01-29 23:39:19,200 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 348 [2018-01-29 23:39:19,200 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:19,201 INFO L350 BasicCegarLoop]: trace histogram [42, 42, 41, 41, 41, 41, 41, 41, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:19,201 INFO L371 AbstractCegarLoop]: === Iteration 43 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:19,201 INFO L82 PathProgramCache]: Analyzing trace with hash -854901072, now seen corresponding path program 41 times [2018-01-29 23:39:19,201 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:19,201 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:19,201 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:19,201 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:19,201 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:19,208 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:19,209 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:19,882 INFO L134 CoverageAnalysis]: Checked inductivity of 6724 backedges. 0 proven. 3362 refuted. 0 times theorem prover too weak. 3362 trivial. 0 not checked. [2018-01-29 23:39:19,882 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:19,882 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 42 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:19,887 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-29 23:39:19,892 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:19,894 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:19,894 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:19,895 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:19,897 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:19,898 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:19,899 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:19,901 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:19,903 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:19,905 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:19,907 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:19,910 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:19,914 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:19,917 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:19,921 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:19,926 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:19,931 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:19,937 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:19,943 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:19,951 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:19,959 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:19,968 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:19,978 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:19,989 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:20,002 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:20,016 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:20,032 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:20,051 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:20,071 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:20,092 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:20,116 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:20,142 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:20,170 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:20,202 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:20,238 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:20,276 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:20,318 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:20,365 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:20,416 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:20,471 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:20,530 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:21,353 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:21,357 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:21,362 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:21,406 INFO L134 CoverageAnalysis]: Checked inductivity of 6724 backedges. 0 proven. 3362 refuted. 0 times theorem prover too weak. 3362 trivial. 0 not checked. [2018-01-29 23:39:21,426 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:21,426 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [44, 44] total 44 [2018-01-29 23:39:21,427 INFO L409 AbstractCegarLoop]: Interpolant automaton has 44 states [2018-01-29 23:39:21,427 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 44 interpolants. [2018-01-29 23:39:21,427 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=946, Invalid=946, Unknown=0, NotChecked=0, Total=1892 [2018-01-29 23:39:21,427 INFO L87 Difference]: Start difference. First operand 353 states and 356 transitions. Second operand 44 states. [2018-01-29 23:39:21,599 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:21,599 INFO L93 Difference]: Finished difference Result 546 states and 553 transitions. [2018-01-29 23:39:21,599 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 44 states. [2018-01-29 23:39:21,599 INFO L78 Accepts]: Start accepts. Automaton has 44 states. Word has length 347 [2018-01-29 23:39:21,600 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:21,600 INFO L225 Difference]: With dead ends: 546 [2018-01-29 23:39:21,600 INFO L226 Difference]: Without dead ends: 365 [2018-01-29 23:39:21,601 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 390 GetRequests, 348 SyntacticMatches, 0 SemanticMatches, 42 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=946, Invalid=946, Unknown=0, NotChecked=0, Total=1892 [2018-01-29 23:39:21,601 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 365 states. [2018-01-29 23:39:21,603 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 365 to 361. [2018-01-29 23:39:21,603 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 361 states. [2018-01-29 23:39:21,603 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 361 states to 361 states and 364 transitions. [2018-01-29 23:39:21,604 INFO L78 Accepts]: Start accepts. Automaton has 361 states and 364 transitions. Word has length 347 [2018-01-29 23:39:21,604 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:21,604 INFO L432 AbstractCegarLoop]: Abstraction has 361 states and 364 transitions. [2018-01-29 23:39:21,604 INFO L433 AbstractCegarLoop]: Interpolant automaton has 44 states. [2018-01-29 23:39:21,604 INFO L276 IsEmpty]: Start isEmpty. Operand 361 states and 364 transitions. [2018-01-29 23:39:21,605 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 356 [2018-01-29 23:39:21,605 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:21,605 INFO L350 BasicCegarLoop]: trace histogram [43, 43, 42, 42, 42, 42, 42, 42, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:21,605 INFO L371 AbstractCegarLoop]: === Iteration 44 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:21,605 INFO L82 PathProgramCache]: Analyzing trace with hash -2098692784, now seen corresponding path program 42 times [2018-01-29 23:39:21,605 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:21,605 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:21,606 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:21,606 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:21,606 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:21,612 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:21,613 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:22,322 INFO L134 CoverageAnalysis]: Checked inductivity of 7056 backedges. 0 proven. 3528 refuted. 0 times theorem prover too weak. 3528 trivial. 0 not checked. [2018-01-29 23:39:22,322 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:22,322 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 43 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:22,326 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-29 23:39:22,334 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,336 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,336 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,337 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,338 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,340 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,341 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,342 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,343 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,345 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,347 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,348 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,351 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,353 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,356 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,358 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,361 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,364 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,368 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,371 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,375 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,378 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,384 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,389 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,393 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,399 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,405 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,411 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,417 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,424 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,432 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,440 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,448 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,458 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,467 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,477 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,487 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,498 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,512 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,525 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,594 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,692 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,734 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:22,735 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:22,739 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:22,803 INFO L134 CoverageAnalysis]: Checked inductivity of 7056 backedges. 0 proven. 3528 refuted. 0 times theorem prover too weak. 3528 trivial. 0 not checked. [2018-01-29 23:39:22,824 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:22,824 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [45, 45] total 45 [2018-01-29 23:39:22,824 INFO L409 AbstractCegarLoop]: Interpolant automaton has 45 states [2018-01-29 23:39:22,824 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 45 interpolants. [2018-01-29 23:39:22,825 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=990, Invalid=990, Unknown=0, NotChecked=0, Total=1980 [2018-01-29 23:39:22,825 INFO L87 Difference]: Start difference. First operand 361 states and 364 transitions. Second operand 45 states. [2018-01-29 23:39:23,070 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:23,070 INFO L93 Difference]: Finished difference Result 558 states and 565 transitions. [2018-01-29 23:39:23,070 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 45 states. [2018-01-29 23:39:23,070 INFO L78 Accepts]: Start accepts. Automaton has 45 states. Word has length 355 [2018-01-29 23:39:23,070 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:23,071 INFO L225 Difference]: With dead ends: 558 [2018-01-29 23:39:23,071 INFO L226 Difference]: Without dead ends: 373 [2018-01-29 23:39:23,072 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 399 GetRequests, 356 SyntacticMatches, 0 SemanticMatches, 43 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.4s TimeCoverageRelationStatistics Valid=990, Invalid=990, Unknown=0, NotChecked=0, Total=1980 [2018-01-29 23:39:23,072 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 373 states. [2018-01-29 23:39:23,074 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 373 to 369. [2018-01-29 23:39:23,074 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 369 states. [2018-01-29 23:39:23,075 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 369 states to 369 states and 372 transitions. [2018-01-29 23:39:23,075 INFO L78 Accepts]: Start accepts. Automaton has 369 states and 372 transitions. Word has length 355 [2018-01-29 23:39:23,075 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:23,075 INFO L432 AbstractCegarLoop]: Abstraction has 369 states and 372 transitions. [2018-01-29 23:39:23,075 INFO L433 AbstractCegarLoop]: Interpolant automaton has 45 states. [2018-01-29 23:39:23,075 INFO L276 IsEmpty]: Start isEmpty. Operand 369 states and 372 transitions. [2018-01-29 23:39:23,076 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 364 [2018-01-29 23:39:23,076 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:23,076 INFO L350 BasicCegarLoop]: trace histogram [44, 44, 43, 43, 43, 43, 43, 43, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:23,076 INFO L371 AbstractCegarLoop]: === Iteration 45 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:23,077 INFO L82 PathProgramCache]: Analyzing trace with hash -2095897872, now seen corresponding path program 43 times [2018-01-29 23:39:23,077 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:23,077 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:23,077 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:23,077 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:23,077 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:23,084 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:23,085 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:24,326 INFO L134 CoverageAnalysis]: Checked inductivity of 7396 backedges. 0 proven. 3698 refuted. 0 times theorem prover too weak. 3698 trivial. 0 not checked. [2018-01-29 23:39:24,327 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:24,327 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 44 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:24,331 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:39:24,357 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:24,359 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:24,414 INFO L134 CoverageAnalysis]: Checked inductivity of 7396 backedges. 0 proven. 3698 refuted. 0 times theorem prover too weak. 3698 trivial. 0 not checked. [2018-01-29 23:39:24,431 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:24,431 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [46, 46] total 46 [2018-01-29 23:39:24,431 INFO L409 AbstractCegarLoop]: Interpolant automaton has 46 states [2018-01-29 23:39:24,431 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 46 interpolants. [2018-01-29 23:39:24,432 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1035, Invalid=1035, Unknown=0, NotChecked=0, Total=2070 [2018-01-29 23:39:24,432 INFO L87 Difference]: Start difference. First operand 369 states and 372 transitions. Second operand 46 states. [2018-01-29 23:39:24,694 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:24,694 INFO L93 Difference]: Finished difference Result 570 states and 577 transitions. [2018-01-29 23:39:24,695 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 46 states. [2018-01-29 23:39:24,695 INFO L78 Accepts]: Start accepts. Automaton has 46 states. Word has length 363 [2018-01-29 23:39:24,695 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:24,695 INFO L225 Difference]: With dead ends: 570 [2018-01-29 23:39:24,696 INFO L226 Difference]: Without dead ends: 381 [2018-01-29 23:39:24,696 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 408 GetRequests, 364 SyntacticMatches, 0 SemanticMatches, 44 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.9s TimeCoverageRelationStatistics Valid=1035, Invalid=1035, Unknown=0, NotChecked=0, Total=2070 [2018-01-29 23:39:24,696 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 381 states. [2018-01-29 23:39:24,698 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 381 to 377. [2018-01-29 23:39:24,698 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 377 states. [2018-01-29 23:39:24,699 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 377 states to 377 states and 380 transitions. [2018-01-29 23:39:24,699 INFO L78 Accepts]: Start accepts. Automaton has 377 states and 380 transitions. Word has length 363 [2018-01-29 23:39:24,699 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:24,699 INFO L432 AbstractCegarLoop]: Abstraction has 377 states and 380 transitions. [2018-01-29 23:39:24,699 INFO L433 AbstractCegarLoop]: Interpolant automaton has 46 states. [2018-01-29 23:39:24,699 INFO L276 IsEmpty]: Start isEmpty. Operand 377 states and 380 transitions. [2018-01-29 23:39:24,707 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 372 [2018-01-29 23:39:24,707 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:24,707 INFO L350 BasicCegarLoop]: trace histogram [45, 45, 44, 44, 44, 44, 44, 44, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:24,707 INFO L371 AbstractCegarLoop]: === Iteration 46 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:24,707 INFO L82 PathProgramCache]: Analyzing trace with hash -656887920, now seen corresponding path program 44 times [2018-01-29 23:39:24,707 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:24,707 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:24,708 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:24,708 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:39:24,708 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:24,715 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:24,715 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:25,529 INFO L134 CoverageAnalysis]: Checked inductivity of 7744 backedges. 0 proven. 3872 refuted. 0 times theorem prover too weak. 3872 trivial. 0 not checked. [2018-01-29 23:39:25,529 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:25,529 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 45 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:25,535 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-29 23:39:25,542 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:25,560 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:25,563 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:25,565 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:25,614 INFO L134 CoverageAnalysis]: Checked inductivity of 7744 backedges. 0 proven. 3872 refuted. 0 times theorem prover too weak. 3872 trivial. 0 not checked. [2018-01-29 23:39:25,631 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:25,631 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [47, 47] total 47 [2018-01-29 23:39:25,631 INFO L409 AbstractCegarLoop]: Interpolant automaton has 47 states [2018-01-29 23:39:25,631 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 47 interpolants. [2018-01-29 23:39:25,631 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1081, Invalid=1081, Unknown=0, NotChecked=0, Total=2162 [2018-01-29 23:39:25,632 INFO L87 Difference]: Start difference. First operand 377 states and 380 transitions. Second operand 47 states. [2018-01-29 23:39:25,854 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:25,854 INFO L93 Difference]: Finished difference Result 582 states and 589 transitions. [2018-01-29 23:39:25,855 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 47 states. [2018-01-29 23:39:25,855 INFO L78 Accepts]: Start accepts. Automaton has 47 states. Word has length 371 [2018-01-29 23:39:25,855 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:25,855 INFO L225 Difference]: With dead ends: 582 [2018-01-29 23:39:25,856 INFO L226 Difference]: Without dead ends: 389 [2018-01-29 23:39:25,856 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 417 GetRequests, 372 SyntacticMatches, 0 SemanticMatches, 45 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=1081, Invalid=1081, Unknown=0, NotChecked=0, Total=2162 [2018-01-29 23:39:25,856 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 389 states. [2018-01-29 23:39:25,858 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 389 to 385. [2018-01-29 23:39:25,858 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 385 states. [2018-01-29 23:39:25,858 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 385 states to 385 states and 388 transitions. [2018-01-29 23:39:25,859 INFO L78 Accepts]: Start accepts. Automaton has 385 states and 388 transitions. Word has length 371 [2018-01-29 23:39:25,859 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:25,859 INFO L432 AbstractCegarLoop]: Abstraction has 385 states and 388 transitions. [2018-01-29 23:39:25,859 INFO L433 AbstractCegarLoop]: Interpolant automaton has 47 states. [2018-01-29 23:39:25,859 INFO L276 IsEmpty]: Start isEmpty. Operand 385 states and 388 transitions. [2018-01-29 23:39:25,860 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 380 [2018-01-29 23:39:25,860 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:25,860 INFO L350 BasicCegarLoop]: trace histogram [46, 46, 45, 45, 45, 45, 45, 45, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:25,860 INFO L371 AbstractCegarLoop]: === Iteration 47 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:25,860 INFO L82 PathProgramCache]: Analyzing trace with hash -1010392272, now seen corresponding path program 45 times [2018-01-29 23:39:25,860 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:25,860 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:25,861 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:25,861 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:25,861 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:25,868 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:25,869 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:26,908 INFO L134 CoverageAnalysis]: Checked inductivity of 8100 backedges. 0 proven. 4050 refuted. 0 times theorem prover too weak. 4050 trivial. 0 not checked. [2018-01-29 23:39:26,909 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:26,909 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 46 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:26,913 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-29 23:39:26,920 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:26,921 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:26,922 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:26,923 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:26,924 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:26,926 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:26,927 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:26,929 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:26,931 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:26,933 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:26,935 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:26,938 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:26,941 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:26,944 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:26,948 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:26,953 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:26,957 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:26,962 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:26,967 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:26,974 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:26,980 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:26,987 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:26,996 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:27,005 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:27,015 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:27,025 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:27,037 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:27,052 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:27,066 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:27,082 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:27,100 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:27,119 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:27,142 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:27,164 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:27,188 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:27,215 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:27,245 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:27,276 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:27,310 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:27,348 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:27,388 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:27,431 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:27,478 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:27,528 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:27,582 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:27,638 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:27,640 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:27,644 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:27,695 INFO L134 CoverageAnalysis]: Checked inductivity of 8100 backedges. 0 proven. 4050 refuted. 0 times theorem prover too weak. 4050 trivial. 0 not checked. [2018-01-29 23:39:27,716 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:27,716 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [48, 48] total 48 [2018-01-29 23:39:27,717 INFO L409 AbstractCegarLoop]: Interpolant automaton has 48 states [2018-01-29 23:39:27,717 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 48 interpolants. [2018-01-29 23:39:27,717 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1128, Invalid=1128, Unknown=0, NotChecked=0, Total=2256 [2018-01-29 23:39:27,717 INFO L87 Difference]: Start difference. First operand 385 states and 388 transitions. Second operand 48 states. [2018-01-29 23:39:28,410 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:28,410 INFO L93 Difference]: Finished difference Result 594 states and 601 transitions. [2018-01-29 23:39:28,410 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 48 states. [2018-01-29 23:39:28,410 INFO L78 Accepts]: Start accepts. Automaton has 48 states. Word has length 379 [2018-01-29 23:39:28,410 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:28,411 INFO L225 Difference]: With dead ends: 594 [2018-01-29 23:39:28,411 INFO L226 Difference]: Without dead ends: 397 [2018-01-29 23:39:28,411 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 426 GetRequests, 380 SyntacticMatches, 0 SemanticMatches, 46 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1128, Invalid=1128, Unknown=0, NotChecked=0, Total=2256 [2018-01-29 23:39:28,412 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 397 states. [2018-01-29 23:39:28,414 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 397 to 393. [2018-01-29 23:39:28,414 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 393 states. [2018-01-29 23:39:28,414 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 393 states to 393 states and 396 transitions. [2018-01-29 23:39:28,414 INFO L78 Accepts]: Start accepts. Automaton has 393 states and 396 transitions. Word has length 379 [2018-01-29 23:39:28,415 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:28,415 INFO L432 AbstractCegarLoop]: Abstraction has 393 states and 396 transitions. [2018-01-29 23:39:28,415 INFO L433 AbstractCegarLoop]: Interpolant automaton has 48 states. [2018-01-29 23:39:28,415 INFO L276 IsEmpty]: Start isEmpty. Operand 393 states and 396 transitions. [2018-01-29 23:39:28,416 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 388 [2018-01-29 23:39:28,416 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:28,416 INFO L350 BasicCegarLoop]: trace histogram [47, 47, 46, 46, 46, 46, 46, 46, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:28,416 INFO L371 AbstractCegarLoop]: === Iteration 48 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:28,416 INFO L82 PathProgramCache]: Analyzing trace with hash -1750434352, now seen corresponding path program 46 times [2018-01-29 23:39:28,416 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:28,416 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:28,417 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:28,417 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:28,417 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:28,424 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:28,425 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:29,282 INFO L134 CoverageAnalysis]: Checked inductivity of 8464 backedges. 0 proven. 4232 refuted. 0 times theorem prover too weak. 4232 trivial. 0 not checked. [2018-01-29 23:39:29,282 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:29,282 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 47 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:29,287 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-29 23:39:29,316 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:29,318 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:29,371 INFO L134 CoverageAnalysis]: Checked inductivity of 8464 backedges. 0 proven. 4232 refuted. 0 times theorem prover too weak. 4232 trivial. 0 not checked. [2018-01-29 23:39:29,387 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:29,388 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [49, 49] total 49 [2018-01-29 23:39:29,388 INFO L409 AbstractCegarLoop]: Interpolant automaton has 49 states [2018-01-29 23:39:29,388 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 49 interpolants. [2018-01-29 23:39:29,388 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2018-01-29 23:39:29,388 INFO L87 Difference]: Start difference. First operand 393 states and 396 transitions. Second operand 49 states. [2018-01-29 23:39:29,631 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:29,631 INFO L93 Difference]: Finished difference Result 606 states and 613 transitions. [2018-01-29 23:39:29,631 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 49 states. [2018-01-29 23:39:29,631 INFO L78 Accepts]: Start accepts. Automaton has 49 states. Word has length 387 [2018-01-29 23:39:29,631 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:29,632 INFO L225 Difference]: With dead ends: 606 [2018-01-29 23:39:29,632 INFO L226 Difference]: Without dead ends: 405 [2018-01-29 23:39:29,633 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 435 GetRequests, 388 SyntacticMatches, 0 SemanticMatches, 47 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=1176, Invalid=1176, Unknown=0, NotChecked=0, Total=2352 [2018-01-29 23:39:29,633 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 405 states. [2018-01-29 23:39:29,635 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 405 to 401. [2018-01-29 23:39:29,635 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 401 states. [2018-01-29 23:39:29,635 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 401 states to 401 states and 404 transitions. [2018-01-29 23:39:29,635 INFO L78 Accepts]: Start accepts. Automaton has 401 states and 404 transitions. Word has length 387 [2018-01-29 23:39:29,635 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:29,636 INFO L432 AbstractCegarLoop]: Abstraction has 401 states and 404 transitions. [2018-01-29 23:39:29,636 INFO L433 AbstractCegarLoop]: Interpolant automaton has 49 states. [2018-01-29 23:39:29,636 INFO L276 IsEmpty]: Start isEmpty. Operand 401 states and 404 transitions. [2018-01-29 23:39:29,637 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 396 [2018-01-29 23:39:29,637 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:29,637 INFO L350 BasicCegarLoop]: trace histogram [48, 48, 47, 47, 47, 47, 47, 47, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:29,637 INFO L371 AbstractCegarLoop]: === Iteration 49 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:29,638 INFO L82 PathProgramCache]: Analyzing trace with hash -1668169872, now seen corresponding path program 47 times [2018-01-29 23:39:29,638 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:29,638 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:29,638 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:29,638 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:29,638 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:29,655 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:29,656 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:30,531 INFO L134 CoverageAnalysis]: Checked inductivity of 8836 backedges. 0 proven. 4418 refuted. 0 times theorem prover too weak. 4418 trivial. 0 not checked. [2018-01-29 23:39:30,531 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:30,531 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 48 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:30,535 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-29 23:39:30,542 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,543 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,544 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,545 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,546 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,547 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,548 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,550 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,552 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,554 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,557 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,559 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,563 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,566 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,570 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,575 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,580 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,585 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,592 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,599 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,607 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,616 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,625 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,637 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,649 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,664 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,679 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,698 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,717 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,738 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,761 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,788 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,816 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,848 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,882 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,920 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:30,962 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:31,008 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:31,059 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:31,114 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:31,172 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:31,232 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:31,297 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:31,368 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:31,443 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:31,523 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:31,609 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:31,943 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:31,946 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:31,951 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:32,013 INFO L134 CoverageAnalysis]: Checked inductivity of 8836 backedges. 0 proven. 4418 refuted. 0 times theorem prover too weak. 4418 trivial. 0 not checked. [2018-01-29 23:39:32,036 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:32,036 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [50, 50] total 50 [2018-01-29 23:39:32,036 INFO L409 AbstractCegarLoop]: Interpolant automaton has 50 states [2018-01-29 23:39:32,036 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 50 interpolants. [2018-01-29 23:39:32,037 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1225, Invalid=1225, Unknown=0, NotChecked=0, Total=2450 [2018-01-29 23:39:32,037 INFO L87 Difference]: Start difference. First operand 401 states and 404 transitions. Second operand 50 states. [2018-01-29 23:39:32,306 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:32,307 INFO L93 Difference]: Finished difference Result 618 states and 625 transitions. [2018-01-29 23:39:32,307 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 50 states. [2018-01-29 23:39:32,307 INFO L78 Accepts]: Start accepts. Automaton has 50 states. Word has length 395 [2018-01-29 23:39:32,307 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:32,308 INFO L225 Difference]: With dead ends: 618 [2018-01-29 23:39:32,308 INFO L226 Difference]: Without dead ends: 413 [2018-01-29 23:39:32,308 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 444 GetRequests, 396 SyntacticMatches, 0 SemanticMatches, 48 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=1225, Invalid=1225, Unknown=0, NotChecked=0, Total=2450 [2018-01-29 23:39:32,308 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 413 states. [2018-01-29 23:39:32,310 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 413 to 409. [2018-01-29 23:39:32,310 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 409 states. [2018-01-29 23:39:32,311 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 409 states to 409 states and 412 transitions. [2018-01-29 23:39:32,311 INFO L78 Accepts]: Start accepts. Automaton has 409 states and 412 transitions. Word has length 395 [2018-01-29 23:39:32,311 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:32,311 INFO L432 AbstractCegarLoop]: Abstraction has 409 states and 412 transitions. [2018-01-29 23:39:32,311 INFO L433 AbstractCegarLoop]: Interpolant automaton has 50 states. [2018-01-29 23:39:32,311 INFO L276 IsEmpty]: Start isEmpty. Operand 409 states and 412 transitions. [2018-01-29 23:39:32,312 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 404 [2018-01-29 23:39:32,312 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:32,312 INFO L350 BasicCegarLoop]: trace histogram [49, 49, 48, 48, 48, 48, 48, 48, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:32,312 INFO L371 AbstractCegarLoop]: === Iteration 50 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:32,313 INFO L82 PathProgramCache]: Analyzing trace with hash -288757744, now seen corresponding path program 48 times [2018-01-29 23:39:32,313 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:32,313 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:32,313 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:32,313 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:32,313 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:32,320 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:32,321 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:33,199 INFO L134 CoverageAnalysis]: Checked inductivity of 9216 backedges. 0 proven. 4608 refuted. 0 times theorem prover too weak. 4608 trivial. 0 not checked. [2018-01-29 23:39:33,199 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:33,199 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 49 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:33,205 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-29 23:39:33,213 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,215 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,216 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,217 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,218 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,219 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,220 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,221 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,223 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,224 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,226 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,228 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,230 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,233 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,235 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,238 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,241 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,243 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,247 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,250 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,254 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,258 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,262 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,267 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,271 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,277 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,283 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,289 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,296 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,304 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,312 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,320 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,329 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,338 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,347 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,357 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,369 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,383 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,396 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,411 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,425 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,441 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,457 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,476 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,494 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,515 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,539 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:33,996 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:34,673 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:34,675 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:34,681 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:34,737 INFO L134 CoverageAnalysis]: Checked inductivity of 9216 backedges. 0 proven. 4608 refuted. 0 times theorem prover too weak. 4608 trivial. 0 not checked. [2018-01-29 23:39:34,756 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:34,756 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [51, 51] total 51 [2018-01-29 23:39:34,756 INFO L409 AbstractCegarLoop]: Interpolant automaton has 51 states [2018-01-29 23:39:34,757 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 51 interpolants. [2018-01-29 23:39:34,757 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1275, Invalid=1275, Unknown=0, NotChecked=0, Total=2550 [2018-01-29 23:39:34,757 INFO L87 Difference]: Start difference. First operand 409 states and 412 transitions. Second operand 51 states. [2018-01-29 23:39:35,045 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:35,045 INFO L93 Difference]: Finished difference Result 630 states and 637 transitions. [2018-01-29 23:39:35,045 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 51 states. [2018-01-29 23:39:35,045 INFO L78 Accepts]: Start accepts. Automaton has 51 states. Word has length 403 [2018-01-29 23:39:35,045 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:35,046 INFO L225 Difference]: With dead ends: 630 [2018-01-29 23:39:35,046 INFO L226 Difference]: Without dead ends: 421 [2018-01-29 23:39:35,047 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 453 GetRequests, 404 SyntacticMatches, 0 SemanticMatches, 49 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.5s TimeCoverageRelationStatistics Valid=1275, Invalid=1275, Unknown=0, NotChecked=0, Total=2550 [2018-01-29 23:39:35,047 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 421 states. [2018-01-29 23:39:35,049 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 421 to 417. [2018-01-29 23:39:35,049 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 417 states. [2018-01-29 23:39:35,049 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 417 states to 417 states and 420 transitions. [2018-01-29 23:39:35,049 INFO L78 Accepts]: Start accepts. Automaton has 417 states and 420 transitions. Word has length 403 [2018-01-29 23:39:35,049 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:35,049 INFO L432 AbstractCegarLoop]: Abstraction has 417 states and 420 transitions. [2018-01-29 23:39:35,049 INFO L433 AbstractCegarLoop]: Interpolant automaton has 51 states. [2018-01-29 23:39:35,050 INFO L276 IsEmpty]: Start isEmpty. Operand 417 states and 420 transitions. [2018-01-29 23:39:35,051 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 412 [2018-01-29 23:39:35,051 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:35,051 INFO L350 BasicCegarLoop]: trace histogram [50, 50, 49, 49, 49, 49, 49, 49, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:35,051 INFO L371 AbstractCegarLoop]: === Iteration 51 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:35,051 INFO L82 PathProgramCache]: Analyzing trace with hash 1591769008, now seen corresponding path program 49 times [2018-01-29 23:39:35,051 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:35,051 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:35,051 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:35,051 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:35,052 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:35,059 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:35,060 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:36,050 INFO L134 CoverageAnalysis]: Checked inductivity of 9604 backedges. 0 proven. 4802 refuted. 0 times theorem prover too weak. 4802 trivial. 0 not checked. [2018-01-29 23:39:36,050 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:36,050 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 50 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:36,055 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:39:36,086 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:36,088 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:36,146 INFO L134 CoverageAnalysis]: Checked inductivity of 9604 backedges. 0 proven. 4802 refuted. 0 times theorem prover too weak. 4802 trivial. 0 not checked. [2018-01-29 23:39:36,163 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:36,163 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [52, 52] total 52 [2018-01-29 23:39:36,163 INFO L409 AbstractCegarLoop]: Interpolant automaton has 52 states [2018-01-29 23:39:36,163 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 52 interpolants. [2018-01-29 23:39:36,164 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-01-29 23:39:36,164 INFO L87 Difference]: Start difference. First operand 417 states and 420 transitions. Second operand 52 states. [2018-01-29 23:39:36,425 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:36,425 INFO L93 Difference]: Finished difference Result 642 states and 649 transitions. [2018-01-29 23:39:36,425 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 52 states. [2018-01-29 23:39:36,425 INFO L78 Accepts]: Start accepts. Automaton has 52 states. Word has length 411 [2018-01-29 23:39:36,425 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:36,426 INFO L225 Difference]: With dead ends: 642 [2018-01-29 23:39:36,426 INFO L226 Difference]: Without dead ends: 429 [2018-01-29 23:39:36,427 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 462 GetRequests, 412 SyntacticMatches, 0 SemanticMatches, 50 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1326, Invalid=1326, Unknown=0, NotChecked=0, Total=2652 [2018-01-29 23:39:36,427 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 429 states. [2018-01-29 23:39:36,429 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 429 to 425. [2018-01-29 23:39:36,429 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 425 states. [2018-01-29 23:39:36,429 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 425 states to 425 states and 428 transitions. [2018-01-29 23:39:36,429 INFO L78 Accepts]: Start accepts. Automaton has 425 states and 428 transitions. Word has length 411 [2018-01-29 23:39:36,429 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:36,430 INFO L432 AbstractCegarLoop]: Abstraction has 425 states and 428 transitions. [2018-01-29 23:39:36,430 INFO L433 AbstractCegarLoop]: Interpolant automaton has 52 states. [2018-01-29 23:39:36,430 INFO L276 IsEmpty]: Start isEmpty. Operand 425 states and 428 transitions. [2018-01-29 23:39:36,431 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 420 [2018-01-29 23:39:36,431 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:36,431 INFO L350 BasicCegarLoop]: trace histogram [51, 51, 50, 50, 50, 50, 50, 50, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:36,431 INFO L371 AbstractCegarLoop]: === Iteration 52 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:36,431 INFO L82 PathProgramCache]: Analyzing trace with hash 1369632336, now seen corresponding path program 50 times [2018-01-29 23:39:36,431 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:36,431 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:36,432 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:36,432 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:39:36,432 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:36,439 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:36,440 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:37,545 INFO L134 CoverageAnalysis]: Checked inductivity of 10000 backedges. 0 proven. 5000 refuted. 0 times theorem prover too weak. 5000 trivial. 0 not checked. [2018-01-29 23:39:37,545 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:37,546 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 51 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 51 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:37,551 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-29 23:39:37,558 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:37,579 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:37,583 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:37,586 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:37,648 INFO L134 CoverageAnalysis]: Checked inductivity of 10000 backedges. 0 proven. 5000 refuted. 0 times theorem prover too weak. 5000 trivial. 0 not checked. [2018-01-29 23:39:37,665 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:37,665 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [53, 53] total 53 [2018-01-29 23:39:37,665 INFO L409 AbstractCegarLoop]: Interpolant automaton has 53 states [2018-01-29 23:39:37,665 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 53 interpolants. [2018-01-29 23:39:37,666 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1378, Invalid=1378, Unknown=0, NotChecked=0, Total=2756 [2018-01-29 23:39:37,666 INFO L87 Difference]: Start difference. First operand 425 states and 428 transitions. Second operand 53 states. [2018-01-29 23:39:37,968 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:37,968 INFO L93 Difference]: Finished difference Result 654 states and 661 transitions. [2018-01-29 23:39:37,969 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 53 states. [2018-01-29 23:39:37,969 INFO L78 Accepts]: Start accepts. Automaton has 53 states. Word has length 419 [2018-01-29 23:39:37,969 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:37,970 INFO L225 Difference]: With dead ends: 654 [2018-01-29 23:39:37,970 INFO L226 Difference]: Without dead ends: 437 [2018-01-29 23:39:37,970 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 471 GetRequests, 420 SyntacticMatches, 0 SemanticMatches, 51 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1378, Invalid=1378, Unknown=0, NotChecked=0, Total=2756 [2018-01-29 23:39:37,970 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 437 states. [2018-01-29 23:39:37,973 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 437 to 433. [2018-01-29 23:39:37,973 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 433 states. [2018-01-29 23:39:37,973 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 433 states to 433 states and 436 transitions. [2018-01-29 23:39:37,973 INFO L78 Accepts]: Start accepts. Automaton has 433 states and 436 transitions. Word has length 419 [2018-01-29 23:39:37,973 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:37,973 INFO L432 AbstractCegarLoop]: Abstraction has 433 states and 436 transitions. [2018-01-29 23:39:37,973 INFO L433 AbstractCegarLoop]: Interpolant automaton has 53 states. [2018-01-29 23:39:37,973 INFO L276 IsEmpty]: Start isEmpty. Operand 433 states and 436 transitions. [2018-01-29 23:39:37,974 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 428 [2018-01-29 23:39:37,974 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:37,975 INFO L350 BasicCegarLoop]: trace histogram [52, 52, 51, 51, 51, 51, 51, 51, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:37,975 INFO L371 AbstractCegarLoop]: === Iteration 53 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:37,975 INFO L82 PathProgramCache]: Analyzing trace with hash -1608594448, now seen corresponding path program 51 times [2018-01-29 23:39:37,975 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:37,975 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:37,975 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:37,975 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:37,975 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:37,983 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:37,984 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:39,015 INFO L134 CoverageAnalysis]: Checked inductivity of 10404 backedges. 0 proven. 5202 refuted. 0 times theorem prover too weak. 5202 trivial. 0 not checked. [2018-01-29 23:39:39,016 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:39,016 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 52 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:39,020 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-29 23:39:39,028 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,029 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,030 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,031 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,032 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,033 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,035 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,036 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,038 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,040 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,042 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,045 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,048 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,051 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,055 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,060 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,064 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,069 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,074 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,080 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,087 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,096 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,104 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,114 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,124 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,137 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,149 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,165 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,181 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,198 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,217 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,238 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,259 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,285 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,312 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,342 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,375 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,408 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,447 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,487 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,530 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,577 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,627 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,681 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,739 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,799 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,862 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:39,931 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:40,001 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:40,079 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:40,170 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:40,259 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:40,261 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:40,266 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:40,329 INFO L134 CoverageAnalysis]: Checked inductivity of 10404 backedges. 0 proven. 5202 refuted. 0 times theorem prover too weak. 5202 trivial. 0 not checked. [2018-01-29 23:39:40,348 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:40,348 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [54, 54] total 54 [2018-01-29 23:39:40,349 INFO L409 AbstractCegarLoop]: Interpolant automaton has 54 states [2018-01-29 23:39:40,349 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 54 interpolants. [2018-01-29 23:39:40,349 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1431, Invalid=1431, Unknown=0, NotChecked=0, Total=2862 [2018-01-29 23:39:40,349 INFO L87 Difference]: Start difference. First operand 433 states and 436 transitions. Second operand 54 states. [2018-01-29 23:39:40,594 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:40,594 INFO L93 Difference]: Finished difference Result 666 states and 673 transitions. [2018-01-29 23:39:40,594 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 54 states. [2018-01-29 23:39:40,594 INFO L78 Accepts]: Start accepts. Automaton has 54 states. Word has length 427 [2018-01-29 23:39:40,594 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:40,595 INFO L225 Difference]: With dead ends: 666 [2018-01-29 23:39:40,595 INFO L226 Difference]: Without dead ends: 445 [2018-01-29 23:39:40,595 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 480 GetRequests, 428 SyntacticMatches, 0 SemanticMatches, 52 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1431, Invalid=1431, Unknown=0, NotChecked=0, Total=2862 [2018-01-29 23:39:40,596 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 445 states. [2018-01-29 23:39:40,597 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 445 to 441. [2018-01-29 23:39:40,598 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 441 states. [2018-01-29 23:39:40,598 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 441 states to 441 states and 444 transitions. [2018-01-29 23:39:40,598 INFO L78 Accepts]: Start accepts. Automaton has 441 states and 444 transitions. Word has length 427 [2018-01-29 23:39:40,598 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:40,598 INFO L432 AbstractCegarLoop]: Abstraction has 441 states and 444 transitions. [2018-01-29 23:39:40,598 INFO L433 AbstractCegarLoop]: Interpolant automaton has 54 states. [2018-01-29 23:39:40,598 INFO L276 IsEmpty]: Start isEmpty. Operand 441 states and 444 transitions. [2018-01-29 23:39:40,599 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 436 [2018-01-29 23:39:40,599 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:40,600 INFO L350 BasicCegarLoop]: trace histogram [53, 53, 52, 52, 52, 52, 52, 52, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:40,600 INFO L371 AbstractCegarLoop]: === Iteration 54 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:40,600 INFO L82 PathProgramCache]: Analyzing trace with hash 2007077008, now seen corresponding path program 52 times [2018-01-29 23:39:40,600 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:40,600 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:40,600 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:40,600 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:40,600 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:40,608 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:40,609 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:41,696 INFO L134 CoverageAnalysis]: Checked inductivity of 10816 backedges. 0 proven. 5408 refuted. 0 times theorem prover too weak. 5408 trivial. 0 not checked. [2018-01-29 23:39:41,697 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:41,697 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 53 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 53 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:41,701 INFO L101 rtionOrderModulation]: Keeping assertion order TERMS_WITH_SMALL_CONSTANTS_FIRST [2018-01-29 23:39:41,734 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:41,736 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:41,802 INFO L134 CoverageAnalysis]: Checked inductivity of 10816 backedges. 0 proven. 5408 refuted. 0 times theorem prover too weak. 5408 trivial. 0 not checked. [2018-01-29 23:39:41,819 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:41,820 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [55, 55] total 55 [2018-01-29 23:39:41,820 INFO L409 AbstractCegarLoop]: Interpolant automaton has 55 states [2018-01-29 23:39:41,820 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 55 interpolants. [2018-01-29 23:39:41,820 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1485, Invalid=1485, Unknown=0, NotChecked=0, Total=2970 [2018-01-29 23:39:41,820 INFO L87 Difference]: Start difference. First operand 441 states and 444 transitions. Second operand 55 states. [2018-01-29 23:39:42,132 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:42,132 INFO L93 Difference]: Finished difference Result 678 states and 685 transitions. [2018-01-29 23:39:42,133 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 55 states. [2018-01-29 23:39:42,133 INFO L78 Accepts]: Start accepts. Automaton has 55 states. Word has length 435 [2018-01-29 23:39:42,133 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:42,134 INFO L225 Difference]: With dead ends: 678 [2018-01-29 23:39:42,134 INFO L226 Difference]: Without dead ends: 453 [2018-01-29 23:39:42,134 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 489 GetRequests, 436 SyntacticMatches, 0 SemanticMatches, 53 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1485, Invalid=1485, Unknown=0, NotChecked=0, Total=2970 [2018-01-29 23:39:42,134 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 453 states. [2018-01-29 23:39:42,136 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 453 to 449. [2018-01-29 23:39:42,136 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 449 states. [2018-01-29 23:39:42,137 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 449 states to 449 states and 452 transitions. [2018-01-29 23:39:42,137 INFO L78 Accepts]: Start accepts. Automaton has 449 states and 452 transitions. Word has length 435 [2018-01-29 23:39:42,137 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:42,137 INFO L432 AbstractCegarLoop]: Abstraction has 449 states and 452 transitions. [2018-01-29 23:39:42,137 INFO L433 AbstractCegarLoop]: Interpolant automaton has 55 states. [2018-01-29 23:39:42,137 INFO L276 IsEmpty]: Start isEmpty. Operand 449 states and 452 transitions. [2018-01-29 23:39:42,138 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 444 [2018-01-29 23:39:42,138 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:42,138 INFO L350 BasicCegarLoop]: trace histogram [54, 54, 53, 53, 53, 53, 53, 53, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:42,139 INFO L371 AbstractCegarLoop]: === Iteration 55 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:42,139 INFO L82 PathProgramCache]: Analyzing trace with hash 968408112, now seen corresponding path program 53 times [2018-01-29 23:39:42,139 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:42,139 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:42,139 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:42,139 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:42,139 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:42,147 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:42,148 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:43,267 INFO L134 CoverageAnalysis]: Checked inductivity of 11236 backedges. 0 proven. 5618 refuted. 0 times theorem prover too weak. 5618 trivial. 0 not checked. [2018-01-29 23:39:43,267 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:43,267 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 54 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:43,272 INFO L101 rtionOrderModulation]: Keeping assertion order INSIDE_LOOP_FIRST1 [2018-01-29 23:39:43,279 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,280 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,281 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,282 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,283 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,285 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,286 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,288 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,290 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,292 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,294 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,297 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,300 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,304 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,308 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,312 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,317 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,323 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,330 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,337 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,345 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,354 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,364 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,375 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,388 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,402 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,418 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,436 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,456 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,478 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,502 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,528 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,557 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,590 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,625 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,662 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,704 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,750 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,800 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,856 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,914 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:43,976 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:44,042 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:44,113 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:44,189 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:44,270 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:44,357 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:44,449 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:44,546 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:44,651 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:44,764 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:44,881 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:45,008 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:45,498 INFO L278 tOrderPrioritization]: Assert order INSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:45,501 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:45,507 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:45,574 INFO L134 CoverageAnalysis]: Checked inductivity of 11236 backedges. 0 proven. 5618 refuted. 0 times theorem prover too weak. 5618 trivial. 0 not checked. [2018-01-29 23:39:45,597 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:45,597 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [56, 56] total 56 [2018-01-29 23:39:45,597 INFO L409 AbstractCegarLoop]: Interpolant automaton has 56 states [2018-01-29 23:39:45,597 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 56 interpolants. [2018-01-29 23:39:45,598 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1540, Invalid=1540, Unknown=0, NotChecked=0, Total=3080 [2018-01-29 23:39:45,598 INFO L87 Difference]: Start difference. First operand 449 states and 452 transitions. Second operand 56 states. [2018-01-29 23:39:45,830 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:45,830 INFO L93 Difference]: Finished difference Result 690 states and 697 transitions. [2018-01-29 23:39:45,830 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 56 states. [2018-01-29 23:39:45,830 INFO L78 Accepts]: Start accepts. Automaton has 56 states. Word has length 443 [2018-01-29 23:39:45,830 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:45,831 INFO L225 Difference]: With dead ends: 690 [2018-01-29 23:39:45,831 INFO L226 Difference]: Without dead ends: 461 [2018-01-29 23:39:45,832 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 498 GetRequests, 444 SyntacticMatches, 0 SemanticMatches, 54 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.6s TimeCoverageRelationStatistics Valid=1540, Invalid=1540, Unknown=0, NotChecked=0, Total=3080 [2018-01-29 23:39:45,832 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 461 states. [2018-01-29 23:39:45,841 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 461 to 457. [2018-01-29 23:39:45,841 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 457 states. [2018-01-29 23:39:45,841 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 457 states to 457 states and 460 transitions. [2018-01-29 23:39:45,841 INFO L78 Accepts]: Start accepts. Automaton has 457 states and 460 transitions. Word has length 443 [2018-01-29 23:39:45,841 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:45,841 INFO L432 AbstractCegarLoop]: Abstraction has 457 states and 460 transitions. [2018-01-29 23:39:45,841 INFO L433 AbstractCegarLoop]: Interpolant automaton has 56 states. [2018-01-29 23:39:45,842 INFO L276 IsEmpty]: Start isEmpty. Operand 457 states and 460 transitions. [2018-01-29 23:39:45,843 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 452 [2018-01-29 23:39:45,843 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:45,843 INFO L350 BasicCegarLoop]: trace histogram [55, 55, 54, 54, 54, 54, 54, 54, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:45,843 INFO L371 AbstractCegarLoop]: === Iteration 56 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:45,843 INFO L82 PathProgramCache]: Analyzing trace with hash 1546768080, now seen corresponding path program 54 times [2018-01-29 23:39:45,843 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:45,843 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:45,844 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:45,844 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:45,844 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:45,852 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:45,853 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:47,095 INFO L134 CoverageAnalysis]: Checked inductivity of 11664 backedges. 0 proven. 5832 refuted. 0 times theorem prover too weak. 5832 trivial. 0 not checked. [2018-01-29 23:39:47,095 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:47,095 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 55 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:47,101 INFO L101 rtionOrderModulation]: Keeping assertion order MIX_INSIDE_OUTSIDE [2018-01-29 23:39:47,108 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,109 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,110 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,111 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,112 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,113 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,115 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,116 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,117 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,119 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,121 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,122 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,124 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,127 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,129 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,132 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,135 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,137 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,142 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,145 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,149 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,153 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,157 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,161 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,166 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,172 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,178 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,184 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,191 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,198 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,206 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,214 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,222 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,230 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,240 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,250 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,261 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,272 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,287 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,299 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,313 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,328 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,344 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,361 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,379 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,399 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,420 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,440 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,462 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,487 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,516 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,542 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,571 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,603 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,724 INFO L310 tOrderPrioritization]: Assert order MIX_INSIDE_OUTSIDE issued a check-sat command [2018-01-29 23:39:47,726 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:47,731 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:47,802 INFO L134 CoverageAnalysis]: Checked inductivity of 11664 backedges. 0 proven. 5832 refuted. 0 times theorem prover too weak. 5832 trivial. 0 not checked. [2018-01-29 23:39:47,821 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:47,821 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [57, 57] total 57 [2018-01-29 23:39:47,822 INFO L409 AbstractCegarLoop]: Interpolant automaton has 57 states [2018-01-29 23:39:47,822 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 57 interpolants. [2018-01-29 23:39:47,822 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1596, Invalid=1596, Unknown=0, NotChecked=0, Total=3192 [2018-01-29 23:39:47,822 INFO L87 Difference]: Start difference. First operand 457 states and 460 transitions. Second operand 57 states. [2018-01-29 23:39:48,088 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:48,088 INFO L93 Difference]: Finished difference Result 702 states and 709 transitions. [2018-01-29 23:39:48,088 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 57 states. [2018-01-29 23:39:48,088 INFO L78 Accepts]: Start accepts. Automaton has 57 states. Word has length 451 [2018-01-29 23:39:48,089 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:48,089 INFO L225 Difference]: With dead ends: 702 [2018-01-29 23:39:48,089 INFO L226 Difference]: Without dead ends: 469 [2018-01-29 23:39:48,090 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 507 GetRequests, 452 SyntacticMatches, 0 SemanticMatches, 55 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1596, Invalid=1596, Unknown=0, NotChecked=0, Total=3192 [2018-01-29 23:39:48,090 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 469 states. [2018-01-29 23:39:48,092 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 469 to 465. [2018-01-29 23:39:48,092 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 465 states. [2018-01-29 23:39:48,092 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 465 states to 465 states and 468 transitions. [2018-01-29 23:39:48,092 INFO L78 Accepts]: Start accepts. Automaton has 465 states and 468 transitions. Word has length 451 [2018-01-29 23:39:48,093 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:48,093 INFO L432 AbstractCegarLoop]: Abstraction has 465 states and 468 transitions. [2018-01-29 23:39:48,093 INFO L433 AbstractCegarLoop]: Interpolant automaton has 57 states. [2018-01-29 23:39:48,093 INFO L276 IsEmpty]: Start isEmpty. Operand 465 states and 468 transitions. [2018-01-29 23:39:48,094 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 460 [2018-01-29 23:39:48,094 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:48,094 INFO L350 BasicCegarLoop]: trace histogram [56, 56, 55, 55, 55, 55, 55, 55, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:48,094 INFO L371 AbstractCegarLoop]: === Iteration 57 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:48,094 INFO L82 PathProgramCache]: Analyzing trace with hash 1226459248, now seen corresponding path program 55 times [2018-01-29 23:39:48,094 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:48,094 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:48,095 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:48,095 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:48,095 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:48,103 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:48,104 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:49,325 INFO L134 CoverageAnalysis]: Checked inductivity of 12100 backedges. 0 proven. 6050 refuted. 0 times theorem prover too weak. 6050 trivial. 0 not checked. [2018-01-29 23:39:49,326 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:49,326 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 56 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:49,331 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:39:49,363 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:49,366 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:49,438 INFO L134 CoverageAnalysis]: Checked inductivity of 12100 backedges. 0 proven. 6050 refuted. 0 times theorem prover too weak. 6050 trivial. 0 not checked. [2018-01-29 23:39:49,455 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:49,455 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [58, 58] total 58 [2018-01-29 23:39:49,455 INFO L409 AbstractCegarLoop]: Interpolant automaton has 58 states [2018-01-29 23:39:49,455 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 58 interpolants. [2018-01-29 23:39:49,455 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1653, Invalid=1653, Unknown=0, NotChecked=0, Total=3306 [2018-01-29 23:39:49,456 INFO L87 Difference]: Start difference. First operand 465 states and 468 transitions. Second operand 58 states. [2018-01-29 23:39:49,795 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:49,795 INFO L93 Difference]: Finished difference Result 714 states and 721 transitions. [2018-01-29 23:39:49,795 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 58 states. [2018-01-29 23:39:49,795 INFO L78 Accepts]: Start accepts. Automaton has 58 states. Word has length 459 [2018-01-29 23:39:49,795 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:49,796 INFO L225 Difference]: With dead ends: 714 [2018-01-29 23:39:49,796 INFO L226 Difference]: Without dead ends: 477 [2018-01-29 23:39:49,797 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 516 GetRequests, 460 SyntacticMatches, 0 SemanticMatches, 56 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.7s TimeCoverageRelationStatistics Valid=1653, Invalid=1653, Unknown=0, NotChecked=0, Total=3306 [2018-01-29 23:39:49,797 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 477 states. [2018-01-29 23:39:49,799 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 477 to 473. [2018-01-29 23:39:49,799 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 473 states. [2018-01-29 23:39:49,799 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 473 states to 473 states and 476 transitions. [2018-01-29 23:39:49,799 INFO L78 Accepts]: Start accepts. Automaton has 473 states and 476 transitions. Word has length 459 [2018-01-29 23:39:49,799 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:49,800 INFO L432 AbstractCegarLoop]: Abstraction has 473 states and 476 transitions. [2018-01-29 23:39:49,800 INFO L433 AbstractCegarLoop]: Interpolant automaton has 58 states. [2018-01-29 23:39:49,800 INFO L276 IsEmpty]: Start isEmpty. Operand 473 states and 476 transitions. [2018-01-29 23:39:49,801 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 468 [2018-01-29 23:39:49,801 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:49,801 INFO L350 BasicCegarLoop]: trace histogram [57, 57, 56, 56, 56, 56, 56, 56, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:49,801 INFO L371 AbstractCegarLoop]: === Iteration 58 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:49,801 INFO L82 PathProgramCache]: Analyzing trace with hash 1052748048, now seen corresponding path program 56 times [2018-01-29 23:39:49,801 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:49,801 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:49,802 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:49,802 INFO L101 rtionOrderModulation]: Keeping assertion order NOT_INCREMENTALLY [2018-01-29 23:39:49,802 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:49,810 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:49,811 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:51,206 INFO L134 CoverageAnalysis]: Checked inductivity of 12544 backedges. 0 proven. 6272 refuted. 0 times theorem prover too weak. 6272 trivial. 0 not checked. [2018-01-29 23:39:51,206 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:51,206 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 57 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 57 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:51,213 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST1 [2018-01-29 23:39:51,221 INFO L201 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:51,243 INFO L214 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST1 issued a check-sat command [2018-01-29 23:39:51,248 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:51,251 INFO L270 TraceCheckSpWp]: Computing forward predicates... [2018-01-29 23:39:51,324 INFO L134 CoverageAnalysis]: Checked inductivity of 12544 backedges. 0 proven. 6272 refuted. 0 times theorem prover too weak. 6272 trivial. 0 not checked. [2018-01-29 23:39:51,341 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:51,341 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [59, 59] total 59 [2018-01-29 23:39:51,341 INFO L409 AbstractCegarLoop]: Interpolant automaton has 59 states [2018-01-29 23:39:51,342 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 59 interpolants. [2018-01-29 23:39:51,342 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1711, Invalid=1711, Unknown=0, NotChecked=0, Total=3422 [2018-01-29 23:39:51,342 INFO L87 Difference]: Start difference. First operand 473 states and 476 transitions. Second operand 59 states. [2018-01-29 23:39:51,704 INFO L144 Difference]: Subtrahend was deterministic. Have not used determinization. [2018-01-29 23:39:51,704 INFO L93 Difference]: Finished difference Result 726 states and 733 transitions. [2018-01-29 23:39:51,704 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 59 states. [2018-01-29 23:39:51,704 INFO L78 Accepts]: Start accepts. Automaton has 59 states. Word has length 467 [2018-01-29 23:39:51,704 INFO L84 Accepts]: Finished accepts. some prefix is accepted. [2018-01-29 23:39:51,705 INFO L225 Difference]: With dead ends: 726 [2018-01-29 23:39:51,705 INFO L226 Difference]: Without dead ends: 485 [2018-01-29 23:39:51,706 INFO L553 BasicCegarLoop]: 0 DeclaredPredicates, 525 GetRequests, 468 SyntacticMatches, 0 SemanticMatches, 57 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 0.8s TimeCoverageRelationStatistics Valid=1711, Invalid=1711, Unknown=0, NotChecked=0, Total=3422 [2018-01-29 23:39:51,706 INFO L82 GeneralOperation]: Start minimizeSevpa. Operand 485 states. [2018-01-29 23:39:51,708 INFO L88 GeneralOperation]: Finished minimizeSevpa. Reduced states from 485 to 481. [2018-01-29 23:39:51,708 INFO L82 GeneralOperation]: Start removeUnreachable. Operand 481 states. [2018-01-29 23:39:51,709 INFO L88 GeneralOperation]: Finished removeUnreachable. Reduced from 481 states to 481 states and 484 transitions. [2018-01-29 23:39:51,709 INFO L78 Accepts]: Start accepts. Automaton has 481 states and 484 transitions. Word has length 467 [2018-01-29 23:39:51,709 INFO L84 Accepts]: Finished accepts. word is rejected. [2018-01-29 23:39:51,709 INFO L432 AbstractCegarLoop]: Abstraction has 481 states and 484 transitions. [2018-01-29 23:39:51,709 INFO L433 AbstractCegarLoop]: Interpolant automaton has 59 states. [2018-01-29 23:39:51,709 INFO L276 IsEmpty]: Start isEmpty. Operand 481 states and 484 transitions. [2018-01-29 23:39:51,710 INFO L282 IsEmpty]: Finished isEmpty. Found accepting run of length 476 [2018-01-29 23:39:51,711 INFO L342 BasicCegarLoop]: Found error trace [2018-01-29 23:39:51,711 INFO L350 BasicCegarLoop]: trace histogram [58, 58, 57, 57, 57, 57, 57, 57, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1] [2018-01-29 23:39:51,711 INFO L371 AbstractCegarLoop]: === Iteration 59 === [__VERIFIER_assertErr0AssertViolation]=== [2018-01-29 23:39:51,711 INFO L82 PathProgramCache]: Analyzing trace with hash 800026800, now seen corresponding path program 57 times [2018-01-29 23:39:51,711 INFO L209 onRefinementStrategy]: Switched to mode SMTINTERPOL_TREE_INTERPOLANTS [2018-01-29 23:39:51,711 INFO L67 tionRefinementEngine]: Using refinement strategy CamelRefinementStrategy [2018-01-29 23:39:51,712 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:51,712 INFO L99 rtionOrderModulation]: Changing assertion order to NOT_INCREMENTALLY [2018-01-29 23:39:51,712 INFO L117 rtionOrderModulation]: Craig nested/tree interpolation forces the following order [2018-01-29 23:39:51,721 INFO L136 AnnotateAndAsserter]: Conjunction of SSA is unsat [2018-01-29 23:39:51,722 WARN L137 erpolLogProxyWrapper]: Using partial proofs (cut at CNF-level). Set option :produce-proofs to true to get complete proofs. [2018-01-29 23:39:52,983 INFO L134 CoverageAnalysis]: Checked inductivity of 12996 backedges. 0 proven. 6498 refuted. 0 times theorem prover too weak. 6498 trivial. 0 not checked. [2018-01-29 23:39:52,983 INFO L308 seRefinementStrategy]: The current sequences of interpolants are not accepted, trying to find more. [2018-01-29 23:39:52,983 INFO L209 onRefinementStrategy]: Switched to mode Z3_FP No working directory specified, using /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/z3 Starting monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 (exit command is (exit), workingDir is null) Waiting until toolchain timeout for monitored process 58 with z3 -smt2 -in SMTLIB2_COMPLIANT=true -t:12000 [2018-01-29 23:39:52,988 INFO L101 rtionOrderModulation]: Keeping assertion order OUTSIDE_LOOP_FIRST2 [2018-01-29 23:39:52,996 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:52,997 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:52,998 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:52,999 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,000 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,002 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,004 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,006 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,008 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,010 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,012 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,015 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,018 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,021 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,025 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,029 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,033 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,039 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,044 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,050 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,057 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,065 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,073 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,082 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,092 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,103 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,115 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,128 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,142 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,158 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,176 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,196 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,217 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,240 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,264 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,291 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,321 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,352 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,386 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,424 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,464 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,507 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,554 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,607 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,661 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,716 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,777 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,838 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,906 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:53,975 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:54,050 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:54,131 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:54,216 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:54,305 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:54,400 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:54,500 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:54,603 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:54,717 INFO L254 tOrderPrioritization]: Assert order OUTSIDE_LOOP_FIRST2 issued a check-sat command [2018-01-29 23:39:54,719 INFO L239 tOrderPrioritization]: Conjunction of SSA is unsat [2018-01-29 23:39:54,724 INFO L270 TraceCheckSpWp]: Computing forward predicates... Received shutdown request... [2018-01-29 23:39:54,801 INFO L134 CoverageAnalysis]: Checked inductivity of 12996 backedges. 0 proven. 6498 refuted. 0 times theorem prover too weak. 6498 trivial. 0 not checked. [2018-01-29 23:39:54,821 INFO L320 seRefinementStrategy]: Constructing automaton from 0 perfect and 2 imperfect interpolant sequences. [2018-01-29 23:39:54,821 INFO L335 seRefinementStrategy]: Number of different interpolants: perfect sequences [] imperfect sequences [60, 60] total 60 [2018-01-29 23:39:54,821 INFO L409 AbstractCegarLoop]: Interpolant automaton has 60 states [2018-01-29 23:39:54,822 INFO L132 InterpolantAutomaton]: Constructing interpolant automaton starting with 60 interpolants. [2018-01-29 23:39:54,822 INFO L133 InterpolantAutomaton]: CoverageRelationStatistics Valid=1770, Invalid=1770, Unknown=0, NotChecked=0, Total=3540 [2018-01-29 23:39:54,822 INFO L87 Difference]: Start difference. First operand 481 states and 484 transitions. Second operand 60 states. [2018-01-29 23:39:54,822 INFO L142 InterpolantAutomaton]: Switched to read-only mode: deterministic interpolant automaton has 2 states. [2018-01-29 23:39:54,823 WARN L491 AbstractCegarLoop]: Verification canceled [2018-01-29 23:39:54,826 WARN L185 ceAbstractionStarter]: Timeout [2018-01-29 23:39:54,826 INFO L202 PluginConnector]: Adding new model de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction CFG 29.01 11:39:54 BoogieIcfgContainer [2018-01-29 23:39:54,826 INFO L132 PluginConnector]: ------------------------ END TraceAbstraction---------------------------- [2018-01-29 23:39:54,827 INFO L168 Benchmark]: Toolchain (without parser) took 67818.79 ms. Allocated memory was 148.9 MB in the beginning and 1.4 GB in the end (delta: 1.2 GB). Free memory was 114.1 MB in the beginning and 446.8 MB in the end (delta: -332.7 MB). Peak memory consumption was 898.3 MB. Max. memory is 5.3 GB. [2018-01-29 23:39:54,827 INFO L168 Benchmark]: CDTParser took 0.09 ms. Allocated memory is still 148.9 MB. Free memory is still 118.8 MB. There was no memory consumed. Max. memory is 5.3 GB. [2018-01-29 23:39:54,828 INFO L168 Benchmark]: CACSL2BoogieTranslator took 123.35 ms. Allocated memory is still 148.9 MB. Free memory was 113.9 MB in the beginning and 105.9 MB in the end (delta: 7.9 MB). Peak memory consumption was 7.9 MB. Max. memory is 5.3 GB. [2018-01-29 23:39:54,828 INFO L168 Benchmark]: Boogie Preprocessor took 19.44 ms. Allocated memory is still 148.9 MB. Free memory was 105.9 MB in the beginning and 104.4 MB in the end (delta: 1.6 MB). Peak memory consumption was 1.6 MB. Max. memory is 5.3 GB. [2018-01-29 23:39:54,828 INFO L168 Benchmark]: RCFGBuilder took 256.52 ms. Allocated memory is still 148.9 MB. Free memory was 104.1 MB in the beginning and 92.6 MB in the end (delta: 11.6 MB). Peak memory consumption was 11.6 MB. Max. memory is 5.3 GB. [2018-01-29 23:39:54,828 INFO L168 Benchmark]: TraceAbstraction took 67417.09 ms. Allocated memory was 148.9 MB in the beginning and 1.4 GB in the end (delta: 1.2 GB). Free memory was 92.4 MB in the beginning and 446.8 MB in the end (delta: -354.4 MB). Peak memory consumption was 876.6 MB. Max. memory is 5.3 GB. [2018-01-29 23:39:54,829 INFO L344 ainManager$Toolchain]: ####################### End [Toolchain 1] ####################### --- Results --- * Results from de.uni_freiburg.informatik.ultimate.core: - StatisticsResult: Toolchain Benchmarks Benchmark results are: * CDTParser took 0.09 ms. Allocated memory is still 148.9 MB. Free memory is still 118.8 MB. There was no memory consumed. Max. memory is 5.3 GB. * CACSL2BoogieTranslator took 123.35 ms. Allocated memory is still 148.9 MB. Free memory was 113.9 MB in the beginning and 105.9 MB in the end (delta: 7.9 MB). Peak memory consumption was 7.9 MB. Max. memory is 5.3 GB. * Boogie Preprocessor took 19.44 ms. Allocated memory is still 148.9 MB. Free memory was 105.9 MB in the beginning and 104.4 MB in the end (delta: 1.6 MB). Peak memory consumption was 1.6 MB. Max. memory is 5.3 GB. * RCFGBuilder took 256.52 ms. Allocated memory is still 148.9 MB. Free memory was 104.1 MB in the beginning and 92.6 MB in the end (delta: 11.6 MB). Peak memory consumption was 11.6 MB. Max. memory is 5.3 GB. * TraceAbstraction took 67417.09 ms. Allocated memory was 148.9 MB in the beginning and 1.4 GB in the end (delta: 1.2 GB). Free memory was 92.4 MB in the beginning and 446.8 MB in the end (delta: -354.4 MB). Peak memory consumption was 876.6 MB. Max. memory is 5.3 GB. * Results from de.uni_freiburg.informatik.ultimate.plugins.generator.traceabstraction: - TimeoutResultAtElement [Line: 2]: Timeout (TraceAbstraction) Unable to prove that call of __VERIFIER_error() unreachable (line 2). Cancelled while BasicCegarLoop was constructing difference of abstraction (481states) and interpolant automaton (currently 2 states, 60 states before enhancement), while ReachableStatesComputation was computing reachable states (1 states constructedinput type IntersectNwa). - StatisticsResult: Ultimate Automizer benchmark data CFG has 4 procedures, 34 locations, 1 error locations. TIMEOUT Result, 67.3s OverallTime, 59 OverallIterations, 58 TraceHistogramMax, 14.6s AutomataDifference, 0.0s DeadEndRemovalTime, 0.0s HoareAnnotationTime, HoareTripleCheckerStatistics: 1519 SDtfs, 9257 SDslu, 25386 SDs, 0 SdLazy, 12468 SolverSat, 1710 SolverUnsat, 0 SolverUnknown, 0 SolverNotchecked, 11.0s Time, PredicateUnifierStatistics: 0 DeclaredPredicates, 16079 GetRequests, 14368 SyntacticMatches, 0 SemanticMatches, 1711 ConstructedPredicates, 0 IntricatePredicates, 0 DeprecatedPredicates, 0 ImplicationChecksByTransitivity, 23.2s Time, 0.0s BasicInterpolantAutomatonTime, BiggestAbstraction: size=481occurred in iteration=58, traceCheckStatistics: No data available, InterpolantConsolidationStatistics: No data available, PathInvariantsStatistics: No data available, 0/0 InterpolantCoveringCapability, TotalInterpolationStatistics: No data available, 0.0s AbstIntTime, 0 AbstIntIterations, 0 AbstIntStrong, NaN AbsIntWeakeningRatio, NaN AbsIntAvgWeakeningVarsNumRemoved, NaN AbsIntAvgWeakenedConjuncts, 0.0s DumpTime, AutomataMinimizationStatistics: 0.1s AutomataMinimizationTime, 58 MinimizatonAttempts, 228 StatesRemovedByMinimization, 57 NontrivialMinimizations, HoareAnnotationStatistics: No data available, RefinementEngineStatistics: TraceCheckStatistics: 0.3s SsaConstructionTime, 15.2s SatisfiabilityAnalysisTime, 33.9s InterpolantComputationTime, 28650 NumberOfCodeBlocks, 28650 NumberOfCodeBlocksAsserted, 966 NumberOfCheckSat, 28534 ConstructedInterpolants, 0 QuantifiedInterpolants, 17801220 SizeOfPredicates, 57 NumberOfNonLiveVariables, 18411 ConjunctsInSsa, 1767 ConjunctsInUnsatCore, 116 InterpolantComputations, 2 PerfectInterpolantSequences, 253460/506920 InterpolantCoveringCapability, InvariantSynthesisStatistics: No data available, InterpolantConsolidationStatistics: No data available, ReuseStatistics: No data available RESULT: Ultimate could not prove your program: Timeout Written .csv to /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_init2_true-unreach-call_ground.i_svcomp-Reach-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-Benchmark-0-2018-01-29_23-39-54-833.csv Written .csv to /home/daniel/ultimate/releaseScripts/default/UAutomizer-linux/../../../releaseScripts/default/UAutomizer-linux/csv/standard_init2_true-unreach-call_ground.i_svcomp-Reach-32bit-Automizer_Camel+AI_EQ_SS.epf_AutomizerC.xml/Csv-TraceAbstractionBenchmarks-0-2018-01-29_23-39-54-833.csv Completed graceful shutdown